chip soc/intel/alderlake

	# GPE configuration
	register "pmc_gpe0_dw0" = "GPP_A"
	register "pmc_gpe0_dw1" = "GPP_B"
	register "pmc_gpe0_dw2" = "GPP_F"

	# EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
	register "gen1_dec" = "0x00fc0801"
	register "gen2_dec" = "0x000c0201"
	# For platform selects EC_GOOGLE_CHROMEEC_MEMMAP_INDEXED_IO
	#    EC memmap range is in 0x380-0x381
	# For others
	#    EC memmap range is in 0x900-0x9ff
	register "gen3_dec" = "CONFIG(EC_GOOGLE_CHROMEEC_MEMMAP_INDEXED_IO) ? (0x00010001 | CONFIG_EC_GOOGLE_CHROMEEC_MEMMAP_INDEXED_IO_PORT) : 0x00fc0901"

	register "usb2_ports[0]" = "USB2_PORT_EMPTY"	# Disable USB2.0 Port 0
	register "usb2_ports[1]" = "USB2_PORT_EMPTY"	# Disable USB2.0 Port 1
	register "usb2_ports[2]" = "USB2_PORT_EMPTY"	# Disable USB2.0 Port 2
	register "usb2_ports[3]" = "USB2_PORT_EMPTY"	# Disable USB2.0 Port 3
	register "usb2_ports[4]" = "USB2_PORT_EMPTY"	# Disable USB2.0 Port 4
	register "usb2_ports[5]" = "USB2_PORT_EMPTY"	# Disable USB2.0 Port 5
	register "usb2_ports[6]" = "USB2_PORT_EMPTY"	# Disable USB2.0 Port 6
	register "usb2_ports[7]" = "USB2_PORT_EMPTY"	# Disable USB2.0 Port 7
	register "usb2_ports[8]" = "USB2_PORT_EMPTY"	# Disable USB2.0 Port 8
	# USB 2.0 Port #10 must be used for integrated BT with Intel CNVi
	register "usb2_ports[9]" = "USB2_PORT_MID(OC_SKIP)"	# Bluetooth port for CNVi WLAN
	register "usb2_ports[10]" = "USB2_PORT_EMPTY"	# Disable USB2.0 Port 10
	register "usb2_ports[11]" = "USB2_PORT_EMPTY"	# Disable USB2.0 Port 11
	register "usb2_ports[12]" = "USB2_PORT_EMPTY"	# Disable USB2.0 Port 12
	register "usb2_ports[13]" = "USB2_PORT_EMPTY"	# Disable USB2.0 Port 13
	register "usb2_ports[14]" = "USB2_PORT_EMPTY"	# Disable USB2.0 Port 14
	register "usb2_ports[15]" = "USB2_PORT_EMPTY"	# Disable USB2.0 Port 15

	register "usb3_ports[0]" = "USB3_PORT_EMPTY"	# Disable USB3.0 Port 0
	register "usb3_ports[1]" = "USB3_PORT_EMPTY"	# Disable USB3.0 Port 2
	register "usb3_ports[2]" = "USB3_PORT_EMPTY"	# Disable USB3.0 Port 3
	register "usb3_ports[3]" = "USB3_PORT_EMPTY"	# Disable USB3.0 Port 4
	register "usb3_ports[4]" = "USB3_PORT_EMPTY"	# Disable USB3.0 Port 5
	register "usb3_ports[5]" = "USB3_PORT_EMPTY"	# Disable USB3.0 Port 6
	register "usb3_ports[6]" = "USB3_PORT_EMPTY"	# Disable USB3.0 Port 7
	register "usb3_ports[7]" = "USB3_PORT_EMPTY"	# Disable USB3.0 Port 8
	register "usb3_ports[8]" = "USB3_PORT_EMPTY"	# Disable USB3.0 Port 9
	register "usb3_ports[9]" = "USB3_PORT_EMPTY"	# Disable USB3.0 Port 10

	register "tcss_ports[0]" = "TCSS_PORT_EMPTY"	# Disable USB-C Port 0
	register "tcss_ports[1]" = "TCSS_PORT_EMPTY"	# Disable USB-C Port 1
	register "tcss_ports[2]" = "TCSS_PORT_EMPTY"	# Disable USB-C Port 2
	register "tcss_ports[3]" = "TCSS_PORT_EMPTY"	# Disable USB-C Port 3

	# HD Audio
	register "pch_hda_sdi_enable[0]" = "true"
	register "pch_hda_sdi_enable[1]" = "true"

	# Vccin Aux Imon Iccmax, follow RDC#646929 Power Map requirement
	register "vccin_aux_imon_iccmax" = "PD_TIER_VOLUME" # 27A

	device domain 0 on
		# The timing values can be derived from datasheet of display panel
		# You can use EDID string to identify the type of display on the board
		# use below command to get display info from EDID
		# strings /sys/devices/pci0000:00/0000:00:02.0/drm/card0/card0-eDP-1/edid

		# refer to display PRM document (Volume 2b: Command Reference: Registers)
		# for more info on display control registers
		# https://01.org/linuxgraphics/documentation/hardware-specification-prms
		#+-----------------------------+---------------------------------------+-----+
		#| Intel docs                  | devicetree.cb                         | eDP |
		#+-----------------------------+---------------------------------------+-----+
		#| Power up delay              | `gpu_panel_power_up_delay`            | T3  |
		#+-----------------------------+---------------------------------------+-----+
		#| Power on to backlight on    | `gpu_panel_power_backlight_on_delay`  | T7  |
		#+-----------------------------+---------------------------------------+-----+
		#| Power Down delay            | `gpu_panel_power_down_delay`          | T10 |
		#+-----------------------------+---------------------------------------+-----+
		#| Backlight off to power down | `gpu_panel_power_backlight_off_delay` | T9  |
		#+-----------------------------+---------------------------------------+-----+
		#| Power Cycle Delay           | `gpu_panel_power_cycle_delay`         | T12 |
		#+-----------------------------+---------------------------------------+-----+
		device ref igpu on
			register "panel_cfg" = "{
			    .up_delay_ms = 200,
			    .down_delay_ms = 50,
			    .cycle_delay_ms = 500,
			    .backlight_on_delay_ms = 1,
			    .backlight_off_delay_ms = 200,
			    .backlight_pwm_hz = 200,
			}"
		end
		device ref dtt on end
		device ref tcss_xhci on end
		device ref ish on
			chip drivers/intel/ish
				register "firmware_name" = ""trulo_ish.bin""
				register "add_acpi_dma_property" = "true"
				device generic 0 on end
			end
		end
		device ref xhci on end
		device ref shared_sram on end
		device ref heci1 on end
		device ref uart0 on end
		device ref pch_espi on
			chip ec/google/chromeec
				device pnp 0c09.0 on end
			end
		end
	end
end