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dEQP-VK.spirv_assembly.instruction.compute.compute_shader_derivatives.task.quad_op.broadcast.vec4_float32.linear.16_1_1.ndx_0
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dEQP-VK.spirv_assembly.instruction.compute.compute_shader_derivatives.task.verify_ndx.quads.32_4_1
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp16.input_args.add_sub_reassociable_testedWithout_NotInf_OR_AllowReassoc_arg1_max_arg2_huge_res_inf_deco
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp16.input_args.add_sub_reassociable_testedWithout_NotInf_OR_AllowReassoc_arg1_max_arg2_huge_res_inf_exec
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp16.input_args.max_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_zero_deco
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dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp16.input_args.min_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_minusZero_deco
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp16.input_args.min_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_minusZero_exec
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp16.input_args.modf_st_fr_testedWithout_NSZ_arg1_minusOne_arg2_unused_res_minusZero_deco
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp16.input_args.modf_st_fr_testedWithout_NSZ_arg1_minusOne_arg2_unused_res_minusZero_exec
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp16.input_args.nmax_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_zero_deco
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dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp16.input_args.nmin_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_minusZero_exec
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp32.input_args.add_sub_reassociable_testedWithout_NotInf_OR_AllowReassoc_arg1_max_arg2_huge_res_inf_deco
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp32.input_args.add_sub_reassociable_testedWithout_NotInf_OR_AllowReassoc_arg1_max_arg2_huge_res_inf_exec
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp32.input_args.max_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_zero_deco
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp32.input_args.max_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_zero_exec
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp32.input_args.min_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_minusZero_deco
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp32.input_args.min_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_minusZero_exec
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp32.input_args.modf_st_fr_testedWithout_NSZ_arg1_minusOne_arg2_unused_res_minusZero_deco
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp32.input_args.modf_st_fr_testedWithout_NSZ_arg1_minusOne_arg2_unused_res_minusZero_exec
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dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp32.input_args.nmax_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_zero_exec
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp32.input_args.nmin_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_minusZero_deco
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp32.input_args.nmin_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_minusZero_exec
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp64.input_args.add_sub_reassociable_testedWithout_NotInf_OR_AllowReassoc_arg1_max_arg2_huge_res_inf_deco
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp64.input_args.add_sub_reassociable_testedWithout_NotInf_OR_AllowReassoc_arg1_max_arg2_huge_res_inf_exec
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp64.input_args.max_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_zero_deco
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp64.input_args.max_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_zero_exec
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp64.input_args.min_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_minusZero_deco
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp64.input_args.min_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_minusZero_exec
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp64.input_args.modf_st_fr_testedWithout_NSZ_arg1_minusOne_arg2_unused_res_minusZero_deco
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp64.input_args.modf_st_fr_testedWithout_NSZ_arg1_minusOne_arg2_unused_res_minusZero_exec
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp64.input_args.nmax_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_zero_deco
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp64.input_args.nmax_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_zero_exec
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp64.input_args.nmin_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_minusZero_deco
dEQP-VK.spirv_assembly.instruction.compute.float_controls2.fp64.input_args.nmin_testedWithout_NSZ_arg1_zero_arg2_minusZero_res_minusZero_exec
dEQP-VK.spirv_assembly.instruction.compute.opquantize_vec4.exact
dEQP-VK.spirv_assembly.instruction.compute.opquantize_vec4.flush_to_zero
dEQP-VK.spirv_assembly.instruction.compute.opquantize_vec4.infinities
dEQP-VK.spirv_assembly.instruction.compute.opquantize_vec4.propagated_nans
dEQP-VK.spirv_assembly.instruction.compute.opquantize_vec4.rounded
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dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_int16_stride_per_element
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dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_int32_no_stride_no_bounds
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dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_int32_stride_no_bounds
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dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_int32_stride_per_element
dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_int32_stride_per_element_load_non_writable
dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_int64_no_stride_no_bounds
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dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_int8_no_stride_no_bounds
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dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_int8_no_stride_per_component
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dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_int8_stride_no_bounds
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dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_int8_stride_per_component
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dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_v2int16_align_2_no_stride_no_bounds
dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_v2int16_align_2_no_stride_no_bounds_load_non_writable
dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_v2int16_align_2_no_stride_per_component
dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_v2int16_align_2_no_stride_per_component_load_non_writable
dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_v2int16_align_2_stride_no_bounds
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dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_v4int16_no_stride_no_bounds
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dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_v4int32_align_4_no_stride_no_bounds
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dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_v4int32_align_8_no_stride_no_bounds
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dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_v4int32_align_8_no_stride_per_component
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dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_v4int32_no_stride_no_bounds
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dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_v4int64_align_16_no_stride_no_bounds
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dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_descriptor_indexing_v4int8_align_2_no_stride_no_bounds
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dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_int16_no_stride_no_bounds
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dEQP-VK.spirv_assembly.instruction.compute.raw_access_chain.load_physical_buffers_v2int64_align_8_no_stride_no_bounds
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