xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
xxxxxxxxxxxx
111
{SY}{SS}{JP}{NAME}{G}{L}{R}{W}
x1xxxx
0000
0001
{SY}{SS}{JP}{NAME}{TYPE}
xxxxxx
xx0
Short sleep
Long sleep, around 20x longer than short
Short/Long Sleep
TODO: how is it different from a bunch of nops?
{SY}{SS}{JP}{NAME}{DURATION}
xxxxxx
xxx
0010
Seem to be Instruction Cache Invalidate, supported by the fact
that it considerably slows shader execution compared to
data cache instructions.
{SY}{SS}{JP}{NAME}
xxxxxxxxxx
0011
Data (Cache?) Clean
0100
Data (Cache?) Invalidate
0101
Data (Cache?) Flush
0110
_Presumably_ invalidates workgroup-wide cache for image/buffer data access.
So while "fence" is enough to synchronize data access inside a workgroup,
for cross-workgroup synchronization we have to invalidate that cache.
{SY}{SS}{JP}{NAME}
x1xxxx
1010
0101
Are met at the end of compute shader:
(sy)(jp)lock;
unlock;
end ;
{SY}{SS}{JP}{NAME}
1000010000
0111
{SY}{SS}{JP}{NAME}
1001010000
0111
{TYPE} == 0 && {TYPE_SIZE} == 0 /* f16 */
h({IMMED})
{TYPE} == 0 && {TYPE_SIZE} == 1 /* f32 */
({IMMED})
{TYPE_SIZE} == 0 /* b16 */
h(0x{IMMED})
(0x{IMMED})
{HALF}{CONST}
({TYPE_SIZE} == 0) /* b16 */
{HALF}{SRC}
({TYPE_SIZE} == 0) /* b16 */
The type (float or int) of sources. This seems to have no
functional effect and only changes how immediates are displayed.
Note that the blob uses i16/i32 when the scope is rt or the 2nd
mem, but this is not implemented here. Also note that the blob
uses b16/b32 for alias.tex when the type is 0, even though it
still prints immediates as floats in that case.
rt{RT}.{SWIZ}
For alias.tex (and possibly alias.mem):
Add an entry to the scope-specific "alias table", when instruction
from that scope tries to access a source register it would search
its alias table first.
This allows to reduce the amount of data passed around when reading
immediates/constants and reduce register pressure. In addition,
the alias table could be populated in the preamble further reducing
the amount of instructions being run.
Used like this:
alias.tex.b32.1 r40.x, (-1.456763);
alias.tex.b32.0 r40.y, (0.056702);
gather4g.s2en.mode6.base0 (f32)(xyzw)r0.x, r40.x, 1;
Or this:
alias.tex.b32.0 r2.y, c1.w;
isam.s2en.mode6.base0.1d (f32)(xyzw)r46.z, r2.y, 0;
(sy)stib.f32.2d.4.mode4.base0 r46.z, r2.y, 1;
Notice the lack of nops between alias and the instruction
that uses it.
In this case, the size of the table is bounded (max 16 entries)
and the number of entries in the table is indicated by
the first alias instruction in the TABLE_SIZE_MINUS_ONE field.
For alias.rt: create an entry into the alias table for a render
target. For example, this would map the 4th component of render
target 0 (FRAG_RESULT_DATA0) to the constant 0x0:
alias.rt.b32.0 rt0.w, (0x0)
alias.rt has to be executed in the preamble and can only map
const registers and immediates. Additionally, the register
SP_PS_ALIASED_COMPONENTS has to be set to a mask of render
target components that will be aliased.
In this case, the size of the table is only bounded by the
number of render targets/components and the TABLE_SIZE_MINUS_ONE
field is not used.
{SY}{SS}{JP}{NAME}.{SCOPE}.{TYPE}{TYPE_SIZE}.{TABLE_SIZE_MINUS_ONE} {DST_HALF}{DST}, {SRC}
{SRC_REG_TYPE} == 0
000000000000000000000000
{SRC_REG_TYPE} == 1
000000000000000000000
{SCOPE} == 1
000
xx
xx
1000
111
({SCOPE_HI} << 1) | {SCOPE_LO}
{TYPE_SIZE} == 0