Index of /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/


../
AsmParser/                                         24-Feb-2026 12:58                   -
Disassembler/                                      24-Feb-2026 12:58                   -
MCTargetDesc/                                      24-Feb-2026 12:58                   -
TargetInfo/                                        24-Feb-2026 12:58                   -
Utils/                                             24-Feb-2026 12:58                   -
CMakeLists.txt                                     24-Feb-2026 12:58                1459
LLVMBuild.txt                                      24-Feb-2026 12:58                1059
RISCV.h                                            24-Feb-2026 12:58                1752
RISCV.td                                           24-Feb-2026 12:58                5481
RISCVAsmPrinter.cpp                                24-Feb-2026 12:58                5520
RISCVCallLowering.cpp                              24-Feb-2026 12:58                1517
RISCVCallLowering.h                                24-Feb-2026 12:58                1398
RISCVCallingConv.td                                24-Feb-2026 12:58                2322
RISCVExpandPseudoInsts.cpp                         24-Feb-2026 12:58               25611
RISCVFrameLowering.cpp                             24-Feb-2026 12:58               18863
RISCVFrameLowering.h                               24-Feb-2026 12:58                2503
RISCVISelDAGToDAG.cpp                              24-Feb-2026 12:58                9493
RISCVISelLowering.cpp                              24-Feb-2026 12:58              113757
RISCVISelLowering.h                                24-Feb-2026 12:58                9867
RISCVInstrFormats.td                               24-Feb-2026 12:58               10038
RISCVInstrFormatsC.td                              24-Feb-2026 12:58                5099
RISCVInstrInfo.cpp                                 24-Feb-2026 12:58               26601
RISCVInstrInfo.h                                   24-Feb-2026 12:58                5680
RISCVInstrInfo.td                                  24-Feb-2026 12:58               44826
RISCVInstrInfoA.td                                 24-Feb-2026 12:58               17785
RISCVInstrInfoC.td                                 24-Feb-2026 12:58               34616
RISCVInstrInfoD.td                                 24-Feb-2026 12:58               14977
RISCVInstrInfoF.td                                 24-Feb-2026 12:58               17830
RISCVInstrInfoM.td                                 24-Feb-2026 12:58                4272
RISCVInstructionSelector.cpp                       24-Feb-2026 12:58                3222
RISCVLegalizerInfo.cpp                             24-Feb-2026 12:58                 870
RISCVLegalizerInfo.h                               24-Feb-2026 12:58                1000
RISCVMCInstLower.cpp                               24-Feb-2026 12:58                4407
RISCVMachineFunctionInfo.h                         24-Feb-2026 12:58                1883
RISCVMergeBaseOffset.cpp                           24-Feb-2026 12:58               11327
RISCVRegisterBankInfo.cpp                          24-Feb-2026 12:58                1068
RISCVRegisterBankInfo.h                            24-Feb-2026 12:58                1248
RISCVRegisterBanks.td                              24-Feb-2026 12:58                 537
RISCVRegisterInfo.cpp                              24-Feb-2026 12:58                6288
RISCVRegisterInfo.h                                24-Feb-2026 12:58                2129
RISCVRegisterInfo.td                               24-Feb-2026 12:58                9827
RISCVSchedRocket32.td                              24-Feb-2026 12:58                7800
RISCVSchedRocket64.td                              24-Feb-2026 12:58                8001
RISCVSchedule.td                                   24-Feb-2026 12:58                7051
RISCVSubtarget.cpp                                 24-Feb-2026 12:58                2675
RISCVSubtarget.h                                   24-Feb-2026 12:58                4402
RISCVSystemOperands.td                             24-Feb-2026 12:58               11412
RISCVTargetMachine.cpp                             24-Feb-2026 12:58                6202
RISCVTargetMachine.h                               24-Feb-2026 12:58                1855
RISCVTargetObjectFile.cpp                          24-Feb-2026 12:58                4206
RISCVTargetObjectFile.h                            24-Feb-2026 12:58                1720
RISCVTargetTransformInfo.cpp                       24-Feb-2026 12:58                2964
RISCVTargetTransformInfo.h                         24-Feb-2026 12:58                1956