/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* Target Register Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_REGINFO_ENUM #undef GET_REGINFO_ENUM namespace llvm { class MCRegisterClass; extern const MCRegisterClass AArch64MCRegisterClasses[]; namespace AArch64 { enum { NoRegister, FFR = 1, FP = 2, FPCR = 3, LR = 4, NZCV = 5, SP = 6, VG = 7, WSP = 8, WZR = 9, XZR = 10, ZA = 11, B0 = 12, B1 = 13, B2 = 14, B3 = 15, B4 = 16, B5 = 17, B6 = 18, B7 = 19, B8 = 20, B9 = 21, B10 = 22, B11 = 23, B12 = 24, B13 = 25, B14 = 26, B15 = 27, B16 = 28, B17 = 29, B18 = 30, B19 = 31, B20 = 32, B21 = 33, B22 = 34, B23 = 35, B24 = 36, B25 = 37, B26 = 38, B27 = 39, B28 = 40, B29 = 41, B30 = 42, B31 = 43, D0 = 44, D1 = 45, D2 = 46, D3 = 47, D4 = 48, D5 = 49, D6 = 50, D7 = 51, D8 = 52, D9 = 53, D10 = 54, D11 = 55, D12 = 56, D13 = 57, D14 = 58, D15 = 59, D16 = 60, D17 = 61, D18 = 62, D19 = 63, D20 = 64, D21 = 65, D22 = 66, D23 = 67, D24 = 68, D25 = 69, D26 = 70, D27 = 71, D28 = 72, D29 = 73, D30 = 74, D31 = 75, H0 = 76, H1 = 77, H2 = 78, H3 = 79, H4 = 80, H5 = 81, H6 = 82, H7 = 83, H8 = 84, H9 = 85, H10 = 86, H11 = 87, H12 = 88, H13 = 89, H14 = 90, H15 = 91, H16 = 92, H17 = 93, H18 = 94, H19 = 95, H20 = 96, H21 = 97, H22 = 98, H23 = 99, H24 = 100, H25 = 101, H26 = 102, H27 = 103, H28 = 104, H29 = 105, H30 = 106, H31 = 107, P0 = 108, P1 = 109, P2 = 110, P3 = 111, P4 = 112, P5 = 113, P6 = 114, P7 = 115, P8 = 116, P9 = 117, P10 = 118, P11 = 119, P12 = 120, P13 = 121, P14 = 122, P15 = 123, Q0 = 124, Q1 = 125, Q2 = 126, Q3 = 127, Q4 = 128, Q5 = 129, Q6 = 130, Q7 = 131, Q8 = 132, Q9 = 133, Q10 = 134, Q11 = 135, Q12 = 136, Q13 = 137, Q14 = 138, Q15 = 139, Q16 = 140, Q17 = 141, Q18 = 142, Q19 = 143, Q20 = 144, Q21 = 145, Q22 = 146, Q23 = 147, Q24 = 148, Q25 = 149, Q26 = 150, Q27 = 151, Q28 = 152, Q29 = 153, Q30 = 154, Q31 = 155, S0 = 156, S1 = 157, S2 = 158, S3 = 159, S4 = 160, S5 = 161, S6 = 162, S7 = 163, S8 = 164, S9 = 165, S10 = 166, S11 = 167, S12 = 168, S13 = 169, S14 = 170, S15 = 171, S16 = 172, S17 = 173, S18 = 174, S19 = 175, S20 = 176, S21 = 177, S22 = 178, S23 = 179, S24 = 180, S25 = 181, S26 = 182, S27 = 183, S28 = 184, S29 = 185, S30 = 186, S31 = 187, W0 = 188, W1 = 189, W2 = 190, W3 = 191, W4 = 192, W5 = 193, W6 = 194, W7 = 195, W8 = 196, W9 = 197, W10 = 198, W11 = 199, W12 = 200, W13 = 201, W14 = 202, W15 = 203, W16 = 204, W17 = 205, W18 = 206, W19 = 207, W20 = 208, W21 = 209, W22 = 210, W23 = 211, W24 = 212, W25 = 213, W26 = 214, W27 = 215, W28 = 216, W29 = 217, W30 = 218, X0 = 219, X1 = 220, X2 = 221, X3 = 222, X4 = 223, X5 = 224, X6 = 225, X7 = 226, X8 = 227, X9 = 228, X10 = 229, X11 = 230, X12 = 231, X13 = 232, X14 = 233, X15 = 234, X16 = 235, X17 = 236, X18 = 237, X19 = 238, X20 = 239, X21 = 240, X22 = 241, X23 = 242, X24 = 243, X25 = 244, X26 = 245, X27 = 246, X28 = 247, Z0 = 248, Z1 = 249, Z2 = 250, Z3 = 251, Z4 = 252, Z5 = 253, Z6 = 254, Z7 = 255, Z8 = 256, Z9 = 257, Z10 = 258, Z11 = 259, Z12 = 260, Z13 = 261, Z14 = 262, Z15 = 263, Z16 = 264, Z17 = 265, Z18 = 266, Z19 = 267, Z20 = 268, Z21 = 269, Z22 = 270, Z23 = 271, Z24 = 272, Z25 = 273, Z26 = 274, Z27 = 275, Z28 = 276, Z29 = 277, Z30 = 278, Z31 = 279, ZAB0 = 280, ZAD0 = 281, ZAD1 = 282, ZAD2 = 283, ZAD3 = 284, ZAD4 = 285, ZAD5 = 286, ZAD6 = 287, ZAD7 = 288, ZAH0 = 289, ZAH1 = 290, ZAQ0 = 291, ZAQ1 = 292, ZAQ2 = 293, ZAQ3 = 294, ZAQ4 = 295, ZAQ5 = 296, ZAQ6 = 297, ZAQ7 = 298, ZAQ8 = 299, ZAQ9 = 300, ZAQ10 = 301, ZAQ11 = 302, ZAQ12 = 303, ZAQ13 = 304, ZAQ14 = 305, ZAQ15 = 306, ZAS0 = 307, ZAS1 = 308, ZAS2 = 309, ZAS3 = 310, ZT0 = 311, Z0_HI = 312, Z1_HI = 313, Z2_HI = 314, Z3_HI = 315, Z4_HI = 316, Z5_HI = 317, Z6_HI = 318, Z7_HI = 319, Z8_HI = 320, Z9_HI = 321, Z10_HI = 322, Z11_HI = 323, Z12_HI = 324, Z13_HI = 325, Z14_HI = 326, Z15_HI = 327, Z16_HI = 328, Z17_HI = 329, Z18_HI = 330, Z19_HI = 331, Z20_HI = 332, Z21_HI = 333, Z22_HI = 334, Z23_HI = 335, Z24_HI = 336, Z25_HI = 337, Z26_HI = 338, Z27_HI = 339, Z28_HI = 340, Z29_HI = 341, Z30_HI = 342, Z31_HI = 343, D0_D1 = 344, D1_D2 = 345, D2_D3 = 346, D3_D4 = 347, D4_D5 = 348, D5_D6 = 349, D6_D7 = 350, D7_D8 = 351, D8_D9 = 352, D9_D10 = 353, D10_D11 = 354, D11_D12 = 355, D12_D13 = 356, D13_D14 = 357, D14_D15 = 358, D15_D16 = 359, D16_D17 = 360, D17_D18 = 361, D18_D19 = 362, D19_D20 = 363, D20_D21 = 364, D21_D22 = 365, D22_D23 = 366, D23_D24 = 367, D24_D25 = 368, D25_D26 = 369, D26_D27 = 370, D27_D28 = 371, D28_D29 = 372, D29_D30 = 373, D30_D31 = 374, D31_D0 = 375, D0_D1_D2_D3 = 376, D1_D2_D3_D4 = 377, D2_D3_D4_D5 = 378, D3_D4_D5_D6 = 379, D4_D5_D6_D7 = 380, D5_D6_D7_D8 = 381, D6_D7_D8_D9 = 382, D7_D8_D9_D10 = 383, D8_D9_D10_D11 = 384, D9_D10_D11_D12 = 385, D10_D11_D12_D13 = 386, D11_D12_D13_D14 = 387, D12_D13_D14_D15 = 388, D13_D14_D15_D16 = 389, D14_D15_D16_D17 = 390, D15_D16_D17_D18 = 391, D16_D17_D18_D19 = 392, D17_D18_D19_D20 = 393, D18_D19_D20_D21 = 394, D19_D20_D21_D22 = 395, D20_D21_D22_D23 = 396, D21_D22_D23_D24 = 397, D22_D23_D24_D25 = 398, D23_D24_D25_D26 = 399, D24_D25_D26_D27 = 400, D25_D26_D27_D28 = 401, D26_D27_D28_D29 = 402, D27_D28_D29_D30 = 403, D28_D29_D30_D31 = 404, D29_D30_D31_D0 = 405, D30_D31_D0_D1 = 406, D31_D0_D1_D2 = 407, D0_D1_D2 = 408, D1_D2_D3 = 409, D2_D3_D4 = 410, D3_D4_D5 = 411, D4_D5_D6 = 412, D5_D6_D7 = 413, D6_D7_D8 = 414, D7_D8_D9 = 415, D8_D9_D10 = 416, D9_D10_D11 = 417, D10_D11_D12 = 418, D11_D12_D13 = 419, D12_D13_D14 = 420, D13_D14_D15 = 421, D14_D15_D16 = 422, D15_D16_D17 = 423, D16_D17_D18 = 424, D17_D18_D19 = 425, D18_D19_D20 = 426, D19_D20_D21 = 427, D20_D21_D22 = 428, D21_D22_D23 = 429, D22_D23_D24 = 430, D23_D24_D25 = 431, D24_D25_D26 = 432, D25_D26_D27 = 433, D26_D27_D28 = 434, D27_D28_D29 = 435, D28_D29_D30 = 436, D29_D30_D31 = 437, D30_D31_D0 = 438, D31_D0_D1 = 439, P0_P1 = 440, P1_P2 = 441, P2_P3 = 442, P3_P4 = 443, P4_P5 = 444, P5_P6 = 445, P6_P7 = 446, P7_P8 = 447, P8_P9 = 448, P9_P10 = 449, P10_P11 = 450, P11_P12 = 451, P12_P13 = 452, P13_P14 = 453, P14_P15 = 454, P15_P0 = 455, Q0_Q1 = 456, Q1_Q2 = 457, Q2_Q3 = 458, Q3_Q4 = 459, Q4_Q5 = 460, Q5_Q6 = 461, Q6_Q7 = 462, Q7_Q8 = 463, Q8_Q9 = 464, Q9_Q10 = 465, Q10_Q11 = 466, Q11_Q12 = 467, Q12_Q13 = 468, Q13_Q14 = 469, Q14_Q15 = 470, Q15_Q16 = 471, Q16_Q17 = 472, Q17_Q18 = 473, Q18_Q19 = 474, Q19_Q20 = 475, Q20_Q21 = 476, Q21_Q22 = 477, Q22_Q23 = 478, Q23_Q24 = 479, Q24_Q25 = 480, Q25_Q26 = 481, Q26_Q27 = 482, Q27_Q28 = 483, Q28_Q29 = 484, Q29_Q30 = 485, Q30_Q31 = 486, Q31_Q0 = 487, Q0_Q1_Q2_Q3 = 488, Q1_Q2_Q3_Q4 = 489, Q2_Q3_Q4_Q5 = 490, Q3_Q4_Q5_Q6 = 491, Q4_Q5_Q6_Q7 = 492, Q5_Q6_Q7_Q8 = 493, Q6_Q7_Q8_Q9 = 494, Q7_Q8_Q9_Q10 = 495, Q8_Q9_Q10_Q11 = 496, Q9_Q10_Q11_Q12 = 497, Q10_Q11_Q12_Q13 = 498, Q11_Q12_Q13_Q14 = 499, Q12_Q13_Q14_Q15 = 500, Q13_Q14_Q15_Q16 = 501, Q14_Q15_Q16_Q17 = 502, Q15_Q16_Q17_Q18 = 503, Q16_Q17_Q18_Q19 = 504, Q17_Q18_Q19_Q20 = 505, Q18_Q19_Q20_Q21 = 506, Q19_Q20_Q21_Q22 = 507, Q20_Q21_Q22_Q23 = 508, Q21_Q22_Q23_Q24 = 509, Q22_Q23_Q24_Q25 = 510, Q23_Q24_Q25_Q26 = 511, Q24_Q25_Q26_Q27 = 512, Q25_Q26_Q27_Q28 = 513, Q26_Q27_Q28_Q29 = 514, Q27_Q28_Q29_Q30 = 515, Q28_Q29_Q30_Q31 = 516, Q29_Q30_Q31_Q0 = 517, Q30_Q31_Q0_Q1 = 518, Q31_Q0_Q1_Q2 = 519, Q0_Q1_Q2 = 520, Q1_Q2_Q3 = 521, Q2_Q3_Q4 = 522, Q3_Q4_Q5 = 523, Q4_Q5_Q6 = 524, Q5_Q6_Q7 = 525, Q6_Q7_Q8 = 526, Q7_Q8_Q9 = 527, Q8_Q9_Q10 = 528, Q9_Q10_Q11 = 529, Q10_Q11_Q12 = 530, Q11_Q12_Q13 = 531, Q12_Q13_Q14 = 532, Q13_Q14_Q15 = 533, Q14_Q15_Q16 = 534, Q15_Q16_Q17 = 535, Q16_Q17_Q18 = 536, Q17_Q18_Q19 = 537, Q18_Q19_Q20 = 538, Q19_Q20_Q21 = 539, Q20_Q21_Q22 = 540, Q21_Q22_Q23 = 541, Q22_Q23_Q24 = 542, Q23_Q24_Q25 = 543, Q24_Q25_Q26 = 544, Q25_Q26_Q27 = 545, Q26_Q27_Q28 = 546, Q27_Q28_Q29 = 547, Q28_Q29_Q30 = 548, Q29_Q30_Q31 = 549, Q30_Q31_Q0 = 550, Q31_Q0_Q1 = 551, X22_X23_X24_X25_X26_X27_X28_FP = 552, X0_X1_X2_X3_X4_X5_X6_X7 = 553, X2_X3_X4_X5_X6_X7_X8_X9 = 554, X4_X5_X6_X7_X8_X9_X10_X11 = 555, X6_X7_X8_X9_X10_X11_X12_X13 = 556, X8_X9_X10_X11_X12_X13_X14_X15 = 557, X10_X11_X12_X13_X14_X15_X16_X17 = 558, X12_X13_X14_X15_X16_X17_X18_X19 = 559, X14_X15_X16_X17_X18_X19_X20_X21 = 560, X16_X17_X18_X19_X20_X21_X22_X23 = 561, X18_X19_X20_X21_X22_X23_X24_X25 = 562, X20_X21_X22_X23_X24_X25_X26_X27 = 563, W30_WZR = 564, W0_W1 = 565, W2_W3 = 566, W4_W5 = 567, W6_W7 = 568, W8_W9 = 569, W10_W11 = 570, W12_W13 = 571, W14_W15 = 572, W16_W17 = 573, W18_W19 = 574, W20_W21 = 575, W22_W23 = 576, W24_W25 = 577, W26_W27 = 578, W28_W29 = 579, LR_XZR = 580, X28_FP = 581, X0_X1 = 582, X2_X3 = 583, X4_X5 = 584, X6_X7 = 585, X8_X9 = 586, X10_X11 = 587, X12_X13 = 588, X14_X15 = 589, X16_X17 = 590, X18_X19 = 591, X20_X21 = 592, X22_X23 = 593, X24_X25 = 594, X26_X27 = 595, Z0_Z1 = 596, Z1_Z2 = 597, Z2_Z3 = 598, Z3_Z4 = 599, Z4_Z5 = 600, Z5_Z6 = 601, Z6_Z7 = 602, Z7_Z8 = 603, Z8_Z9 = 604, Z9_Z10 = 605, Z10_Z11 = 606, Z11_Z12 = 607, Z12_Z13 = 608, Z13_Z14 = 609, Z14_Z15 = 610, Z15_Z16 = 611, Z16_Z17 = 612, Z17_Z18 = 613, Z18_Z19 = 614, Z19_Z20 = 615, Z20_Z21 = 616, Z21_Z22 = 617, Z22_Z23 = 618, Z23_Z24 = 619, Z24_Z25 = 620, Z25_Z26 = 621, Z26_Z27 = 622, Z27_Z28 = 623, Z28_Z29 = 624, Z29_Z30 = 625, Z30_Z31 = 626, Z31_Z0 = 627, Z0_Z1_Z2_Z3 = 628, Z1_Z2_Z3_Z4 = 629, Z2_Z3_Z4_Z5 = 630, Z3_Z4_Z5_Z6 = 631, Z4_Z5_Z6_Z7 = 632, Z5_Z6_Z7_Z8 = 633, Z6_Z7_Z8_Z9 = 634, Z7_Z8_Z9_Z10 = 635, Z8_Z9_Z10_Z11 = 636, Z9_Z10_Z11_Z12 = 637, Z10_Z11_Z12_Z13 = 638, Z11_Z12_Z13_Z14 = 639, Z12_Z13_Z14_Z15 = 640, Z13_Z14_Z15_Z16 = 641, Z14_Z15_Z16_Z17 = 642, Z15_Z16_Z17_Z18 = 643, Z16_Z17_Z18_Z19 = 644, Z17_Z18_Z19_Z20 = 645, Z18_Z19_Z20_Z21 = 646, Z19_Z20_Z21_Z22 = 647, Z20_Z21_Z22_Z23 = 648, Z21_Z22_Z23_Z24 = 649, Z22_Z23_Z24_Z25 = 650, Z23_Z24_Z25_Z26 = 651, Z24_Z25_Z26_Z27 = 652, Z25_Z26_Z27_Z28 = 653, Z26_Z27_Z28_Z29 = 654, Z27_Z28_Z29_Z30 = 655, Z28_Z29_Z30_Z31 = 656, Z29_Z30_Z31_Z0 = 657, Z30_Z31_Z0_Z1 = 658, Z31_Z0_Z1_Z2 = 659, Z0_Z1_Z2 = 660, Z1_Z2_Z3 = 661, Z2_Z3_Z4 = 662, Z3_Z4_Z5 = 663, Z4_Z5_Z6 = 664, Z5_Z6_Z7 = 665, Z6_Z7_Z8 = 666, Z7_Z8_Z9 = 667, Z8_Z9_Z10 = 668, Z9_Z10_Z11 = 669, Z10_Z11_Z12 = 670, Z11_Z12_Z13 = 671, Z12_Z13_Z14 = 672, Z13_Z14_Z15 = 673, Z14_Z15_Z16 = 674, Z15_Z16_Z17 = 675, Z16_Z17_Z18 = 676, Z17_Z18_Z19 = 677, Z18_Z19_Z20 = 678, Z19_Z20_Z21 = 679, Z20_Z21_Z22 = 680, Z21_Z22_Z23 = 681, Z22_Z23_Z24 = 682, Z23_Z24_Z25 = 683, Z24_Z25_Z26 = 684, Z25_Z26_Z27 = 685, Z26_Z27_Z28 = 686, Z27_Z28_Z29 = 687, Z28_Z29_Z30 = 688, Z29_Z30_Z31 = 689, Z30_Z31_Z0 = 690, Z31_Z0_Z1 = 691, Z16_Z24 = 692, Z17_Z25 = 693, Z18_Z26 = 694, Z19_Z27 = 695, Z20_Z28 = 696, Z21_Z29 = 697, Z22_Z30 = 698, Z23_Z31 = 699, Z0_Z8 = 700, Z1_Z9 = 701, Z2_Z10 = 702, Z3_Z11 = 703, Z4_Z12 = 704, Z5_Z13 = 705, Z6_Z14 = 706, Z7_Z15 = 707, Z16_Z20_Z24_Z28 = 708, Z17_Z21_Z25_Z29 = 709, Z18_Z22_Z26_Z30 = 710, Z19_Z23_Z27_Z31 = 711, Z0_Z4_Z8_Z12 = 712, Z1_Z5_Z9_Z13 = 713, Z2_Z6_Z10_Z14 = 714, Z3_Z7_Z11_Z15 = 715, NUM_TARGET_REGS // 716 }; } // end namespace AArch64 // Register classes namespace AArch64 { enum { FPR8RegClassID = 0, FPR16RegClassID = 1, FPR16_loRegClassID = 2, PPRRegClassID = 3, PPR_3bRegClassID = 4, PPR_p8to15RegClassID = 5, PPR2RegClassID = 6, PPR2Mul2RegClassID = 7, PPR2_with_psub0_in_PPR_3bRegClassID = 8, PPR2_with_psub0_in_PPR_p8to15RegClassID = 9, PPR2_with_psub1_in_PPR_3bRegClassID = 10, PPR2_with_psub1_in_PPR_p8to15RegClassID = 11, PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3bRegClassID = 12, PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15RegClassID = 13, PPR2Mul2_and_PPR2_with_psub0_in_PPR_3bRegClassID = 14, PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15RegClassID = 15, PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15RegClassID = 16, PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3bRegClassID = 17, GPR32allRegClassID = 18, FPR32RegClassID = 19, GPR32RegClassID = 20, GPR32spRegClassID = 21, GPR32commonRegClassID = 22, FPR32_with_hsub_in_FPR16_loRegClassID = 23, GPR32argRegClassID = 24, MatrixIndexGPR32_12_15RegClassID = 25, MatrixIndexGPR32_8_11RegClassID = 26, CCRRegClassID = 27, GPR32sponlyRegClassID = 28, WSeqPairsClassRegClassID = 29, WSeqPairsClass_with_subo32_in_GPR32commonRegClassID = 30, WSeqPairsClass_with_sube32_in_GPR32argRegClassID = 31, WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15RegClassID = 32, WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11RegClassID = 33, GPR64allRegClassID = 34, FPR64RegClassID = 35, GPR64RegClassID = 36, GPR64spRegClassID = 37, GPR64commonRegClassID = 38, GPR64noipRegClassID = 39, GPR64common_and_GPR64noipRegClassID = 40, tcGPR64RegClassID = 41, GPR64noip_and_tcGPR64RegClassID = 42, FPR64_loRegClassID = 43, GPR64argRegClassID = 44, FIXED_REGSRegClassID = 45, GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID = 46, GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 47, FIXED_REGS_with_sub_32RegClassID = 48, rtcGPR64RegClassID = 49, FIXED_REGS_and_GPR64RegClassID = 50, GPR64sponlyRegClassID = 51, DDRegClassID = 52, DD_with_dsub0_in_FPR64_loRegClassID = 53, DD_with_dsub1_in_FPR64_loRegClassID = 54, XSeqPairsClassRegClassID = 55, DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loRegClassID = 56, XSeqPairsClass_with_subo64_in_GPR64commonRegClassID = 57, XSeqPairsClass_with_subo64_in_GPR64noipRegClassID = 58, XSeqPairsClass_with_sube64_in_GPR64noipRegClassID = 59, XSeqPairsClass_with_sube64_in_tcGPR64RegClassID = 60, XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64RegClassID = 61, XSeqPairsClass_with_subo64_in_tcGPR64RegClassID = 62, XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64RegClassID = 63, XSeqPairsClass_with_sub_32_in_GPR32argRegClassID = 64, XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID = 65, XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 66, XSeqPairsClass_with_sube64_in_rtcGPR64RegClassID = 67, XSeqPairsClass_with_subo64_in_FIXED_REGSRegClassID = 68, FPR128RegClassID = 69, ZPRRegClassID = 70, FPR128_loRegClassID = 71, MPR128RegClassID = 72, ZPR_4bRegClassID = 73, ZPR_3bRegClassID = 74, DDDRegClassID = 75, DDD_with_dsub0_in_FPR64_loRegClassID = 76, DDD_with_dsub1_in_FPR64_loRegClassID = 77, DDD_with_dsub2_in_FPR64_loRegClassID = 78, DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loRegClassID = 79, DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClassID = 80, DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClassID = 81, DDDDRegClassID = 82, DDDD_with_dsub0_in_FPR64_loRegClassID = 83, DDDD_with_dsub1_in_FPR64_loRegClassID = 84, DDDD_with_dsub2_in_FPR64_loRegClassID = 85, DDDD_with_dsub3_in_FPR64_loRegClassID = 86, DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loRegClassID = 87, DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClassID = 88, DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID = 89, DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClassID = 90, DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID = 91, DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID = 92, QQRegClassID = 93, ZPR2RegClassID = 94, QQ_with_dsub_in_FPR64_loRegClassID = 95, QQ_with_qsub1_in_FPR128_loRegClassID = 96, ZPR2Mul2RegClassID = 97, ZPR2_with_dsub_in_FPR64_loRegClassID = 98, ZPR2_with_zsub1_in_ZPR_4bRegClassID = 99, QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_loRegClassID = 100, ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4bRegClassID = 101, ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID = 102, ZPR2_with_zsub0_in_ZPR_3bRegClassID = 103, ZPR2_with_zsub1_in_ZPR_3bRegClassID = 104, ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3bRegClassID = 105, ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID = 106, ZPR2StridedRegClassID = 107, MPR64RegClassID = 108, ZPR2Strided_with_dsub_in_FPR64_loRegClassID = 109, QQQRegClassID = 110, ZPR3RegClassID = 111, QQQ_with_dsub_in_FPR64_loRegClassID = 112, QQQ_with_qsub1_in_FPR128_loRegClassID = 113, QQQ_with_qsub2_in_FPR128_loRegClassID = 114, ZPR3_with_dsub_in_FPR64_loRegClassID = 115, ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID = 116, ZPR3_with_zsub1_in_ZPR_4bRegClassID = 117, ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID = 118, ZPR3_with_zsub2_in_ZPR_4bRegClassID = 119, QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_loRegClassID = 120, QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loRegClassID = 121, ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bRegClassID = 122, ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClassID = 123, QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_loRegClassID = 124, ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bRegClassID = 125, ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID = 126, ZPR3_with_zsub0_in_ZPR_3bRegClassID = 127, ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID = 128, ZPR3_with_zsub1_in_ZPR_3bRegClassID = 129, ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID = 130, ZPR3_with_zsub2_in_ZPR_3bRegClassID = 131, ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID = 132, ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3bRegClassID = 133, ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID = 134, ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3bRegClassID = 135, ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID = 136, ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3bRegClassID = 137, ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID = 138, ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID = 139, ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID = 140, ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID = 141, ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID = 142, ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID = 143, QQQQRegClassID = 144, ZPR4RegClassID = 145, QQQQ_with_dsub_in_FPR64_loRegClassID = 146, QQQQ_with_qsub1_in_FPR128_loRegClassID = 147, QQQQ_with_qsub2_in_FPR128_loRegClassID = 148, QQQQ_with_qsub3_in_FPR128_loRegClassID = 149, ZPR4_with_dsub_in_FPR64_loRegClassID = 150, ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID = 151, ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID = 152, ZPR4_with_zsub1_in_ZPR_4bRegClassID = 153, ZPR4_with_zsub2_in_ZPR_4bRegClassID = 154, ZPR4_with_zsub3_in_ZPR_4bRegClassID = 155, QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_loRegClassID = 156, QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClassID = 157, QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID = 158, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClassID = 159, ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClassID = 160, ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClassID = 161, QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClassID = 162, QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID = 163, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClassID = 164, ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClassID = 165, QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID = 166, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bRegClassID = 167, ZPR4Mul4RegClassID = 168, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID = 169, ZPR4_with_zsub0_in_ZPR_3bRegClassID = 170, ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID = 171, ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID = 172, ZPR4_with_zsub1_in_ZPR_3bRegClassID = 173, ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID = 174, ZPR4_with_zsub2_in_ZPR_3bRegClassID = 175, ZPR4_with_zsub3_in_ZPR_3bRegClassID = 176, ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID = 177, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID = 178, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bRegClassID = 179, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID = 180, ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bRegClassID = 181, ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID = 182, ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClassID = 183, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3bRegClassID = 184, ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID = 185, ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClassID = 186, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3bRegClassID = 187, ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_loRegClassID = 188, ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID = 189, ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID = 190, ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID = 191, ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID = 192, ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID = 193, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID = 194, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID = 195, ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID = 196, ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3bRegClassID = 197, ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID = 198, GPR64x8ClassRegClassID = 199, GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID = 200, GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID = 201, GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 202, GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 203, GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID = 204, GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 205, GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 206, GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID = 207, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 208, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 209, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 210, GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClassID = 211, GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID = 212, GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 213, GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 214, GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID = 215, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 216, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 217, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 218, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 219, GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID = 220, GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 221, GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 222, GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClassID = 223, GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 224, GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 225, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 226, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 227, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClassID = 228, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 229, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 230, ZPR4StridedRegClassID = 231, GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 232, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 233, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 234, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID = 235, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 236, GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClassID = 237, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 238, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 239, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 240, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClassID = 241, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 242, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 243, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID = 244, GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClassID = 245, GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64RegClassID = 246, GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64RegClassID = 247, GPR64x8Class_with_sub_32_in_GPR32argRegClassID = 248, MPR32RegClassID = 249, ZPR4Strided_with_dsub_in_FPR64_loRegClassID = 250, GPR64x8Class_with_x8sub_2_in_GPR64argRegClassID = 251, GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID = 252, GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 253, GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID = 254, GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 255, GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 256, GPR64x8Class_with_x8sub_4_in_GPR64argRegClassID = 257, GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 258, GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 259, GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 260, GPR64x8Class_with_x8sub_0_in_rtcGPR64RegClassID = 261, GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 262, GPR64x8Class_with_x8sub_2_in_rtcGPR64RegClassID = 263, GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID = 264, GPR64x8Class_with_x8sub_4_in_rtcGPR64RegClassID = 265, GPR64x8Class_with_x8sub_6_in_GPR64argRegClassID = 266, GPR64x8Class_with_x8sub_6_in_rtcGPR64RegClassID = 267, GPR64x8Class_with_x8sub_7_in_FIXED_REGSRegClassID = 268, ZTRRegClassID = 269, MPR16RegClassID = 270, MPRRegClassID = 271, MPR8RegClassID = 272, }; } // end namespace AArch64 // Register alternate name indices namespace AArch64 { enum { NoRegAltName, // 0 vlist1, // 1 vreg, // 2 NUM_TARGET_REG_ALT_NAMES = 3 }; } // end namespace AArch64 // Subregister indices namespace AArch64 { enum : uint16_t { NoSubRegister, bsub, // 1 dsub, // 2 dsub0, // 3 dsub1, // 4 dsub2, // 5 dsub3, // 6 hsub, // 7 psub0, // 8 psub1, // 9 qsub0, // 10 qsub1, // 11 qsub2, // 12 qsub3, // 13 ssub, // 14 sub_32, // 15 sube32, // 16 sube64, // 17 subo32, // 18 subo64, // 19 x8sub_0, // 20 x8sub_1, // 21 x8sub_2, // 22 x8sub_3, // 23 x8sub_4, // 24 x8sub_5, // 25 x8sub_6, // 26 x8sub_7, // 27 zasubb, // 28 zasubd0, // 29 zasubd1, // 30 zasubh0, // 31 zasubh1, // 32 zasubq0, // 33 zasubq1, // 34 zasubs0, // 35 zasubs1, // 36 zsub, // 37 zsub0, // 38 zsub1, // 39 zsub2, // 40 zsub3, // 41 zsub_hi, // 42 zasubd1_then_zasubq0, // 43 zasubd1_then_zasubq1, // 44 zasubs1_then_zasubd0, // 45 zasubs1_then_zasubd1, // 46 zasubs1_then_zasubq0, // 47 zasubs1_then_zasubq1, // 48 zasubs1_then_zasubd1_then_zasubq0, // 49 zasubs1_then_zasubd1_then_zasubq1, // 50 zasubh1_then_zasubd0, // 51 zasubh1_then_zasubd1, // 52 zasubh1_then_zasubq0, // 53 zasubh1_then_zasubq1, // 54 zasubh1_then_zasubs0, // 55 zasubh1_then_zasubs1, // 56 zasubh1_then_zasubd1_then_zasubq0, // 57 zasubh1_then_zasubd1_then_zasubq1, // 58 zasubh1_then_zasubs1_then_zasubd0, // 59 zasubh1_then_zasubs1_then_zasubd1, // 60 zasubh1_then_zasubs1_then_zasubq0, // 61 zasubh1_then_zasubs1_then_zasubq1, // 62 zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, // 63 zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, // 64 dsub1_then_bsub, // 65 dsub1_then_hsub, // 66 dsub1_then_ssub, // 67 dsub3_then_bsub, // 68 dsub3_then_hsub, // 69 dsub3_then_ssub, // 70 dsub2_then_bsub, // 71 dsub2_then_hsub, // 72 dsub2_then_ssub, // 73 qsub1_then_bsub, // 74 qsub1_then_dsub, // 75 qsub1_then_hsub, // 76 qsub1_then_ssub, // 77 qsub3_then_bsub, // 78 qsub3_then_dsub, // 79 qsub3_then_hsub, // 80 qsub3_then_ssub, // 81 qsub2_then_bsub, // 82 qsub2_then_dsub, // 83 qsub2_then_hsub, // 84 qsub2_then_ssub, // 85 x8sub_7_then_sub_32, // 86 x8sub_6_then_sub_32, // 87 x8sub_5_then_sub_32, // 88 x8sub_4_then_sub_32, // 89 x8sub_3_then_sub_32, // 90 x8sub_2_then_sub_32, // 91 x8sub_1_then_sub_32, // 92 subo64_then_sub_32, // 93 zsub1_then_bsub, // 94 zsub1_then_dsub, // 95 zsub1_then_hsub, // 96 zsub1_then_ssub, // 97 zsub1_then_zsub, // 98 zsub1_then_zsub_hi, // 99 zsub3_then_bsub, // 100 zsub3_then_dsub, // 101 zsub3_then_hsub, // 102 zsub3_then_ssub, // 103 zsub3_then_zsub, // 104 zsub3_then_zsub_hi, // 105 zsub2_then_bsub, // 106 zsub2_then_dsub, // 107 zsub2_then_hsub, // 108 zsub2_then_ssub, // 109 zsub2_then_zsub, // 110 zsub2_then_zsub_hi, // 111 dsub0_dsub1, // 112 dsub0_dsub1_dsub2, // 113 dsub1_dsub2, // 114 dsub1_dsub2_dsub3, // 115 dsub2_dsub3, // 116 dsub_qsub1_then_dsub, // 117 dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub, // 118 dsub_qsub1_then_dsub_qsub2_then_dsub, // 119 qsub0_qsub1, // 120 qsub0_qsub1_qsub2, // 121 qsub1_qsub2, // 122 qsub1_qsub2_qsub3, // 123 qsub2_qsub3, // 124 qsub1_then_dsub_qsub2_then_dsub, // 125 qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub, // 126 qsub2_then_dsub_qsub3_then_dsub, // 127 sub_32_x8sub_1_then_sub_32, // 128 x8sub_0_x8sub_1, // 129 x8sub_2_x8sub_3, // 130 x8sub_4_x8sub_5, // 131 x8sub_6_x8sub_7, // 132 x8sub_6_then_sub_32_x8sub_7_then_sub_32, // 133 x8sub_4_then_sub_32_x8sub_5_then_sub_32, // 134 x8sub_2_then_sub_32_x8sub_3_then_sub_32, // 135 sub_32_subo64_then_sub_32, // 136 dsub_zsub1_then_dsub, // 137 zsub_zsub1_then_zsub, // 138 dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub, // 139 dsub_zsub1_then_dsub_zsub2_then_dsub, // 140 zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub, // 141 zsub_zsub1_then_zsub_zsub2_then_zsub, // 142 zsub0_zsub1, // 143 zsub0_zsub1_zsub2, // 144 zsub1_zsub2, // 145 zsub1_zsub2_zsub3, // 146 zsub2_zsub3, // 147 zsub1_then_dsub_zsub2_then_dsub, // 148 zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub, // 149 zsub1_then_zsub_zsub2_then_zsub, // 150 zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub, // 151 zsub2_then_dsub_zsub3_then_dsub, // 152 zsub2_then_zsub_zsub3_then_zsub, // 153 zsub0_zsub2, // 154 zsub1_zsub3, // 155 NUM_TARGET_SUBREGS }; } // end namespace AArch64 // Register pressure sets enum. namespace AArch64 { enum RegisterPressureSets { ZTR = 0, PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15 = 1, PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b = 2, rtcGPR64 = 3, XSeqPairsClass_with_subo64_in_FIXED_REGS = 4, MatrixIndexGPR32_12_15 = 5, MatrixIndexGPR32_8_11 = 6, FIXED_REGS = 7, GPR64x8Class_with_x8sub_0_in_rtcGPR64 = 8, GPR64x8Class_with_x8sub_7_in_FIXED_REGS = 9, PPR_3b = 10, PPR_p8to15 = 11, FIXED_REGS_with_GPR64x8Class_with_x8sub_7_in_FIXED_REGS = 12, GPR64x8Class_with_x8sub_0_in_rtcGPR64_with_GPR64x8Class_with_x8sub_7_in_FIXED_REGS = 13, PPR = 14, GPR64x8Class_with_x8sub_6_in_rtcGPR64_with_GPR64x8Class_with_x8sub_0_in_rtcGPR64 = 15, GPR64x8Class_with_x8sub_6_in_rtcGPR64 = 16, FPR16_lo = 17, GPR64x8Class_with_x8sub_0_in_tcGPR64 = 18, ZPR_3b = 19, FPR16_lo_with_ZPR_3b = 20, DD_with_dsub1_in_FPR64_lo_with_ZPR_3b = 21, DDD_with_dsub2_in_FPR64_lo_with_ZPR_3b = 22, DDD_with_dsub2_in_FPR64_lo_with_ZPR4_with_zsub1_in_ZPR_3b = 23, DDDD_with_dsub3_in_FPR64_lo_with_ZPR_3b = 24, DDDD_with_dsub3_in_FPR64_lo_with_ZPR4_with_zsub1_in_ZPR_3b = 25, DDDD_with_dsub3_in_FPR64_lo_with_ZPR4_with_zsub2_in_ZPR_3b = 26, GPR64x8Class_with_x8sub_0_in_tcGPR64_with_GPR64x8Class_with_x8sub_7_in_FIXED_REGS = 27, FPR16_lo_with_ZPR4_with_zsub1_in_ZPR_3b = 28, FPR8 = 29, FPR16_lo_with_ZPR4_with_zsub2_in_ZPR_3b = 30, FPR16_lo_with_ZPR4_with_zsub3_in_ZPR_3b = 31, GPR32 = 32, ZPR4_with_zsub3_in_ZPR_4b = 33, ZPR_4b = 34, FPR8_with_ZPR_3b = 35, FPR8_with_ZPR4_with_zsub1_in_ZPR_3b = 36, FPR8_with_ZPR4_with_zsub2_in_ZPR_3b = 37, FPR8_with_ZPR4_with_zsub3_in_ZPR_3b = 38, ZPR4_with_zsub2_in_ZPR_4b = 39, FPR8_with_ZPR_4b = 40, FPR8_with_ZPR4_with_zsub1_in_ZPR_4b = 41, FPR8_with_ZPR4_with_zsub2_in_ZPR_4b = 42, FPR8_with_ZPR4_with_zsub3_in_ZPR_4b = 43, ZPR = 44, }; } // end namespace AArch64 } // end namespace llvm #endif // GET_REGINFO_ENUM /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* MC Register Information *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_REGINFO_MC_DESC #undef GET_REGINFO_MC_DESC namespace llvm { extern const MCPhysReg AArch64RegDiffLists[] = { /* 0 */ 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, /* 17 */ 63232, 1, 1, 1, 1, 1, 1, 1, 0, /* 26 */ 64502, 1, 1, 1, 1, 1, 1, 1, 0, /* 35 */ 1, 93, 1, 1, 1, 1, 1, 1, 0, /* 44 */ 64932, 1, 1, 1, 74, 1, 1, 1, 0, /* 53 */ 63076, 1, 1, 1, 0, /* 58 */ 63088, 1, 1, 1, 0, /* 63 */ 65072, 1, 1, 1, 0, /* 68 */ 65184, 1, 1, 1, 0, /* 73 */ 31, 335, 17, 65504, 1, 1, 1, 0, /* 81 */ 31, 336, 17, 65504, 1, 1, 1, 0, /* 89 */ 31, 337, 17, 65504, 1, 1, 1, 0, /* 97 */ 31, 338, 17, 65504, 1, 1, 1, 0, /* 105 */ 31, 339, 17, 65504, 1, 1, 1, 0, /* 113 */ 31, 340, 17, 65504, 1, 1, 1, 0, /* 121 */ 31, 341, 17, 65504, 1, 1, 1, 0, /* 129 */ 31, 342, 17, 65504, 1, 1, 1, 0, /* 137 */ 31, 343, 17, 65504, 1, 1, 1, 0, /* 145 */ 352, 65504, 1, 1, 1, 0, /* 151 */ 353, 65504, 1, 1, 1, 0, /* 157 */ 354, 65504, 1, 1, 1, 0, /* 163 */ 355, 65504, 1, 1, 1, 0, /* 169 */ 356, 65504, 1, 1, 1, 0, /* 175 */ 357, 65504, 1, 1, 1, 0, /* 181 */ 358, 65504, 1, 1, 1, 0, /* 187 */ 359, 65504, 1, 1, 1, 0, /* 193 */ 360, 65504, 1, 1, 1, 0, /* 199 */ 31, 334, 17, 65495, 9, 1, 1, 0, /* 207 */ 31, 335, 17, 65495, 9, 1, 1, 0, /* 215 */ 351, 65495, 9, 1, 1, 0, /* 221 */ 352, 65495, 9, 1, 1, 0, /* 227 */ 24, 29, 1, 1, 0, /* 232 */ 24, 29, 1, 1, 46, 29, 1, 1, 0, /* 241 */ 64900, 1, 1, 75, 1, 1, 0, /* 248 */ 65040, 1, 1, 0, /* 252 */ 65152, 1, 1, 0, /* 256 */ 31, 343, 17, 65505, 1, 1, 0, /* 263 */ 31, 344, 17, 65505, 1, 1, 0, /* 270 */ 360, 65505, 1, 1, 0, /* 275 */ 361, 65505, 1, 1, 0, /* 280 */ 31, 333, 17, 65494, 10, 1, 0, /* 287 */ 31, 334, 17, 65494, 10, 1, 0, /* 294 */ 350, 65494, 10, 1, 0, /* 299 */ 351, 65494, 10, 1, 0, /* 304 */ 24, 1, 29, 1, 0, /* 309 */ 24, 1, 29, 1, 46, 1, 29, 1, 0, /* 318 */ 24, 30, 1, 0, /* 322 */ 24, 30, 1, 46, 30, 1, 0, /* 329 */ 64964, 1, 76, 1, 0, /* 334 */ 65172, 112, 65456, 65472, 33, 112, 65456, 65472, 33, 112, 65456, 65472, 330, 1, 0, /* 349 */ 331, 1, 0, /* 352 */ 65172, 112, 65456, 65472, 33, 112, 65456, 65472, 1, 112, 65456, 65472, 362, 1, 0, /* 367 */ 63254, 1, 0, /* 370 */ 63266, 1, 0, /* 373 */ 63284, 1, 0, /* 376 */ 63296, 1, 0, /* 379 */ 64444, 1, 0, /* 382 */ 64478, 1, 0, /* 385 */ 65104, 1, 0, /* 388 */ 65152, 1, 0, /* 391 */ 65159, 1, 0, /* 394 */ 65160, 1, 0, /* 397 */ 65161, 1, 0, /* 400 */ 65162, 1, 0, /* 403 */ 65163, 1, 0, /* 406 */ 65164, 1, 0, /* 409 */ 65165, 1, 0, /* 412 */ 65166, 1, 0, /* 415 */ 65167, 1, 0, /* 418 */ 65168, 1, 0, /* 421 */ 65169, 1, 0, /* 424 */ 65170, 1, 0, /* 427 */ 65171, 1, 0, /* 430 */ 65172, 1, 0, /* 433 */ 65173, 1, 0, /* 436 */ 65204, 1, 0, /* 439 */ 65216, 1, 0, /* 442 */ 63, 65503, 34, 65503, 1, 80, 63, 65503, 34, 65503, 1, 108, 63, 65503, 34, 65503, 1, 0, /* 460 */ 64, 65504, 63, 65503, 1, 49, 64, 65504, 63, 65503, 1, 77, 64, 65504, 63, 65503, 1, 0, /* 478 */ 65503, 1, 144, 65503, 1, 172, 65503, 1, 0, /* 487 */ 31, 344, 17, 65506, 1, 0, /* 493 */ 31, 345, 17, 65506, 1, 0, /* 499 */ 361, 65506, 1, 0, /* 503 */ 362, 65506, 1, 0, /* 507 */ 2, 0, /* 509 */ 3, 4, 0, /* 512 */ 64848, 4, 4, 4, 65, 4, 4, 4, 0, /* 521 */ 64868, 4, 4, 4, 65, 4, 4, 4, 0, /* 530 */ 65092, 65412, 65456, 112, 65456, 65472, 300, 65476, 65412, 65456, 112, 65456, 65472, 300, 65476, 65412, 65456, 112, 65456, 65472, 300, 65476, 65412, 65456, 112, 65456, 65472, 300, 352, 4, 0, /* 561 */ 65072, 65412, 65456, 112, 65456, 65472, 300, 65476, 65412, 65456, 112, 65456, 65472, 300, 65476, 65412, 65456, 112, 65456, 65472, 300, 65476, 65412, 65456, 112, 65456, 65472, 300, 376, 4, 0, /* 592 */ 64379, 4, 0, /* 595 */ 7, 0, /* 597 */ 269, 9, 18, 65510, 10, 8, 65522, 10, 8, 6, 65510, 10, 8, 65522, 10, 8, 65521, 18, 65510, 10, 8, 65522, 10, 8, 6, 65510, 10, 8, 65522, 10, 8, 0, /* 629 */ 64, 80, 65424, 80, 124, 95, 1, 62, 65503, 34, 65503, 34, 65503, 1, 79, 1, 62, 65503, 34, 65503, 34, 65503, 1, 107, 1, 62, 65503, 34, 65503, 34, 65503, 1, 64, 8, 0, /* 664 */ 124, 207, 1, 62, 65503, 34, 65503, 34, 65503, 1, 107, 1, 62, 65503, 34, 65503, 34, 65503, 1, 64, 8, 0, /* 686 */ 65472, 347, 1, 62, 65503, 34, 65503, 34, 65503, 1, 64, 8, 0, /* 699 */ 64860, 8, 69, 8, 0, /* 704 */ 64884, 8, 69, 8, 0, /* 709 */ 64, 80, 65424, 80, 124, 95, 1, 62, 65503, 34, 65503, 34, 65503, 1, 79, 1, 62, 65503, 34, 65503, 34, 65503, 1, 107, 1, 62, 65503, 34, 65503, 34, 65503, 1, 72, 8, 0, /* 744 */ 124, 207, 1, 62, 65503, 34, 65503, 34, 65503, 1, 107, 1, 62, 65503, 34, 65503, 34, 65503, 1, 72, 8, 0, /* 766 */ 65472, 347, 1, 62, 65503, 34, 65503, 34, 65503, 1, 72, 8, 0, /* 779 */ 31, 332, 17, 65493, 11, 0, /* 785 */ 31, 333, 17, 65493, 11, 0, /* 791 */ 349, 65493, 11, 0, /* 795 */ 350, 65493, 11, 0, /* 799 */ 64, 80, 65424, 80, 124, 95, 1, 62, 65503, 34, 65503, 34, 65503, 1, 79, 1, 62, 65503, 34, 65503, 34, 65503, 1, 107, 1, 62, 65503, 34, 65503, 34, 65503, 1, 40, 12, 0, /* 834 */ 124, 207, 1, 62, 65503, 34, 65503, 34, 65503, 1, 107, 1, 62, 65503, 34, 65503, 34, 65503, 1, 40, 12, 0, /* 856 */ 65472, 347, 1, 62, 65503, 34, 65503, 34, 65503, 1, 40, 12, 0, /* 869 */ 64, 80, 65424, 80, 124, 96, 31, 33, 65504, 62, 65503, 34, 65503, 1, 49, 31, 33, 65504, 62, 65503, 34, 65503, 1, 77, 31, 33, 65504, 62, 65503, 34, 65503, 1, 41, 12, 0, /* 904 */ 124, 208, 31, 33, 65504, 62, 65503, 34, 65503, 1, 77, 31, 33, 65504, 62, 65503, 34, 65503, 1, 41, 12, 0, /* 926 */ 65472, 348, 31, 33, 65504, 62, 65503, 34, 65503, 1, 41, 12, 0, /* 939 */ 64, 80, 65424, 80, 124, 95, 1, 63, 1, 65503, 1, 62, 65503, 1, 49, 1, 63, 1, 65503, 1, 62, 65503, 1, 77, 1, 63, 1, 65503, 1, 62, 65503, 1, 42, 12, 0, /* 974 */ 124, 207, 1, 63, 1, 65503, 1, 62, 65503, 1, 77, 1, 63, 1, 65503, 1, 62, 65503, 1, 42, 12, 0, /* 996 */ 65472, 347, 1, 63, 1, 65503, 1, 62, 65503, 1, 42, 12, 0, /* 1009 */ 64, 80, 65424, 80, 124, 95, 1, 62, 1, 65503, 34, 65503, 1, 29, 50, 1, 62, 1, 65503, 34, 65503, 1, 29, 78, 1, 62, 1, 65503, 34, 65503, 1, 29, 43, 12, 0, /* 1044 */ 124, 207, 1, 62, 1, 65503, 34, 65503, 1, 29, 78, 1, 62, 1, 65503, 34, 65503, 1, 29, 43, 12, 0, /* 1066 */ 65472, 347, 1, 62, 1, 65503, 34, 65503, 1, 29, 43, 12, 0, /* 1079 */ 64, 80, 65424, 80, 124, 95, 1, 62, 65503, 34, 65503, 34, 65503, 1, 79, 1, 62, 65503, 34, 65503, 34, 65503, 1, 107, 1, 62, 65503, 34, 65503, 34, 65503, 1, 48, 12, 0, /* 1114 */ 124, 207, 1, 62, 65503, 34, 65503, 34, 65503, 1, 107, 1, 62, 65503, 34, 65503, 34, 65503, 1, 48, 12, 0, /* 1136 */ 65472, 347, 1, 62, 65503, 34, 65503, 34, 65503, 1, 48, 12, 0, /* 1149 */ 64, 80, 65424, 80, 124, 95, 1, 62, 65503, 34, 65503, 34, 65503, 1, 79, 1, 62, 65503, 34, 65503, 34, 65503, 1, 107, 1, 62, 65503, 34, 65503, 34, 65503, 1, 64, 12, 0, /* 1184 */ 124, 207, 1, 62, 65503, 34, 65503, 34, 65503, 1, 107, 1, 62, 65503, 34, 65503, 34, 65503, 1, 64, 12, 0, /* 1206 */ 65472, 347, 1, 62, 65503, 34, 65503, 34, 65503, 1, 64, 12, 0, /* 1219 */ 64, 80, 65424, 80, 124, 95, 1, 62, 65503, 34, 65503, 34, 65503, 1, 79, 1, 62, 65503, 34, 65503, 34, 65503, 1, 107, 1, 62, 65503, 34, 65503, 34, 65503, 1, 72, 12, 0, /* 1254 */ 124, 207, 1, 62, 65503, 34, 65503, 34, 65503, 1, 107, 1, 62, 65503, 34, 65503, 34, 65503, 1, 72, 12, 0, /* 1276 */ 65472, 347, 1, 62, 65503, 34, 65503, 34, 65503, 1, 72, 12, 0, /* 1289 */ 56, 15, 0, /* 1292 */ 332, 15, 0, /* 1295 */ 64, 80, 65424, 80, 124, 95, 1, 62, 65503, 34, 65503, 34, 65503, 1, 79, 1, 62, 65503, 34, 65503, 34, 65503, 1, 107, 1, 62, 65503, 34, 65503, 34, 65503, 1, 40, 16, 0, /* 1330 */ 124, 207, 1, 62, 65503, 34, 65503, 34, 65503, 1, 107, 1, 62, 65503, 34, 65503, 34, 65503, 1, 40, 16, 0, /* 1352 */ 65472, 347, 1, 62, 65503, 34, 65503, 34, 65503, 1, 40, 16, 0, /* 1365 */ 64, 80, 65424, 80, 124, 95, 1, 62, 65503, 34, 65503, 34, 65503, 1, 79, 1, 62, 65503, 34, 65503, 34, 65503, 1, 107, 1, 62, 65503, 34, 65503, 34, 65503, 1, 48, 16, 0, /* 1400 */ 124, 207, 1, 62, 65503, 34, 65503, 34, 65503, 1, 107, 1, 62, 65503, 34, 65503, 34, 65503, 1, 48, 16, 0, /* 1422 */ 65472, 347, 1, 62, 65503, 34, 65503, 34, 65503, 1, 48, 16, 0, /* 1435 */ 1, 554, 16, 0, /* 1439 */ 65322, 560, 16, 0, /* 1443 */ 24, 1, 1, 29, 0, /* 1448 */ 24, 1, 1, 29, 46, 1, 1, 29, 0, /* 1457 */ 24, 1, 30, 0, /* 1461 */ 24, 1, 30, 46, 1, 30, 0, /* 1468 */ 63, 1, 65503, 1, 30, 50, 63, 1, 65503, 1, 30, 78, 63, 1, 65503, 1, 30, 0, /* 1486 */ 24, 31, 0, /* 1489 */ 24, 31, 46, 31, 0, /* 1494 */ 65504, 31, 113, 65504, 31, 141, 65504, 31, 0, /* 1503 */ 65312, 77, 0, /* 1506 */ 1, 99, 0, /* 1509 */ 64379, 99, 0, /* 1512 */ 65188, 65412, 65456, 112, 65456, 65472, 300, 65473, 65412, 65456, 112, 65456, 65472, 300, 31, 112, 0, /* 1529 */ 65188, 65412, 65456, 112, 65456, 65472, 300, 65441, 65412, 65456, 112, 65456, 65472, 300, 63, 112, 0, /* 1546 */ 65124, 65412, 65456, 112, 65456, 65472, 300, 65473, 65412, 65456, 112, 65456, 65472, 300, 65473, 65412, 65456, 112, 65456, 65472, 300, 30, 112, 65488, 112, 76, 1, 65284, 112, 0, /* 1576 */ 65124, 65412, 65456, 112, 65456, 65472, 300, 65473, 65412, 65456, 112, 65456, 65472, 300, 65441, 65412, 65456, 112, 65456, 65472, 300, 62, 112, 65488, 112, 76, 1, 65284, 112, 0, /* 1606 */ 65124, 65412, 65456, 112, 65456, 65472, 300, 65441, 65412, 65456, 112, 65456, 65472, 300, 65473, 65412, 65456, 112, 65456, 65472, 300, 62, 112, 65488, 112, 76, 65505, 65284, 112, 0, /* 1636 */ 65156, 65412, 65456, 112, 65456, 65472, 300, 65473, 65412, 65456, 112, 65456, 65472, 300, 65441, 65412, 65456, 112, 65456, 65472, 300, 65473, 65412, 65456, 112, 65456, 65472, 300, 61, 112, 65456, 32, 80, 32, 76, 64, 65473, 64, 65441, 65315, 64, 48, 64, 65329, 112, 0, /* 1682 */ 65156, 65412, 65456, 112, 65456, 65472, 300, 65441, 65412, 65456, 112, 65456, 65472, 300, 65473, 65412, 65456, 112, 65456, 65472, 300, 65473, 65412, 65456, 112, 65456, 65472, 300, 61, 112, 65456, 32, 80, 32, 76, 64, 65441, 64, 65473, 65283, 64, 48, 64, 65361, 112, 0, /* 1728 */ 65156, 65412, 65456, 112, 65456, 65472, 300, 65473, 65412, 65456, 112, 65456, 65472, 300, 65473, 65412, 65456, 112, 65456, 65472, 300, 65473, 65412, 65456, 112, 65456, 65472, 300, 29, 112, 65456, 32, 80, 32, 76, 64, 65473, 64, 65473, 65283, 64, 48, 64, 65361, 112, 0, /* 1774 */ 65156, 65412, 65456, 112, 65456, 65472, 300, 65473, 65412, 65456, 112, 65456, 65472, 300, 65473, 65412, 65456, 112, 65456, 65472, 300, 65441, 65412, 65456, 112, 65456, 65472, 300, 61, 112, 65456, 32, 80, 32, 76, 64, 65473, 64, 65473, 65283, 64, 48, 64, 65361, 112, 0, /* 1820 */ 133, 0, /* 1822 */ 112, 140, 0, /* 1825 */ 214, 0, /* 1827 */ 215, 0, /* 1829 */ 65084, 65412, 65456, 112, 65456, 65472, 300, 65480, 65412, 65456, 112, 65456, 65472, 300, 0, /* 1844 */ 65108, 65412, 65456, 112, 65456, 65472, 300, 65480, 65412, 65456, 112, 65456, 65472, 300, 0, /* 1859 */ 65204, 65456, 112, 65456, 65472, 113, 65456, 112, 65456, 65472, 331, 0, /* 1871 */ 65202, 65505, 65322, 215, 362, 0, /* 1877 */ 65204, 65456, 112, 65456, 65472, 81, 65456, 112, 65456, 65472, 363, 0, /* 1889 */ 65186, 65505, 32, 65505, 363, 0, /* 1895 */ 65185, 65505, 32, 65505, 364, 0, /* 1901 */ 65184, 65505, 32, 65505, 365, 0, /* 1907 */ 65183, 65505, 32, 65505, 366, 0, /* 1913 */ 65182, 65505, 32, 65505, 367, 0, /* 1919 */ 65181, 65505, 32, 65505, 368, 0, /* 1925 */ 65180, 65505, 32, 65505, 369, 0, /* 1931 */ 65179, 65505, 32, 65505, 370, 0, /* 1937 */ 65178, 65505, 32, 65505, 371, 0, /* 1943 */ 65177, 65505, 32, 65505, 372, 0, /* 1949 */ 65176, 65505, 32, 65505, 373, 0, /* 1955 */ 65175, 65505, 32, 65505, 374, 0, /* 1961 */ 65174, 65505, 32, 65505, 375, 0, /* 1967 */ 65173, 65505, 32, 65505, 376, 0, /* 1973 */ 64960, 214, 65328, 65535, 555, 0, /* 1979 */ 570, 0, /* 1981 */ 576, 0, /* 1983 */ 63111, 0, /* 1985 */ 63123, 0, /* 1987 */ 63141, 0, /* 1989 */ 63153, 0, /* 1991 */ 63174, 0, /* 1993 */ 63186, 0, /* 1995 */ 63204, 0, /* 1997 */ 63216, 0, /* 1999 */ 65103, 0, /* 2001 */ 65518, 22, 65516, 65526, 65267, 0, /* 2007 */ 65526, 22, 65516, 65526, 65267, 0, /* 2013 */ 65518, 26, 65516, 65526, 65267, 0, /* 2019 */ 65526, 26, 65516, 65526, 65267, 0, /* 2025 */ 65518, 22, 65518, 65526, 65267, 0, /* 2031 */ 65526, 22, 65518, 65526, 65267, 0, /* 2037 */ 65518, 26, 65518, 65526, 65267, 0, /* 2043 */ 65526, 26, 65518, 65526, 65267, 0, /* 2049 */ 65518, 22, 65516, 65527, 65267, 0, /* 2055 */ 65526, 22, 65516, 65527, 65267, 0, /* 2061 */ 65518, 26, 65516, 65527, 65267, 0, /* 2067 */ 65526, 26, 65516, 65527, 65267, 0, /* 2073 */ 65518, 22, 65518, 65527, 65267, 0, /* 2079 */ 65526, 22, 65518, 65527, 65267, 0, /* 2085 */ 65518, 26, 65518, 65527, 65267, 0, /* 2091 */ 65526, 26, 65518, 65527, 65267, 0, /* 2097 */ 65325, 0, /* 2099 */ 65190, 65327, 0, /* 2102 */ 65389, 0, /* 2104 */ 65404, 0, /* 2106 */ 65420, 0, /* 2108 */ 65140, 65456, 112, 65456, 65472, 113, 65456, 112, 65456, 65472, 113, 65456, 112, 65456, 65472, 330, 64, 48, 1, 65424, 0, /* 2129 */ 65140, 65456, 112, 65456, 65472, 113, 65456, 112, 65456, 65472, 81, 65456, 112, 65456, 65472, 362, 64, 48, 1, 65424, 0, /* 2150 */ 65140, 65456, 112, 65456, 65472, 81, 65456, 112, 65456, 65472, 113, 65456, 112, 65456, 65472, 362, 64, 48, 65505, 65424, 0, /* 2171 */ 65436, 0, /* 2173 */ 65172, 65456, 112, 65456, 65472, 113, 65456, 112, 65456, 65472, 81, 65456, 112, 65456, 65472, 113, 65456, 112, 65456, 65472, 361, 32, 32, 48, 64, 65473, 64, 65441, 65455, 64, 65441, 0, /* 2205 */ 65204, 112, 65456, 65472, 33, 112, 65456, 65472, 1, 112, 65456, 65472, 33, 112, 65456, 65472, 361, 64, 65473, 64, 65441, 0, /* 2227 */ 65236, 112, 65456, 65472, 1, 112, 65456, 65472, 0, /* 2236 */ 65236, 112, 65456, 65472, 33, 112, 65456, 65472, 0, /* 2245 */ 65456, 112, 65456, 65472, 0, /* 2250 */ 65172, 65456, 112, 65456, 65472, 81, 65456, 112, 65456, 65472, 113, 65456, 112, 65456, 65472, 113, 65456, 112, 65456, 65472, 361, 32, 32, 48, 64, 65441, 64, 65473, 65423, 64, 65473, 0, /* 2282 */ 65172, 65456, 112, 65456, 65472, 113, 65456, 112, 65456, 65472, 113, 65456, 112, 65456, 65472, 113, 65456, 112, 65456, 65472, 329, 32, 32, 48, 64, 65473, 64, 65473, 65423, 64, 65473, 0, /* 2314 */ 65172, 65456, 112, 65456, 65472, 113, 65456, 112, 65456, 65472, 113, 65456, 112, 65456, 65472, 81, 65456, 112, 65456, 65472, 361, 32, 32, 48, 64, 65473, 64, 65473, 65423, 64, 65473, 0, /* 2346 */ 65204, 112, 65456, 65472, 1, 112, 65456, 65472, 33, 112, 65456, 65472, 33, 112, 65456, 65472, 361, 64, 65441, 64, 65473, 0, /* 2368 */ 65204, 112, 65456, 65472, 33, 112, 65456, 65472, 33, 112, 65456, 65472, 33, 112, 65456, 65472, 329, 64, 65473, 64, 65473, 0, /* 2390 */ 65204, 112, 65456, 65472, 33, 112, 65456, 65472, 33, 112, 65456, 65472, 1, 112, 65456, 65472, 361, 64, 65473, 64, 65473, 0, /* 2412 */ 65484, 0, /* 2414 */ 65172, 112, 65456, 65472, 1, 112, 65456, 65472, 33, 112, 65456, 65472, 362, 65505, 0, /* 2429 */ 31, 332, 2, 65507, 0, /* 2434 */ 65321, 577, 2, 65507, 0, /* 2439 */ 31, 345, 17, 65507, 0, /* 2444 */ 31, 346, 17, 65507, 0, /* 2449 */ 334, 65507, 0, /* 2452 */ 362, 65507, 0, /* 2455 */ 363, 65507, 0, /* 2458 */ 579, 65507, 0, /* 2461 */ 65516, 0, /* 2463 */ 65204, 65521, 0, /* 2466 */ 65525, 0, /* 2468 */ 65534, 0, /* 2470 */ 65212, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 360, 17, 1, 1, 1, 65519, 65535, 65535, 0, /* 2495 */ 65211, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 361, 17, 1, 1, 1, 65519, 65535, 65535, 0, /* 2520 */ 65210, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 362, 17, 1, 1, 1, 65519, 65535, 65535, 0, /* 2545 */ 65209, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 363, 17, 1, 1, 1, 65519, 65535, 65535, 0, /* 2570 */ 65208, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 364, 17, 1, 1, 1, 65519, 65535, 65535, 0, /* 2595 */ 65207, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 365, 17, 1, 1, 1, 65519, 65535, 65535, 0, /* 2620 */ 65206, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 366, 17, 1, 1, 1, 65519, 65535, 65535, 0, /* 2645 */ 65205, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 367, 17, 1, 1, 1, 65519, 65535, 65535, 0, /* 2670 */ 65204, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 368, 17, 1, 1, 1, 65519, 65535, 65535, 0, /* 2695 */ 65203, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 369, 17, 1, 1, 1, 65519, 65535, 65535, 0, /* 2720 */ 65202, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 370, 17, 1, 1, 1, 65519, 65535, 65535, 0, /* 2745 */ 65225, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 32, 65505, 65322, 215, 359, 17, 1, 1, 65522, 65534, 65535, 65535, 0, }; extern const LaneBitmask AArch64LaneMaskLists[] = { /* 0 */ LaneBitmask(0x0000000000000000), LaneBitmask::getAll(), /* 2 */ LaneBitmask(0x0000000000800000), LaneBitmask(0x0000000000000001), LaneBitmask::getAll(), /* 5 */ LaneBitmask(0x0000000000800000), LaneBitmask(0x0000000002000000), LaneBitmask(0x0000000001000000), LaneBitmask(0x0000000000000001), LaneBitmask::getAll(), /* 10 */ LaneBitmask(0x0000000000800000), LaneBitmask(0x0000000002000000), LaneBitmask(0x0000000000000001), LaneBitmask::getAll(), /* 14 */ LaneBitmask(0x0000000004000000), LaneBitmask(0x0000000000000001), LaneBitmask::getAll(), /* 17 */ LaneBitmask(0x0000000004000000), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000000000001), LaneBitmask::getAll(), /* 22 */ LaneBitmask(0x0000000004000000), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000000000001), LaneBitmask::getAll(), /* 26 */ LaneBitmask(0x0000000000000004), LaneBitmask(0x0000000000000002), LaneBitmask::getAll(), /* 29 */ LaneBitmask(0x0000000000000002), LaneBitmask(0x0000000000000004), LaneBitmask::getAll(), /* 32 */ LaneBitmask(0x0000001000000000), LaneBitmask(0x0000000000000008), LaneBitmask::getAll(), /* 35 */ LaneBitmask(0x0000000000000020), LaneBitmask(0x0000000000000010), LaneBitmask::getAll(), /* 38 */ LaneBitmask(0x0000000000000010), LaneBitmask(0x0000000000000020), LaneBitmask::getAll(), /* 41 */ LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask::getAll(), /* 44 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000000000100), LaneBitmask::getAll(), /* 47 */ LaneBitmask(0x0000002000000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000000000000100), LaneBitmask::getAll(), /* 52 */ LaneBitmask(0x0000002000000000), LaneBitmask(0x0000020000000000), LaneBitmask(0x0000008000000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000040000000000), LaneBitmask(0x0000010000000000), LaneBitmask(0x0000000000000100), LaneBitmask::getAll(), /* 61 */ LaneBitmask(0x0000002000000000), LaneBitmask(0x0000020000000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000040000000000), LaneBitmask(0x0000000000000100), LaneBitmask::getAll(), /* 68 */ LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000200), LaneBitmask(0x0000000000000400), LaneBitmask::getAll(), /* 73 */ LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000200), LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), LaneBitmask(0x0000000000001000), LaneBitmask(0x0000000000002000), LaneBitmask(0x0000000000004000), LaneBitmask::getAll(), /* 82 */ LaneBitmask(0x0000000000000040), LaneBitmask(0x0000000000000080), LaneBitmask(0x0000000000000200), LaneBitmask(0x0000000000000400), LaneBitmask(0x0000000000000800), LaneBitmask(0x0000000000001000), LaneBitmask(0x0000000000002000), LaneBitmask(0x0000000000004000), LaneBitmask(0x0000000000008000), LaneBitmask(0x0000000000010000), LaneBitmask(0x0000000000020000), LaneBitmask(0x0000000000040000), LaneBitmask(0x0000000000080000), LaneBitmask(0x0000000000100000), LaneBitmask(0x0000000000200000), LaneBitmask(0x0000000000400000), LaneBitmask::getAll(), /* 99 */ LaneBitmask(0x0000000002000000), LaneBitmask(0x0000000001000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000000800000), LaneBitmask::getAll(), /* 104 */ LaneBitmask(0x0000000002000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000000800000), LaneBitmask::getAll(), /* 108 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000000800000), LaneBitmask(0x0000000002000000), LaneBitmask(0x0000000001000000), LaneBitmask::getAll(), /* 113 */ LaneBitmask(0x0000000001000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000000800000), LaneBitmask(0x0000000002000000), LaneBitmask::getAll(), /* 118 */ LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000004000000), LaneBitmask::getAll(), /* 123 */ LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000004000000), LaneBitmask::getAll(), /* 127 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000004000000), LaneBitmask(0x0000000010000000), LaneBitmask(0x0000000008000000), LaneBitmask::getAll(), /* 132 */ LaneBitmask(0x0000000008000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000000004000000), LaneBitmask(0x0000000010000000), LaneBitmask::getAll(), /* 137 */ LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000400000000), LaneBitmask(0x0000000200000000), LaneBitmask(0x0000000100000000), LaneBitmask(0x0000000080000000), LaneBitmask(0x0000000040000000), LaneBitmask(0x0000000020000000), LaneBitmask::getAll(), /* 146 */ LaneBitmask(0x0000000020000000), LaneBitmask(0x0000000000000008), LaneBitmask(0x0000000800000000), LaneBitmask(0x0000000400000000), LaneBitmask(0x0000000200000000), LaneBitmask(0x0000000100000000), LaneBitmask(0x0000000080000000), LaneBitmask(0x0000000040000000), LaneBitmask::getAll(), /* 155 */ LaneBitmask(0x0000000000000008), LaneBitmask(0x0000001000000000), LaneBitmask::getAll(), /* 158 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000000000000100), LaneBitmask(0x0000004000000000), LaneBitmask::getAll(), /* 163 */ LaneBitmask(0x0000020000000000), LaneBitmask(0x0000008000000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000040000000000), LaneBitmask(0x0000010000000000), LaneBitmask(0x0000000000000100), LaneBitmask(0x0000004000000000), LaneBitmask::getAll(), /* 172 */ LaneBitmask(0x0000020000000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000040000000000), LaneBitmask(0x0000000000000100), LaneBitmask(0x0000004000000000), LaneBitmask::getAll(), /* 179 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000020000000000), LaneBitmask(0x0000008000000000), LaneBitmask(0x0000000000000100), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000040000000000), LaneBitmask(0x0000010000000000), LaneBitmask::getAll(), /* 188 */ LaneBitmask(0x0000008000000000), LaneBitmask(0x0000000000000001), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000020000000000), LaneBitmask(0x0000010000000000), LaneBitmask(0x0000000000000100), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000040000000000), LaneBitmask::getAll(), /* 197 */ LaneBitmask(0x0000000000000001), LaneBitmask(0x0000002000000000), LaneBitmask(0x0000020000000000), LaneBitmask(0x0000000000000100), LaneBitmask(0x0000004000000000), LaneBitmask(0x0000040000000000), LaneBitmask::getAll(), }; extern const uint16_t AArch64SubRegIdxLists[] = { /* 0 */ 2, 14, 7, 1, 0, /* 5 */ 8, 9, 0, /* 8 */ 15, 0, /* 10 */ 16, 18, 0, /* 13 */ 33, 34, 0, /* 16 */ 37, 2, 14, 7, 1, 42, 0, /* 23 */ 29, 33, 34, 30, 43, 44, 0, /* 30 */ 35, 29, 33, 34, 30, 43, 44, 36, 45, 47, 48, 46, 49, 50, 0, /* 45 */ 28, 31, 35, 29, 33, 34, 30, 43, 44, 36, 45, 47, 48, 46, 49, 50, 32, 55, 51, 53, 54, 52, 57, 58, 56, 59, 61, 62, 60, 63, 64, 0, /* 77 */ 3, 14, 7, 1, 4, 67, 66, 65, 0, /* 86 */ 38, 37, 2, 14, 7, 1, 42, 39, 98, 95, 97, 96, 94, 99, 0, /* 101 */ 3, 14, 7, 1, 4, 67, 66, 65, 5, 73, 72, 71, 112, 114, 0, /* 116 */ 3, 14, 7, 1, 4, 67, 66, 65, 5, 73, 72, 71, 6, 70, 69, 68, 112, 113, 114, 115, 116, 0, /* 138 */ 10, 2, 14, 7, 1, 11, 75, 77, 76, 74, 117, 0, /* 150 */ 10, 2, 14, 7, 1, 11, 75, 77, 76, 74, 12, 83, 85, 84, 82, 117, 119, 120, 122, 125, 0, /* 171 */ 10, 2, 14, 7, 1, 11, 75, 77, 76, 74, 12, 83, 85, 84, 82, 13, 79, 81, 80, 78, 117, 118, 119, 120, 121, 122, 123, 124, 125, 126, 127, 0, /* 203 */ 20, 15, 21, 92, 22, 91, 23, 90, 24, 89, 25, 88, 26, 87, 27, 86, 128, 129, 130, 131, 132, 133, 134, 135, 0, /* 228 */ 17, 15, 19, 93, 136, 0, /* 234 */ 38, 37, 2, 14, 7, 1, 42, 39, 98, 95, 97, 96, 94, 99, 137, 138, 0, /* 251 */ 38, 37, 2, 14, 7, 1, 42, 39, 98, 95, 97, 96, 94, 99, 40, 110, 107, 109, 108, 106, 111, 137, 138, 140, 142, 143, 145, 148, 150, 0, /* 281 */ 38, 37, 2, 14, 7, 1, 42, 39, 98, 95, 97, 96, 94, 99, 40, 110, 107, 109, 108, 106, 111, 41, 104, 101, 103, 102, 100, 105, 137, 138, 139, 140, 141, 142, 143, 144, 145, 146, 147, 148, 149, 150, 151, 152, 153, 0, /* 327 */ 38, 37, 2, 14, 7, 1, 42, 39, 98, 95, 97, 96, 94, 99, 40, 110, 107, 109, 108, 106, 111, 41, 104, 101, 103, 102, 100, 105, 154, 155, 0, }; extern const MCRegisterInfo::SubRegCoveredBits AArch64SubRegIdxRanges[] = { { 65535, 65535 }, { 0, 8 }, // bsub { 0, 64 }, // dsub { 0, 64 }, // dsub0 { 0, 64 }, // dsub1 { 0, 64 }, // dsub2 { 0, 64 }, // dsub3 { 0, 16 }, // hsub { 65535, 16 }, // psub0 { 65535, 16 }, // psub1 { 0, 128 }, // qsub0 { 0, 128 }, // qsub1 { 0, 128 }, // qsub2 { 0, 128 }, // qsub3 { 0, 32 }, // ssub { 0, 32 }, // sub_32 { 0, 32 }, // sube32 { 0, 64 }, // sube64 { 0, 32 }, // subo32 { 0, 64 }, // subo64 { 0, 64 }, // x8sub_0 { 64, 64 }, // x8sub_1 { 128, 64 }, // x8sub_2 { 192, 64 }, // x8sub_3 { 256, 64 }, // x8sub_4 { 320, 64 }, // x8sub_5 { 384, 64 }, // x8sub_6 { 448, 64 }, // x8sub_7 { 0, 2048 }, // zasubb { 0, 256 }, // zasubd0 { 0, 256 }, // zasubd1 { 0, 1024 }, // zasubh0 { 0, 1024 }, // zasubh1 { 0, 128 }, // zasubq0 { 0, 128 }, // zasubq1 { 0, 512 }, // zasubs0 { 0, 512 }, // zasubs1 { 0, 128 }, // zsub { 65535, 128 }, // zsub0 { 65535, 128 }, // zsub1 { 65535, 128 }, // zsub2 { 65535, 128 }, // zsub3 { 0, 128 }, // zsub_hi { 0, 128 }, // zasubd1_then_zasubq0 { 0, 128 }, // zasubd1_then_zasubq1 { 0, 256 }, // zasubs1_then_zasubd0 { 0, 256 }, // zasubs1_then_zasubd1 { 0, 128 }, // zasubs1_then_zasubq0 { 0, 128 }, // zasubs1_then_zasubq1 { 0, 128 }, // zasubs1_then_zasubd1_then_zasubq0 { 0, 128 }, // zasubs1_then_zasubd1_then_zasubq1 { 0, 256 }, // zasubh1_then_zasubd0 { 0, 256 }, // zasubh1_then_zasubd1 { 0, 128 }, // zasubh1_then_zasubq0 { 0, 128 }, // zasubh1_then_zasubq1 { 0, 512 }, // zasubh1_then_zasubs0 { 0, 512 }, // zasubh1_then_zasubs1 { 0, 128 }, // zasubh1_then_zasubd1_then_zasubq0 { 0, 128 }, // zasubh1_then_zasubd1_then_zasubq1 { 0, 256 }, // zasubh1_then_zasubs1_then_zasubd0 { 0, 256 }, // zasubh1_then_zasubs1_then_zasubd1 { 0, 128 }, // zasubh1_then_zasubs1_then_zasubq0 { 0, 128 }, // zasubh1_then_zasubs1_then_zasubq1 { 0, 128 }, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 { 0, 128 }, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 { 0, 8 }, // dsub1_then_bsub { 0, 16 }, // dsub1_then_hsub { 0, 32 }, // dsub1_then_ssub { 0, 8 }, // dsub3_then_bsub { 0, 16 }, // dsub3_then_hsub { 0, 32 }, // dsub3_then_ssub { 0, 8 }, // dsub2_then_bsub { 0, 16 }, // dsub2_then_hsub { 0, 32 }, // dsub2_then_ssub { 0, 8 }, // qsub1_then_bsub { 0, 64 }, // qsub1_then_dsub { 0, 16 }, // qsub1_then_hsub { 0, 32 }, // qsub1_then_ssub { 0, 8 }, // qsub3_then_bsub { 0, 64 }, // qsub3_then_dsub { 0, 16 }, // qsub3_then_hsub { 0, 32 }, // qsub3_then_ssub { 0, 8 }, // qsub2_then_bsub { 0, 64 }, // qsub2_then_dsub { 0, 16 }, // qsub2_then_hsub { 0, 32 }, // qsub2_then_ssub { 448, 32 }, // x8sub_7_then_sub_32 { 384, 32 }, // x8sub_6_then_sub_32 { 320, 32 }, // x8sub_5_then_sub_32 { 256, 32 }, // x8sub_4_then_sub_32 { 192, 32 }, // x8sub_3_then_sub_32 { 128, 32 }, // x8sub_2_then_sub_32 { 64, 32 }, // x8sub_1_then_sub_32 { 0, 32 }, // subo64_then_sub_32 { 65535, 65535 }, // zsub1_then_bsub { 65535, 65535 }, // zsub1_then_dsub { 65535, 65535 }, // zsub1_then_hsub { 65535, 65535 }, // zsub1_then_ssub { 65535, 65535 }, // zsub1_then_zsub { 65535, 65535 }, // zsub1_then_zsub_hi { 65535, 65535 }, // zsub3_then_bsub { 65535, 65535 }, // zsub3_then_dsub { 65535, 65535 }, // zsub3_then_hsub { 65535, 65535 }, // zsub3_then_ssub { 65535, 65535 }, // zsub3_then_zsub { 65535, 65535 }, // zsub3_then_zsub_hi { 65535, 65535 }, // zsub2_then_bsub { 65535, 65535 }, // zsub2_then_dsub { 65535, 65535 }, // zsub2_then_hsub { 65535, 65535 }, // zsub2_then_ssub { 65535, 65535 }, // zsub2_then_zsub { 65535, 65535 }, // zsub2_then_zsub_hi { 65535, 128 }, // dsub0_dsub1 { 65535, 192 }, // dsub0_dsub1_dsub2 { 65535, 128 }, // dsub1_dsub2 { 65535, 192 }, // dsub1_dsub2_dsub3 { 65535, 128 }, // dsub2_dsub3 { 65535, 128 }, // dsub_qsub1_then_dsub { 65535, 256 }, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub { 65535, 192 }, // dsub_qsub1_then_dsub_qsub2_then_dsub { 65535, 256 }, // qsub0_qsub1 { 65535, 384 }, // qsub0_qsub1_qsub2 { 65535, 256 }, // qsub1_qsub2 { 65535, 384 }, // qsub1_qsub2_qsub3 { 65535, 256 }, // qsub2_qsub3 { 65535, 128 }, // qsub1_then_dsub_qsub2_then_dsub { 65535, 192 }, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub { 65535, 128 }, // qsub2_then_dsub_qsub3_then_dsub { 65535, 64 }, // sub_32_x8sub_1_then_sub_32 { 0, 128 }, // x8sub_0_x8sub_1 { 128, 128 }, // x8sub_2_x8sub_3 { 256, 128 }, // x8sub_4_x8sub_5 { 384, 128 }, // x8sub_6_x8sub_7 { 65535, 64 }, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 { 65535, 64 }, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 { 65535, 64 }, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 { 65535, 64 }, // sub_32_subo64_then_sub_32 { 65535, 65535 }, // dsub_zsub1_then_dsub { 65535, 65535 }, // zsub_zsub1_then_zsub { 65535, 65535 }, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub { 65535, 65535 }, // dsub_zsub1_then_dsub_zsub2_then_dsub { 65535, 65535 }, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub { 65535, 65535 }, // zsub_zsub1_then_zsub_zsub2_then_zsub { 65535, 256 }, // zsub0_zsub1 { 65535, 384 }, // zsub0_zsub1_zsub2 { 65535, 256 }, // zsub1_zsub2 { 65535, 384 }, // zsub1_zsub2_zsub3 { 65535, 256 }, // zsub2_zsub3 { 65535, 65535 }, // zsub1_then_dsub_zsub2_then_dsub { 65535, 65535 }, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub { 65535, 65535 }, // zsub1_then_zsub_zsub2_then_zsub { 65535, 65535 }, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub { 65535, 65535 }, // zsub2_then_dsub_zsub3_then_dsub { 65535, 65535 }, // zsub2_then_zsub_zsub3_then_zsub { 65535, 256 }, // zsub0_zsub2 { 65535, 256 }, // zsub1_zsub3 }; extern const char AArch64RegStrings[] = { /* 0 */ 'B', '1', '0', 0, /* 4 */ 'D', '7', '_', 'D', '8', '_', 'D', '9', '_', 'D', '1', '0', 0, /* 17 */ 'H', '1', '0', 0, /* 21 */ 'P', '9', '_', 'P', '1', '0', 0, /* 28 */ 'Z', 'A', 'Q', '1', '0', 0, /* 34 */ 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', 0, /* 47 */ 'S', '1', '0', 0, /* 51 */ 'W', '1', '0', 0, /* 55 */ 'X', '1', '0', 0, /* 59 */ 'Z', '2', '_', 'Z', '1', '0', 0, /* 66 */ 'Z', '7', '_', 'Z', '8', '_', 'Z', '9', '_', 'Z', '1', '0', 0, /* 79 */ 'B', '2', '0', 0, /* 83 */ 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', '_', 'D', '2', '0', 0, /* 99 */ 'H', '2', '0', 0, /* 103 */ 'Q', '1', '7', '_', 'Q', '1', '8', '_', 'Q', '1', '9', '_', 'Q', '2', '0', 0, /* 119 */ 'S', '2', '0', 0, /* 123 */ 'W', '2', '0', 0, /* 127 */ 'X', '2', '0', 0, /* 131 */ 'Z', '1', '7', '_', 'Z', '1', '8', '_', 'Z', '1', '9', '_', 'Z', '2', '0', 0, /* 147 */ 'B', '3', '0', 0, /* 151 */ 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', '_', 'D', '3', '0', 0, /* 167 */ 'H', '3', '0', 0, /* 171 */ 'Q', '2', '7', '_', 'Q', '2', '8', '_', 'Q', '2', '9', '_', 'Q', '3', '0', 0, /* 187 */ 'S', '3', '0', 0, /* 191 */ 'W', '3', '0', 0, /* 195 */ 'Z', '2', '2', '_', 'Z', '3', '0', 0, /* 203 */ 'Z', '1', '8', '_', 'Z', '2', '2', '_', 'Z', '2', '6', '_', 'Z', '3', '0', 0, /* 219 */ 'Z', '2', '7', '_', 'Z', '2', '8', '_', 'Z', '2', '9', '_', 'Z', '3', '0', 0, /* 235 */ 'Z', 'A', 'B', '0', 0, /* 240 */ 'Z', 'A', 'D', '0', 0, /* 245 */ 'D', '2', '9', '_', 'D', '3', '0', '_', 'D', '3', '1', '_', 'D', '0', 0, /* 260 */ 'Z', 'A', 'H', '0', 0, /* 265 */ 'P', '1', '5', '_', 'P', '0', 0, /* 272 */ 'Z', 'A', 'Q', '0', 0, /* 277 */ 'Q', '2', '9', '_', 'Q', '3', '0', '_', 'Q', '3', '1', '_', 'Q', '0', 0, /* 292 */ 'Z', 'A', 'S', '0', 0, /* 297 */ 'Z', 'T', '0', 0, /* 301 */ 'W', '0', 0, /* 304 */ 'X', '0', 0, /* 307 */ 'Z', '2', '9', '_', 'Z', '3', '0', '_', 'Z', '3', '1', '_', 'Z', '0', 0, /* 322 */ 'B', '1', '1', 0, /* 326 */ 'D', '8', '_', 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', 0, /* 340 */ 'H', '1', '1', 0, /* 344 */ 'P', '1', '0', '_', 'P', '1', '1', 0, /* 352 */ 'Z', 'A', 'Q', '1', '1', 0, /* 358 */ 'Q', '8', '_', 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', 0, /* 372 */ 'S', '1', '1', 0, /* 376 */ 'W', '1', '0', '_', 'W', '1', '1', 0, /* 384 */ 'X', '4', '_', 'X', '5', '_', 'X', '6', '_', 'X', '7', '_', 'X', '8', '_', 'X', '9', '_', 'X', '1', '0', '_', 'X', '1', '1', 0, /* 410 */ 'Z', '8', '_', 'Z', '9', '_', 'Z', '1', '0', '_', 'Z', '1', '1', 0, /* 424 */ 'Z', '3', '_', 'Z', '1', '1', 0, /* 431 */ 'B', '2', '1', 0, /* 435 */ 'D', '1', '8', '_', 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', 0, /* 451 */ 'H', '2', '1', 0, /* 455 */ 'Q', '1', '8', '_', 'Q', '1', '9', '_', 'Q', '2', '0', '_', 'Q', '2', '1', 0, /* 471 */ 'S', '2', '1', 0, /* 475 */ 'W', '2', '0', '_', 'W', '2', '1', 0, /* 483 */ 'X', '1', '4', '_', 'X', '1', '5', '_', 'X', '1', '6', '_', 'X', '1', '7', '_', 'X', '1', '8', '_', 'X', '1', '9', '_', 'X', '2', '0', '_', 'X', '2', '1', 0, /* 515 */ 'Z', '1', '8', '_', 'Z', '1', '9', '_', 'Z', '2', '0', '_', 'Z', '2', '1', 0, /* 531 */ 'B', '3', '1', 0, /* 535 */ 'D', '2', '8', '_', 'D', '2', '9', '_', 'D', '3', '0', '_', 'D', '3', '1', 0, /* 551 */ 'H', '3', '1', 0, /* 555 */ 'Q', '2', '8', '_', 'Q', '2', '9', '_', 'Q', '3', '0', '_', 'Q', '3', '1', 0, /* 571 */ 'S', '3', '1', 0, /* 575 */ 'Z', '2', '8', '_', 'Z', '2', '9', '_', 'Z', '3', '0', '_', 'Z', '3', '1', 0, /* 591 */ 'Z', '2', '3', '_', 'Z', '3', '1', 0, /* 599 */ 'Z', '1', '9', '_', 'Z', '2', '3', '_', 'Z', '2', '7', '_', 'Z', '3', '1', 0, /* 615 */ 'B', '1', 0, /* 618 */ 'Z', 'A', 'D', '1', 0, /* 623 */ 'D', '3', '0', '_', 'D', '3', '1', '_', 'D', '0', '_', 'D', '1', 0, /* 637 */ 'Z', 'A', 'H', '1', 0, /* 642 */ 'P', '0', '_', 'P', '1', 0, /* 648 */ 'Z', 'A', 'Q', '1', 0, /* 653 */ 'Q', '3', '0', '_', 'Q', '3', '1', '_', 'Q', '0', '_', 'Q', '1', 0, /* 667 */ 'Z', 'A', 'S', '1', 0, /* 672 */ 'W', '0', '_', 'W', '1', 0, /* 678 */ 'X', '0', '_', 'X', '1', 0, /* 684 */ 'Z', '3', '0', '_', 'Z', '3', '1', '_', 'Z', '0', '_', 'Z', '1', 0, /* 698 */ 'B', '1', '2', 0, /* 702 */ 'D', '9', '_', 'D', '1', '0', '_', 'D', '1', '1', '_', 'D', '1', '2', 0, /* 717 */ 'H', '1', '2', 0, /* 721 */ 'P', '1', '1', '_', 'P', '1', '2', 0, /* 729 */ 'Z', 'A', 'Q', '1', '2', 0, /* 735 */ 'Q', '9', '_', 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', 0, /* 750 */ 'S', '1', '2', 0, /* 754 */ 'W', '1', '2', 0, /* 758 */ 'X', '1', '2', 0, /* 762 */ 'Z', '9', '_', 'Z', '1', '0', '_', 'Z', '1', '1', '_', 'Z', '1', '2', 0, /* 777 */ 'Z', '4', '_', 'Z', '1', '2', 0, /* 784 */ 'Z', '0', '_', 'Z', '4', '_', 'Z', '8', '_', 'Z', '1', '2', 0, /* 797 */ 'B', '2', '2', 0, /* 801 */ 'D', '1', '9', '_', 'D', '2', '0', '_', 'D', '2', '1', '_', 'D', '2', '2', 0, /* 817 */ 'H', '2', '2', 0, /* 821 */ 'Q', '1', '9', '_', 'Q', '2', '0', '_', 'Q', '2', '1', '_', 'Q', '2', '2', 0, /* 837 */ 'S', '2', '2', 0, /* 841 */ 'W', '2', '2', 0, /* 845 */ 'X', '2', '2', 0, /* 849 */ 'Z', '1', '9', '_', 'Z', '2', '0', '_', 'Z', '2', '1', '_', 'Z', '2', '2', 0, /* 865 */ 'B', '2', 0, /* 868 */ 'Z', 'A', 'D', '2', 0, /* 873 */ 'D', '3', '1', '_', 'D', '0', '_', 'D', '1', '_', 'D', '2', 0, /* 886 */ 'H', '2', 0, /* 889 */ 'P', '1', '_', 'P', '2', 0, /* 895 */ 'Z', 'A', 'Q', '2', 0, /* 900 */ 'Q', '3', '1', '_', 'Q', '0', '_', 'Q', '1', '_', 'Q', '2', 0, /* 913 */ 'Z', 'A', 'S', '2', 0, /* 918 */ 'W', '2', 0, /* 921 */ 'X', '2', 0, /* 924 */ 'Z', '3', '1', '_', 'Z', '0', '_', 'Z', '1', '_', 'Z', '2', 0, /* 937 */ 'B', '1', '3', 0, /* 941 */ 'D', '1', '0', '_', 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', 0, /* 957 */ 'H', '1', '3', 0, /* 961 */ 'P', '1', '2', '_', 'P', '1', '3', 0, /* 969 */ 'Z', 'A', 'Q', '1', '3', 0, /* 975 */ 'Q', '1', '0', '_', 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', 0, /* 991 */ 'S', '1', '3', 0, /* 995 */ 'W', '1', '2', '_', 'W', '1', '3', 0, /* 1003 */ 'X', '6', '_', 'X', '7', '_', 'X', '8', '_', 'X', '9', '_', 'X', '1', '0', '_', 'X', '1', '1', '_', 'X', '1', '2', '_', 'X', '1', '3', 0, /* 1031 */ 'Z', '1', '0', '_', 'Z', '1', '1', '_', 'Z', '1', '2', '_', 'Z', '1', '3', 0, /* 1047 */ 'Z', '5', '_', 'Z', '1', '3', 0, /* 1054 */ 'Z', '1', '_', 'Z', '5', '_', 'Z', '9', '_', 'Z', '1', '3', 0, /* 1067 */ 'B', '2', '3', 0, /* 1071 */ 'D', '2', '0', '_', 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', 0, /* 1087 */ 'H', '2', '3', 0, /* 1091 */ 'Q', '2', '0', '_', 'Q', '2', '1', '_', 'Q', '2', '2', '_', 'Q', '2', '3', 0, /* 1107 */ 'S', '2', '3', 0, /* 1111 */ 'W', '2', '2', '_', 'W', '2', '3', 0, /* 1119 */ 'X', '1', '6', '_', 'X', '1', '7', '_', 'X', '1', '8', '_', 'X', '1', '9', '_', 'X', '2', '0', '_', 'X', '2', '1', '_', 'X', '2', '2', '_', 'X', '2', '3', 0, /* 1151 */ 'Z', '2', '0', '_', 'Z', '2', '1', '_', 'Z', '2', '2', '_', 'Z', '2', '3', 0, /* 1167 */ 'B', '3', 0, /* 1170 */ 'Z', 'A', 'D', '3', 0, /* 1175 */ 'D', '0', '_', 'D', '1', '_', 'D', '2', '_', 'D', '3', 0, /* 1187 */ 'H', '3', 0, /* 1190 */ 'P', '2', '_', 'P', '3', 0, /* 1196 */ 'Z', 'A', 'Q', '3', 0, /* 1201 */ 'Q', '0', '_', 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', 0, /* 1213 */ 'Z', 'A', 'S', '3', 0, /* 1218 */ 'W', '2', '_', 'W', '3', 0, /* 1224 */ 'X', '2', '_', 'X', '3', 0, /* 1230 */ 'Z', '0', '_', 'Z', '1', '_', 'Z', '2', '_', 'Z', '3', 0, /* 1242 */ 'B', '1', '4', 0, /* 1246 */ 'D', '1', '1', '_', 'D', '1', '2', '_', 'D', '1', '3', '_', 'D', '1', '4', 0, /* 1262 */ 'H', '1', '4', 0, /* 1266 */ 'P', '1', '3', '_', 'P', '1', '4', 0, /* 1274 */ 'Z', 'A', 'Q', '1', '4', 0, /* 1280 */ 'Q', '1', '1', '_', 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', 0, /* 1296 */ 'S', '1', '4', 0, /* 1300 */ 'W', '1', '4', 0, /* 1304 */ 'X', '1', '4', 0, /* 1308 */ 'Z', '2', '_', 'Z', '6', '_', 'Z', '1', '0', '_', 'Z', '1', '4', 0, /* 1322 */ 'Z', '1', '1', '_', 'Z', '1', '2', '_', 'Z', '1', '3', '_', 'Z', '1', '4', 0, /* 1338 */ 'Z', '6', '_', 'Z', '1', '4', 0, /* 1345 */ 'B', '2', '4', 0, /* 1349 */ 'D', '2', '1', '_', 'D', '2', '2', '_', 'D', '2', '3', '_', 'D', '2', '4', 0, /* 1365 */ 'H', '2', '4', 0, /* 1369 */ 'Q', '2', '1', '_', 'Q', '2', '2', '_', 'Q', '2', '3', '_', 'Q', '2', '4', 0, /* 1385 */ 'S', '2', '4', 0, /* 1389 */ 'W', '2', '4', 0, /* 1393 */ 'X', '2', '4', 0, /* 1397 */ 'Z', '2', '1', '_', 'Z', '2', '2', '_', 'Z', '2', '3', '_', 'Z', '2', '4', 0, /* 1413 */ 'Z', '1', '6', '_', 'Z', '2', '4', 0, /* 1421 */ 'B', '4', 0, /* 1424 */ 'Z', 'A', 'D', '4', 0, /* 1429 */ 'D', '1', '_', 'D', '2', '_', 'D', '3', '_', 'D', '4', 0, /* 1441 */ 'H', '4', 0, /* 1444 */ 'P', '3', '_', 'P', '4', 0, /* 1450 */ 'Z', 'A', 'Q', '4', 0, /* 1455 */ 'Q', '1', '_', 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', 0, /* 1467 */ 'S', '4', 0, /* 1470 */ 'W', '4', 0, /* 1473 */ 'X', '4', 0, /* 1476 */ 'Z', '1', '_', 'Z', '2', '_', 'Z', '3', '_', 'Z', '4', 0, /* 1488 */ 'B', '1', '5', 0, /* 1492 */ 'D', '1', '2', '_', 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', 0, /* 1508 */ 'H', '1', '5', 0, /* 1512 */ 'P', '1', '4', '_', 'P', '1', '5', 0, /* 1520 */ 'Z', 'A', 'Q', '1', '5', 0, /* 1526 */ 'Q', '1', '2', '_', 'Q', '1', '3', '_', 'Q', '1', '4', '_', 'Q', '1', '5', 0, /* 1542 */ 'S', '1', '5', 0, /* 1546 */ 'W', '1', '4', '_', 'W', '1', '5', 0, /* 1554 */ 'X', '8', '_', 'X', '9', '_', 'X', '1', '0', '_', 'X', '1', '1', '_', 'X', '1', '2', '_', 'X', '1', '3', '_', 'X', '1', '4', '_', 'X', '1', '5', 0, /* 1584 */ 'Z', '3', '_', 'Z', '7', '_', 'Z', '1', '1', '_', 'Z', '1', '5', 0, /* 1598 */ 'Z', '1', '2', '_', 'Z', '1', '3', '_', 'Z', '1', '4', '_', 'Z', '1', '5', 0, /* 1614 */ 'Z', '7', '_', 'Z', '1', '5', 0, /* 1621 */ 'B', '2', '5', 0, /* 1625 */ 'D', '2', '2', '_', 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', 0, /* 1641 */ 'H', '2', '5', 0, /* 1645 */ 'Q', '2', '2', '_', 'Q', '2', '3', '_', 'Q', '2', '4', '_', 'Q', '2', '5', 0, /* 1661 */ 'S', '2', '5', 0, /* 1665 */ 'W', '2', '4', '_', 'W', '2', '5', 0, /* 1673 */ 'X', '1', '8', '_', 'X', '1', '9', '_', 'X', '2', '0', '_', 'X', '2', '1', '_', 'X', '2', '2', '_', 'X', '2', '3', '_', 'X', '2', '4', '_', 'X', '2', '5', 0, /* 1705 */ 'Z', '2', '2', '_', 'Z', '2', '3', '_', 'Z', '2', '4', '_', 'Z', '2', '5', 0, /* 1721 */ 'Z', '1', '7', '_', 'Z', '2', '5', 0, /* 1729 */ 'B', '5', 0, /* 1732 */ 'Z', 'A', 'D', '5', 0, /* 1737 */ 'D', '2', '_', 'D', '3', '_', 'D', '4', '_', 'D', '5', 0, /* 1749 */ 'H', '5', 0, /* 1752 */ 'P', '4', '_', 'P', '5', 0, /* 1758 */ 'Z', 'A', 'Q', '5', 0, /* 1763 */ 'Q', '2', '_', 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', 0, /* 1775 */ 'S', '5', 0, /* 1778 */ 'W', '4', '_', 'W', '5', 0, /* 1784 */ 'X', '4', '_', 'X', '5', 0, /* 1790 */ 'Z', '2', '_', 'Z', '3', '_', 'Z', '4', '_', 'Z', '5', 0, /* 1802 */ 'B', '1', '6', 0, /* 1806 */ 'D', '1', '3', '_', 'D', '1', '4', '_', 'D', '1', '5', '_', 'D', '1', '6', 0, /* 1822 */ 'H', '1', '6', 0, /* 1826 */ 'Q', '1', '3', '_', 'Q', '1', '4', '_', 'Q', '1', '5', '_', 'Q', '1', '6', 0, /* 1842 */ 'S', '1', '6', 0, /* 1846 */ 'W', '1', '6', 0, /* 1850 */ 'X', '1', '6', 0, /* 1854 */ 'Z', '1', '3', '_', 'Z', '1', '4', '_', 'Z', '1', '5', '_', 'Z', '1', '6', 0, /* 1870 */ 'B', '2', '6', 0, /* 1874 */ 'D', '2', '3', '_', 'D', '2', '4', '_', 'D', '2', '5', '_', 'D', '2', '6', 0, /* 1890 */ 'H', '2', '6', 0, /* 1894 */ 'Q', '2', '3', '_', 'Q', '2', '4', '_', 'Q', '2', '5', '_', 'Q', '2', '6', 0, /* 1910 */ 'S', '2', '6', 0, /* 1914 */ 'W', '2', '6', 0, /* 1918 */ 'X', '2', '6', 0, /* 1922 */ 'Z', '2', '3', '_', 'Z', '2', '4', '_', 'Z', '2', '5', '_', 'Z', '2', '6', 0, /* 1938 */ 'Z', '1', '8', '_', 'Z', '2', '6', 0, /* 1946 */ 'B', '6', 0, /* 1949 */ 'Z', 'A', 'D', '6', 0, /* 1954 */ 'D', '3', '_', 'D', '4', '_', 'D', '5', '_', 'D', '6', 0, /* 1966 */ 'H', '6', 0, /* 1969 */ 'P', '5', '_', 'P', '6', 0, /* 1975 */ 'Z', 'A', 'Q', '6', 0, /* 1980 */ 'Q', '3', '_', 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', 0, /* 1992 */ 'S', '6', 0, /* 1995 */ 'W', '6', 0, /* 1998 */ 'X', '6', 0, /* 2001 */ 'Z', '3', '_', 'Z', '4', '_', 'Z', '5', '_', 'Z', '6', 0, /* 2013 */ 'B', '1', '7', 0, /* 2017 */ 'D', '1', '4', '_', 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', 0, /* 2033 */ 'H', '1', '7', 0, /* 2037 */ 'Q', '1', '4', '_', 'Q', '1', '5', '_', 'Q', '1', '6', '_', 'Q', '1', '7', 0, /* 2053 */ 'S', '1', '7', 0, /* 2057 */ 'W', '1', '6', '_', 'W', '1', '7', 0, /* 2065 */ 'X', '1', '0', '_', 'X', '1', '1', '_', 'X', '1', '2', '_', 'X', '1', '3', '_', 'X', '1', '4', '_', 'X', '1', '5', '_', 'X', '1', '6', '_', 'X', '1', '7', 0, /* 2097 */ 'Z', '1', '4', '_', 'Z', '1', '5', '_', 'Z', '1', '6', '_', 'Z', '1', '7', 0, /* 2113 */ 'B', '2', '7', 0, /* 2117 */ 'D', '2', '4', '_', 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', 0, /* 2133 */ 'H', '2', '7', 0, /* 2137 */ 'Q', '2', '4', '_', 'Q', '2', '5', '_', 'Q', '2', '6', '_', 'Q', '2', '7', 0, /* 2153 */ 'S', '2', '7', 0, /* 2157 */ 'W', '2', '6', '_', 'W', '2', '7', 0, /* 2165 */ 'X', '2', '0', '_', 'X', '2', '1', '_', 'X', '2', '2', '_', 'X', '2', '3', '_', 'X', '2', '4', '_', 'X', '2', '5', '_', 'X', '2', '6', '_', 'X', '2', '7', 0, /* 2197 */ 'Z', '2', '4', '_', 'Z', '2', '5', '_', 'Z', '2', '6', '_', 'Z', '2', '7', 0, /* 2213 */ 'Z', '1', '9', '_', 'Z', '2', '7', 0, /* 2221 */ 'B', '7', 0, /* 2224 */ 'Z', 'A', 'D', '7', 0, /* 2229 */ 'D', '4', '_', 'D', '5', '_', 'D', '6', '_', 'D', '7', 0, /* 2241 */ 'H', '7', 0, /* 2244 */ 'P', '6', '_', 'P', '7', 0, /* 2250 */ 'Z', 'A', 'Q', '7', 0, /* 2255 */ 'Q', '4', '_', 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', 0, /* 2267 */ 'S', '7', 0, /* 2270 */ 'W', '6', '_', 'W', '7', 0, /* 2276 */ 'X', '0', '_', 'X', '1', '_', 'X', '2', '_', 'X', '3', '_', 'X', '4', '_', 'X', '5', '_', 'X', '6', '_', 'X', '7', 0, /* 2300 */ 'Z', '4', '_', 'Z', '5', '_', 'Z', '6', '_', 'Z', '7', 0, /* 2312 */ 'B', '1', '8', 0, /* 2316 */ 'D', '1', '5', '_', 'D', '1', '6', '_', 'D', '1', '7', '_', 'D', '1', '8', 0, /* 2332 */ 'H', '1', '8', 0, /* 2336 */ 'Q', '1', '5', '_', 'Q', '1', '6', '_', 'Q', '1', '7', '_', 'Q', '1', '8', 0, /* 2352 */ 'S', '1', '8', 0, /* 2356 */ 'W', '1', '8', 0, /* 2360 */ 'X', '1', '8', 0, /* 2364 */ 'Z', '1', '5', '_', 'Z', '1', '6', '_', 'Z', '1', '7', '_', 'Z', '1', '8', 0, /* 2380 */ 'B', '2', '8', 0, /* 2384 */ 'D', '2', '5', '_', 'D', '2', '6', '_', 'D', '2', '7', '_', 'D', '2', '8', 0, /* 2400 */ 'H', '2', '8', 0, /* 2404 */ 'Q', '2', '5', '_', 'Q', '2', '6', '_', 'Q', '2', '7', '_', 'Q', '2', '8', 0, /* 2420 */ 'S', '2', '8', 0, /* 2424 */ 'W', '2', '8', 0, /* 2428 */ 'X', '2', '8', 0, /* 2432 */ 'Z', '2', '0', '_', 'Z', '2', '8', 0, /* 2440 */ 'Z', '1', '6', '_', 'Z', '2', '0', '_', 'Z', '2', '4', '_', 'Z', '2', '8', 0, /* 2456 */ 'Z', '2', '5', '_', 'Z', '2', '6', '_', 'Z', '2', '7', '_', 'Z', '2', '8', 0, /* 2472 */ 'B', '8', 0, /* 2475 */ 'D', '5', '_', 'D', '6', '_', 'D', '7', '_', 'D', '8', 0, /* 2487 */ 'H', '8', 0, /* 2490 */ 'P', '7', '_', 'P', '8', 0, /* 2496 */ 'Z', 'A', 'Q', '8', 0, /* 2501 */ 'Q', '5', '_', 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', 0, /* 2513 */ 'S', '8', 0, /* 2516 */ 'W', '8', 0, /* 2519 */ 'X', '8', 0, /* 2522 */ 'Z', '0', '_', 'Z', '8', 0, /* 2528 */ 'Z', '5', '_', 'Z', '6', '_', 'Z', '7', '_', 'Z', '8', 0, /* 2540 */ 'B', '1', '9', 0, /* 2544 */ 'D', '1', '6', '_', 'D', '1', '7', '_', 'D', '1', '8', '_', 'D', '1', '9', 0, /* 2560 */ 'H', '1', '9', 0, /* 2564 */ 'Q', '1', '6', '_', 'Q', '1', '7', '_', 'Q', '1', '8', '_', 'Q', '1', '9', 0, /* 2580 */ 'S', '1', '9', 0, /* 2584 */ 'W', '1', '8', '_', 'W', '1', '9', 0, /* 2592 */ 'X', '1', '2', '_', 'X', '1', '3', '_', 'X', '1', '4', '_', 'X', '1', '5', '_', 'X', '1', '6', '_', 'X', '1', '7', '_', 'X', '1', '8', '_', 'X', '1', '9', 0, /* 2624 */ 'Z', '1', '6', '_', 'Z', '1', '7', '_', 'Z', '1', '8', '_', 'Z', '1', '9', 0, /* 2640 */ 'B', '2', '9', 0, /* 2644 */ 'D', '2', '6', '_', 'D', '2', '7', '_', 'D', '2', '8', '_', 'D', '2', '9', 0, /* 2660 */ 'H', '2', '9', 0, /* 2664 */ 'Q', '2', '6', '_', 'Q', '2', '7', '_', 'Q', '2', '8', '_', 'Q', '2', '9', 0, /* 2680 */ 'S', '2', '9', 0, /* 2684 */ 'W', '2', '8', '_', 'W', '2', '9', 0, /* 2692 */ 'Z', '2', '1', '_', 'Z', '2', '9', 0, /* 2700 */ 'Z', '1', '7', '_', 'Z', '2', '1', '_', 'Z', '2', '5', '_', 'Z', '2', '9', 0, /* 2716 */ 'Z', '2', '6', '_', 'Z', '2', '7', '_', 'Z', '2', '8', '_', 'Z', '2', '9', 0, /* 2732 */ 'B', '9', 0, /* 2735 */ 'D', '6', '_', 'D', '7', '_', 'D', '8', '_', 'D', '9', 0, /* 2747 */ 'H', '9', 0, /* 2750 */ 'P', '8', '_', 'P', '9', 0, /* 2756 */ 'Z', 'A', 'Q', '9', 0, /* 2761 */ 'Q', '6', '_', 'Q', '7', '_', 'Q', '8', '_', 'Q', '9', 0, /* 2773 */ 'S', '9', 0, /* 2776 */ 'W', '8', '_', 'W', '9', 0, /* 2782 */ 'X', '2', '_', 'X', '3', '_', 'X', '4', '_', 'X', '5', '_', 'X', '6', '_', 'X', '7', '_', 'X', '8', '_', 'X', '9', 0, /* 2806 */ 'Z', '1', '_', 'Z', '9', 0, /* 2812 */ 'Z', '6', '_', 'Z', '7', '_', 'Z', '8', '_', 'Z', '9', 0, /* 2824 */ 'Z', 'A', 0, /* 2827 */ 'V', 'G', 0, /* 2830 */ 'Z', '1', '0', '_', 'H', 'I', 0, /* 2837 */ 'Z', '2', '0', '_', 'H', 'I', 0, /* 2844 */ 'Z', '3', '0', '_', 'H', 'I', 0, /* 2851 */ 'Z', '0', '_', 'H', 'I', 0, /* 2857 */ 'Z', '1', '1', '_', 'H', 'I', 0, /* 2864 */ 'Z', '2', '1', '_', 'H', 'I', 0, /* 2871 */ 'Z', '3', '1', '_', 'H', 'I', 0, /* 2878 */ 'Z', '1', '_', 'H', 'I', 0, /* 2884 */ 'Z', '1', '2', '_', 'H', 'I', 0, /* 2891 */ 'Z', '2', '2', '_', 'H', 'I', 0, /* 2898 */ 'Z', '2', '_', 'H', 'I', 0, /* 2904 */ 'Z', '1', '3', '_', 'H', 'I', 0, /* 2911 */ 'Z', '2', '3', '_', 'H', 'I', 0, /* 2918 */ 'Z', '3', '_', 'H', 'I', 0, /* 2924 */ 'Z', '1', '4', '_', 'H', 'I', 0, /* 2931 */ 'Z', '2', '4', '_', 'H', 'I', 0, /* 2938 */ 'Z', '4', '_', 'H', 'I', 0, /* 2944 */ 'Z', '1', '5', '_', 'H', 'I', 0, /* 2951 */ 'Z', '2', '5', '_', 'H', 'I', 0, /* 2958 */ 'Z', '5', '_', 'H', 'I', 0, /* 2964 */ 'Z', '1', '6', '_', 'H', 'I', 0, /* 2971 */ 'Z', '2', '6', '_', 'H', 'I', 0, /* 2978 */ 'Z', '6', '_', 'H', 'I', 0, /* 2984 */ 'Z', '1', '7', '_', 'H', 'I', 0, /* 2991 */ 'Z', '2', '7', '_', 'H', 'I', 0, /* 2998 */ 'Z', '7', '_', 'H', 'I', 0, /* 3004 */ 'Z', '1', '8', '_', 'H', 'I', 0, /* 3011 */ 'Z', '2', '8', '_', 'H', 'I', 0, /* 3018 */ 'Z', '8', '_', 'H', 'I', 0, /* 3024 */ 'Z', '1', '9', '_', 'H', 'I', 0, /* 3031 */ 'Z', '2', '9', '_', 'H', 'I', 0, /* 3038 */ 'Z', '9', '_', 'H', 'I', 0, /* 3044 */ 'X', '2', '2', '_', 'X', '2', '3', '_', 'X', '2', '4', '_', 'X', '2', '5', '_', 'X', '2', '6', '_', 'X', '2', '7', '_', 'X', '2', '8', '_', 'F', 'P', 0, /* 3075 */ 'W', 'S', 'P', 0, /* 3079 */ 'F', 'P', 'C', 'R', 0, /* 3084 */ 'F', 'F', 'R', 0, /* 3088 */ 'L', 'R', 0, /* 3091 */ 'W', '3', '0', '_', 'W', 'Z', 'R', 0, /* 3099 */ 'L', 'R', '_', 'X', 'Z', 'R', 0, /* 3106 */ 'N', 'Z', 'C', 'V', 0, 0 }; extern const MCRegisterDesc AArch64RegDesc[] = { // Descriptors { 3, 0, 0, 0, 0, 0 }, { 3084, 16, 16, 4, 39889, 0 }, { 3072, 1827, 2458, 8, 39889, 33 }, { 3079, 16, 16, 4, 39889, 0 }, { 3088, 1825, 1981, 8, 39889, 33 }, { 3106, 16, 16, 4, 39889, 0 }, { 3076, 507, 16, 8, 39889, 33 }, { 2827, 16, 16, 4, 39889, 0 }, { 3075, 16, 2468, 4, 39458, 0 }, { 3095, 16, 1435, 4, 9520, 0 }, { 3102, 2493, 1979, 8, 9520, 33 }, { 2824, 597, 16, 45, 0, 82 }, { 237, 16, 869, 4, 13313, 0 }, { 615, 16, 939, 4, 13313, 0 }, { 865, 16, 1009, 4, 13313, 0 }, { 1167, 16, 1219, 4, 13313, 0 }, { 1421, 16, 709, 4, 13313, 0 }, { 1729, 16, 709, 4, 13313, 0 }, { 1946, 16, 709, 4, 13313, 0 }, { 2221, 16, 709, 4, 13313, 0 }, { 2472, 16, 1149, 4, 13313, 0 }, { 2732, 16, 1149, 4, 13313, 0 }, { 0, 16, 1149, 4, 13313, 0 }, { 322, 16, 1149, 4, 13313, 0 }, { 698, 16, 629, 4, 13313, 0 }, { 937, 16, 629, 4, 13313, 0 }, { 1242, 16, 629, 4, 13313, 0 }, { 1488, 16, 629, 4, 13313, 0 }, { 1802, 16, 1365, 4, 13313, 0 }, { 2013, 16, 1365, 4, 13313, 0 }, { 2312, 16, 1365, 4, 13313, 0 }, { 2540, 16, 1365, 4, 13313, 0 }, { 79, 16, 1079, 4, 13313, 0 }, { 431, 16, 1079, 4, 13313, 0 }, { 797, 16, 1079, 4, 13313, 0 }, { 1067, 16, 1079, 4, 13313, 0 }, { 1345, 16, 1295, 4, 13313, 0 }, { 1621, 16, 1295, 4, 13313, 0 }, { 1870, 16, 1295, 4, 13313, 0 }, { 2113, 16, 1295, 4, 13313, 0 }, { 2380, 16, 799, 4, 13313, 0 }, { 2640, 16, 799, 4, 13313, 0 }, { 147, 16, 799, 4, 13313, 0 }, { 531, 16, 799, 4, 13313, 0 }, { 242, 2232, 872, 1, 39377, 3 }, { 620, 2232, 942, 1, 39377, 3 }, { 870, 2232, 1012, 1, 39377, 3 }, { 1172, 2232, 1222, 1, 39377, 3 }, { 1426, 2232, 712, 1, 39377, 3 }, { 1734, 2232, 712, 1, 39377, 3 }, { 1951, 2232, 712, 1, 39377, 3 }, { 2226, 2232, 712, 1, 39377, 3 }, { 2484, 2232, 1152, 1, 39377, 3 }, { 2744, 2232, 1152, 1, 39377, 3 }, { 13, 2232, 1152, 1, 39377, 3 }, { 336, 2232, 1152, 1, 39377, 3 }, { 713, 2232, 632, 1, 39377, 3 }, { 953, 2232, 632, 1, 39377, 3 }, { 1258, 2232, 632, 1, 39377, 3 }, { 1504, 2232, 632, 1, 39377, 3 }, { 1818, 2232, 1368, 1, 39377, 3 }, { 2029, 2232, 1368, 1, 39377, 3 }, { 2328, 2232, 1368, 1, 39377, 3 }, { 2556, 2232, 1368, 1, 39377, 3 }, { 95, 2232, 1082, 1, 39377, 3 }, { 447, 2232, 1082, 1, 39377, 3 }, { 813, 2232, 1082, 1, 39377, 3 }, { 1083, 2232, 1082, 1, 39377, 3 }, { 1361, 2232, 1298, 1, 39377, 3 }, { 1637, 2232, 1298, 1, 39377, 3 }, { 1886, 2232, 1298, 1, 39377, 3 }, { 2129, 2232, 1298, 1, 39377, 3 }, { 2396, 2232, 802, 1, 39377, 3 }, { 2656, 2232, 802, 1, 39377, 3 }, { 163, 2232, 802, 1, 39377, 3 }, { 547, 2232, 802, 1, 39377, 3 }, { 262, 2234, 870, 3, 38593, 3 }, { 639, 2234, 940, 3, 38593, 3 }, { 886, 2234, 1010, 3, 38593, 3 }, { 1187, 2234, 1220, 3, 38593, 3 }, { 1441, 2234, 710, 3, 38593, 3 }, { 1749, 2234, 710, 3, 38593, 3 }, { 1966, 2234, 710, 3, 38593, 3 }, { 2241, 2234, 710, 3, 38593, 3 }, { 2487, 2234, 1150, 3, 38593, 3 }, { 2747, 2234, 1150, 3, 38593, 3 }, { 17, 2234, 1150, 3, 38593, 3 }, { 340, 2234, 1150, 3, 38593, 3 }, { 717, 2234, 630, 3, 38593, 3 }, { 957, 2234, 630, 3, 38593, 3 }, { 1262, 2234, 630, 3, 38593, 3 }, { 1508, 2234, 630, 3, 38593, 3 }, { 1822, 2234, 1366, 3, 38593, 3 }, { 2033, 2234, 1366, 3, 38593, 3 }, { 2332, 2234, 1366, 3, 38593, 3 }, { 2560, 2234, 1366, 3, 38593, 3 }, { 99, 2234, 1080, 3, 38593, 3 }, { 451, 2234, 1080, 3, 38593, 3 }, { 817, 2234, 1080, 3, 38593, 3 }, { 1087, 2234, 1080, 3, 38593, 3 }, { 1365, 2234, 1296, 3, 38593, 3 }, { 1641, 2234, 1296, 3, 38593, 3 }, { 1890, 2234, 1296, 3, 38593, 3 }, { 2133, 2234, 1296, 3, 38593, 3 }, { 2400, 2234, 800, 3, 38593, 3 }, { 2660, 2234, 800, 3, 38593, 3 }, { 167, 2234, 800, 3, 38593, 3 }, { 551, 2234, 800, 3, 38593, 3 }, { 269, 16, 1292, 4, 38593, 0 }, { 645, 16, 349, 4, 38593, 0 }, { 892, 16, 349, 4, 38593, 0 }, { 1193, 16, 349, 4, 38593, 0 }, { 1447, 16, 349, 4, 38593, 0 }, { 1755, 16, 349, 4, 38593, 0 }, { 1972, 16, 349, 4, 38593, 0 }, { 2247, 16, 349, 4, 38593, 0 }, { 2493, 16, 349, 4, 38593, 0 }, { 2753, 16, 349, 4, 38593, 0 }, { 24, 16, 349, 4, 38593, 0 }, { 348, 16, 349, 4, 38593, 0 }, { 725, 16, 349, 4, 38593, 0 }, { 965, 16, 349, 4, 38593, 0 }, { 1270, 16, 349, 4, 38593, 0 }, { 1516, 16, 349, 4, 38593, 0 }, { 274, 2245, 904, 0, 34737, 3 }, { 650, 2245, 974, 0, 34737, 3 }, { 897, 2245, 1044, 0, 34737, 3 }, { 1198, 2245, 1254, 0, 34737, 3 }, { 1452, 2245, 744, 0, 34737, 3 }, { 1760, 2245, 744, 0, 34737, 3 }, { 1977, 2245, 744, 0, 34737, 3 }, { 2252, 2245, 744, 0, 34737, 3 }, { 2498, 2245, 1184, 0, 34737, 3 }, { 2758, 2245, 1184, 0, 34737, 3 }, { 30, 2245, 1184, 0, 34737, 3 }, { 354, 2245, 1184, 0, 34737, 3 }, { 731, 2245, 664, 0, 34737, 3 }, { 971, 2245, 664, 0, 34737, 3 }, { 1276, 2245, 664, 0, 34737, 3 }, { 1522, 2245, 664, 0, 34737, 3 }, { 1838, 2245, 1400, 0, 34737, 3 }, { 2049, 2245, 1400, 0, 34737, 3 }, { 2348, 2245, 1400, 0, 34737, 3 }, { 2576, 2245, 1400, 0, 34737, 3 }, { 115, 2245, 1114, 0, 34737, 3 }, { 467, 2245, 1114, 0, 34737, 3 }, { 833, 2245, 1114, 0, 34737, 3 }, { 1103, 2245, 1114, 0, 34737, 3 }, { 1381, 2245, 1330, 0, 34737, 3 }, { 1657, 2245, 1330, 0, 34737, 3 }, { 1906, 2245, 1330, 0, 34737, 3 }, { 2149, 2245, 1330, 0, 34737, 3 }, { 2416, 2245, 834, 0, 34737, 3 }, { 2676, 2245, 834, 0, 34737, 3 }, { 183, 2245, 834, 0, 34737, 3 }, { 567, 2245, 834, 0, 34737, 3 }, { 294, 2233, 871, 2, 33665, 3 }, { 669, 2233, 941, 2, 33665, 3 }, { 915, 2233, 1011, 2, 33665, 3 }, { 1215, 2233, 1221, 2, 33665, 3 }, { 1467, 2233, 711, 2, 33665, 3 }, { 1775, 2233, 711, 2, 33665, 3 }, { 1992, 2233, 711, 2, 33665, 3 }, { 2267, 2233, 711, 2, 33665, 3 }, { 2513, 2233, 1151, 2, 33665, 3 }, { 2773, 2233, 1151, 2, 33665, 3 }, { 47, 2233, 1151, 2, 33665, 3 }, { 372, 2233, 1151, 2, 33665, 3 }, { 750, 2233, 631, 2, 33665, 3 }, { 991, 2233, 631, 2, 33665, 3 }, { 1296, 2233, 631, 2, 33665, 3 }, { 1542, 2233, 631, 2, 33665, 3 }, { 1842, 2233, 1367, 2, 33665, 3 }, { 2053, 2233, 1367, 2, 33665, 3 }, { 2352, 2233, 1367, 2, 33665, 3 }, { 2580, 2233, 1367, 2, 33665, 3 }, { 119, 2233, 1081, 2, 33665, 3 }, { 471, 2233, 1081, 2, 33665, 3 }, { 837, 2233, 1081, 2, 33665, 3 }, { 1107, 2233, 1081, 2, 33665, 3 }, { 1385, 2233, 1297, 2, 33665, 3 }, { 1661, 2233, 1297, 2, 33665, 3 }, { 1910, 2233, 1297, 2, 33665, 3 }, { 2153, 2233, 1297, 2, 33665, 3 }, { 2420, 2233, 801, 2, 33665, 3 }, { 2680, 2233, 801, 2, 33665, 3 }, { 187, 2233, 801, 2, 33665, 3 }, { 571, 2233, 801, 2, 33665, 3 }, { 301, 16, 2444, 4, 33697, 0 }, { 675, 16, 2439, 4, 33697, 0 }, { 918, 16, 493, 4, 33697, 0 }, { 1221, 16, 487, 4, 33697, 0 }, { 1470, 16, 263, 4, 33697, 0 }, { 1781, 16, 256, 4, 33697, 0 }, { 1995, 16, 137, 4, 33697, 0 }, { 2273, 16, 129, 4, 33697, 0 }, { 2516, 16, 129, 4, 33697, 0 }, { 2779, 16, 121, 4, 33697, 0 }, { 51, 16, 121, 4, 33697, 0 }, { 380, 16, 113, 4, 33697, 0 }, { 754, 16, 113, 4, 33697, 0 }, { 999, 16, 105, 4, 33697, 0 }, { 1300, 16, 105, 4, 33697, 0 }, { 1550, 16, 97, 4, 33697, 0 }, { 1846, 16, 97, 4, 33697, 0 }, { 2061, 16, 89, 4, 33697, 0 }, { 2356, 16, 89, 4, 33697, 0 }, { 2588, 16, 81, 4, 33697, 0 }, { 123, 16, 81, 4, 33697, 0 }, { 479, 16, 73, 4, 33697, 0 }, { 841, 16, 207, 4, 33697, 0 }, { 1115, 16, 199, 4, 33697, 0 }, { 1389, 16, 287, 4, 33697, 0 }, { 1669, 16, 280, 4, 33697, 0 }, { 1914, 16, 785, 4, 33697, 0 }, { 2161, 16, 779, 4, 33697, 0 }, { 2424, 16, 2429, 4, 33697, 0 }, { 2688, 16, 2434, 4, 31986, 0 }, { 191, 16, 1439, 4, 31986, 0 }, { 304, 2427, 2455, 8, 33633, 33 }, { 681, 2427, 2452, 8, 33633, 33 }, { 921, 2427, 503, 8, 33633, 33 }, { 1227, 2427, 499, 8, 33633, 33 }, { 1473, 2427, 275, 8, 33633, 33 }, { 1787, 2427, 270, 8, 33633, 33 }, { 1998, 2427, 193, 8, 33633, 33 }, { 2297, 2427, 187, 8, 33633, 33 }, { 2519, 2427, 187, 8, 33633, 33 }, { 2803, 2427, 181, 8, 33633, 33 }, { 55, 2427, 181, 8, 33633, 33 }, { 406, 2427, 175, 8, 33633, 33 }, { 758, 2427, 175, 8, 33633, 33 }, { 1027, 2427, 169, 8, 33633, 33 }, { 1304, 2427, 169, 8, 33633, 33 }, { 1580, 2427, 163, 8, 33633, 33 }, { 1850, 2427, 163, 8, 33633, 33 }, { 2093, 2427, 157, 8, 33633, 33 }, { 2360, 2427, 157, 8, 33633, 33 }, { 2620, 2427, 151, 8, 33633, 33 }, { 127, 2427, 151, 8, 33633, 33 }, { 511, 2427, 145, 8, 33633, 33 }, { 845, 2427, 221, 8, 33633, 33 }, { 1147, 2427, 215, 8, 33633, 33 }, { 1393, 2427, 299, 8, 33633, 33 }, { 1701, 2427, 294, 8, 33633, 33 }, { 1918, 2427, 795, 8, 33633, 33 }, { 2193, 2427, 791, 8, 33633, 33 }, { 2428, 2427, 2449, 8, 33633, 33 }, { 319, 1837, 927, 16, 24049, 44 }, { 695, 1837, 997, 16, 24049, 44 }, { 934, 1837, 1067, 16, 24049, 44 }, { 1239, 1837, 1277, 16, 24049, 44 }, { 1485, 1837, 767, 16, 24049, 44 }, { 1799, 1837, 767, 16, 24049, 44 }, { 2010, 1837, 767, 16, 24049, 44 }, { 2309, 1837, 767, 16, 24049, 44 }, { 2525, 1837, 1207, 16, 24049, 44 }, { 2809, 1837, 1207, 16, 24049, 44 }, { 62, 1837, 1207, 16, 24049, 44 }, { 420, 1837, 1207, 16, 24049, 44 }, { 773, 1837, 687, 16, 24049, 44 }, { 1043, 1837, 687, 16, 24049, 44 }, { 1318, 1837, 687, 16, 24049, 44 }, { 1594, 1837, 687, 16, 24049, 44 }, { 1866, 1837, 1423, 16, 24049, 44 }, { 2109, 1837, 1423, 16, 24049, 44 }, { 2376, 1837, 1423, 16, 24049, 44 }, { 2636, 1837, 1423, 16, 24049, 44 }, { 143, 1837, 1137, 16, 24049, 44 }, { 527, 1837, 1137, 16, 24049, 44 }, { 861, 1837, 1137, 16, 24049, 44 }, { 1163, 1837, 1137, 16, 24049, 44 }, { 1409, 1837, 1353, 16, 24049, 44 }, { 1717, 1837, 1353, 16, 24049, 44 }, { 1934, 1837, 1353, 16, 24049, 44 }, { 2209, 1837, 1353, 16, 24049, 44 }, { 2436, 1837, 857, 16, 24049, 44 }, { 2696, 1837, 857, 16, 24049, 44 }, { 199, 1837, 857, 16, 24049, 44 }, { 587, 1837, 857, 16, 24049, 44 }, { 235, 598, 2005, 46, 0, 82 }, { 240, 626, 2086, 13, 6024, 41 }, { 618, 626, 2038, 13, 6024, 41 }, { 868, 626, 2062, 13, 5976, 41 }, { 1170, 626, 2014, 13, 5976, 41 }, { 1424, 626, 2074, 13, 5928, 41 }, { 1732, 626, 2026, 13, 5928, 41 }, { 1949, 626, 2050, 13, 5880, 41 }, { 2224, 626, 2002, 13, 5880, 41 }, { 260, 614, 2052, 30, 280, 73 }, { 637, 614, 2004, 30, 280, 73 }, { 272, 16, 2091, 4, 31960, 0 }, { 648, 16, 2043, 4, 31960, 0 }, { 895, 16, 2067, 4, 31928, 0 }, { 1196, 16, 2019, 4, 31928, 0 }, { 1450, 16, 2079, 4, 31896, 0 }, { 1758, 16, 2031, 4, 31896, 0 }, { 1975, 16, 2055, 4, 31864, 0 }, { 2250, 16, 2007, 4, 31864, 0 }, { 2496, 16, 2085, 4, 31832, 0 }, { 2756, 16, 2037, 4, 31832, 0 }, { 28, 16, 2061, 4, 31800, 0 }, { 352, 16, 2013, 4, 31800, 0 }, { 729, 16, 2073, 4, 31768, 0 }, { 969, 16, 2025, 4, 31768, 0 }, { 1274, 16, 2049, 4, 31736, 0 }, { 1520, 16, 2001, 4, 31736, 0 }, { 292, 622, 2075, 23, 936, 68 }, { 667, 622, 2027, 23, 936, 68 }, { 913, 622, 2051, 23, 856, 68 }, { 1213, 622, 2003, 23, 856, 68 }, { 297, 16, 16, 4, 29120, 0 }, { 2851, 16, 926, 4, 33553, 0 }, { 2878, 16, 996, 4, 33553, 0 }, { 2898, 16, 1066, 4, 33553, 0 }, { 2918, 16, 1276, 4, 33553, 0 }, { 2938, 16, 766, 4, 33553, 0 }, { 2958, 16, 766, 4, 33553, 0 }, { 2978, 16, 766, 4, 33553, 0 }, { 2998, 16, 766, 4, 33553, 0 }, { 3018, 16, 1206, 4, 33553, 0 }, { 3038, 16, 1206, 4, 33553, 0 }, { 2830, 16, 1206, 4, 33553, 0 }, { 2857, 16, 1206, 4, 33553, 0 }, { 2884, 16, 686, 4, 33553, 0 }, { 2904, 16, 686, 4, 33553, 0 }, { 2924, 16, 686, 4, 33553, 0 }, { 2944, 16, 686, 4, 33553, 0 }, { 2964, 16, 1422, 4, 33553, 0 }, { 2984, 16, 1422, 4, 33553, 0 }, { 3004, 16, 1422, 4, 33553, 0 }, { 3024, 16, 1422, 4, 33553, 0 }, { 2837, 16, 1136, 4, 33553, 0 }, { 2864, 16, 1136, 4, 33553, 0 }, { 2891, 16, 1136, 4, 33553, 0 }, { 2911, 16, 1136, 4, 33553, 0 }, { 2931, 16, 1352, 4, 33553, 0 }, { 2951, 16, 1352, 4, 33553, 0 }, { 2971, 16, 1352, 4, 33553, 0 }, { 2991, 16, 1352, 4, 33553, 0 }, { 3011, 16, 856, 4, 33553, 0 }, { 3031, 16, 856, 4, 33553, 0 }, { 2844, 16, 856, 4, 33553, 0 }, { 2871, 16, 856, 4, 33553, 0 }, { 631, 2236, 460, 77, 7025, 101 }, { 880, 2236, 1468, 77, 7025, 101 }, { 1181, 2236, 442, 77, 7025, 101 }, { 1435, 2236, 442, 77, 7025, 101 }, { 1743, 2236, 442, 77, 7025, 101 }, { 1960, 2236, 442, 77, 7025, 101 }, { 2235, 2236, 442, 77, 7025, 101 }, { 2481, 2236, 442, 77, 7025, 101 }, { 2741, 2236, 442, 77, 7025, 101 }, { 10, 2236, 442, 77, 7025, 101 }, { 332, 2236, 442, 77, 7025, 101 }, { 709, 2236, 442, 77, 7025, 101 }, { 949, 2236, 442, 77, 7025, 101 }, { 1254, 2236, 442, 77, 7025, 101 }, { 1500, 2236, 442, 77, 7025, 101 }, { 1814, 2236, 442, 77, 7025, 101 }, { 2025, 2236, 442, 77, 7025, 101 }, { 2324, 2236, 442, 77, 7025, 101 }, { 2552, 2236, 442, 77, 7025, 101 }, { 91, 2236, 442, 77, 7025, 101 }, { 443, 2236, 442, 77, 7025, 101 }, { 809, 2236, 442, 77, 7025, 101 }, { 1079, 2236, 442, 77, 7025, 101 }, { 1357, 2236, 442, 77, 7025, 101 }, { 1633, 2236, 442, 77, 7025, 101 }, { 1882, 2236, 442, 77, 7025, 101 }, { 2125, 2236, 442, 77, 7025, 101 }, { 2392, 2236, 442, 77, 7025, 101 }, { 2652, 2236, 442, 77, 7025, 101 }, { 159, 2236, 442, 77, 7025, 101 }, { 543, 2236, 442, 77, 7025, 101 }, { 253, 2227, 442, 77, 23776, 2 }, { 1175, 2368, 1822, 116, 1089, 108 }, { 1429, 2368, 1822, 116, 1089, 108 }, { 1737, 2368, 1822, 116, 1089, 108 }, { 1954, 2368, 1822, 116, 1089, 108 }, { 2229, 2368, 1822, 116, 1089, 108 }, { 2475, 2368, 1822, 116, 1089, 108 }, { 2735, 2368, 1822, 116, 1089, 108 }, { 4, 2368, 1822, 116, 1089, 108 }, { 326, 2368, 1822, 116, 1089, 108 }, { 702, 2368, 1822, 116, 1089, 108 }, { 941, 2368, 1822, 116, 1089, 108 }, { 1246, 2368, 1822, 116, 1089, 108 }, { 1492, 2368, 1822, 116, 1089, 108 }, { 1806, 2368, 1822, 116, 1089, 108 }, { 2017, 2368, 1822, 116, 1089, 108 }, { 2316, 2368, 1822, 116, 1089, 108 }, { 2544, 2368, 1822, 116, 1089, 108 }, { 83, 2368, 1822, 116, 1089, 108 }, { 435, 2368, 1822, 116, 1089, 108 }, { 801, 2368, 1822, 116, 1089, 108 }, { 1071, 2368, 1822, 116, 1089, 108 }, { 1349, 2368, 1822, 116, 1089, 108 }, { 1625, 2368, 1822, 116, 1089, 108 }, { 1874, 2368, 1822, 116, 1089, 108 }, { 2117, 2368, 1822, 116, 1089, 108 }, { 2384, 2368, 1822, 116, 1089, 108 }, { 2644, 2368, 1822, 116, 1089, 108 }, { 151, 2368, 1822, 116, 1089, 108 }, { 535, 2368, 1822, 116, 1089, 108 }, { 245, 2390, 1822, 116, 3632, 113 }, { 623, 2205, 1822, 116, 4864, 99 }, { 873, 2346, 1822, 116, 23088, 5 }, { 877, 334, 1494, 101, 4033, 114 }, { 1178, 334, 478, 101, 4033, 114 }, { 1432, 334, 478, 101, 4033, 114 }, { 1740, 334, 478, 101, 4033, 114 }, { 1957, 334, 478, 101, 4033, 114 }, { 2232, 334, 478, 101, 4033, 114 }, { 2478, 334, 478, 101, 4033, 114 }, { 2738, 334, 478, 101, 4033, 114 }, { 7, 334, 478, 101, 4033, 114 }, { 329, 334, 478, 101, 4033, 114 }, { 705, 334, 478, 101, 4033, 114 }, { 945, 334, 478, 101, 4033, 114 }, { 1250, 334, 478, 101, 4033, 114 }, { 1496, 334, 478, 101, 4033, 114 }, { 1810, 334, 478, 101, 4033, 114 }, { 2021, 334, 478, 101, 4033, 114 }, { 2320, 334, 478, 101, 4033, 114 }, { 2548, 334, 478, 101, 4033, 114 }, { 87, 334, 478, 101, 4033, 114 }, { 439, 334, 478, 101, 4033, 114 }, { 805, 334, 478, 101, 4033, 114 }, { 1075, 334, 478, 101, 4033, 114 }, { 1353, 334, 478, 101, 4033, 114 }, { 1629, 334, 478, 101, 4033, 114 }, { 1878, 334, 478, 101, 4033, 114 }, { 2121, 334, 478, 101, 4033, 114 }, { 2388, 334, 478, 101, 4033, 114 }, { 2648, 334, 478, 101, 4033, 114 }, { 155, 334, 478, 101, 4033, 114 }, { 539, 334, 478, 101, 4033, 114 }, { 249, 352, 478, 101, 5088, 104 }, { 627, 2414, 478, 101, 23312, 10 }, { 642, 436, 16, 5, 6209, 29 }, { 889, 436, 16, 5, 6209, 29 }, { 1190, 436, 16, 5, 6209, 29 }, { 1444, 436, 16, 5, 6209, 29 }, { 1752, 436, 16, 5, 6209, 29 }, { 1969, 436, 16, 5, 6209, 29 }, { 2244, 436, 16, 5, 6209, 29 }, { 2490, 436, 16, 5, 6209, 29 }, { 2750, 436, 16, 5, 6209, 29 }, { 21, 436, 16, 5, 6209, 29 }, { 344, 436, 16, 5, 6209, 29 }, { 721, 436, 16, 5, 6209, 29 }, { 961, 436, 16, 5, 6209, 29 }, { 1266, 436, 16, 5, 6209, 29 }, { 1512, 436, 16, 5, 6209, 29 }, { 265, 2463, 16, 5, 20624, 26 }, { 661, 1859, 466, 138, 6161, 120 }, { 907, 1859, 1474, 138, 6161, 120 }, { 1207, 1859, 448, 138, 6161, 120 }, { 1461, 1859, 448, 138, 6161, 120 }, { 1769, 1859, 448, 138, 6161, 120 }, { 1986, 1859, 448, 138, 6161, 120 }, { 2261, 1859, 448, 138, 6161, 120 }, { 2507, 1859, 448, 138, 6161, 120 }, { 2767, 1859, 448, 138, 6161, 120 }, { 40, 1859, 448, 138, 6161, 120 }, { 364, 1859, 448, 138, 6161, 120 }, { 742, 1859, 448, 138, 6161, 120 }, { 983, 1859, 448, 138, 6161, 120 }, { 1288, 1859, 448, 138, 6161, 120 }, { 1534, 1859, 448, 138, 6161, 120 }, { 1834, 1859, 448, 138, 6161, 120 }, { 2045, 1859, 448, 138, 6161, 120 }, { 2344, 1859, 448, 138, 6161, 120 }, { 2572, 1859, 448, 138, 6161, 120 }, { 111, 1859, 448, 138, 6161, 120 }, { 463, 1859, 448, 138, 6161, 120 }, { 829, 1859, 448, 138, 6161, 120 }, { 1099, 1859, 448, 138, 6161, 120 }, { 1377, 1859, 448, 138, 6161, 120 }, { 1653, 1859, 448, 138, 6161, 120 }, { 1902, 1859, 448, 138, 6161, 120 }, { 2145, 1859, 448, 138, 6161, 120 }, { 2412, 1859, 448, 138, 6161, 120 }, { 2672, 1859, 448, 138, 6161, 120 }, { 179, 1859, 448, 138, 6161, 120 }, { 563, 1859, 448, 138, 6161, 120 }, { 285, 1877, 448, 138, 23776, 14 }, { 1201, 2282, 1823, 171, 1009, 127 }, { 1455, 2282, 1823, 171, 1009, 127 }, { 1763, 2282, 1823, 171, 1009, 127 }, { 1980, 2282, 1823, 171, 1009, 127 }, { 2255, 2282, 1823, 171, 1009, 127 }, { 2501, 2282, 1823, 171, 1009, 127 }, { 2761, 2282, 1823, 171, 1009, 127 }, { 34, 2282, 1823, 171, 1009, 127 }, { 358, 2282, 1823, 171, 1009, 127 }, { 735, 2282, 1823, 171, 1009, 127 }, { 975, 2282, 1823, 171, 1009, 127 }, { 1280, 2282, 1823, 171, 1009, 127 }, { 1526, 2282, 1823, 171, 1009, 127 }, { 1826, 2282, 1823, 171, 1009, 127 }, { 2037, 2282, 1823, 171, 1009, 127 }, { 2336, 2282, 1823, 171, 1009, 127 }, { 2564, 2282, 1823, 171, 1009, 127 }, { 103, 2282, 1823, 171, 1009, 127 }, { 455, 2282, 1823, 171, 1009, 127 }, { 821, 2282, 1823, 171, 1009, 127 }, { 1091, 2282, 1823, 171, 1009, 127 }, { 1369, 2282, 1823, 171, 1009, 127 }, { 1645, 2282, 1823, 171, 1009, 127 }, { 1894, 2282, 1823, 171, 1009, 127 }, { 2137, 2282, 1823, 171, 1009, 127 }, { 2404, 2282, 1823, 171, 1009, 127 }, { 2664, 2282, 1823, 171, 1009, 127 }, { 171, 2282, 1823, 171, 1009, 127 }, { 555, 2282, 1823, 171, 1009, 127 }, { 277, 2314, 1823, 171, 3632, 132 }, { 653, 2173, 1823, 171, 4864, 118 }, { 900, 2250, 1823, 171, 23088, 17 }, { 904, 2108, 1497, 150, 3969, 133 }, { 1204, 2108, 481, 150, 3969, 133 }, { 1458, 2108, 481, 150, 3969, 133 }, { 1766, 2108, 481, 150, 3969, 133 }, { 1983, 2108, 481, 150, 3969, 133 }, { 2258, 2108, 481, 150, 3969, 133 }, { 2504, 2108, 481, 150, 3969, 133 }, { 2764, 2108, 481, 150, 3969, 133 }, { 37, 2108, 481, 150, 3969, 133 }, { 361, 2108, 481, 150, 3969, 133 }, { 738, 2108, 481, 150, 3969, 133 }, { 979, 2108, 481, 150, 3969, 133 }, { 1284, 2108, 481, 150, 3969, 133 }, { 1530, 2108, 481, 150, 3969, 133 }, { 1830, 2108, 481, 150, 3969, 133 }, { 2041, 2108, 481, 150, 3969, 133 }, { 2340, 2108, 481, 150, 3969, 133 }, { 2568, 2108, 481, 150, 3969, 133 }, { 107, 2108, 481, 150, 3969, 133 }, { 459, 2108, 481, 150, 3969, 133 }, { 825, 2108, 481, 150, 3969, 133 }, { 1095, 2108, 481, 150, 3969, 133 }, { 1373, 2108, 481, 150, 3969, 133 }, { 1649, 2108, 481, 150, 3969, 133 }, { 1898, 2108, 481, 150, 3969, 133 }, { 2141, 2108, 481, 150, 3969, 133 }, { 2408, 2108, 481, 150, 3969, 133 }, { 2668, 2108, 481, 150, 3969, 133 }, { 175, 2108, 481, 150, 3969, 133 }, { 559, 2108, 481, 150, 3969, 133 }, { 281, 2129, 481, 150, 5088, 123 }, { 657, 2150, 481, 150, 23312, 22 }, { 3044, 2745, 16, 203, 560, 146 }, { 2276, 2720, 16, 203, 418, 137 }, { 2782, 2695, 16, 203, 418, 137 }, { 384, 2670, 16, 203, 418, 137 }, { 1003, 2645, 16, 203, 418, 137 }, { 1554, 2620, 16, 203, 418, 137 }, { 2065, 2595, 16, 203, 418, 137 }, { 2592, 2570, 16, 203, 418, 137 }, { 483, 2545, 16, 203, 418, 137 }, { 1119, 2520, 16, 203, 418, 137 }, { 1673, 2495, 16, 203, 418, 137 }, { 2165, 2470, 16, 203, 418, 137 }, { 3091, 2099, 1328, 10, 8144, 38 }, { 672, 391, 2441, 10, 6114, 38 }, { 1218, 394, 489, 10, 6114, 38 }, { 1778, 397, 258, 10, 6114, 38 }, { 2270, 400, 75, 10, 6114, 38 }, { 2776, 403, 75, 10, 6114, 38 }, { 376, 406, 75, 10, 6114, 38 }, { 995, 409, 75, 10, 6114, 38 }, { 1546, 412, 75, 10, 6114, 38 }, { 2057, 415, 75, 10, 6114, 38 }, { 2584, 418, 75, 10, 6114, 38 }, { 475, 421, 75, 10, 6114, 38 }, { 1111, 424, 201, 10, 6114, 38 }, { 1665, 427, 282, 10, 6114, 38 }, { 2157, 430, 781, 10, 6114, 38 }, { 2684, 433, 2431, 10, 24146, 35 }, { 3099, 1973, 16, 228, 9474, 155 }, { 3068, 1871, 2432, 228, 24096, 32 }, { 678, 1967, 2432, 228, 6066, 155 }, { 1224, 1961, 490, 228, 6066, 155 }, { 1784, 1955, 259, 228, 6066, 155 }, { 2294, 1949, 76, 228, 6066, 155 }, { 2800, 1943, 76, 228, 6066, 155 }, { 402, 1937, 76, 228, 6066, 155 }, { 1023, 1931, 76, 228, 6066, 155 }, { 1576, 1925, 76, 228, 6066, 155 }, { 2089, 1919, 76, 228, 6066, 155 }, { 2616, 1913, 76, 228, 6066, 155 }, { 507, 1907, 76, 228, 6066, 155 }, { 1143, 1901, 202, 228, 6066, 155 }, { 1697, 1895, 283, 228, 6066, 155 }, { 2189, 1889, 782, 228, 6066, 155 }, { 692, 1512, 472, 234, 5265, 158 }, { 931, 1512, 1480, 234, 5265, 158 }, { 1236, 1512, 454, 234, 5265, 158 }, { 1482, 1512, 454, 234, 5265, 158 }, { 1796, 1512, 454, 234, 5265, 158 }, { 2007, 1512, 454, 234, 5265, 158 }, { 2306, 1512, 454, 234, 5265, 158 }, { 2534, 1512, 454, 234, 5265, 158 }, { 2818, 1512, 454, 234, 5265, 158 }, { 72, 1512, 454, 234, 5265, 158 }, { 416, 1512, 454, 234, 5265, 158 }, { 769, 1512, 454, 234, 5265, 158 }, { 1039, 1512, 454, 234, 5265, 158 }, { 1330, 1512, 454, 234, 5265, 158 }, { 1606, 1512, 454, 234, 5265, 158 }, { 1862, 1512, 454, 234, 5265, 158 }, { 2105, 1512, 454, 234, 5265, 158 }, { 2372, 1512, 454, 234, 5265, 158 }, { 2632, 1512, 454, 234, 5265, 158 }, { 139, 1512, 454, 234, 5265, 158 }, { 523, 1512, 454, 234, 5265, 158 }, { 857, 1512, 454, 234, 5265, 158 }, { 1159, 1512, 454, 234, 5265, 158 }, { 1405, 1512, 454, 234, 5265, 158 }, { 1713, 1512, 454, 234, 5265, 158 }, { 1930, 1512, 454, 234, 5265, 158 }, { 2205, 1512, 454, 234, 5265, 158 }, { 2464, 1512, 454, 234, 5265, 158 }, { 2724, 1512, 454, 234, 5265, 158 }, { 227, 1512, 454, 234, 5265, 158 }, { 583, 1512, 454, 234, 5265, 158 }, { 315, 1529, 454, 234, 23824, 47 }, { 1230, 1728, 16, 281, 705, 179 }, { 1476, 1728, 16, 281, 705, 179 }, { 1790, 1728, 16, 281, 705, 179 }, { 2001, 1728, 16, 281, 705, 179 }, { 2300, 1728, 16, 281, 705, 179 }, { 2528, 1728, 16, 281, 705, 179 }, { 2812, 1728, 16, 281, 705, 179 }, { 66, 1728, 16, 281, 705, 179 }, { 410, 1728, 16, 281, 705, 179 }, { 762, 1728, 16, 281, 705, 179 }, { 1031, 1728, 16, 281, 705, 179 }, { 1322, 1728, 16, 281, 705, 179 }, { 1598, 1728, 16, 281, 705, 179 }, { 1854, 1728, 16, 281, 705, 179 }, { 2097, 1728, 16, 281, 705, 179 }, { 2364, 1728, 16, 281, 705, 179 }, { 2624, 1728, 16, 281, 705, 179 }, { 131, 1728, 16, 281, 705, 179 }, { 515, 1728, 16, 281, 705, 179 }, { 849, 1728, 16, 281, 705, 179 }, { 1151, 1728, 16, 281, 705, 179 }, { 1397, 1728, 16, 281, 705, 179 }, { 1705, 1728, 16, 281, 705, 179 }, { 1922, 1728, 16, 281, 705, 179 }, { 2197, 1728, 16, 281, 705, 179 }, { 2456, 1728, 16, 281, 705, 179 }, { 2716, 1728, 16, 281, 705, 179 }, { 219, 1728, 16, 281, 705, 179 }, { 575, 1728, 16, 281, 705, 179 }, { 307, 1774, 16, 281, 3712, 188 }, { 684, 1636, 16, 281, 4944, 163 }, { 924, 1682, 16, 281, 23168, 52 }, { 928, 1546, 1500, 251, 3857, 197 }, { 1233, 1546, 457, 251, 3857, 197 }, { 1479, 1546, 457, 251, 3857, 197 }, { 1793, 1546, 457, 251, 3857, 197 }, { 2004, 1546, 457, 251, 3857, 197 }, { 2303, 1546, 457, 251, 3857, 197 }, { 2531, 1546, 457, 251, 3857, 197 }, { 2815, 1546, 457, 251, 3857, 197 }, { 69, 1546, 457, 251, 3857, 197 }, { 413, 1546, 457, 251, 3857, 197 }, { 765, 1546, 457, 251, 3857, 197 }, { 1035, 1546, 457, 251, 3857, 197 }, { 1326, 1546, 457, 251, 3857, 197 }, { 1602, 1546, 457, 251, 3857, 197 }, { 1858, 1546, 457, 251, 3857, 197 }, { 2101, 1546, 457, 251, 3857, 197 }, { 2368, 1546, 457, 251, 3857, 197 }, { 2628, 1546, 457, 251, 3857, 197 }, { 135, 1546, 457, 251, 3857, 197 }, { 519, 1546, 457, 251, 3857, 197 }, { 853, 1546, 457, 251, 3857, 197 }, { 1155, 1546, 457, 251, 3857, 197 }, { 1401, 1546, 457, 251, 3857, 197 }, { 1709, 1546, 457, 251, 3857, 197 }, { 1926, 1546, 457, 251, 3857, 197 }, { 2201, 1546, 457, 251, 3857, 197 }, { 2460, 1546, 457, 251, 3857, 197 }, { 2720, 1546, 457, 251, 3857, 197 }, { 223, 1546, 457, 251, 3857, 197 }, { 579, 1546, 457, 251, 3857, 197 }, { 311, 1576, 457, 251, 5152, 172 }, { 688, 1606, 457, 251, 23376, 61 }, { 1413, 1844, 1328, 86, 11265, 158 }, { 1721, 1844, 1328, 86, 11265, 158 }, { 1938, 1844, 1328, 86, 11265, 158 }, { 2213, 1844, 1328, 86, 11265, 158 }, { 2432, 1844, 832, 86, 11265, 158 }, { 2692, 1844, 832, 86, 11265, 158 }, { 195, 1844, 832, 86, 11265, 158 }, { 591, 1844, 832, 86, 11265, 158 }, { 2522, 1829, 832, 86, 11185, 158 }, { 2806, 1829, 832, 86, 11185, 158 }, { 59, 1829, 832, 86, 11185, 158 }, { 424, 1829, 832, 86, 11185, 158 }, { 777, 1829, 627, 86, 11185, 158 }, { 1047, 1829, 627, 86, 11185, 158 }, { 1338, 1829, 627, 86, 11185, 158 }, { 1614, 1829, 627, 86, 11185, 158 }, { 2440, 530, 16, 327, 8337, 179 }, { 2700, 530, 16, 327, 8337, 179 }, { 203, 530, 16, 327, 8337, 179 }, { 599, 530, 16, 327, 8337, 179 }, { 784, 561, 16, 327, 8193, 179 }, { 1054, 561, 16, 327, 8193, 179 }, { 1308, 561, 16, 327, 8193, 179 }, { 1584, 561, 16, 327, 8193, 179 }, }; extern const MCPhysReg AArch64RegUnitRoots[][2] = { { AArch64::FFR }, { AArch64::W29 }, { AArch64::FPCR }, { AArch64::W30 }, { AArch64::NZCV }, { AArch64::WSP }, { AArch64::VG }, { AArch64::WZR }, { AArch64::ZAQ0 }, { AArch64::ZAQ8 }, { AArch64::ZAQ4 }, { AArch64::ZAQ12 }, { AArch64::ZAQ2 }, { AArch64::ZAQ10 }, { AArch64::ZAQ6 }, { AArch64::ZAQ14 }, { AArch64::ZAQ1 }, { AArch64::ZAQ9 }, { AArch64::ZAQ5 }, { AArch64::ZAQ13 }, { AArch64::ZAQ3 }, { AArch64::ZAQ11 }, { AArch64::ZAQ7 }, { AArch64::ZAQ15 }, { AArch64::B0 }, { AArch64::B1 }, { AArch64::B2 }, { AArch64::B3 }, { AArch64::B4 }, { AArch64::B5 }, { AArch64::B6 }, { AArch64::B7 }, { AArch64::B8 }, { AArch64::B9 }, { AArch64::B10 }, { AArch64::B11 }, { AArch64::B12 }, { AArch64::B13 }, { AArch64::B14 }, { AArch64::B15 }, { AArch64::B16 }, { AArch64::B17 }, { AArch64::B18 }, { AArch64::B19 }, { AArch64::B20 }, { AArch64::B21 }, { AArch64::B22 }, { AArch64::B23 }, { AArch64::B24 }, { AArch64::B25 }, { AArch64::B26 }, { AArch64::B27 }, { AArch64::B28 }, { AArch64::B29 }, { AArch64::B30 }, { AArch64::B31 }, { AArch64::P0 }, { AArch64::P1 }, { AArch64::P2 }, { AArch64::P3 }, { AArch64::P4 }, { AArch64::P5 }, { AArch64::P6 }, { AArch64::P7 }, { AArch64::P8 }, { AArch64::P9 }, { AArch64::P10 }, { AArch64::P11 }, { AArch64::P12 }, { AArch64::P13 }, { AArch64::P14 }, { AArch64::P15 }, { AArch64::W0 }, { AArch64::W1 }, { AArch64::W2 }, { AArch64::W3 }, { AArch64::W4 }, { AArch64::W5 }, { AArch64::W6 }, { AArch64::W7 }, { AArch64::W8 }, { AArch64::W9 }, { AArch64::W10 }, { AArch64::W11 }, { AArch64::W12 }, { AArch64::W13 }, { AArch64::W14 }, { AArch64::W15 }, { AArch64::W16 }, { AArch64::W17 }, { AArch64::W18 }, { AArch64::W19 }, { AArch64::W20 }, { AArch64::W21 }, { AArch64::W22 }, { AArch64::W23 }, { AArch64::W24 }, { AArch64::W25 }, { AArch64::W26 }, { AArch64::W27 }, { AArch64::W28 }, { AArch64::Z0_HI }, { AArch64::Z1_HI }, { AArch64::Z2_HI }, { AArch64::Z3_HI }, { AArch64::Z4_HI }, { AArch64::Z5_HI }, { AArch64::Z6_HI }, { AArch64::Z7_HI }, { AArch64::Z8_HI }, { AArch64::Z9_HI }, { AArch64::Z10_HI }, { AArch64::Z11_HI }, { AArch64::Z12_HI }, { AArch64::Z13_HI }, { AArch64::Z14_HI }, { AArch64::Z15_HI }, { AArch64::Z16_HI }, { AArch64::Z17_HI }, { AArch64::Z18_HI }, { AArch64::Z19_HI }, { AArch64::Z20_HI }, { AArch64::Z21_HI }, { AArch64::Z22_HI }, { AArch64::Z23_HI }, { AArch64::Z24_HI }, { AArch64::Z25_HI }, { AArch64::Z26_HI }, { AArch64::Z27_HI }, { AArch64::Z28_HI }, { AArch64::Z29_HI }, { AArch64::Z30_HI }, { AArch64::Z31_HI }, { AArch64::ZT0 }, }; namespace { // Register classes... // FPR8 Register Class... const MCPhysReg FPR8[] = { AArch64::B0, AArch64::B1, AArch64::B2, AArch64::B3, AArch64::B4, AArch64::B5, AArch64::B6, AArch64::B7, AArch64::B8, AArch64::B9, AArch64::B10, AArch64::B11, AArch64::B12, AArch64::B13, AArch64::B14, AArch64::B15, AArch64::B16, AArch64::B17, AArch64::B18, AArch64::B19, AArch64::B20, AArch64::B21, AArch64::B22, AArch64::B23, AArch64::B24, AArch64::B25, AArch64::B26, AArch64::B27, AArch64::B28, AArch64::B29, AArch64::B30, AArch64::B31, }; // FPR8 Bit set. const uint8_t FPR8Bits[] = { 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, }; // FPR16 Register Class... const MCPhysReg FPR16[] = { AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7, AArch64::H8, AArch64::H9, AArch64::H10, AArch64::H11, AArch64::H12, AArch64::H13, AArch64::H14, AArch64::H15, AArch64::H16, AArch64::H17, AArch64::H18, AArch64::H19, AArch64::H20, AArch64::H21, AArch64::H22, AArch64::H23, AArch64::H24, AArch64::H25, AArch64::H26, AArch64::H27, AArch64::H28, AArch64::H29, AArch64::H30, AArch64::H31, }; // FPR16 Bit set. const uint8_t FPR16Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, }; // FPR16_lo Register Class... const MCPhysReg FPR16_lo[] = { AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7, AArch64::H8, AArch64::H9, AArch64::H10, AArch64::H11, AArch64::H12, AArch64::H13, AArch64::H14, AArch64::H15, }; // FPR16_lo Bit set. const uint8_t FPR16_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, }; // PPR Register Class... const MCPhysReg PPR[] = { AArch64::P0, AArch64::P1, AArch64::P2, AArch64::P3, AArch64::P4, AArch64::P5, AArch64::P6, AArch64::P7, AArch64::P8, AArch64::P9, AArch64::P10, AArch64::P11, AArch64::P12, AArch64::P13, AArch64::P14, AArch64::P15, }; // PPR Bit set. const uint8_t PPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, }; // PPR_3b Register Class... const MCPhysReg PPR_3b[] = { AArch64::P0, AArch64::P1, AArch64::P2, AArch64::P3, AArch64::P4, AArch64::P5, AArch64::P6, AArch64::P7, }; // PPR_3b Bit set. const uint8_t PPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, }; // PPR_p8to15 Register Class... const MCPhysReg PPR_p8to15[] = { AArch64::P8, AArch64::P9, AArch64::P10, AArch64::P11, AArch64::P12, AArch64::P13, AArch64::P14, AArch64::P15, }; // PPR_p8to15 Bit set. const uint8_t PPR_p8to15Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, }; // PPR2 Register Class... const MCPhysReg PPR2[] = { AArch64::P0_P1, AArch64::P1_P2, AArch64::P2_P3, AArch64::P3_P4, AArch64::P4_P5, AArch64::P5_P6, AArch64::P6_P7, AArch64::P7_P8, AArch64::P8_P9, AArch64::P9_P10, AArch64::P10_P11, AArch64::P11_P12, AArch64::P12_P13, AArch64::P13_P14, AArch64::P14_P15, AArch64::P15_P0, }; // PPR2 Bit set. const uint8_t PPR2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, }; // PPR2Mul2 Register Class... const MCPhysReg PPR2Mul2[] = { AArch64::P0_P1, AArch64::P2_P3, AArch64::P4_P5, AArch64::P6_P7, AArch64::P8_P9, AArch64::P10_P11, AArch64::P12_P13, AArch64::P14_P15, }; // PPR2Mul2 Bit set. const uint8_t PPR2Mul2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0x55, }; // PPR2_with_psub0_in_PPR_3b Register Class... const MCPhysReg PPR2_with_psub0_in_PPR_3b[] = { AArch64::P0_P1, AArch64::P1_P2, AArch64::P2_P3, AArch64::P3_P4, AArch64::P4_P5, AArch64::P5_P6, AArch64::P6_P7, AArch64::P7_P8, }; // PPR2_with_psub0_in_PPR_3b Bit set. const uint8_t PPR2_with_psub0_in_PPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, }; // PPR2_with_psub0_in_PPR_p8to15 Register Class... const MCPhysReg PPR2_with_psub0_in_PPR_p8to15[] = { AArch64::P8_P9, AArch64::P9_P10, AArch64::P10_P11, AArch64::P11_P12, AArch64::P12_P13, AArch64::P13_P14, AArch64::P14_P15, AArch64::P15_P0, }; // PPR2_with_psub0_in_PPR_p8to15 Bit set. const uint8_t PPR2_with_psub0_in_PPR_p8to15Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, }; // PPR2_with_psub1_in_PPR_3b Register Class... const MCPhysReg PPR2_with_psub1_in_PPR_3b[] = { AArch64::P0_P1, AArch64::P1_P2, AArch64::P2_P3, AArch64::P3_P4, AArch64::P4_P5, AArch64::P5_P6, AArch64::P6_P7, AArch64::P15_P0, }; // PPR2_with_psub1_in_PPR_3b Bit set. const uint8_t PPR2_with_psub1_in_PPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, 0x80, }; // PPR2_with_psub1_in_PPR_p8to15 Register Class... const MCPhysReg PPR2_with_psub1_in_PPR_p8to15[] = { AArch64::P7_P8, AArch64::P8_P9, AArch64::P9_P10, AArch64::P10_P11, AArch64::P11_P12, AArch64::P12_P13, AArch64::P13_P14, AArch64::P14_P15, }; // PPR2_with_psub1_in_PPR_p8to15 Bit set. const uint8_t PPR2_with_psub1_in_PPR_p8to15Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x7f, }; // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b Register Class... const MCPhysReg PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b[] = { AArch64::P0_P1, AArch64::P1_P2, AArch64::P2_P3, AArch64::P3_P4, AArch64::P4_P5, AArch64::P5_P6, AArch64::P6_P7, }; // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b Bit set. const uint8_t PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, }; // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15 Register Class... const MCPhysReg PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15[] = { AArch64::P8_P9, AArch64::P9_P10, AArch64::P10_P11, AArch64::P11_P12, AArch64::P12_P13, AArch64::P13_P14, AArch64::P14_P15, }; // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15 Bit set. const uint8_t PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, }; // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b Register Class... const MCPhysReg PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b[] = { AArch64::P0_P1, AArch64::P2_P3, AArch64::P4_P5, AArch64::P6_P7, }; // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b Bit set. const uint8_t PPR2Mul2_and_PPR2_with_psub0_in_PPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, }; // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15 Register Class... const MCPhysReg PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15[] = { AArch64::P8_P9, AArch64::P10_P11, AArch64::P12_P13, AArch64::P14_P15, }; // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15 Bit set. const uint8_t PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, }; // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15 Register Class... const MCPhysReg PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15[] = { AArch64::P7_P8, }; // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15 Bit set. const uint8_t PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, }; // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b Register Class... const MCPhysReg PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b[] = { AArch64::P15_P0, }; // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b Bit set. const uint8_t PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, }; // GPR32all Register Class... const MCPhysReg GPR32all[] = { AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WZR, AArch64::WSP, }; // GPR32all Bit set. const uint8_t GPR32allBits[] = { 0x00, 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x07, }; // FPR32 Register Class... const MCPhysReg FPR32[] = { AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7, AArch64::S8, AArch64::S9, AArch64::S10, AArch64::S11, AArch64::S12, AArch64::S13, AArch64::S14, AArch64::S15, AArch64::S16, AArch64::S17, AArch64::S18, AArch64::S19, AArch64::S20, AArch64::S21, AArch64::S22, AArch64::S23, AArch64::S24, AArch64::S25, AArch64::S26, AArch64::S27, AArch64::S28, AArch64::S29, AArch64::S30, AArch64::S31, }; // FPR32 Bit set. const uint8_t FPR32Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, }; // GPR32 Register Class... const MCPhysReg GPR32[] = { AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WZR, }; // GPR32 Bit set. const uint8_t GPR32Bits[] = { 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x07, }; // GPR32sp Register Class... const MCPhysReg GPR32sp[] = { AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WSP, }; // GPR32sp Bit set. const uint8_t GPR32spBits[] = { 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x07, }; // GPR32common Register Class... const MCPhysReg GPR32common[] = { AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, }; // GPR32common Bit set. const uint8_t GPR32commonBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x07, }; // FPR32_with_hsub_in_FPR16_lo Register Class... const MCPhysReg FPR32_with_hsub_in_FPR16_lo[] = { AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7, AArch64::S8, AArch64::S9, AArch64::S10, AArch64::S11, AArch64::S12, AArch64::S13, AArch64::S14, AArch64::S15, }; // FPR32_with_hsub_in_FPR16_lo Bit set. const uint8_t FPR32_with_hsub_in_FPR16_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, }; // GPR32arg Register Class... const MCPhysReg GPR32arg[] = { AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, }; // GPR32arg Bit set. const uint8_t GPR32argBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, }; // MatrixIndexGPR32_12_15 Register Class... const MCPhysReg MatrixIndexGPR32_12_15[] = { AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, }; // MatrixIndexGPR32_12_15 Bit set. const uint8_t MatrixIndexGPR32_12_15Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, }; // MatrixIndexGPR32_8_11 Register Class... const MCPhysReg MatrixIndexGPR32_8_11[] = { AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, }; // MatrixIndexGPR32_8_11 Bit set. const uint8_t MatrixIndexGPR32_8_11Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, }; // CCR Register Class... const MCPhysReg CCR[] = { AArch64::NZCV, }; // CCR Bit set. const uint8_t CCRBits[] = { 0x20, }; // GPR32sponly Register Class... const MCPhysReg GPR32sponly[] = { AArch64::WSP, }; // GPR32sponly Bit set. const uint8_t GPR32sponlyBits[] = { 0x00, 0x01, }; // WSeqPairsClass Register Class... const MCPhysReg WSeqPairsClass[] = { AArch64::W0_W1, AArch64::W2_W3, AArch64::W4_W5, AArch64::W6_W7, AArch64::W8_W9, AArch64::W10_W11, AArch64::W12_W13, AArch64::W14_W15, AArch64::W16_W17, AArch64::W18_W19, AArch64::W20_W21, AArch64::W22_W23, AArch64::W24_W25, AArch64::W26_W27, AArch64::W28_W29, AArch64::W30_WZR, }; // WSeqPairsClass Bit set. const uint8_t WSeqPairsClassBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, }; // WSeqPairsClass_with_subo32_in_GPR32common Register Class... const MCPhysReg WSeqPairsClass_with_subo32_in_GPR32common[] = { AArch64::W0_W1, AArch64::W2_W3, AArch64::W4_W5, AArch64::W6_W7, AArch64::W8_W9, AArch64::W10_W11, AArch64::W12_W13, AArch64::W14_W15, AArch64::W16_W17, AArch64::W18_W19, AArch64::W20_W21, AArch64::W22_W23, AArch64::W24_W25, AArch64::W26_W27, AArch64::W28_W29, }; // WSeqPairsClass_with_subo32_in_GPR32common Bit set. const uint8_t WSeqPairsClass_with_subo32_in_GPR32commonBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x0f, }; // WSeqPairsClass_with_sube32_in_GPR32arg Register Class... const MCPhysReg WSeqPairsClass_with_sube32_in_GPR32arg[] = { AArch64::W0_W1, AArch64::W2_W3, AArch64::W4_W5, AArch64::W6_W7, }; // WSeqPairsClass_with_sube32_in_GPR32arg Bit set. const uint8_t WSeqPairsClass_with_sube32_in_GPR32argBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0x01, }; // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 Register Class... const MCPhysReg WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15[] = { AArch64::W12_W13, AArch64::W14_W15, }; // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 Bit set. const uint8_t WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, }; // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 Register Class... const MCPhysReg WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11[] = { AArch64::W8_W9, AArch64::W10_W11, }; // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 Bit set. const uint8_t WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, }; // GPR64all Register Class... const MCPhysReg GPR64all[] = { AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::XZR, AArch64::SP, }; // GPR64all Bit set. const uint8_t GPR64allBits[] = { 0x54, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, }; // FPR64 Register Class... const MCPhysReg FPR64[] = { AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::D16, AArch64::D17, AArch64::D18, AArch64::D19, AArch64::D20, AArch64::D21, AArch64::D22, AArch64::D23, AArch64::D24, AArch64::D25, AArch64::D26, AArch64::D27, AArch64::D28, AArch64::D29, AArch64::D30, AArch64::D31, }; // FPR64 Bit set. const uint8_t FPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, }; // GPR64 Register Class... const MCPhysReg GPR64[] = { AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::XZR, }; // GPR64 Bit set. const uint8_t GPR64Bits[] = { 0x14, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, }; // GPR64sp Register Class... const MCPhysReg GPR64sp[] = { AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::SP, }; // GPR64sp Bit set. const uint8_t GPR64spBits[] = { 0x54, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, }; // GPR64common Register Class... const MCPhysReg GPR64common[] = { AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, }; // GPR64common Bit set. const uint8_t GPR64commonBits[] = { 0x14, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xff, 0xff, }; // GPR64noip Register Class... const MCPhysReg GPR64noip[] = { AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::XZR, }; // GPR64noip Bit set. const uint8_t GPR64noipBits[] = { 0x04, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xe7, 0xff, }; // GPR64common_and_GPR64noip Register Class... const MCPhysReg GPR64common_and_GPR64noip[] = { AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, }; // GPR64common_and_GPR64noip Bit set. const uint8_t GPR64common_and_GPR64noipBits[] = { 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0xe7, 0xff, }; // tcGPR64 Register Class... const MCPhysReg tcGPR64[] = { AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, }; // tcGPR64 Bit set. const uint8_t tcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x3f, }; // GPR64noip_and_tcGPR64 Register Class... const MCPhysReg GPR64noip_and_tcGPR64[] = { AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X18, }; // GPR64noip_and_tcGPR64 Bit set. const uint8_t GPR64noip_and_tcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x27, }; // FPR64_lo Register Class... const MCPhysReg FPR64_lo[] = { AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, }; // FPR64_lo Bit set. const uint8_t FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, }; // GPR64arg Register Class... const MCPhysReg GPR64arg[] = { AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, }; // GPR64arg Bit set. const uint8_t GPR64argBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x07, }; // FIXED_REGS Register Class... const MCPhysReg FIXED_REGS[] = { AArch64::FP, AArch64::SP, AArch64::VG, AArch64::FFR, }; // FIXED_REGS Bit set. const uint8_t FIXED_REGSBits[] = { 0xc6, }; // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 Register Class... const MCPhysReg GPR64_with_sub_32_in_MatrixIndexGPR32_12_15[] = { AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, }; // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 Bit set. const uint8_t GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x07, }; // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... const MCPhysReg GPR64_with_sub_32_in_MatrixIndexGPR32_8_11[] = { AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, }; // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. const uint8_t GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, }; // FIXED_REGS_with_sub_32 Register Class... const MCPhysReg FIXED_REGS_with_sub_32[] = { AArch64::FP, AArch64::SP, }; // FIXED_REGS_with_sub_32 Bit set. const uint8_t FIXED_REGS_with_sub_32Bits[] = { 0x44, }; // rtcGPR64 Register Class... const MCPhysReg rtcGPR64[] = { AArch64::X16, AArch64::X17, }; // rtcGPR64 Bit set. const uint8_t rtcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, }; // FIXED_REGS_and_GPR64 Register Class... const MCPhysReg FIXED_REGS_and_GPR64[] = { AArch64::FP, }; // FIXED_REGS_and_GPR64 Bit set. const uint8_t FIXED_REGS_and_GPR64Bits[] = { 0x04, }; // GPR64sponly Register Class... const MCPhysReg GPR64sponly[] = { AArch64::SP, }; // GPR64sponly Bit set. const uint8_t GPR64sponlyBits[] = { 0x40, }; // DD Register Class... const MCPhysReg DD[] = { AArch64::D0_D1, AArch64::D1_D2, AArch64::D2_D3, AArch64::D3_D4, AArch64::D4_D5, AArch64::D5_D6, AArch64::D6_D7, AArch64::D7_D8, AArch64::D8_D9, AArch64::D9_D10, AArch64::D10_D11, AArch64::D11_D12, AArch64::D12_D13, AArch64::D13_D14, AArch64::D14_D15, AArch64::D15_D16, AArch64::D16_D17, AArch64::D17_D18, AArch64::D18_D19, AArch64::D19_D20, AArch64::D20_D21, AArch64::D21_D22, AArch64::D22_D23, AArch64::D23_D24, AArch64::D24_D25, AArch64::D25_D26, AArch64::D26_D27, AArch64::D27_D28, AArch64::D28_D29, AArch64::D29_D30, AArch64::D30_D31, AArch64::D31_D0, }; // DD Bit set. const uint8_t DDBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, }; // DD_with_dsub0_in_FPR64_lo Register Class... const MCPhysReg DD_with_dsub0_in_FPR64_lo[] = { AArch64::D0_D1, AArch64::D1_D2, AArch64::D2_D3, AArch64::D3_D4, AArch64::D4_D5, AArch64::D5_D6, AArch64::D6_D7, AArch64::D7_D8, AArch64::D8_D9, AArch64::D9_D10, AArch64::D10_D11, AArch64::D11_D12, AArch64::D12_D13, AArch64::D13_D14, AArch64::D14_D15, AArch64::D15_D16, }; // DD_with_dsub0_in_FPR64_lo Bit set. const uint8_t DD_with_dsub0_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, }; // DD_with_dsub1_in_FPR64_lo Register Class... const MCPhysReg DD_with_dsub1_in_FPR64_lo[] = { AArch64::D0_D1, AArch64::D1_D2, AArch64::D2_D3, AArch64::D3_D4, AArch64::D4_D5, AArch64::D5_D6, AArch64::D6_D7, AArch64::D7_D8, AArch64::D8_D9, AArch64::D9_D10, AArch64::D10_D11, AArch64::D11_D12, AArch64::D12_D13, AArch64::D13_D14, AArch64::D14_D15, AArch64::D31_D0, }; // DD_with_dsub1_in_FPR64_lo Bit set. const uint8_t DD_with_dsub1_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x7f, 0x00, 0x80, }; // XSeqPairsClass Register Class... const MCPhysReg XSeqPairsClass[] = { AArch64::X0_X1, AArch64::X2_X3, AArch64::X4_X5, AArch64::X6_X7, AArch64::X8_X9, AArch64::X10_X11, AArch64::X12_X13, AArch64::X14_X15, AArch64::X16_X17, AArch64::X18_X19, AArch64::X20_X21, AArch64::X22_X23, AArch64::X24_X25, AArch64::X26_X27, AArch64::X28_FP, AArch64::LR_XZR, }; // XSeqPairsClass Bit set. const uint8_t XSeqPairsClassBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, }; // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo Register Class... const MCPhysReg DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo[] = { AArch64::D0_D1, AArch64::D1_D2, AArch64::D2_D3, AArch64::D3_D4, AArch64::D4_D5, AArch64::D5_D6, AArch64::D6_D7, AArch64::D7_D8, AArch64::D8_D9, AArch64::D9_D10, AArch64::D10_D11, AArch64::D11_D12, AArch64::D12_D13, AArch64::D13_D14, AArch64::D14_D15, }; // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo Bit set. const uint8_t DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x7f, }; // XSeqPairsClass_with_subo64_in_GPR64common Register Class... const MCPhysReg XSeqPairsClass_with_subo64_in_GPR64common[] = { AArch64::X0_X1, AArch64::X2_X3, AArch64::X4_X5, AArch64::X6_X7, AArch64::X8_X9, AArch64::X10_X11, AArch64::X12_X13, AArch64::X14_X15, AArch64::X16_X17, AArch64::X18_X19, AArch64::X20_X21, AArch64::X22_X23, AArch64::X24_X25, AArch64::X26_X27, AArch64::X28_FP, }; // XSeqPairsClass_with_subo64_in_GPR64common Bit set. const uint8_t XSeqPairsClass_with_subo64_in_GPR64commonBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xff, 0x0f, }; // XSeqPairsClass_with_subo64_in_GPR64noip Register Class... const MCPhysReg XSeqPairsClass_with_subo64_in_GPR64noip[] = { AArch64::X0_X1, AArch64::X2_X3, AArch64::X4_X5, AArch64::X6_X7, AArch64::X8_X9, AArch64::X10_X11, AArch64::X12_X13, AArch64::X14_X15, AArch64::X18_X19, AArch64::X20_X21, AArch64::X22_X23, AArch64::X24_X25, AArch64::X26_X27, AArch64::X28_FP, AArch64::LR_XZR, }; // XSeqPairsClass_with_subo64_in_GPR64noip Bit set. const uint8_t XSeqPairsClass_with_subo64_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xbf, 0x0f, }; // XSeqPairsClass_with_sube64_in_GPR64noip Register Class... const MCPhysReg XSeqPairsClass_with_sube64_in_GPR64noip[] = { AArch64::X0_X1, AArch64::X2_X3, AArch64::X4_X5, AArch64::X6_X7, AArch64::X8_X9, AArch64::X10_X11, AArch64::X12_X13, AArch64::X14_X15, AArch64::X18_X19, AArch64::X20_X21, AArch64::X22_X23, AArch64::X24_X25, AArch64::X26_X27, AArch64::X28_FP, }; // XSeqPairsClass_with_sube64_in_GPR64noip Bit set. const uint8_t XSeqPairsClass_with_sube64_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xe0, 0xbf, 0x0f, }; // XSeqPairsClass_with_sube64_in_tcGPR64 Register Class... const MCPhysReg XSeqPairsClass_with_sube64_in_tcGPR64[] = { AArch64::X0_X1, AArch64::X2_X3, AArch64::X4_X5, AArch64::X6_X7, AArch64::X8_X9, AArch64::X10_X11, AArch64::X12_X13, AArch64::X14_X15, AArch64::X16_X17, AArch64::X18_X19, }; // XSeqPairsClass_with_sube64_in_tcGPR64 Bit set. const uint8_t XSeqPairsClass_with_sube64_in_tcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, }; // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 Register Class... const MCPhysReg XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64[] = { AArch64::X0_X1, AArch64::X2_X3, AArch64::X4_X5, AArch64::X6_X7, AArch64::X8_X9, AArch64::X10_X11, AArch64::X12_X13, AArch64::X14_X15, AArch64::X18_X19, }; // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 Bit set. const uint8_t XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xbf, }; // XSeqPairsClass_with_subo64_in_tcGPR64 Register Class... const MCPhysReg XSeqPairsClass_with_subo64_in_tcGPR64[] = { AArch64::X0_X1, AArch64::X2_X3, AArch64::X4_X5, AArch64::X6_X7, AArch64::X8_X9, AArch64::X10_X11, AArch64::X12_X13, AArch64::X14_X15, AArch64::X16_X17, }; // XSeqPairsClass_with_subo64_in_tcGPR64 Bit set. const uint8_t XSeqPairsClass_with_subo64_in_tcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x7f, }; // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 Register Class... const MCPhysReg XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64[] = { AArch64::X0_X1, AArch64::X2_X3, AArch64::X4_X5, AArch64::X6_X7, AArch64::X8_X9, AArch64::X10_X11, AArch64::X12_X13, AArch64::X14_X15, }; // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 Bit set. const uint8_t XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x3f, }; // XSeqPairsClass_with_sub_32_in_GPR32arg Register Class... const MCPhysReg XSeqPairsClass_with_sub_32_in_GPR32arg[] = { AArch64::X0_X1, AArch64::X2_X3, AArch64::X4_X5, AArch64::X6_X7, }; // XSeqPairsClass_with_sub_32_in_GPR32arg Bit set. const uint8_t XSeqPairsClass_with_sub_32_in_GPR32argBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0x03, }; // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 Register Class... const MCPhysReg XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15[] = { AArch64::X12_X13, AArch64::X14_X15, }; // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 Bit set. const uint8_t XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, }; // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... const MCPhysReg XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11[] = { AArch64::X8_X9, AArch64::X10_X11, }; // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. const uint8_t XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, }; // XSeqPairsClass_with_sube64_in_rtcGPR64 Register Class... const MCPhysReg XSeqPairsClass_with_sube64_in_rtcGPR64[] = { AArch64::X16_X17, }; // XSeqPairsClass_with_sube64_in_rtcGPR64 Bit set. const uint8_t XSeqPairsClass_with_sube64_in_rtcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, }; // XSeqPairsClass_with_subo64_in_FIXED_REGS Register Class... const MCPhysReg XSeqPairsClass_with_subo64_in_FIXED_REGS[] = { AArch64::X28_FP, }; // XSeqPairsClass_with_subo64_in_FIXED_REGS Bit set. const uint8_t XSeqPairsClass_with_subo64_in_FIXED_REGSBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, }; // FPR128 Register Class... const MCPhysReg FPR128[] = { AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, }; // FPR128 Bit set. const uint8_t FPR128Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, }; // ZPR Register Class... const MCPhysReg ZPR[] = { AArch64::Z0, AArch64::Z1, AArch64::Z2, AArch64::Z3, AArch64::Z4, AArch64::Z5, AArch64::Z6, AArch64::Z7, AArch64::Z8, AArch64::Z9, AArch64::Z10, AArch64::Z11, AArch64::Z12, AArch64::Z13, AArch64::Z14, AArch64::Z15, AArch64::Z16, AArch64::Z17, AArch64::Z18, AArch64::Z19, AArch64::Z20, AArch64::Z21, AArch64::Z22, AArch64::Z23, AArch64::Z24, AArch64::Z25, AArch64::Z26, AArch64::Z27, AArch64::Z28, AArch64::Z29, AArch64::Z30, AArch64::Z31, }; // ZPR Bit set. const uint8_t ZPRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, }; // FPR128_lo Register Class... const MCPhysReg FPR128_lo[] = { AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, }; // FPR128_lo Bit set. const uint8_t FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, }; // MPR128 Register Class... const MCPhysReg MPR128[] = { AArch64::ZAQ0, AArch64::ZAQ1, AArch64::ZAQ2, AArch64::ZAQ3, AArch64::ZAQ4, AArch64::ZAQ5, AArch64::ZAQ6, AArch64::ZAQ7, AArch64::ZAQ8, AArch64::ZAQ9, AArch64::ZAQ10, AArch64::ZAQ11, AArch64::ZAQ12, AArch64::ZAQ13, AArch64::ZAQ14, AArch64::ZAQ15, }; // MPR128 Bit set. const uint8_t MPR128Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x07, }; // ZPR_4b Register Class... const MCPhysReg ZPR_4b[] = { AArch64::Z0, AArch64::Z1, AArch64::Z2, AArch64::Z3, AArch64::Z4, AArch64::Z5, AArch64::Z6, AArch64::Z7, AArch64::Z8, AArch64::Z9, AArch64::Z10, AArch64::Z11, AArch64::Z12, AArch64::Z13, AArch64::Z14, AArch64::Z15, }; // ZPR_4b Bit set. const uint8_t ZPR_4bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, }; // ZPR_3b Register Class... const MCPhysReg ZPR_3b[] = { AArch64::Z0, AArch64::Z1, AArch64::Z2, AArch64::Z3, AArch64::Z4, AArch64::Z5, AArch64::Z6, AArch64::Z7, }; // ZPR_3b Bit set. const uint8_t ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, }; // DDD Register Class... const MCPhysReg DDD[] = { AArch64::D0_D1_D2, AArch64::D1_D2_D3, AArch64::D2_D3_D4, AArch64::D3_D4_D5, AArch64::D4_D5_D6, AArch64::D5_D6_D7, AArch64::D6_D7_D8, AArch64::D7_D8_D9, AArch64::D8_D9_D10, AArch64::D9_D10_D11, AArch64::D10_D11_D12, AArch64::D11_D12_D13, AArch64::D12_D13_D14, AArch64::D13_D14_D15, AArch64::D14_D15_D16, AArch64::D15_D16_D17, AArch64::D16_D17_D18, AArch64::D17_D18_D19, AArch64::D18_D19_D20, AArch64::D19_D20_D21, AArch64::D20_D21_D22, AArch64::D21_D22_D23, AArch64::D22_D23_D24, AArch64::D23_D24_D25, AArch64::D24_D25_D26, AArch64::D25_D26_D27, AArch64::D26_D27_D28, AArch64::D27_D28_D29, AArch64::D28_D29_D30, AArch64::D29_D30_D31, AArch64::D30_D31_D0, AArch64::D31_D0_D1, }; // DDD Bit set. const uint8_t DDDBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, }; // DDD_with_dsub0_in_FPR64_lo Register Class... const MCPhysReg DDD_with_dsub0_in_FPR64_lo[] = { AArch64::D0_D1_D2, AArch64::D1_D2_D3, AArch64::D2_D3_D4, AArch64::D3_D4_D5, AArch64::D4_D5_D6, AArch64::D5_D6_D7, AArch64::D6_D7_D8, AArch64::D7_D8_D9, AArch64::D8_D9_D10, AArch64::D9_D10_D11, AArch64::D10_D11_D12, AArch64::D11_D12_D13, AArch64::D12_D13_D14, AArch64::D13_D14_D15, AArch64::D14_D15_D16, AArch64::D15_D16_D17, }; // DDD_with_dsub0_in_FPR64_lo Bit set. const uint8_t DDD_with_dsub0_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, }; // DDD_with_dsub1_in_FPR64_lo Register Class... const MCPhysReg DDD_with_dsub1_in_FPR64_lo[] = { AArch64::D0_D1_D2, AArch64::D1_D2_D3, AArch64::D2_D3_D4, AArch64::D3_D4_D5, AArch64::D4_D5_D6, AArch64::D5_D6_D7, AArch64::D6_D7_D8, AArch64::D7_D8_D9, AArch64::D8_D9_D10, AArch64::D9_D10_D11, AArch64::D10_D11_D12, AArch64::D11_D12_D13, AArch64::D12_D13_D14, AArch64::D13_D14_D15, AArch64::D14_D15_D16, AArch64::D31_D0_D1, }; // DDD_with_dsub1_in_FPR64_lo Bit set. const uint8_t DDD_with_dsub1_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x7f, 0x00, 0x80, }; // DDD_with_dsub2_in_FPR64_lo Register Class... const MCPhysReg DDD_with_dsub2_in_FPR64_lo[] = { AArch64::D0_D1_D2, AArch64::D1_D2_D3, AArch64::D2_D3_D4, AArch64::D3_D4_D5, AArch64::D4_D5_D6, AArch64::D5_D6_D7, AArch64::D6_D7_D8, AArch64::D7_D8_D9, AArch64::D8_D9_D10, AArch64::D9_D10_D11, AArch64::D10_D11_D12, AArch64::D11_D12_D13, AArch64::D12_D13_D14, AArch64::D13_D14_D15, AArch64::D30_D31_D0, AArch64::D31_D0_D1, }; // DDD_with_dsub2_in_FPR64_lo Bit set. const uint8_t DDD_with_dsub2_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x3f, 0x00, 0xc0, }; // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo Register Class... const MCPhysReg DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo[] = { AArch64::D0_D1_D2, AArch64::D1_D2_D3, AArch64::D2_D3_D4, AArch64::D3_D4_D5, AArch64::D4_D5_D6, AArch64::D5_D6_D7, AArch64::D6_D7_D8, AArch64::D7_D8_D9, AArch64::D8_D9_D10, AArch64::D9_D10_D11, AArch64::D10_D11_D12, AArch64::D11_D12_D13, AArch64::D12_D13_D14, AArch64::D13_D14_D15, AArch64::D14_D15_D16, }; // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo Bit set. const uint8_t DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x7f, }; // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo Register Class... const MCPhysReg DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo[] = { AArch64::D0_D1_D2, AArch64::D1_D2_D3, AArch64::D2_D3_D4, AArch64::D3_D4_D5, AArch64::D4_D5_D6, AArch64::D5_D6_D7, AArch64::D6_D7_D8, AArch64::D7_D8_D9, AArch64::D8_D9_D10, AArch64::D9_D10_D11, AArch64::D10_D11_D12, AArch64::D11_D12_D13, AArch64::D12_D13_D14, AArch64::D13_D14_D15, AArch64::D31_D0_D1, }; // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo Bit set. const uint8_t DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x3f, 0x00, 0x80, }; // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo Register Class... const MCPhysReg DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo[] = { AArch64::D0_D1_D2, AArch64::D1_D2_D3, AArch64::D2_D3_D4, AArch64::D3_D4_D5, AArch64::D4_D5_D6, AArch64::D5_D6_D7, AArch64::D6_D7_D8, AArch64::D7_D8_D9, AArch64::D8_D9_D10, AArch64::D9_D10_D11, AArch64::D10_D11_D12, AArch64::D11_D12_D13, AArch64::D12_D13_D14, AArch64::D13_D14_D15, }; // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo Bit set. const uint8_t DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x3f, }; // DDDD Register Class... const MCPhysReg DDDD[] = { AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D13_D14_D15_D16, AArch64::D14_D15_D16_D17, AArch64::D15_D16_D17_D18, AArch64::D16_D17_D18_D19, AArch64::D17_D18_D19_D20, AArch64::D18_D19_D20_D21, AArch64::D19_D20_D21_D22, AArch64::D20_D21_D22_D23, AArch64::D21_D22_D23_D24, AArch64::D22_D23_D24_D25, AArch64::D23_D24_D25_D26, AArch64::D24_D25_D26_D27, AArch64::D25_D26_D27_D28, AArch64::D26_D27_D28_D29, AArch64::D27_D28_D29_D30, AArch64::D28_D29_D30_D31, AArch64::D29_D30_D31_D0, AArch64::D30_D31_D0_D1, AArch64::D31_D0_D1_D2, }; // DDDD Bit set. const uint8_t DDDDBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, }; // DDDD_with_dsub0_in_FPR64_lo Register Class... const MCPhysReg DDDD_with_dsub0_in_FPR64_lo[] = { AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D13_D14_D15_D16, AArch64::D14_D15_D16_D17, AArch64::D15_D16_D17_D18, }; // DDDD_with_dsub0_in_FPR64_lo Bit set. const uint8_t DDDD_with_dsub0_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, }; // DDDD_with_dsub1_in_FPR64_lo Register Class... const MCPhysReg DDDD_with_dsub1_in_FPR64_lo[] = { AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D13_D14_D15_D16, AArch64::D14_D15_D16_D17, AArch64::D31_D0_D1_D2, }; // DDDD_with_dsub1_in_FPR64_lo Bit set. const uint8_t DDDD_with_dsub1_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x7f, 0x00, 0x80, }; // DDDD_with_dsub2_in_FPR64_lo Register Class... const MCPhysReg DDDD_with_dsub2_in_FPR64_lo[] = { AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D13_D14_D15_D16, AArch64::D30_D31_D0_D1, AArch64::D31_D0_D1_D2, }; // DDDD_with_dsub2_in_FPR64_lo Bit set. const uint8_t DDDD_with_dsub2_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x3f, 0x00, 0xc0, }; // DDDD_with_dsub3_in_FPR64_lo Register Class... const MCPhysReg DDDD_with_dsub3_in_FPR64_lo[] = { AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D29_D30_D31_D0, AArch64::D30_D31_D0_D1, AArch64::D31_D0_D1_D2, }; // DDDD_with_dsub3_in_FPR64_lo Bit set. const uint8_t DDDD_with_dsub3_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x1f, 0x00, 0xe0, }; // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo Register Class... const MCPhysReg DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo[] = { AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D13_D14_D15_D16, AArch64::D14_D15_D16_D17, }; // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo Bit set. const uint8_t DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x7f, }; // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo Register Class... const MCPhysReg DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo[] = { AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D13_D14_D15_D16, AArch64::D31_D0_D1_D2, }; // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo Bit set. const uint8_t DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x3f, 0x00, 0x80, }; // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo Register Class... const MCPhysReg DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo[] = { AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D30_D31_D0_D1, AArch64::D31_D0_D1_D2, }; // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo Bit set. const uint8_t DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x1f, 0x00, 0xc0, }; // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo Register Class... const MCPhysReg DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo[] = { AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D13_D14_D15_D16, }; // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo Bit set. const uint8_t DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x3f, }; // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo Register Class... const MCPhysReg DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo[] = { AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, AArch64::D31_D0_D1_D2, }; // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo Bit set. const uint8_t DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x1f, 0x00, 0x80, }; // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo Register Class... const MCPhysReg DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo[] = { AArch64::D0_D1_D2_D3, AArch64::D1_D2_D3_D4, AArch64::D2_D3_D4_D5, AArch64::D3_D4_D5_D6, AArch64::D4_D5_D6_D7, AArch64::D5_D6_D7_D8, AArch64::D6_D7_D8_D9, AArch64::D7_D8_D9_D10, AArch64::D8_D9_D10_D11, AArch64::D9_D10_D11_D12, AArch64::D10_D11_D12_D13, AArch64::D11_D12_D13_D14, AArch64::D12_D13_D14_D15, }; // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo Bit set. const uint8_t DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x1f, }; // QQ Register Class... const MCPhysReg QQ[] = { AArch64::Q0_Q1, AArch64::Q1_Q2, AArch64::Q2_Q3, AArch64::Q3_Q4, AArch64::Q4_Q5, AArch64::Q5_Q6, AArch64::Q6_Q7, AArch64::Q7_Q8, AArch64::Q8_Q9, AArch64::Q9_Q10, AArch64::Q10_Q11, AArch64::Q11_Q12, AArch64::Q12_Q13, AArch64::Q13_Q14, AArch64::Q14_Q15, AArch64::Q15_Q16, AArch64::Q16_Q17, AArch64::Q17_Q18, AArch64::Q18_Q19, AArch64::Q19_Q20, AArch64::Q20_Q21, AArch64::Q21_Q22, AArch64::Q22_Q23, AArch64::Q23_Q24, AArch64::Q24_Q25, AArch64::Q25_Q26, AArch64::Q26_Q27, AArch64::Q27_Q28, AArch64::Q28_Q29, AArch64::Q29_Q30, AArch64::Q30_Q31, AArch64::Q31_Q0, }; // QQ Bit set. const uint8_t QQBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, }; // ZPR2 Register Class... const MCPhysReg ZPR2[] = { AArch64::Z0_Z1, AArch64::Z1_Z2, AArch64::Z2_Z3, AArch64::Z3_Z4, AArch64::Z4_Z5, AArch64::Z5_Z6, AArch64::Z6_Z7, AArch64::Z7_Z8, AArch64::Z8_Z9, AArch64::Z9_Z10, AArch64::Z10_Z11, AArch64::Z11_Z12, AArch64::Z12_Z13, AArch64::Z13_Z14, AArch64::Z14_Z15, AArch64::Z15_Z16, AArch64::Z16_Z17, AArch64::Z17_Z18, AArch64::Z18_Z19, AArch64::Z19_Z20, AArch64::Z20_Z21, AArch64::Z21_Z22, AArch64::Z22_Z23, AArch64::Z23_Z24, AArch64::Z24_Z25, AArch64::Z25_Z26, AArch64::Z26_Z27, AArch64::Z27_Z28, AArch64::Z28_Z29, AArch64::Z29_Z30, AArch64::Z30_Z31, AArch64::Z31_Z0, }; // ZPR2 Bit set. const uint8_t ZPR2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, }; // QQ_with_dsub_in_FPR64_lo Register Class... const MCPhysReg QQ_with_dsub_in_FPR64_lo[] = { AArch64::Q0_Q1, AArch64::Q1_Q2, AArch64::Q2_Q3, AArch64::Q3_Q4, AArch64::Q4_Q5, AArch64::Q5_Q6, AArch64::Q6_Q7, AArch64::Q7_Q8, AArch64::Q8_Q9, AArch64::Q9_Q10, AArch64::Q10_Q11, AArch64::Q11_Q12, AArch64::Q12_Q13, AArch64::Q13_Q14, AArch64::Q14_Q15, AArch64::Q15_Q16, }; // QQ_with_dsub_in_FPR64_lo Bit set. const uint8_t QQ_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, }; // QQ_with_qsub1_in_FPR128_lo Register Class... const MCPhysReg QQ_with_qsub1_in_FPR128_lo[] = { AArch64::Q0_Q1, AArch64::Q1_Q2, AArch64::Q2_Q3, AArch64::Q3_Q4, AArch64::Q4_Q5, AArch64::Q5_Q6, AArch64::Q6_Q7, AArch64::Q7_Q8, AArch64::Q8_Q9, AArch64::Q9_Q10, AArch64::Q10_Q11, AArch64::Q11_Q12, AArch64::Q12_Q13, AArch64::Q13_Q14, AArch64::Q14_Q15, AArch64::Q31_Q0, }; // QQ_with_qsub1_in_FPR128_lo Bit set. const uint8_t QQ_with_qsub1_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x7f, 0x00, 0x80, }; // ZPR2Mul2 Register Class... const MCPhysReg ZPR2Mul2[] = { AArch64::Z0_Z1, AArch64::Z2_Z3, AArch64::Z4_Z5, AArch64::Z6_Z7, AArch64::Z8_Z9, AArch64::Z10_Z11, AArch64::Z12_Z13, AArch64::Z14_Z15, AArch64::Z16_Z17, AArch64::Z18_Z19, AArch64::Z20_Z21, AArch64::Z22_Z23, AArch64::Z24_Z25, AArch64::Z26_Z27, AArch64::Z28_Z29, AArch64::Z30_Z31, }; // ZPR2Mul2 Bit set. const uint8_t ZPR2Mul2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55, 0x55, 0x55, 0x05, }; // ZPR2_with_dsub_in_FPR64_lo Register Class... const MCPhysReg ZPR2_with_dsub_in_FPR64_lo[] = { AArch64::Z0_Z1, AArch64::Z1_Z2, AArch64::Z2_Z3, AArch64::Z3_Z4, AArch64::Z4_Z5, AArch64::Z5_Z6, AArch64::Z6_Z7, AArch64::Z7_Z8, AArch64::Z8_Z9, AArch64::Z9_Z10, AArch64::Z10_Z11, AArch64::Z11_Z12, AArch64::Z12_Z13, AArch64::Z13_Z14, AArch64::Z14_Z15, AArch64::Z15_Z16, }; // ZPR2_with_dsub_in_FPR64_lo Bit set. const uint8_t ZPR2_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, }; // ZPR2_with_zsub1_in_ZPR_4b Register Class... const MCPhysReg ZPR2_with_zsub1_in_ZPR_4b[] = { AArch64::Z0_Z1, AArch64::Z1_Z2, AArch64::Z2_Z3, AArch64::Z3_Z4, AArch64::Z4_Z5, AArch64::Z5_Z6, AArch64::Z6_Z7, AArch64::Z7_Z8, AArch64::Z8_Z9, AArch64::Z9_Z10, AArch64::Z10_Z11, AArch64::Z11_Z12, AArch64::Z12_Z13, AArch64::Z13_Z14, AArch64::Z14_Z15, AArch64::Z31_Z0, }; // ZPR2_with_zsub1_in_ZPR_4b Bit set. const uint8_t ZPR2_with_zsub1_in_ZPR_4bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, 0x00, 0x08, }; // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo Register Class... const MCPhysReg QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo[] = { AArch64::Q0_Q1, AArch64::Q1_Q2, AArch64::Q2_Q3, AArch64::Q3_Q4, AArch64::Q4_Q5, AArch64::Q5_Q6, AArch64::Q6_Q7, AArch64::Q7_Q8, AArch64::Q8_Q9, AArch64::Q9_Q10, AArch64::Q10_Q11, AArch64::Q11_Q12, AArch64::Q12_Q13, AArch64::Q13_Q14, AArch64::Q14_Q15, }; // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo Bit set. const uint8_t QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x7f, }; // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b Register Class... const MCPhysReg ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b[] = { AArch64::Z0_Z1, AArch64::Z1_Z2, AArch64::Z2_Z3, AArch64::Z3_Z4, AArch64::Z4_Z5, AArch64::Z5_Z6, AArch64::Z6_Z7, AArch64::Z7_Z8, AArch64::Z8_Z9, AArch64::Z9_Z10, AArch64::Z10_Z11, AArch64::Z11_Z12, AArch64::Z12_Z13, AArch64::Z13_Z14, AArch64::Z14_Z15, }; // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b Bit set. const uint8_t ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, }; // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Register Class... const MCPhysReg ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo[] = { AArch64::Z0_Z1, AArch64::Z2_Z3, AArch64::Z4_Z5, AArch64::Z6_Z7, AArch64::Z8_Z9, AArch64::Z10_Z11, AArch64::Z12_Z13, AArch64::Z14_Z15, }; // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Bit set. const uint8_t ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55, 0x05, }; // ZPR2_with_zsub0_in_ZPR_3b Register Class... const MCPhysReg ZPR2_with_zsub0_in_ZPR_3b[] = { AArch64::Z0_Z1, AArch64::Z1_Z2, AArch64::Z2_Z3, AArch64::Z3_Z4, AArch64::Z4_Z5, AArch64::Z5_Z6, AArch64::Z6_Z7, AArch64::Z7_Z8, }; // ZPR2_with_zsub0_in_ZPR_3b Bit set. const uint8_t ZPR2_with_zsub0_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, }; // ZPR2_with_zsub1_in_ZPR_3b Register Class... const MCPhysReg ZPR2_with_zsub1_in_ZPR_3b[] = { AArch64::Z0_Z1, AArch64::Z1_Z2, AArch64::Z2_Z3, AArch64::Z3_Z4, AArch64::Z4_Z5, AArch64::Z5_Z6, AArch64::Z6_Z7, AArch64::Z31_Z0, }; // ZPR2_with_zsub1_in_ZPR_3b Bit set. const uint8_t ZPR2_with_zsub1_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07, 0x00, 0x00, 0x08, }; // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b Register Class... const MCPhysReg ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b[] = { AArch64::Z0_Z1, AArch64::Z1_Z2, AArch64::Z2_Z3, AArch64::Z3_Z4, AArch64::Z4_Z5, AArch64::Z5_Z6, AArch64::Z6_Z7, }; // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b Bit set. const uint8_t ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07, }; // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b Register Class... const MCPhysReg ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b[] = { AArch64::Z0_Z1, AArch64::Z2_Z3, AArch64::Z4_Z5, AArch64::Z6_Z7, }; // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b Bit set. const uint8_t ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x05, }; // ZPR2Strided Register Class... const MCPhysReg ZPR2Strided[] = { AArch64::Z0_Z8, AArch64::Z1_Z9, AArch64::Z2_Z10, AArch64::Z3_Z11, AArch64::Z4_Z12, AArch64::Z5_Z13, AArch64::Z6_Z14, AArch64::Z7_Z15, AArch64::Z16_Z24, AArch64::Z17_Z25, AArch64::Z18_Z26, AArch64::Z19_Z27, AArch64::Z20_Z28, AArch64::Z21_Z29, AArch64::Z22_Z30, AArch64::Z23_Z31, }; // ZPR2Strided Bit set. const uint8_t ZPR2StridedBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, }; // MPR64 Register Class... const MCPhysReg MPR64[] = { AArch64::ZAD0, AArch64::ZAD1, AArch64::ZAD2, AArch64::ZAD3, AArch64::ZAD4, AArch64::ZAD5, AArch64::ZAD6, AArch64::ZAD7, }; // MPR64 Bit set. const uint8_t MPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, }; // ZPR2Strided_with_dsub_in_FPR64_lo Register Class... const MCPhysReg ZPR2Strided_with_dsub_in_FPR64_lo[] = { AArch64::Z0_Z8, AArch64::Z1_Z9, AArch64::Z2_Z10, AArch64::Z3_Z11, AArch64::Z4_Z12, AArch64::Z5_Z13, AArch64::Z6_Z14, AArch64::Z7_Z15, }; // ZPR2Strided_with_dsub_in_FPR64_lo Bit set. const uint8_t ZPR2Strided_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, }; // QQQ Register Class... const MCPhysReg QQQ[] = { AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q14_Q15_Q16, AArch64::Q15_Q16_Q17, AArch64::Q16_Q17_Q18, AArch64::Q17_Q18_Q19, AArch64::Q18_Q19_Q20, AArch64::Q19_Q20_Q21, AArch64::Q20_Q21_Q22, AArch64::Q21_Q22_Q23, AArch64::Q22_Q23_Q24, AArch64::Q23_Q24_Q25, AArch64::Q24_Q25_Q26, AArch64::Q25_Q26_Q27, AArch64::Q26_Q27_Q28, AArch64::Q27_Q28_Q29, AArch64::Q28_Q29_Q30, AArch64::Q29_Q30_Q31, AArch64::Q30_Q31_Q0, AArch64::Q31_Q0_Q1, }; // QQQ Bit set. const uint8_t QQQBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, }; // ZPR3 Register Class... const MCPhysReg ZPR3[] = { AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, AArch64::Z7_Z8_Z9, AArch64::Z8_Z9_Z10, AArch64::Z9_Z10_Z11, AArch64::Z10_Z11_Z12, AArch64::Z11_Z12_Z13, AArch64::Z12_Z13_Z14, AArch64::Z13_Z14_Z15, AArch64::Z14_Z15_Z16, AArch64::Z15_Z16_Z17, AArch64::Z16_Z17_Z18, AArch64::Z17_Z18_Z19, AArch64::Z18_Z19_Z20, AArch64::Z19_Z20_Z21, AArch64::Z20_Z21_Z22, AArch64::Z21_Z22_Z23, AArch64::Z22_Z23_Z24, AArch64::Z23_Z24_Z25, AArch64::Z24_Z25_Z26, AArch64::Z25_Z26_Z27, AArch64::Z26_Z27_Z28, AArch64::Z27_Z28_Z29, AArch64::Z28_Z29_Z30, AArch64::Z29_Z30_Z31, AArch64::Z30_Z31_Z0, AArch64::Z31_Z0_Z1, }; // ZPR3 Bit set. const uint8_t ZPR3Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, }; // QQQ_with_dsub_in_FPR64_lo Register Class... const MCPhysReg QQQ_with_dsub_in_FPR64_lo[] = { AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q14_Q15_Q16, AArch64::Q15_Q16_Q17, }; // QQQ_with_dsub_in_FPR64_lo Bit set. const uint8_t QQQ_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, }; // QQQ_with_qsub1_in_FPR128_lo Register Class... const MCPhysReg QQQ_with_qsub1_in_FPR128_lo[] = { AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q14_Q15_Q16, AArch64::Q31_Q0_Q1, }; // QQQ_with_qsub1_in_FPR128_lo Bit set. const uint8_t QQQ_with_qsub1_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x7f, 0x00, 0x80, }; // QQQ_with_qsub2_in_FPR128_lo Register Class... const MCPhysReg QQQ_with_qsub2_in_FPR128_lo[] = { AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q30_Q31_Q0, AArch64::Q31_Q0_Q1, }; // QQQ_with_qsub2_in_FPR128_lo Bit set. const uint8_t QQQ_with_qsub2_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x3f, 0x00, 0xc0, }; // ZPR3_with_dsub_in_FPR64_lo Register Class... const MCPhysReg ZPR3_with_dsub_in_FPR64_lo[] = { AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, AArch64::Z7_Z8_Z9, AArch64::Z8_Z9_Z10, AArch64::Z9_Z10_Z11, AArch64::Z10_Z11_Z12, AArch64::Z11_Z12_Z13, AArch64::Z12_Z13_Z14, AArch64::Z13_Z14_Z15, AArch64::Z14_Z15_Z16, AArch64::Z15_Z16_Z17, }; // ZPR3_with_dsub_in_FPR64_lo Bit set. const uint8_t ZPR3_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, }; // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 Register Class... const MCPhysReg ZPR3_with_zsub0_zsub1_in_ZPR2Mul2[] = { AArch64::Z0_Z1_Z2, AArch64::Z2_Z3_Z4, AArch64::Z4_Z5_Z6, AArch64::Z6_Z7_Z8, AArch64::Z8_Z9_Z10, AArch64::Z10_Z11_Z12, AArch64::Z12_Z13_Z14, AArch64::Z14_Z15_Z16, AArch64::Z16_Z17_Z18, AArch64::Z18_Z19_Z20, AArch64::Z20_Z21_Z22, AArch64::Z22_Z23_Z24, AArch64::Z24_Z25_Z26, AArch64::Z26_Z27_Z28, AArch64::Z28_Z29_Z30, AArch64::Z30_Z31_Z0, }; // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 Bit set. const uint8_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55, 0x55, 0x55, 0x05, }; // ZPR3_with_zsub1_in_ZPR_4b Register Class... const MCPhysReg ZPR3_with_zsub1_in_ZPR_4b[] = { AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, AArch64::Z7_Z8_Z9, AArch64::Z8_Z9_Z10, AArch64::Z9_Z10_Z11, AArch64::Z10_Z11_Z12, AArch64::Z11_Z12_Z13, AArch64::Z12_Z13_Z14, AArch64::Z13_Z14_Z15, AArch64::Z14_Z15_Z16, AArch64::Z31_Z0_Z1, }; // ZPR3_with_zsub1_in_ZPR_4b Bit set. const uint8_t ZPR3_with_zsub1_in_ZPR_4bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, 0x00, 0x08, }; // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 Register Class... const MCPhysReg ZPR3_with_zsub1_zsub2_in_ZPR2Mul2[] = { AArch64::Z1_Z2_Z3, AArch64::Z3_Z4_Z5, AArch64::Z5_Z6_Z7, AArch64::Z7_Z8_Z9, AArch64::Z9_Z10_Z11, AArch64::Z11_Z12_Z13, AArch64::Z13_Z14_Z15, AArch64::Z15_Z16_Z17, AArch64::Z17_Z18_Z19, AArch64::Z19_Z20_Z21, AArch64::Z21_Z22_Z23, AArch64::Z23_Z24_Z25, AArch64::Z25_Z26_Z27, AArch64::Z27_Z28_Z29, AArch64::Z29_Z30_Z31, AArch64::Z31_Z0_Z1, }; // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 Bit set. const uint8_t ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0xaa, 0xaa, 0xaa, 0x0a, }; // ZPR3_with_zsub2_in_ZPR_4b Register Class... const MCPhysReg ZPR3_with_zsub2_in_ZPR_4b[] = { AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, AArch64::Z7_Z8_Z9, AArch64::Z8_Z9_Z10, AArch64::Z9_Z10_Z11, AArch64::Z10_Z11_Z12, AArch64::Z11_Z12_Z13, AArch64::Z12_Z13_Z14, AArch64::Z13_Z14_Z15, AArch64::Z30_Z31_Z0, AArch64::Z31_Z0_Z1, }; // ZPR3_with_zsub2_in_ZPR_4b Bit set. const uint8_t ZPR3_with_zsub2_in_ZPR_4bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x0c, }; // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo Register Class... const MCPhysReg QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo[] = { AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q14_Q15_Q16, }; // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo Bit set. const uint8_t QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x7f, }; // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo Register Class... const MCPhysReg QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo[] = { AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, AArch64::Q31_Q0_Q1, }; // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo Bit set. const uint8_t QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x3f, 0x00, 0x80, }; // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b Register Class... const MCPhysReg ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b[] = { AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, AArch64::Z7_Z8_Z9, AArch64::Z8_Z9_Z10, AArch64::Z9_Z10_Z11, AArch64::Z10_Z11_Z12, AArch64::Z11_Z12_Z13, AArch64::Z12_Z13_Z14, AArch64::Z13_Z14_Z15, AArch64::Z14_Z15_Z16, }; // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b Bit set. const uint8_t ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, }; // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b Register Class... const MCPhysReg ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b[] = { AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, AArch64::Z7_Z8_Z9, AArch64::Z8_Z9_Z10, AArch64::Z9_Z10_Z11, AArch64::Z10_Z11_Z12, AArch64::Z11_Z12_Z13, AArch64::Z12_Z13_Z14, AArch64::Z13_Z14_Z15, AArch64::Z31_Z0_Z1, }; // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b Bit set. const uint8_t ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x08, }; // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo Register Class... const MCPhysReg QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo[] = { AArch64::Q0_Q1_Q2, AArch64::Q1_Q2_Q3, AArch64::Q2_Q3_Q4, AArch64::Q3_Q4_Q5, AArch64::Q4_Q5_Q6, AArch64::Q5_Q6_Q7, AArch64::Q6_Q7_Q8, AArch64::Q7_Q8_Q9, AArch64::Q8_Q9_Q10, AArch64::Q9_Q10_Q11, AArch64::Q10_Q11_Q12, AArch64::Q11_Q12_Q13, AArch64::Q12_Q13_Q14, AArch64::Q13_Q14_Q15, }; // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo Bit set. const uint8_t QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x3f, }; // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b Register Class... const MCPhysReg ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b[] = { AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, AArch64::Z7_Z8_Z9, AArch64::Z8_Z9_Z10, AArch64::Z9_Z10_Z11, AArch64::Z10_Z11_Z12, AArch64::Z11_Z12_Z13, AArch64::Z12_Z13_Z14, AArch64::Z13_Z14_Z15, }; // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b Bit set. const uint8_t ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, }; // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 Register Class... const MCPhysReg ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2[] = { AArch64::Z1_Z2_Z3, AArch64::Z3_Z4_Z5, AArch64::Z5_Z6_Z7, AArch64::Z7_Z8_Z9, AArch64::Z9_Z10_Z11, AArch64::Z11_Z12_Z13, AArch64::Z13_Z14_Z15, AArch64::Z15_Z16_Z17, }; // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 Bit set. const uint8_t ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0xaa, 0x0a, }; // ZPR3_with_zsub0_in_ZPR_3b Register Class... const MCPhysReg ZPR3_with_zsub0_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, AArch64::Z7_Z8_Z9, }; // ZPR3_with_zsub0_in_ZPR_3b Bit set. const uint8_t ZPR3_with_zsub0_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, }; // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Register Class... const MCPhysReg ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo[] = { AArch64::Z0_Z1_Z2, AArch64::Z2_Z3_Z4, AArch64::Z4_Z5_Z6, AArch64::Z6_Z7_Z8, AArch64::Z8_Z9_Z10, AArch64::Z10_Z11_Z12, AArch64::Z12_Z13_Z14, AArch64::Z14_Z15_Z16, }; // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Bit set. const uint8_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55, 0x05, }; // ZPR3_with_zsub1_in_ZPR_3b Register Class... const MCPhysReg ZPR3_with_zsub1_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, AArch64::Z31_Z0_Z1, }; // ZPR3_with_zsub1_in_ZPR_3b Bit set. const uint8_t ZPR3_with_zsub1_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07, 0x00, 0x00, 0x08, }; // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Register Class... const MCPhysReg ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo[] = { AArch64::Z1_Z2_Z3, AArch64::Z3_Z4_Z5, AArch64::Z5_Z6_Z7, AArch64::Z7_Z8_Z9, AArch64::Z9_Z10_Z11, AArch64::Z11_Z12_Z13, AArch64::Z13_Z14_Z15, AArch64::Z31_Z0_Z1, }; // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Bit set. const uint8_t ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0xaa, 0x02, 0x00, 0x08, }; // ZPR3_with_zsub2_in_ZPR_3b Register Class... const MCPhysReg ZPR3_with_zsub2_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z30_Z31_Z0, AArch64::Z31_Z0_Z1, }; // ZPR3_with_zsub2_in_ZPR_3b Bit set. const uint8_t ZPR3_with_zsub2_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x03, 0x00, 0x00, 0x0c, }; // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 Register Class... const MCPhysReg ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2[] = { AArch64::Z0_Z1_Z2, AArch64::Z2_Z3_Z4, AArch64::Z4_Z5_Z6, AArch64::Z6_Z7_Z8, AArch64::Z8_Z9_Z10, AArch64::Z10_Z11_Z12, AArch64::Z12_Z13_Z14, AArch64::Z30_Z31_Z0, }; // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 Bit set. const uint8_t ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55, 0x01, 0x00, 0x04, }; // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b Register Class... const MCPhysReg ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z6_Z7_Z8, }; // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b Bit set. const uint8_t ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07, }; // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Register Class... const MCPhysReg ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo[] = { AArch64::Z1_Z2_Z3, AArch64::Z3_Z4_Z5, AArch64::Z5_Z6_Z7, AArch64::Z7_Z8_Z9, AArch64::Z9_Z10_Z11, AArch64::Z11_Z12_Z13, AArch64::Z13_Z14_Z15, }; // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Bit set. const uint8_t ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0xaa, 0x02, }; // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b Register Class... const MCPhysReg ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, AArch64::Z31_Z0_Z1, }; // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b Bit set. const uint8_t ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x03, 0x00, 0x00, 0x08, }; // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Register Class... const MCPhysReg ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo[] = { AArch64::Z0_Z1_Z2, AArch64::Z2_Z3_Z4, AArch64::Z4_Z5_Z6, AArch64::Z6_Z7_Z8, AArch64::Z8_Z9_Z10, AArch64::Z10_Z11_Z12, AArch64::Z12_Z13_Z14, }; // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Bit set. const uint8_t ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55, 0x01, }; // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b Register Class... const MCPhysReg ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2, AArch64::Z1_Z2_Z3, AArch64::Z2_Z3_Z4, AArch64::Z3_Z4_Z5, AArch64::Z4_Z5_Z6, AArch64::Z5_Z6_Z7, }; // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b Bit set. const uint8_t ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x03, }; // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 Register Class... const MCPhysReg ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2[] = { AArch64::Z1_Z2_Z3, AArch64::Z3_Z4_Z5, AArch64::Z5_Z6_Z7, AArch64::Z7_Z8_Z9, }; // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 Bit set. const uint8_t ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0x0a, }; // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b Register Class... const MCPhysReg ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2, AArch64::Z2_Z3_Z4, AArch64::Z4_Z5_Z6, AArch64::Z6_Z7_Z8, }; // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b Bit set. const uint8_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x05, }; // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b Register Class... const MCPhysReg ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b[] = { AArch64::Z1_Z2_Z3, AArch64::Z3_Z4_Z5, AArch64::Z5_Z6_Z7, AArch64::Z31_Z0_Z1, }; // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b Bit set. const uint8_t ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0x02, 0x00, 0x00, 0x08, }; // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 Register Class... const MCPhysReg ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2[] = { AArch64::Z0_Z1_Z2, AArch64::Z2_Z3_Z4, AArch64::Z4_Z5_Z6, AArch64::Z30_Z31_Z0, }; // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 Bit set. const uint8_t ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x01, 0x00, 0x00, 0x04, }; // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b Register Class... const MCPhysReg ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b[] = { AArch64::Z1_Z2_Z3, AArch64::Z3_Z4_Z5, AArch64::Z5_Z6_Z7, }; // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b Bit set. const uint8_t ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0x02, }; // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Register Class... const MCPhysReg ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo[] = { AArch64::Z0_Z1_Z2, AArch64::Z2_Z3_Z4, AArch64::Z4_Z5_Z6, }; // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Bit set. const uint8_t ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x01, }; // QQQQ Register Class... const MCPhysReg QQQQ[] = { AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q14_Q15_Q16_Q17, AArch64::Q15_Q16_Q17_Q18, AArch64::Q16_Q17_Q18_Q19, AArch64::Q17_Q18_Q19_Q20, AArch64::Q18_Q19_Q20_Q21, AArch64::Q19_Q20_Q21_Q22, AArch64::Q20_Q21_Q22_Q23, AArch64::Q21_Q22_Q23_Q24, AArch64::Q22_Q23_Q24_Q25, AArch64::Q23_Q24_Q25_Q26, AArch64::Q24_Q25_Q26_Q27, AArch64::Q25_Q26_Q27_Q28, AArch64::Q26_Q27_Q28_Q29, AArch64::Q27_Q28_Q29_Q30, AArch64::Q28_Q29_Q30_Q31, AArch64::Q29_Q30_Q31_Q0, AArch64::Q30_Q31_Q0_Q1, AArch64::Q31_Q0_Q1_Q2, }; // QQQQ Bit set. const uint8_t QQQQBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, 0xff, 0xff, }; // ZPR4 Register Class... const MCPhysReg ZPR4[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z13_Z14_Z15_Z16, AArch64::Z14_Z15_Z16_Z17, AArch64::Z15_Z16_Z17_Z18, AArch64::Z16_Z17_Z18_Z19, AArch64::Z17_Z18_Z19_Z20, AArch64::Z18_Z19_Z20_Z21, AArch64::Z19_Z20_Z21_Z22, AArch64::Z20_Z21_Z22_Z23, AArch64::Z21_Z22_Z23_Z24, AArch64::Z22_Z23_Z24_Z25, AArch64::Z23_Z24_Z25_Z26, AArch64::Z24_Z25_Z26_Z27, AArch64::Z25_Z26_Z27_Z28, AArch64::Z26_Z27_Z28_Z29, AArch64::Z27_Z28_Z29_Z30, AArch64::Z28_Z29_Z30_Z31, AArch64::Z29_Z30_Z31_Z0, AArch64::Z30_Z31_Z0_Z1, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4 Bit set. const uint8_t ZPR4Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, }; // QQQQ_with_dsub_in_FPR64_lo Register Class... const MCPhysReg QQQQ_with_dsub_in_FPR64_lo[] = { AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q14_Q15_Q16_Q17, AArch64::Q15_Q16_Q17_Q18, }; // QQQQ_with_dsub_in_FPR64_lo Bit set. const uint8_t QQQQ_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0xff, }; // QQQQ_with_qsub1_in_FPR128_lo Register Class... const MCPhysReg QQQQ_with_qsub1_in_FPR128_lo[] = { AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q14_Q15_Q16_Q17, AArch64::Q31_Q0_Q1_Q2, }; // QQQQ_with_qsub1_in_FPR128_lo Bit set. const uint8_t QQQQ_with_qsub1_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x7f, 0x00, 0x80, }; // QQQQ_with_qsub2_in_FPR128_lo Register Class... const MCPhysReg QQQQ_with_qsub2_in_FPR128_lo[] = { AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q30_Q31_Q0_Q1, AArch64::Q31_Q0_Q1_Q2, }; // QQQQ_with_qsub2_in_FPR128_lo Bit set. const uint8_t QQQQ_with_qsub2_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x3f, 0x00, 0xc0, }; // QQQQ_with_qsub3_in_FPR128_lo Register Class... const MCPhysReg QQQQ_with_qsub3_in_FPR128_lo[] = { AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q29_Q30_Q31_Q0, AArch64::Q30_Q31_Q0_Q1, AArch64::Q31_Q0_Q1_Q2, }; // QQQQ_with_qsub3_in_FPR128_lo Bit set. const uint8_t QQQQ_with_qsub3_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x1f, 0x00, 0xe0, }; // ZPR4_with_dsub_in_FPR64_lo Register Class... const MCPhysReg ZPR4_with_dsub_in_FPR64_lo[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z13_Z14_Z15_Z16, AArch64::Z14_Z15_Z16_Z17, AArch64::Z15_Z16_Z17_Z18, }; // ZPR4_with_dsub_in_FPR64_lo Bit set. const uint8_t ZPR4_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x0f, }; // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 Register Class... const MCPhysReg ZPR4_with_zsub0_zsub1_in_ZPR2Mul2[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z2_Z3_Z4_Z5, AArch64::Z4_Z5_Z6_Z7, AArch64::Z6_Z7_Z8_Z9, AArch64::Z8_Z9_Z10_Z11, AArch64::Z10_Z11_Z12_Z13, AArch64::Z12_Z13_Z14_Z15, AArch64::Z14_Z15_Z16_Z17, AArch64::Z16_Z17_Z18_Z19, AArch64::Z18_Z19_Z20_Z21, AArch64::Z20_Z21_Z22_Z23, AArch64::Z22_Z23_Z24_Z25, AArch64::Z24_Z25_Z26_Z27, AArch64::Z26_Z27_Z28_Z29, AArch64::Z28_Z29_Z30_Z31, AArch64::Z30_Z31_Z0_Z1, }; // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 Bit set. const uint8_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55, 0x55, 0x55, 0x05, }; // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 Register Class... const MCPhysReg ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2[] = { AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, AArch64::Z7_Z8_Z9_Z10, AArch64::Z9_Z10_Z11_Z12, AArch64::Z11_Z12_Z13_Z14, AArch64::Z13_Z14_Z15_Z16, AArch64::Z15_Z16_Z17_Z18, AArch64::Z17_Z18_Z19_Z20, AArch64::Z19_Z20_Z21_Z22, AArch64::Z21_Z22_Z23_Z24, AArch64::Z23_Z24_Z25_Z26, AArch64::Z25_Z26_Z27_Z28, AArch64::Z27_Z28_Z29_Z30, AArch64::Z29_Z30_Z31_Z0, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 Bit set. const uint8_t ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0xaa, 0xaa, 0xaa, 0x0a, }; // ZPR4_with_zsub1_in_ZPR_4b Register Class... const MCPhysReg ZPR4_with_zsub1_in_ZPR_4b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z13_Z14_Z15_Z16, AArch64::Z14_Z15_Z16_Z17, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4_with_zsub1_in_ZPR_4b Bit set. const uint8_t ZPR4_with_zsub1_in_ZPR_4bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, 0x00, 0x08, }; // ZPR4_with_zsub2_in_ZPR_4b Register Class... const MCPhysReg ZPR4_with_zsub2_in_ZPR_4b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z13_Z14_Z15_Z16, AArch64::Z30_Z31_Z0_Z1, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4_with_zsub2_in_ZPR_4b Bit set. const uint8_t ZPR4_with_zsub2_in_ZPR_4bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x0c, }; // ZPR4_with_zsub3_in_ZPR_4b Register Class... const MCPhysReg ZPR4_with_zsub3_in_ZPR_4b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z29_Z30_Z31_Z0, AArch64::Z30_Z31_Z0_Z1, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4_with_zsub3_in_ZPR_4b Bit set. const uint8_t ZPR4_with_zsub3_in_ZPR_4bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x0e, }; // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo Register Class... const MCPhysReg QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo[] = { AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q14_Q15_Q16_Q17, }; // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo Bit set. const uint8_t QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x7f, }; // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo Register Class... const MCPhysReg QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo[] = { AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, AArch64::Q31_Q0_Q1_Q2, }; // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo Bit set. const uint8_t QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x3f, 0x00, 0x80, }; // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Register Class... const MCPhysReg QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo[] = { AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q30_Q31_Q0_Q1, AArch64::Q31_Q0_Q1_Q2, }; // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Bit set. const uint8_t QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x1f, 0x00, 0xc0, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b Register Class... const MCPhysReg ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z13_Z14_Z15_Z16, AArch64::Z14_Z15_Z16_Z17, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b Bit set. const uint8_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x07, }; // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b Register Class... const MCPhysReg ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z13_Z14_Z15_Z16, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b Bit set. const uint8_t ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, 0x00, 0x08, }; // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b Register Class... const MCPhysReg ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z30_Z31_Z0_Z1, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b Bit set. const uint8_t ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x0c, }; // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo Register Class... const MCPhysReg QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo[] = { AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q13_Q14_Q15_Q16, }; // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo Bit set. const uint8_t QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x3f, }; // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Register Class... const MCPhysReg QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo[] = { AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, AArch64::Q31_Q0_Q1_Q2, }; // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo Bit set. const uint8_t QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x1f, 0x00, 0x80, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b Register Class... const MCPhysReg ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z13_Z14_Z15_Z16, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b Bit set. const uint8_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x03, }; // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b Register Class... const MCPhysReg ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b Bit set. const uint8_t ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, 0x00, 0x08, }; // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo Register Class... const MCPhysReg QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo[] = { AArch64::Q0_Q1_Q2_Q3, AArch64::Q1_Q2_Q3_Q4, AArch64::Q2_Q3_Q4_Q5, AArch64::Q3_Q4_Q5_Q6, AArch64::Q4_Q5_Q6_Q7, AArch64::Q5_Q6_Q7_Q8, AArch64::Q6_Q7_Q8_Q9, AArch64::Q7_Q8_Q9_Q10, AArch64::Q8_Q9_Q10_Q11, AArch64::Q9_Q10_Q11_Q12, AArch64::Q10_Q11_Q12_Q13, AArch64::Q11_Q12_Q13_Q14, AArch64::Q12_Q13_Q14_Q15, }; // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo Bit set. const uint8_t QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x1f, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b Register Class... const MCPhysReg ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, AArch64::Z8_Z9_Z10_Z11, AArch64::Z9_Z10_Z11_Z12, AArch64::Z10_Z11_Z12_Z13, AArch64::Z11_Z12_Z13_Z14, AArch64::Z12_Z13_Z14_Z15, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b Bit set. const uint8_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0xff, 0x01, }; // ZPR4Mul4 Register Class... const MCPhysReg ZPR4Mul4[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z4_Z5_Z6_Z7, AArch64::Z8_Z9_Z10_Z11, AArch64::Z12_Z13_Z14_Z15, AArch64::Z16_Z17_Z18_Z19, AArch64::Z20_Z21_Z22_Z23, AArch64::Z24_Z25_Z26_Z27, AArch64::Z28_Z29_Z30_Z31, }; // ZPR4Mul4 Bit set. const uint8_t ZPR4Mul4Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x11, 0x11, 0x11, 0x01, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 Register Class... const MCPhysReg ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2[] = { AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, AArch64::Z7_Z8_Z9_Z10, AArch64::Z9_Z10_Z11_Z12, AArch64::Z11_Z12_Z13_Z14, AArch64::Z13_Z14_Z15_Z16, AArch64::Z15_Z16_Z17_Z18, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 Bit set. const uint8_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0xaa, 0x0a, }; // ZPR4_with_zsub0_in_ZPR_3b Register Class... const MCPhysReg ZPR4_with_zsub0_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z7_Z8_Z9_Z10, }; // ZPR4_with_zsub0_in_ZPR_3b Bit set. const uint8_t ZPR4_with_zsub0_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, }; // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Register Class... const MCPhysReg ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z2_Z3_Z4_Z5, AArch64::Z4_Z5_Z6_Z7, AArch64::Z6_Z7_Z8_Z9, AArch64::Z8_Z9_Z10_Z11, AArch64::Z10_Z11_Z12_Z13, AArch64::Z12_Z13_Z14_Z15, AArch64::Z14_Z15_Z16_Z17, }; // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Bit set. const uint8_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55, 0x05, }; // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Register Class... const MCPhysReg ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo[] = { AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, AArch64::Z7_Z8_Z9_Z10, AArch64::Z9_Z10_Z11_Z12, AArch64::Z11_Z12_Z13_Z14, AArch64::Z13_Z14_Z15_Z16, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Bit set. const uint8_t ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0xaa, 0x02, 0x00, 0x08, }; // ZPR4_with_zsub1_in_ZPR_3b Register Class... const MCPhysReg ZPR4_with_zsub1_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4_with_zsub1_in_ZPR_3b Bit set. const uint8_t ZPR4_with_zsub1_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07, 0x00, 0x00, 0x08, }; // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Register Class... const MCPhysReg ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z2_Z3_Z4_Z5, AArch64::Z4_Z5_Z6_Z7, AArch64::Z6_Z7_Z8_Z9, AArch64::Z8_Z9_Z10_Z11, AArch64::Z10_Z11_Z12_Z13, AArch64::Z12_Z13_Z14_Z15, AArch64::Z30_Z31_Z0_Z1, }; // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Bit set. const uint8_t ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55, 0x01, 0x00, 0x04, }; // ZPR4_with_zsub2_in_ZPR_3b Register Class... const MCPhysReg ZPR4_with_zsub2_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z30_Z31_Z0_Z1, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4_with_zsub2_in_ZPR_3b Bit set. const uint8_t ZPR4_with_zsub2_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x03, 0x00, 0x00, 0x0c, }; // ZPR4_with_zsub3_in_ZPR_3b Register Class... const MCPhysReg ZPR4_with_zsub3_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z29_Z30_Z31_Z0, AArch64::Z30_Z31_Z0_Z1, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4_with_zsub3_in_ZPR_3b Bit set. const uint8_t ZPR4_with_zsub3_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x01, 0x00, 0x00, 0x0e, }; // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 Register Class... const MCPhysReg ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2[] = { AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, AArch64::Z7_Z8_Z9_Z10, AArch64::Z9_Z10_Z11_Z12, AArch64::Z11_Z12_Z13_Z14, AArch64::Z29_Z30_Z31_Z0, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 Bit set. const uint8_t ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0xaa, 0x00, 0x00, 0x0a, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Register Class... const MCPhysReg ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo[] = { AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, AArch64::Z7_Z8_Z9_Z10, AArch64::Z9_Z10_Z11_Z12, AArch64::Z11_Z12_Z13_Z14, AArch64::Z13_Z14_Z15_Z16, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Bit set. const uint8_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0xaa, 0x02, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b Register Class... const MCPhysReg ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z6_Z7_Z8_Z9, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b Bit set. const uint8_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x07, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Register Class... const MCPhysReg ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z2_Z3_Z4_Z5, AArch64::Z4_Z5_Z6_Z7, AArch64::Z6_Z7_Z8_Z9, AArch64::Z8_Z9_Z10_Z11, AArch64::Z10_Z11_Z12_Z13, AArch64::Z12_Z13_Z14_Z15, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo Bit set. const uint8_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x55, 0x01, }; // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b Register Class... const MCPhysReg ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b Bit set. const uint8_t ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x03, 0x00, 0x00, 0x08, }; // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 Register Class... const MCPhysReg ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2[] = { AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, AArch64::Z7_Z8_Z9_Z10, AArch64::Z9_Z10_Z11_Z12, AArch64::Z11_Z12_Z13_Z14, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 Bit set. const uint8_t ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0xaa, 0x00, 0x00, 0x08, }; // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b Register Class... const MCPhysReg ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z30_Z31_Z0_Z1, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b Bit set. const uint8_t ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x01, 0x00, 0x00, 0x0c, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b Register Class... const MCPhysReg ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z5_Z6_Z7_Z8, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b Bit set. const uint8_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x03, }; // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 Register Class... const MCPhysReg ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2[] = { AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, AArch64::Z7_Z8_Z9_Z10, AArch64::Z9_Z10_Z11_Z12, AArch64::Z11_Z12_Z13_Z14, }; // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 Bit set. const uint8_t ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0xaa, }; // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b Register Class... const MCPhysReg ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b Bit set. const uint8_t ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x01, 0x00, 0x00, 0x08, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b Register Class... const MCPhysReg ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z1_Z2_Z3_Z4, AArch64::Z2_Z3_Z4_Z5, AArch64::Z3_Z4_Z5_Z6, AArch64::Z4_Z5_Z6_Z7, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b Bit set. const uint8_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x01, }; // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo Register Class... const MCPhysReg ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z4_Z5_Z6_Z7, AArch64::Z8_Z9_Z10_Z11, AArch64::Z12_Z13_Z14_Z15, }; // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo Bit set. const uint8_t ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x11, 0x01, }; // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 Register Class... const MCPhysReg ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2[] = { AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, AArch64::Z7_Z8_Z9_Z10, }; // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 Bit set. const uint8_t ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0x0a, }; // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b Register Class... const MCPhysReg ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z2_Z3_Z4_Z5, AArch64::Z4_Z5_Z6_Z7, AArch64::Z6_Z7_Z8_Z9, }; // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b Bit set. const uint8_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x05, }; // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b Register Class... const MCPhysReg ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b[] = { AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b Bit set. const uint8_t ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0x02, 0x00, 0x00, 0x08, }; // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b Register Class... const MCPhysReg ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z2_Z3_Z4_Z5, AArch64::Z4_Z5_Z6_Z7, AArch64::Z30_Z31_Z0_Z1, }; // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b Bit set. const uint8_t ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x01, 0x00, 0x00, 0x04, }; // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 Register Class... const MCPhysReg ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2[] = { AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z29_Z30_Z31_Z0, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 Bit set. const uint8_t ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x00, 0x00, 0x0a, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b Register Class... const MCPhysReg ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b[] = { AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z5_Z6_Z7_Z8, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b Bit set. const uint8_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0x02, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b Register Class... const MCPhysReg ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z2_Z3_Z4_Z5, AArch64::Z4_Z5_Z6_Z7, }; // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b Bit set. const uint8_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x50, 0x01, }; // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 Register Class... const MCPhysReg ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2[] = { AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, AArch64::Z31_Z0_Z1_Z2, }; // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 Bit set. const uint8_t ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, 0x00, 0x00, 0x00, 0x08, }; // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b Register Class... const MCPhysReg ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b[] = { AArch64::Z0_Z1_Z2_Z3, AArch64::Z4_Z5_Z6_Z7, }; // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b Bit set. const uint8_t ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3bBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x01, }; // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 Register Class... const MCPhysReg ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2[] = { AArch64::Z1_Z2_Z3_Z4, AArch64::Z3_Z4_Z5_Z6, }; // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 Bit set. const uint8_t ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xa0, }; // GPR64x8Class Register Class... const MCPhysReg GPR64x8Class[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, }; // GPR64x8Class Bit set. const uint8_t GPR64x8ClassBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0f, }; // GPR64x8Class_with_x8sub_0_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_0_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, }; // GPR64x8Class_with_x8sub_0_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_0_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0d, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0e, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, 0x0f, }; // GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, }; // GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbf, 0x0f, }; // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, }; // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff, 0x0c, }; // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, }; // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, 0x0d, }; // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, }; // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbf, 0x0d, }; // GPR64x8Class_with_x8sub_0_in_tcGPR64 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_0_in_tcGPR64[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, }; // GPR64x8Class_with_x8sub_0_in_tcGPR64 Bit set. const uint8_t GPR64x8Class_with_x8sub_0_in_tcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x07, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, 0x0e, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbf, 0x0e, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x0f, }; // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, }; // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 Bit set. const uint8_t GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x05, }; // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, }; // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x06, }; // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, }; // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x07, }; // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, }; // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbe, 0x07, }; // GPR64x8Class_with_x8sub_1_in_tcGPR64 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_1_in_tcGPR64[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, }; // GPR64x8Class_with_x8sub_1_in_tcGPR64 Bit set. const uint8_t GPR64x8Class_with_x8sub_1_in_tcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x03, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7f, 0x0c, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbf, 0x0c, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x0d, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x0e, }; // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, }; // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x04, }; // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, }; // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x05, }; // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, }; // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbe, 0x05, }; // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, }; // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 Bit set. const uint8_t GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x01, }; // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, }; // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x03, }; // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, }; // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbe, 0x03, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x06, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbe, 0x06, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 Bit set. const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, 0x02, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x07, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, AArch64::X20_X21_X22_X23_X24_X25_X26_X27, AArch64::X22_X23_X24_X25_X26_X27_X28_FP, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3f, 0x0c, }; // ZPR4Strided Register Class... const MCPhysReg ZPR4Strided[] = { AArch64::Z0_Z4_Z8_Z12, AArch64::Z1_Z5_Z9_Z13, AArch64::Z2_Z6_Z10_Z14, AArch64::Z3_Z7_Z11_Z15, AArch64::Z16_Z20_Z24_Z28, AArch64::Z17_Z21_Z25_Z29, AArch64::Z18_Z22_Z26_Z30, AArch64::Z19_Z23_Z27_Z31, }; // ZPR4Strided Bit set. const uint8_t ZPR4StridedBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf0, 0x0f, }; // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, }; // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbe, 0x01, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x04, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbe, 0x04, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x02, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, }; // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbe, 0x02, }; // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, }; // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 Bit set. const uint8_t GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfe, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x05, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x03, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x06, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 Bit set. const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, 0x01, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x01, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X18_X19_X20_X21_X22_X23_X24_X25, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x04, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Register Class... const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X16_X17_X18_X19_X20_X21_X22_X23, }; // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip Bit set. const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, 0x02, }; // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, }; // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 Bit set. const uint8_t GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x7e, }; // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, }; // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 Bit set. const uint8_t GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xbe, }; // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, }; // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 Bit set. const uint8_t GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3e, }; // GPR64x8Class_with_sub_32_in_GPR32arg Register Class... const MCPhysReg GPR64x8Class_with_sub_32_in_GPR32arg[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, }; // GPR64x8Class_with_sub_32_in_GPR32arg Bit set. const uint8_t GPR64x8Class_with_sub_32_in_GPR32argBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x1e, }; // MPR32 Register Class... const MCPhysReg MPR32[] = { AArch64::ZAS0, AArch64::ZAS1, AArch64::ZAS2, AArch64::ZAS3, }; // MPR32 Bit set. const uint8_t MPR32Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x78, }; // ZPR4Strided_with_dsub_in_FPR64_lo Register Class... const MCPhysReg ZPR4Strided_with_dsub_in_FPR64_lo[] = { AArch64::Z0_Z4_Z8_Z12, AArch64::Z1_Z5_Z9_Z13, AArch64::Z2_Z6_Z10_Z14, AArch64::Z3_Z7_Z11_Z15, }; // ZPR4Strided_with_dsub_in_FPR64_lo Bit set. const uint8_t ZPR4Strided_with_dsub_in_FPR64_loBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, }; // GPR64x8Class_with_x8sub_2_in_GPR64arg Register Class... const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64arg[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, }; // GPR64x8Class_with_x8sub_2_in_GPR64arg Bit set. const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64argBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0e, }; // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 Register Class... const MCPhysReg GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15[] = { AArch64::X12_X13_X14_X15_X16_X17_X18_X19, AArch64::X14_X15_X16_X17_X18_X19_X20_X21, }; // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 Bit set. const uint8_t GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0x01, }; // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... const MCPhysReg GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11[] = { AArch64::X8_X9_X10_X11_X12_X13_X14_X15, AArch64::X10_X11_X12_X13_X14_X15_X16_X17, }; // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. const uint8_t GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x60, }; // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15[] = { AArch64::X10_X11_X12_X13_X14_X15_X16_X17, AArch64::X12_X13_X14_X15_X16_X17_X18_X19, }; // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 Bit set. const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, }; // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11[] = { AArch64::X6_X7_X8_X9_X10_X11_X12_X13, AArch64::X8_X9_X10_X11_X12_X13_X14_X15, }; // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, }; // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11[] = { AArch64::X4_X5_X6_X7_X8_X9_X10_X11, AArch64::X6_X7_X8_X9_X10_X11_X12_X13, }; // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, }; // GPR64x8Class_with_x8sub_4_in_GPR64arg Register Class... const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64arg[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, AArch64::X2_X3_X4_X5_X6_X7_X8_X9, }; // GPR64x8Class_with_x8sub_4_in_GPR64arg Bit set. const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64argBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, }; // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11[] = { AArch64::X2_X3_X4_X5_X6_X7_X8_X9, AArch64::X4_X5_X6_X7_X8_X9_X10_X11, }; // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. const uint8_t GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0c, }; // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... const MCPhysReg GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11[] = { AArch64::X6_X7_X8_X9_X10_X11_X12_X13, }; // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. const uint8_t GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, }; // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... const MCPhysReg GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11[] = { AArch64::X8_X9_X10_X11_X12_X13_X14_X15, }; // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. const uint8_t GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x20, }; // GPR64x8Class_with_x8sub_0_in_rtcGPR64 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_0_in_rtcGPR64[] = { AArch64::X16_X17_X18_X19_X20_X21_X22_X23, }; // GPR64x8Class_with_x8sub_0_in_rtcGPR64 Bit set. const uint8_t GPR64x8Class_with_x8sub_0_in_rtcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, }; // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11[] = { AArch64::X4_X5_X6_X7_X8_X9_X10_X11, }; // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. const uint8_t GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, }; // GPR64x8Class_with_x8sub_2_in_rtcGPR64 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_2_in_rtcGPR64[] = { AArch64::X14_X15_X16_X17_X18_X19_X20_X21, }; // GPR64x8Class_with_x8sub_2_in_rtcGPR64 Bit set. const uint8_t GPR64x8Class_with_x8sub_2_in_rtcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, }; // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11[] = { AArch64::X2_X3_X4_X5_X6_X7_X8_X9, }; // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 Bit set. const uint8_t GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x04, }; // GPR64x8Class_with_x8sub_4_in_rtcGPR64 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_4_in_rtcGPR64[] = { AArch64::X12_X13_X14_X15_X16_X17_X18_X19, }; // GPR64x8Class_with_x8sub_4_in_rtcGPR64 Bit set. const uint8_t GPR64x8Class_with_x8sub_4_in_rtcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, }; // GPR64x8Class_with_x8sub_6_in_GPR64arg Register Class... const MCPhysReg GPR64x8Class_with_x8sub_6_in_GPR64arg[] = { AArch64::X0_X1_X2_X3_X4_X5_X6_X7, }; // GPR64x8Class_with_x8sub_6_in_GPR64arg Bit set. const uint8_t GPR64x8Class_with_x8sub_6_in_GPR64argBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x02, }; // GPR64x8Class_with_x8sub_6_in_rtcGPR64 Register Class... const MCPhysReg GPR64x8Class_with_x8sub_6_in_rtcGPR64[] = { AArch64::X10_X11_X12_X13_X14_X15_X16_X17, }; // GPR64x8Class_with_x8sub_6_in_rtcGPR64 Bit set. const uint8_t GPR64x8Class_with_x8sub_6_in_rtcGPR64Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, }; // GPR64x8Class_with_x8sub_7_in_FIXED_REGS Register Class... const MCPhysReg GPR64x8Class_with_x8sub_7_in_FIXED_REGS[] = { AArch64::X22_X23_X24_X25_X26_X27_X28_FP, }; // GPR64x8Class_with_x8sub_7_in_FIXED_REGS Bit set. const uint8_t GPR64x8Class_with_x8sub_7_in_FIXED_REGSBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, }; // ZTR Register Class... const MCPhysReg ZTR[] = { AArch64::ZT0, }; // ZTR Bit set. const uint8_t ZTRBits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, }; // MPR16 Register Class... const MCPhysReg MPR16[] = { AArch64::ZAH0, AArch64::ZAH1, }; // MPR16 Bit set. const uint8_t MPR16Bits[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x06, }; // MPR Register Class... const MCPhysReg MPR[] = { AArch64::ZA, }; // MPR Bit set. const uint8_t MPRBits[] = { 0x00, 0x08, }; // MPR8 Register Class... const MCPhysReg MPR8[] = { AArch64::ZAB0, }; // MPR8 Bit set. const uint8_t MPR8Bits[] = { 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'8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '4', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 't', 'c', 'G', 'P', 'R', '6', '4', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '6', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', 0, /* 9045 */ 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '4', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 't', 'c', 'G', 'P', 'R', '6', '4', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '6', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', 0, /* 9211 */ 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '4', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '1', '_', 'i', 'n', '_', 't', 'c', 'G', 'P', 'R', '6', '4', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '6', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', 0, /* 9377 */ 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '4', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '6', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', 0, /* 9545 */ 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '4', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '0', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '6', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', 0, /* 9670 */ 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '4', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '2', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '6', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', 0, /* 9795 */ 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '4', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', '_', 'a', 'n', 'd', '_', 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', '_', 'w', 'i', 't', 'h', '_', 'x', '8', 's', 'u', 'b', '_', '6', '_', 'i', 'n', '_', 'G', 'P', 'R', '6', '4', 'n', 'o', 'i', 'p', 0, /* 9877 */ 'G', 'P', 'R', '3', '2', 's', 'p', 0, /* 9885 */ 'G', 'P', 'R', '6', '4', 's', 'p', 0, /* 9893 */ 'G', 'P', 'R', '6', '4', 'x', '8', 'C', 'l', 'a', 's', 's', 0, /* 9906 */ 'W', 'S', 'e', 'q', 'P', 'a', 'i', 'r', 's', 'C', 'l', 'a', 's', 's', 0, /* 9921 */ 'X', 'S', 'e', 'q', 'P', 'a', 'i', 'r', 's', 'C', 'l', 'a', 's', 's', 0, /* 9936 */ 'G', 'P', 'R', '3', '2', 's', 'p', 'o', 'n', 'l', 'y', 0, /* 9948 */ 'G', 'P', 'R', '6', '4', 's', 'p', 'o', 'n', 'l', 'y', 0, 0 }; extern const MCRegisterClass AArch64MCRegisterClasses[] = { { FPR8, FPR8Bits, 2977, 32, sizeof(FPR8Bits), AArch64::FPR8RegClassID, 8, 1, true }, { FPR16, FPR16Bits, 2951, 32, sizeof(FPR16Bits), AArch64::FPR16RegClassID, 16, 1, true }, { FPR16_lo, FPR16_loBits, 6684, 16, sizeof(FPR16_loBits), AArch64::FPR16_loRegClassID, 16, 1, true }, { PPR, PPRBits, 3005, 16, sizeof(PPRBits), AArch64::PPRRegClassID, 16, 1, true }, { PPR_3b, PPR_3bBits, 3130, 8, sizeof(PPR_3bBits), AArch64::PPR_3bRegClassID, 16, 1, true }, { PPR_p8to15, PPR_p8to15Bits, 2816, 8, sizeof(PPR_p8to15Bits), AArch64::PPR_p8to15RegClassID, 16, 1, true }, { PPR2, PPR2Bits, 662, 16, sizeof(PPR2Bits), AArch64::PPR2RegClassID, 32, 1, true }, { PPR2Mul2, PPR2Mul2Bits, 672, 8, sizeof(PPR2Mul2Bits), AArch64::PPR2Mul2RegClassID, 32, 1, true }, { PPR2_with_psub0_in_PPR_3b, PPR2_with_psub0_in_PPR_3bBits, 3111, 8, sizeof(PPR2_with_psub0_in_PPR_3bBits), AArch64::PPR2_with_psub0_in_PPR_3bRegClassID, 32, 1, true }, { PPR2_with_psub0_in_PPR_p8to15, PPR2_with_psub0_in_PPR_p8to15Bits, 2797, 8, sizeof(PPR2_with_psub0_in_PPR_p8to15Bits), AArch64::PPR2_with_psub0_in_PPR_p8to15RegClassID, 32, 1, true }, { PPR2_with_psub1_in_PPR_3b, PPR2_with_psub1_in_PPR_3bBits, 3171, 8, sizeof(PPR2_with_psub1_in_PPR_3bBits), AArch64::PPR2_with_psub1_in_PPR_3bRegClassID, 32, 1, true }, { PPR2_with_psub1_in_PPR_p8to15, PPR2_with_psub1_in_PPR_p8to15Bits, 2861, 8, sizeof(PPR2_with_psub1_in_PPR_p8to15Bits), AArch64::PPR2_with_psub1_in_PPR_p8to15RegClassID, 32, 1, true }, { PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b, PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3bBits, 3197, 7, sizeof(PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3bBits), AArch64::PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3bRegClassID, 32, 1, true }, { PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15, PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15Bits, 2827, 7, sizeof(PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15Bits), AArch64::PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15RegClassID, 32, 1, true }, { PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b, PPR2Mul2_and_PPR2_with_psub0_in_PPR_3bBits, 3098, 4, sizeof(PPR2Mul2_and_PPR2_with_psub0_in_PPR_3bBits), AArch64::PPR2Mul2_and_PPR2_with_psub0_in_PPR_3bRegClassID, 32, 1, true }, { PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15, PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15Bits, 2784, 4, sizeof(PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15Bits), AArch64::PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15RegClassID, 32, 1, true }, { PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15, PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15Bits, 2891, 1, sizeof(PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15Bits), AArch64::PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15RegClassID, 32, 1, true }, { PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b, PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3bBits, 3137, 1, sizeof(PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3bBits), AArch64::PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3bRegClassID, 32, 1, true }, { GPR32all, GPR32allBits, 5178, 33, sizeof(GPR32allBits), AArch64::GPR32allRegClassID, 32, 1, true }, { FPR32, FPR32Bits, 621, 32, sizeof(FPR32Bits), AArch64::FPR32RegClassID, 32, 1, true }, { GPR32, GPR32Bits, 627, 32, sizeof(GPR32Bits), AArch64::GPR32RegClassID, 32, 1, true }, { GPR32sp, GPR32spBits, 9877, 32, sizeof(GPR32spBits), AArch64::GPR32spRegClassID, 32, 1, true }, { GPR32common, GPR32commonBits, 5226, 31, sizeof(GPR32commonBits), AArch64::GPR32commonRegClassID, 32, 1, true }, { FPR32_with_hsub_in_FPR16_lo, FPR32_with_hsub_in_FPR16_loBits, 6665, 16, sizeof(FPR32_with_hsub_in_FPR16_loBits), AArch64::FPR32_with_hsub_in_FPR16_loRegClassID, 32, 1, true }, { GPR32arg, GPR32argBits, 4977, 8, sizeof(GPR32argBits), AArch64::GPR32argRegClassID, 32, 1, true }, { MatrixIndexGPR32_12_15, MatrixIndexGPR32_12_15Bits, 2604, 4, sizeof(MatrixIndexGPR32_12_15Bits), AArch64::MatrixIndexGPR32_12_15RegClassID, 32, 1, true }, { MatrixIndexGPR32_8_11, MatrixIndexGPR32_8_11Bits, 104, 4, sizeof(MatrixIndexGPR32_8_11Bits), AArch64::MatrixIndexGPR32_8_11RegClassID, 32, 1, true }, { CCR, CCRBits, 2997, 1, sizeof(CCRBits), AArch64::CCRRegClassID, 32, -1, false }, { GPR32sponly, GPR32sponlyBits, 9936, 1, sizeof(GPR32sponlyBits), AArch64::GPR32sponlyRegClassID, 32, 1, true }, { WSeqPairsClass, WSeqPairsClassBits, 9906, 16, sizeof(WSeqPairsClassBits), AArch64::WSeqPairsClassRegClassID, 64, 1, true }, { WSeqPairsClass_with_subo32_in_GPR32common, WSeqPairsClass_with_subo32_in_GPR32commonBits, 5196, 15, sizeof(WSeqPairsClass_with_subo32_in_GPR32commonBits), AArch64::WSeqPairsClass_with_subo32_in_GPR32commonRegClassID, 64, 1, true }, { WSeqPairsClass_with_sube32_in_GPR32arg, WSeqPairsClass_with_sube32_in_GPR32argBits, 5025, 4, sizeof(WSeqPairsClass_with_sube32_in_GPR32argBits), AArch64::WSeqPairsClass_with_sube32_in_GPR32argRegClassID, 64, 1, true }, { WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15, WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15Bits, 2731, 2, sizeof(WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15Bits), AArch64::WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15RegClassID, 64, 1, true }, { WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11, WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11Bits, 569, 2, sizeof(WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11Bits), AArch64::WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11RegClassID, 64, 1, true }, { GPR64all, GPR64allBits, 5187, 33, sizeof(GPR64allBits), AArch64::GPR64allRegClassID, 64, 1, true }, { FPR64, FPR64Bits, 1654, 32, sizeof(FPR64Bits), AArch64::FPR64RegClassID, 64, 1, true }, { GPR64, GPR64Bits, 1675, 32, sizeof(GPR64Bits), AArch64::GPR64RegClassID, 64, 1, true }, { GPR64sp, GPR64spBits, 9885, 32, sizeof(GPR64spBits), AArch64::GPR64spRegClassID, 64, 1, true }, { GPR64common, GPR64commonBits, 5268, 31, sizeof(GPR64commonBits), AArch64::GPR64commonRegClassID, 64, 1, true }, { GPR64noip, GPR64noipBits, 7307, 29, sizeof(GPR64noipBits), AArch64::GPR64noipRegClassID, 64, 1, true }, { GPR64common_and_GPR64noip, GPR64common_and_GPR64noipBits, 7291, 28, sizeof(GPR64common_and_GPR64noipBits), AArch64::GPR64common_and_GPR64noipRegClassID, 64, 1, true }, { tcGPR64, tcGPR64Bits, 1724, 19, sizeof(tcGPR64Bits), AArch64::tcGPR64RegClassID, 64, 1, true }, { GPR64noip_and_tcGPR64, GPR64noip_and_tcGPR64Bits, 1710, 17, sizeof(GPR64noip_and_tcGPR64Bits), AArch64::GPR64noip_and_tcGPR64RegClassID, 64, 1, true }, { FPR64_lo, FPR64_loBits, 5299, 16, sizeof(FPR64_loBits), AArch64::FPR64_loRegClassID, 64, 1, true }, { GPR64arg, GPR64argBits, 5093, 8, sizeof(GPR64argBits), AArch64::GPR64argRegClassID, 64, 1, true }, { FIXED_REGS, FIXED_REGSBits, 3047, 4, sizeof(FIXED_REGSBits), AArch64::FIXED_REGSRegClassID, 64, 1, true }, { GPR64_with_sub_32_in_MatrixIndexGPR32_12_15, GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Bits, 2583, 4, sizeof(GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Bits), AArch64::GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID, 64, 1, true }, { GPR64_with_sub_32_in_MatrixIndexGPR32_8_11, GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 83, 4, sizeof(GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 64, 1, true }, { FIXED_REGS_with_sub_32, FIXED_REGS_with_sub_32Bits, 639, 2, sizeof(FIXED_REGS_with_sub_32Bits), AArch64::FIXED_REGS_with_sub_32RegClassID, 64, 1, true }, { rtcGPR64, rtcGPR64Bits, 2372, 2, sizeof(rtcGPR64Bits), AArch64::rtcGPR64RegClassID, 64, 1, true }, { FIXED_REGS_and_GPR64, FIXED_REGS_and_GPR64Bits, 1660, 1, sizeof(FIXED_REGS_and_GPR64Bits), AArch64::FIXED_REGS_and_GPR64RegClassID, 64, 1, true }, { GPR64sponly, GPR64sponlyBits, 9948, 1, sizeof(GPR64sponlyBits), AArch64::GPR64sponlyRegClassID, 64, 1, true }, { DD, DDBits, 2989, 32, sizeof(DDBits), AArch64::DDRegClassID, 128, 1, true }, { DD_with_dsub0_in_FPR64_lo, DD_with_dsub0_in_FPR64_loBits, 5282, 16, sizeof(DD_with_dsub0_in_FPR64_loBits), AArch64::DD_with_dsub0_in_FPR64_loRegClassID, 128, 1, true }, { DD_with_dsub1_in_FPR64_lo, DD_with_dsub1_in_FPR64_loBits, 5342, 16, sizeof(DD_with_dsub1_in_FPR64_loBits), AArch64::DD_with_dsub1_in_FPR64_loRegClassID, 128, 1, true }, { XSeqPairsClass, XSeqPairsClassBits, 9921, 16, sizeof(XSeqPairsClassBits), AArch64::XSeqPairsClassRegClassID, 128, 1, true }, { DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo, DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loBits, 5426, 15, sizeof(DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loBits), AArch64::DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loRegClassID, 128, 1, true }, { XSeqPairsClass_with_subo64_in_GPR64common, XSeqPairsClass_with_subo64_in_GPR64commonBits, 5238, 15, sizeof(XSeqPairsClass_with_subo64_in_GPR64commonBits), AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClassID, 128, 1, true }, { XSeqPairsClass_with_subo64_in_GPR64noip, XSeqPairsClass_with_subo64_in_GPR64noipBits, 7599, 15, sizeof(XSeqPairsClass_with_subo64_in_GPR64noipBits), AArch64::XSeqPairsClass_with_subo64_in_GPR64noipRegClassID, 128, 1, true }, { XSeqPairsClass_with_sube64_in_GPR64noip, XSeqPairsClass_with_sube64_in_GPR64noipBits, 7559, 14, sizeof(XSeqPairsClass_with_sube64_in_GPR64noipBits), AArch64::XSeqPairsClass_with_sube64_in_GPR64noipRegClassID, 128, 1, true }, { XSeqPairsClass_with_sube64_in_tcGPR64, XSeqPairsClass_with_sube64_in_tcGPR64Bits, 2267, 10, sizeof(XSeqPairsClass_with_sube64_in_tcGPR64Bits), AArch64::XSeqPairsClass_with_sube64_in_tcGPR64RegClassID, 128, 1, true }, { XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64, XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64Bits, 1885, 9, sizeof(XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64Bits), AArch64::XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64RegClassID, 128, 1, true }, { XSeqPairsClass_with_subo64_in_tcGPR64, XSeqPairsClass_with_subo64_in_tcGPR64Bits, 2305, 9, sizeof(XSeqPairsClass_with_subo64_in_tcGPR64Bits), AArch64::XSeqPairsClass_with_subo64_in_tcGPR64RegClassID, 128, 1, true }, { XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64, XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64Bits, 1937, 8, sizeof(XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64Bits), AArch64::XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64RegClassID, 128, 1, true }, { XSeqPairsClass_with_sub_32_in_GPR32arg, XSeqPairsClass_with_sub_32_in_GPR32argBits, 4986, 4, sizeof(XSeqPairsClass_with_sub_32_in_GPR32argBits), AArch64::XSeqPairsClass_with_sub_32_in_GPR32argRegClassID, 128, 1, true }, { XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15, XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15Bits, 2678, 2, sizeof(XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15Bits), AArch64::XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID, 128, 1, true }, { XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11, XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 517, 2, sizeof(XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 128, 1, true }, { XSeqPairsClass_with_sube64_in_rtcGPR64, XSeqPairsClass_with_sube64_in_rtcGPR64Bits, 2419, 1, sizeof(XSeqPairsClass_with_sube64_in_rtcGPR64Bits), AArch64::XSeqPairsClass_with_sube64_in_rtcGPR64RegClassID, 128, 1, true }, { XSeqPairsClass_with_subo64_in_FIXED_REGS, XSeqPairsClass_with_subo64_in_FIXED_REGSBits, 3017, 1, sizeof(XSeqPairsClass_with_subo64_in_FIXED_REGSBits), AArch64::XSeqPairsClass_with_subo64_in_FIXED_REGSRegClassID, 128, 1, true }, { FPR128, FPR128Bits, 2963, 32, sizeof(FPR128Bits), AArch64::FPR128RegClassID, 128, 1, true }, { ZPR, ZPRBits, 3009, 32, sizeof(ZPRBits), AArch64::ZPRRegClassID, 128, 1, true }, { FPR128_lo, FPR128_loBits, 6743, 16, sizeof(FPR128_loBits), AArch64::FPR128_loRegClassID, 128, 1, true }, { MPR128, MPR128Bits, 2970, 16, sizeof(MPR128Bits), AArch64::MPR128RegClassID, 128, 1, false }, { ZPR_4b, ZPR_4bBits, 4409, 16, sizeof(ZPR_4bBits), AArch64::ZPR_4bRegClassID, 128, 1, true }, { ZPR_3b, ZPR_3bBits, 3310, 8, sizeof(ZPR_3bBits), AArch64::ZPR_3bRegClassID, 128, 1, true }, { DDD, DDDBits, 2988, 32, sizeof(DDDBits), AArch64::DDDRegClassID, 192, 1, true }, { DDD_with_dsub0_in_FPR64_lo, DDD_with_dsub0_in_FPR64_loBits, 5281, 16, sizeof(DDD_with_dsub0_in_FPR64_loBits), AArch64::DDD_with_dsub0_in_FPR64_loRegClassID, 192, 1, true }, { DDD_with_dsub1_in_FPR64_lo, DDD_with_dsub1_in_FPR64_loBits, 5341, 16, sizeof(DDD_with_dsub1_in_FPR64_loBits), AArch64::DDD_with_dsub1_in_FPR64_loRegClassID, 192, 1, true }, { DDD_with_dsub2_in_FPR64_lo, DDD_with_dsub2_in_FPR64_loBits, 5515, 16, sizeof(DDD_with_dsub2_in_FPR64_loBits), AArch64::DDD_with_dsub2_in_FPR64_loRegClassID, 192, 1, true }, { DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo, DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loBits, 5368, 15, sizeof(DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loBits), AArch64::DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loRegClassID, 192, 1, true }, { DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo, DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loBits, 5660, 15, sizeof(DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loBits), AArch64::DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClassID, 192, 1, true }, { DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo, DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loBits, 5602, 14, sizeof(DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loBits), AArch64::DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClassID, 192, 1, true }, { DDDD, DDDDBits, 2987, 32, sizeof(DDDDBits), AArch64::DDDDRegClassID, 256, 1, true }, { DDDD_with_dsub0_in_FPR64_lo, DDDD_with_dsub0_in_FPR64_loBits, 5280, 16, sizeof(DDDD_with_dsub0_in_FPR64_loBits), AArch64::DDDD_with_dsub0_in_FPR64_loRegClassID, 256, 1, true }, { DDDD_with_dsub1_in_FPR64_lo, DDDD_with_dsub1_in_FPR64_loBits, 5340, 16, sizeof(DDDD_with_dsub1_in_FPR64_loBits), AArch64::DDDD_with_dsub1_in_FPR64_loRegClassID, 256, 1, true }, { DDDD_with_dsub2_in_FPR64_lo, DDDD_with_dsub2_in_FPR64_loBits, 5514, 16, sizeof(DDDD_with_dsub2_in_FPR64_loBits), AArch64::DDDD_with_dsub2_in_FPR64_loRegClassID, 256, 1, true }, { DDDD_with_dsub3_in_FPR64_lo, DDDD_with_dsub3_in_FPR64_loBits, 5750, 16, sizeof(DDDD_with_dsub3_in_FPR64_loBits), AArch64::DDDD_with_dsub3_in_FPR64_loRegClassID, 256, 1, true }, { DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo, DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loBits, 5308, 15, sizeof(DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loBits), AArch64::DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loRegClassID, 256, 1, true }, { DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo, DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loBits, 5542, 15, sizeof(DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loBits), AArch64::DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClassID, 256, 1, true }, { DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo, DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loBits, 5838, 15, sizeof(DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loBits), AArch64::DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID, 256, 1, true }, { DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo, DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loBits, 5482, 14, sizeof(DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loBits), AArch64::DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClassID, 256, 1, true }, { DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo, DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loBits, 5778, 14, sizeof(DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loBits), AArch64::DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID, 256, 1, true }, { DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo, DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loBits, 5718, 13, sizeof(DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loBits), AArch64::DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID, 256, 1, true }, { QQ, QQBits, 2994, 32, sizeof(QQBits), AArch64::QQRegClassID, 256, 1, true }, { ZPR2, ZPR2Bits, 667, 32, sizeof(ZPR2Bits), AArch64::ZPR2RegClassID, 256, 1, true }, { QQ_with_dsub_in_FPR64_lo, QQ_with_dsub_in_FPR64_loBits, 6572, 16, sizeof(QQ_with_dsub_in_FPR64_loBits), AArch64::QQ_with_dsub_in_FPR64_loRegClassID, 256, 1, true }, { QQ_with_qsub1_in_FPR128_lo, QQ_with_qsub1_in_FPR128_loBits, 6726, 16, sizeof(QQ_with_qsub1_in_FPR128_loBits), AArch64::QQ_with_qsub1_in_FPR128_loRegClassID, 256, 1, true }, { ZPR2Mul2, ZPR2Mul2Bits, 788, 16, sizeof(ZPR2Mul2Bits), AArch64::ZPR2Mul2RegClassID, 256, 1, true }, { ZPR2_with_dsub_in_FPR64_lo, ZPR2_with_dsub_in_FPR64_loBits, 5966, 16, sizeof(ZPR2_with_dsub_in_FPR64_loBits), AArch64::ZPR2_with_dsub_in_FPR64_loRegClassID, 256, 1, true }, { ZPR2_with_zsub1_in_ZPR_4b, ZPR2_with_zsub1_in_ZPR_4bBits, 4390, 16, sizeof(ZPR2_with_zsub1_in_ZPR_4bBits), AArch64::ZPR2_with_zsub1_in_ZPR_4bRegClassID, 256, 1, true }, { QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo, QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_loBits, 6811, 15, sizeof(QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_loBits), AArch64::QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_loRegClassID, 256, 1, true }, { ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b, ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4bBits, 4359, 15, sizeof(ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4bBits), AArch64::ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4bRegClassID, 256, 1, true }, { ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo, ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits, 5953, 8, sizeof(ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits), AArch64::ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID, 256, 1, true }, { ZPR2_with_zsub0_in_ZPR_3b, ZPR2_with_zsub0_in_ZPR_3bBits, 3291, 8, sizeof(ZPR2_with_zsub0_in_ZPR_3bBits), AArch64::ZPR2_with_zsub0_in_ZPR_3bRegClassID, 256, 1, true }, { ZPR2_with_zsub1_in_ZPR_3b, ZPR2_with_zsub1_in_ZPR_3bBits, 3824, 8, sizeof(ZPR2_with_zsub1_in_ZPR_3bBits), AArch64::ZPR2_with_zsub1_in_ZPR_3bRegClassID, 256, 1, true }, { ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b, ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3bBits, 3793, 7, sizeof(ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3bBits), AArch64::ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3bRegClassID, 256, 1, true }, { ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b, ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits, 3278, 4, sizeof(ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits), AArch64::ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID, 256, 1, true }, { ZPR2Strided, ZPR2StridedBits, 4925, 16, sizeof(ZPR2StridedBits), AArch64::ZPR2StridedRegClassID, 256, 1, true }, { MPR64, MPR64Bits, 2534, 8, sizeof(MPR64Bits), AArch64::MPR64RegClassID, 256, 1, false }, { ZPR2Strided_with_dsub_in_FPR64_lo, ZPR2Strided_with_dsub_in_FPR64_loBits, 6597, 8, sizeof(ZPR2Strided_with_dsub_in_FPR64_loBits), AArch64::ZPR2Strided_with_dsub_in_FPR64_loRegClassID, 256, 1, true }, { QQQ, QQQBits, 2993, 32, sizeof(QQQBits), AArch64::QQQRegClassID, 384, 1, true }, { ZPR3, ZPR3Bits, 1649, 32, sizeof(ZPR3Bits), AArch64::ZPR3RegClassID, 384, 1, true }, { QQQ_with_dsub_in_FPR64_lo, QQQ_with_dsub_in_FPR64_loBits, 6571, 16, sizeof(QQQ_with_dsub_in_FPR64_loBits), AArch64::QQQ_with_dsub_in_FPR64_loRegClassID, 384, 1, true }, { QQQ_with_qsub1_in_FPR128_lo, QQQ_with_qsub1_in_FPR128_loBits, 6725, 16, sizeof(QQQ_with_qsub1_in_FPR128_loBits), AArch64::QQQ_with_qsub1_in_FPR128_loRegClassID, 384, 1, true }, { QQQ_with_qsub2_in_FPR128_lo, QQQ_with_qsub2_in_FPR128_loBits, 6899, 16, sizeof(QQQ_with_qsub2_in_FPR128_loBits), AArch64::QQQ_with_qsub2_in_FPR128_loRegClassID, 384, 1, true }, { ZPR3_with_dsub_in_FPR64_lo, ZPR3_with_dsub_in_FPR64_loBits, 6503, 16, sizeof(ZPR3_with_dsub_in_FPR64_loBits), AArch64::ZPR3_with_dsub_in_FPR64_loRegClassID, 384, 1, true }, { ZPR3_with_zsub0_zsub1_in_ZPR2Mul2, ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits, 763, 16, sizeof(ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits), AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, 384, 1, true }, { ZPR3_with_zsub1_in_ZPR_4b, ZPR3_with_zsub1_in_ZPR_4bBits, 4447, 16, sizeof(ZPR3_with_zsub1_in_ZPR_4bBits), AArch64::ZPR3_with_zsub1_in_ZPR_4bRegClassID, 384, 1, true }, { ZPR3_with_zsub1_zsub2_in_ZPR2Mul2, ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits, 1264, 16, sizeof(ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits), AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID, 384, 1, true }, { ZPR3_with_zsub2_in_ZPR_4b, ZPR3_with_zsub2_in_ZPR_4bBits, 4560, 16, sizeof(ZPR3_with_zsub2_in_ZPR_4bBits), AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClassID, 384, 1, true }, { QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo, QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_loBits, 6753, 15, sizeof(QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_loBits), AArch64::QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_loRegClassID, 384, 1, true }, { QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo, QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits, 7047, 15, sizeof(QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loBits), AArch64::QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loRegClassID, 384, 1, true }, { ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b, ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bBits, 4416, 15, sizeof(ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bBits), AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bRegClassID, 384, 1, true }, { ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b, ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bBits, 4530, 15, sizeof(ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bBits), AArch64::ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClassID, 384, 1, true }, { QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo, QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_loBits, 6989, 14, sizeof(QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_loBits), AArch64::QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_loRegClassID, 384, 1, true }, { ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b, ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bBits, 4586, 14, sizeof(ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bBits), AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bRegClassID, 384, 1, true }, { ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2, ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits, 1298, 8, sizeof(ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits), AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID, 384, 1, true }, { ZPR3_with_zsub0_in_ZPR_3b, ZPR3_with_zsub0_in_ZPR_3bBits, 3728, 8, sizeof(ZPR3_with_zsub0_in_ZPR_3bBits), AArch64::ZPR3_with_zsub0_in_ZPR_3bRegClassID, 384, 1, true }, { ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo, ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits, 5928, 8, sizeof(ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits), AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID, 384, 1, true }, { ZPR3_with_zsub1_in_ZPR_3b, ZPR3_with_zsub1_in_ZPR_3bBits, 3881, 8, sizeof(ZPR3_with_zsub1_in_ZPR_3bBits), AArch64::ZPR3_with_zsub1_in_ZPR_3bRegClassID, 384, 1, true }, { ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo, ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits, 6184, 8, sizeof(ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits), AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID, 384, 1, true }, { ZPR3_with_zsub2_in_ZPR_3b, ZPR3_with_zsub2_in_ZPR_3bBits, 3994, 8, sizeof(ZPR3_with_zsub2_in_ZPR_3bBits), AArch64::ZPR3_with_zsub2_in_ZPR_3bRegClassID, 384, 1, true }, { ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2, ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits, 966, 8, sizeof(ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits), AArch64::ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, 384, 1, true }, { ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b, ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3bBits, 3850, 7, sizeof(ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3bBits), AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3bRegClassID, 384, 1, true }, { ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo, ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits, 6153, 7, sizeof(ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits), AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID, 384, 1, true }, { ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b, ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3bBits, 3964, 7, sizeof(ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3bBits), AArch64::ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3bRegClassID, 384, 1, true }, { ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo, ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits, 5993, 7, sizeof(ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits), AArch64::ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID, 384, 1, true }, { ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b, ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3bBits, 4020, 6, sizeof(ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3bBits), AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3bRegClassID, 384, 1, true }, { ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2, ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits, 1234, 4, sizeof(ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits), AArch64::ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID, 384, 1, true }, { ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b, ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits, 3253, 4, sizeof(ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits), AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID, 384, 1, true }, { ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b, ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits, 3412, 4, sizeof(ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits), AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID, 384, 1, true }, { ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2, ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits, 733, 4, sizeof(ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits), AArch64::ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, 384, 1, true }, { ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b, ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits, 3381, 3, sizeof(ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits), AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID, 384, 1, true }, { ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo, ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits, 5898, 3, sizeof(ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits), AArch64::ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID, 384, 1, true }, { QQQQ, QQQQBits, 2992, 32, sizeof(QQQQBits), AArch64::QQQQRegClassID, 512, 1, true }, { ZPR4, ZPR4Bits, 2540, 32, sizeof(ZPR4Bits), AArch64::ZPR4RegClassID, 512, 1, true }, { QQQQ_with_dsub_in_FPR64_lo, QQQQ_with_dsub_in_FPR64_loBits, 6570, 16, sizeof(QQQQ_with_dsub_in_FPR64_loBits), AArch64::QQQQ_with_dsub_in_FPR64_loRegClassID, 512, 1, true }, { QQQQ_with_qsub1_in_FPR128_lo, QQQQ_with_qsub1_in_FPR128_loBits, 6724, 16, sizeof(QQQQ_with_qsub1_in_FPR128_loBits), AArch64::QQQQ_with_qsub1_in_FPR128_loRegClassID, 512, 1, true }, { QQQQ_with_qsub2_in_FPR128_lo, QQQQ_with_qsub2_in_FPR128_loBits, 6898, 16, sizeof(QQQQ_with_qsub2_in_FPR128_loBits), AArch64::QQQQ_with_qsub2_in_FPR128_loRegClassID, 512, 1, true }, { QQQQ_with_qsub3_in_FPR128_lo, QQQQ_with_qsub3_in_FPR128_loBits, 7138, 16, sizeof(QQQQ_with_qsub3_in_FPR128_loBits), AArch64::QQQQ_with_qsub3_in_FPR128_loRegClassID, 512, 1, true }, { ZPR4_with_dsub_in_FPR64_lo, ZPR4_with_dsub_in_FPR64_loBits, 6543, 16, sizeof(ZPR4_with_dsub_in_FPR64_loBits), AArch64::ZPR4_with_dsub_in_FPR64_loRegClassID, 512, 1, true }, { ZPR4_with_zsub0_zsub1_in_ZPR2Mul2, ZPR4_with_zsub0_zsub1_in_ZPR2Mul2Bits, 1147, 16, sizeof(ZPR4_with_zsub0_zsub1_in_ZPR2Mul2Bits), AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, 512, 1, true }, { ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2, ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits, 1393, 16, sizeof(ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits), AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID, 512, 1, true }, { ZPR4_with_zsub1_in_ZPR_4b, ZPR4_with_zsub1_in_ZPR_4bBits, 4504, 16, sizeof(ZPR4_with_zsub1_in_ZPR_4bBits), AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClassID, 512, 1, true }, { ZPR4_with_zsub2_in_ZPR_4b, ZPR4_with_zsub2_in_ZPR_4bBits, 4673, 16, sizeof(ZPR4_with_zsub2_in_ZPR_4bBits), AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClassID, 512, 1, true }, { ZPR4_with_zsub3_in_ZPR_4b, ZPR4_with_zsub3_in_ZPR_4bBits, 4786, 16, sizeof(ZPR4_with_zsub3_in_ZPR_4bBits), AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClassID, 512, 1, true }, { QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo, QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_loBits, 6693, 15, sizeof(QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_loBits), AArch64::QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_loRegClassID, 512, 1, true }, { QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo, QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits, 6927, 15, sizeof(QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loBits), AArch64::QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClassID, 512, 1, true }, { QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo, QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits, 7229, 15, sizeof(QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits), AArch64::QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID, 512, 1, true }, { ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bBits, 4473, 15, sizeof(ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bBits), AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClassID, 512, 1, true }, { ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b, ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bBits, 4643, 15, sizeof(ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bBits), AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClassID, 512, 1, true }, { ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b, ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bBits, 4812, 15, sizeof(ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bBits), AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClassID, 512, 1, true }, { QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo, QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_loBits, 6867, 14, sizeof(QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_loBits), AArch64::QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClassID, 512, 1, true }, { QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo, QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits, 7167, 14, sizeof(QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loBits), AArch64::QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID, 512, 1, true }, { ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bBits, 4699, 14, sizeof(ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bBits), AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClassID, 512, 1, true }, { ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b, ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bBits, 4756, 14, sizeof(ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bBits), AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClassID, 512, 1, true }, { QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo, QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_loBits, 7107, 13, sizeof(QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_loBits), AArch64::QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID, 512, 1, true }, { ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bBits, 4868, 13, sizeof(ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bBits), AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bRegClassID, 512, 1, true }, { ZPR4Mul4, ZPR4Mul4Bits, 2545, 8, sizeof(ZPR4Mul4Bits), AArch64::ZPR4Mul4RegClassID, 512, 1, true }, { ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits, 1553, 8, sizeof(ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits), AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID, 512, 1, true }, { ZPR4_with_zsub0_in_ZPR_3b, ZPR4_with_zsub0_in_ZPR_3bBits, 3767, 8, sizeof(ZPR4_with_zsub0_in_ZPR_3bBits), AArch64::ZPR4_with_zsub0_in_ZPR_3bRegClassID, 512, 1, true }, { ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo, ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits, 6088, 8, sizeof(ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits), AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID, 512, 1, true }, { ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo, ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits, 6280, 8, sizeof(ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits), AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID, 512, 1, true }, { ZPR4_with_zsub1_in_ZPR_3b, ZPR4_with_zsub1_in_ZPR_3bBits, 3938, 8, sizeof(ZPR4_with_zsub1_in_ZPR_3bBits), AArch64::ZPR4_with_zsub1_in_ZPR_3bRegClassID, 512, 1, true }, { ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo, ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits, 6407, 8, sizeof(ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits), AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID, 512, 1, true }, { ZPR4_with_zsub2_in_ZPR_3b, ZPR4_with_zsub2_in_ZPR_3bBits, 4107, 8, sizeof(ZPR4_with_zsub2_in_ZPR_3bBits), AArch64::ZPR4_with_zsub2_in_ZPR_3bRegClassID, 512, 1, true }, { ZPR4_with_zsub3_in_ZPR_3b, ZPR4_with_zsub3_in_ZPR_3bBits, 4220, 8, sizeof(ZPR4_with_zsub3_in_ZPR_3bBits), AArch64::ZPR4_with_zsub3_in_ZPR_3bRegClassID, 512, 1, true }, { ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2, ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits, 1458, 8, sizeof(ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits), AArch64::ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID, 512, 1, true }, { ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits, 6249, 7, sizeof(ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits), AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID, 512, 1, true }, { ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bBits, 3907, 7, sizeof(ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bBits), AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bRegClassID, 512, 1, true }, { ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits, 6376, 7, sizeof(ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loBits), AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID, 512, 1, true }, { ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b, ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bBits, 4077, 7, sizeof(ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bBits), AArch64::ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bRegClassID, 512, 1, true }, { ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2, ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits, 914, 7, sizeof(ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits), AArch64::ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, 512, 1, true }, { ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b, ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bBits, 4246, 7, sizeof(ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bBits), AArch64::ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClassID, 512, 1, true }, { ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3bBits, 4133, 6, sizeof(ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3bBits), AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3bRegClassID, 512, 1, true }, { ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2, ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits, 1030, 6, sizeof(ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits), AArch64::ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, 512, 1, true }, { ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b, ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bBits, 4190, 6, sizeof(ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bBits), AArch64::ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClassID, 512, 1, true }, { ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3bBits, 4302, 5, sizeof(ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3bBits), AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3bRegClassID, 512, 1, true }, { ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo, ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_loBits, 6530, 4, sizeof(ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_loBits), AArch64::ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_loRegClassID, 512, 1, true }, { ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2, ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits, 1181, 4, sizeof(ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits), AArch64::ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID, 512, 1, true }, { ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b, ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits, 3317, 4, sizeof(ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits), AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID, 512, 1, true }, { ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b, ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits, 3507, 4, sizeof(ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits), AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID, 512, 1, true }, { ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b, ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits, 3633, 4, sizeof(ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits), AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID, 512, 1, true }, { ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2, ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits, 1363, 4, sizeof(ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Bits), AArch64::ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID, 512, 1, true }, { ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits, 3476, 3, sizeof(ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits), AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID, 512, 1, true }, { ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b, ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits, 3602, 3, sizeof(ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bBits), AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID, 512, 1, true }, { ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2, ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits, 681, 3, sizeof(ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits), AArch64::ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, 512, 1, true }, { ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b, ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3bBits, 3754, 2, sizeof(ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3bBits), AArch64::ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3bRegClassID, 512, 1, true }, { ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2, ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits, 797, 2, sizeof(ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Bits), AArch64::ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID, 512, 1, true }, { GPR64x8Class, GPR64x8ClassBits, 9893, 12, sizeof(GPR64x8ClassBits), AArch64::GPR64x8ClassRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_0_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_GPR64noipBits, 7317, 11, sizeof(GPR64x8Class_with_x8sub_0_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_2_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noipBits, 7397, 11, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 7723, 11, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 8385, 11, sizeof(GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipBits, 7477, 10, sizeof(GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 7969, 10, sizeof(GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 8963, 10, sizeof(GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_0_in_tcGPR64, GPR64x8Class_with_x8sub_0_in_tcGPR64Bits, 2193, 10, sizeof(GPR64x8Class_with_x8sub_0_in_tcGPR64Bits), AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 8176, 10, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 9713, 10, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 9795, 10, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64, GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64Bits, 1681, 9, sizeof(GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64Bits), AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipBits, 7356, 9, sizeof(GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 7682, 9, sizeof(GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 8344, 9, sizeof(GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_1_in_tcGPR64, GPR64x8Class_with_x8sub_1_in_tcGPR64Bits, 2230, 9, sizeof(GPR64x8Class_with_x8sub_1_in_tcGPR64Bits), AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 8051, 9, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 9420, 9, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 9545, 9, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 9670, 9, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipBits, 7436, 8, sizeof(GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 7928, 8, sizeof(GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 8922, 8, sizeof(GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64, GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64Bits, 1732, 8, sizeof(GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64Bits), AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 7805, 8, sizeof(GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 8633, 8, sizeof(GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 7639, 8, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 8301, 8, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64Bits, 1783, 8, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64Bits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 8424, 8, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 9377, 8, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { ZPR4Strided, ZPR4StridedBits, 4937, 8, sizeof(ZPR4StridedBits), AArch64::ZPR4StridedRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 9254, 7, sizeof(GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 7885, 7, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 8879, 7, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits, 7762, 7, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 8590, 7, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64, GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64Bits, 1834, 7, sizeof(GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64Bits), AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 9045, 7, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 8713, 7, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 8258, 7, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64Bits, 1989, 7, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64Bits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 9211, 6, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 8836, 6, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip, GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits, 8547, 6, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64, GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64Bits, 2040, 6, sizeof(GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64Bits), AArch64::GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64, GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64Bits, 2091, 6, sizeof(GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64Bits), AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64, GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64Bits, 2142, 5, sizeof(GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64Bits), AArch64::GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64RegClassID, 512, 1, true }, { GPR64x8Class_with_sub_32_in_GPR32arg, GPR64x8Class_with_sub_32_in_GPR32argBits, 4949, 4, sizeof(GPR64x8Class_with_sub_32_in_GPR32argBits), AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClassID, 512, 1, true }, { MPR32, MPR32Bits, 633, 4, sizeof(MPR32Bits), AArch64::MPR32RegClassID, 512, 1, false }, { ZPR4Strided_with_dsub_in_FPR64_lo, ZPR4Strided_with_dsub_in_FPR64_loBits, 6631, 4, sizeof(ZPR4Strided_with_dsub_in_FPR64_loBits), AArch64::ZPR4Strided_with_dsub_in_FPR64_loRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_2_in_GPR64arg, GPR64x8Class_with_x8sub_2_in_GPR64argBits, 5064, 3, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64argBits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64argRegClassID, 512, 1, true }, { GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15, GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15Bits, 2627, 2, sizeof(GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15Bits), AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID, 512, 1, true }, { GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11, GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 467, 2, sizeof(GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15, GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Bits, 2554, 2, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Bits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11, GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 54, 2, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11, GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 281, 2, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_4_in_GPR64arg, GPR64x8Class_with_x8sub_4_in_GPR64argBits, 5102, 2, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64argBits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64argRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11, GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 395, 2, sizeof(GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 512, 1, true }, { GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11, GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 126, 1, sizeof(GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 512, 1, true }, { GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11, GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 0, 1, sizeof(GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_0_in_rtcGPR64, GPR64x8Class_with_x8sub_0_in_rtcGPR64Bits, 2343, 1, sizeof(GPR64x8Class_with_x8sub_0_in_rtcGPR64Bits), AArch64::GPR64x8Class_with_x8sub_0_in_rtcGPR64RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11, GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 239, 1, sizeof(GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_2_in_rtcGPR64, GPR64x8Class_with_x8sub_2_in_rtcGPR64Bits, 2381, 1, sizeof(GPR64x8Class_with_x8sub_2_in_rtcGPR64Bits), AArch64::GPR64x8Class_with_x8sub_2_in_rtcGPR64RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11, GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits, 353, 1, sizeof(GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Bits), AArch64::GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_4_in_rtcGPR64, GPR64x8Class_with_x8sub_4_in_rtcGPR64Bits, 2458, 1, sizeof(GPR64x8Class_with_x8sub_4_in_rtcGPR64Bits), AArch64::GPR64x8Class_with_x8sub_4_in_rtcGPR64RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_6_in_GPR64arg, GPR64x8Class_with_x8sub_6_in_GPR64argBits, 5140, 1, sizeof(GPR64x8Class_with_x8sub_6_in_GPR64argBits), AArch64::GPR64x8Class_with_x8sub_6_in_GPR64argRegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_6_in_rtcGPR64, GPR64x8Class_with_x8sub_6_in_rtcGPR64Bits, 2496, 1, sizeof(GPR64x8Class_with_x8sub_6_in_rtcGPR64Bits), AArch64::GPR64x8Class_with_x8sub_6_in_rtcGPR64RegClassID, 512, 1, true }, { GPR64x8Class_with_x8sub_7_in_FIXED_REGS, GPR64x8Class_with_x8sub_7_in_FIXED_REGSBits, 3058, 1, sizeof(GPR64x8Class_with_x8sub_7_in_FIXED_REGSBits), AArch64::GPR64x8Class_with_x8sub_7_in_FIXED_REGSRegClassID, 512, 1, true }, { ZTR, ZTRBits, 3013, 1, sizeof(ZTRBits), AArch64::ZTRRegClassID, 512, 1, true }, { MPR16, MPR16Bits, 2957, 2, sizeof(MPR16Bits), AArch64::MPR16RegClassID, 1024, 1, false }, { MPR, MPRBits, 3001, 1, sizeof(MPRBits), AArch64::MPRRegClassID, 2048, 1, false }, { MPR8, MPR8Bits, 2982, 1, sizeof(MPR8Bits), AArch64::MPR8RegClassID, 2048, 1, false }, }; // AArch64 Dwarf<->LLVM register mappings. extern const MCRegisterInfo::DwarfLLVMRegPair AArch64DwarfFlavour0Dwarf2L[] = { { 0U, AArch64::W0 }, { 1U, AArch64::W1 }, { 2U, AArch64::W2 }, { 3U, AArch64::W3 }, { 4U, AArch64::W4 }, { 5U, AArch64::W5 }, { 6U, AArch64::W6 }, { 7U, AArch64::W7 }, { 8U, AArch64::W8 }, { 9U, AArch64::W9 }, { 10U, AArch64::W10 }, { 11U, AArch64::W11 }, { 12U, AArch64::W12 }, { 13U, AArch64::W13 }, { 14U, AArch64::W14 }, { 15U, AArch64::W15 }, { 16U, AArch64::W16 }, { 17U, AArch64::W17 }, { 18U, AArch64::W18 }, { 19U, AArch64::W19 }, { 20U, AArch64::W20 }, { 21U, AArch64::W21 }, { 22U, AArch64::W22 }, { 23U, AArch64::W23 }, { 24U, AArch64::W24 }, { 25U, AArch64::W25 }, { 26U, AArch64::W26 }, { 27U, AArch64::W27 }, { 28U, AArch64::W28 }, { 29U, AArch64::W29 }, { 30U, AArch64::W30 }, { 31U, AArch64::WSP }, { 46U, AArch64::VG }, { 47U, AArch64::FFR }, { 48U, AArch64::P0 }, { 49U, AArch64::P1 }, { 50U, AArch64::P2 }, { 51U, AArch64::P3 }, { 52U, AArch64::P4 }, { 53U, AArch64::P5 }, { 54U, AArch64::P6 }, { 55U, AArch64::P7 }, { 56U, AArch64::P8 }, { 57U, AArch64::P9 }, { 58U, AArch64::P10 }, { 59U, AArch64::P11 }, { 60U, AArch64::P12 }, { 61U, AArch64::P13 }, { 62U, AArch64::P14 }, { 63U, AArch64::P15 }, { 64U, AArch64::B0 }, { 65U, AArch64::B1 }, { 66U, AArch64::B2 }, { 67U, AArch64::B3 }, { 68U, AArch64::B4 }, { 69U, AArch64::B5 }, { 70U, AArch64::B6 }, { 71U, AArch64::B7 }, { 72U, AArch64::B8 }, { 73U, AArch64::B9 }, { 74U, AArch64::B10 }, { 75U, AArch64::B11 }, { 76U, AArch64::B12 }, { 77U, AArch64::B13 }, { 78U, AArch64::B14 }, { 79U, AArch64::B15 }, { 80U, AArch64::B16 }, { 81U, AArch64::B17 }, { 82U, AArch64::B18 }, { 83U, AArch64::B19 }, { 84U, AArch64::B20 }, { 85U, AArch64::B21 }, { 86U, AArch64::B22 }, { 87U, AArch64::B23 }, { 88U, AArch64::B24 }, { 89U, AArch64::B25 }, { 90U, AArch64::B26 }, { 91U, AArch64::B27 }, { 92U, AArch64::B28 }, { 93U, AArch64::B29 }, { 94U, AArch64::B30 }, { 95U, AArch64::B31 }, { 96U, AArch64::Z0 }, { 97U, AArch64::Z1 }, { 98U, AArch64::Z2 }, { 99U, AArch64::Z3 }, { 100U, AArch64::Z4 }, { 101U, AArch64::Z5 }, { 102U, AArch64::Z6 }, { 103U, AArch64::Z7 }, { 104U, AArch64::Z8 }, { 105U, AArch64::Z9 }, { 106U, AArch64::Z10 }, { 107U, AArch64::Z11 }, { 108U, AArch64::Z12 }, { 109U, AArch64::Z13 }, { 110U, AArch64::Z14 }, { 111U, AArch64::Z15 }, { 112U, AArch64::Z16 }, { 113U, AArch64::Z17 }, { 114U, AArch64::Z18 }, { 115U, AArch64::Z19 }, { 116U, AArch64::Z20 }, { 117U, AArch64::Z21 }, { 118U, AArch64::Z22 }, { 119U, AArch64::Z23 }, { 120U, AArch64::Z24 }, { 121U, AArch64::Z25 }, { 122U, AArch64::Z26 }, { 123U, AArch64::Z27 }, { 124U, AArch64::Z28 }, { 125U, AArch64::Z29 }, { 126U, AArch64::Z30 }, { 127U, AArch64::Z31 }, }; extern const unsigned AArch64DwarfFlavour0Dwarf2LSize = std::size(AArch64DwarfFlavour0Dwarf2L); extern const MCRegisterInfo::DwarfLLVMRegPair AArch64EHFlavour0Dwarf2L[] = { { 0U, AArch64::W0 }, { 1U, AArch64::W1 }, { 2U, AArch64::W2 }, { 3U, AArch64::W3 }, { 4U, AArch64::W4 }, { 5U, AArch64::W5 }, { 6U, AArch64::W6 }, { 7U, AArch64::W7 }, { 8U, AArch64::W8 }, { 9U, AArch64::W9 }, { 10U, AArch64::W10 }, { 11U, AArch64::W11 }, { 12U, AArch64::W12 }, { 13U, AArch64::W13 }, { 14U, AArch64::W14 }, { 15U, AArch64::W15 }, { 16U, AArch64::W16 }, { 17U, AArch64::W17 }, { 18U, AArch64::W18 }, { 19U, AArch64::W19 }, { 20U, AArch64::W20 }, { 21U, AArch64::W21 }, { 22U, AArch64::W22 }, { 23U, AArch64::W23 }, { 24U, AArch64::W24 }, { 25U, AArch64::W25 }, { 26U, AArch64::W26 }, { 27U, AArch64::W27 }, { 28U, AArch64::W28 }, { 29U, AArch64::W29 }, { 30U, AArch64::W30 }, { 31U, AArch64::WSP }, { 46U, AArch64::VG }, { 47U, AArch64::FFR }, { 48U, AArch64::P0 }, { 49U, AArch64::P1 }, { 50U, AArch64::P2 }, { 51U, AArch64::P3 }, { 52U, AArch64::P4 }, { 53U, AArch64::P5 }, { 54U, AArch64::P6 }, { 55U, AArch64::P7 }, { 56U, AArch64::P8 }, { 57U, AArch64::P9 }, { 58U, AArch64::P10 }, { 59U, AArch64::P11 }, { 60U, AArch64::P12 }, { 61U, AArch64::P13 }, { 62U, AArch64::P14 }, { 63U, AArch64::P15 }, { 64U, AArch64::B0 }, { 65U, AArch64::B1 }, { 66U, AArch64::B2 }, { 67U, AArch64::B3 }, { 68U, AArch64::B4 }, { 69U, AArch64::B5 }, { 70U, AArch64::B6 }, { 71U, AArch64::B7 }, { 72U, AArch64::B8 }, { 73U, AArch64::B9 }, { 74U, AArch64::B10 }, { 75U, AArch64::B11 }, { 76U, AArch64::B12 }, { 77U, AArch64::B13 }, { 78U, AArch64::B14 }, { 79U, AArch64::B15 }, { 80U, AArch64::B16 }, { 81U, AArch64::B17 }, { 82U, AArch64::B18 }, { 83U, AArch64::B19 }, { 84U, AArch64::B20 }, { 85U, AArch64::B21 }, { 86U, AArch64::B22 }, { 87U, AArch64::B23 }, { 88U, AArch64::B24 }, { 89U, AArch64::B25 }, { 90U, AArch64::B26 }, { 91U, AArch64::B27 }, { 92U, AArch64::B28 }, { 93U, AArch64::B29 }, { 94U, AArch64::B30 }, { 95U, AArch64::B31 }, { 96U, AArch64::Z0 }, { 97U, AArch64::Z1 }, { 98U, AArch64::Z2 }, { 99U, AArch64::Z3 }, { 100U, AArch64::Z4 }, { 101U, AArch64::Z5 }, { 102U, AArch64::Z6 }, { 103U, AArch64::Z7 }, { 104U, AArch64::Z8 }, { 105U, AArch64::Z9 }, { 106U, AArch64::Z10 }, { 107U, AArch64::Z11 }, { 108U, AArch64::Z12 }, { 109U, AArch64::Z13 }, { 110U, AArch64::Z14 }, { 111U, AArch64::Z15 }, { 112U, AArch64::Z16 }, { 113U, AArch64::Z17 }, { 114U, AArch64::Z18 }, { 115U, AArch64::Z19 }, { 116U, AArch64::Z20 }, { 117U, AArch64::Z21 }, { 118U, AArch64::Z22 }, { 119U, AArch64::Z23 }, { 120U, AArch64::Z24 }, { 121U, AArch64::Z25 }, { 122U, AArch64::Z26 }, { 123U, AArch64::Z27 }, { 124U, AArch64::Z28 }, { 125U, AArch64::Z29 }, { 126U, AArch64::Z30 }, { 127U, AArch64::Z31 }, }; extern const unsigned AArch64EHFlavour0Dwarf2LSize = std::size(AArch64EHFlavour0Dwarf2L); extern const MCRegisterInfo::DwarfLLVMRegPair AArch64DwarfFlavour0L2Dwarf[] = { { AArch64::FFR, 47U }, { AArch64::FP, 29U }, { AArch64::LR, 30U }, { AArch64::SP, 31U }, { AArch64::VG, 46U }, { AArch64::WSP, 31U }, { AArch64::WZR, 31U }, { AArch64::XZR, 31U }, { AArch64::B0, 64U }, { AArch64::B1, 65U }, { AArch64::B2, 66U }, { AArch64::B3, 67U }, { AArch64::B4, 68U }, { AArch64::B5, 69U }, { AArch64::B6, 70U }, { AArch64::B7, 71U }, { AArch64::B8, 72U }, { AArch64::B9, 73U }, { AArch64::B10, 74U }, { AArch64::B11, 75U }, { AArch64::B12, 76U }, { AArch64::B13, 77U }, { AArch64::B14, 78U }, { AArch64::B15, 79U }, { AArch64::B16, 80U }, { AArch64::B17, 81U }, { AArch64::B18, 82U }, { AArch64::B19, 83U }, { AArch64::B20, 84U }, { AArch64::B21, 85U }, { AArch64::B22, 86U }, { AArch64::B23, 87U }, { AArch64::B24, 88U }, { AArch64::B25, 89U }, { AArch64::B26, 90U }, { AArch64::B27, 91U }, { AArch64::B28, 92U }, { AArch64::B29, 93U }, { AArch64::B30, 94U }, { AArch64::B31, 95U }, { AArch64::D0, 64U }, { AArch64::D1, 65U }, { AArch64::D2, 66U }, { AArch64::D3, 67U }, { AArch64::D4, 68U }, { AArch64::D5, 69U }, { AArch64::D6, 70U }, { AArch64::D7, 71U }, { AArch64::D8, 72U }, { AArch64::D9, 73U }, { AArch64::D10, 74U }, { AArch64::D11, 75U }, { AArch64::D12, 76U }, { AArch64::D13, 77U }, { AArch64::D14, 78U }, { AArch64::D15, 79U }, { AArch64::D16, 80U }, { AArch64::D17, 81U }, { AArch64::D18, 82U }, { AArch64::D19, 83U }, { AArch64::D20, 84U }, { AArch64::D21, 85U }, { AArch64::D22, 86U }, { AArch64::D23, 87U }, { AArch64::D24, 88U }, { AArch64::D25, 89U }, { AArch64::D26, 90U }, { AArch64::D27, 91U }, { AArch64::D28, 92U }, { AArch64::D29, 93U }, { AArch64::D30, 94U }, { AArch64::D31, 95U }, { AArch64::H0, 64U }, { AArch64::H1, 65U }, { AArch64::H2, 66U }, { AArch64::H3, 67U }, { AArch64::H4, 68U }, { AArch64::H5, 69U }, { AArch64::H6, 70U }, { AArch64::H7, 71U }, { AArch64::H8, 72U }, { AArch64::H9, 73U }, { AArch64::H10, 74U }, { AArch64::H11, 75U }, { AArch64::H12, 76U }, { AArch64::H13, 77U }, { AArch64::H14, 78U }, { AArch64::H15, 79U }, { AArch64::H16, 80U }, { AArch64::H17, 81U }, { AArch64::H18, 82U }, { AArch64::H19, 83U }, { AArch64::H20, 84U }, { AArch64::H21, 85U }, { AArch64::H22, 86U }, { AArch64::H23, 87U }, { AArch64::H24, 88U }, { AArch64::H25, 89U }, { AArch64::H26, 90U }, { AArch64::H27, 91U }, { AArch64::H28, 92U }, { AArch64::H29, 93U }, { AArch64::H30, 94U }, { AArch64::H31, 95U }, { AArch64::P0, 48U }, { AArch64::P1, 49U }, { AArch64::P2, 50U }, { AArch64::P3, 51U }, { AArch64::P4, 52U }, { AArch64::P5, 53U }, { AArch64::P6, 54U }, { AArch64::P7, 55U }, { AArch64::P8, 56U }, { AArch64::P9, 57U }, { AArch64::P10, 58U }, { AArch64::P11, 59U }, { AArch64::P12, 60U }, { AArch64::P13, 61U }, { AArch64::P14, 62U }, { AArch64::P15, 63U }, { AArch64::Q0, 64U }, { AArch64::Q1, 65U }, { AArch64::Q2, 66U }, { AArch64::Q3, 67U }, { AArch64::Q4, 68U }, { AArch64::Q5, 69U }, { AArch64::Q6, 70U }, { AArch64::Q7, 71U }, { AArch64::Q8, 72U }, { AArch64::Q9, 73U }, { AArch64::Q10, 74U }, { AArch64::Q11, 75U }, { AArch64::Q12, 76U }, { AArch64::Q13, 77U }, { AArch64::Q14, 78U }, { AArch64::Q15, 79U }, { AArch64::Q16, 80U }, { AArch64::Q17, 81U }, { AArch64::Q18, 82U }, { AArch64::Q19, 83U }, { AArch64::Q20, 84U }, { AArch64::Q21, 85U }, { AArch64::Q22, 86U }, { AArch64::Q23, 87U }, { AArch64::Q24, 88U }, { AArch64::Q25, 89U }, { AArch64::Q26, 90U }, { AArch64::Q27, 91U }, { AArch64::Q28, 92U }, { AArch64::Q29, 93U }, { AArch64::Q30, 94U }, { AArch64::Q31, 95U }, { AArch64::S0, 64U }, { AArch64::S1, 65U }, { AArch64::S2, 66U }, { AArch64::S3, 67U }, { AArch64::S4, 68U }, { AArch64::S5, 69U }, { AArch64::S6, 70U }, { AArch64::S7, 71U }, { AArch64::S8, 72U }, { AArch64::S9, 73U }, { AArch64::S10, 74U }, { AArch64::S11, 75U }, { AArch64::S12, 76U }, { AArch64::S13, 77U }, { AArch64::S14, 78U }, { AArch64::S15, 79U }, { AArch64::S16, 80U }, { AArch64::S17, 81U }, { AArch64::S18, 82U }, { AArch64::S19, 83U }, { AArch64::S20, 84U }, { AArch64::S21, 85U }, { AArch64::S22, 86U }, { AArch64::S23, 87U }, { AArch64::S24, 88U }, { AArch64::S25, 89U }, { AArch64::S26, 90U }, { AArch64::S27, 91U }, { AArch64::S28, 92U }, { AArch64::S29, 93U }, { AArch64::S30, 94U }, { AArch64::S31, 95U }, { AArch64::W0, 0U }, { AArch64::W1, 1U }, { AArch64::W2, 2U }, { AArch64::W3, 3U }, { AArch64::W4, 4U }, { AArch64::W5, 5U }, { AArch64::W6, 6U }, { AArch64::W7, 7U }, { AArch64::W8, 8U }, { AArch64::W9, 9U }, { AArch64::W10, 10U }, { AArch64::W11, 11U }, { AArch64::W12, 12U }, { AArch64::W13, 13U }, { AArch64::W14, 14U }, { AArch64::W15, 15U }, { AArch64::W16, 16U }, { AArch64::W17, 17U }, { AArch64::W18, 18U }, { AArch64::W19, 19U }, { AArch64::W20, 20U }, { AArch64::W21, 21U }, { AArch64::W22, 22U }, { AArch64::W23, 23U }, { AArch64::W24, 24U }, { AArch64::W25, 25U }, { AArch64::W26, 26U }, { AArch64::W27, 27U }, { AArch64::W28, 28U }, { AArch64::W29, 29U }, { AArch64::W30, 30U }, { AArch64::X0, 0U }, { AArch64::X1, 1U }, { AArch64::X2, 2U }, { AArch64::X3, 3U }, { AArch64::X4, 4U }, { AArch64::X5, 5U }, { AArch64::X6, 6U }, { AArch64::X7, 7U }, { AArch64::X8, 8U }, { AArch64::X9, 9U }, { AArch64::X10, 10U }, { AArch64::X11, 11U }, { AArch64::X12, 12U }, { AArch64::X13, 13U }, { AArch64::X14, 14U }, { AArch64::X15, 15U }, { AArch64::X16, 16U }, { AArch64::X17, 17U }, { AArch64::X18, 18U }, { AArch64::X19, 19U }, { AArch64::X20, 20U }, { AArch64::X21, 21U }, { AArch64::X22, 22U }, { AArch64::X23, 23U }, { AArch64::X24, 24U }, { AArch64::X25, 25U }, { AArch64::X26, 26U }, { AArch64::X27, 27U }, { AArch64::X28, 28U }, { AArch64::Z0, 96U }, { AArch64::Z1, 97U }, { AArch64::Z2, 98U }, { AArch64::Z3, 99U }, { AArch64::Z4, 100U }, { AArch64::Z5, 101U }, { AArch64::Z6, 102U }, { AArch64::Z7, 103U }, { AArch64::Z8, 104U }, { AArch64::Z9, 105U }, { AArch64::Z10, 106U }, { AArch64::Z11, 107U }, { AArch64::Z12, 108U }, { AArch64::Z13, 109U }, { AArch64::Z14, 110U }, { AArch64::Z15, 111U }, { AArch64::Z16, 112U }, { AArch64::Z17, 113U }, { AArch64::Z18, 114U }, { AArch64::Z19, 115U }, { AArch64::Z20, 116U }, { AArch64::Z21, 117U }, { AArch64::Z22, 118U }, { AArch64::Z23, 119U }, { AArch64::Z24, 120U }, { AArch64::Z25, 121U }, { AArch64::Z26, 122U }, { AArch64::Z27, 123U }, { AArch64::Z28, 124U }, { AArch64::Z29, 125U }, { AArch64::Z30, 126U }, { AArch64::Z31, 127U }, }; extern const unsigned AArch64DwarfFlavour0L2DwarfSize = std::size(AArch64DwarfFlavour0L2Dwarf); extern const MCRegisterInfo::DwarfLLVMRegPair AArch64EHFlavour0L2Dwarf[] = { { AArch64::FFR, 47U }, { AArch64::FP, 29U }, { AArch64::LR, 30U }, { AArch64::SP, 31U }, { AArch64::VG, 46U }, { AArch64::WSP, 31U }, { AArch64::WZR, 31U }, { AArch64::XZR, 31U }, { AArch64::B0, 64U }, { AArch64::B1, 65U }, { AArch64::B2, 66U }, { AArch64::B3, 67U }, { AArch64::B4, 68U }, { AArch64::B5, 69U }, { AArch64::B6, 70U }, { AArch64::B7, 71U }, { AArch64::B8, 72U }, { AArch64::B9, 73U }, { AArch64::B10, 74U }, { AArch64::B11, 75U }, { AArch64::B12, 76U }, { AArch64::B13, 77U }, { AArch64::B14, 78U }, { AArch64::B15, 79U }, { AArch64::B16, 80U }, { AArch64::B17, 81U }, { AArch64::B18, 82U }, { AArch64::B19, 83U }, { AArch64::B20, 84U }, { AArch64::B21, 85U }, { AArch64::B22, 86U }, { AArch64::B23, 87U }, { AArch64::B24, 88U }, { AArch64::B25, 89U }, { AArch64::B26, 90U }, { AArch64::B27, 91U }, { AArch64::B28, 92U }, { AArch64::B29, 93U }, { AArch64::B30, 94U }, { AArch64::B31, 95U }, { AArch64::D0, 64U }, { AArch64::D1, 65U }, { AArch64::D2, 66U }, { AArch64::D3, 67U }, { AArch64::D4, 68U }, { AArch64::D5, 69U }, { AArch64::D6, 70U }, { AArch64::D7, 71U }, { AArch64::D8, 72U }, { AArch64::D9, 73U }, { AArch64::D10, 74U }, { AArch64::D11, 75U }, { AArch64::D12, 76U }, { AArch64::D13, 77U }, { AArch64::D14, 78U }, { AArch64::D15, 79U }, { AArch64::D16, 80U }, { AArch64::D17, 81U }, { AArch64::D18, 82U }, { AArch64::D19, 83U }, { AArch64::D20, 84U }, { AArch64::D21, 85U }, { AArch64::D22, 86U }, { AArch64::D23, 87U }, { AArch64::D24, 88U }, { AArch64::D25, 89U }, { AArch64::D26, 90U }, { AArch64::D27, 91U }, { AArch64::D28, 92U }, { AArch64::D29, 93U }, { AArch64::D30, 94U }, { AArch64::D31, 95U }, { AArch64::H0, 64U }, { AArch64::H1, 65U }, { AArch64::H2, 66U }, { AArch64::H3, 67U }, { AArch64::H4, 68U }, { AArch64::H5, 69U }, { AArch64::H6, 70U }, { AArch64::H7, 71U }, { AArch64::H8, 72U }, { AArch64::H9, 73U }, { AArch64::H10, 74U }, { AArch64::H11, 75U }, { AArch64::H12, 76U }, { AArch64::H13, 77U }, { AArch64::H14, 78U }, { AArch64::H15, 79U }, { AArch64::H16, 80U }, { AArch64::H17, 81U }, { AArch64::H18, 82U }, { AArch64::H19, 83U }, { AArch64::H20, 84U }, { AArch64::H21, 85U }, { AArch64::H22, 86U }, { AArch64::H23, 87U }, { AArch64::H24, 88U }, { AArch64::H25, 89U }, { AArch64::H26, 90U }, { AArch64::H27, 91U }, { AArch64::H28, 92U }, { AArch64::H29, 93U }, { AArch64::H30, 94U }, { AArch64::H31, 95U }, { AArch64::P0, 48U }, { AArch64::P1, 49U }, { AArch64::P2, 50U }, { AArch64::P3, 51U }, { AArch64::P4, 52U }, { AArch64::P5, 53U }, { AArch64::P6, 54U }, { AArch64::P7, 55U }, { AArch64::P8, 56U }, { AArch64::P9, 57U }, { AArch64::P10, 58U }, { AArch64::P11, 59U }, { AArch64::P12, 60U }, { AArch64::P13, 61U }, { AArch64::P14, 62U }, { AArch64::P15, 63U }, { AArch64::Q0, 64U }, { AArch64::Q1, 65U }, { AArch64::Q2, 66U }, { AArch64::Q3, 67U }, { AArch64::Q4, 68U }, { AArch64::Q5, 69U }, { AArch64::Q6, 70U }, { AArch64::Q7, 71U }, { AArch64::Q8, 72U }, { AArch64::Q9, 73U }, { AArch64::Q10, 74U }, { AArch64::Q11, 75U }, { AArch64::Q12, 76U }, { AArch64::Q13, 77U }, { AArch64::Q14, 78U }, { AArch64::Q15, 79U }, { AArch64::Q16, 80U }, { AArch64::Q17, 81U }, { AArch64::Q18, 82U }, { AArch64::Q19, 83U }, { AArch64::Q20, 84U }, { AArch64::Q21, 85U }, { AArch64::Q22, 86U }, { AArch64::Q23, 87U }, { AArch64::Q24, 88U }, { AArch64::Q25, 89U }, { AArch64::Q26, 90U }, { AArch64::Q27, 91U }, { AArch64::Q28, 92U }, { AArch64::Q29, 93U }, { AArch64::Q30, 94U }, { AArch64::Q31, 95U }, { AArch64::S0, 64U }, { AArch64::S1, 65U }, { AArch64::S2, 66U }, { AArch64::S3, 67U }, { AArch64::S4, 68U }, { AArch64::S5, 69U }, { AArch64::S6, 70U }, { AArch64::S7, 71U }, { AArch64::S8, 72U }, { AArch64::S9, 73U }, { AArch64::S10, 74U }, { AArch64::S11, 75U }, { AArch64::S12, 76U }, { AArch64::S13, 77U }, { AArch64::S14, 78U }, { AArch64::S15, 79U }, { AArch64::S16, 80U }, { AArch64::S17, 81U }, { AArch64::S18, 82U }, { AArch64::S19, 83U }, { AArch64::S20, 84U }, { AArch64::S21, 85U }, { AArch64::S22, 86U }, { AArch64::S23, 87U }, { AArch64::S24, 88U }, { AArch64::S25, 89U }, { AArch64::S26, 90U }, { AArch64::S27, 91U }, { AArch64::S28, 92U }, { AArch64::S29, 93U }, { AArch64::S30, 94U }, { AArch64::S31, 95U }, { AArch64::W0, 0U }, { AArch64::W1, 1U }, { AArch64::W2, 2U }, { AArch64::W3, 3U }, { AArch64::W4, 4U }, { AArch64::W5, 5U }, { AArch64::W6, 6U }, { AArch64::W7, 7U }, { AArch64::W8, 8U }, { AArch64::W9, 9U }, { AArch64::W10, 10U }, { AArch64::W11, 11U }, { AArch64::W12, 12U }, { AArch64::W13, 13U }, { AArch64::W14, 14U }, { AArch64::W15, 15U }, { AArch64::W16, 16U }, { AArch64::W17, 17U }, { AArch64::W18, 18U }, { AArch64::W19, 19U }, { AArch64::W20, 20U }, { AArch64::W21, 21U }, { AArch64::W22, 22U }, { AArch64::W23, 23U }, { AArch64::W24, 24U }, { AArch64::W25, 25U }, { AArch64::W26, 26U }, { AArch64::W27, 27U }, { AArch64::W28, 28U }, { AArch64::W29, 29U }, { AArch64::W30, 30U }, { AArch64::X0, 0U }, { AArch64::X1, 1U }, { AArch64::X2, 2U }, { AArch64::X3, 3U }, { AArch64::X4, 4U }, { AArch64::X5, 5U }, { AArch64::X6, 6U }, { AArch64::X7, 7U }, { AArch64::X8, 8U }, { AArch64::X9, 9U }, { AArch64::X10, 10U }, { AArch64::X11, 11U }, { AArch64::X12, 12U }, { AArch64::X13, 13U }, { AArch64::X14, 14U }, { AArch64::X15, 15U }, { AArch64::X16, 16U }, { AArch64::X17, 17U }, { AArch64::X18, 18U }, { AArch64::X19, 19U }, { AArch64::X20, 20U }, { AArch64::X21, 21U }, { AArch64::X22, 22U }, { AArch64::X23, 23U }, { AArch64::X24, 24U }, { AArch64::X25, 25U }, { AArch64::X26, 26U }, { AArch64::X27, 27U }, { AArch64::X28, 28U }, { AArch64::Z0, 96U }, { AArch64::Z1, 97U }, { AArch64::Z2, 98U }, { AArch64::Z3, 99U }, { AArch64::Z4, 100U }, { AArch64::Z5, 101U }, { AArch64::Z6, 102U }, { AArch64::Z7, 103U }, { AArch64::Z8, 104U }, { AArch64::Z9, 105U }, { AArch64::Z10, 106U }, { AArch64::Z11, 107U }, { AArch64::Z12, 108U }, { AArch64::Z13, 109U }, { AArch64::Z14, 110U }, { AArch64::Z15, 111U }, { AArch64::Z16, 112U }, { AArch64::Z17, 113U }, { AArch64::Z18, 114U }, { AArch64::Z19, 115U }, { AArch64::Z20, 116U }, { AArch64::Z21, 117U }, { AArch64::Z22, 118U }, { AArch64::Z23, 119U }, { AArch64::Z24, 120U }, { AArch64::Z25, 121U }, { AArch64::Z26, 122U }, { AArch64::Z27, 123U }, { AArch64::Z28, 124U }, { AArch64::Z29, 125U }, { AArch64::Z30, 126U }, { AArch64::Z31, 127U }, }; extern const unsigned AArch64EHFlavour0L2DwarfSize = std::size(AArch64EHFlavour0L2Dwarf); extern const uint16_t AArch64RegEncodingTable[] = { 0, 0, 29, 0, 30, 0, 31, 0, 31, 31, 31, 0, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 0, 0, 1, 2, 3, 4, 5, 6, 7, 0, 1, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 0, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 22, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 30, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 28, 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 16, 17, 18, 19, 20, 21, 22, 23, 0, 1, 2, 3, 4, 5, 6, 7, 16, 17, 18, 19, 0, 1, 2, 3, }; static inline void InitAArch64MCRegisterInfo(MCRegisterInfo *RI, unsigned RA, unsigned DwarfFlavour = 0, unsigned EHFlavour = 0, unsigned PC = 0) { RI->InitMCRegisterInfo(AArch64RegDesc, 716, RA, PC, AArch64MCRegisterClasses, 273, AArch64RegUnitRoots, 134, AArch64RegDiffLists, AArch64LaneMaskLists, AArch64RegStrings, AArch64RegClassStrings, AArch64SubRegIdxLists, 156, AArch64SubRegIdxRanges, AArch64RegEncodingTable); switch (DwarfFlavour) { default: llvm_unreachable("Unknown DWARF flavour"); case 0: RI->mapDwarfRegsToLLVMRegs(AArch64DwarfFlavour0Dwarf2L, AArch64DwarfFlavour0Dwarf2LSize, false); break; } switch (EHFlavour) { default: llvm_unreachable("Unknown DWARF flavour"); case 0: RI->mapDwarfRegsToLLVMRegs(AArch64EHFlavour0Dwarf2L, AArch64EHFlavour0Dwarf2LSize, true); break; } switch (DwarfFlavour) { default: llvm_unreachable("Unknown DWARF flavour"); case 0: RI->mapLLVMRegsToDwarfRegs(AArch64DwarfFlavour0L2Dwarf, AArch64DwarfFlavour0L2DwarfSize, false); break; } switch (EHFlavour) { default: llvm_unreachable("Unknown DWARF flavour"); case 0: RI->mapLLVMRegsToDwarfRegs(AArch64EHFlavour0L2Dwarf, AArch64EHFlavour0L2DwarfSize, true); break; } } } // end namespace llvm #endif // GET_REGINFO_MC_DESC /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* Register Information Header Fragment *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_REGINFO_HEADER #undef GET_REGINFO_HEADER #include "llvm/CodeGen/TargetRegisterInfo.h" namespace llvm { class AArch64FrameLowering; struct AArch64GenRegisterInfo : public TargetRegisterInfo { explicit AArch64GenRegisterInfo(unsigned RA, unsigned D = 0, unsigned E = 0, unsigned PC = 0, unsigned HwMode = 0); unsigned composeSubRegIndicesImpl(unsigned, unsigned) const override; LaneBitmask composeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override; LaneBitmask reverseComposeSubRegIndexLaneMaskImpl(unsigned, LaneBitmask) const override; const TargetRegisterClass *getSubClassWithSubReg(const TargetRegisterClass *, unsigned) const override; const TargetRegisterClass *getSubRegisterClass(const TargetRegisterClass *, unsigned) const override; const RegClassWeight &getRegClassWeight(const TargetRegisterClass *RC) const override; unsigned getRegUnitWeight(unsigned RegUnit) const override; unsigned getNumRegPressureSets() const override; const char *getRegPressureSetName(unsigned Idx) const override; unsigned getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const override; const int *getRegClassPressureSets(const TargetRegisterClass *RC) const override; const int *getRegUnitPressureSets(unsigned RegUnit) const override; ArrayRef getRegMaskNames() const override; ArrayRef getRegMasks() const override; bool isGeneralPurposeRegister(const MachineFunction &, MCRegister) const override; bool isFixedRegister(const MachineFunction &, MCRegister) const override; bool isArgumentRegister(const MachineFunction &, MCRegister) const override; bool isConstantPhysReg(MCRegister PhysReg) const override final; /// Devirtualized TargetFrameLowering. static const AArch64FrameLowering *getFrameLowering( const MachineFunction &MF); }; namespace AArch64 { // Register classes extern const TargetRegisterClass FPR8RegClass; extern const TargetRegisterClass FPR16RegClass; extern const TargetRegisterClass FPR16_loRegClass; extern const TargetRegisterClass PPRRegClass; extern const TargetRegisterClass PPR_3bRegClass; extern const TargetRegisterClass PPR_p8to15RegClass; extern const TargetRegisterClass PPR2RegClass; extern const TargetRegisterClass PPR2Mul2RegClass; extern const TargetRegisterClass PPR2_with_psub0_in_PPR_3bRegClass; extern const TargetRegisterClass PPR2_with_psub0_in_PPR_p8to15RegClass; extern const TargetRegisterClass PPR2_with_psub1_in_PPR_3bRegClass; extern const TargetRegisterClass PPR2_with_psub1_in_PPR_p8to15RegClass; extern const TargetRegisterClass PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3bRegClass; extern const TargetRegisterClass PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15RegClass; extern const TargetRegisterClass PPR2Mul2_and_PPR2_with_psub0_in_PPR_3bRegClass; extern const TargetRegisterClass PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15RegClass; extern const TargetRegisterClass PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15RegClass; extern const TargetRegisterClass PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3bRegClass; extern const TargetRegisterClass GPR32allRegClass; extern const TargetRegisterClass FPR32RegClass; extern const TargetRegisterClass GPR32RegClass; extern const TargetRegisterClass GPR32spRegClass; extern const TargetRegisterClass GPR32commonRegClass; extern const TargetRegisterClass FPR32_with_hsub_in_FPR16_loRegClass; extern const TargetRegisterClass GPR32argRegClass; extern const TargetRegisterClass MatrixIndexGPR32_12_15RegClass; extern const TargetRegisterClass MatrixIndexGPR32_8_11RegClass; extern const TargetRegisterClass CCRRegClass; extern const TargetRegisterClass GPR32sponlyRegClass; extern const TargetRegisterClass WSeqPairsClassRegClass; extern const TargetRegisterClass WSeqPairsClass_with_subo32_in_GPR32commonRegClass; extern const TargetRegisterClass WSeqPairsClass_with_sube32_in_GPR32argRegClass; extern const TargetRegisterClass WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15RegClass; extern const TargetRegisterClass WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11RegClass; extern const TargetRegisterClass GPR64allRegClass; extern const TargetRegisterClass FPR64RegClass; extern const TargetRegisterClass GPR64RegClass; extern const TargetRegisterClass GPR64spRegClass; extern const TargetRegisterClass GPR64commonRegClass; extern const TargetRegisterClass GPR64noipRegClass; extern const TargetRegisterClass GPR64common_and_GPR64noipRegClass; extern const TargetRegisterClass tcGPR64RegClass; extern const TargetRegisterClass GPR64noip_and_tcGPR64RegClass; extern const TargetRegisterClass FPR64_loRegClass; extern const TargetRegisterClass GPR64argRegClass; extern const TargetRegisterClass FIXED_REGSRegClass; extern const TargetRegisterClass GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass; extern const TargetRegisterClass GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; extern const TargetRegisterClass FIXED_REGS_with_sub_32RegClass; extern const TargetRegisterClass rtcGPR64RegClass; extern const TargetRegisterClass FIXED_REGS_and_GPR64RegClass; extern const TargetRegisterClass GPR64sponlyRegClass; extern const TargetRegisterClass DDRegClass; extern const TargetRegisterClass DD_with_dsub0_in_FPR64_loRegClass; extern const TargetRegisterClass DD_with_dsub1_in_FPR64_loRegClass; extern const TargetRegisterClass XSeqPairsClassRegClass; extern const TargetRegisterClass DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loRegClass; extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_GPR64commonRegClass; extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_GPR64noipRegClass; extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_GPR64noipRegClass; extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_tcGPR64RegClass; extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64RegClass; extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_tcGPR64RegClass; extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64RegClass; extern const TargetRegisterClass XSeqPairsClass_with_sub_32_in_GPR32argRegClass; extern const TargetRegisterClass XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15RegClass; extern const TargetRegisterClass XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_rtcGPR64RegClass; extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_FIXED_REGSRegClass; extern const TargetRegisterClass FPR128RegClass; extern const TargetRegisterClass ZPRRegClass; extern const TargetRegisterClass FPR128_loRegClass; extern const TargetRegisterClass MPR128RegClass; extern const TargetRegisterClass ZPR_4bRegClass; extern const TargetRegisterClass ZPR_3bRegClass; extern const TargetRegisterClass DDDRegClass; extern const TargetRegisterClass DDD_with_dsub0_in_FPR64_loRegClass; extern const TargetRegisterClass DDD_with_dsub1_in_FPR64_loRegClass; extern const TargetRegisterClass DDD_with_dsub2_in_FPR64_loRegClass; extern const TargetRegisterClass DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loRegClass; extern const TargetRegisterClass DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClass; extern const TargetRegisterClass DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClass; extern const TargetRegisterClass DDDDRegClass; extern const TargetRegisterClass DDDD_with_dsub0_in_FPR64_loRegClass; extern const TargetRegisterClass DDDD_with_dsub1_in_FPR64_loRegClass; extern const TargetRegisterClass DDDD_with_dsub2_in_FPR64_loRegClass; extern const TargetRegisterClass DDDD_with_dsub3_in_FPR64_loRegClass; extern const TargetRegisterClass DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loRegClass; extern const TargetRegisterClass DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClass; extern const TargetRegisterClass DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass; extern const TargetRegisterClass DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClass; extern const TargetRegisterClass DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass; extern const TargetRegisterClass DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass; extern const TargetRegisterClass QQRegClass; extern const TargetRegisterClass ZPR2RegClass; extern const TargetRegisterClass QQ_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass QQ_with_qsub1_in_FPR128_loRegClass; extern const TargetRegisterClass ZPR2Mul2RegClass; extern const TargetRegisterClass ZPR2_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPR_4bRegClass; extern const TargetRegisterClass QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_loRegClass; extern const TargetRegisterClass ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4bRegClass; extern const TargetRegisterClass ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR2StridedRegClass; extern const TargetRegisterClass MPR64RegClass; extern const TargetRegisterClass ZPR2Strided_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass QQQRegClass; extern const TargetRegisterClass ZPR3RegClass; extern const TargetRegisterClass QQQ_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass QQQ_with_qsub1_in_FPR128_loRegClass; extern const TargetRegisterClass QQQ_with_qsub2_in_FPR128_loRegClass; extern const TargetRegisterClass ZPR3_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass; extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPR_4bRegClass; extern const TargetRegisterClass ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass; extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPR_4bRegClass; extern const TargetRegisterClass QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_loRegClass; extern const TargetRegisterClass QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loRegClass; extern const TargetRegisterClass ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bRegClass; extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClass; extern const TargetRegisterClass QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_loRegClass; extern const TargetRegisterClass ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bRegClass; extern const TargetRegisterClass ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass; extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass; extern const TargetRegisterClass ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass; extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass; extern const TargetRegisterClass ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass QQQQRegClass; extern const TargetRegisterClass ZPR4RegClass; extern const TargetRegisterClass QQQQ_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass QQQQ_with_qsub1_in_FPR128_loRegClass; extern const TargetRegisterClass QQQQ_with_qsub2_in_FPR128_loRegClass; extern const TargetRegisterClass QQQQ_with_qsub3_in_FPR128_loRegClass; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClass; extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass; extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_4bRegClass; extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPR_4bRegClass; extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPR_4bRegClass; extern const TargetRegisterClass QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_loRegClass; extern const TargetRegisterClass QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClass; extern const TargetRegisterClass QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClass; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass; extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass; extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass; extern const TargetRegisterClass QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClass; extern const TargetRegisterClass QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClass; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClass; extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass; extern const TargetRegisterClass QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClass; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bRegClass; extern const TargetRegisterClass ZPR4Mul4RegClass; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass; extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass; extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass; extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass; extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass; extern const TargetRegisterClass ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3bRegClass; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass; extern const TargetRegisterClass GPR64x8ClassRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass ZPR4StridedRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64RegClass; extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_GPR32argRegClass; extern const TargetRegisterClass MPR32RegClass; extern const TargetRegisterClass ZPR4Strided_with_dsub_in_FPR64_loRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64argRegClass; extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15RegClass; extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64argRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_rtcGPR64RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_rtcGPR64RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_rtcGPR64RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_GPR64argRegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_rtcGPR64RegClass; extern const TargetRegisterClass GPR64x8Class_with_x8sub_7_in_FIXED_REGSRegClass; extern const TargetRegisterClass ZTRRegClass; extern const TargetRegisterClass MPR16RegClass; extern const TargetRegisterClass MPRRegClass; extern const TargetRegisterClass MPR8RegClass; } // end namespace AArch64 } // end namespace llvm #endif // GET_REGINFO_HEADER /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* Target Register and Register Classes Information *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_REGINFO_TARGET_DESC #undef GET_REGINFO_TARGET_DESC namespace llvm { extern const MCRegisterClass AArch64MCRegisterClasses[]; static const MVT::SimpleValueType VTLists[] = { /* 0 */ MVT::f32, MVT::i32, MVT::Other, /* 3 */ MVT::i64, MVT::Other, /* 5 */ MVT::f16, MVT::bf16, MVT::Other, /* 8 */ MVT::f16, MVT::Other, /* 10 */ MVT::f64, MVT::i64, MVT::v2f32, MVT::v1f64, MVT::v8i8, MVT::v4i16, MVT::v2i32, MVT::v1i64, MVT::v4f16, MVT::v4bf16, MVT::Other, /* 21 */ MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v4f32, MVT::v2f64, MVT::f128, MVT::v8f16, MVT::v8bf16, MVT::Other, /* 31 */ MVT::v16i8, MVT::v8i16, MVT::v4i32, MVT::v2i64, MVT::v4f32, MVT::v2f64, MVT::v8f16, MVT::v8bf16, MVT::Other, /* 40 */ MVT::v8i8, MVT::v4i16, MVT::v2i32, MVT::v1i64, MVT::v4f16, MVT::v4bf16, MVT::v2f32, MVT::v1f64, MVT::Other, /* 49 */ MVT::nxv16i1, MVT::nxv8i1, MVT::nxv4i1, MVT::nxv2i1, MVT::nxv1i1, MVT::Other, /* 55 */ MVT::nxv16i8, MVT::nxv8i16, MVT::nxv4i32, MVT::nxv2i64, MVT::nxv2f16, MVT::nxv4f16, MVT::nxv8f16, MVT::nxv2bf16, MVT::nxv4bf16, MVT::nxv8bf16, MVT::nxv2f32, MVT::nxv4f32, MVT::nxv2f64, MVT::Other, /* 69 */ MVT::Untyped, MVT::Other, /* 71 */ MVT::i64x8, MVT::Other, }; static const char *SubRegIndexNameTable[] = { "bsub", "dsub", "dsub0", "dsub1", "dsub2", "dsub3", "hsub", "psub0", "psub1", "qsub0", "qsub1", "qsub2", "qsub3", "ssub", "sub_32", "sube32", "sube64", "subo32", "subo64", "x8sub_0", "x8sub_1", "x8sub_2", "x8sub_3", "x8sub_4", "x8sub_5", "x8sub_6", "x8sub_7", "zasubb", "zasubd0", "zasubd1", "zasubh0", "zasubh1", "zasubq0", "zasubq1", "zasubs0", "zasubs1", "zsub", "zsub0", "zsub1", "zsub2", "zsub3", "zsub_hi", "zasubd1_then_zasubq0", "zasubd1_then_zasubq1", "zasubs1_then_zasubd0", "zasubs1_then_zasubd1", "zasubs1_then_zasubq0", "zasubs1_then_zasubq1", "zasubs1_then_zasubd1_then_zasubq0", "zasubs1_then_zasubd1_then_zasubq1", "zasubh1_then_zasubd0", "zasubh1_then_zasubd1", "zasubh1_then_zasubq0", "zasubh1_then_zasubq1", "zasubh1_then_zasubs0", "zasubh1_then_zasubs1", "zasubh1_then_zasubd1_then_zasubq0", "zasubh1_then_zasubd1_then_zasubq1", "zasubh1_then_zasubs1_then_zasubd0", "zasubh1_then_zasubs1_then_zasubd1", "zasubh1_then_zasubs1_then_zasubq0", "zasubh1_then_zasubs1_then_zasubq1", "zasubh1_then_zasubs1_then_zasubd1_then_zasubq0", "zasubh1_then_zasubs1_then_zasubd1_then_zasubq1", "dsub1_then_bsub", "dsub1_then_hsub", "dsub1_then_ssub", "dsub3_then_bsub", "dsub3_then_hsub", "dsub3_then_ssub", "dsub2_then_bsub", "dsub2_then_hsub", "dsub2_then_ssub", "qsub1_then_bsub", "qsub1_then_dsub", "qsub1_then_hsub", "qsub1_then_ssub", "qsub3_then_bsub", "qsub3_then_dsub", "qsub3_then_hsub", "qsub3_then_ssub", "qsub2_then_bsub", "qsub2_then_dsub", "qsub2_then_hsub", "qsub2_then_ssub", "x8sub_7_then_sub_32", "x8sub_6_then_sub_32", "x8sub_5_then_sub_32", "x8sub_4_then_sub_32", "x8sub_3_then_sub_32", "x8sub_2_then_sub_32", "x8sub_1_then_sub_32", "subo64_then_sub_32", "zsub1_then_bsub", "zsub1_then_dsub", "zsub1_then_hsub", "zsub1_then_ssub", "zsub1_then_zsub", "zsub1_then_zsub_hi", "zsub3_then_bsub", "zsub3_then_dsub", "zsub3_then_hsub", "zsub3_then_ssub", "zsub3_then_zsub", "zsub3_then_zsub_hi", "zsub2_then_bsub", "zsub2_then_dsub", "zsub2_then_hsub", "zsub2_then_ssub", "zsub2_then_zsub", "zsub2_then_zsub_hi", "dsub0_dsub1", "dsub0_dsub1_dsub2", "dsub1_dsub2", "dsub1_dsub2_dsub3", "dsub2_dsub3", "dsub_qsub1_then_dsub", "dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub", "dsub_qsub1_then_dsub_qsub2_then_dsub", "qsub0_qsub1", "qsub0_qsub1_qsub2", "qsub1_qsub2", "qsub1_qsub2_qsub3", "qsub2_qsub3", "qsub1_then_dsub_qsub2_then_dsub", "qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub", "qsub2_then_dsub_qsub3_then_dsub", "sub_32_x8sub_1_then_sub_32", "x8sub_0_x8sub_1", "x8sub_2_x8sub_3", "x8sub_4_x8sub_5", "x8sub_6_x8sub_7", "x8sub_6_then_sub_32_x8sub_7_then_sub_32", "x8sub_4_then_sub_32_x8sub_5_then_sub_32", "x8sub_2_then_sub_32_x8sub_3_then_sub_32", "sub_32_subo64_then_sub_32", "dsub_zsub1_then_dsub", "zsub_zsub1_then_zsub", "dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub", "dsub_zsub1_then_dsub_zsub2_then_dsub", "zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub", "zsub_zsub1_then_zsub_zsub2_then_zsub", "zsub0_zsub1", "zsub0_zsub1_zsub2", "zsub1_zsub2", "zsub1_zsub2_zsub3", "zsub2_zsub3", "zsub1_then_dsub_zsub2_then_dsub", "zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub", "zsub1_then_zsub_zsub2_then_zsub", "zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub", "zsub2_then_dsub_zsub3_then_dsub", "zsub2_then_zsub_zsub3_then_zsub", "zsub0_zsub2", "zsub1_zsub3", "" }; static const LaneBitmask SubRegIndexLaneMaskTable[] = { LaneBitmask::getAll(), LaneBitmask(0x0000000000000001), // bsub LaneBitmask(0x0000000000000001), // dsub LaneBitmask(0x0000000000000001), // dsub0 LaneBitmask(0x0000000000800000), // dsub1 LaneBitmask(0x0000000002000000), // dsub2 LaneBitmask(0x0000000001000000), // dsub3 LaneBitmask(0x0000000000000001), // hsub LaneBitmask(0x0000000000000002), // psub0 LaneBitmask(0x0000000000000004), // psub1 LaneBitmask(0x0000000000000001), // qsub0 LaneBitmask(0x0000000004000000), // qsub1 LaneBitmask(0x0000000010000000), // qsub2 LaneBitmask(0x0000000008000000), // qsub3 LaneBitmask(0x0000000000000001), // ssub LaneBitmask(0x0000000000000008), // sub_32 LaneBitmask(0x0000000000000010), // sube32 LaneBitmask(0x0000000000000008), // sube64 LaneBitmask(0x0000000000000020), // subo32 LaneBitmask(0x0000001000000000), // subo64 LaneBitmask(0x0000000000000008), // x8sub_0 LaneBitmask(0x0000000800000000), // x8sub_1 LaneBitmask(0x0000000400000000), // x8sub_2 LaneBitmask(0x0000000200000000), // x8sub_3 LaneBitmask(0x0000000100000000), // x8sub_4 LaneBitmask(0x0000000080000000), // x8sub_5 LaneBitmask(0x0000000040000000), // x8sub_6 LaneBitmask(0x0000000020000000), // x8sub_7 LaneBitmask(0x00000000007FFEC0), // zasubb LaneBitmask(0x00000000000000C0), // zasubd0 LaneBitmask(0x0000000000000600), // zasubd1 LaneBitmask(0x0000000000007EC0), // zasubh0 LaneBitmask(0x00000000007F8000), // zasubh1 LaneBitmask(0x0000000000000040), // zasubq0 LaneBitmask(0x0000000000000080), // zasubq1 LaneBitmask(0x00000000000006C0), // zasubs0 LaneBitmask(0x0000000000007800), // zasubs1 LaneBitmask(0x0000000000000001), // zsub LaneBitmask(0x0000000000000101), // zsub0 LaneBitmask(0x0000006000000000), // zsub1 LaneBitmask(0x0000060000000000), // zsub2 LaneBitmask(0x0000018000000000), // zsub3 LaneBitmask(0x0000000000000100), // zsub_hi LaneBitmask(0x0000000000000200), // zasubd1_then_zasubq0 LaneBitmask(0x0000000000000400), // zasubd1_then_zasubq1 LaneBitmask(0x0000000000001800), // zasubs1_then_zasubd0 LaneBitmask(0x0000000000006000), // zasubs1_then_zasubd1 LaneBitmask(0x0000000000000800), // zasubs1_then_zasubq0 LaneBitmask(0x0000000000001000), // zasubs1_then_zasubq1 LaneBitmask(0x0000000000002000), // zasubs1_then_zasubd1_then_zasubq0 LaneBitmask(0x0000000000004000), // zasubs1_then_zasubd1_then_zasubq1 LaneBitmask(0x0000000000018000), // zasubh1_then_zasubd0 LaneBitmask(0x0000000000060000), // zasubh1_then_zasubd1 LaneBitmask(0x0000000000008000), // zasubh1_then_zasubq0 LaneBitmask(0x0000000000010000), // zasubh1_then_zasubq1 LaneBitmask(0x0000000000078000), // zasubh1_then_zasubs0 LaneBitmask(0x0000000000780000), // zasubh1_then_zasubs1 LaneBitmask(0x0000000000020000), // zasubh1_then_zasubd1_then_zasubq0 LaneBitmask(0x0000000000040000), // zasubh1_then_zasubd1_then_zasubq1 LaneBitmask(0x0000000000180000), // zasubh1_then_zasubs1_then_zasubd0 LaneBitmask(0x0000000000600000), // zasubh1_then_zasubs1_then_zasubd1 LaneBitmask(0x0000000000080000), // zasubh1_then_zasubs1_then_zasubq0 LaneBitmask(0x0000000000100000), // zasubh1_then_zasubs1_then_zasubq1 LaneBitmask(0x0000000000200000), // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 LaneBitmask(0x0000000000400000), // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 LaneBitmask(0x0000000000800000), // dsub1_then_bsub LaneBitmask(0x0000000000800000), // dsub1_then_hsub LaneBitmask(0x0000000000800000), // dsub1_then_ssub LaneBitmask(0x0000000001000000), // dsub3_then_bsub LaneBitmask(0x0000000001000000), // dsub3_then_hsub LaneBitmask(0x0000000001000000), // dsub3_then_ssub LaneBitmask(0x0000000002000000), // dsub2_then_bsub LaneBitmask(0x0000000002000000), // dsub2_then_hsub LaneBitmask(0x0000000002000000), // dsub2_then_ssub LaneBitmask(0x0000000004000000), // qsub1_then_bsub LaneBitmask(0x0000000004000000), // qsub1_then_dsub LaneBitmask(0x0000000004000000), // qsub1_then_hsub LaneBitmask(0x0000000004000000), // qsub1_then_ssub LaneBitmask(0x0000000008000000), // qsub3_then_bsub LaneBitmask(0x0000000008000000), // qsub3_then_dsub LaneBitmask(0x0000000008000000), // qsub3_then_hsub LaneBitmask(0x0000000008000000), // qsub3_then_ssub LaneBitmask(0x0000000010000000), // qsub2_then_bsub LaneBitmask(0x0000000010000000), // qsub2_then_dsub LaneBitmask(0x0000000010000000), // qsub2_then_hsub LaneBitmask(0x0000000010000000), // qsub2_then_ssub LaneBitmask(0x0000000020000000), // x8sub_7_then_sub_32 LaneBitmask(0x0000000040000000), // x8sub_6_then_sub_32 LaneBitmask(0x0000000080000000), // x8sub_5_then_sub_32 LaneBitmask(0x0000000100000000), // x8sub_4_then_sub_32 LaneBitmask(0x0000000200000000), // x8sub_3_then_sub_32 LaneBitmask(0x0000000400000000), // x8sub_2_then_sub_32 LaneBitmask(0x0000000800000000), // x8sub_1_then_sub_32 LaneBitmask(0x0000001000000000), // subo64_then_sub_32 LaneBitmask(0x0000002000000000), // zsub1_then_bsub LaneBitmask(0x0000002000000000), // zsub1_then_dsub LaneBitmask(0x0000002000000000), // zsub1_then_hsub LaneBitmask(0x0000002000000000), // zsub1_then_ssub LaneBitmask(0x0000002000000000), // zsub1_then_zsub LaneBitmask(0x0000004000000000), // zsub1_then_zsub_hi LaneBitmask(0x0000008000000000), // zsub3_then_bsub LaneBitmask(0x0000008000000000), // zsub3_then_dsub LaneBitmask(0x0000008000000000), // zsub3_then_hsub LaneBitmask(0x0000008000000000), // zsub3_then_ssub LaneBitmask(0x0000008000000000), // zsub3_then_zsub LaneBitmask(0x0000010000000000), // zsub3_then_zsub_hi LaneBitmask(0x0000020000000000), // zsub2_then_bsub LaneBitmask(0x0000020000000000), // zsub2_then_dsub LaneBitmask(0x0000020000000000), // zsub2_then_hsub LaneBitmask(0x0000020000000000), // zsub2_then_ssub LaneBitmask(0x0000020000000000), // zsub2_then_zsub LaneBitmask(0x0000040000000000), // zsub2_then_zsub_hi LaneBitmask(0x0000000000800001), // dsub0_dsub1 LaneBitmask(0x0000000002800001), // dsub0_dsub1_dsub2 LaneBitmask(0x0000000002800000), // dsub1_dsub2 LaneBitmask(0x0000000003800000), // dsub1_dsub2_dsub3 LaneBitmask(0x0000000003000000), // dsub2_dsub3 LaneBitmask(0x0000000004000001), // dsub_qsub1_then_dsub LaneBitmask(0x000000001C000001), // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub LaneBitmask(0x0000000014000001), // dsub_qsub1_then_dsub_qsub2_then_dsub LaneBitmask(0x0000000004000001), // qsub0_qsub1 LaneBitmask(0x0000000014000001), // qsub0_qsub1_qsub2 LaneBitmask(0x0000000014000000), // qsub1_qsub2 LaneBitmask(0x000000001C000000), // qsub1_qsub2_qsub3 LaneBitmask(0x0000000018000000), // qsub2_qsub3 LaneBitmask(0x0000000014000000), // qsub1_then_dsub_qsub2_then_dsub LaneBitmask(0x000000001C000000), // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub LaneBitmask(0x0000000018000000), // qsub2_then_dsub_qsub3_then_dsub LaneBitmask(0x0000000800000008), // sub_32_x8sub_1_then_sub_32 LaneBitmask(0x0000000800000008), // x8sub_0_x8sub_1 LaneBitmask(0x0000000600000000), // x8sub_2_x8sub_3 LaneBitmask(0x0000000180000000), // x8sub_4_x8sub_5 LaneBitmask(0x0000000060000000), // x8sub_6_x8sub_7 LaneBitmask(0x0000000060000000), // x8sub_6_then_sub_32_x8sub_7_then_sub_32 LaneBitmask(0x0000000180000000), // x8sub_4_then_sub_32_x8sub_5_then_sub_32 LaneBitmask(0x0000000600000000), // x8sub_2_then_sub_32_x8sub_3_then_sub_32 LaneBitmask(0x0000001000000008), // sub_32_subo64_then_sub_32 LaneBitmask(0x0000002000000001), // dsub_zsub1_then_dsub LaneBitmask(0x0000002000000001), // zsub_zsub1_then_zsub LaneBitmask(0x000002A000000001), // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub LaneBitmask(0x0000022000000001), // dsub_zsub1_then_dsub_zsub2_then_dsub LaneBitmask(0x000002A000000001), // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub LaneBitmask(0x0000022000000001), // zsub_zsub1_then_zsub_zsub2_then_zsub LaneBitmask(0x0000006000000101), // zsub0_zsub1 LaneBitmask(0x0000066000000101), // zsub0_zsub1_zsub2 LaneBitmask(0x0000066000000000), // zsub1_zsub2 LaneBitmask(0x000007E000000000), // zsub1_zsub2_zsub3 LaneBitmask(0x0000078000000000), // zsub2_zsub3 LaneBitmask(0x0000022000000000), // zsub1_then_dsub_zsub2_then_dsub LaneBitmask(0x000002A000000000), // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub LaneBitmask(0x0000022000000000), // zsub1_then_zsub_zsub2_then_zsub LaneBitmask(0x000002A000000000), // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub LaneBitmask(0x0000028000000000), // zsub2_then_dsub_zsub3_then_dsub LaneBitmask(0x0000028000000000), // zsub2_then_zsub_zsub3_then_zsub LaneBitmask(0x0000060000000101), // zsub0_zsub2 LaneBitmask(0x000001E000000000), // zsub1_zsub3 }; static const TargetRegisterInfo::RegClassInfo RegClassInfos[] = { // Mode = 0 (Default) { 8, 8, 8, VTLists+69 }, // FPR8 { 16, 16, 16, VTLists+5 }, // FPR16 { 16, 16, 16, VTLists+8 }, // FPR16_lo { 16, 16, 16, VTLists+49 }, // PPR { 16, 16, 16, VTLists+49 }, // PPR_3b { 16, 16, 16, VTLists+49 }, // PPR_p8to15 { 32, 32, 16, VTLists+69 }, // PPR2 { 32, 32, 16, VTLists+69 }, // PPR2Mul2 { 32, 32, 16, VTLists+69 }, // PPR2_with_psub0_in_PPR_3b { 32, 32, 16, VTLists+69 }, // PPR2_with_psub0_in_PPR_p8to15 { 32, 32, 16, VTLists+69 }, // PPR2_with_psub1_in_PPR_3b { 32, 32, 16, VTLists+69 }, // PPR2_with_psub1_in_PPR_p8to15 { 32, 32, 16, VTLists+69 }, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b { 32, 32, 16, VTLists+69 }, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15 { 32, 32, 16, VTLists+69 }, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b { 32, 32, 16, VTLists+69 }, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15 { 32, 32, 16, VTLists+69 }, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15 { 32, 32, 16, VTLists+69 }, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b { 32, 32, 32, VTLists+1 }, // GPR32all { 32, 32, 32, VTLists+0 }, // FPR32 { 32, 32, 32, VTLists+1 }, // GPR32 { 32, 32, 32, VTLists+1 }, // GPR32sp { 32, 32, 32, VTLists+1 }, // GPR32common { 32, 32, 32, VTLists+0 }, // FPR32_with_hsub_in_FPR16_lo { 32, 32, 32, VTLists+1 }, // GPR32arg { 32, 32, 32, VTLists+1 }, // MatrixIndexGPR32_12_15 { 32, 32, 32, VTLists+1 }, // MatrixIndexGPR32_8_11 { 32, 32, 32, VTLists+1 }, // CCR { 32, 32, 32, VTLists+1 }, // GPR32sponly { 64, 64, 32, VTLists+69 }, // WSeqPairsClass { 64, 64, 32, VTLists+69 }, // WSeqPairsClass_with_subo32_in_GPR32common { 64, 64, 32, VTLists+69 }, // WSeqPairsClass_with_sube32_in_GPR32arg { 64, 64, 32, VTLists+69 }, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 { 64, 64, 32, VTLists+69 }, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 { 64, 64, 64, VTLists+3 }, // GPR64all { 64, 64, 64, VTLists+10 }, // FPR64 { 64, 64, 64, VTLists+3 }, // GPR64 { 64, 64, 64, VTLists+3 }, // GPR64sp { 64, 64, 64, VTLists+3 }, // GPR64common { 64, 64, 64, VTLists+3 }, // GPR64noip { 64, 64, 64, VTLists+3 }, // GPR64common_and_GPR64noip { 64, 64, 64, VTLists+3 }, // tcGPR64 { 64, 64, 64, VTLists+3 }, // GPR64noip_and_tcGPR64 { 64, 64, 64, VTLists+40 }, // FPR64_lo { 64, 64, 64, VTLists+3 }, // GPR64arg { 64, 64, 64, VTLists+3 }, // FIXED_REGS { 64, 64, 64, VTLists+3 }, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 { 64, 64, 64, VTLists+3 }, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 { 64, 64, 64, VTLists+3 }, // FIXED_REGS_with_sub_32 { 64, 64, 64, VTLists+3 }, // rtcGPR64 { 64, 64, 64, VTLists+3 }, // FIXED_REGS_and_GPR64 { 64, 64, 64, VTLists+3 }, // GPR64sponly { 128, 128, 64, VTLists+69 }, // DD { 128, 128, 64, VTLists+69 }, // DD_with_dsub0_in_FPR64_lo { 128, 128, 64, VTLists+69 }, // DD_with_dsub1_in_FPR64_lo { 128, 128, 64, VTLists+69 }, // XSeqPairsClass { 128, 128, 64, VTLists+69 }, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo { 128, 128, 64, VTLists+69 }, // XSeqPairsClass_with_subo64_in_GPR64common { 128, 128, 64, VTLists+69 }, // XSeqPairsClass_with_subo64_in_GPR64noip { 128, 128, 64, VTLists+69 }, // XSeqPairsClass_with_sube64_in_GPR64noip { 128, 128, 64, VTLists+69 }, // XSeqPairsClass_with_sube64_in_tcGPR64 { 128, 128, 64, VTLists+69 }, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 { 128, 128, 64, VTLists+69 }, // XSeqPairsClass_with_subo64_in_tcGPR64 { 128, 128, 64, VTLists+69 }, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 { 128, 128, 64, VTLists+69 }, // XSeqPairsClass_with_sub_32_in_GPR32arg { 128, 128, 64, VTLists+69 }, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 { 128, 128, 64, VTLists+69 }, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 { 128, 128, 64, VTLists+69 }, // XSeqPairsClass_with_sube64_in_rtcGPR64 { 128, 128, 64, VTLists+69 }, // XSeqPairsClass_with_subo64_in_FIXED_REGS { 128, 128, 128, VTLists+21 }, // FPR128 { 128, 128, 128, VTLists+55 }, // ZPR { 128, 128, 128, VTLists+31 }, // FPR128_lo { 128, 128, 128, VTLists+69 }, // MPR128 { 128, 128, 128, VTLists+55 }, // ZPR_4b { 128, 128, 128, VTLists+55 }, // ZPR_3b { 192, 192, 64, VTLists+69 }, // DDD { 192, 192, 64, VTLists+69 }, // DDD_with_dsub0_in_FPR64_lo { 192, 192, 64, VTLists+69 }, // DDD_with_dsub1_in_FPR64_lo { 192, 192, 64, VTLists+69 }, // DDD_with_dsub2_in_FPR64_lo { 192, 192, 64, VTLists+69 }, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo { 192, 192, 64, VTLists+69 }, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo { 192, 192, 64, VTLists+69 }, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo { 256, 256, 64, VTLists+69 }, // DDDD { 256, 256, 64, VTLists+69 }, // DDDD_with_dsub0_in_FPR64_lo { 256, 256, 64, VTLists+69 }, // DDDD_with_dsub1_in_FPR64_lo { 256, 256, 64, VTLists+69 }, // DDDD_with_dsub2_in_FPR64_lo { 256, 256, 64, VTLists+69 }, // DDDD_with_dsub3_in_FPR64_lo { 256, 256, 64, VTLists+69 }, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo { 256, 256, 64, VTLists+69 }, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo { 256, 256, 64, VTLists+69 }, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo { 256, 256, 64, VTLists+69 }, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo { 256, 256, 64, VTLists+69 }, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo { 256, 256, 64, VTLists+69 }, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo { 256, 256, 128, VTLists+69 }, // QQ { 256, 256, 128, VTLists+69 }, // ZPR2 { 256, 256, 128, VTLists+69 }, // QQ_with_dsub_in_FPR64_lo { 256, 256, 128, VTLists+69 }, // QQ_with_qsub1_in_FPR128_lo { 256, 256, 128, VTLists+69 }, // ZPR2Mul2 { 256, 256, 128, VTLists+69 }, // ZPR2_with_dsub_in_FPR64_lo { 256, 256, 128, VTLists+69 }, // ZPR2_with_zsub1_in_ZPR_4b { 256, 256, 128, VTLists+69 }, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo { 256, 256, 128, VTLists+69 }, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b { 256, 256, 128, VTLists+69 }, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo { 256, 256, 128, VTLists+69 }, // ZPR2_with_zsub0_in_ZPR_3b { 256, 256, 128, VTLists+69 }, // ZPR2_with_zsub1_in_ZPR_3b { 256, 256, 128, VTLists+69 }, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b { 256, 256, 128, VTLists+69 }, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b { 256, 256, 256, VTLists+69 }, // ZPR2Strided { 256, 256, 256, VTLists+69 }, // MPR64 { 256, 256, 256, VTLists+69 }, // ZPR2Strided_with_dsub_in_FPR64_lo { 384, 384, 128, VTLists+69 }, // QQQ { 384, 384, 128, VTLists+69 }, // ZPR3 { 384, 384, 128, VTLists+69 }, // QQQ_with_dsub_in_FPR64_lo { 384, 384, 128, VTLists+69 }, // QQQ_with_qsub1_in_FPR128_lo { 384, 384, 128, VTLists+69 }, // QQQ_with_qsub2_in_FPR128_lo { 384, 384, 128, VTLists+69 }, // ZPR3_with_dsub_in_FPR64_lo { 384, 384, 128, VTLists+69 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 { 384, 384, 128, VTLists+69 }, // ZPR3_with_zsub1_in_ZPR_4b { 384, 384, 128, VTLists+69 }, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 { 384, 384, 128, VTLists+69 }, // ZPR3_with_zsub2_in_ZPR_4b { 384, 384, 128, VTLists+69 }, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo { 384, 384, 128, VTLists+69 }, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo { 384, 384, 128, VTLists+69 }, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b { 384, 384, 128, VTLists+69 }, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b { 384, 384, 128, VTLists+69 }, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo { 384, 384, 128, VTLists+69 }, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b { 384, 384, 128, VTLists+69 }, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 { 384, 384, 128, VTLists+69 }, // ZPR3_with_zsub0_in_ZPR_3b { 384, 384, 128, VTLists+69 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo { 384, 384, 128, VTLists+69 }, // ZPR3_with_zsub1_in_ZPR_3b { 384, 384, 128, VTLists+69 }, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo { 384, 384, 128, VTLists+69 }, // ZPR3_with_zsub2_in_ZPR_3b { 384, 384, 128, VTLists+69 }, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 { 384, 384, 128, VTLists+69 }, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b { 384, 384, 128, VTLists+69 }, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo { 384, 384, 128, VTLists+69 }, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b { 384, 384, 128, VTLists+69 }, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo { 384, 384, 128, VTLists+69 }, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b { 384, 384, 128, VTLists+69 }, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 { 384, 384, 128, VTLists+69 }, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b { 384, 384, 128, VTLists+69 }, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b { 384, 384, 128, VTLists+69 }, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 { 384, 384, 128, VTLists+69 }, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b { 384, 384, 128, VTLists+69 }, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo { 512, 512, 128, VTLists+69 }, // QQQQ { 512, 512, 128, VTLists+69 }, // ZPR4 { 512, 512, 128, VTLists+69 }, // QQQQ_with_dsub_in_FPR64_lo { 512, 512, 128, VTLists+69 }, // QQQQ_with_qsub1_in_FPR128_lo { 512, 512, 128, VTLists+69 }, // QQQQ_with_qsub2_in_FPR128_lo { 512, 512, 128, VTLists+69 }, // QQQQ_with_qsub3_in_FPR128_lo { 512, 512, 128, VTLists+69 }, // ZPR4_with_dsub_in_FPR64_lo { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub1_in_ZPR_4b { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub2_in_ZPR_4b { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub3_in_ZPR_4b { 512, 512, 128, VTLists+69 }, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo { 512, 512, 128, VTLists+69 }, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo { 512, 512, 128, VTLists+69 }, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo { 512, 512, 128, VTLists+69 }, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b { 512, 512, 128, VTLists+69 }, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo { 512, 512, 128, VTLists+69 }, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo { 512, 512, 128, VTLists+69 }, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b { 512, 512, 128, VTLists+69 }, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo { 512, 512, 128, VTLists+69 }, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b { 512, 512, 128, VTLists+69 }, // ZPR4Mul4 { 512, 512, 128, VTLists+69 }, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub0_in_ZPR_3b { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub1_in_ZPR_3b { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub2_in_ZPR_3b { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub3_in_ZPR_3b { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 { 512, 512, 128, VTLists+69 }, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo { 512, 512, 128, VTLists+69 }, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b { 512, 512, 128, VTLists+69 }, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b { 512, 512, 128, VTLists+69 }, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b { 512, 512, 128, VTLists+69 }, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b { 512, 512, 128, VTLists+69 }, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b { 512, 512, 128, VTLists+69 }, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo { 512, 512, 128, VTLists+69 }, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 { 512, 512, 128, VTLists+69 }, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b { 512, 512, 128, VTLists+69 }, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b { 512, 512, 128, VTLists+69 }, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 { 512, 512, 128, VTLists+69 }, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b { 512, 512, 128, VTLists+69 }, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 { 512, 512, 512, VTLists+71 }, // GPR64x8Class { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_0_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_1_in_tcGPR64 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+69 }, // ZPR4Strided { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_sub_32_in_GPR32arg { 512, 512, 512, VTLists+69 }, // MPR32 { 512, 512, 512, VTLists+69 }, // ZPR4Strided_with_dsub_in_FPR64_lo { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_2_in_GPR64arg { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_4_in_GPR64arg { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_0_in_rtcGPR64 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_2_in_rtcGPR64 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_4_in_rtcGPR64 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_6_in_GPR64arg { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_6_in_rtcGPR64 { 512, 512, 512, VTLists+71 }, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS { 512, 512, 512, VTLists+69 }, // ZTR { 1024, 1024, 1024, VTLists+69 }, // MPR16 { 2048, 2048, 2048, VTLists+69 }, // MPR { 2048, 2048, 2048, VTLists+69 }, // MPR8 }; static const TargetRegisterClass *const NullRegClasses[] = { nullptr }; static const uint32_t FPR8SubClassMask[] = { 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00880006, 0x01700808, 0xfffffee0, 0xffffefff, 0xffffffff, 0xffffffff, 0x0000007f, 0x04000080, 0x00000000, // bsub 0x00000000, 0x01700000, 0x1ffff800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub1_then_bsub 0x00000000, 0x00000000, 0x1ffc0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub3_then_bsub 0x00000000, 0x00000000, 0x1ffff800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub2_then_bsub 0x00000000, 0x00000000, 0xa0000000, 0x13074011, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_then_bsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub3_then_bsub 0x00000000, 0x00000000, 0x00000000, 0x13074000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub2_then_bsub 0x00000000, 0x00000000, 0x40000000, 0xecf8afee, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub1_then_bsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8fc20000, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub3_then_bsub 0x00000000, 0x00000000, 0x00000000, 0xecf88000, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub2_then_bsub }; static const uint32_t FPR16SubClassMask[] = { 0x00000006, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00880000, 0x01700808, 0xfffffee0, 0xffffefff, 0xffffffff, 0xffffffff, 0x0000007f, 0x04000080, 0x00000000, // hsub 0x00000000, 0x01700000, 0x1ffff800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub1_then_hsub 0x00000000, 0x00000000, 0x1ffc0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub3_then_hsub 0x00000000, 0x00000000, 0x1ffff800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub2_then_hsub 0x00000000, 0x00000000, 0xa0000000, 0x13074011, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_then_hsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub3_then_hsub 0x00000000, 0x00000000, 0x00000000, 0x13074000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub2_then_hsub 0x00000000, 0x00000000, 0x40000000, 0xecf8afee, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub1_then_hsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8fc20000, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub3_then_hsub 0x00000000, 0x00000000, 0x00000000, 0xecf88000, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub2_then_hsub }; static const uint32_t FPR16_loSubClassMask[] = { 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800000, 0x01200800, 0x948a9680, 0xf50926f4, 0x9044cf61, 0x7b1c0ed4, 0x0000006c, 0x04000000, 0x00000000, // hsub 0x00000000, 0x01400000, 0x1d93a000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub1_then_hsub 0x00000000, 0x00000000, 0x1a400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub3_then_hsub 0x00000000, 0x00000000, 0x1f234000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub2_then_hsub 0x00000000, 0x00000000, 0x00000000, 0x13020011, 0x30080000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_then_hsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40200000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, // qsub3_then_hsub 0x00000000, 0x00000000, 0x00000000, 0x12040000, 0x60100000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub2_then_hsub 0x00000000, 0x00000000, 0x00000000, 0xac2027e8, 0x8200dfe7, 0xff7c3cb1, 0x0000007c, 0x04000000, 0x00000000, // zsub1_then_hsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0xfffbe4a2, 0x0000007f, 0x04000000, 0x00000000, // zsub3_then_hsub 0x00000000, 0x00000000, 0x00000000, 0xa8800000, 0x0400fffe, 0xfffcf4b3, 0x0000007d, 0x04000000, 0x00000000, // zsub2_then_hsub }; static const uint32_t PPRSubClassMask[] = { 0x00000038, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0003ffc0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub0 0x0003ffc0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub1 }; static const uint32_t PPR_3bSubClassMask[] = { 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00015100, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub0 0x00025400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub1 }; static const uint32_t PPR_p8to15SubClassMask[] = { 0x00000020, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0002a200, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub0 0x0001a800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // psub1 }; static const uint32_t PPR2SubClassMask[] = { 0x0003ffc0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const uint32_t PPR2Mul2SubClassMask[] = { 0x0000c080, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const uint32_t PPR2_with_psub0_in_PPR_3bSubClassMask[] = { 0x00015100, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const uint32_t PPR2_with_psub0_in_PPR_p8to15SubClassMask[] = { 0x0002a200, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const uint32_t PPR2_with_psub1_in_PPR_3bSubClassMask[] = { 0x00025400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const uint32_t PPR2_with_psub1_in_PPR_p8to15SubClassMask[] = { 0x0001a800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const uint32_t PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3bSubClassMask[] = { 0x00005000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const uint32_t PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15SubClassMask[] = { 0x0000a000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const uint32_t PPR2Mul2_and_PPR2_with_psub0_in_PPR_3bSubClassMask[] = { 0x00004000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const uint32_t PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15SubClassMask[] = { 0x00008000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const uint32_t PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15SubClassMask[] = { 0x00010000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const uint32_t PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3bSubClassMask[] = { 0x00020000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const uint32_t GPR32allSubClassMask[] = { 0x17740000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfe8fd7f4, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // sub_32 0xe0000000, 0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube32 0xe0000000, 0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_7_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_6_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_5_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_4_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_3_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_2_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_1_then_sub_32 0x00000000, 0xfe800000, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64_then_sub_32 }; static const uint32_t FPR32SubClassMask[] = { 0x00880000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01700808, 0xfffffee0, 0xffffefff, 0xffffffff, 0xffffffff, 0x0000007f, 0x04000080, 0x00000000, // ssub 0x00000000, 0x01700000, 0x1ffff800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub1_then_ssub 0x00000000, 0x00000000, 0x1ffc0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub3_then_ssub 0x00000000, 0x00000000, 0x1ffff800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub2_then_ssub 0x00000000, 0x00000000, 0xa0000000, 0x13074011, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_then_ssub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub3_then_ssub 0x00000000, 0x00000000, 0x00000000, 0x13074000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub2_then_ssub 0x00000000, 0x00000000, 0x40000000, 0xecf8afee, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub1_then_ssub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8fc20000, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub3_then_ssub 0x00000000, 0x00000000, 0x00000000, 0xecf88000, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub2_then_ssub }; static const uint32_t GPR32SubClassMask[] = { 0x07500000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfe86d7d0, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // sub_32 0xe0000000, 0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube32 0xe0000000, 0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_7_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_6_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_5_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_4_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_3_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_2_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_1_then_sub_32 0x00000000, 0xfe800000, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64_then_sub_32 }; static const uint32_t GPR32spSubClassMask[] = { 0x17600000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfe8fd760, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // sub_32 0xe0000000, 0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube32 0xc0000000, 0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_7_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_6_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_5_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_4_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_3_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_2_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_1_then_sub_32 0x00000000, 0xfa000000, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64_then_sub_32 }; static const uint32_t GPR32commonSubClassMask[] = { 0x07400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfe86d740, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // sub_32 0xe0000000, 0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube32 0xc0000000, 0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_7_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_6_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_5_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_4_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_3_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_2_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_1_then_sub_32 0x00000000, 0xfa000000, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64_then_sub_32 }; static const uint32_t FPR32_with_hsub_in_FPR16_loSubClassMask[] = { 0x00800000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01200800, 0x948a9680, 0xf50926f4, 0x9044cf61, 0x7b1c0ed4, 0x0000006c, 0x04000000, 0x00000000, // ssub 0x00000000, 0x01400000, 0x1d93a000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub1_then_ssub 0x00000000, 0x00000000, 0x1a400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub3_then_ssub 0x00000000, 0x00000000, 0x1f234000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub2_then_ssub 0x00000000, 0x00000000, 0x00000000, 0x13020011, 0x30080000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_then_ssub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40200000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, // qsub3_then_ssub 0x00000000, 0x00000000, 0x00000000, 0x12040000, 0x60100000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub2_then_ssub 0x00000000, 0x00000000, 0x00000000, 0xac2027e8, 0x8200dfe7, 0xff7c3cb1, 0x0000007c, 0x04000000, 0x00000000, // zsub1_then_ssub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0xfffbe4a2, 0x0000007f, 0x04000000, 0x00000000, // zsub3_then_ssub 0x00000000, 0x00000000, 0x00000000, 0xa8800000, 0x0400fffe, 0xfffcf4b3, 0x0000007d, 0x04000000, 0x00000000, // zsub2_then_ssub }; static const uint32_t GPR32argSubClassMask[] = { 0x01000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x09000000, 0x0000054f, // sub_32 0x80000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube32 0x80000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, // x8sub_7_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, // x8sub_6_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000502, // x8sub_5_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000502, // x8sub_4_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000546, // x8sub_3_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000546, // x8sub_2_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x09000000, 0x0000054f, // x8sub_1_then_sub_32 0x00000000, 0x00000000, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64_then_sub_32 }; static const uint32_t MatrixIndexGPR32_12_15SubClassMask[] = { 0x02000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00004000, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000280, // sub_32 0x00000000, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube32 0x00000000, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000018, // x8sub_7_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000018, // x8sub_6_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000810, // x8sub_5_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000810, // x8sub_4_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000a00, // x8sub_3_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000a00, // x8sub_2_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000280, // x8sub_1_then_sub_32 0x00000000, 0x00000000, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64_then_sub_32 }; static const uint32_t MatrixIndexGPR32_8_11SubClassMask[] = { 0x04000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00008000, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000810, // sub_32 0x00000000, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube32 0x00000000, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000144, // x8sub_7_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000144, // x8sub_6_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000049, // x8sub_5_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000049, // x8sub_4_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000018, // x8sub_3_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000018, // x8sub_2_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000810, // x8sub_1_then_sub_32 0x00000000, 0x00000000, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64_then_sub_32 }; static const uint32_t CCRSubClassMask[] = { 0x08000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const uint32_t GPR32sponlySubClassMask[] = { 0x10000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00080000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sub_32 }; static const uint32_t WSeqPairsClassSubClassMask[] = { 0xe0000000, 0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // sub_32_x8sub_1_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0x00000000, 0xfe800000, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sub_32_subo64_then_sub_32 }; static const uint32_t WSeqPairsClass_with_subo32_in_GPR32commonSubClassMask[] = { 0xc0000000, 0x00000003, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // sub_32_x8sub_1_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0x00000000, 0xfa000000, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sub_32_subo64_then_sub_32 }; static const uint32_t WSeqPairsClass_with_sube32_in_GPR32argSubClassMask[] = { 0x80000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x09000000, 0x0000054f, // sub_32_x8sub_1_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000502, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000546, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0x00000000, 0x00000000, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sub_32_subo64_then_sub_32 }; static const uint32_t WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15SubClassMask[] = { 0x00000000, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000280, // sub_32_x8sub_1_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000018, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000810, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000a00, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0x00000000, 0x00000000, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sub_32_subo64_then_sub_32 }; static const uint32_t WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11SubClassMask[] = { 0x00000000, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000810, // sub_32_x8sub_1_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000144, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000049, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000018, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0x00000000, 0x00000000, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sub_32_subo64_then_sub_32 }; static const uint32_t GPR64allSubClassMask[] = { 0x00000000, 0x000fd7f4, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfe800000, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 0x00000000, 0xfe800000, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_4 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_6 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_7 }; static const uint32_t FPR64SubClassMask[] = { 0x00000000, 0x00000808, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xe00006e0, 0xffffefff, 0xffffffff, 0xffffffff, 0x0000007f, 0x04000080, 0x00000000, // dsub 0x00000000, 0x01700000, 0x1ffff800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0 0x00000000, 0x01700000, 0x1ffff800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub1 0x00000000, 0x00000000, 0x1ffff800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub2 0x00000000, 0x00000000, 0x1ffc0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub3 0x00000000, 0x00000000, 0xa0000000, 0x13074011, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x13074000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub2_then_dsub 0x00000000, 0x00000000, 0x40000000, 0xecf8afee, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub1_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8fc20000, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0xecf88000, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub2_then_dsub }; static const uint32_t GPR64SubClassMask[] = { 0x00000000, 0x0006d7d0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfe800000, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 0x00000000, 0xfe800000, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_4 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_6 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_7 }; static const uint32_t GPR64spSubClassMask[] = { 0x00000000, 0x000fd760, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfe800000, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 0x00000000, 0xfa000000, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_4 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_6 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_7 }; static const uint32_t GPR64commonSubClassMask[] = { 0x00000000, 0x0006d740, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfe800000, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 0x00000000, 0xfa000000, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_4 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_6 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_7 }; static const uint32_t GPR64noipSubClassMask[] = { 0x00000000, 0x0004d580, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa8000000, 0x00000017, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 0x00000000, 0xac000000, 0x00000017, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf7087100, 0xf9ee6740, 0x00001fdf, // x8sub_0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf7087100, 0xf9ee6740, 0x00001fdf, // x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1b131200, 0xe9f93e5c, 0x00001f7f, // x8sub_2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1b131200, 0xe9f93e5c, 0x00001f7f, // x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x2d252400, 0xa9bfca65, 0x00001dff, // x8sub_4 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x2d252400, 0xa9bfca65, 0x00001dff, // x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4e464800, 0x99ddd56a, 0x000017ff, // x8sub_6 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4e464800, 0x99ddd56a, 0x000017ff, // x8sub_7 }; static const uint32_t GPR64common_and_GPR64noipSubClassMask[] = { 0x00000000, 0x0004d500, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa8000000, 0x00000017, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 0x00000000, 0xa8000000, 0x00000017, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf7087100, 0xf9ee6740, 0x00001fdf, // x8sub_0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf7087100, 0xf9ee6740, 0x00001fdf, // x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1b131200, 0xe9f93e5c, 0x00001f7f, // x8sub_2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1b131200, 0xe9f93e5c, 0x00001f7f, // x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x2d252400, 0xa9bfca65, 0x00001dff, // x8sub_4 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x2d252400, 0xa9bfca65, 0x00001dff, // x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4e464800, 0x99ddd56a, 0x000017ff, // x8sub_6 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4e464800, 0x99ddd56a, 0x000017ff, // x8sub_7 }; static const uint32_t tcGPR64SubClassMask[] = { 0x00000000, 0x0002d600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf0000000, 0x0000000f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 0x00000000, 0xc0000000, 0x0000000f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf0f88000, 0xf9ffff3f, 0x00000fff, // x8sub_0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80800000, 0xf9f6b913, 0x00000fff, // x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80800000, 0xf9f6b913, 0x00000fff, // x8sub_2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0xf9e62100, 0x00000fdf, // x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0xf9e62100, 0x00000fdf, // x8sub_4 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xe9e02000, 0x00000f5f, // x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xe9e02000, 0x00000f5f, // x8sub_6 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa9a00000, 0x00000d5f, // x8sub_7 }; static const uint32_t GPR64noip_and_tcGPR64SubClassMask[] = { 0x00000000, 0x0000d400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa0000000, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 0x00000000, 0x80000000, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf0080000, 0xf9ee6700, 0x00000fdf, // x8sub_0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0xf9e62100, 0x00000fdf, // x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xe9f03810, 0x00000f7f, // x8sub_2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xe9e02000, 0x00000f5f, // x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa9a60000, 0x00000ddf, // x8sub_4 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa9a00000, 0x00000d5f, // x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x89c00000, 0x0000075f, // x8sub_6 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x89800000, 0x0000055f, // x8sub_7 }; static const uint32_t FPR64_loSubClassMask[] = { 0x00000000, 0x00000800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000680, 0xf50926f4, 0x9044cf61, 0x7b1c0ed4, 0x0000006c, 0x04000000, 0x00000000, // dsub 0x00000000, 0x01200000, 0x148a9000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0 0x00000000, 0x01400000, 0x1d93a000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub1 0x00000000, 0x00000000, 0x1f234000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub2 0x00000000, 0x00000000, 0x1a400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub3 0x00000000, 0x00000000, 0x00000000, 0x13020011, 0x30080000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40200000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, // qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x12040000, 0x60100000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0xac2027e8, 0x8200dfe7, 0xff7c3cb1, 0x0000007c, 0x04000000, 0x00000000, // zsub1_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0xfffbe4a2, 0x0000007f, 0x04000000, 0x00000000, // zsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0xa8800000, 0x0400fffe, 0xfffcf4b3, 0x0000007d, 0x04000000, 0x00000000, // zsub2_then_dsub }; static const uint32_t GPR64argSubClassMask[] = { 0x00000000, 0x00001000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 0x00000000, 0x00000000, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x09000000, 0x0000054f, // x8sub_0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x09000000, 0x0000054f, // x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000546, // x8sub_2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000546, // x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000502, // x8sub_4 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000502, // x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, // x8sub_6 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, // x8sub_7 }; static const uint32_t FIXED_REGSSubClassMask[] = { 0x00000000, 0x000d2000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, // x8sub_7 }; static const uint32_t GPR64_with_sub_32_in_MatrixIndexGPR32_12_15SubClassMask[] = { 0x00000000, 0x00004000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 0x00000000, 0x00000000, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000280, // x8sub_0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000280, // x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000a00, // x8sub_2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000a00, // x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000810, // x8sub_4 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000810, // x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000018, // x8sub_6 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000018, // x8sub_7 }; static const uint32_t GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { 0x00000000, 0x00008000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 0x00000000, 0x00000000, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000810, // x8sub_0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000810, // x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000018, // x8sub_2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000018, // x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000049, // x8sub_4 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000049, // x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000144, // x8sub_6 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000144, // x8sub_7 }; static const uint32_t FIXED_REGS_with_sub_32SubClassMask[] = { 0x00000000, 0x000d0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, // x8sub_7 }; static const uint32_t rtcGPR64SubClassMask[] = { 0x00000000, 0x00020000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // sube64 0x00000000, 0x00000000, 0x00000008, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, // x8sub_0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, // x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // x8sub_2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000200, // x8sub_4 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000200, // x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000800, // x8sub_6 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000800, // x8sub_7 }; static const uint32_t FIXED_REGS_and_GPR64SubClassMask[] = { 0x00000000, 0x00040000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // subo64 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, // x8sub_7 }; static const uint32_t GPR64sponlySubClassMask[] = { 0x00000000, 0x00080000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const uint32_t DDSubClassMask[] = { 0x00000000, 0x01700000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1ffff800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1 0x00000000, 0x00000000, 0x1ffff800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub1_dsub2 0x00000000, 0x00000000, 0x1ffc0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub2_dsub3 0x00000000, 0x00000000, 0xa0000000, 0x13074011, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x13074000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_then_dsub_qsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x40000000, 0xecf887ee, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub 0x00000000, 0x00000000, 0x00000000, 0xecf88000, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x00000000, 0x00000000, // zsub1_then_dsub_zsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8fc20000, 0xffffffb3, 0x0000007f, 0x00000000, 0x00000000, // zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t DD_with_dsub0_in_FPR64_loSubClassMask[] = { 0x00000000, 0x01200000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x148a9000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1 0x00000000, 0x00000000, 0x1d93a000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub1_dsub2 0x00000000, 0x00000000, 0x1f200000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub2_dsub3 0x00000000, 0x00000000, 0x80000000, 0x11010010, 0x10040000, 0x00000044, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x13020000, 0x30080000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_then_dsub_qsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x60100000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0xe40806e4, 0x8040cf61, 0x7b1c0e90, 0x0000006c, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub 0x00000000, 0x00000000, 0x00000000, 0xac200000, 0x8200dfe7, 0xff7c3cb1, 0x0000007c, 0x00000000, 0x00000000, // zsub1_then_dsub_zsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0xfffcf4b3, 0x0000007d, 0x00000000, 0x00000000, // zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t DD_with_dsub1_in_FPR64_loSubClassMask[] = { 0x00000000, 0x01400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1d93a000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1 0x00000000, 0x00000000, 0x1f234000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub1_dsub2 0x00000000, 0x00000000, 0x1a400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub2_dsub3 0x00000000, 0x00000000, 0x00000000, 0x13020011, 0x30080000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x12040000, 0x60100000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_then_dsub_qsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40200000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, // qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0xac2007e8, 0x8200dfe7, 0xff7c3cb1, 0x0000007c, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub 0x00000000, 0x00000000, 0x00000000, 0xa8800000, 0x0400fffe, 0xfffcf4b3, 0x0000007d, 0x00000000, 0x00000000, // zsub1_then_dsub_zsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0xfffbe4a2, 0x0000007f, 0x00000000, 0x00000000, // zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t XSeqPairsClassSubClassMask[] = { 0x00000000, 0xfe800000, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_0_x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_2_x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_4_x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_6_x8sub_7 }; static const uint32_t DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loSubClassMask[] = { 0x00000000, 0x01000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x14828000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1 0x00000000, 0x00000000, 0x1d030000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub1_dsub2 0x00000000, 0x00000000, 0x1a000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub2_dsub3 0x00000000, 0x00000000, 0x00000000, 0x11000010, 0x10000000, 0x00000044, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x12000000, 0x20000000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_then_dsub_qsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, // qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0xa40006e0, 0x8000cf61, 0x7b1c0c90, 0x0000006c, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub 0x00000000, 0x00000000, 0x00000000, 0xa8000000, 0x0000dfe6, 0xff7c34b1, 0x0000007c, 0x00000000, 0x00000000, // zsub1_then_dsub_zsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff8e4a2, 0x0000007d, 0x00000000, 0x00000000, // zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t XSeqPairsClass_with_subo64_in_GPR64commonSubClassMask[] = { 0x00000000, 0xfa000000, 0x0000001f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_0_x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_2_x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_4_x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, // x8sub_6_x8sub_7 }; static const uint32_t XSeqPairsClass_with_subo64_in_GPR64noipSubClassMask[] = { 0x00000000, 0xac000000, 0x00000017, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf7087100, 0xf9ee6740, 0x00001fdf, // x8sub_0_x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1b131200, 0xe9f93e5c, 0x00001f7f, // x8sub_2_x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x2d252400, 0xa9bfca65, 0x00001dff, // x8sub_4_x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4e464800, 0x99ddd56a, 0x000017ff, // x8sub_6_x8sub_7 }; static const uint32_t XSeqPairsClass_with_sube64_in_GPR64noipSubClassMask[] = { 0x00000000, 0xa8000000, 0x00000017, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf7087100, 0xf9ee6740, 0x00001fdf, // x8sub_0_x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1b131200, 0xe9f93e5c, 0x00001f7f, // x8sub_2_x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x2d252400, 0xa9bfca65, 0x00001dff, // x8sub_4_x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4e464800, 0x99ddd56a, 0x000017ff, // x8sub_6_x8sub_7 }; static const uint32_t XSeqPairsClass_with_sube64_in_tcGPR64SubClassMask[] = { 0x00000000, 0xf0000000, 0x0000000f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf0f88000, 0xf9ffff3f, 0x00000fff, // x8sub_0_x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80800000, 0xf9f6b913, 0x00000fff, // x8sub_2_x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0xf9e62100, 0x00000fdf, // x8sub_4_x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xe9e02000, 0x00000f5f, // x8sub_6_x8sub_7 }; static const uint32_t XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64SubClassMask[] = { 0x00000000, 0xa0000000, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf0080000, 0xf9ee6700, 0x00000fdf, // x8sub_0_x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xe9f03810, 0x00000f7f, // x8sub_2_x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa9a60000, 0x00000ddf, // x8sub_4_x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x89c00000, 0x0000075f, // x8sub_6_x8sub_7 }; static const uint32_t XSeqPairsClass_with_subo64_in_tcGPR64SubClassMask[] = { 0x00000000, 0xc0000000, 0x0000000f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80800000, 0xf9f6b913, 0x00000fff, // x8sub_0_x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0xf9e62100, 0x00000fdf, // x8sub_2_x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xe9e02000, 0x00000f5f, // x8sub_4_x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa9a00000, 0x00000d5f, // x8sub_6_x8sub_7 }; static const uint32_t XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64SubClassMask[] = { 0x00000000, 0x80000000, 0x00000007, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0xf9e62100, 0x00000fdf, // x8sub_0_x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xe9e02000, 0x00000f5f, // x8sub_2_x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa9a00000, 0x00000d5f, // x8sub_4_x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x89800000, 0x0000055f, // x8sub_6_x8sub_7 }; static const uint32_t XSeqPairsClass_with_sub_32_in_GPR32argSubClassMask[] = { 0x00000000, 0x00000000, 0x00000001, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x09000000, 0x0000054f, // x8sub_0_x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000546, // x8sub_2_x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000502, // x8sub_4_x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, // x8sub_6_x8sub_7 }; static const uint32_t XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15SubClassMask[] = { 0x00000000, 0x00000000, 0x00000002, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000280, // x8sub_0_x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000a00, // x8sub_2_x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000810, // x8sub_4_x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000018, // x8sub_6_x8sub_7 }; static const uint32_t XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { 0x00000000, 0x00000000, 0x00000004, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000810, // x8sub_0_x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000018, // x8sub_2_x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000049, // x8sub_4_x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000144, // x8sub_6_x8sub_7 }; static const uint32_t XSeqPairsClass_with_sube64_in_rtcGPR64SubClassMask[] = { 0x00000000, 0x00000000, 0x00000008, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, // x8sub_0_x8sub_1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, // x8sub_2_x8sub_3 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000200, // x8sub_4_x8sub_5 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000800, // x8sub_6_x8sub_7 }; static const uint32_t XSeqPairsClass_with_subo64_in_FIXED_REGSSubClassMask[] = { 0x00000000, 0x00000000, 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, // x8sub_6_x8sub_7 }; static const uint32_t FPR128SubClassMask[] = { 0x00000000, 0x00000000, 0x000000a0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa0000000, 0x13074011, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub0 0x00000000, 0x00000000, 0xa0000000, 0x13074011, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1 0x00000000, 0x00000000, 0x00000000, 0x13074000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub3 0x00000000, 0x00000000, 0x40000640, 0xecf8afee, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub 0x00000000, 0x00000000, 0x40000000, 0xecf8afee, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub1_then_zsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8fc20000, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub3_then_zsub 0x00000000, 0x00000000, 0x00000000, 0xecf88000, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub2_then_zsub }; static const uint32_t ZPRSubClassMask[] = { 0x00000000, 0x00000000, 0x00000640, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0xecf8afee, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub0 0x00000000, 0x00000000, 0x40000000, 0xecf8afee, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub1 0x00000000, 0x00000000, 0x00000000, 0xecf88000, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8fc20000, 0xffffffb3, 0x0000007f, 0x04000080, 0x00000000, // zsub3 }; static const uint32_t FPR128_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000080, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x11010010, 0x10040000, 0x00000044, 0x00000000, 0x00000000, 0x00000000, // qsub0 0x00000000, 0x00000000, 0x00000000, 0x13020011, 0x30080000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1 0x00000000, 0x00000000, 0x00000000, 0x12040000, 0x60100000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40200000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, // qsub3 0x00000000, 0x00000000, 0x00000600, 0xe40826e4, 0x8040cf61, 0x7b1c0e90, 0x0000006c, 0x04000000, 0x00000000, // zsub 0x00000000, 0x00000000, 0x00000000, 0xac2027e8, 0x8200dfe7, 0xff7c3cb1, 0x0000007c, 0x04000000, 0x00000000, // zsub1_then_zsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0xfffbe4a2, 0x0000007f, 0x04000000, 0x00000000, // zsub3_then_zsub 0x00000000, 0x00000000, 0x00000000, 0xa8800000, 0x0400fffe, 0xfffcf4b3, 0x0000007d, 0x04000000, 0x00000000, // zsub2_then_zsub }; static const uint32_t MPR128SubClassMask[] = { 0x00000000, 0x00000000, 0x00000100, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x0001c000, // zasubq0 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x0001c000, // zasubq1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x0001c000, // zasubd1_then_zasubq0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x0001c000, // zasubd1_then_zasubq1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0001c000, // zasubs1_then_zasubq0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0001c000, // zasubs1_then_zasubq1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0001c000, // zasubs1_then_zasubd1_then_zasubq0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0001c000, // zasubs1_then_zasubd1_then_zasubq1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00018000, // zasubh1_then_zasubq0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00018000, // zasubh1_then_zasubq1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00018000, // zasubh1_then_zasubd1_then_zasubq0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00018000, // zasubh1_then_zasubd1_then_zasubq1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00018000, // zasubh1_then_zasubs1_then_zasubq0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00018000, // zasubh1_then_zasubs1_then_zasubq1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00018000, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00018000, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 }; static const uint32_t ZPR_4bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xe40826e4, 0x8040cf61, 0x7b1c0e90, 0x0000006c, 0x04000000, 0x00000000, // zsub0 0x00000000, 0x00000000, 0x00000000, 0xac2027e8, 0x8200dfe7, 0xff7c3cb1, 0x0000007c, 0x04000000, 0x00000000, // zsub1 0x00000000, 0x00000000, 0x00000000, 0xa8800000, 0x0400fffe, 0xfffcf4b3, 0x0000007d, 0x04000000, 0x00000000, // zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0xfffbe4a2, 0x0000007f, 0x04000000, 0x00000000, // zsub3 }; static const uint32_t ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80002680, 0x0000ce20, 0x69080400, 0x0000006c, 0x04000000, 0x00000000, // zsub0 0x00000000, 0x00000000, 0x00000000, 0x00000700, 0x0000daa2, 0xcd282000, 0x0000007c, 0x04000000, 0x00000000, // zsub1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000f288, 0x8da08000, 0x0000007d, 0x00000000, 0x00000000, // zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0c810000, 0x0000007b, 0x00000000, 0x00000000, // zsub3 }; static const uint32_t DDDSubClassMask[] = { 0x00000000, 0x00000000, 0x0003f800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1ffc0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1_dsub2 0x00000000, 0x00000000, 0x1ffc0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub1_dsub2_dsub3 0x00000000, 0x00000000, 0x00000000, 0x13074000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub_qsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0xecf88000, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub_zsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8fc20000, 0xffffffb3, 0x0000007f, 0x00000000, 0x00000000, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t DDD_with_dsub0_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00029000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x14880000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1_dsub2 0x00000000, 0x00000000, 0x1d900000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub1_dsub2_dsub3 0x00000000, 0x00000000, 0x00000000, 0x11010000, 0x10040000, 0x00000044, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub_qsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x30080000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0xe4080000, 0x8040cf61, 0x7b1c0e90, 0x0000006c, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub_zsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x82000000, 0xff7c3cb1, 0x0000007c, 0x00000000, 0x00000000, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t DDD_with_dsub1_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x0003a000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1d900000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1_dsub2 0x00000000, 0x00000000, 0x1f200000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub1_dsub2_dsub3 0x00000000, 0x00000000, 0x00000000, 0x13020000, 0x30080000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub_qsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x60100000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0xac200000, 0x8200dfe7, 0xff7c3cb1, 0x0000007c, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub_zsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0xfffcf4b3, 0x0000007d, 0x00000000, 0x00000000, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t DDD_with_dsub2_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00034000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1f200000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1_dsub2 0x00000000, 0x00000000, 0x1a400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub1_dsub2_dsub3 0x00000000, 0x00000000, 0x00000000, 0x12040000, 0x60100000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub_qsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40200000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0xa8800000, 0x0400fffe, 0xfffcf4b3, 0x0000007d, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub_zsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0xfffbe4a2, 0x0000007f, 0x00000000, 0x00000000, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00028000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x14800000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1_dsub2 0x00000000, 0x00000000, 0x1d000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub1_dsub2_dsub3 0x00000000, 0x00000000, 0x00000000, 0x11000000, 0x10000000, 0x00000044, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub_qsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0xa4000000, 0x8000cf61, 0x7b1c0c90, 0x0000006c, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub_zsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff7c34b1, 0x0000007c, 0x00000000, 0x00000000, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00030000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1d000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1_dsub2 0x00000000, 0x00000000, 0x1a000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub1_dsub2_dsub3 0x00000000, 0x00000000, 0x00000000, 0x12000000, 0x20000000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub_qsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0xa8000000, 0x0000dfe6, 0xff7c34b1, 0x0000007c, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub_zsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff8e4a2, 0x0000007d, 0x00000000, 0x00000000, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00020000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x14000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub0_dsub1_dsub2 0x00000000, 0x00000000, 0x18000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, // dsub1_dsub2_dsub3 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000000, 0x00000044, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub_qsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0xa0000000, 0x0000cf60, 0x7b1c0490, 0x0000006c, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub_zsub2_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff7824a0, 0x0000007c, 0x00000000, 0x00000000, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t DDDDSubClassMask[] = { 0x00000000, 0x00000000, 0x1ffc0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8fc20000, 0xffffffb3, 0x0000007f, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t DDDD_with_dsub0_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x14880000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10040000, 0x00000044, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80400000, 0x7b1c0e90, 0x0000006c, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t DDDD_with_dsub1_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x1d900000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x30080000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x82000000, 0xff7c3cb1, 0x0000007c, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t DDDD_with_dsub2_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x1f200000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x60100000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0xfffcf4b3, 0x0000007d, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t DDDD_with_dsub3_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x1a400000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40200000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0xfffbe4a2, 0x0000007f, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x14800000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000044, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x7b1c0c90, 0x0000006c, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x1d000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff7c34b1, 0x0000007c, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x1a000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff8e4a2, 0x0000007d, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x14000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000044, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x7b1c0490, 0x0000006c, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x18000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff7824a0, 0x0000007c, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, 0x00000000, 0x00000000, 0x00000000, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x7b180480, 0x0000006c, 0x00000000, 0x00000000, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub }; static const uint32_t QQSubClassMask[] = { 0x00000000, 0x00000000, 0xa0000000, 0x00000011, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x13074000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1 0x00000000, 0x00000000, 0x00000000, 0x13074000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_qsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub2_qsub3 0x00000000, 0x00000000, 0x40000000, 0xecf887ee, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub 0x00000000, 0x00000000, 0x00000000, 0xecf88000, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x00000000, 0x00000000, // zsub1_then_zsub_zsub2_then_zsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8fc20000, 0xffffffb3, 0x0000007f, 0x00000000, 0x00000000, // zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t ZPR2SubClassMask[] = { 0x00000000, 0x00000000, 0x40000000, 0x000007ee, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xecf88000, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x00000000, 0x00000000, // zsub0_zsub1 0x00000000, 0x00000000, 0x00000000, 0xecf88000, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x00000000, 0x00000000, // zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8fc20000, 0xffffffb3, 0x0000007f, 0x00000000, 0x00000000, // zsub2_zsub3 }; static const uint32_t QQ_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x80000000, 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x11010000, 0x10040000, 0x00000044, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1 0x00000000, 0x00000000, 0x00000000, 0x13020000, 0x30080000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_qsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x60100000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub2_qsub3 0x00000000, 0x00000000, 0x00000000, 0xe40806e4, 0x8040cf61, 0x7b1c0e90, 0x0000006c, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub 0x00000000, 0x00000000, 0x00000000, 0xac200000, 0x8200dfe7, 0xff7c3cb1, 0x0000007c, 0x00000000, 0x00000000, // zsub1_then_zsub_zsub2_then_zsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0xfffcf4b3, 0x0000007d, 0x00000000, 0x00000000, // zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t QQ_with_qsub1_in_FPR128_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000011, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x13020000, 0x30080000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1 0x00000000, 0x00000000, 0x00000000, 0x12040000, 0x60100000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_qsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40200000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, // qsub2_qsub3 0x00000000, 0x00000000, 0x00000000, 0xac2007e8, 0x8200dfe7, 0xff7c3cb1, 0x0000007c, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub 0x00000000, 0x00000000, 0x00000000, 0xa8800000, 0x0400fffe, 0xfffcf4b3, 0x0000007d, 0x00000000, 0x00000000, // zsub1_then_zsub_zsub2_then_zsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0xfffbe4a2, 0x0000007f, 0x00000000, 0x00000000, // zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t ZPR2Mul2SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000442, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x0080a911, 0x50104900, 0x00000029, 0x00000000, 0x00000000, // zsub0_zsub1 0x00000000, 0x00000000, 0x00000000, 0x40400000, 0x01005444, 0xa2461200, 0x00000056, 0x00000000, 0x00000000, // zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800000, 0x50104900, 0x00000029, 0x00000000, 0x00000000, // zsub2_zsub3 }; static const uint32_t ZPR2_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x000006e4, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xe4080000, 0x8040cf61, 0x7b1c0e90, 0x0000006c, 0x00000000, 0x00000000, // zsub0_zsub1 0x00000000, 0x00000000, 0x00000000, 0xac200000, 0x8200dfe7, 0xff7c3cb1, 0x0000007c, 0x00000000, 0x00000000, // zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0xfffcf4b3, 0x0000007d, 0x00000000, 0x00000000, // zsub2_zsub3 }; static const uint32_t ZPR2_with_zsub1_in_ZPR_4bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x000007e8, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xac200000, 0x8200dfe7, 0xff7c3cb1, 0x0000007c, 0x00000000, 0x00000000, // zsub0_zsub1 0x00000000, 0x00000000, 0x00000000, 0xa8800000, 0x0400fffe, 0xfffcf4b3, 0x0000007d, 0x00000000, 0x00000000, // zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0xfffbe4a2, 0x0000007f, 0x00000000, 0x00000000, // zsub2_zsub3 }; static const uint32_t QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000010, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x11000000, 0x10000000, 0x00000044, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1 0x00000000, 0x00000000, 0x00000000, 0x12000000, 0x20000000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_qsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, // qsub2_qsub3 0x00000000, 0x00000000, 0x00000000, 0xa40006e0, 0x8000cf61, 0x7b1c0c90, 0x0000006c, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub 0x00000000, 0x00000000, 0x00000000, 0xa8000000, 0x0000dfe6, 0xff7c34b1, 0x0000007c, 0x00000000, 0x00000000, // zsub1_then_zsub_zsub2_then_zsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff8e4a2, 0x0000007d, 0x00000000, 0x00000000, // zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x000006e0, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa4000000, 0x8000cf61, 0x7b1c0c90, 0x0000006c, 0x00000000, 0x00000000, // zsub0_zsub1 0x00000000, 0x00000000, 0x00000000, 0xa8000000, 0x0000dfe6, 0xff7c34b1, 0x0000007c, 0x00000000, 0x00000000, // zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff8e4a2, 0x0000007d, 0x00000000, 0x00000000, // zsub2_zsub3 }; static const uint32_t ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000440, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00008901, 0x50100800, 0x00000028, 0x00000000, 0x00000000, // zsub0_zsub1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00005444, 0xa2441000, 0x00000054, 0x00000000, 0x00000000, // zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x50104000, 0x00000029, 0x00000000, 0x00000000, // zsub2_zsub3 }; static const uint32_t ZPR2_with_zsub0_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000680, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x0000ce20, 0x69080400, 0x0000006c, 0x00000000, 0x00000000, // zsub0_zsub1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000daa2, 0xcd282000, 0x0000007c, 0x00000000, 0x00000000, // zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8da08000, 0x0000007d, 0x00000000, 0x00000000, // zsub2_zsub3 }; static const uint32_t ZPR2_with_zsub1_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000700, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000daa2, 0xcd282000, 0x0000007c, 0x00000000, 0x00000000, // zsub0_zsub1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000f288, 0x8da08000, 0x0000007d, 0x00000000, 0x00000000, // zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0c810000, 0x0000007b, 0x00000000, 0x00000000, // zsub2_zsub3 }; static const uint32_t ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000ca20, 0x49080000, 0x0000006c, 0x00000000, 0x00000000, // zsub0_zsub1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000d280, 0x8d200000, 0x0000007c, 0x00000000, 0x00000000, // zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0c800000, 0x00000079, 0x00000000, 0x00000000, // zsub2_zsub3 }; static const uint32_t ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00008800, 0x40000000, 0x00000028, 0x00000000, 0x00000000, // zsub0_zsub1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00005000, 0x80000000, 0x00000054, 0x00000000, 0x00000000, // zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000029, 0x00000000, 0x00000000, // zsub2_zsub3 }; static const uint32_t ZPR2StridedSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00002800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000080, 0x00000000, // zsub0_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000080, 0x00000000, // zsub1_zsub3 }; static const uint32_t MPR64SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00001000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x0001c000, // zasubd0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x0001c000, // zasubd1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0001c000, // zasubs1_then_zasubd0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0001c000, // zasubs1_then_zasubd1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00018000, // zasubh1_then_zasubd0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00018000, // zasubh1_then_zasubd1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00018000, // zasubh1_then_zasubs1_then_zasubd0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00018000, // zasubh1_then_zasubs1_then_zasubd1 }; static const uint32_t ZPR2Strided_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00002000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x00000000, // zsub0_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x00000000, // zsub1_zsub3 }; static const uint32_t QQQSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x13074000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 0x00000000, 0x00000000, 0x00000000, 0xecf88000, 0x8fc2ffff, 0xffffffb3, 0x0000007f, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub_zsub2_then_zsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8fc20000, 0xffffffb3, 0x0000007f, 0x00000000, 0x00000000, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t ZPR3SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0xecf88000, 0x0000ffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8fc20000, 0xffffffb3, 0x0000007f, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8fc20000, 0xffffffb3, 0x0000007f, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t QQQ_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x11010000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10040000, 0x00000044, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x30080000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 0x00000000, 0x00000000, 0x00000000, 0xe4080000, 0x8040cf61, 0x7b1c0e90, 0x0000006c, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub_zsub2_then_zsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x82000000, 0xff7c3cb1, 0x0000007c, 0x00000000, 0x00000000, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t QQQ_with_qsub1_in_FPR128_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x13020000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x30080000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x60100000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 0x00000000, 0x00000000, 0x00000000, 0xac200000, 0x8200dfe7, 0xff7c3cb1, 0x0000007c, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub_zsub2_then_zsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0xfffcf4b3, 0x0000007d, 0x00000000, 0x00000000, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t QQQ_with_qsub2_in_FPR128_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x12040000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x60100000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40200000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 0x00000000, 0x00000000, 0x00000000, 0xa8800000, 0x0400fffe, 0xfffcf4b3, 0x0000007d, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub_zsub2_then_zsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0xfffbe4a2, 0x0000007f, 0x00000000, 0x00000000, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t ZPR3_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0xe4080000, 0x0000cf61, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80400000, 0x7b1c0e90, 0x0000006c, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x82000000, 0xff7c3cb1, 0x0000007c, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00100000, 0x0000a911, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800000, 0x50104900, 0x00000029, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0xa2461200, 0x00000056, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_zsub1_in_ZPR_4bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0xac200000, 0x0000dfe7, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x82000000, 0xff7c3cb1, 0x0000007c, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0xfffcf4b3, 0x0000007d, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_zsub1_zsub2_in_ZPR2Mul2SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x40400000, 0x00005444, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0xa2461200, 0x00000056, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800000, 0x50104900, 0x00000029, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_zsub2_in_ZPR_4bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0xa8800000, 0x0000fffe, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0xfffcf4b3, 0x0000007d, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0xfffbe4a2, 0x0000007f, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x11000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000044, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 0x00000000, 0x00000000, 0x00000000, 0xa4000000, 0x8000cf61, 0x7b1c0c90, 0x0000006c, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub_zsub2_then_zsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff7c34b1, 0x0000007c, 0x00000000, 0x00000000, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x12000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 0x00000000, 0x00000000, 0x00000000, 0xa8000000, 0x0000dfe6, 0xff7c34b1, 0x0000007c, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub_zsub2_then_zsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff8e4a2, 0x0000007d, 0x00000000, 0x00000000, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0xa4000000, 0x0000cf61, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x7b1c0c90, 0x0000006c, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff7c34b1, 0x0000007c, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0xa8000000, 0x0000dfe6, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff7c34b1, 0x0000007c, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff8e4a2, 0x0000007d, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000044, 0x00000000, 0x00000000, 0x00000000, // qsub0_qsub1_qsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, // qsub1_qsub2_qsub3 0x00000000, 0x00000000, 0x00000000, 0xa0000000, 0x0000cf60, 0x7b1c0490, 0x0000006c, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub_zsub2_then_zsub 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff7824a0, 0x0000007c, 0x00000000, 0x00000000, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0xa0000000, 0x0000cf60, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x7b1c0490, 0x0000006c, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff7824a0, 0x0000007c, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00004440, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22040200, 0x00000044, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x50100800, 0x00000028, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_zsub0_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x0000ce20, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x69080400, 0x0000006c, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xcd282000, 0x0000007c, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00008901, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x50100800, 0x00000028, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa2441000, 0x00000054, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_zsub1_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000daa2, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xcd282000, 0x0000007c, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8da08000, 0x0000007d, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00005444, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa2441000, 0x00000054, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x50104000, 0x00000029, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_zsub2_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000f288, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8da08000, 0x0000007d, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0c810000, 0x0000007b, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000a910, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x50104000, 0x00000029, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa2420000, 0x00000056, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000ca20, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x49080000, 0x0000006c, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8d200000, 0x0000007c, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00004440, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22040000, 0x00000044, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x50100000, 0x00000028, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000d280, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8d200000, 0x0000007c, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0c800000, 0x00000079, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00008900, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x50100000, 0x00000028, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa2400000, 0x00000054, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000c200, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x09000000, 0x0000006c, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0c000000, 0x00000078, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00004400, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000044, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000028, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00008800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000028, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000054, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00005000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000054, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000029, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0000a000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000029, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000052, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00004000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000044, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000028, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00008000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000028, 0x00000000, 0x00000000, // zsub0_zsub1_zsub2 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000050, 0x00000000, 0x00000000, // zsub1_zsub2_zsub3 }; static const uint32_t QQQQSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x703d0000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8fc20000, 0xffffffb3, 0x0000007f, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t ZPR4SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8fc20000, 0xffffffb3, 0x0000007f, 0x00000000, 0x00000000, }; static const uint32_t QQQQ_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10040000, 0x00000044, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80400000, 0x7b1c0e90, 0x0000006c, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t QQQQ_with_qsub1_in_FPR128_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x30080000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x82000000, 0xff7c3cb1, 0x0000007c, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t QQQQ_with_qsub2_in_FPR128_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x60100000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0xfffcf4b3, 0x0000007d, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t QQQQ_with_qsub3_in_FPR128_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40200000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0xfffbe4a2, 0x0000007f, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t ZPR4_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80400000, 0x7b1c0e90, 0x0000006c, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00800000, 0x50104900, 0x00000029, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0xa2461200, 0x00000056, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub1_in_ZPR_4bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x82000000, 0xff7c3cb1, 0x0000007c, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub2_in_ZPR_4bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0xfffcf4b3, 0x0000007d, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub3_in_ZPR_4bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0xfffbe4a2, 0x0000007f, 0x00000000, 0x00000000, }; static const uint32_t QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000044, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x7b1c0c90, 0x0000006c, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x0000004c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff7c34b1, 0x0000007c, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff8e4a2, 0x0000007d, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x7b1c0c90, 0x0000006c, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff7c34b1, 0x0000007c, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xfff8e4a2, 0x0000007d, 0x00000000, 0x00000000, }; static const uint32_t QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000044, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x7b1c0490, 0x0000006c, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000048, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff7824a0, 0x0000007c, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x7b1c0490, 0x0000006c, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xff7824a0, 0x0000007c, 0x00000000, 0x00000000, }; static const uint32_t QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x7b180480, 0x0000006c, 0x00000000, 0x00000000, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub }; static const uint32_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x7b180480, 0x0000006c, 0x00000000, 0x00000000, }; static const uint32_t ZPR4Mul4SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000100, 0x00000020, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22040200, 0x00000044, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub0_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x69080400, 0x0000006c, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x50100800, 0x00000028, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa2441000, 0x00000054, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub1_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xcd282000, 0x0000007c, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x50104000, 0x00000029, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub2_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8da08000, 0x0000007d, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub3_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0c810000, 0x0000007b, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa2420000, 0x00000056, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22040000, 0x00000044, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x49080000, 0x0000006c, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x50100000, 0x00000028, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x8d200000, 0x0000007c, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa2400000, 0x00000054, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0c800000, 0x00000079, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x09000000, 0x0000006c, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x22000000, 0x00000044, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0c000000, 0x00000078, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000068, 0x00000000, 0x00000000, }; static const uint32_t ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000020, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000044, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000028, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000054, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000029, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000052, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000044, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000028, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000050, 0x00000000, 0x00000000, }; static const uint32_t ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3bSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, 0x00000000, 0x00000000, }; static const uint32_t ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, 0x00000000, 0x00000000, }; static const uint32_t GPR64x8ClassSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffffff80, 0xf9ffff7f, 0x00001fff, }; static const uint32_t GPR64x8Class_with_x8sub_0_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf7087100, 0xf9ee6740, 0x00001fdf, }; static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x1b131200, 0xe9f93e5c, 0x00001f7f, }; static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x2d252400, 0xa9bfca65, 0x00001dff, }; static const uint32_t GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x4e464800, 0x99ddd56a, 0x000017ff, }; static const uint32_t GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x13001000, 0xe9e82640, 0x00001f5f, }; static const uint32_t GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x25002000, 0xa9ae4240, 0x00001ddf, }; static const uint32_t GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x46004000, 0x99cc4540, 0x000017df, }; static const uint32_t GPR64x8Class_with_x8sub_0_in_tcGPR64SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf0f88000, 0xf9ffff3f, 0x00000fff, }; static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x09010000, 0xa9b90a44, 0x00001d7f, }; static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0a020000, 0x89d91448, 0x0000177f, }; static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0c040000, 0x899dc060, 0x000015ff, }; static const uint32_t GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf0080000, 0xf9ee6700, 0x00000fdf, }; static const uint32_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10100000, 0xe9f93e1c, 0x00000f7f, }; static const uint32_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20200000, 0xa9bfca25, 0x00000dff, }; static const uint32_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40400000, 0x99ddd52a, 0x000007ff, }; static const uint32_t GPR64x8Class_with_x8sub_1_in_tcGPR64SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80800000, 0xf9f6b913, 0x00000fff, }; static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01000000, 0xa9a80240, 0x00001d5f, }; static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x89c80440, 0x0000175f, }; static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x898c4040, 0x000015df, }; static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x89990040, 0x0000157f, }; static const uint32_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0xe9e82600, 0x00000f5f, }; static const uint32_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0xa9ae4200, 0x00000ddf, }; static const uint32_t GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x99cc4500, 0x000007df, }; static const uint32_t GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0xf9e62100, 0x00000fdf, }; static const uint32_t GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa9b68801, 0x00000dff, }; static const uint32_t GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x99d49102, 0x000007ff, }; static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa9b90a04, 0x00000d7f, }; static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x89d91408, 0x0000077f, }; static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xe9f03810, 0x00000f7f, }; static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x899dc020, 0x000005ff, }; static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x89880040, 0x0000155f, }; static const uint32_t ZPR4StridedSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000080, 0x00000000, }; static const uint32_t GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x99c40100, 0x000007df, }; static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa9a80200, 0x00000d5f, }; static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x89c80400, 0x0000075f, }; static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa9b00800, 0x00000d7f, }; static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x89d01000, 0x0000077f, }; static const uint32_t GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xe9e02000, 0x00000f5f, }; static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x898c4000, 0x000005df, }; static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x89948000, 0x000005ff, }; static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x89990000, 0x0000057f, }; static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa9a60000, 0x00000ddf, }; static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x89840000, 0x000005df, }; static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x89880000, 0x0000055f, }; static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x89900000, 0x0000057f, }; static const uint32_t GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xa9a00000, 0x00000d5f, }; static const uint32_t GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x89c00000, 0x0000075f, }; static const uint32_t GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x89800000, 0x0000055f, }; static const uint32_t GPR64x8Class_with_sub_32_in_GPR32argSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x09000000, 0x0000054f, }; static const uint32_t MPR32SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x02000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0001c000, // zasubs0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x0001c000, // zasubs1 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00018000, // zasubh1_then_zasubs0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00018000, // zasubh1_then_zasubs1 }; static const uint32_t ZPR4Strided_with_dsub_in_FPR64_loSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x04000000, 0x00000000, }; static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64argSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x08000000, 0x00000546, }; static const uint32_t GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x10000000, 0x00000280, }; static const uint32_t GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x20000000, 0x00000810, }; static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x40000000, 0x00000a00, }; static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x80000000, 0x00000018, }; static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000049, }; static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64argSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000502, }; static const uint32_t GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000144, }; static const uint32_t GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000008, }; static const uint32_t GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000010, }; static const uint32_t GPR64x8Class_with_x8sub_0_in_rtcGPR64SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000020, }; static const uint32_t GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000040, }; static const uint32_t GPR64x8Class_with_x8sub_2_in_rtcGPR64SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000080, }; static const uint32_t GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000100, }; static const uint32_t GPR64x8Class_with_x8sub_4_in_rtcGPR64SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000200, }; static const uint32_t GPR64x8Class_with_x8sub_6_in_GPR64argSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000400, }; static const uint32_t GPR64x8Class_with_x8sub_6_in_rtcGPR64SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000800, }; static const uint32_t GPR64x8Class_with_x8sub_7_in_FIXED_REGSSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00001000, }; static const uint32_t ZTRSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00002000, }; static const uint32_t MPR16SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00004000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00018000, // zasubh0 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00018000, // zasubh1 }; static const uint32_t MPRSubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00008000, }; static const uint32_t MPR8SubClassMask[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00010000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00008000, // zasubb }; static const uint16_t SuperRegIdxSeqs[] = { /* 0 */ 8, 9, 0, /* 3 */ 15, 0, /* 5 */ 19, 27, 0, /* 8 */ 17, 19, 20, 21, 22, 23, 24, 25, 26, 27, 0, /* 19 */ 28, 0, /* 21 */ 31, 32, 0, /* 24 */ 38, 39, 40, 41, 0, /* 29 */ 35, 36, 55, 56, 0, /* 34 */ 29, 30, 45, 46, 51, 52, 59, 60, 0, /* 43 */ 33, 34, 43, 44, 47, 48, 49, 50, 53, 54, 57, 58, 61, 62, 63, 64, 0, /* 60 */ 15, 16, 18, 86, 87, 88, 89, 90, 91, 92, 93, 0, /* 72 */ 1, 65, 68, 71, 74, 78, 82, 94, 100, 106, 0, /* 83 */ 2, 3, 4, 5, 6, 75, 79, 83, 95, 101, 107, 0, /* 95 */ 7, 66, 69, 72, 76, 80, 84, 96, 102, 108, 0, /* 106 */ 14, 67, 70, 73, 77, 81, 85, 97, 103, 109, 0, /* 117 */ 10, 11, 12, 13, 37, 98, 104, 110, 0, /* 126 */ 129, 130, 131, 132, 0, /* 131 */ 128, 133, 134, 135, 136, 0, /* 137 */ 118, 139, 0, /* 140 */ 141, 0, /* 142 */ 144, 146, 0, /* 145 */ 143, 145, 147, 0, /* 149 */ 113, 115, 119, 126, 140, 149, 0, /* 156 */ 121, 123, 142, 151, 0, /* 161 */ 112, 114, 116, 117, 125, 127, 137, 148, 152, 0, /* 171 */ 120, 122, 124, 138, 150, 153, 0, /* 178 */ 154, 155, 0, }; static const TargetRegisterClass *const FPR16_loSuperclasses[] = { &AArch64::FPR16RegClass, nullptr }; static const TargetRegisterClass *const PPR_3bSuperclasses[] = { &AArch64::PPRRegClass, nullptr }; static const TargetRegisterClass *const PPR_p8to15Superclasses[] = { &AArch64::PPRRegClass, nullptr }; static const TargetRegisterClass *const PPR2Mul2Superclasses[] = { &AArch64::PPR2RegClass, nullptr }; static const TargetRegisterClass *const PPR2_with_psub0_in_PPR_3bSuperclasses[] = { &AArch64::PPR2RegClass, nullptr }; static const TargetRegisterClass *const PPR2_with_psub0_in_PPR_p8to15Superclasses[] = { &AArch64::PPR2RegClass, nullptr }; static const TargetRegisterClass *const PPR2_with_psub1_in_PPR_3bSuperclasses[] = { &AArch64::PPR2RegClass, nullptr }; static const TargetRegisterClass *const PPR2_with_psub1_in_PPR_p8to15Superclasses[] = { &AArch64::PPR2RegClass, nullptr }; static const TargetRegisterClass *const PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3bSuperclasses[] = { &AArch64::PPR2RegClass, &AArch64::PPR2_with_psub0_in_PPR_3bRegClass, &AArch64::PPR2_with_psub1_in_PPR_3bRegClass, nullptr }; static const TargetRegisterClass *const PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15Superclasses[] = { &AArch64::PPR2RegClass, &AArch64::PPR2_with_psub0_in_PPR_p8to15RegClass, &AArch64::PPR2_with_psub1_in_PPR_p8to15RegClass, nullptr }; static const TargetRegisterClass *const PPR2Mul2_and_PPR2_with_psub0_in_PPR_3bSuperclasses[] = { &AArch64::PPR2RegClass, &AArch64::PPR2Mul2RegClass, &AArch64::PPR2_with_psub0_in_PPR_3bRegClass, &AArch64::PPR2_with_psub1_in_PPR_3bRegClass, &AArch64::PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3bRegClass, nullptr }; static const TargetRegisterClass *const PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15Superclasses[] = { &AArch64::PPR2RegClass, &AArch64::PPR2Mul2RegClass, &AArch64::PPR2_with_psub0_in_PPR_p8to15RegClass, &AArch64::PPR2_with_psub1_in_PPR_p8to15RegClass, &AArch64::PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15RegClass, nullptr }; static const TargetRegisterClass *const PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15Superclasses[] = { &AArch64::PPR2RegClass, &AArch64::PPR2_with_psub0_in_PPR_3bRegClass, &AArch64::PPR2_with_psub1_in_PPR_p8to15RegClass, nullptr }; static const TargetRegisterClass *const PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3bSuperclasses[] = { &AArch64::PPR2RegClass, &AArch64::PPR2_with_psub0_in_PPR_p8to15RegClass, &AArch64::PPR2_with_psub1_in_PPR_3bRegClass, nullptr }; static const TargetRegisterClass *const GPR32Superclasses[] = { &AArch64::GPR32allRegClass, nullptr }; static const TargetRegisterClass *const GPR32spSuperclasses[] = { &AArch64::GPR32allRegClass, nullptr }; static const TargetRegisterClass *const GPR32commonSuperclasses[] = { &AArch64::GPR32allRegClass, &AArch64::GPR32RegClass, &AArch64::GPR32spRegClass, nullptr }; static const TargetRegisterClass *const FPR32_with_hsub_in_FPR16_loSuperclasses[] = { &AArch64::FPR32RegClass, nullptr }; static const TargetRegisterClass *const GPR32argSuperclasses[] = { &AArch64::GPR32allRegClass, &AArch64::GPR32RegClass, &AArch64::GPR32spRegClass, &AArch64::GPR32commonRegClass, nullptr }; static const TargetRegisterClass *const MatrixIndexGPR32_12_15Superclasses[] = { &AArch64::GPR32allRegClass, &AArch64::GPR32RegClass, &AArch64::GPR32spRegClass, &AArch64::GPR32commonRegClass, nullptr }; static const TargetRegisterClass *const MatrixIndexGPR32_8_11Superclasses[] = { &AArch64::GPR32allRegClass, &AArch64::GPR32RegClass, &AArch64::GPR32spRegClass, &AArch64::GPR32commonRegClass, nullptr }; static const TargetRegisterClass *const GPR32sponlySuperclasses[] = { &AArch64::GPR32allRegClass, &AArch64::GPR32spRegClass, nullptr }; static const TargetRegisterClass *const WSeqPairsClass_with_subo32_in_GPR32commonSuperclasses[] = { &AArch64::WSeqPairsClassRegClass, nullptr }; static const TargetRegisterClass *const WSeqPairsClass_with_sube32_in_GPR32argSuperclasses[] = { &AArch64::WSeqPairsClassRegClass, &AArch64::WSeqPairsClass_with_subo32_in_GPR32commonRegClass, nullptr }; static const TargetRegisterClass *const WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15Superclasses[] = { &AArch64::WSeqPairsClassRegClass, &AArch64::WSeqPairsClass_with_subo32_in_GPR32commonRegClass, nullptr }; static const TargetRegisterClass *const WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11Superclasses[] = { &AArch64::WSeqPairsClassRegClass, &AArch64::WSeqPairsClass_with_subo32_in_GPR32commonRegClass, nullptr }; static const TargetRegisterClass *const GPR64Superclasses[] = { &AArch64::GPR64allRegClass, nullptr }; static const TargetRegisterClass *const GPR64spSuperclasses[] = { &AArch64::GPR64allRegClass, nullptr }; static const TargetRegisterClass *const GPR64commonSuperclasses[] = { &AArch64::GPR64allRegClass, &AArch64::GPR64RegClass, &AArch64::GPR64spRegClass, nullptr }; static const TargetRegisterClass *const GPR64noipSuperclasses[] = { &AArch64::GPR64allRegClass, &AArch64::GPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64common_and_GPR64noipSuperclasses[] = { &AArch64::GPR64allRegClass, &AArch64::GPR64RegClass, &AArch64::GPR64spRegClass, &AArch64::GPR64commonRegClass, &AArch64::GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const tcGPR64Superclasses[] = { &AArch64::GPR64allRegClass, &AArch64::GPR64RegClass, &AArch64::GPR64spRegClass, &AArch64::GPR64commonRegClass, nullptr }; static const TargetRegisterClass *const GPR64noip_and_tcGPR64Superclasses[] = { &AArch64::GPR64allRegClass, &AArch64::GPR64RegClass, &AArch64::GPR64spRegClass, &AArch64::GPR64commonRegClass, &AArch64::GPR64noipRegClass, &AArch64::GPR64common_and_GPR64noipRegClass, &AArch64::tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const FPR64_loSuperclasses[] = { &AArch64::FPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64argSuperclasses[] = { &AArch64::GPR64allRegClass, &AArch64::GPR64RegClass, &AArch64::GPR64spRegClass, &AArch64::GPR64commonRegClass, &AArch64::GPR64noipRegClass, &AArch64::GPR64common_and_GPR64noipRegClass, &AArch64::tcGPR64RegClass, &AArch64::GPR64noip_and_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Superclasses[] = { &AArch64::GPR64allRegClass, &AArch64::GPR64RegClass, &AArch64::GPR64spRegClass, &AArch64::GPR64commonRegClass, &AArch64::GPR64noipRegClass, &AArch64::GPR64common_and_GPR64noipRegClass, &AArch64::tcGPR64RegClass, &AArch64::GPR64noip_and_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { &AArch64::GPR64allRegClass, &AArch64::GPR64RegClass, &AArch64::GPR64spRegClass, &AArch64::GPR64commonRegClass, &AArch64::GPR64noipRegClass, &AArch64::GPR64common_and_GPR64noipRegClass, &AArch64::tcGPR64RegClass, &AArch64::GPR64noip_and_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const FIXED_REGS_with_sub_32Superclasses[] = { &AArch64::GPR64allRegClass, &AArch64::GPR64spRegClass, &AArch64::FIXED_REGSRegClass, nullptr }; static const TargetRegisterClass *const rtcGPR64Superclasses[] = { &AArch64::GPR64allRegClass, &AArch64::GPR64RegClass, &AArch64::GPR64spRegClass, &AArch64::GPR64commonRegClass, &AArch64::tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const FIXED_REGS_and_GPR64Superclasses[] = { &AArch64::GPR64allRegClass, &AArch64::GPR64RegClass, &AArch64::GPR64spRegClass, &AArch64::GPR64commonRegClass, &AArch64::GPR64noipRegClass, &AArch64::GPR64common_and_GPR64noipRegClass, &AArch64::FIXED_REGSRegClass, &AArch64::FIXED_REGS_with_sub_32RegClass, nullptr }; static const TargetRegisterClass *const GPR64sponlySuperclasses[] = { &AArch64::GPR64allRegClass, &AArch64::GPR64spRegClass, &AArch64::FIXED_REGSRegClass, &AArch64::FIXED_REGS_with_sub_32RegClass, nullptr }; static const TargetRegisterClass *const DD_with_dsub0_in_FPR64_loSuperclasses[] = { &AArch64::DDRegClass, nullptr }; static const TargetRegisterClass *const DD_with_dsub1_in_FPR64_loSuperclasses[] = { &AArch64::DDRegClass, nullptr }; static const TargetRegisterClass *const DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loSuperclasses[] = { &AArch64::DDRegClass, &AArch64::DD_with_dsub0_in_FPR64_loRegClass, &AArch64::DD_with_dsub1_in_FPR64_loRegClass, nullptr }; static const TargetRegisterClass *const XSeqPairsClass_with_subo64_in_GPR64commonSuperclasses[] = { &AArch64::XSeqPairsClassRegClass, nullptr }; static const TargetRegisterClass *const XSeqPairsClass_with_subo64_in_GPR64noipSuperclasses[] = { &AArch64::XSeqPairsClassRegClass, nullptr }; static const TargetRegisterClass *const XSeqPairsClass_with_sube64_in_GPR64noipSuperclasses[] = { &AArch64::XSeqPairsClassRegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const XSeqPairsClass_with_sube64_in_tcGPR64Superclasses[] = { &AArch64::XSeqPairsClassRegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClass, nullptr }; static const TargetRegisterClass *const XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64Superclasses[] = { &AArch64::XSeqPairsClassRegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64noipRegClass, &AArch64::XSeqPairsClass_with_sube64_in_GPR64noipRegClass, &AArch64::XSeqPairsClass_with_sube64_in_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const XSeqPairsClass_with_subo64_in_tcGPR64Superclasses[] = { &AArch64::XSeqPairsClassRegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClass, &AArch64::XSeqPairsClass_with_sube64_in_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64Superclasses[] = { &AArch64::XSeqPairsClassRegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64noipRegClass, &AArch64::XSeqPairsClass_with_sube64_in_GPR64noipRegClass, &AArch64::XSeqPairsClass_with_sube64_in_tcGPR64RegClass, &AArch64::XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64RegClass, &AArch64::XSeqPairsClass_with_subo64_in_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const XSeqPairsClass_with_sub_32_in_GPR32argSuperclasses[] = { &AArch64::XSeqPairsClassRegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64noipRegClass, &AArch64::XSeqPairsClass_with_sube64_in_GPR64noipRegClass, &AArch64::XSeqPairsClass_with_sube64_in_tcGPR64RegClass, &AArch64::XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64RegClass, &AArch64::XSeqPairsClass_with_subo64_in_tcGPR64RegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15Superclasses[] = { &AArch64::XSeqPairsClassRegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64noipRegClass, &AArch64::XSeqPairsClass_with_sube64_in_GPR64noipRegClass, &AArch64::XSeqPairsClass_with_sube64_in_tcGPR64RegClass, &AArch64::XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64RegClass, &AArch64::XSeqPairsClass_with_subo64_in_tcGPR64RegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { &AArch64::XSeqPairsClassRegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64noipRegClass, &AArch64::XSeqPairsClass_with_sube64_in_GPR64noipRegClass, &AArch64::XSeqPairsClass_with_sube64_in_tcGPR64RegClass, &AArch64::XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64RegClass, &AArch64::XSeqPairsClass_with_subo64_in_tcGPR64RegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const XSeqPairsClass_with_sube64_in_rtcGPR64Superclasses[] = { &AArch64::XSeqPairsClassRegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClass, &AArch64::XSeqPairsClass_with_sube64_in_tcGPR64RegClass, &AArch64::XSeqPairsClass_with_subo64_in_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const XSeqPairsClass_with_subo64_in_FIXED_REGSSuperclasses[] = { &AArch64::XSeqPairsClassRegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64noipRegClass, &AArch64::XSeqPairsClass_with_sube64_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const FPR128_loSuperclasses[] = { &AArch64::FPR128RegClass, nullptr }; static const TargetRegisterClass *const ZPR_4bSuperclasses[] = { &AArch64::ZPRRegClass, nullptr }; static const TargetRegisterClass *const ZPR_3bSuperclasses[] = { &AArch64::ZPRRegClass, &AArch64::ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const DDD_with_dsub0_in_FPR64_loSuperclasses[] = { &AArch64::DDDRegClass, nullptr }; static const TargetRegisterClass *const DDD_with_dsub1_in_FPR64_loSuperclasses[] = { &AArch64::DDDRegClass, nullptr }; static const TargetRegisterClass *const DDD_with_dsub2_in_FPR64_loSuperclasses[] = { &AArch64::DDDRegClass, nullptr }; static const TargetRegisterClass *const DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loSuperclasses[] = { &AArch64::DDDRegClass, &AArch64::DDD_with_dsub0_in_FPR64_loRegClass, &AArch64::DDD_with_dsub1_in_FPR64_loRegClass, nullptr }; static const TargetRegisterClass *const DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loSuperclasses[] = { &AArch64::DDDRegClass, &AArch64::DDD_with_dsub1_in_FPR64_loRegClass, &AArch64::DDD_with_dsub2_in_FPR64_loRegClass, nullptr }; static const TargetRegisterClass *const DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loSuperclasses[] = { &AArch64::DDDRegClass, &AArch64::DDD_with_dsub0_in_FPR64_loRegClass, &AArch64::DDD_with_dsub1_in_FPR64_loRegClass, &AArch64::DDD_with_dsub2_in_FPR64_loRegClass, &AArch64::DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loRegClass, &AArch64::DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClass, nullptr }; static const TargetRegisterClass *const DDDD_with_dsub0_in_FPR64_loSuperclasses[] = { &AArch64::DDDDRegClass, nullptr }; static const TargetRegisterClass *const DDDD_with_dsub1_in_FPR64_loSuperclasses[] = { &AArch64::DDDDRegClass, nullptr }; static const TargetRegisterClass *const DDDD_with_dsub2_in_FPR64_loSuperclasses[] = { &AArch64::DDDDRegClass, nullptr }; static const TargetRegisterClass *const DDDD_with_dsub3_in_FPR64_loSuperclasses[] = { &AArch64::DDDDRegClass, nullptr }; static const TargetRegisterClass *const DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loSuperclasses[] = { &AArch64::DDDDRegClass, &AArch64::DDDD_with_dsub0_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub1_in_FPR64_loRegClass, nullptr }; static const TargetRegisterClass *const DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loSuperclasses[] = { &AArch64::DDDDRegClass, &AArch64::DDDD_with_dsub1_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub2_in_FPR64_loRegClass, nullptr }; static const TargetRegisterClass *const DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSuperclasses[] = { &AArch64::DDDDRegClass, &AArch64::DDDD_with_dsub2_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub3_in_FPR64_loRegClass, nullptr }; static const TargetRegisterClass *const DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loSuperclasses[] = { &AArch64::DDDDRegClass, &AArch64::DDDD_with_dsub0_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub1_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub2_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClass, nullptr }; static const TargetRegisterClass *const DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSuperclasses[] = { &AArch64::DDDDRegClass, &AArch64::DDDD_with_dsub1_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub2_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub3_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass, nullptr }; static const TargetRegisterClass *const DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSuperclasses[] = { &AArch64::DDDDRegClass, &AArch64::DDDD_with_dsub0_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub1_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub2_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub3_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass, nullptr }; static const TargetRegisterClass *const QQ_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::QQRegClass, nullptr }; static const TargetRegisterClass *const QQ_with_qsub1_in_FPR128_loSuperclasses[] = { &AArch64::QQRegClass, nullptr }; static const TargetRegisterClass *const ZPR2Mul2Superclasses[] = { &AArch64::ZPR2RegClass, nullptr }; static const TargetRegisterClass *const ZPR2_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::ZPR2RegClass, nullptr }; static const TargetRegisterClass *const ZPR2_with_zsub1_in_ZPR_4bSuperclasses[] = { &AArch64::ZPR2RegClass, nullptr }; static const TargetRegisterClass *const QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_loSuperclasses[] = { &AArch64::QQRegClass, &AArch64::QQ_with_dsub_in_FPR64_loRegClass, &AArch64::QQ_with_qsub1_in_FPR128_loRegClass, nullptr }; static const TargetRegisterClass *const ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4bSuperclasses[] = { &AArch64::ZPR2RegClass, &AArch64::ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR2_with_zsub1_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::ZPR2RegClass, &AArch64::ZPR2Mul2RegClass, &AArch64::ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR2_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR2_with_zsub0_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR2RegClass, &AArch64::ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR2_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR2_with_zsub1_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR2RegClass, &AArch64::ZPR2_with_zsub1_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR2RegClass, &AArch64::ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR2_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR2_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR2_with_zsub1_in_ZPR_3bRegClass, nullptr }; static const TargetRegisterClass *const ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR2RegClass, &AArch64::ZPR2Mul2RegClass, &AArch64::ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR2_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR2_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR2_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3bRegClass, nullptr }; static const TargetRegisterClass *const ZPR2Strided_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::ZPR2StridedRegClass, nullptr }; static const TargetRegisterClass *const QQQ_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::QQQRegClass, nullptr }; static const TargetRegisterClass *const QQQ_with_qsub1_in_FPR128_loSuperclasses[] = { &AArch64::QQQRegClass, nullptr }; static const TargetRegisterClass *const QQQ_with_qsub2_in_FPR128_loSuperclasses[] = { &AArch64::QQQRegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::ZPR3RegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Superclasses[] = { &AArch64::ZPR3RegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_zsub1_in_ZPR_4bSuperclasses[] = { &AArch64::ZPR3RegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Superclasses[] = { &AArch64::ZPR3RegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_zsub2_in_ZPR_4bSuperclasses[] = { &AArch64::ZPR3RegClass, nullptr }; static const TargetRegisterClass *const QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_loSuperclasses[] = { &AArch64::QQQRegClass, &AArch64::QQQ_with_dsub_in_FPR64_loRegClass, &AArch64::QQQ_with_qsub1_in_FPR128_loRegClass, nullptr }; static const TargetRegisterClass *const QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loSuperclasses[] = { &AArch64::QQQRegClass, &AArch64::QQQ_with_qsub1_in_FPR128_loRegClass, &AArch64::QQQ_with_qsub2_in_FPR128_loRegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bSuperclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bSuperclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_loSuperclasses[] = { &AArch64::QQQRegClass, &AArch64::QQQ_with_dsub_in_FPR64_loRegClass, &AArch64::QQQ_with_qsub1_in_FPR128_loRegClass, &AArch64::QQQ_with_qsub2_in_FPR128_loRegClass, &AArch64::QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_loRegClass, &AArch64::QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loRegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bSuperclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Superclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_zsub0_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_zsub1_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_zsub2_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Superclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_3bRegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_3bRegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3bRegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Superclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3bRegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Superclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, nullptr }; static const TargetRegisterClass *const ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::ZPR3RegClass, &AArch64::ZPR3_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, nullptr }; static const TargetRegisterClass *const QQQQ_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::QQQQRegClass, nullptr }; static const TargetRegisterClass *const QQQQ_with_qsub1_in_FPR128_loSuperclasses[] = { &AArch64::QQQQRegClass, nullptr }; static const TargetRegisterClass *const QQQQ_with_qsub2_in_FPR128_loSuperclasses[] = { &AArch64::QQQQRegClass, nullptr }; static const TargetRegisterClass *const QQQQ_with_qsub3_in_FPR128_loSuperclasses[] = { &AArch64::QQQQRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::ZPR4RegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub0_zsub1_in_ZPR2Mul2Superclasses[] = { &AArch64::ZPR4RegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Superclasses[] = { &AArch64::ZPR4RegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub1_in_ZPR_4bSuperclasses[] = { &AArch64::ZPR4RegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub2_in_ZPR_4bSuperclasses[] = { &AArch64::ZPR4RegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub3_in_ZPR_4bSuperclasses[] = { &AArch64::ZPR4RegClass, nullptr }; static const TargetRegisterClass *const QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_loSuperclasses[] = { &AArch64::QQQQRegClass, &AArch64::QQQQ_with_dsub_in_FPR64_loRegClass, &AArch64::QQQQ_with_qsub1_in_FPR128_loRegClass, nullptr }; static const TargetRegisterClass *const QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loSuperclasses[] = { &AArch64::QQQQRegClass, &AArch64::QQQQ_with_qsub1_in_FPR128_loRegClass, &AArch64::QQQQ_with_qsub2_in_FPR128_loRegClass, nullptr }; static const TargetRegisterClass *const QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loSuperclasses[] = { &AArch64::QQQQRegClass, &AArch64::QQQQ_with_qsub2_in_FPR128_loRegClass, &AArch64::QQQQ_with_qsub3_in_FPR128_loRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_loSuperclasses[] = { &AArch64::QQQQRegClass, &AArch64::QQQQ_with_dsub_in_FPR64_loRegClass, &AArch64::QQQQ_with_qsub1_in_FPR128_loRegClass, &AArch64::QQQQ_with_qsub2_in_FPR128_loRegClass, &AArch64::QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_loRegClass, &AArch64::QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClass, nullptr }; static const TargetRegisterClass *const QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loSuperclasses[] = { &AArch64::QQQQRegClass, &AArch64::QQQQ_with_qsub1_in_FPR128_loRegClass, &AArch64::QQQQ_with_qsub2_in_FPR128_loRegClass, &AArch64::QQQQ_with_qsub3_in_FPR128_loRegClass, &AArch64::QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClass, &AArch64::QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_loSuperclasses[] = { &AArch64::QQQQRegClass, &AArch64::QQQQ_with_dsub_in_FPR64_loRegClass, &AArch64::QQQQ_with_qsub1_in_FPR128_loRegClass, &AArch64::QQQQ_with_qsub2_in_FPR128_loRegClass, &AArch64::QQQQ_with_qsub3_in_FPR128_loRegClass, &AArch64::QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_loRegClass, &AArch64::QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClass, &AArch64::QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClass, &AArch64::QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClass, &AArch64::QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4Mul4Superclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Superclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub0_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub1_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub2_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub3_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Superclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Superclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_3bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Superclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4Mul4RegClass, &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Superclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Superclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Superclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, nullptr }; static const TargetRegisterClass *const ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3bSuperclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4Mul4RegClass, &AArch64::ZPR4_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, nullptr }; static const TargetRegisterClass *const ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Superclasses[] = { &AArch64::ZPR4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_0_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_2_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_0_in_tcGPR64Superclasses[] = { &AArch64::GPR64x8ClassRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_1_in_tcGPR64Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_sub_32_in_GPR32argSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const ZPR4Strided_with_dsub_in_FPR64_loSuperclasses[] = { &AArch64::ZPR4StridedRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_2_in_GPR64argSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_4_in_GPR64argSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64argRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64argRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_0_in_rtcGPR64Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64argRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_2_in_rtcGPR64Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64argRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64argRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_4_in_rtcGPR64Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_6_in_GPR64argSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64argRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64argRegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_6_in_rtcGPR64Superclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass, nullptr }; static const TargetRegisterClass *const GPR64x8Class_with_x8sub_7_in_FIXED_REGSSuperclasses[] = { &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, nullptr }; static inline unsigned GPR32AltOrderSelect(const MachineFunction &MF) { return 1; } static ArrayRef GPR32GetRawAllocationOrder(const MachineFunction &MF) { static const MCPhysReg AltOrder1[] = { AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WZR, AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7 }; const MCRegisterClass &MCR = AArch64MCRegisterClasses[AArch64::GPR32RegClassID]; const ArrayRef Order[] = { ArrayRef(MCR.begin(), MCR.getNumRegs()), ArrayRef(AltOrder1) }; const unsigned Select = GPR32AltOrderSelect(MF); assert(Select < 2); return Order[Select]; } static inline unsigned GPR32spAltOrderSelect(const MachineFunction &MF) { return 1; } static ArrayRef GPR32spGetRawAllocationOrder(const MachineFunction &MF) { static const MCPhysReg AltOrder1[] = { AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WSP, AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7 }; const MCRegisterClass &MCR = AArch64MCRegisterClasses[AArch64::GPR32spRegClassID]; const ArrayRef Order[] = { ArrayRef(MCR.begin(), MCR.getNumRegs()), ArrayRef(AltOrder1) }; const unsigned Select = GPR32spAltOrderSelect(MF); assert(Select < 2); return Order[Select]; } static inline unsigned GPR32commonAltOrderSelect(const MachineFunction &MF) { return 1; } static ArrayRef GPR32commonGetRawAllocationOrder(const MachineFunction &MF) { static const MCPhysReg AltOrder1[] = { AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7 }; const MCRegisterClass &MCR = AArch64MCRegisterClasses[AArch64::GPR32commonRegClassID]; const ArrayRef Order[] = { ArrayRef(MCR.begin(), MCR.getNumRegs()), ArrayRef(AltOrder1) }; const unsigned Select = GPR32commonAltOrderSelect(MF); assert(Select < 2); return Order[Select]; } static inline unsigned GPR64AltOrderSelect(const MachineFunction &MF) { return 1; } static ArrayRef GPR64GetRawAllocationOrder(const MachineFunction &MF) { static const MCPhysReg AltOrder1[] = { AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::XZR, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7 }; const MCRegisterClass &MCR = AArch64MCRegisterClasses[AArch64::GPR64RegClassID]; const ArrayRef Order[] = { ArrayRef(MCR.begin(), MCR.getNumRegs()), ArrayRef(AltOrder1) }; const unsigned Select = GPR64AltOrderSelect(MF); assert(Select < 2); return Order[Select]; } static inline unsigned GPR64spAltOrderSelect(const MachineFunction &MF) { return 1; } static ArrayRef GPR64spGetRawAllocationOrder(const MachineFunction &MF) { static const MCPhysReg AltOrder1[] = { AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::SP, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7 }; const MCRegisterClass &MCR = AArch64MCRegisterClasses[AArch64::GPR64spRegClassID]; const ArrayRef Order[] = { ArrayRef(MCR.begin(), MCR.getNumRegs()), ArrayRef(AltOrder1) }; const unsigned Select = GPR64spAltOrderSelect(MF); assert(Select < 2); return Order[Select]; } static inline unsigned GPR64commonAltOrderSelect(const MachineFunction &MF) { return 1; } static ArrayRef GPR64commonGetRawAllocationOrder(const MachineFunction &MF) { static const MCPhysReg AltOrder1[] = { AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7 }; const MCRegisterClass &MCR = AArch64MCRegisterClasses[AArch64::GPR64commonRegClassID]; const ArrayRef Order[] = { ArrayRef(MCR.begin(), MCR.getNumRegs()), ArrayRef(AltOrder1) }; const unsigned Select = GPR64commonAltOrderSelect(MF); assert(Select < 2); return Order[Select]; } namespace AArch64 { // Register class instances extern const TargetRegisterClass FPR8RegClass = { &AArch64MCRegisterClasses[FPR8RegClassID], FPR8SubClassMask, SuperRegIdxSeqs + 72, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass FPR16RegClass = { &AArch64MCRegisterClasses[FPR16RegClassID], FPR16SubClassMask, SuperRegIdxSeqs + 95, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass FPR16_loRegClass = { &AArch64MCRegisterClasses[FPR16_loRegClassID], FPR16_loSubClassMask, SuperRegIdxSeqs + 95, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ FPR16_loSuperclasses, nullptr }; extern const TargetRegisterClass PPRRegClass = { &AArch64MCRegisterClasses[PPRRegClassID], PPRSubClassMask, SuperRegIdxSeqs + 0, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass PPR_3bRegClass = { &AArch64MCRegisterClasses[PPR_3bRegClassID], PPR_3bSubClassMask, SuperRegIdxSeqs + 0, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ PPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass PPR_p8to15RegClass = { &AArch64MCRegisterClasses[PPR_p8to15RegClassID], PPR_p8to15SubClassMask, SuperRegIdxSeqs + 0, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ PPR_p8to15Superclasses, nullptr }; extern const TargetRegisterClass PPR2RegClass = { &AArch64MCRegisterClasses[PPR2RegClassID], PPR2SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000000000006), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass PPR2Mul2RegClass = { &AArch64MCRegisterClasses[PPR2Mul2RegClassID], PPR2Mul2SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000000000006), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ PPR2Mul2Superclasses, nullptr }; extern const TargetRegisterClass PPR2_with_psub0_in_PPR_3bRegClass = { &AArch64MCRegisterClasses[PPR2_with_psub0_in_PPR_3bRegClassID], PPR2_with_psub0_in_PPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000000000006), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ PPR2_with_psub0_in_PPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass PPR2_with_psub0_in_PPR_p8to15RegClass = { &AArch64MCRegisterClasses[PPR2_with_psub0_in_PPR_p8to15RegClassID], PPR2_with_psub0_in_PPR_p8to15SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000000000006), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ PPR2_with_psub0_in_PPR_p8to15Superclasses, nullptr }; extern const TargetRegisterClass PPR2_with_psub1_in_PPR_3bRegClass = { &AArch64MCRegisterClasses[PPR2_with_psub1_in_PPR_3bRegClassID], PPR2_with_psub1_in_PPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000000000006), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ PPR2_with_psub1_in_PPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass PPR2_with_psub1_in_PPR_p8to15RegClass = { &AArch64MCRegisterClasses[PPR2_with_psub1_in_PPR_p8to15RegClassID], PPR2_with_psub1_in_PPR_p8to15SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000000000006), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ PPR2_with_psub1_in_PPR_p8to15Superclasses, nullptr }; extern const TargetRegisterClass PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3bRegClass = { &AArch64MCRegisterClasses[PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3bRegClassID], PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000000000006), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15RegClass = { &AArch64MCRegisterClasses[PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15RegClassID], PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000000000006), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15Superclasses, nullptr }; extern const TargetRegisterClass PPR2Mul2_and_PPR2_with_psub0_in_PPR_3bRegClass = { &AArch64MCRegisterClasses[PPR2Mul2_and_PPR2_with_psub0_in_PPR_3bRegClassID], PPR2Mul2_and_PPR2_with_psub0_in_PPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000000000006), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ PPR2Mul2_and_PPR2_with_psub0_in_PPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15RegClass = { &AArch64MCRegisterClasses[PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15RegClassID], PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000000000006), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15Superclasses, nullptr }; extern const TargetRegisterClass PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15RegClass = { &AArch64MCRegisterClasses[PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15RegClassID], PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000000000006), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15Superclasses, nullptr }; extern const TargetRegisterClass PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3bRegClass = { &AArch64MCRegisterClasses[PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3bRegClassID], PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000000000006), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass GPR32allRegClass = { &AArch64MCRegisterClasses[GPR32allRegClassID], GPR32allSubClassMask, SuperRegIdxSeqs + 60, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass FPR32RegClass = { &AArch64MCRegisterClasses[FPR32RegClassID], FPR32SubClassMask, SuperRegIdxSeqs + 106, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass GPR32RegClass = { &AArch64MCRegisterClasses[GPR32RegClassID], GPR32SubClassMask, SuperRegIdxSeqs + 60, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ GPR32Superclasses, GPR32GetRawAllocationOrder }; extern const TargetRegisterClass GPR32spRegClass = { &AArch64MCRegisterClasses[GPR32spRegClassID], GPR32spSubClassMask, SuperRegIdxSeqs + 60, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ GPR32spSuperclasses, GPR32spGetRawAllocationOrder }; extern const TargetRegisterClass GPR32commonRegClass = { &AArch64MCRegisterClasses[GPR32commonRegClassID], GPR32commonSubClassMask, SuperRegIdxSeqs + 60, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ GPR32commonSuperclasses, GPR32commonGetRawAllocationOrder }; extern const TargetRegisterClass FPR32_with_hsub_in_FPR16_loRegClass = { &AArch64MCRegisterClasses[FPR32_with_hsub_in_FPR16_loRegClassID], FPR32_with_hsub_in_FPR16_loSubClassMask, SuperRegIdxSeqs + 106, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ FPR32_with_hsub_in_FPR16_loSuperclasses, nullptr }; extern const TargetRegisterClass GPR32argRegClass = { &AArch64MCRegisterClasses[GPR32argRegClassID], GPR32argSubClassMask, SuperRegIdxSeqs + 60, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ GPR32argSuperclasses, nullptr }; extern const TargetRegisterClass MatrixIndexGPR32_12_15RegClass = { &AArch64MCRegisterClasses[MatrixIndexGPR32_12_15RegClassID], MatrixIndexGPR32_12_15SubClassMask, SuperRegIdxSeqs + 60, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ MatrixIndexGPR32_12_15Superclasses, nullptr }; extern const TargetRegisterClass MatrixIndexGPR32_8_11RegClass = { &AArch64MCRegisterClasses[MatrixIndexGPR32_8_11RegClassID], MatrixIndexGPR32_8_11SubClassMask, SuperRegIdxSeqs + 60, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ MatrixIndexGPR32_8_11Superclasses, nullptr }; extern const TargetRegisterClass CCRRegClass = { &AArch64MCRegisterClasses[CCRRegClassID], CCRSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass GPR32sponlyRegClass = { &AArch64MCRegisterClasses[GPR32sponlyRegClassID], GPR32sponlySubClassMask, SuperRegIdxSeqs + 3, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ GPR32sponlySuperclasses, nullptr }; extern const TargetRegisterClass WSeqPairsClassRegClass = { &AArch64MCRegisterClasses[WSeqPairsClassRegClassID], WSeqPairsClassSubClassMask, SuperRegIdxSeqs + 131, LaneBitmask(0x0000000000000030), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass WSeqPairsClass_with_subo32_in_GPR32commonRegClass = { &AArch64MCRegisterClasses[WSeqPairsClass_with_subo32_in_GPR32commonRegClassID], WSeqPairsClass_with_subo32_in_GPR32commonSubClassMask, SuperRegIdxSeqs + 131, LaneBitmask(0x0000000000000030), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ WSeqPairsClass_with_subo32_in_GPR32commonSuperclasses, nullptr }; extern const TargetRegisterClass WSeqPairsClass_with_sube32_in_GPR32argRegClass = { &AArch64MCRegisterClasses[WSeqPairsClass_with_sube32_in_GPR32argRegClassID], WSeqPairsClass_with_sube32_in_GPR32argSubClassMask, SuperRegIdxSeqs + 131, LaneBitmask(0x0000000000000030), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ WSeqPairsClass_with_sube32_in_GPR32argSuperclasses, nullptr }; extern const TargetRegisterClass WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15RegClass = { &AArch64MCRegisterClasses[WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15RegClassID], WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15SubClassMask, SuperRegIdxSeqs + 131, LaneBitmask(0x0000000000000030), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15Superclasses, nullptr }; extern const TargetRegisterClass WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11RegClass = { &AArch64MCRegisterClasses[WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11RegClassID], WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11SubClassMask, SuperRegIdxSeqs + 131, LaneBitmask(0x0000000000000030), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11Superclasses, nullptr }; extern const TargetRegisterClass GPR64allRegClass = { &AArch64MCRegisterClasses[GPR64allRegClassID], GPR64allSubClassMask, SuperRegIdxSeqs + 8, LaneBitmask(0x0000000000000008), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass FPR64RegClass = { &AArch64MCRegisterClasses[FPR64RegClassID], FPR64SubClassMask, SuperRegIdxSeqs + 83, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass GPR64RegClass = { &AArch64MCRegisterClasses[GPR64RegClassID], GPR64SubClassMask, SuperRegIdxSeqs + 8, LaneBitmask(0x0000000000000008), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ GPR64Superclasses, GPR64GetRawAllocationOrder }; extern const TargetRegisterClass GPR64spRegClass = { &AArch64MCRegisterClasses[GPR64spRegClassID], GPR64spSubClassMask, SuperRegIdxSeqs + 8, LaneBitmask(0x0000000000000008), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ GPR64spSuperclasses, GPR64spGetRawAllocationOrder }; extern const TargetRegisterClass GPR64commonRegClass = { &AArch64MCRegisterClasses[GPR64commonRegClassID], GPR64commonSubClassMask, SuperRegIdxSeqs + 8, LaneBitmask(0x0000000000000008), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ GPR64commonSuperclasses, GPR64commonGetRawAllocationOrder }; extern const TargetRegisterClass GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64noipRegClassID], GPR64noipSubClassMask, SuperRegIdxSeqs + 8, LaneBitmask(0x0000000000000008), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64common_and_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64common_and_GPR64noipRegClassID], GPR64common_and_GPR64noipSubClassMask, SuperRegIdxSeqs + 8, LaneBitmask(0x0000000000000008), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ GPR64common_and_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass tcGPR64RegClass = { &AArch64MCRegisterClasses[tcGPR64RegClassID], tcGPR64SubClassMask, SuperRegIdxSeqs + 8, LaneBitmask(0x0000000000000008), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ tcGPR64Superclasses, nullptr }; extern const TargetRegisterClass GPR64noip_and_tcGPR64RegClass = { &AArch64MCRegisterClasses[GPR64noip_and_tcGPR64RegClassID], GPR64noip_and_tcGPR64SubClassMask, SuperRegIdxSeqs + 8, LaneBitmask(0x0000000000000008), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ GPR64noip_and_tcGPR64Superclasses, nullptr }; extern const TargetRegisterClass FPR64_loRegClass = { &AArch64MCRegisterClasses[FPR64_loRegClassID], FPR64_loSubClassMask, SuperRegIdxSeqs + 83, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass GPR64argRegClass = { &AArch64MCRegisterClasses[GPR64argRegClassID], GPR64argSubClassMask, SuperRegIdxSeqs + 8, LaneBitmask(0x0000000000000008), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ GPR64argSuperclasses, nullptr }; extern const TargetRegisterClass FIXED_REGSRegClass = { &AArch64MCRegisterClasses[FIXED_REGSRegClassID], FIXED_REGSSubClassMask, SuperRegIdxSeqs + 5, LaneBitmask(0x0000000000000008), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass = { &AArch64MCRegisterClasses[GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID], GPR64_with_sub_32_in_MatrixIndexGPR32_12_15SubClassMask, SuperRegIdxSeqs + 8, LaneBitmask(0x0000000000000008), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Superclasses, nullptr }; extern const TargetRegisterClass GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { &AArch64MCRegisterClasses[GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, SuperRegIdxSeqs + 8, LaneBitmask(0x0000000000000008), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, nullptr }; extern const TargetRegisterClass FIXED_REGS_with_sub_32RegClass = { &AArch64MCRegisterClasses[FIXED_REGS_with_sub_32RegClassID], FIXED_REGS_with_sub_32SubClassMask, SuperRegIdxSeqs + 5, LaneBitmask(0x0000000000000008), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ FIXED_REGS_with_sub_32Superclasses, nullptr }; extern const TargetRegisterClass rtcGPR64RegClass = { &AArch64MCRegisterClasses[rtcGPR64RegClassID], rtcGPR64SubClassMask, SuperRegIdxSeqs + 8, LaneBitmask(0x0000000000000008), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ rtcGPR64Superclasses, nullptr }; extern const TargetRegisterClass FIXED_REGS_and_GPR64RegClass = { &AArch64MCRegisterClasses[FIXED_REGS_and_GPR64RegClassID], FIXED_REGS_and_GPR64SubClassMask, SuperRegIdxSeqs + 5, LaneBitmask(0x0000000000000008), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ FIXED_REGS_and_GPR64Superclasses, nullptr }; extern const TargetRegisterClass GPR64sponlyRegClass = { &AArch64MCRegisterClasses[GPR64sponlyRegClassID], GPR64sponlySubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000000000008), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ GPR64sponlySuperclasses, nullptr }; extern const TargetRegisterClass DDRegClass = { &AArch64MCRegisterClasses[DDRegClassID], DDSubClassMask, SuperRegIdxSeqs + 161, LaneBitmask(0x0000000000800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass DD_with_dsub0_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[DD_with_dsub0_in_FPR64_loRegClassID], DD_with_dsub0_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 161, LaneBitmask(0x0000000000800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ DD_with_dsub0_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass DD_with_dsub1_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[DD_with_dsub1_in_FPR64_loRegClassID], DD_with_dsub1_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 161, LaneBitmask(0x0000000000800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ DD_with_dsub1_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass XSeqPairsClassRegClass = { &AArch64MCRegisterClasses[XSeqPairsClassRegClassID], XSeqPairsClassSubClassMask, SuperRegIdxSeqs + 126, LaneBitmask(0x0000001000000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loRegClassID], DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 161, LaneBitmask(0x0000000000800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_GPR64commonRegClass = { &AArch64MCRegisterClasses[XSeqPairsClass_with_subo64_in_GPR64commonRegClassID], XSeqPairsClass_with_subo64_in_GPR64commonSubClassMask, SuperRegIdxSeqs + 126, LaneBitmask(0x0000001000000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ XSeqPairsClass_with_subo64_in_GPR64commonSuperclasses, nullptr }; extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[XSeqPairsClass_with_subo64_in_GPR64noipRegClassID], XSeqPairsClass_with_subo64_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 126, LaneBitmask(0x0000001000000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ XSeqPairsClass_with_subo64_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[XSeqPairsClass_with_sube64_in_GPR64noipRegClassID], XSeqPairsClass_with_sube64_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 126, LaneBitmask(0x0000001000000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ XSeqPairsClass_with_sube64_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_tcGPR64RegClass = { &AArch64MCRegisterClasses[XSeqPairsClass_with_sube64_in_tcGPR64RegClassID], XSeqPairsClass_with_sube64_in_tcGPR64SubClassMask, SuperRegIdxSeqs + 126, LaneBitmask(0x0000001000000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ XSeqPairsClass_with_sube64_in_tcGPR64Superclasses, nullptr }; extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64RegClass = { &AArch64MCRegisterClasses[XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64RegClassID], XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64SubClassMask, SuperRegIdxSeqs + 126, LaneBitmask(0x0000001000000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64Superclasses, nullptr }; extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_tcGPR64RegClass = { &AArch64MCRegisterClasses[XSeqPairsClass_with_subo64_in_tcGPR64RegClassID], XSeqPairsClass_with_subo64_in_tcGPR64SubClassMask, SuperRegIdxSeqs + 126, LaneBitmask(0x0000001000000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ XSeqPairsClass_with_subo64_in_tcGPR64Superclasses, nullptr }; extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64RegClass = { &AArch64MCRegisterClasses[XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64RegClassID], XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64SubClassMask, SuperRegIdxSeqs + 126, LaneBitmask(0x0000001000000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64Superclasses, nullptr }; extern const TargetRegisterClass XSeqPairsClass_with_sub_32_in_GPR32argRegClass = { &AArch64MCRegisterClasses[XSeqPairsClass_with_sub_32_in_GPR32argRegClassID], XSeqPairsClass_with_sub_32_in_GPR32argSubClassMask, SuperRegIdxSeqs + 126, LaneBitmask(0x0000001000000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ XSeqPairsClass_with_sub_32_in_GPR32argSuperclasses, nullptr }; extern const TargetRegisterClass XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15RegClass = { &AArch64MCRegisterClasses[XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID], XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15SubClassMask, SuperRegIdxSeqs + 126, LaneBitmask(0x0000001000000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15Superclasses, nullptr }; extern const TargetRegisterClass XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { &AArch64MCRegisterClasses[XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, SuperRegIdxSeqs + 126, LaneBitmask(0x0000001000000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, nullptr }; extern const TargetRegisterClass XSeqPairsClass_with_sube64_in_rtcGPR64RegClass = { &AArch64MCRegisterClasses[XSeqPairsClass_with_sube64_in_rtcGPR64RegClassID], XSeqPairsClass_with_sube64_in_rtcGPR64SubClassMask, SuperRegIdxSeqs + 126, LaneBitmask(0x0000001000000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ XSeqPairsClass_with_sube64_in_rtcGPR64Superclasses, nullptr }; extern const TargetRegisterClass XSeqPairsClass_with_subo64_in_FIXED_REGSRegClass = { &AArch64MCRegisterClasses[XSeqPairsClass_with_subo64_in_FIXED_REGSRegClassID], XSeqPairsClass_with_subo64_in_FIXED_REGSSubClassMask, SuperRegIdxSeqs + 129, LaneBitmask(0x0000001000000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ XSeqPairsClass_with_subo64_in_FIXED_REGSSuperclasses, nullptr }; extern const TargetRegisterClass FPR128RegClass = { &AArch64MCRegisterClasses[FPR128RegClassID], FPR128SubClassMask, SuperRegIdxSeqs + 117, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass ZPRRegClass = { &AArch64MCRegisterClasses[ZPRRegClassID], ZPRSubClassMask, SuperRegIdxSeqs + 24, LaneBitmask(0x0000000000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass FPR128_loRegClass = { &AArch64MCRegisterClasses[FPR128_loRegClassID], FPR128_loSubClassMask, SuperRegIdxSeqs + 117, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ FPR128_loSuperclasses, nullptr }; extern const TargetRegisterClass MPR128RegClass = { &AArch64MCRegisterClasses[MPR128RegClassID], MPR128SubClassMask, SuperRegIdxSeqs + 43, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass ZPR_4bRegClass = { &AArch64MCRegisterClasses[ZPR_4bRegClassID], ZPR_4bSubClassMask, SuperRegIdxSeqs + 24, LaneBitmask(0x0000000000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ ZPR_4bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR_3bRegClassID], ZPR_3bSubClassMask, SuperRegIdxSeqs + 24, LaneBitmask(0x0000000000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass DDDRegClass = { &AArch64MCRegisterClasses[DDDRegClassID], DDDSubClassMask, SuperRegIdxSeqs + 149, LaneBitmask(0x0000000002800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass DDD_with_dsub0_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[DDD_with_dsub0_in_FPR64_loRegClassID], DDD_with_dsub0_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 149, LaneBitmask(0x0000000002800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ DDD_with_dsub0_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass DDD_with_dsub1_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[DDD_with_dsub1_in_FPR64_loRegClassID], DDD_with_dsub1_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 149, LaneBitmask(0x0000000002800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ DDD_with_dsub1_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass DDD_with_dsub2_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[DDD_with_dsub2_in_FPR64_loRegClassID], DDD_with_dsub2_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 149, LaneBitmask(0x0000000002800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ DDD_with_dsub2_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loRegClassID], DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 149, LaneBitmask(0x0000000002800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClassID], DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 149, LaneBitmask(0x0000000002800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClassID], DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 149, LaneBitmask(0x0000000002800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass DDDDRegClass = { &AArch64MCRegisterClasses[DDDDRegClassID], DDDDSubClassMask, SuperRegIdxSeqs + 137, LaneBitmask(0x0000000003800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass DDDD_with_dsub0_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[DDDD_with_dsub0_in_FPR64_loRegClassID], DDDD_with_dsub0_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 137, LaneBitmask(0x0000000003800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ DDDD_with_dsub0_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass DDDD_with_dsub1_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[DDDD_with_dsub1_in_FPR64_loRegClassID], DDDD_with_dsub1_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 137, LaneBitmask(0x0000000003800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ DDDD_with_dsub1_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass DDDD_with_dsub2_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[DDDD_with_dsub2_in_FPR64_loRegClassID], DDDD_with_dsub2_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 137, LaneBitmask(0x0000000003800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ DDDD_with_dsub2_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass DDDD_with_dsub3_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[DDDD_with_dsub3_in_FPR64_loRegClassID], DDDD_with_dsub3_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 137, LaneBitmask(0x0000000003800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ DDDD_with_dsub3_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loRegClassID], DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 137, LaneBitmask(0x0000000003800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClassID], DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 137, LaneBitmask(0x0000000003800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID], DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 137, LaneBitmask(0x0000000003800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClassID], DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 137, LaneBitmask(0x0000000003800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID], DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 137, LaneBitmask(0x0000000003800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClassID], DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 137, LaneBitmask(0x0000000003800001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass QQRegClass = { &AArch64MCRegisterClasses[QQRegClassID], QQSubClassMask, SuperRegIdxSeqs + 171, LaneBitmask(0x0000000004000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass ZPR2RegClass = { &AArch64MCRegisterClasses[ZPR2RegClassID], ZPR2SubClassMask, SuperRegIdxSeqs + 145, LaneBitmask(0x0000006000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass QQ_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[QQ_with_dsub_in_FPR64_loRegClassID], QQ_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 171, LaneBitmask(0x0000000004000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ QQ_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass QQ_with_qsub1_in_FPR128_loRegClass = { &AArch64MCRegisterClasses[QQ_with_qsub1_in_FPR128_loRegClassID], QQ_with_qsub1_in_FPR128_loSubClassMask, SuperRegIdxSeqs + 171, LaneBitmask(0x0000000004000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ QQ_with_qsub1_in_FPR128_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR2Mul2RegClass = { &AArch64MCRegisterClasses[ZPR2Mul2RegClassID], ZPR2Mul2SubClassMask, SuperRegIdxSeqs + 145, LaneBitmask(0x0000006000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR2Mul2Superclasses, nullptr }; extern const TargetRegisterClass ZPR2_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[ZPR2_with_dsub_in_FPR64_loRegClassID], ZPR2_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 145, LaneBitmask(0x0000006000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR2_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPR_4bRegClass = { &AArch64MCRegisterClasses[ZPR2_with_zsub1_in_ZPR_4bRegClassID], ZPR2_with_zsub1_in_ZPR_4bSubClassMask, SuperRegIdxSeqs + 145, LaneBitmask(0x0000006000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR2_with_zsub1_in_ZPR_4bSuperclasses, nullptr }; extern const TargetRegisterClass QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_loRegClass = { &AArch64MCRegisterClasses[QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_loRegClassID], QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_loSubClassMask, SuperRegIdxSeqs + 171, LaneBitmask(0x0000000004000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4bRegClass = { &AArch64MCRegisterClasses[ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4bRegClassID], ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4bSubClassMask, SuperRegIdxSeqs + 145, LaneBitmask(0x0000006000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID], ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 145, LaneBitmask(0x0000006000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR2_with_zsub0_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR2_with_zsub0_in_ZPR_3bRegClassID], ZPR2_with_zsub0_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 145, LaneBitmask(0x0000006000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR2_with_zsub0_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR2_with_zsub1_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR2_with_zsub1_in_ZPR_3bRegClassID], ZPR2_with_zsub1_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 145, LaneBitmask(0x0000006000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR2_with_zsub1_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3bRegClassID], ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 145, LaneBitmask(0x0000006000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID], ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 145, LaneBitmask(0x0000006000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR2StridedRegClass = { &AArch64MCRegisterClasses[ZPR2StridedRegClassID], ZPR2StridedSubClassMask, SuperRegIdxSeqs + 178, LaneBitmask(0x0000006000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass MPR64RegClass = { &AArch64MCRegisterClasses[MPR64RegClassID], MPR64SubClassMask, SuperRegIdxSeqs + 34, LaneBitmask(0x00000000000000C0), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass ZPR2Strided_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[ZPR2Strided_with_dsub_in_FPR64_loRegClassID], ZPR2Strided_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 178, LaneBitmask(0x0000006000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR2Strided_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass QQQRegClass = { &AArch64MCRegisterClasses[QQQRegClassID], QQQSubClassMask, SuperRegIdxSeqs + 156, LaneBitmask(0x0000000014000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass ZPR3RegClass = { &AArch64MCRegisterClasses[ZPR3RegClassID], ZPR3SubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass QQQ_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[QQQ_with_dsub_in_FPR64_loRegClassID], QQQ_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 156, LaneBitmask(0x0000000014000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ QQQ_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass QQQ_with_qsub1_in_FPR128_loRegClass = { &AArch64MCRegisterClasses[QQQ_with_qsub1_in_FPR128_loRegClassID], QQQ_with_qsub1_in_FPR128_loSubClassMask, SuperRegIdxSeqs + 156, LaneBitmask(0x0000000014000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ QQQ_with_qsub1_in_FPR128_loSuperclasses, nullptr }; extern const TargetRegisterClass QQQ_with_qsub2_in_FPR128_loRegClass = { &AArch64MCRegisterClasses[QQQ_with_qsub2_in_FPR128_loRegClassID], QQQ_with_qsub2_in_FPR128_loSubClassMask, SuperRegIdxSeqs + 156, LaneBitmask(0x0000000014000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ QQQ_with_qsub2_in_FPR128_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[ZPR3_with_dsub_in_FPR64_loRegClassID], ZPR3_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass = { &AArch64MCRegisterClasses[ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID], ZPR3_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Superclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPR_4bRegClass = { &AArch64MCRegisterClasses[ZPR3_with_zsub1_in_ZPR_4bRegClassID], ZPR3_with_zsub1_in_ZPR_4bSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_zsub1_in_ZPR_4bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass = { &AArch64MCRegisterClasses[ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID], ZPR3_with_zsub1_zsub2_in_ZPR2Mul2SubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Superclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPR_4bRegClass = { &AArch64MCRegisterClasses[ZPR3_with_zsub2_in_ZPR_4bRegClassID], ZPR3_with_zsub2_in_ZPR_4bSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_zsub2_in_ZPR_4bSuperclasses, nullptr }; extern const TargetRegisterClass QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_loRegClass = { &AArch64MCRegisterClasses[QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_loRegClassID], QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_loSubClassMask, SuperRegIdxSeqs + 156, LaneBitmask(0x0000000014000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_loSuperclasses, nullptr }; extern const TargetRegisterClass QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loRegClass = { &AArch64MCRegisterClasses[QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loRegClassID], QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loSubClassMask, SuperRegIdxSeqs + 156, LaneBitmask(0x0000000014000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bRegClass = { &AArch64MCRegisterClasses[ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bRegClassID], ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClass = { &AArch64MCRegisterClasses[ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClassID], ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bSuperclasses, nullptr }; extern const TargetRegisterClass QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_loRegClass = { &AArch64MCRegisterClasses[QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_loRegClassID], QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_loSubClassMask, SuperRegIdxSeqs + 156, LaneBitmask(0x0000000014000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bRegClass = { &AArch64MCRegisterClasses[ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bRegClassID], ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass = { &AArch64MCRegisterClasses[ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID], ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2SubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Superclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR3_with_zsub0_in_ZPR_3bRegClassID], ZPR3_with_zsub0_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_zsub0_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID], ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR3_with_zsub1_in_ZPR_3bRegClassID], ZPR3_with_zsub1_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_zsub1_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID], ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR3_with_zsub2_in_ZPR_3bRegClassID], ZPR3_with_zsub2_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_zsub2_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass = { &AArch64MCRegisterClasses[ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID], ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Superclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3bRegClassID], ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID], ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3bRegClassID], ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID], ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3bRegClassID], ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass = { &AArch64MCRegisterClasses[ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID], ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2SubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Superclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID], ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID], ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass = { &AArch64MCRegisterClasses[ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID], ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Superclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID], ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID], ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 142, LaneBitmask(0x0000066000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass QQQQRegClass = { &AArch64MCRegisterClasses[QQQQRegClassID], QQQQSubClassMask, SuperRegIdxSeqs + 140, LaneBitmask(0x000000001C000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass ZPR4RegClass = { &AArch64MCRegisterClasses[ZPR4RegClassID], ZPR4SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass QQQQ_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[QQQQ_with_dsub_in_FPR64_loRegClassID], QQQQ_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 140, LaneBitmask(0x000000001C000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ QQQQ_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass QQQQ_with_qsub1_in_FPR128_loRegClass = { &AArch64MCRegisterClasses[QQQQ_with_qsub1_in_FPR128_loRegClassID], QQQQ_with_qsub1_in_FPR128_loSubClassMask, SuperRegIdxSeqs + 140, LaneBitmask(0x000000001C000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ QQQQ_with_qsub1_in_FPR128_loSuperclasses, nullptr }; extern const TargetRegisterClass QQQQ_with_qsub2_in_FPR128_loRegClass = { &AArch64MCRegisterClasses[QQQQ_with_qsub2_in_FPR128_loRegClassID], QQQQ_with_qsub2_in_FPR128_loSubClassMask, SuperRegIdxSeqs + 140, LaneBitmask(0x000000001C000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ QQQQ_with_qsub2_in_FPR128_loSuperclasses, nullptr }; extern const TargetRegisterClass QQQQ_with_qsub3_in_FPR128_loRegClass = { &AArch64MCRegisterClasses[QQQQ_with_qsub3_in_FPR128_loRegClassID], QQQQ_with_qsub3_in_FPR128_loSubClassMask, SuperRegIdxSeqs + 140, LaneBitmask(0x000000001C000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ QQQQ_with_qsub3_in_FPR128_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[ZPR4_with_dsub_in_FPR64_loRegClassID], ZPR4_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClassID], ZPR4_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub0_zsub1_in_ZPR2Mul2Superclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID], ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Superclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_4bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPR_4bRegClassID], ZPR4_with_zsub1_in_ZPR_4bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub1_in_ZPR_4bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPR_4bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub2_in_ZPR_4bRegClassID], ZPR4_with_zsub2_in_ZPR_4bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub2_in_ZPR_4bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPR_4bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub3_in_ZPR_4bRegClassID], ZPR4_with_zsub3_in_ZPR_4bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub3_in_ZPR_4bSuperclasses, nullptr }; extern const TargetRegisterClass QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_loRegClass = { &AArch64MCRegisterClasses[QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_loRegClassID], QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_loSubClassMask, SuperRegIdxSeqs + 140, LaneBitmask(0x000000001C000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_loSuperclasses, nullptr }; extern const TargetRegisterClass QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClass = { &AArch64MCRegisterClasses[QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClassID], QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loSubClassMask, SuperRegIdxSeqs + 140, LaneBitmask(0x000000001C000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loSuperclasses, nullptr }; extern const TargetRegisterClass QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClass = { &AArch64MCRegisterClasses[QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID], QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loSubClassMask, SuperRegIdxSeqs + 140, LaneBitmask(0x000000001C000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClassID], ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClassID], ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClassID], ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bSuperclasses, nullptr }; extern const TargetRegisterClass QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClass = { &AArch64MCRegisterClasses[QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClassID], QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_loSubClassMask, SuperRegIdxSeqs + 140, LaneBitmask(0x000000001C000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_loSuperclasses, nullptr }; extern const TargetRegisterClass QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClass = { &AArch64MCRegisterClasses[QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID], QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loSubClassMask, SuperRegIdxSeqs + 140, LaneBitmask(0x000000001C000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClassID], ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClassID], ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bSuperclasses, nullptr }; extern const TargetRegisterClass QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClass = { &AArch64MCRegisterClasses[QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClassID], QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_loSubClassMask, SuperRegIdxSeqs + 140, LaneBitmask(0x000000001C000001), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bRegClassID], ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4Mul4RegClass = { &AArch64MCRegisterClasses[ZPR4Mul4RegClassID], ZPR4Mul4SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4Mul4Superclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass = { &AArch64MCRegisterClasses[ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID], ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Superclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub0_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub0_in_ZPR_3bRegClassID], ZPR4_with_zsub0_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub0_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID], ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID], ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPR_3bRegClassID], ZPR4_with_zsub1_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub1_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID], ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub2_in_ZPR_3bRegClassID], ZPR4_with_zsub2_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub2_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub3_in_ZPR_3bRegClassID], ZPR4_with_zsub3_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub3_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID], ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Superclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID], ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bRegClassID], ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClassID], ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bRegClassID], ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID], ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Superclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClassID], ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3bRegClassID], ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass = { &AArch64MCRegisterClasses[ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID], ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Superclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClassID], ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3bRegClassID], ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_loRegClassID], ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass = { &AArch64MCRegisterClasses[ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID], ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Superclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID], ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID], ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID], ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClassID], ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2Superclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID], ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClassID], ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass = { &AArch64MCRegisterClasses[ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID], ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Superclasses, nullptr }; extern const TargetRegisterClass ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3bRegClass = { &AArch64MCRegisterClasses[ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3bRegClassID], ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3bSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3bSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass = { &AArch64MCRegisterClasses[ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClassID], ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8ClassRegClass = { &AArch64MCRegisterClasses[GPR64x8ClassRegClassID], GPR64x8ClassSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_0_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_0_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_2_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_2_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_tcGPR64RegClassID], GPR64x8Class_with_x8sub_0_in_tcGPR64SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_0_in_tcGPR64Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClassID], GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_1_in_tcGPR64RegClassID], GPR64x8Class_with_x8sub_1_in_tcGPR64SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_1_in_tcGPR64Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClassID], GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClassID], GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass ZPR4StridedRegClass = { &AArch64MCRegisterClasses[ZPR4StridedRegClassID], ZPR4StridedSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClassID], GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClassID], GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClassID], GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClassID], GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64RegClassID], GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64RegClassID], GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_GPR32argRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_sub_32_in_GPR32argRegClassID], GPR64x8Class_with_sub_32_in_GPR32argSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_sub_32_in_GPR32argSuperclasses, nullptr }; extern const TargetRegisterClass MPR32RegClass = { &AArch64MCRegisterClasses[MPR32RegClassID], MPR32SubClassMask, SuperRegIdxSeqs + 29, LaneBitmask(0x00000000000006C0), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass ZPR4Strided_with_dsub_in_FPR64_loRegClass = { &AArch64MCRegisterClasses[ZPR4Strided_with_dsub_in_FPR64_loRegClassID], ZPR4Strided_with_dsub_in_FPR64_loSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x000007E000000101), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ ZPR4Strided_with_dsub_in_FPR64_loSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64argRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64argRegClassID], GPR64x8Class_with_x8sub_2_in_GPR64argSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_2_in_GPR64argSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID], GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClassID], GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64argRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64argRegClassID], GPR64x8Class_with_x8sub_4_in_GPR64argSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_4_in_GPR64argSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_0_in_rtcGPR64RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_0_in_rtcGPR64RegClassID], GPR64x8Class_with_x8sub_0_in_rtcGPR64SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_0_in_rtcGPR64Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_2_in_rtcGPR64RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_2_in_rtcGPR64RegClassID], GPR64x8Class_with_x8sub_2_in_rtcGPR64SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_2_in_rtcGPR64Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClassID], GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_4_in_rtcGPR64RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_4_in_rtcGPR64RegClassID], GPR64x8Class_with_x8sub_4_in_rtcGPR64SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_4_in_rtcGPR64Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_GPR64argRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_6_in_GPR64argRegClassID], GPR64x8Class_with_x8sub_6_in_GPR64argSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_6_in_GPR64argSuperclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_6_in_rtcGPR64RegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_6_in_rtcGPR64RegClassID], GPR64x8Class_with_x8sub_6_in_rtcGPR64SubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_6_in_rtcGPR64Superclasses, nullptr }; extern const TargetRegisterClass GPR64x8Class_with_x8sub_7_in_FIXED_REGSRegClass = { &AArch64MCRegisterClasses[GPR64x8Class_with_x8sub_7_in_FIXED_REGSRegClassID], GPR64x8Class_with_x8sub_7_in_FIXED_REGSSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000FE0000008), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ true, /* CoveredBySubRegs */ GPR64x8Class_with_x8sub_7_in_FIXED_REGSSuperclasses, nullptr }; extern const TargetRegisterClass ZTRRegClass = { &AArch64MCRegisterClasses[ZTRRegClassID], ZTRSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x0000000000000001), 0, false, 0x00, /* TSFlags */ false, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass MPR16RegClass = { &AArch64MCRegisterClasses[MPR16RegClassID], MPR16SubClassMask, SuperRegIdxSeqs + 21, LaneBitmask(0x0000000000007EC0), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass MPRRegClass = { &AArch64MCRegisterClasses[MPRRegClassID], MPRSubClassMask, SuperRegIdxSeqs + 2, LaneBitmask(0x00000000007FFEC0), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ NullRegClasses, nullptr }; extern const TargetRegisterClass MPR8RegClass = { &AArch64MCRegisterClasses[MPR8RegClassID], MPR8SubClassMask, SuperRegIdxSeqs + 19, LaneBitmask(0x00000000007FFEC0), 0, false, 0x00, /* TSFlags */ true, /* HasDisjunctSubRegs */ false, /* CoveredBySubRegs */ NullRegClasses, nullptr }; } // end namespace AArch64 namespace { const TargetRegisterClass *const RegisterClasses[] = { &AArch64::FPR8RegClass, &AArch64::FPR16RegClass, &AArch64::FPR16_loRegClass, &AArch64::PPRRegClass, &AArch64::PPR_3bRegClass, &AArch64::PPR_p8to15RegClass, &AArch64::PPR2RegClass, &AArch64::PPR2Mul2RegClass, &AArch64::PPR2_with_psub0_in_PPR_3bRegClass, &AArch64::PPR2_with_psub0_in_PPR_p8to15RegClass, &AArch64::PPR2_with_psub1_in_PPR_3bRegClass, &AArch64::PPR2_with_psub1_in_PPR_p8to15RegClass, &AArch64::PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3bRegClass, &AArch64::PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15RegClass, &AArch64::PPR2Mul2_and_PPR2_with_psub0_in_PPR_3bRegClass, &AArch64::PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15RegClass, &AArch64::PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15RegClass, &AArch64::PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3bRegClass, &AArch64::GPR32allRegClass, &AArch64::FPR32RegClass, &AArch64::GPR32RegClass, &AArch64::GPR32spRegClass, &AArch64::GPR32commonRegClass, &AArch64::FPR32_with_hsub_in_FPR16_loRegClass, &AArch64::GPR32argRegClass, &AArch64::MatrixIndexGPR32_12_15RegClass, &AArch64::MatrixIndexGPR32_8_11RegClass, &AArch64::CCRRegClass, &AArch64::GPR32sponlyRegClass, &AArch64::WSeqPairsClassRegClass, &AArch64::WSeqPairsClass_with_subo32_in_GPR32commonRegClass, &AArch64::WSeqPairsClass_with_sube32_in_GPR32argRegClass, &AArch64::WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15RegClass, &AArch64::WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11RegClass, &AArch64::GPR64allRegClass, &AArch64::FPR64RegClass, &AArch64::GPR64RegClass, &AArch64::GPR64spRegClass, &AArch64::GPR64commonRegClass, &AArch64::GPR64noipRegClass, &AArch64::GPR64common_and_GPR64noipRegClass, &AArch64::tcGPR64RegClass, &AArch64::GPR64noip_and_tcGPR64RegClass, &AArch64::FPR64_loRegClass, &AArch64::GPR64argRegClass, &AArch64::FIXED_REGSRegClass, &AArch64::GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass, &AArch64::GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, &AArch64::FIXED_REGS_with_sub_32RegClass, &AArch64::rtcGPR64RegClass, &AArch64::FIXED_REGS_and_GPR64RegClass, &AArch64::GPR64sponlyRegClass, &AArch64::DDRegClass, &AArch64::DD_with_dsub0_in_FPR64_loRegClass, &AArch64::DD_with_dsub1_in_FPR64_loRegClass, &AArch64::XSeqPairsClassRegClass, &AArch64::DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_loRegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64commonRegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64noipRegClass, &AArch64::XSeqPairsClass_with_sube64_in_GPR64noipRegClass, &AArch64::XSeqPairsClass_with_sube64_in_tcGPR64RegClass, &AArch64::XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64RegClass, &AArch64::XSeqPairsClass_with_subo64_in_tcGPR64RegClass, &AArch64::XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64RegClass, &AArch64::XSeqPairsClass_with_sub_32_in_GPR32argRegClass, &AArch64::XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15RegClass, &AArch64::XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, &AArch64::XSeqPairsClass_with_sube64_in_rtcGPR64RegClass, &AArch64::XSeqPairsClass_with_subo64_in_FIXED_REGSRegClass, &AArch64::FPR128RegClass, &AArch64::ZPRRegClass, &AArch64::FPR128_loRegClass, &AArch64::MPR128RegClass, &AArch64::ZPR_4bRegClass, &AArch64::ZPR_3bRegClass, &AArch64::DDDRegClass, &AArch64::DDD_with_dsub0_in_FPR64_loRegClass, &AArch64::DDD_with_dsub1_in_FPR64_loRegClass, &AArch64::DDD_with_dsub2_in_FPR64_loRegClass, &AArch64::DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_loRegClass, &AArch64::DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClass, &AArch64::DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_loRegClass, &AArch64::DDDDRegClass, &AArch64::DDDD_with_dsub0_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub1_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub2_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub3_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass, &AArch64::DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_loRegClass, &AArch64::QQRegClass, &AArch64::ZPR2RegClass, &AArch64::QQ_with_dsub_in_FPR64_loRegClass, &AArch64::QQ_with_qsub1_in_FPR128_loRegClass, &AArch64::ZPR2Mul2RegClass, &AArch64::ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR2_with_zsub1_in_ZPR_4bRegClass, &AArch64::QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_loRegClass, &AArch64::ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR2_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR2_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR2StridedRegClass, &AArch64::MPR64RegClass, &AArch64::ZPR2Strided_with_dsub_in_FPR64_loRegClass, &AArch64::QQQRegClass, &AArch64::ZPR3RegClass, &AArch64::QQQ_with_dsub_in_FPR64_loRegClass, &AArch64::QQQ_with_qsub1_in_FPR128_loRegClass, &AArch64::QQQ_with_qsub2_in_FPR128_loRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_loRegClass, &AArch64::QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_loRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_loRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::QQQQRegClass, &AArch64::ZPR4RegClass, &AArch64::QQQQ_with_dsub_in_FPR64_loRegClass, &AArch64::QQQQ_with_qsub1_in_FPR128_loRegClass, &AArch64::QQQQ_with_qsub2_in_FPR128_loRegClass, &AArch64::QQQQ_with_qsub3_in_FPR128_loRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_loRegClass, &AArch64::QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClass, &AArch64::QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_loRegClass, &AArch64::QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_loRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4bRegClass, &AArch64::ZPR4Mul4RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3bRegClass, &AArch64::ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_loRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2RegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3bRegClass, &AArch64::ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2RegClass, &AArch64::GPR64x8ClassRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::ZPR4StridedRegClass, &AArch64::GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noipRegClass, &AArch64::GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64RegClass, &AArch64::GPR64x8Class_with_sub_32_in_GPR32argRegClass, &AArch64::MPR32RegClass, &AArch64::ZPR4Strided_with_dsub_in_FPR64_loRegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64argRegClass, &AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15RegClass, &AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64argRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, &AArch64::GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, &AArch64::GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, &AArch64::GPR64x8Class_with_x8sub_0_in_rtcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, &AArch64::GPR64x8Class_with_x8sub_2_in_rtcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11RegClass, &AArch64::GPR64x8Class_with_x8sub_4_in_rtcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_GPR64argRegClass, &AArch64::GPR64x8Class_with_x8sub_6_in_rtcGPR64RegClass, &AArch64::GPR64x8Class_with_x8sub_7_in_FIXED_REGSRegClass, &AArch64::ZTRRegClass, &AArch64::MPR16RegClass, &AArch64::MPRRegClass, &AArch64::MPR8RegClass, }; } // end anonymous namespace static const uint8_t CostPerUseTable[] = { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }; static const bool InAllocatableClassTable[] = { false, true, true, false, true, false, true, true, true, true, true, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, false, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, true, }; static const TargetRegisterInfoDesc AArch64RegInfoDesc = { // Extra Descriptors CostPerUseTable, 1, InAllocatableClassTable}; unsigned AArch64GenRegisterInfo::composeSubRegIndicesImpl(unsigned IdxA, unsigned IdxB) const { static const uint8_t RowMap[155] = { 0, 0, 0, 1, 2, 3, 0, 0, 0, 0, 4, 5, 6, 0, 0, 0, 0, 0, 1, 0, 2, 3, 4, 5, 6, 7, 8, 0, 0, 1, 0, 2, 0, 0, 0, 3, 0, 0, 7, 8, 9, 0, 0, 0, 3, 4, 0, 0, 0, 0, 2, 5, 0, 0, 2, 6, 0, 0, 6, 7, 0, 0, 0, 0, 0, 1, 1, 0, 3, 3, 0, 2, 2, 0, 4, 4, 4, 0, 6, 6, 6, 0, 5, 5, 5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 7, 7, 7, 7, 0, 0, 9, 9, 9, 9, 0, 0, 8, 8, 8, 8, 0, 0, 0, 1, 1, 2, 10, 10, 10, 0, 0, 4, 4, 5, 4, 4, 5, 0, 0, 3, 5, 7, 1, 2, 3, 4, 11, 10, 11, 11, 10, 10, 0, 0, 7, 7, 8, 7, 7, 7, 7, 8, 8, 10, 12, }; static const uint8_t Rows[13][155] = { { AArch64::bsub, AArch64::dsub, AArch64::dsub0, AArch64::dsub1, AArch64::dsub2, 0, AArch64::hsub, 0, 0, AArch64::qsub0, AArch64::qsub1, AArch64::qsub2, 0, AArch64::ssub, AArch64::sub_32, AArch64::sub_32, AArch64::x8sub_0, AArch64::x8sub_1_then_sub_32, AArch64::x8sub_1, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd0, AArch64::zasubd1, AArch64::zasubh0, AArch64::zasubh1, AArch64::zasubq0, AArch64::zasubq1, AArch64::zasubs0, AArch64::zasubs1, AArch64::zsub, AArch64::zsub0, AArch64::zsub1, AArch64::zsub2, 0, AArch64::zsub_hi, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, AArch64::dsub1_then_bsub, AArch64::dsub1_then_hsub, AArch64::dsub1_then_ssub, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_hsub, AArch64::dsub2_then_ssub, AArch64::qsub1_then_bsub, AArch64::qsub1_then_dsub, AArch64::qsub1_then_hsub, AArch64::qsub1_then_ssub, 0, 0, 0, 0, AArch64::qsub2_then_bsub, AArch64::qsub2_then_dsub, AArch64::qsub2_then_hsub, AArch64::qsub2_then_ssub, 0, 0, 0, 0, 0, 0, 0, AArch64::x8sub_1_then_sub_32, AArch64::zsub1_then_bsub, AArch64::zsub1_then_dsub, AArch64::zsub1_then_hsub, AArch64::zsub1_then_ssub, AArch64::zsub1_then_zsub, AArch64::zsub1_then_zsub_hi, 0, 0, 0, 0, 0, 0, AArch64::zsub2_then_bsub, AArch64::zsub2_then_dsub, AArch64::zsub2_then_hsub, AArch64::zsub2_then_ssub, AArch64::zsub2_then_zsub, AArch64::zsub2_then_zsub_hi, AArch64::dsub0_dsub1, 0, AArch64::dsub1_dsub2, 0, 0, AArch64::dsub_qsub1_then_dsub, 0, AArch64::dsub_qsub1_then_dsub_qsub2_then_dsub, AArch64::qsub0_qsub1, 0, AArch64::qsub1_qsub2, 0, 0, AArch64::qsub1_then_dsub_qsub2_then_dsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::sub_32_x8sub_1_then_sub_32, AArch64::dsub_zsub1_then_dsub, AArch64::zsub_zsub1_then_zsub, 0, AArch64::dsub_zsub1_then_dsub_zsub2_then_dsub, 0, AArch64::zsub_zsub1_then_zsub_zsub2_then_zsub, AArch64::zsub0_zsub1, 0, AArch64::zsub1_zsub2, 0, 0, AArch64::zsub1_then_dsub_zsub2_then_dsub, 0, AArch64::zsub1_then_zsub_zsub2_then_zsub, 0, 0, 0, 0, 0, }, { AArch64::dsub1_then_bsub, 0, AArch64::dsub1, AArch64::dsub2, AArch64::dsub3, 0, AArch64::dsub1_then_hsub, 0, 0, 0, 0, 0, 0, AArch64::dsub1_then_ssub, AArch64::subo64_then_sub_32, AArch64::x8sub_6_then_sub_32, 0, AArch64::x8sub_7_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubd1_then_zasubq0, AArch64::zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_bsub, AArch64::dsub2_then_hsub, AArch64::dsub2_then_ssub, 0, 0, 0, AArch64::dsub3_then_bsub, AArch64::dsub3_then_hsub, AArch64::dsub3_then_ssub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub1_dsub2, 0, AArch64::dsub2_dsub3, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, { AArch64::dsub2_then_bsub, 0, AArch64::dsub2, AArch64::dsub3, 0, 0, AArch64::dsub2_then_hsub, 0, 0, 0, 0, 0, 0, AArch64::dsub2_then_ssub, AArch64::x8sub_1_then_sub_32, AArch64::x8sub_4_then_sub_32, 0, AArch64::x8sub_5_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubh1_then_zasubd0, AArch64::zasubh1_then_zasubd1, 0, 0, AArch64::zasubh1_then_zasubq0, AArch64::zasubh1_then_zasubq1, AArch64::zasubh1_then_zasubs0, AArch64::zasubh1_then_zasubs1, 0, 0, 0, 0, 0, 0, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub3_then_bsub, AArch64::dsub3_then_hsub, AArch64::dsub3_then_ssub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, { AArch64::dsub3_then_bsub, 0, 0, 0, 0, 0, AArch64::dsub3_then_hsub, 0, 0, 0, 0, 0, 0, AArch64::dsub3_then_ssub, AArch64::x8sub_2_then_sub_32, AArch64::x8sub_2_then_sub_32, AArch64::x8sub_2, AArch64::x8sub_3_then_sub_32, AArch64::x8sub_3, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubs1_then_zasubd0, AArch64::zasubs1_then_zasubd1, 0, 0, AArch64::zasubs1_then_zasubq0, AArch64::zasubs1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::x8sub_3_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::x8sub_2_then_sub_32_x8sub_3_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, { AArch64::qsub1_then_bsub, AArch64::qsub1_then_dsub, AArch64::qsub1_then_dsub, AArch64::qsub2_then_dsub, AArch64::qsub3_then_dsub, 0, AArch64::qsub1_then_hsub, 0, 0, AArch64::qsub1, AArch64::qsub2, AArch64::qsub3, 0, AArch64::qsub1_then_ssub, AArch64::x8sub_3_then_sub_32, AArch64::sub_32, 0, AArch64::subo64_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub2_then_bsub, AArch64::qsub2_then_hsub, AArch64::qsub2_then_ssub, 0, 0, 0, AArch64::qsub3_then_bsub, AArch64::qsub3_then_hsub, AArch64::qsub3_then_ssub, AArch64::qsub2_then_bsub, AArch64::qsub2_then_dsub, AArch64::qsub2_then_hsub, AArch64::qsub2_then_ssub, 0, 0, 0, 0, AArch64::qsub3_then_bsub, AArch64::qsub3_then_dsub, AArch64::qsub3_then_hsub, AArch64::qsub3_then_ssub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub1_then_dsub_qsub2_then_dsub, 0, AArch64::qsub2_then_dsub_qsub3_then_dsub, 0, 0, AArch64::qsub1_then_dsub_qsub2_then_dsub, 0, AArch64::qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub, AArch64::qsub1_qsub2, 0, AArch64::qsub2_qsub3, 0, 0, AArch64::qsub2_then_dsub_qsub3_then_dsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, { AArch64::qsub2_then_bsub, AArch64::qsub2_then_dsub, AArch64::qsub2_then_dsub, AArch64::qsub3_then_dsub, 0, 0, AArch64::qsub2_then_hsub, 0, 0, AArch64::qsub2, AArch64::qsub3, 0, 0, AArch64::qsub2_then_ssub, AArch64::x8sub_4_then_sub_32, 0, AArch64::x8sub_4, 0, AArch64::x8sub_5, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubh1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub3_then_bsub, AArch64::qsub3_then_hsub, AArch64::qsub3_then_ssub, 0, 0, 0, 0, 0, 0, AArch64::qsub3_then_bsub, AArch64::qsub3_then_dsub, AArch64::qsub3_then_hsub, AArch64::qsub3_then_ssub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::x8sub_5_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub2_then_dsub_qsub3_then_dsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::x8sub_4_then_sub_32_x8sub_5_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, { AArch64::qsub3_then_bsub, AArch64::qsub3_then_dsub, 0, 0, 0, 0, AArch64::qsub3_then_hsub, 0, 0, 0, 0, 0, 0, AArch64::qsub3_then_ssub, AArch64::x8sub_5_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubh1_then_zasubs1_then_zasubd0, AArch64::zasubh1_then_zasubs1_then_zasubd1, 0, 0, AArch64::zasubh1_then_zasubs1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, { AArch64::zsub1_then_bsub, AArch64::zsub1_then_dsub, AArch64::zsub1_then_dsub, AArch64::zsub2_then_dsub, AArch64::zsub3_then_dsub, 0, AArch64::zsub1_then_hsub, 0, 0, AArch64::zsub1_then_zsub, AArch64::zsub2_then_zsub, AArch64::zsub3_then_zsub, 0, AArch64::zsub1_then_ssub, AArch64::x8sub_6_then_sub_32, 0, AArch64::x8sub_6, 0, AArch64::x8sub_7, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq0, AArch64::zasubh1_then_zasubs1_then_zasubd1_then_zasubq1, 0, 0, AArch64::zsub1_then_zsub, AArch64::zsub1, AArch64::zsub2, AArch64::zsub3, 0, AArch64::zsub1_then_zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub2_then_bsub, AArch64::zsub2_then_hsub, AArch64::zsub2_then_ssub, 0, 0, 0, AArch64::zsub3_then_bsub, AArch64::zsub3_then_hsub, AArch64::zsub3_then_ssub, AArch64::zsub2_then_bsub, AArch64::zsub2_then_dsub, AArch64::zsub2_then_hsub, AArch64::zsub2_then_ssub, 0, 0, 0, 0, AArch64::zsub3_then_bsub, AArch64::zsub3_then_dsub, AArch64::zsub3_then_hsub, AArch64::zsub3_then_ssub, 0, 0, 0, 0, 0, 0, 0, AArch64::x8sub_7_then_sub_32, AArch64::zsub2_then_bsub, AArch64::zsub2_then_dsub, AArch64::zsub2_then_hsub, AArch64::zsub2_then_ssub, AArch64::zsub2_then_zsub, AArch64::zsub2_then_zsub_hi, 0, 0, 0, 0, 0, 0, AArch64::zsub3_then_bsub, AArch64::zsub3_then_dsub, AArch64::zsub3_then_hsub, AArch64::zsub3_then_ssub, AArch64::zsub3_then_zsub, AArch64::zsub3_then_zsub_hi, AArch64::zsub1_then_dsub_zsub2_then_dsub, 0, AArch64::zsub2_then_dsub_zsub3_then_dsub, 0, 0, AArch64::zsub1_then_dsub_zsub2_then_dsub, 0, AArch64::zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub, AArch64::zsub1_then_zsub_zsub2_then_zsub, 0, AArch64::zsub2_then_zsub_zsub3_then_zsub, 0, 0, AArch64::zsub2_then_dsub_zsub3_then_dsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::x8sub_6_then_sub_32_x8sub_7_then_sub_32, AArch64::zsub1_then_dsub_zsub2_then_dsub, AArch64::zsub1_then_zsub_zsub2_then_zsub, 0, AArch64::zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub, 0, AArch64::zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub, AArch64::zsub1_zsub2, 0, AArch64::zsub2_zsub3, 0, 0, AArch64::zsub2_then_dsub_zsub3_then_dsub, 0, AArch64::zsub2_then_zsub_zsub3_then_zsub, 0, 0, 0, 0, 0, }, { AArch64::zsub2_then_bsub, AArch64::zsub2_then_dsub, AArch64::zsub2_then_dsub, AArch64::zsub3_then_dsub, 0, 0, AArch64::zsub2_then_hsub, 0, 0, AArch64::zsub2_then_zsub, AArch64::zsub3_then_zsub, 0, 0, AArch64::zsub2_then_ssub, AArch64::x8sub_7_then_sub_32, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub2_then_zsub, AArch64::zsub2, AArch64::zsub3, 0, 0, AArch64::zsub2_then_zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub3_then_bsub, AArch64::zsub3_then_hsub, AArch64::zsub3_then_ssub, 0, 0, 0, 0, 0, 0, AArch64::zsub3_then_bsub, AArch64::zsub3_then_dsub, AArch64::zsub3_then_hsub, AArch64::zsub3_then_ssub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub3_then_bsub, AArch64::zsub3_then_dsub, AArch64::zsub3_then_hsub, AArch64::zsub3_then_ssub, AArch64::zsub3_then_zsub, AArch64::zsub3_then_zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub2_then_dsub_zsub3_then_dsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub2_then_dsub_zsub3_then_dsub, AArch64::zsub2_then_zsub_zsub3_then_zsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, { AArch64::zsub3_then_bsub, AArch64::zsub3_then_dsub, 0, 0, 0, 0, AArch64::zsub3_then_hsub, 0, 0, 0, 0, 0, 0, AArch64::zsub3_then_ssub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub3_then_zsub, 0, 0, 0, 0, AArch64::zsub3_then_zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, { AArch64::bsub, AArch64::dsub, AArch64::dsub, AArch64::qsub1_then_dsub, AArch64::qsub2_then_dsub, AArch64::qsub3_then_dsub, AArch64::hsub, 0, 0, AArch64::zsub, AArch64::zsub1_then_zsub, AArch64::zsub2_then_zsub, AArch64::zsub3_then_zsub, AArch64::ssub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub, AArch64::zsub0, AArch64::zsub2, 0, 0, AArch64::zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::qsub1_then_bsub, AArch64::qsub1_then_hsub, AArch64::qsub1_then_ssub, AArch64::qsub3_then_bsub, AArch64::qsub3_then_hsub, AArch64::qsub3_then_ssub, AArch64::qsub2_then_bsub, AArch64::qsub2_then_hsub, AArch64::qsub2_then_ssub, AArch64::zsub1_then_bsub, AArch64::zsub1_then_dsub, AArch64::zsub1_then_hsub, AArch64::zsub1_then_ssub, AArch64::zsub3_then_bsub, AArch64::zsub3_then_dsub, AArch64::zsub3_then_hsub, AArch64::zsub3_then_ssub, AArch64::zsub2_then_bsub, AArch64::zsub2_then_dsub, AArch64::zsub2_then_hsub, AArch64::zsub2_then_ssub, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub2_then_bsub, AArch64::zsub2_then_dsub, AArch64::zsub2_then_hsub, AArch64::zsub2_then_ssub, AArch64::zsub2_then_zsub, AArch64::zsub2_then_zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub_qsub1_then_dsub, AArch64::dsub_qsub1_then_dsub_qsub2_then_dsub, AArch64::qsub1_then_dsub_qsub2_then_dsub, AArch64::qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub, AArch64::qsub2_then_dsub_qsub3_then_dsub, AArch64::dsub_zsub1_then_dsub, AArch64::dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub, AArch64::dsub_zsub1_then_dsub_zsub2_then_dsub, AArch64::zsub_zsub1_then_zsub, AArch64::zsub_zsub1_then_zsub_zsub2_then_zsub, AArch64::zsub1_then_zsub_zsub2_then_zsub, AArch64::zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub, AArch64::zsub2_then_zsub_zsub3_then_zsub, AArch64::zsub1_then_dsub_zsub2_then_dsub, AArch64::zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub, AArch64::zsub2_then_dsub_zsub3_then_dsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, { AArch64::bsub, 0, AArch64::dsub, AArch64::zsub1_then_dsub, AArch64::zsub2_then_dsub, AArch64::zsub3_then_dsub, AArch64::hsub, 0, 0, 0, 0, 0, 0, AArch64::ssub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub1_then_bsub, AArch64::zsub1_then_hsub, AArch64::zsub1_then_ssub, AArch64::zsub3_then_bsub, AArch64::zsub3_then_hsub, AArch64::zsub3_then_ssub, AArch64::zsub2_then_bsub, AArch64::zsub2_then_hsub, AArch64::zsub2_then_ssub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::dsub_zsub1_then_dsub, AArch64::dsub_zsub1_then_dsub_zsub2_then_dsub, AArch64::zsub1_then_dsub_zsub2_then_dsub, AArch64::zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub, AArch64::zsub2_then_dsub_zsub3_then_dsub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, { AArch64::zsub1_then_bsub, AArch64::zsub1_then_dsub, 0, 0, 0, 0, AArch64::zsub1_then_hsub, 0, 0, 0, 0, 0, 0, AArch64::zsub1_then_ssub, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub1_then_zsub, AArch64::zsub1, AArch64::zsub3, 0, 0, AArch64::zsub1_then_zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, AArch64::zsub3_then_bsub, AArch64::zsub3_then_dsub, AArch64::zsub3_then_hsub, AArch64::zsub3_then_ssub, AArch64::zsub3_then_zsub, AArch64::zsub3_then_zsub_hi, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, }, }; --IdxA; assert(IdxA < 155); (void) IdxA; --IdxB; assert(IdxB < 155); return Rows[RowMap[IdxA]][IdxB]; } struct MaskRolOp { LaneBitmask Mask; uint8_t RotateLeft; }; static const MaskRolOp LaneMaskComposeSequences[] = { { LaneBitmask(0xFFFFFFFFFFFFFFFF), 0 }, { LaneBitmask::getNone(), 0 }, // Sequence 0 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 23 }, { LaneBitmask::getNone(), 0 }, // Sequence 2 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 25 }, { LaneBitmask::getNone(), 0 }, // Sequence 4 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 24 }, { LaneBitmask::getNone(), 0 }, // Sequence 6 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 8 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 10 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 26 }, { LaneBitmask::getNone(), 0 }, // Sequence 12 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 28 }, { LaneBitmask::getNone(), 0 }, // Sequence 14 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 27 }, { LaneBitmask::getNone(), 0 }, // Sequence 16 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 3 }, { LaneBitmask::getNone(), 0 }, // Sequence 18 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 20 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 5 }, { LaneBitmask::getNone(), 0 }, // Sequence 22 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 33 }, { LaneBitmask::getNone(), 0 }, // Sequence 24 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 32 }, { LaneBitmask::getNone(), 0 }, // Sequence 26 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 31 }, { LaneBitmask::getNone(), 0 }, // Sequence 28 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 30 }, { LaneBitmask::getNone(), 0 }, // Sequence 30 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 29 }, { LaneBitmask::getNone(), 0 }, // Sequence 32 { LaneBitmask(0x00000000000000C0), 9 }, { LaneBitmask(0x0000000000007E00), 8 }, { LaneBitmask::getNone(), 0 }, // Sequence 34 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 6 }, { LaneBitmask::getNone(), 0 }, // Sequence 37 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 7 }, { LaneBitmask::getNone(), 0 }, // Sequence 39 { LaneBitmask(0x00000000000000C0), 5 }, { LaneBitmask(0x0000000000000600), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 41 { LaneBitmask(0x0000000000000001), 37 }, { LaneBitmask(0x0000000000000100), 30 }, { LaneBitmask::getNone(), 0 }, // Sequence 44 { LaneBitmask(0x0000000000000001), 41 }, { LaneBitmask(0x0000000000000100), 34 }, { LaneBitmask::getNone(), 0 }, // Sequence 47 { LaneBitmask(0x0000000000000001), 39 }, { LaneBitmask(0x0000000000000100), 32 }, { LaneBitmask::getNone(), 0 }, // Sequence 50 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 8 }, { LaneBitmask::getNone(), 0 }, // Sequence 53 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 9 }, { LaneBitmask::getNone(), 0 }, // Sequence 55 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 10 }, { LaneBitmask::getNone(), 0 }, // Sequence 57 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 11 }, { LaneBitmask::getNone(), 0 }, // Sequence 59 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 12 }, { LaneBitmask::getNone(), 0 }, // Sequence 61 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 13 }, { LaneBitmask::getNone(), 0 }, // Sequence 63 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 14 }, { LaneBitmask::getNone(), 0 }, // Sequence 65 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 15 }, { LaneBitmask::getNone(), 0 }, // Sequence 67 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 16 }, { LaneBitmask::getNone(), 0 }, // Sequence 69 { LaneBitmask(0x00000000000000C0), 9 }, { LaneBitmask(0x0000000000000600), 8 }, { LaneBitmask::getNone(), 0 }, // Sequence 71 { LaneBitmask(0x00000000000000C0), 13 }, { LaneBitmask(0x0000000000000600), 12 }, { LaneBitmask::getNone(), 0 }, // Sequence 74 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 17 }, { LaneBitmask::getNone(), 0 }, // Sequence 77 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 18 }, { LaneBitmask::getNone(), 0 }, // Sequence 79 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 19 }, { LaneBitmask::getNone(), 0 }, // Sequence 81 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 20 }, { LaneBitmask::getNone(), 0 }, // Sequence 83 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 21 }, { LaneBitmask::getNone(), 0 }, // Sequence 85 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 22 }, { LaneBitmask::getNone(), 0 }, // Sequence 87 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 34 }, { LaneBitmask::getNone(), 0 }, // Sequence 89 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 35 }, { LaneBitmask::getNone(), 0 }, // Sequence 91 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 36 }, { LaneBitmask::getNone(), 0 }, // Sequence 93 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 37 }, { LaneBitmask::getNone(), 0 }, // Sequence 95 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 38 }, { LaneBitmask::getNone(), 0 }, // Sequence 97 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 39 }, { LaneBitmask::getNone(), 0 }, // Sequence 99 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 40 }, { LaneBitmask::getNone(), 0 }, // Sequence 101 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 41 }, { LaneBitmask::getNone(), 0 }, // Sequence 103 { LaneBitmask(0xFFFFFFFFFFFFFFFF), 42 }, { LaneBitmask::getNone(), 0 }, // Sequence 105 { LaneBitmask(0x0000000000000001), 23 }, { LaneBitmask(0x0000000000800000), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 107 { LaneBitmask(0x0000000000000001), 23 }, { LaneBitmask(0x0000000000800000), 2 }, { LaneBitmask(0x0000000002000000), 63 }, { LaneBitmask::getNone(), 0 }, // Sequence 110 { LaneBitmask(0x0000000000000001), 25 }, { LaneBitmask(0x0000000000800000), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 114 { LaneBitmask(0x0000000000000001), 0 }, { LaneBitmask(0x0000000000800000), 3 }, { LaneBitmask::getNone(), 0 }, // Sequence 117 { LaneBitmask(0x0000000000000001), 0 }, { LaneBitmask(0x0000000003800000), 3 }, { LaneBitmask::getNone(), 0 }, // Sequence 120 { LaneBitmask(0x0000000000000001), 0 }, { LaneBitmask(0x0000000002800000), 3 }, { LaneBitmask::getNone(), 0 }, // Sequence 123 { LaneBitmask(0x0000000000000001), 26 }, { LaneBitmask(0x0000000004000000), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 126 { LaneBitmask(0x0000000000000001), 26 }, { LaneBitmask(0x0000000004000000), 2 }, { LaneBitmask(0x0000000010000000), 63 }, { LaneBitmask::getNone(), 0 }, // Sequence 129 { LaneBitmask(0x0000000000000001), 28 }, { LaneBitmask(0x0000000004000000), 1 }, { LaneBitmask::getNone(), 0 }, // Sequence 133 { LaneBitmask(0x0000000000000001), 26 }, { LaneBitmask(0x0000000000800000), 5 }, { LaneBitmask::getNone(), 0 }, // Sequence 136 { LaneBitmask(0x0000000000000001), 26 }, { LaneBitmask(0x0000000000800000), 5 }, { LaneBitmask(0x0000000002000000), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 139 { LaneBitmask(0x0000000000000001), 28 }, { LaneBitmask(0x0000000000800000), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 143 { LaneBitmask(0x0000000000000010), 63 }, { LaneBitmask(0x0000000000000020), 30 }, { LaneBitmask::getNone(), 0 }, // Sequence 146 { LaneBitmask(0x0000000000000008), 0 }, { LaneBitmask(0x0000001000000000), 63 }, { LaneBitmask::getNone(), 0 }, // Sequence 149 { LaneBitmask(0x0000000000000008), 31 }, { LaneBitmask(0x0000001000000000), 61 }, { LaneBitmask::getNone(), 0 }, // Sequence 152 { LaneBitmask(0x0000000000000008), 29 }, { LaneBitmask(0x0000001000000000), 59 }, { LaneBitmask::getNone(), 0 }, // Sequence 155 { LaneBitmask(0x0000000000000008), 27 }, { LaneBitmask(0x0000001000000000), 57 }, { LaneBitmask::getNone(), 0 }, // Sequence 158 { LaneBitmask(0x0000000000000010), 26 }, { LaneBitmask(0x0000000000000020), 24 }, { LaneBitmask::getNone(), 0 }, // Sequence 161 { LaneBitmask(0x0000000000000010), 28 }, { LaneBitmask(0x0000000000000020), 26 }, { LaneBitmask::getNone(), 0 }, // Sequence 164 { LaneBitmask(0x0000000000000010), 30 }, { LaneBitmask(0x0000000000000020), 28 }, { LaneBitmask::getNone(), 0 }, // Sequence 167 { LaneBitmask(0x0000000000000010), 63 }, { LaneBitmask(0x0000000000000020), 31 }, { LaneBitmask::getNone(), 0 }, // Sequence 170 { LaneBitmask(0x0000000000000001), 0 }, { LaneBitmask(0x0000000000800000), 14 }, { LaneBitmask::getNone(), 0 }, // Sequence 173 { LaneBitmask(0x0000000000000001), 0 }, { LaneBitmask(0x0000000004000000), 11 }, { LaneBitmask::getNone(), 0 }, // Sequence 176 { LaneBitmask(0x0000000000000001), 0 }, { LaneBitmask(0x0000000000800000), 14 }, { LaneBitmask(0x0000000001000000), 15 }, { LaneBitmask(0x0000000002000000), 16 }, { LaneBitmask::getNone(), 0 }, // Sequence 179 { LaneBitmask(0x0000000000000001), 0 }, { LaneBitmask(0x0000000000800000), 14 }, { LaneBitmask(0x0000000002000000), 16 }, { LaneBitmask::getNone(), 0 }, // Sequence 184 { LaneBitmask(0x0000000000000001), 0 }, { LaneBitmask(0x0000000004000000), 11 }, { LaneBitmask(0x0000000008000000), 12 }, { LaneBitmask(0x0000000010000000), 13 }, { LaneBitmask::getNone(), 0 }, // Sequence 188 { LaneBitmask(0x0000000000000001), 0 }, { LaneBitmask(0x0000000004000000), 11 }, { LaneBitmask(0x0000000010000000), 13 }, { LaneBitmask::getNone(), 0 }, // Sequence 193 { LaneBitmask(0x0000000000000001), 37 }, { LaneBitmask(0x0000000000000100), 30 }, { LaneBitmask(0x0000006000000000), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 197 { LaneBitmask(0x0000000000000001), 37 }, { LaneBitmask(0x0000000000000100), 30 }, { LaneBitmask(0x0000006000000000), 4 }, { LaneBitmask(0x0000060000000000), 62 }, { LaneBitmask::getNone(), 0 }, // Sequence 201 { LaneBitmask(0x0000000000000001), 41 }, { LaneBitmask(0x0000000000000100), 34 }, { LaneBitmask(0x0000006000000000), 2 }, { LaneBitmask::getNone(), 0 }, // Sequence 206 { LaneBitmask(0x0000000000000001), 37 }, { LaneBitmask(0x0000000000800000), 18 }, { LaneBitmask::getNone(), 0 }, // Sequence 210 { LaneBitmask(0x0000000000000001), 37 }, { LaneBitmask(0x0000000000800000), 18 }, { LaneBitmask(0x0000000002000000), 14 }, { LaneBitmask::getNone(), 0 }, // Sequence 213 { LaneBitmask(0x0000000000000001), 37 }, { LaneBitmask(0x0000000004000000), 15 }, { LaneBitmask::getNone(), 0 }, // Sequence 217 { LaneBitmask(0x0000000000000001), 37 }, { LaneBitmask(0x0000000004000000), 15 }, { LaneBitmask(0x0000000010000000), 11 }, { LaneBitmask::getNone(), 0 }, // Sequence 220 { LaneBitmask(0x0000000000000001), 41 }, { LaneBitmask(0x0000000000800000), 16 }, { LaneBitmask::getNone(), 0 }, // Sequence 224 { LaneBitmask(0x0000000000000001), 41 }, { LaneBitmask(0x0000000004000000), 13 }, { LaneBitmask::getNone(), 0 }, // Sequence 227 { LaneBitmask(0x0000000000000101), 0 }, { LaneBitmask(0x0000006000000000), 4 }, { LaneBitmask::getNone(), 0 }, // Sequence 230 { LaneBitmask(0x0000000000000001), 37 }, { LaneBitmask(0x0000000000000100), 30 }, { LaneBitmask(0x0000006000000000), 2 }, { LaneBitmask::getNone(), 0 } // Sequence 233 }; static const uint8_t CompositeSequences[] = { 0, // to bsub 0, // to dsub 0, // to dsub0 2, // to dsub1 4, // to dsub2 6, // to dsub3 0, // to hsub 8, // to psub0 10, // to psub1 0, // to qsub0 12, // to qsub1 14, // to qsub2 16, // to qsub3 0, // to ssub 18, // to sub_32 20, // to sube32 0, // to sube64 22, // to subo32 24, // to subo64 0, // to x8sub_0 26, // to x8sub_1 28, // to x8sub_2 30, // to x8sub_3 32, // to x8sub_4 14, // to x8sub_5 16, // to x8sub_6 12, // to x8sub_7 0, // to zasubb 0, // to zasubd0 18, // to zasubd1 0, // to zasubh0 34, // to zasubh1 37, // to zasubq0 39, // to zasubq1 0, // to zasubs0 41, // to zasubs1 0, // to zsub 0, // to zsub0 44, // to zsub1 47, // to zsub2 50, // to zsub3 53, // to zsub_hi 55, // to zasubd1_then_zasubq0 57, // to zasubd1_then_zasubq1 22, // to zasubs1_then_zasubd0 39, // to zasubs1_then_zasubd1 59, // to zasubs1_then_zasubq0 61, // to zasubs1_then_zasubq1 63, // to zasubs1_then_zasubd1_then_zasubq0 65, // to zasubs1_then_zasubd1_then_zasubq1 55, // to zasubh1_then_zasubd0 59, // to zasubh1_then_zasubd1 67, // to zasubh1_then_zasubq0 69, // to zasubh1_then_zasubq1 71, // to zasubh1_then_zasubs0 74, // to zasubh1_then_zasubs1 77, // to zasubh1_then_zasubd1_then_zasubq0 79, // to zasubh1_then_zasubd1_then_zasubq1 63, // to zasubh1_then_zasubs1_then_zasubd0 67, // to zasubh1_then_zasubs1_then_zasubd1 81, // to zasubh1_then_zasubs1_then_zasubq0 83, // to zasubh1_then_zasubs1_then_zasubq1 85, // to zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 87, // to zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 2, // to dsub1_then_bsub 2, // to dsub1_then_hsub 2, // to dsub1_then_ssub 6, // to dsub3_then_bsub 6, // to dsub3_then_hsub 6, // to dsub3_then_ssub 4, // to dsub2_then_bsub 4, // to dsub2_then_hsub 4, // to dsub2_then_ssub 12, // to qsub1_then_bsub 12, // to qsub1_then_dsub 12, // to qsub1_then_hsub 12, // to qsub1_then_ssub 16, // to qsub3_then_bsub 16, // to qsub3_then_dsub 16, // to qsub3_then_hsub 16, // to qsub3_then_ssub 14, // to qsub2_then_bsub 14, // to qsub2_then_dsub 14, // to qsub2_then_hsub 14, // to qsub2_then_ssub 32, // to x8sub_7_then_sub_32 30, // to x8sub_6_then_sub_32 28, // to x8sub_5_then_sub_32 26, // to x8sub_4_then_sub_32 24, // to x8sub_3_then_sub_32 89, // to x8sub_2_then_sub_32 91, // to x8sub_1_then_sub_32 93, // to subo64_then_sub_32 95, // to zsub1_then_bsub 95, // to zsub1_then_dsub 95, // to zsub1_then_hsub 95, // to zsub1_then_ssub 95, // to zsub1_then_zsub 97, // to zsub1_then_zsub_hi 99, // to zsub3_then_bsub 99, // to zsub3_then_dsub 99, // to zsub3_then_hsub 99, // to zsub3_then_ssub 99, // to zsub3_then_zsub 101, // to zsub3_then_zsub_hi 103, // to zsub2_then_bsub 103, // to zsub2_then_dsub 103, // to zsub2_then_hsub 103, // to zsub2_then_ssub 103, // to zsub2_then_zsub 105, // to zsub2_then_zsub_hi 0, // to dsub0_dsub1 0, // to dsub0_dsub1_dsub2 107, // to dsub1_dsub2 110, // to dsub1_dsub2_dsub3 114, // to dsub2_dsub3 117, // to dsub_qsub1_then_dsub 120, // to dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 123, // to dsub_qsub1_then_dsub_qsub2_then_dsub 0, // to qsub0_qsub1 0, // to qsub0_qsub1_qsub2 126, // to qsub1_qsub2 129, // to qsub1_qsub2_qsub3 133, // to qsub2_qsub3 136, // to qsub1_then_dsub_qsub2_then_dsub 139, // to qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 143, // to qsub2_then_dsub_qsub3_then_dsub 146, // to sub_32_x8sub_1_then_sub_32 149, // to x8sub_0_x8sub_1 152, // to x8sub_2_x8sub_3 155, // to x8sub_4_x8sub_5 158, // to x8sub_6_x8sub_7 161, // to x8sub_6_then_sub_32_x8sub_7_then_sub_32 164, // to x8sub_4_then_sub_32_x8sub_5_then_sub_32 167, // to x8sub_2_then_sub_32_x8sub_3_then_sub_32 170, // to sub_32_subo64_then_sub_32 173, // to dsub_zsub1_then_dsub 176, // to zsub_zsub1_then_zsub 179, // to dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 184, // to dsub_zsub1_then_dsub_zsub2_then_dsub 188, // to zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 193, // to zsub_zsub1_then_zsub_zsub2_then_zsub 0, // to zsub0_zsub1 0, // to zsub0_zsub1_zsub2 197, // to zsub1_zsub2 201, // to zsub1_zsub2_zsub3 206, // to zsub2_zsub3 210, // to zsub1_then_dsub_zsub2_then_dsub 213, // to zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 217, // to zsub1_then_zsub_zsub2_then_zsub 220, // to zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 224, // to zsub2_then_dsub_zsub3_then_dsub 227, // to zsub2_then_zsub_zsub3_then_zsub 230, // to zsub0_zsub2 233 // to zsub1_zsub3 }; LaneBitmask AArch64GenRegisterInfo::composeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const { --IdxA; assert(IdxA < 155 && "Subregister index out of bounds"); LaneBitmask Result; for (const MaskRolOp *Ops = &LaneMaskComposeSequences[CompositeSequences[IdxA]]; Ops->Mask.any(); ++Ops) { LaneBitmask::Type M = LaneMask.getAsInteger() & Ops->Mask.getAsInteger(); if (unsigned S = Ops->RotateLeft) Result |= LaneBitmask((M << S) | (M >> (LaneBitmask::BitWidth - S))); else Result |= LaneBitmask(M); } return Result; } LaneBitmask AArch64GenRegisterInfo::reverseComposeSubRegIndexLaneMaskImpl(unsigned IdxA, LaneBitmask LaneMask) const { LaneMask &= getSubRegIndexLaneMask(IdxA); --IdxA; assert(IdxA < 155 && "Subregister index out of bounds"); LaneBitmask Result; for (const MaskRolOp *Ops = &LaneMaskComposeSequences[CompositeSequences[IdxA]]; Ops->Mask.any(); ++Ops) { LaneBitmask::Type M = LaneMask.getAsInteger(); if (unsigned S = Ops->RotateLeft) Result |= LaneBitmask((M >> S) | (M << (LaneBitmask::BitWidth - S))); else Result |= LaneBitmask(M); } return Result; } const TargetRegisterClass *AArch64GenRegisterInfo::getSubClassWithSubReg(const TargetRegisterClass *RC, unsigned Idx) const { static const uint16_t Table[273][155] = { { // FPR8 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // FPR16 2, // bsub -> FPR16 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // FPR16_lo 3, // bsub -> FPR16_lo 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // PPR 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // PPR_3b 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // PPR_p8to15 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // PPR2 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 7, // psub0 -> PPR2 7, // psub1 -> PPR2 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // PPR2Mul2 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 8, // psub0 -> PPR2Mul2 8, // psub1 -> PPR2Mul2 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // PPR2_with_psub0_in_PPR_3b 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 9, // psub0 -> PPR2_with_psub0_in_PPR_3b 9, // psub1 -> PPR2_with_psub0_in_PPR_3b 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // PPR2_with_psub0_in_PPR_p8to15 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 10, // psub0 -> PPR2_with_psub0_in_PPR_p8to15 10, // psub1 -> PPR2_with_psub0_in_PPR_p8to15 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // PPR2_with_psub1_in_PPR_3b 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 11, // psub0 -> PPR2_with_psub1_in_PPR_3b 11, // psub1 -> PPR2_with_psub1_in_PPR_3b 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // PPR2_with_psub1_in_PPR_p8to15 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 12, // psub0 -> PPR2_with_psub1_in_PPR_p8to15 12, // psub1 -> PPR2_with_psub1_in_PPR_p8to15 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 13, // psub0 -> PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b 13, // psub1 -> PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 14, // psub0 -> PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15 14, // psub1 -> PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 15, // psub0 -> PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b 15, // psub1 -> PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 16, // psub0 -> PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15 16, // psub1 -> PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 17, // psub0 -> PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15 17, // psub1 -> PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 18, // psub0 -> PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b 18, // psub1 -> PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR32all 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // FPR32 20, // bsub -> FPR32 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 20, // hsub -> FPR32 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR32 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR32sp 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR32common 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // FPR32_with_hsub_in_FPR16_lo 24, // bsub -> FPR32_with_hsub_in_FPR16_lo 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 24, // hsub -> FPR32_with_hsub_in_FPR16_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR32arg 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // MatrixIndexGPR32_12_15 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // MatrixIndexGPR32_8_11 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // CCR 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR32sponly 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // WSeqPairsClass 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 30, // sube32 -> WSeqPairsClass 0, // sube64 30, // subo32 -> WSeqPairsClass 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // WSeqPairsClass_with_subo32_in_GPR32common 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 31, // sube32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // sube64 31, // subo32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // WSeqPairsClass_with_sube32_in_GPR32arg 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 32, // sube32 -> WSeqPairsClass_with_sube32_in_GPR32arg 0, // sube64 32, // subo32 -> WSeqPairsClass_with_sube32_in_GPR32arg 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 33, // sube32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 0, // sube64 33, // subo32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 34, // sube32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 0, // sube64 34, // subo32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64all 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 35, // sub_32 -> GPR64all 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // FPR64 36, // bsub -> FPR64 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 36, // hsub -> FPR64 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 36, // ssub -> FPR64 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 37, // sub_32 -> GPR64 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64sp 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 38, // sub_32 -> GPR64sp 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64common 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 39, // sub_32 -> GPR64common 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 40, // sub_32 -> GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64common_and_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 41, // sub_32 -> GPR64common_and_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // tcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 42, // sub_32 -> tcGPR64 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64noip_and_tcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 43, // sub_32 -> GPR64noip_and_tcGPR64 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // FPR64_lo 44, // bsub -> FPR64_lo 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 44, // hsub -> FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 44, // ssub -> FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64arg 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 45, // sub_32 -> GPR64arg 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // FIXED_REGS 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 49, // sub_32 -> FIXED_REGS_with_sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 47, // sub_32 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 48, // sub_32 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // FIXED_REGS_with_sub_32 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 49, // sub_32 -> FIXED_REGS_with_sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // rtcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 50, // sub_32 -> rtcGPR64 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // FIXED_REGS_and_GPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 51, // sub_32 -> FIXED_REGS_and_GPR64 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64sponly 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 52, // sub_32 -> GPR64sponly 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DD 53, // bsub -> DD 0, // dsub 53, // dsub0 -> DD 53, // dsub1 -> DD 0, // dsub2 0, // dsub3 53, // hsub -> DD 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 53, // ssub -> DD 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 53, // dsub1_then_bsub -> DD 53, // dsub1_then_hsub -> DD 53, // dsub1_then_ssub -> DD 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DD_with_dsub0_in_FPR64_lo 54, // bsub -> DD_with_dsub0_in_FPR64_lo 0, // dsub 54, // dsub0 -> DD_with_dsub0_in_FPR64_lo 54, // dsub1 -> DD_with_dsub0_in_FPR64_lo 0, // dsub2 0, // dsub3 54, // hsub -> DD_with_dsub0_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 54, // ssub -> DD_with_dsub0_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 54, // dsub1_then_bsub -> DD_with_dsub0_in_FPR64_lo 54, // dsub1_then_hsub -> DD_with_dsub0_in_FPR64_lo 54, // dsub1_then_ssub -> DD_with_dsub0_in_FPR64_lo 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DD_with_dsub1_in_FPR64_lo 55, // bsub -> DD_with_dsub1_in_FPR64_lo 0, // dsub 55, // dsub0 -> DD_with_dsub1_in_FPR64_lo 55, // dsub1 -> DD_with_dsub1_in_FPR64_lo 0, // dsub2 0, // dsub3 55, // hsub -> DD_with_dsub1_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 55, // ssub -> DD_with_dsub1_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 55, // dsub1_then_bsub -> DD_with_dsub1_in_FPR64_lo 55, // dsub1_then_hsub -> DD_with_dsub1_in_FPR64_lo 55, // dsub1_then_ssub -> DD_with_dsub1_in_FPR64_lo 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // XSeqPairsClass 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 56, // sub_32 -> XSeqPairsClass 0, // sube32 56, // sube64 -> XSeqPairsClass 0, // subo32 56, // subo64 -> XSeqPairsClass 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 56, // subo64_then_sub_32 -> XSeqPairsClass 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 56, // sub_32_subo64_then_sub_32 -> XSeqPairsClass 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 57, // bsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // dsub 57, // dsub0 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 57, // dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // dsub2 0, // dsub3 57, // hsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 57, // ssub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 57, // dsub1_then_bsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 57, // dsub1_then_hsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 57, // dsub1_then_ssub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // XSeqPairsClass_with_subo64_in_GPR64common 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 58, // sub_32 -> XSeqPairsClass_with_subo64_in_GPR64common 0, // sube32 58, // sube64 -> XSeqPairsClass_with_subo64_in_GPR64common 0, // subo32 58, // subo64 -> XSeqPairsClass_with_subo64_in_GPR64common 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 58, // subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_GPR64common 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 58, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_GPR64common 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // XSeqPairsClass_with_subo64_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 59, // sub_32 -> XSeqPairsClass_with_subo64_in_GPR64noip 0, // sube32 59, // sube64 -> XSeqPairsClass_with_subo64_in_GPR64noip 0, // subo32 59, // subo64 -> XSeqPairsClass_with_subo64_in_GPR64noip 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 59, // subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_GPR64noip 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 59, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_GPR64noip 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // XSeqPairsClass_with_sube64_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 60, // sub_32 -> XSeqPairsClass_with_sube64_in_GPR64noip 0, // sube32 60, // sube64 -> XSeqPairsClass_with_sube64_in_GPR64noip 0, // subo32 60, // subo64 -> XSeqPairsClass_with_sube64_in_GPR64noip 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 60, // subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_GPR64noip 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 60, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_GPR64noip 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // XSeqPairsClass_with_sube64_in_tcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 61, // sub_32 -> XSeqPairsClass_with_sube64_in_tcGPR64 0, // sube32 61, // sube64 -> XSeqPairsClass_with_sube64_in_tcGPR64 0, // subo32 61, // subo64 -> XSeqPairsClass_with_sube64_in_tcGPR64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 61, // subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_tcGPR64 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 61, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_tcGPR64 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 62, // sub_32 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 0, // sube32 62, // sube64 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 0, // subo32 62, // subo64 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 62, // subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 62, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // XSeqPairsClass_with_subo64_in_tcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 63, // sub_32 -> XSeqPairsClass_with_subo64_in_tcGPR64 0, // sube32 63, // sube64 -> XSeqPairsClass_with_subo64_in_tcGPR64 0, // subo32 63, // subo64 -> XSeqPairsClass_with_subo64_in_tcGPR64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 63, // subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_tcGPR64 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 63, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_tcGPR64 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 64, // sub_32 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 0, // sube32 64, // sube64 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 0, // subo32 64, // subo64 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 64, // subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 64, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // XSeqPairsClass_with_sub_32_in_GPR32arg 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 65, // sub_32 -> XSeqPairsClass_with_sub_32_in_GPR32arg 0, // sube32 65, // sube64 -> XSeqPairsClass_with_sub_32_in_GPR32arg 0, // subo32 65, // subo64 -> XSeqPairsClass_with_sub_32_in_GPR32arg 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 65, // subo64_then_sub_32 -> XSeqPairsClass_with_sub_32_in_GPR32arg 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 65, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_sub_32_in_GPR32arg 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 66, // sub_32 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 0, // sube32 66, // sube64 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 0, // subo32 66, // subo64 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 66, // subo64_then_sub_32 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 66, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 67, // sub_32 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 0, // sube32 67, // sube64 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 0, // subo32 67, // subo64 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 67, // subo64_then_sub_32 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 67, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // XSeqPairsClass_with_sube64_in_rtcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 68, // sub_32 -> XSeqPairsClass_with_sube64_in_rtcGPR64 0, // sube32 68, // sube64 -> XSeqPairsClass_with_sube64_in_rtcGPR64 0, // subo32 68, // subo64 -> XSeqPairsClass_with_sube64_in_rtcGPR64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 68, // subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_rtcGPR64 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 68, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_sube64_in_rtcGPR64 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // XSeqPairsClass_with_subo64_in_FIXED_REGS 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 69, // sub_32 -> XSeqPairsClass_with_subo64_in_FIXED_REGS 0, // sube32 69, // sube64 -> XSeqPairsClass_with_subo64_in_FIXED_REGS 0, // subo32 69, // subo64 -> XSeqPairsClass_with_subo64_in_FIXED_REGS 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 69, // subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_FIXED_REGS 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 69, // sub_32_subo64_then_sub_32 -> XSeqPairsClass_with_subo64_in_FIXED_REGS 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // FPR128 70, // bsub -> FPR128 70, // dsub -> FPR128 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 70, // hsub -> FPR128 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 70, // ssub -> FPR128 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR 71, // bsub -> ZPR 71, // dsub -> ZPR 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 71, // hsub -> ZPR 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 71, // ssub -> ZPR 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 71, // zsub -> ZPR 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 71, // zsub_hi -> ZPR 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // FPR128_lo 72, // bsub -> FPR128_lo 72, // dsub -> FPR128_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 72, // hsub -> FPR128_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 72, // ssub -> FPR128_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // MPR128 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR_4b 74, // bsub -> ZPR_4b 74, // dsub -> ZPR_4b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 74, // hsub -> ZPR_4b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 74, // ssub -> ZPR_4b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 74, // zsub -> ZPR_4b 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 74, // zsub_hi -> ZPR_4b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR_3b 75, // bsub -> ZPR_3b 75, // dsub -> ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 75, // hsub -> ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 75, // ssub -> ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 75, // zsub -> ZPR_3b 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 75, // zsub_hi -> ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DDD 76, // bsub -> DDD 0, // dsub 76, // dsub0 -> DDD 76, // dsub1 -> DDD 76, // dsub2 -> DDD 0, // dsub3 76, // hsub -> DDD 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 76, // ssub -> DDD 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 76, // dsub1_then_bsub -> DDD 76, // dsub1_then_hsub -> DDD 76, // dsub1_then_ssub -> DDD 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 76, // dsub2_then_bsub -> DDD 76, // dsub2_then_hsub -> DDD 76, // dsub2_then_ssub -> DDD 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 76, // dsub0_dsub1 -> DDD 0, // dsub0_dsub1_dsub2 76, // dsub1_dsub2 -> DDD 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DDD_with_dsub0_in_FPR64_lo 77, // bsub -> DDD_with_dsub0_in_FPR64_lo 0, // dsub 77, // dsub0 -> DDD_with_dsub0_in_FPR64_lo 77, // dsub1 -> DDD_with_dsub0_in_FPR64_lo 77, // dsub2 -> DDD_with_dsub0_in_FPR64_lo 0, // dsub3 77, // hsub -> DDD_with_dsub0_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 77, // ssub -> DDD_with_dsub0_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 77, // dsub1_then_bsub -> DDD_with_dsub0_in_FPR64_lo 77, // dsub1_then_hsub -> DDD_with_dsub0_in_FPR64_lo 77, // dsub1_then_ssub -> DDD_with_dsub0_in_FPR64_lo 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 77, // dsub2_then_bsub -> DDD_with_dsub0_in_FPR64_lo 77, // dsub2_then_hsub -> DDD_with_dsub0_in_FPR64_lo 77, // dsub2_then_ssub -> DDD_with_dsub0_in_FPR64_lo 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 77, // dsub0_dsub1 -> DDD_with_dsub0_in_FPR64_lo 0, // dsub0_dsub1_dsub2 77, // dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DDD_with_dsub1_in_FPR64_lo 78, // bsub -> DDD_with_dsub1_in_FPR64_lo 0, // dsub 78, // dsub0 -> DDD_with_dsub1_in_FPR64_lo 78, // dsub1 -> DDD_with_dsub1_in_FPR64_lo 78, // dsub2 -> DDD_with_dsub1_in_FPR64_lo 0, // dsub3 78, // hsub -> DDD_with_dsub1_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 78, // ssub -> DDD_with_dsub1_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 78, // dsub1_then_bsub -> DDD_with_dsub1_in_FPR64_lo 78, // dsub1_then_hsub -> DDD_with_dsub1_in_FPR64_lo 78, // dsub1_then_ssub -> DDD_with_dsub1_in_FPR64_lo 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 78, // dsub2_then_bsub -> DDD_with_dsub1_in_FPR64_lo 78, // dsub2_then_hsub -> DDD_with_dsub1_in_FPR64_lo 78, // dsub2_then_ssub -> DDD_with_dsub1_in_FPR64_lo 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 78, // dsub0_dsub1 -> DDD_with_dsub1_in_FPR64_lo 0, // dsub0_dsub1_dsub2 78, // dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DDD_with_dsub2_in_FPR64_lo 79, // bsub -> DDD_with_dsub2_in_FPR64_lo 0, // dsub 79, // dsub0 -> DDD_with_dsub2_in_FPR64_lo 79, // dsub1 -> DDD_with_dsub2_in_FPR64_lo 79, // dsub2 -> DDD_with_dsub2_in_FPR64_lo 0, // dsub3 79, // hsub -> DDD_with_dsub2_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 79, // ssub -> DDD_with_dsub2_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 79, // dsub1_then_bsub -> DDD_with_dsub2_in_FPR64_lo 79, // dsub1_then_hsub -> DDD_with_dsub2_in_FPR64_lo 79, // dsub1_then_ssub -> DDD_with_dsub2_in_FPR64_lo 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 79, // dsub2_then_bsub -> DDD_with_dsub2_in_FPR64_lo 79, // dsub2_then_hsub -> DDD_with_dsub2_in_FPR64_lo 79, // dsub2_then_ssub -> DDD_with_dsub2_in_FPR64_lo 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 79, // dsub0_dsub1 -> DDD_with_dsub2_in_FPR64_lo 0, // dsub0_dsub1_dsub2 79, // dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 80, // bsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 0, // dsub 80, // dsub0 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 80, // dsub1 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 80, // dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 0, // dsub3 80, // hsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 80, // ssub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 80, // dsub1_then_bsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 80, // dsub1_then_hsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 80, // dsub1_then_ssub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 80, // dsub2_then_bsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 80, // dsub2_then_hsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 80, // dsub2_then_ssub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 80, // dsub0_dsub1 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 0, // dsub0_dsub1_dsub2 80, // dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 81, // bsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // dsub 81, // dsub0 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 81, // dsub1 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 81, // dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // dsub3 81, // hsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 81, // ssub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 81, // dsub1_then_bsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 81, // dsub1_then_hsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 81, // dsub1_then_ssub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 81, // dsub2_then_bsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 81, // dsub2_then_hsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 81, // dsub2_then_ssub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 81, // dsub0_dsub1 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // dsub0_dsub1_dsub2 81, // dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 82, // bsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // dsub 82, // dsub0 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 82, // dsub1 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 82, // dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // dsub3 82, // hsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 82, // ssub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 82, // dsub1_then_bsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 82, // dsub1_then_hsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 82, // dsub1_then_ssub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 82, // dsub2_then_bsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 82, // dsub2_then_hsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 82, // dsub2_then_ssub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 82, // dsub0_dsub1 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // dsub0_dsub1_dsub2 82, // dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DDDD 83, // bsub -> DDDD 0, // dsub 83, // dsub0 -> DDDD 83, // dsub1 -> DDDD 83, // dsub2 -> DDDD 83, // dsub3 -> DDDD 83, // hsub -> DDDD 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 83, // ssub -> DDDD 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 83, // dsub1_then_bsub -> DDDD 83, // dsub1_then_hsub -> DDDD 83, // dsub1_then_ssub -> DDDD 83, // dsub3_then_bsub -> DDDD 83, // dsub3_then_hsub -> DDDD 83, // dsub3_then_ssub -> DDDD 83, // dsub2_then_bsub -> DDDD 83, // dsub2_then_hsub -> DDDD 83, // dsub2_then_ssub -> DDDD 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 83, // dsub0_dsub1 -> DDDD 83, // dsub0_dsub1_dsub2 -> DDDD 83, // dsub1_dsub2 -> DDDD 83, // dsub1_dsub2_dsub3 -> DDDD 83, // dsub2_dsub3 -> DDDD 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DDDD_with_dsub0_in_FPR64_lo 84, // bsub -> DDDD_with_dsub0_in_FPR64_lo 0, // dsub 84, // dsub0 -> DDDD_with_dsub0_in_FPR64_lo 84, // dsub1 -> DDDD_with_dsub0_in_FPR64_lo 84, // dsub2 -> DDDD_with_dsub0_in_FPR64_lo 84, // dsub3 -> DDDD_with_dsub0_in_FPR64_lo 84, // hsub -> DDDD_with_dsub0_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 84, // ssub -> DDDD_with_dsub0_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 84, // dsub1_then_bsub -> DDDD_with_dsub0_in_FPR64_lo 84, // dsub1_then_hsub -> DDDD_with_dsub0_in_FPR64_lo 84, // dsub1_then_ssub -> DDDD_with_dsub0_in_FPR64_lo 84, // dsub3_then_bsub -> DDDD_with_dsub0_in_FPR64_lo 84, // dsub3_then_hsub -> DDDD_with_dsub0_in_FPR64_lo 84, // dsub3_then_ssub -> DDDD_with_dsub0_in_FPR64_lo 84, // dsub2_then_bsub -> DDDD_with_dsub0_in_FPR64_lo 84, // dsub2_then_hsub -> DDDD_with_dsub0_in_FPR64_lo 84, // dsub2_then_ssub -> DDDD_with_dsub0_in_FPR64_lo 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 84, // dsub0_dsub1 -> DDDD_with_dsub0_in_FPR64_lo 84, // dsub0_dsub1_dsub2 -> DDDD_with_dsub0_in_FPR64_lo 84, // dsub1_dsub2 -> DDDD_with_dsub0_in_FPR64_lo 84, // dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo 84, // dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DDDD_with_dsub1_in_FPR64_lo 85, // bsub -> DDDD_with_dsub1_in_FPR64_lo 0, // dsub 85, // dsub0 -> DDDD_with_dsub1_in_FPR64_lo 85, // dsub1 -> DDDD_with_dsub1_in_FPR64_lo 85, // dsub2 -> DDDD_with_dsub1_in_FPR64_lo 85, // dsub3 -> DDDD_with_dsub1_in_FPR64_lo 85, // hsub -> DDDD_with_dsub1_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 85, // ssub -> DDDD_with_dsub1_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 85, // dsub1_then_bsub -> DDDD_with_dsub1_in_FPR64_lo 85, // dsub1_then_hsub -> DDDD_with_dsub1_in_FPR64_lo 85, // dsub1_then_ssub -> DDDD_with_dsub1_in_FPR64_lo 85, // dsub3_then_bsub -> DDDD_with_dsub1_in_FPR64_lo 85, // dsub3_then_hsub -> DDDD_with_dsub1_in_FPR64_lo 85, // dsub3_then_ssub -> DDDD_with_dsub1_in_FPR64_lo 85, // dsub2_then_bsub -> DDDD_with_dsub1_in_FPR64_lo 85, // dsub2_then_hsub -> DDDD_with_dsub1_in_FPR64_lo 85, // dsub2_then_ssub -> DDDD_with_dsub1_in_FPR64_lo 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 85, // dsub0_dsub1 -> DDDD_with_dsub1_in_FPR64_lo 85, // dsub0_dsub1_dsub2 -> DDDD_with_dsub1_in_FPR64_lo 85, // dsub1_dsub2 -> DDDD_with_dsub1_in_FPR64_lo 85, // dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo 85, // dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DDDD_with_dsub2_in_FPR64_lo 86, // bsub -> DDDD_with_dsub2_in_FPR64_lo 0, // dsub 86, // dsub0 -> DDDD_with_dsub2_in_FPR64_lo 86, // dsub1 -> DDDD_with_dsub2_in_FPR64_lo 86, // dsub2 -> DDDD_with_dsub2_in_FPR64_lo 86, // dsub3 -> DDDD_with_dsub2_in_FPR64_lo 86, // hsub -> DDDD_with_dsub2_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 86, // ssub -> DDDD_with_dsub2_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 86, // dsub1_then_bsub -> DDDD_with_dsub2_in_FPR64_lo 86, // dsub1_then_hsub -> DDDD_with_dsub2_in_FPR64_lo 86, // dsub1_then_ssub -> DDDD_with_dsub2_in_FPR64_lo 86, // dsub3_then_bsub -> DDDD_with_dsub2_in_FPR64_lo 86, // dsub3_then_hsub -> DDDD_with_dsub2_in_FPR64_lo 86, // dsub3_then_ssub -> DDDD_with_dsub2_in_FPR64_lo 86, // dsub2_then_bsub -> DDDD_with_dsub2_in_FPR64_lo 86, // dsub2_then_hsub -> DDDD_with_dsub2_in_FPR64_lo 86, // dsub2_then_ssub -> DDDD_with_dsub2_in_FPR64_lo 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 86, // dsub0_dsub1 -> DDDD_with_dsub2_in_FPR64_lo 86, // dsub0_dsub1_dsub2 -> DDDD_with_dsub2_in_FPR64_lo 86, // dsub1_dsub2 -> DDDD_with_dsub2_in_FPR64_lo 86, // dsub1_dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo 86, // dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DDDD_with_dsub3_in_FPR64_lo 87, // bsub -> DDDD_with_dsub3_in_FPR64_lo 0, // dsub 87, // dsub0 -> DDDD_with_dsub3_in_FPR64_lo 87, // dsub1 -> DDDD_with_dsub3_in_FPR64_lo 87, // dsub2 -> DDDD_with_dsub3_in_FPR64_lo 87, // dsub3 -> DDDD_with_dsub3_in_FPR64_lo 87, // hsub -> DDDD_with_dsub3_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 87, // ssub -> DDDD_with_dsub3_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 87, // dsub1_then_bsub -> DDDD_with_dsub3_in_FPR64_lo 87, // dsub1_then_hsub -> DDDD_with_dsub3_in_FPR64_lo 87, // dsub1_then_ssub -> DDDD_with_dsub3_in_FPR64_lo 87, // dsub3_then_bsub -> DDDD_with_dsub3_in_FPR64_lo 87, // dsub3_then_hsub -> DDDD_with_dsub3_in_FPR64_lo 87, // dsub3_then_ssub -> DDDD_with_dsub3_in_FPR64_lo 87, // dsub2_then_bsub -> DDDD_with_dsub3_in_FPR64_lo 87, // dsub2_then_hsub -> DDDD_with_dsub3_in_FPR64_lo 87, // dsub2_then_ssub -> DDDD_with_dsub3_in_FPR64_lo 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 87, // dsub0_dsub1 -> DDDD_with_dsub3_in_FPR64_lo 87, // dsub0_dsub1_dsub2 -> DDDD_with_dsub3_in_FPR64_lo 87, // dsub1_dsub2 -> DDDD_with_dsub3_in_FPR64_lo 87, // dsub1_dsub2_dsub3 -> DDDD_with_dsub3_in_FPR64_lo 87, // dsub2_dsub3 -> DDDD_with_dsub3_in_FPR64_lo 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 88, // bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 0, // dsub 88, // dsub0 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 88, // dsub1 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 88, // dsub2 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 88, // dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 88, // hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 88, // ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 88, // dsub1_then_bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 88, // dsub1_then_hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 88, // dsub1_then_ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 88, // dsub3_then_bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 88, // dsub3_then_hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 88, // dsub3_then_ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 88, // dsub2_then_bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 88, // dsub2_then_hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 88, // dsub2_then_ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 88, // dsub0_dsub1 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 88, // dsub0_dsub1_dsub2 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 88, // dsub1_dsub2 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 88, // dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 88, // dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 89, // bsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 0, // dsub 89, // dsub0 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 89, // dsub1 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 89, // dsub2 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 89, // dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 89, // hsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 89, // ssub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 89, // dsub1_then_bsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 89, // dsub1_then_hsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 89, // dsub1_then_ssub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 89, // dsub3_then_bsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 89, // dsub3_then_hsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 89, // dsub3_then_ssub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 89, // dsub2_then_bsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 89, // dsub2_then_hsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 89, // dsub2_then_ssub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 89, // dsub0_dsub1 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 89, // dsub0_dsub1_dsub2 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 89, // dsub1_dsub2 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 89, // dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 89, // dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 90, // bsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 0, // dsub 90, // dsub0 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 90, // dsub1 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 90, // dsub2 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 90, // dsub3 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 90, // hsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 90, // ssub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 90, // dsub1_then_bsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 90, // dsub1_then_hsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 90, // dsub1_then_ssub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 90, // dsub3_then_bsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 90, // dsub3_then_hsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 90, // dsub3_then_ssub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 90, // dsub2_then_bsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 90, // dsub2_then_hsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 90, // dsub2_then_ssub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 90, // dsub0_dsub1 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 90, // dsub0_dsub1_dsub2 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 90, // dsub1_dsub2 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 90, // dsub1_dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 90, // dsub2_dsub3 -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 91, // bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 0, // dsub 91, // dsub0 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 91, // dsub1 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 91, // dsub2 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 91, // dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 91, // hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 91, // ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 91, // dsub1_then_bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 91, // dsub1_then_hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 91, // dsub1_then_ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 91, // dsub3_then_bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 91, // dsub3_then_hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 91, // dsub3_then_ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 91, // dsub2_then_bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 91, // dsub2_then_hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 91, // dsub2_then_ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 91, // dsub0_dsub1 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 91, // dsub0_dsub1_dsub2 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 91, // dsub1_dsub2 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 91, // dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 91, // dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 92, // bsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 0, // dsub 92, // dsub0 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 92, // dsub1 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 92, // dsub2 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 92, // dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 92, // hsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 92, // ssub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 92, // dsub1_then_bsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 92, // dsub1_then_hsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 92, // dsub1_then_ssub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 92, // dsub3_then_bsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 92, // dsub3_then_hsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 92, // dsub3_then_ssub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 92, // dsub2_then_bsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 92, // dsub2_then_hsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 92, // dsub2_then_ssub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 92, // dsub0_dsub1 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 92, // dsub0_dsub1_dsub2 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 92, // dsub1_dsub2 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 92, // dsub1_dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 92, // dsub2_dsub3 -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 93, // bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 0, // dsub 93, // dsub0 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 93, // dsub1 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 93, // dsub2 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 93, // dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 93, // hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 93, // ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 93, // dsub1_then_bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 93, // dsub1_then_hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 93, // dsub1_then_ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 93, // dsub3_then_bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 93, // dsub3_then_hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 93, // dsub3_then_ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 93, // dsub2_then_bsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 93, // dsub2_then_hsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 93, // dsub2_then_ssub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 93, // dsub0_dsub1 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 93, // dsub0_dsub1_dsub2 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 93, // dsub1_dsub2 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 93, // dsub1_dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 93, // dsub2_dsub3 -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQ 94, // bsub -> QQ 94, // dsub -> QQ 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 94, // hsub -> QQ 0, // psub0 0, // psub1 94, // qsub0 -> QQ 94, // qsub1 -> QQ 0, // qsub2 0, // qsub3 94, // ssub -> QQ 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 94, // qsub1_then_bsub -> QQ 94, // qsub1_then_dsub -> QQ 94, // qsub1_then_hsub -> QQ 94, // qsub1_then_ssub -> QQ 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 94, // dsub_qsub1_then_dsub -> QQ 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR2 95, // bsub -> ZPR2 95, // dsub -> ZPR2 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 95, // hsub -> ZPR2 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 95, // ssub -> ZPR2 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 95, // zsub -> ZPR2 95, // zsub0 -> ZPR2 95, // zsub1 -> ZPR2 0, // zsub2 0, // zsub3 95, // zsub_hi -> ZPR2 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 95, // zsub1_then_bsub -> ZPR2 95, // zsub1_then_dsub -> ZPR2 95, // zsub1_then_hsub -> ZPR2 95, // zsub1_then_ssub -> ZPR2 95, // zsub1_then_zsub -> ZPR2 95, // zsub1_then_zsub_hi -> ZPR2 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 95, // dsub_zsub1_then_dsub -> ZPR2 95, // zsub_zsub1_then_zsub -> ZPR2 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQ_with_dsub_in_FPR64_lo 96, // bsub -> QQ_with_dsub_in_FPR64_lo 96, // dsub -> QQ_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 96, // hsub -> QQ_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 96, // qsub0 -> QQ_with_dsub_in_FPR64_lo 96, // qsub1 -> QQ_with_dsub_in_FPR64_lo 0, // qsub2 0, // qsub3 96, // ssub -> QQ_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 96, // qsub1_then_bsub -> QQ_with_dsub_in_FPR64_lo 96, // qsub1_then_dsub -> QQ_with_dsub_in_FPR64_lo 96, // qsub1_then_hsub -> QQ_with_dsub_in_FPR64_lo 96, // qsub1_then_ssub -> QQ_with_dsub_in_FPR64_lo 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 96, // dsub_qsub1_then_dsub -> QQ_with_dsub_in_FPR64_lo 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQ_with_qsub1_in_FPR128_lo 97, // bsub -> QQ_with_qsub1_in_FPR128_lo 97, // dsub -> QQ_with_qsub1_in_FPR128_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 97, // hsub -> QQ_with_qsub1_in_FPR128_lo 0, // psub0 0, // psub1 97, // qsub0 -> QQ_with_qsub1_in_FPR128_lo 97, // qsub1 -> QQ_with_qsub1_in_FPR128_lo 0, // qsub2 0, // qsub3 97, // ssub -> QQ_with_qsub1_in_FPR128_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 97, // qsub1_then_bsub -> QQ_with_qsub1_in_FPR128_lo 97, // qsub1_then_dsub -> QQ_with_qsub1_in_FPR128_lo 97, // qsub1_then_hsub -> QQ_with_qsub1_in_FPR128_lo 97, // qsub1_then_ssub -> QQ_with_qsub1_in_FPR128_lo 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 97, // dsub_qsub1_then_dsub -> QQ_with_qsub1_in_FPR128_lo 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR2Mul2 98, // bsub -> ZPR2Mul2 98, // dsub -> ZPR2Mul2 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 98, // hsub -> ZPR2Mul2 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 98, // ssub -> ZPR2Mul2 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 98, // zsub -> ZPR2Mul2 98, // zsub0 -> ZPR2Mul2 98, // zsub1 -> ZPR2Mul2 0, // zsub2 0, // zsub3 98, // zsub_hi -> ZPR2Mul2 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 98, // zsub1_then_bsub -> ZPR2Mul2 98, // zsub1_then_dsub -> ZPR2Mul2 98, // zsub1_then_hsub -> ZPR2Mul2 98, // zsub1_then_ssub -> ZPR2Mul2 98, // zsub1_then_zsub -> ZPR2Mul2 98, // zsub1_then_zsub_hi -> ZPR2Mul2 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 98, // dsub_zsub1_then_dsub -> ZPR2Mul2 98, // zsub_zsub1_then_zsub -> ZPR2Mul2 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR2_with_dsub_in_FPR64_lo 99, // bsub -> ZPR2_with_dsub_in_FPR64_lo 99, // dsub -> ZPR2_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 99, // hsub -> ZPR2_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 99, // ssub -> ZPR2_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 99, // zsub -> ZPR2_with_dsub_in_FPR64_lo 99, // zsub0 -> ZPR2_with_dsub_in_FPR64_lo 99, // zsub1 -> ZPR2_with_dsub_in_FPR64_lo 0, // zsub2 0, // zsub3 99, // zsub_hi -> ZPR2_with_dsub_in_FPR64_lo 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 99, // zsub1_then_bsub -> ZPR2_with_dsub_in_FPR64_lo 99, // zsub1_then_dsub -> ZPR2_with_dsub_in_FPR64_lo 99, // zsub1_then_hsub -> ZPR2_with_dsub_in_FPR64_lo 99, // zsub1_then_ssub -> ZPR2_with_dsub_in_FPR64_lo 99, // zsub1_then_zsub -> ZPR2_with_dsub_in_FPR64_lo 99, // zsub1_then_zsub_hi -> ZPR2_with_dsub_in_FPR64_lo 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 99, // dsub_zsub1_then_dsub -> ZPR2_with_dsub_in_FPR64_lo 99, // zsub_zsub1_then_zsub -> ZPR2_with_dsub_in_FPR64_lo 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR2_with_zsub1_in_ZPR_4b 100, // bsub -> ZPR2_with_zsub1_in_ZPR_4b 100, // dsub -> ZPR2_with_zsub1_in_ZPR_4b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 100, // hsub -> ZPR2_with_zsub1_in_ZPR_4b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 100, // ssub -> ZPR2_with_zsub1_in_ZPR_4b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 100, // zsub -> ZPR2_with_zsub1_in_ZPR_4b 100, // zsub0 -> ZPR2_with_zsub1_in_ZPR_4b 100, // zsub1 -> ZPR2_with_zsub1_in_ZPR_4b 0, // zsub2 0, // zsub3 100, // zsub_hi -> ZPR2_with_zsub1_in_ZPR_4b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 100, // zsub1_then_bsub -> ZPR2_with_zsub1_in_ZPR_4b 100, // zsub1_then_dsub -> ZPR2_with_zsub1_in_ZPR_4b 100, // zsub1_then_hsub -> ZPR2_with_zsub1_in_ZPR_4b 100, // zsub1_then_ssub -> ZPR2_with_zsub1_in_ZPR_4b 100, // zsub1_then_zsub -> ZPR2_with_zsub1_in_ZPR_4b 100, // zsub1_then_zsub_hi -> ZPR2_with_zsub1_in_ZPR_4b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 100, // dsub_zsub1_then_dsub -> ZPR2_with_zsub1_in_ZPR_4b 100, // zsub_zsub1_then_zsub -> ZPR2_with_zsub1_in_ZPR_4b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 101, // bsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 101, // dsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 101, // hsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // psub0 0, // psub1 101, // qsub0 -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 101, // qsub1 -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // qsub2 0, // qsub3 101, // ssub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 101, // qsub1_then_bsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 101, // qsub1_then_dsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 101, // qsub1_then_hsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 101, // qsub1_then_ssub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 101, // dsub_qsub1_then_dsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 102, // bsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 102, // dsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 102, // hsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 102, // ssub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 102, // zsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 102, // zsub0 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 102, // zsub1 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 0, // zsub2 0, // zsub3 102, // zsub_hi -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 102, // zsub1_then_bsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 102, // zsub1_then_dsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 102, // zsub1_then_hsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 102, // zsub1_then_ssub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 102, // zsub1_then_zsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 102, // zsub1_then_zsub_hi -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 102, // dsub_zsub1_then_dsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 102, // zsub_zsub1_then_zsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 103, // bsub -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 103, // dsub -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 103, // hsub -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 103, // ssub -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 103, // zsub -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 103, // zsub0 -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 103, // zsub1 -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub2 0, // zsub3 103, // zsub_hi -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 103, // zsub1_then_bsub -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 103, // zsub1_then_dsub -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 103, // zsub1_then_hsub -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 103, // zsub1_then_ssub -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 103, // zsub1_then_zsub -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 103, // zsub1_then_zsub_hi -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 103, // dsub_zsub1_then_dsub -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 103, // zsub_zsub1_then_zsub -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR2_with_zsub0_in_ZPR_3b 104, // bsub -> ZPR2_with_zsub0_in_ZPR_3b 104, // dsub -> ZPR2_with_zsub0_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 104, // hsub -> ZPR2_with_zsub0_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 104, // ssub -> ZPR2_with_zsub0_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 104, // zsub -> ZPR2_with_zsub0_in_ZPR_3b 104, // zsub0 -> ZPR2_with_zsub0_in_ZPR_3b 104, // zsub1 -> ZPR2_with_zsub0_in_ZPR_3b 0, // zsub2 0, // zsub3 104, // zsub_hi -> ZPR2_with_zsub0_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 104, // zsub1_then_bsub -> ZPR2_with_zsub0_in_ZPR_3b 104, // zsub1_then_dsub -> ZPR2_with_zsub0_in_ZPR_3b 104, // zsub1_then_hsub -> ZPR2_with_zsub0_in_ZPR_3b 104, // zsub1_then_ssub -> ZPR2_with_zsub0_in_ZPR_3b 104, // zsub1_then_zsub -> ZPR2_with_zsub0_in_ZPR_3b 104, // zsub1_then_zsub_hi -> ZPR2_with_zsub0_in_ZPR_3b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 104, // dsub_zsub1_then_dsub -> ZPR2_with_zsub0_in_ZPR_3b 104, // zsub_zsub1_then_zsub -> ZPR2_with_zsub0_in_ZPR_3b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR2_with_zsub1_in_ZPR_3b 105, // bsub -> ZPR2_with_zsub1_in_ZPR_3b 105, // dsub -> ZPR2_with_zsub1_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 105, // hsub -> ZPR2_with_zsub1_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 105, // ssub -> ZPR2_with_zsub1_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 105, // zsub -> ZPR2_with_zsub1_in_ZPR_3b 105, // zsub0 -> ZPR2_with_zsub1_in_ZPR_3b 105, // zsub1 -> ZPR2_with_zsub1_in_ZPR_3b 0, // zsub2 0, // zsub3 105, // zsub_hi -> ZPR2_with_zsub1_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 105, // zsub1_then_bsub -> ZPR2_with_zsub1_in_ZPR_3b 105, // zsub1_then_dsub -> ZPR2_with_zsub1_in_ZPR_3b 105, // zsub1_then_hsub -> ZPR2_with_zsub1_in_ZPR_3b 105, // zsub1_then_ssub -> ZPR2_with_zsub1_in_ZPR_3b 105, // zsub1_then_zsub -> ZPR2_with_zsub1_in_ZPR_3b 105, // zsub1_then_zsub_hi -> ZPR2_with_zsub1_in_ZPR_3b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 105, // dsub_zsub1_then_dsub -> ZPR2_with_zsub1_in_ZPR_3b 105, // zsub_zsub1_then_zsub -> ZPR2_with_zsub1_in_ZPR_3b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 106, // bsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 106, // dsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 106, // hsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 106, // ssub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 106, // zsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 106, // zsub0 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 106, // zsub1 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 0, // zsub2 0, // zsub3 106, // zsub_hi -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 106, // zsub1_then_bsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 106, // zsub1_then_dsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 106, // zsub1_then_hsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 106, // zsub1_then_ssub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 106, // zsub1_then_zsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 106, // zsub1_then_zsub_hi -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 106, // dsub_zsub1_then_dsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 106, // zsub_zsub1_then_zsub -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 107, // bsub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 107, // dsub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 107, // hsub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 107, // ssub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 107, // zsub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 107, // zsub0 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 107, // zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub2 0, // zsub3 107, // zsub_hi -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 107, // zsub1_then_bsub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 107, // zsub1_then_dsub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 107, // zsub1_then_hsub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 107, // zsub1_then_ssub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 107, // zsub1_then_zsub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 107, // zsub1_then_zsub_hi -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 107, // dsub_zsub1_then_dsub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 107, // zsub_zsub1_then_zsub -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR2Strided 108, // bsub -> ZPR2Strided 108, // dsub -> ZPR2Strided 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 108, // hsub -> ZPR2Strided 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 108, // ssub -> ZPR2Strided 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 108, // zsub -> ZPR2Strided 108, // zsub0 -> ZPR2Strided 108, // zsub1 -> ZPR2Strided 0, // zsub2 0, // zsub3 108, // zsub_hi -> ZPR2Strided 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 108, // zsub1_then_bsub -> ZPR2Strided 108, // zsub1_then_dsub -> ZPR2Strided 108, // zsub1_then_hsub -> ZPR2Strided 108, // zsub1_then_ssub -> ZPR2Strided 108, // zsub1_then_zsub -> ZPR2Strided 108, // zsub1_then_zsub_hi -> ZPR2Strided 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // MPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 109, // zasubq0 -> MPR64 109, // zasubq1 -> MPR64 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR2Strided_with_dsub_in_FPR64_lo 110, // bsub -> ZPR2Strided_with_dsub_in_FPR64_lo 110, // dsub -> ZPR2Strided_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 110, // hsub -> ZPR2Strided_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 110, // ssub -> ZPR2Strided_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 110, // zsub -> ZPR2Strided_with_dsub_in_FPR64_lo 110, // zsub0 -> ZPR2Strided_with_dsub_in_FPR64_lo 110, // zsub1 -> ZPR2Strided_with_dsub_in_FPR64_lo 0, // zsub2 0, // zsub3 110, // zsub_hi -> ZPR2Strided_with_dsub_in_FPR64_lo 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 110, // zsub1_then_bsub -> ZPR2Strided_with_dsub_in_FPR64_lo 110, // zsub1_then_dsub -> ZPR2Strided_with_dsub_in_FPR64_lo 110, // zsub1_then_hsub -> ZPR2Strided_with_dsub_in_FPR64_lo 110, // zsub1_then_ssub -> ZPR2Strided_with_dsub_in_FPR64_lo 110, // zsub1_then_zsub -> ZPR2Strided_with_dsub_in_FPR64_lo 110, // zsub1_then_zsub_hi -> ZPR2Strided_with_dsub_in_FPR64_lo 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQQ 111, // bsub -> QQQ 111, // dsub -> QQQ 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 111, // hsub -> QQQ 0, // psub0 0, // psub1 111, // qsub0 -> QQQ 111, // qsub1 -> QQQ 111, // qsub2 -> QQQ 0, // qsub3 111, // ssub -> QQQ 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 111, // qsub1_then_bsub -> QQQ 111, // qsub1_then_dsub -> QQQ 111, // qsub1_then_hsub -> QQQ 111, // qsub1_then_ssub -> QQQ 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 111, // qsub2_then_bsub -> QQQ 111, // qsub2_then_dsub -> QQQ 111, // qsub2_then_hsub -> QQQ 111, // qsub2_then_ssub -> QQQ 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 111, // dsub_qsub1_then_dsub -> QQQ 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 111, // dsub_qsub1_then_dsub_qsub2_then_dsub -> QQQ 111, // qsub0_qsub1 -> QQQ 0, // qsub0_qsub1_qsub2 111, // qsub1_qsub2 -> QQQ 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 111, // qsub1_then_dsub_qsub2_then_dsub -> QQQ 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3 112, // bsub -> ZPR3 112, // dsub -> ZPR3 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 112, // hsub -> ZPR3 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 112, // ssub -> ZPR3 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 112, // zsub -> ZPR3 112, // zsub0 -> ZPR3 112, // zsub1 -> ZPR3 112, // zsub2 -> ZPR3 0, // zsub3 112, // zsub_hi -> ZPR3 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 112, // zsub1_then_bsub -> ZPR3 112, // zsub1_then_dsub -> ZPR3 112, // zsub1_then_hsub -> ZPR3 112, // zsub1_then_ssub -> ZPR3 112, // zsub1_then_zsub -> ZPR3 112, // zsub1_then_zsub_hi -> ZPR3 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 112, // zsub2_then_bsub -> ZPR3 112, // zsub2_then_dsub -> ZPR3 112, // zsub2_then_hsub -> ZPR3 112, // zsub2_then_ssub -> ZPR3 112, // zsub2_then_zsub -> ZPR3 112, // zsub2_then_zsub_hi -> ZPR3 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 112, // dsub_zsub1_then_dsub -> ZPR3 112, // zsub_zsub1_then_zsub -> ZPR3 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 112, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 112, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3 112, // zsub0_zsub1 -> ZPR3 0, // zsub0_zsub1_zsub2 112, // zsub1_zsub2 -> ZPR3 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 112, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 112, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQQ_with_dsub_in_FPR64_lo 113, // bsub -> QQQ_with_dsub_in_FPR64_lo 113, // dsub -> QQQ_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 113, // hsub -> QQQ_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 113, // qsub0 -> QQQ_with_dsub_in_FPR64_lo 113, // qsub1 -> QQQ_with_dsub_in_FPR64_lo 113, // qsub2 -> QQQ_with_dsub_in_FPR64_lo 0, // qsub3 113, // ssub -> QQQ_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 113, // qsub1_then_bsub -> QQQ_with_dsub_in_FPR64_lo 113, // qsub1_then_dsub -> QQQ_with_dsub_in_FPR64_lo 113, // qsub1_then_hsub -> QQQ_with_dsub_in_FPR64_lo 113, // qsub1_then_ssub -> QQQ_with_dsub_in_FPR64_lo 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 113, // qsub2_then_bsub -> QQQ_with_dsub_in_FPR64_lo 113, // qsub2_then_dsub -> QQQ_with_dsub_in_FPR64_lo 113, // qsub2_then_hsub -> QQQ_with_dsub_in_FPR64_lo 113, // qsub2_then_ssub -> QQQ_with_dsub_in_FPR64_lo 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 113, // dsub_qsub1_then_dsub -> QQQ_with_dsub_in_FPR64_lo 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 113, // dsub_qsub1_then_dsub_qsub2_then_dsub -> QQQ_with_dsub_in_FPR64_lo 113, // qsub0_qsub1 -> QQQ_with_dsub_in_FPR64_lo 0, // qsub0_qsub1_qsub2 113, // qsub1_qsub2 -> QQQ_with_dsub_in_FPR64_lo 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 113, // qsub1_then_dsub_qsub2_then_dsub -> QQQ_with_dsub_in_FPR64_lo 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQQ_with_qsub1_in_FPR128_lo 114, // bsub -> QQQ_with_qsub1_in_FPR128_lo 114, // dsub -> QQQ_with_qsub1_in_FPR128_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 114, // hsub -> QQQ_with_qsub1_in_FPR128_lo 0, // psub0 0, // psub1 114, // qsub0 -> QQQ_with_qsub1_in_FPR128_lo 114, // qsub1 -> QQQ_with_qsub1_in_FPR128_lo 114, // qsub2 -> QQQ_with_qsub1_in_FPR128_lo 0, // qsub3 114, // ssub -> QQQ_with_qsub1_in_FPR128_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 114, // qsub1_then_bsub -> QQQ_with_qsub1_in_FPR128_lo 114, // qsub1_then_dsub -> QQQ_with_qsub1_in_FPR128_lo 114, // qsub1_then_hsub -> QQQ_with_qsub1_in_FPR128_lo 114, // qsub1_then_ssub -> QQQ_with_qsub1_in_FPR128_lo 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 114, // qsub2_then_bsub -> QQQ_with_qsub1_in_FPR128_lo 114, // qsub2_then_dsub -> QQQ_with_qsub1_in_FPR128_lo 114, // qsub2_then_hsub -> QQQ_with_qsub1_in_FPR128_lo 114, // qsub2_then_ssub -> QQQ_with_qsub1_in_FPR128_lo 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 114, // dsub_qsub1_then_dsub -> QQQ_with_qsub1_in_FPR128_lo 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 114, // dsub_qsub1_then_dsub_qsub2_then_dsub -> QQQ_with_qsub1_in_FPR128_lo 114, // qsub0_qsub1 -> QQQ_with_qsub1_in_FPR128_lo 0, // qsub0_qsub1_qsub2 114, // qsub1_qsub2 -> QQQ_with_qsub1_in_FPR128_lo 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 114, // qsub1_then_dsub_qsub2_then_dsub -> QQQ_with_qsub1_in_FPR128_lo 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQQ_with_qsub2_in_FPR128_lo 115, // bsub -> QQQ_with_qsub2_in_FPR128_lo 115, // dsub -> QQQ_with_qsub2_in_FPR128_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 115, // hsub -> QQQ_with_qsub2_in_FPR128_lo 0, // psub0 0, // psub1 115, // qsub0 -> QQQ_with_qsub2_in_FPR128_lo 115, // qsub1 -> QQQ_with_qsub2_in_FPR128_lo 115, // qsub2 -> QQQ_with_qsub2_in_FPR128_lo 0, // qsub3 115, // ssub -> QQQ_with_qsub2_in_FPR128_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 115, // qsub1_then_bsub -> QQQ_with_qsub2_in_FPR128_lo 115, // qsub1_then_dsub -> QQQ_with_qsub2_in_FPR128_lo 115, // qsub1_then_hsub -> QQQ_with_qsub2_in_FPR128_lo 115, // qsub1_then_ssub -> QQQ_with_qsub2_in_FPR128_lo 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 115, // qsub2_then_bsub -> QQQ_with_qsub2_in_FPR128_lo 115, // qsub2_then_dsub -> QQQ_with_qsub2_in_FPR128_lo 115, // qsub2_then_hsub -> QQQ_with_qsub2_in_FPR128_lo 115, // qsub2_then_ssub -> QQQ_with_qsub2_in_FPR128_lo 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 115, // dsub_qsub1_then_dsub -> QQQ_with_qsub2_in_FPR128_lo 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 115, // dsub_qsub1_then_dsub_qsub2_then_dsub -> QQQ_with_qsub2_in_FPR128_lo 115, // qsub0_qsub1 -> QQQ_with_qsub2_in_FPR128_lo 0, // qsub0_qsub1_qsub2 115, // qsub1_qsub2 -> QQQ_with_qsub2_in_FPR128_lo 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 115, // qsub1_then_dsub_qsub2_then_dsub -> QQQ_with_qsub2_in_FPR128_lo 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_dsub_in_FPR64_lo 116, // bsub -> ZPR3_with_dsub_in_FPR64_lo 116, // dsub -> ZPR3_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 116, // hsub -> ZPR3_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 116, // ssub -> ZPR3_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 116, // zsub -> ZPR3_with_dsub_in_FPR64_lo 116, // zsub0 -> ZPR3_with_dsub_in_FPR64_lo 116, // zsub1 -> ZPR3_with_dsub_in_FPR64_lo 116, // zsub2 -> ZPR3_with_dsub_in_FPR64_lo 0, // zsub3 116, // zsub_hi -> ZPR3_with_dsub_in_FPR64_lo 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 116, // zsub1_then_bsub -> ZPR3_with_dsub_in_FPR64_lo 116, // zsub1_then_dsub -> ZPR3_with_dsub_in_FPR64_lo 116, // zsub1_then_hsub -> ZPR3_with_dsub_in_FPR64_lo 116, // zsub1_then_ssub -> ZPR3_with_dsub_in_FPR64_lo 116, // zsub1_then_zsub -> ZPR3_with_dsub_in_FPR64_lo 116, // zsub1_then_zsub_hi -> ZPR3_with_dsub_in_FPR64_lo 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 116, // zsub2_then_bsub -> ZPR3_with_dsub_in_FPR64_lo 116, // zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo 116, // zsub2_then_hsub -> ZPR3_with_dsub_in_FPR64_lo 116, // zsub2_then_ssub -> ZPR3_with_dsub_in_FPR64_lo 116, // zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo 116, // zsub2_then_zsub_hi -> ZPR3_with_dsub_in_FPR64_lo 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 116, // dsub_zsub1_then_dsub -> ZPR3_with_dsub_in_FPR64_lo 116, // zsub_zsub1_then_zsub -> ZPR3_with_dsub_in_FPR64_lo 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 116, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 116, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo 116, // zsub0_zsub1 -> ZPR3_with_dsub_in_FPR64_lo 0, // zsub0_zsub1_zsub2 116, // zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 116, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 116, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 117, // bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 117, // dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 117, // hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 117, // ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 117, // zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 117, // zsub0 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 117, // zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 117, // zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub3 117, // zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 117, // zsub1_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 117, // zsub1_then_dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 117, // zsub1_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 117, // zsub1_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 117, // zsub1_then_zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 117, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 117, // zsub2_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 117, // zsub2_then_dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 117, // zsub2_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 117, // zsub2_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 117, // zsub2_then_zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 117, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 117, // dsub_zsub1_then_dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 117, // zsub_zsub1_then_zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 117, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 117, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 117, // zsub0_zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub0_zsub1_zsub2 117, // zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 117, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 117, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_zsub1_in_ZPR_4b 118, // bsub -> ZPR3_with_zsub1_in_ZPR_4b 118, // dsub -> ZPR3_with_zsub1_in_ZPR_4b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 118, // hsub -> ZPR3_with_zsub1_in_ZPR_4b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 118, // ssub -> ZPR3_with_zsub1_in_ZPR_4b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 118, // zsub -> ZPR3_with_zsub1_in_ZPR_4b 118, // zsub0 -> ZPR3_with_zsub1_in_ZPR_4b 118, // zsub1 -> ZPR3_with_zsub1_in_ZPR_4b 118, // zsub2 -> ZPR3_with_zsub1_in_ZPR_4b 0, // zsub3 118, // zsub_hi -> ZPR3_with_zsub1_in_ZPR_4b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 118, // zsub1_then_bsub -> ZPR3_with_zsub1_in_ZPR_4b 118, // zsub1_then_dsub -> ZPR3_with_zsub1_in_ZPR_4b 118, // zsub1_then_hsub -> ZPR3_with_zsub1_in_ZPR_4b 118, // zsub1_then_ssub -> ZPR3_with_zsub1_in_ZPR_4b 118, // zsub1_then_zsub -> ZPR3_with_zsub1_in_ZPR_4b 118, // zsub1_then_zsub_hi -> ZPR3_with_zsub1_in_ZPR_4b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 118, // zsub2_then_bsub -> ZPR3_with_zsub1_in_ZPR_4b 118, // zsub2_then_dsub -> ZPR3_with_zsub1_in_ZPR_4b 118, // zsub2_then_hsub -> ZPR3_with_zsub1_in_ZPR_4b 118, // zsub2_then_ssub -> ZPR3_with_zsub1_in_ZPR_4b 118, // zsub2_then_zsub -> ZPR3_with_zsub1_in_ZPR_4b 118, // zsub2_then_zsub_hi -> ZPR3_with_zsub1_in_ZPR_4b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 118, // dsub_zsub1_then_dsub -> ZPR3_with_zsub1_in_ZPR_4b 118, // zsub_zsub1_then_zsub -> ZPR3_with_zsub1_in_ZPR_4b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 118, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub1_in_ZPR_4b 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 118, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub1_in_ZPR_4b 118, // zsub0_zsub1 -> ZPR3_with_zsub1_in_ZPR_4b 0, // zsub0_zsub1_zsub2 118, // zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPR_4b 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 118, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub1_in_ZPR_4b 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 118, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub1_in_ZPR_4b 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 119, // bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 119, // dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 119, // hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 119, // ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 119, // zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 119, // zsub0 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 119, // zsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 119, // zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub3 119, // zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 119, // zsub1_then_bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 119, // zsub1_then_dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 119, // zsub1_then_hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 119, // zsub1_then_ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 119, // zsub1_then_zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 119, // zsub1_then_zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 119, // zsub2_then_bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 119, // zsub2_then_dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 119, // zsub2_then_hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 119, // zsub2_then_ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 119, // zsub2_then_zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 119, // zsub2_then_zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 119, // dsub_zsub1_then_dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 119, // zsub_zsub1_then_zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 119, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 119, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 119, // zsub0_zsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub0_zsub1_zsub2 119, // zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 119, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 119, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_zsub2_in_ZPR_4b 120, // bsub -> ZPR3_with_zsub2_in_ZPR_4b 120, // dsub -> ZPR3_with_zsub2_in_ZPR_4b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 120, // hsub -> ZPR3_with_zsub2_in_ZPR_4b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 120, // ssub -> ZPR3_with_zsub2_in_ZPR_4b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 120, // zsub -> ZPR3_with_zsub2_in_ZPR_4b 120, // zsub0 -> ZPR3_with_zsub2_in_ZPR_4b 120, // zsub1 -> ZPR3_with_zsub2_in_ZPR_4b 120, // zsub2 -> ZPR3_with_zsub2_in_ZPR_4b 0, // zsub3 120, // zsub_hi -> ZPR3_with_zsub2_in_ZPR_4b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 120, // zsub1_then_bsub -> ZPR3_with_zsub2_in_ZPR_4b 120, // zsub1_then_dsub -> ZPR3_with_zsub2_in_ZPR_4b 120, // zsub1_then_hsub -> ZPR3_with_zsub2_in_ZPR_4b 120, // zsub1_then_ssub -> ZPR3_with_zsub2_in_ZPR_4b 120, // zsub1_then_zsub -> ZPR3_with_zsub2_in_ZPR_4b 120, // zsub1_then_zsub_hi -> ZPR3_with_zsub2_in_ZPR_4b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 120, // zsub2_then_bsub -> ZPR3_with_zsub2_in_ZPR_4b 120, // zsub2_then_dsub -> ZPR3_with_zsub2_in_ZPR_4b 120, // zsub2_then_hsub -> ZPR3_with_zsub2_in_ZPR_4b 120, // zsub2_then_ssub -> ZPR3_with_zsub2_in_ZPR_4b 120, // zsub2_then_zsub -> ZPR3_with_zsub2_in_ZPR_4b 120, // zsub2_then_zsub_hi -> ZPR3_with_zsub2_in_ZPR_4b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 120, // dsub_zsub1_then_dsub -> ZPR3_with_zsub2_in_ZPR_4b 120, // zsub_zsub1_then_zsub -> ZPR3_with_zsub2_in_ZPR_4b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 120, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub2_in_ZPR_4b 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 120, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub2_in_ZPR_4b 120, // zsub0_zsub1 -> ZPR3_with_zsub2_in_ZPR_4b 0, // zsub0_zsub1_zsub2 120, // zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPR_4b 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 120, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub2_in_ZPR_4b 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 120, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub2_in_ZPR_4b 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 121, // bsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 121, // dsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 121, // hsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 0, // psub0 0, // psub1 121, // qsub0 -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 121, // qsub1 -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 121, // qsub2 -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 0, // qsub3 121, // ssub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 121, // qsub1_then_bsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 121, // qsub1_then_dsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 121, // qsub1_then_hsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 121, // qsub1_then_ssub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 121, // qsub2_then_bsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 121, // qsub2_then_dsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 121, // qsub2_then_hsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 121, // qsub2_then_ssub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 121, // dsub_qsub1_then_dsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 121, // dsub_qsub1_then_dsub_qsub2_then_dsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 121, // qsub0_qsub1 -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 0, // qsub0_qsub1_qsub2 121, // qsub1_qsub2 -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 121, // qsub1_then_dsub_qsub2_then_dsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 122, // bsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 122, // dsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 122, // hsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // psub0 0, // psub1 122, // qsub0 -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 122, // qsub1 -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 122, // qsub2 -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // qsub3 122, // ssub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 122, // qsub1_then_bsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 122, // qsub1_then_dsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 122, // qsub1_then_hsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 122, // qsub1_then_ssub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 122, // qsub2_then_bsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 122, // qsub2_then_dsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 122, // qsub2_then_hsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 122, // qsub2_then_ssub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 122, // dsub_qsub1_then_dsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 122, // dsub_qsub1_then_dsub_qsub2_then_dsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 122, // qsub0_qsub1 -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // qsub0_qsub1_qsub2 122, // qsub1_qsub2 -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 122, // qsub1_then_dsub_qsub2_then_dsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 123, // bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 123, // dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 123, // hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 123, // ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 123, // zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 123, // zsub0 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 123, // zsub1 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 123, // zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 0, // zsub3 123, // zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 123, // zsub1_then_bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 123, // zsub1_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 123, // zsub1_then_hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 123, // zsub1_then_ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 123, // zsub1_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 123, // zsub1_then_zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 123, // zsub2_then_bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 123, // zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 123, // zsub2_then_hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 123, // zsub2_then_ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 123, // zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 123, // zsub2_then_zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 123, // dsub_zsub1_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 123, // zsub_zsub1_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 123, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 123, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 123, // zsub0_zsub1 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 0, // zsub0_zsub1_zsub2 123, // zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 123, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 123, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 124, // bsub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 124, // dsub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 124, // hsub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 124, // ssub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 124, // zsub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 124, // zsub0 -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 124, // zsub1 -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 124, // zsub2 -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 0, // zsub3 124, // zsub_hi -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 124, // zsub1_then_bsub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 124, // zsub1_then_dsub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 124, // zsub1_then_hsub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 124, // zsub1_then_ssub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 124, // zsub1_then_zsub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 124, // zsub1_then_zsub_hi -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 124, // zsub2_then_bsub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 124, // zsub2_then_dsub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 124, // zsub2_then_hsub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 124, // zsub2_then_ssub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 124, // zsub2_then_zsub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 124, // zsub2_then_zsub_hi -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 124, // dsub_zsub1_then_dsub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 124, // zsub_zsub1_then_zsub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 124, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 124, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 124, // zsub0_zsub1 -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 0, // zsub0_zsub1_zsub2 124, // zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 124, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 124, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 125, // bsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 125, // dsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 125, // hsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // psub0 0, // psub1 125, // qsub0 -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 125, // qsub1 -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 125, // qsub2 -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // qsub3 125, // ssub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 125, // qsub1_then_bsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 125, // qsub1_then_dsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 125, // qsub1_then_hsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 125, // qsub1_then_ssub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 125, // qsub2_then_bsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 125, // qsub2_then_dsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 125, // qsub2_then_hsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 125, // qsub2_then_ssub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 125, // dsub_qsub1_then_dsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 125, // dsub_qsub1_then_dsub_qsub2_then_dsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 125, // qsub0_qsub1 -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // qsub0_qsub1_qsub2 125, // qsub1_qsub2 -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 125, // qsub1_then_dsub_qsub2_then_dsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 126, // bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 126, // dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 126, // hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 126, // ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 126, // zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 126, // zsub0 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 126, // zsub1 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 126, // zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 0, // zsub3 126, // zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 126, // zsub1_then_bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 126, // zsub1_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 126, // zsub1_then_hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 126, // zsub1_then_ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 126, // zsub1_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 126, // zsub1_then_zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 126, // zsub2_then_bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 126, // zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 126, // zsub2_then_hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 126, // zsub2_then_ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 126, // zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 126, // zsub2_then_zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 126, // dsub_zsub1_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 126, // zsub_zsub1_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 126, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 126, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 126, // zsub0_zsub1 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 0, // zsub0_zsub1_zsub2 126, // zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 126, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 126, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 127, // bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 127, // dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 127, // hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 127, // ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 127, // zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 127, // zsub0 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 127, // zsub1 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 127, // zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub3 127, // zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 127, // zsub1_then_bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 127, // zsub1_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 127, // zsub1_then_hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 127, // zsub1_then_ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 127, // zsub1_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 127, // zsub1_then_zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 127, // zsub2_then_bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 127, // zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 127, // zsub2_then_hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 127, // zsub2_then_ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 127, // zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 127, // zsub2_then_zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 127, // dsub_zsub1_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 127, // zsub_zsub1_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 127, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 127, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 127, // zsub0_zsub1 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub0_zsub1_zsub2 127, // zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 127, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 127, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_zsub0_in_ZPR_3b 128, // bsub -> ZPR3_with_zsub0_in_ZPR_3b 128, // dsub -> ZPR3_with_zsub0_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 128, // hsub -> ZPR3_with_zsub0_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 128, // ssub -> ZPR3_with_zsub0_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 128, // zsub -> ZPR3_with_zsub0_in_ZPR_3b 128, // zsub0 -> ZPR3_with_zsub0_in_ZPR_3b 128, // zsub1 -> ZPR3_with_zsub0_in_ZPR_3b 128, // zsub2 -> ZPR3_with_zsub0_in_ZPR_3b 0, // zsub3 128, // zsub_hi -> ZPR3_with_zsub0_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 128, // zsub1_then_bsub -> ZPR3_with_zsub0_in_ZPR_3b 128, // zsub1_then_dsub -> ZPR3_with_zsub0_in_ZPR_3b 128, // zsub1_then_hsub -> ZPR3_with_zsub0_in_ZPR_3b 128, // zsub1_then_ssub -> ZPR3_with_zsub0_in_ZPR_3b 128, // zsub1_then_zsub -> ZPR3_with_zsub0_in_ZPR_3b 128, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_3b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 128, // zsub2_then_bsub -> ZPR3_with_zsub0_in_ZPR_3b 128, // zsub2_then_dsub -> ZPR3_with_zsub0_in_ZPR_3b 128, // zsub2_then_hsub -> ZPR3_with_zsub0_in_ZPR_3b 128, // zsub2_then_ssub -> ZPR3_with_zsub0_in_ZPR_3b 128, // zsub2_then_zsub -> ZPR3_with_zsub0_in_ZPR_3b 128, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 128, // dsub_zsub1_then_dsub -> ZPR3_with_zsub0_in_ZPR_3b 128, // zsub_zsub1_then_zsub -> ZPR3_with_zsub0_in_ZPR_3b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 128, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub0_in_ZPR_3b 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 128, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub0_in_ZPR_3b 128, // zsub0_zsub1 -> ZPR3_with_zsub0_in_ZPR_3b 0, // zsub0_zsub1_zsub2 128, // zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_3b 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 128, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub0_in_ZPR_3b 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 128, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub0_in_ZPR_3b 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 129, // hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 129, // ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 129, // zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // zsub0 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub3 129, // zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 129, // zsub1_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // zsub1_then_dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // zsub1_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // zsub1_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // zsub1_then_zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 129, // zsub2_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // zsub2_then_dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // zsub2_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // zsub2_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // zsub2_then_zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 129, // dsub_zsub1_then_dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // zsub_zsub1_then_zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 129, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 129, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // zsub0_zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub0_zsub1_zsub2 129, // zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 129, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 129, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_zsub1_in_ZPR_3b 130, // bsub -> ZPR3_with_zsub1_in_ZPR_3b 130, // dsub -> ZPR3_with_zsub1_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 130, // hsub -> ZPR3_with_zsub1_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 130, // ssub -> ZPR3_with_zsub1_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 130, // zsub -> ZPR3_with_zsub1_in_ZPR_3b 130, // zsub0 -> ZPR3_with_zsub1_in_ZPR_3b 130, // zsub1 -> ZPR3_with_zsub1_in_ZPR_3b 130, // zsub2 -> ZPR3_with_zsub1_in_ZPR_3b 0, // zsub3 130, // zsub_hi -> ZPR3_with_zsub1_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 130, // zsub1_then_bsub -> ZPR3_with_zsub1_in_ZPR_3b 130, // zsub1_then_dsub -> ZPR3_with_zsub1_in_ZPR_3b 130, // zsub1_then_hsub -> ZPR3_with_zsub1_in_ZPR_3b 130, // zsub1_then_ssub -> ZPR3_with_zsub1_in_ZPR_3b 130, // zsub1_then_zsub -> ZPR3_with_zsub1_in_ZPR_3b 130, // zsub1_then_zsub_hi -> ZPR3_with_zsub1_in_ZPR_3b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 130, // zsub2_then_bsub -> ZPR3_with_zsub1_in_ZPR_3b 130, // zsub2_then_dsub -> ZPR3_with_zsub1_in_ZPR_3b 130, // zsub2_then_hsub -> ZPR3_with_zsub1_in_ZPR_3b 130, // zsub2_then_ssub -> ZPR3_with_zsub1_in_ZPR_3b 130, // zsub2_then_zsub -> ZPR3_with_zsub1_in_ZPR_3b 130, // zsub2_then_zsub_hi -> ZPR3_with_zsub1_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 130, // dsub_zsub1_then_dsub -> ZPR3_with_zsub1_in_ZPR_3b 130, // zsub_zsub1_then_zsub -> ZPR3_with_zsub1_in_ZPR_3b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 130, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub1_in_ZPR_3b 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 130, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub1_in_ZPR_3b 130, // zsub0_zsub1 -> ZPR3_with_zsub1_in_ZPR_3b 0, // zsub0_zsub1_zsub2 130, // zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPR_3b 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 130, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub1_in_ZPR_3b 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 130, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub1_in_ZPR_3b 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 131, // bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 131, // dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 131, // hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 131, // ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 131, // zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 131, // zsub0 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 131, // zsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 131, // zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub3 131, // zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 131, // zsub1_then_bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 131, // zsub1_then_dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 131, // zsub1_then_hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 131, // zsub1_then_ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 131, // zsub1_then_zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 131, // zsub1_then_zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 131, // zsub2_then_bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 131, // zsub2_then_dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 131, // zsub2_then_hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 131, // zsub2_then_ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 131, // zsub2_then_zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 131, // zsub2_then_zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 131, // dsub_zsub1_then_dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 131, // zsub_zsub1_then_zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 131, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 131, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 131, // zsub0_zsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub0_zsub1_zsub2 131, // zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 131, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 131, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_zsub2_in_ZPR_3b 132, // bsub -> ZPR3_with_zsub2_in_ZPR_3b 132, // dsub -> ZPR3_with_zsub2_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 132, // hsub -> ZPR3_with_zsub2_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 132, // ssub -> ZPR3_with_zsub2_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 132, // zsub -> ZPR3_with_zsub2_in_ZPR_3b 132, // zsub0 -> ZPR3_with_zsub2_in_ZPR_3b 132, // zsub1 -> ZPR3_with_zsub2_in_ZPR_3b 132, // zsub2 -> ZPR3_with_zsub2_in_ZPR_3b 0, // zsub3 132, // zsub_hi -> ZPR3_with_zsub2_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 132, // zsub1_then_bsub -> ZPR3_with_zsub2_in_ZPR_3b 132, // zsub1_then_dsub -> ZPR3_with_zsub2_in_ZPR_3b 132, // zsub1_then_hsub -> ZPR3_with_zsub2_in_ZPR_3b 132, // zsub1_then_ssub -> ZPR3_with_zsub2_in_ZPR_3b 132, // zsub1_then_zsub -> ZPR3_with_zsub2_in_ZPR_3b 132, // zsub1_then_zsub_hi -> ZPR3_with_zsub2_in_ZPR_3b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 132, // zsub2_then_bsub -> ZPR3_with_zsub2_in_ZPR_3b 132, // zsub2_then_dsub -> ZPR3_with_zsub2_in_ZPR_3b 132, // zsub2_then_hsub -> ZPR3_with_zsub2_in_ZPR_3b 132, // zsub2_then_ssub -> ZPR3_with_zsub2_in_ZPR_3b 132, // zsub2_then_zsub -> ZPR3_with_zsub2_in_ZPR_3b 132, // zsub2_then_zsub_hi -> ZPR3_with_zsub2_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 132, // dsub_zsub1_then_dsub -> ZPR3_with_zsub2_in_ZPR_3b 132, // zsub_zsub1_then_zsub -> ZPR3_with_zsub2_in_ZPR_3b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 132, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub2_in_ZPR_3b 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 132, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub2_in_ZPR_3b 132, // zsub0_zsub1 -> ZPR3_with_zsub2_in_ZPR_3b 0, // zsub0_zsub1_zsub2 132, // zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPR_3b 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 132, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub2_in_ZPR_3b 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 132, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub2_in_ZPR_3b 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 133, // bsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 133, // dsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 133, // hsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 133, // ssub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 133, // zsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 133, // zsub0 -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 133, // zsub1 -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 133, // zsub2 -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub3 133, // zsub_hi -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 133, // zsub1_then_bsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 133, // zsub1_then_dsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 133, // zsub1_then_hsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 133, // zsub1_then_ssub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 133, // zsub1_then_zsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 133, // zsub1_then_zsub_hi -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 133, // zsub2_then_bsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 133, // zsub2_then_dsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 133, // zsub2_then_hsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 133, // zsub2_then_ssub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 133, // zsub2_then_zsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 133, // zsub2_then_zsub_hi -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 133, // dsub_zsub1_then_dsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 133, // zsub_zsub1_then_zsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 133, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 133, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 133, // zsub0_zsub1 -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub0_zsub1_zsub2 133, // zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 133, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 133, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 134, // bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 134, // dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 134, // hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 134, // ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 134, // zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 134, // zsub0 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 134, // zsub1 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 134, // zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 0, // zsub3 134, // zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 134, // zsub1_then_bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 134, // zsub1_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 134, // zsub1_then_hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 134, // zsub1_then_ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 134, // zsub1_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 134, // zsub1_then_zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 134, // zsub2_then_bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 134, // zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 134, // zsub2_then_hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 134, // zsub2_then_ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 134, // zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 134, // zsub2_then_zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 134, // dsub_zsub1_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 134, // zsub_zsub1_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 134, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 134, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 134, // zsub0_zsub1 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 0, // zsub0_zsub1_zsub2 134, // zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 134, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 134, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 135, // bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 135, // dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 135, // hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 135, // ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 135, // zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 135, // zsub0 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 135, // zsub1 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 135, // zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub3 135, // zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 135, // zsub1_then_bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 135, // zsub1_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 135, // zsub1_then_hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 135, // zsub1_then_ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 135, // zsub1_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 135, // zsub1_then_zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 135, // zsub2_then_bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 135, // zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 135, // zsub2_then_hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 135, // zsub2_then_ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 135, // zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 135, // zsub2_then_zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 135, // dsub_zsub1_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 135, // zsub_zsub1_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 135, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 135, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 135, // zsub0_zsub1 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub0_zsub1_zsub2 135, // zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 135, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 135, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 136, // bsub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 136, // dsub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 136, // hsub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 136, // ssub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 136, // zsub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 136, // zsub0 -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 136, // zsub1 -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 136, // zsub2 -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 0, // zsub3 136, // zsub_hi -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 136, // zsub1_then_bsub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 136, // zsub1_then_dsub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 136, // zsub1_then_hsub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 136, // zsub1_then_ssub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 136, // zsub1_then_zsub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 136, // zsub1_then_zsub_hi -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 136, // zsub2_then_bsub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 136, // zsub2_then_dsub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 136, // zsub2_then_hsub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 136, // zsub2_then_ssub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 136, // zsub2_then_zsub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 136, // zsub2_then_zsub_hi -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 136, // dsub_zsub1_then_dsub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 136, // zsub_zsub1_then_zsub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 136, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 136, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 136, // zsub0_zsub1 -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 0, // zsub0_zsub1_zsub2 136, // zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 136, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 136, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // bsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // dsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 137, // hsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 137, // ssub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 137, // zsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // zsub0 -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // zsub1 -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // zsub2 -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub3 137, // zsub_hi -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 137, // zsub1_then_bsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // zsub1_then_dsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // zsub1_then_hsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // zsub1_then_ssub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // zsub1_then_zsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // zsub1_then_zsub_hi -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 137, // zsub2_then_bsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // zsub2_then_dsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // zsub2_then_hsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // zsub2_then_ssub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // zsub2_then_zsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // zsub2_then_zsub_hi -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 137, // dsub_zsub1_then_dsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // zsub_zsub1_then_zsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 137, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 137, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // zsub0_zsub1 -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub0_zsub1_zsub2 137, // zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 137, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 137, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 138, // bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 138, // dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 138, // hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 138, // ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 138, // zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 138, // zsub0 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 138, // zsub1 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 138, // zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 0, // zsub3 138, // zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 138, // zsub1_then_bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 138, // zsub1_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 138, // zsub1_then_hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 138, // zsub1_then_ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 138, // zsub1_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 138, // zsub1_then_zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 138, // zsub2_then_bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 138, // zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 138, // zsub2_then_hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 138, // zsub2_then_ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 138, // zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 138, // zsub2_then_zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 138, // dsub_zsub1_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 138, // zsub_zsub1_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 138, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 138, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 138, // zsub0_zsub1 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 0, // zsub0_zsub1_zsub2 138, // zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 138, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 138, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 139, // bsub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 139, // dsub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 139, // hsub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 139, // ssub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 139, // zsub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 139, // zsub0 -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 139, // zsub1 -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 139, // zsub2 -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub3 139, // zsub_hi -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 139, // zsub1_then_bsub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 139, // zsub1_then_dsub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 139, // zsub1_then_hsub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 139, // zsub1_then_ssub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 139, // zsub1_then_zsub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 139, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 139, // zsub2_then_bsub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 139, // zsub2_then_dsub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 139, // zsub2_then_hsub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 139, // zsub2_then_ssub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 139, // zsub2_then_zsub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 139, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 139, // dsub_zsub1_then_dsub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 139, // zsub_zsub1_then_zsub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 139, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 139, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 139, // zsub0_zsub1 -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub0_zsub1_zsub2 139, // zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 139, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 139, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 140, // hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 140, // ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 140, // zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // zsub0 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub3 140, // zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 140, // zsub1_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // zsub1_then_dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // zsub1_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // zsub1_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // zsub1_then_zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // zsub1_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 140, // zsub2_then_bsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // zsub2_then_dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // zsub2_then_hsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // zsub2_then_ssub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // zsub2_then_zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // zsub2_then_zsub_hi -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 140, // dsub_zsub1_then_dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // zsub_zsub1_then_zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 140, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 140, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // zsub0_zsub1 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub0_zsub1_zsub2 140, // zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 140, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 140, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 141, // bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 141, // dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 141, // hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 141, // ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 141, // zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 141, // zsub0 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 141, // zsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 141, // zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub3 141, // zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 141, // zsub1_then_bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 141, // zsub1_then_dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 141, // zsub1_then_hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 141, // zsub1_then_ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 141, // zsub1_then_zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 141, // zsub1_then_zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 141, // zsub2_then_bsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 141, // zsub2_then_dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 141, // zsub2_then_hsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 141, // zsub2_then_ssub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 141, // zsub2_then_zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 141, // zsub2_then_zsub_hi -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 141, // dsub_zsub1_then_dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 141, // zsub_zsub1_then_zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 141, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 141, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 141, // zsub0_zsub1 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub0_zsub1_zsub2 141, // zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 141, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 141, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 142, // bsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 142, // dsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 142, // hsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 142, // ssub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 142, // zsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 142, // zsub0 -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 142, // zsub1 -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 142, // zsub2 -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub3 142, // zsub_hi -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 142, // zsub1_then_bsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 142, // zsub1_then_dsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 142, // zsub1_then_hsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 142, // zsub1_then_ssub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 142, // zsub1_then_zsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 142, // zsub1_then_zsub_hi -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 142, // zsub2_then_bsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 142, // zsub2_then_dsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 142, // zsub2_then_hsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 142, // zsub2_then_ssub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 142, // zsub2_then_zsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 142, // zsub2_then_zsub_hi -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 142, // dsub_zsub1_then_dsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 142, // zsub_zsub1_then_zsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 142, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 142, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 142, // zsub0_zsub1 -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub0_zsub1_zsub2 142, // zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 142, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 142, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 143, // bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 143, // dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 143, // hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 143, // ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 143, // zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 143, // zsub0 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 143, // zsub1 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 143, // zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub3 143, // zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 143, // zsub1_then_bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 143, // zsub1_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 143, // zsub1_then_hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 143, // zsub1_then_ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 143, // zsub1_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 143, // zsub1_then_zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 143, // zsub2_then_bsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 143, // zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 143, // zsub2_then_hsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 143, // zsub2_then_ssub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 143, // zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 143, // zsub2_then_zsub_hi -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 143, // dsub_zsub1_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 143, // zsub_zsub1_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 143, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 143, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 143, // zsub0_zsub1 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub0_zsub1_zsub2 143, // zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 143, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 143, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 144, // bsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 144, // dsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 144, // hsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 144, // ssub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 144, // zsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 144, // zsub0 -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 144, // zsub1 -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 144, // zsub2 -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub3 144, // zsub_hi -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 144, // zsub1_then_bsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 144, // zsub1_then_dsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 144, // zsub1_then_hsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 144, // zsub1_then_ssub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 144, // zsub1_then_zsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 144, // zsub1_then_zsub_hi -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 144, // zsub2_then_bsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 144, // zsub2_then_dsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 144, // zsub2_then_hsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 144, // zsub2_then_ssub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 144, // zsub2_then_zsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 144, // zsub2_then_zsub_hi -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 144, // dsub_zsub1_then_dsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 144, // zsub_zsub1_then_zsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 144, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 144, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 144, // zsub0_zsub1 -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub0_zsub1_zsub2 144, // zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 144, // zsub1_then_dsub_zsub2_then_dsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 144, // zsub1_then_zsub_zsub2_then_zsub -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQQQ 145, // bsub -> QQQQ 145, // dsub -> QQQQ 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 145, // hsub -> QQQQ 0, // psub0 0, // psub1 145, // qsub0 -> QQQQ 145, // qsub1 -> QQQQ 145, // qsub2 -> QQQQ 145, // qsub3 -> QQQQ 145, // ssub -> QQQQ 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 145, // qsub1_then_bsub -> QQQQ 145, // qsub1_then_dsub -> QQQQ 145, // qsub1_then_hsub -> QQQQ 145, // qsub1_then_ssub -> QQQQ 145, // qsub3_then_bsub -> QQQQ 145, // qsub3_then_dsub -> QQQQ 145, // qsub3_then_hsub -> QQQQ 145, // qsub3_then_ssub -> QQQQ 145, // qsub2_then_bsub -> QQQQ 145, // qsub2_then_dsub -> QQQQ 145, // qsub2_then_hsub -> QQQQ 145, // qsub2_then_ssub -> QQQQ 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 145, // dsub_qsub1_then_dsub -> QQQQ 145, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ 145, // dsub_qsub1_then_dsub_qsub2_then_dsub -> QQQQ 145, // qsub0_qsub1 -> QQQQ 145, // qsub0_qsub1_qsub2 -> QQQQ 145, // qsub1_qsub2 -> QQQQ 145, // qsub1_qsub2_qsub3 -> QQQQ 145, // qsub2_qsub3 -> QQQQ 145, // qsub1_then_dsub_qsub2_then_dsub -> QQQQ 145, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ 145, // qsub2_then_dsub_qsub3_then_dsub -> QQQQ 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4 146, // bsub -> ZPR4 146, // dsub -> ZPR4 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 146, // hsub -> ZPR4 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 146, // ssub -> ZPR4 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 146, // zsub -> ZPR4 146, // zsub0 -> ZPR4 146, // zsub1 -> ZPR4 146, // zsub2 -> ZPR4 146, // zsub3 -> ZPR4 146, // zsub_hi -> ZPR4 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 146, // zsub1_then_bsub -> ZPR4 146, // zsub1_then_dsub -> ZPR4 146, // zsub1_then_hsub -> ZPR4 146, // zsub1_then_ssub -> ZPR4 146, // zsub1_then_zsub -> ZPR4 146, // zsub1_then_zsub_hi -> ZPR4 146, // zsub3_then_bsub -> ZPR4 146, // zsub3_then_dsub -> ZPR4 146, // zsub3_then_hsub -> ZPR4 146, // zsub3_then_ssub -> ZPR4 146, // zsub3_then_zsub -> ZPR4 146, // zsub3_then_zsub_hi -> ZPR4 146, // zsub2_then_bsub -> ZPR4 146, // zsub2_then_dsub -> ZPR4 146, // zsub2_then_hsub -> ZPR4 146, // zsub2_then_ssub -> ZPR4 146, // zsub2_then_zsub -> ZPR4 146, // zsub2_then_zsub_hi -> ZPR4 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 146, // dsub_zsub1_then_dsub -> ZPR4 146, // zsub_zsub1_then_zsub -> ZPR4 146, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4 146, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4 146, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4 146, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4 146, // zsub0_zsub1 -> ZPR4 146, // zsub0_zsub1_zsub2 -> ZPR4 146, // zsub1_zsub2 -> ZPR4 146, // zsub1_zsub2_zsub3 -> ZPR4 146, // zsub2_zsub3 -> ZPR4 146, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4 146, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4 146, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4 146, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4 146, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4 146, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQQQ_with_dsub_in_FPR64_lo 147, // bsub -> QQQQ_with_dsub_in_FPR64_lo 147, // dsub -> QQQQ_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 147, // hsub -> QQQQ_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 147, // qsub0 -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub1 -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub2 -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub3 -> QQQQ_with_dsub_in_FPR64_lo 147, // ssub -> QQQQ_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 147, // qsub1_then_bsub -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub1_then_dsub -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub1_then_hsub -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub1_then_ssub -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub3_then_bsub -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub3_then_dsub -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub3_then_hsub -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub3_then_ssub -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub2_then_bsub -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub2_then_dsub -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub2_then_hsub -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub2_then_ssub -> QQQQ_with_dsub_in_FPR64_lo 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 147, // dsub_qsub1_then_dsub -> QQQQ_with_dsub_in_FPR64_lo 147, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_dsub_in_FPR64_lo 147, // dsub_qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub0_qsub1 -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub0_qsub1_qsub2 -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub1_qsub2 -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub1_qsub2_qsub3 -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub2_qsub3 -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_dsub_in_FPR64_lo 147, // qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_dsub_in_FPR64_lo 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQQQ_with_qsub1_in_FPR128_lo 148, // bsub -> QQQQ_with_qsub1_in_FPR128_lo 148, // dsub -> QQQQ_with_qsub1_in_FPR128_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 148, // hsub -> QQQQ_with_qsub1_in_FPR128_lo 0, // psub0 0, // psub1 148, // qsub0 -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub1 -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub2 -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub3 -> QQQQ_with_qsub1_in_FPR128_lo 148, // ssub -> QQQQ_with_qsub1_in_FPR128_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 148, // qsub1_then_bsub -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub1_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub1_then_hsub -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub1_then_ssub -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub3_then_bsub -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub3_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub3_then_hsub -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub3_then_ssub -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub2_then_bsub -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub2_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub2_then_hsub -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub2_then_ssub -> QQQQ_with_qsub1_in_FPR128_lo 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 148, // dsub_qsub1_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo 148, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo 148, // dsub_qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub0_qsub1 -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub0_qsub1_qsub2 -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub1_qsub2 -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub1_qsub2_qsub3 -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub2_qsub3 -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo 148, // qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQQQ_with_qsub2_in_FPR128_lo 149, // bsub -> QQQQ_with_qsub2_in_FPR128_lo 149, // dsub -> QQQQ_with_qsub2_in_FPR128_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 149, // hsub -> QQQQ_with_qsub2_in_FPR128_lo 0, // psub0 0, // psub1 149, // qsub0 -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub1 -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub2 -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub3 -> QQQQ_with_qsub2_in_FPR128_lo 149, // ssub -> QQQQ_with_qsub2_in_FPR128_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 149, // qsub1_then_bsub -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub1_then_dsub -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub1_then_hsub -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub1_then_ssub -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub3_then_bsub -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub3_then_dsub -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub3_then_hsub -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub3_then_ssub -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub2_then_bsub -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub2_then_dsub -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub2_then_hsub -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub2_then_ssub -> QQQQ_with_qsub2_in_FPR128_lo 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 149, // dsub_qsub1_then_dsub -> QQQQ_with_qsub2_in_FPR128_lo 149, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_qsub2_in_FPR128_lo 149, // dsub_qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub0_qsub1 -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub0_qsub1_qsub2 -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub1_qsub2 -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub1_qsub2_qsub3 -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub2_qsub3 -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_qsub2_in_FPR128_lo 149, // qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_qsub2_in_FPR128_lo 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQQQ_with_qsub3_in_FPR128_lo 150, // bsub -> QQQQ_with_qsub3_in_FPR128_lo 150, // dsub -> QQQQ_with_qsub3_in_FPR128_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 150, // hsub -> QQQQ_with_qsub3_in_FPR128_lo 0, // psub0 0, // psub1 150, // qsub0 -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub1 -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub2 -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub3 -> QQQQ_with_qsub3_in_FPR128_lo 150, // ssub -> QQQQ_with_qsub3_in_FPR128_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 150, // qsub1_then_bsub -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub1_then_dsub -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub1_then_hsub -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub1_then_ssub -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub3_then_bsub -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub3_then_dsub -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub3_then_hsub -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub3_then_ssub -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub2_then_bsub -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub2_then_dsub -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub2_then_hsub -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub2_then_ssub -> QQQQ_with_qsub3_in_FPR128_lo 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 150, // dsub_qsub1_then_dsub -> QQQQ_with_qsub3_in_FPR128_lo 150, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_qsub3_in_FPR128_lo 150, // dsub_qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub0_qsub1 -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub0_qsub1_qsub2 -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub1_qsub2 -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub1_qsub2_qsub3 -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub2_qsub3 -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_qsub3_in_FPR128_lo 150, // qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_qsub3_in_FPR128_lo 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo 151, // bsub -> ZPR4_with_dsub_in_FPR64_lo 151, // dsub -> ZPR4_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 151, // hsub -> ZPR4_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 151, // ssub -> ZPR4_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 151, // zsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub0 -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub1 -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub2 -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub3 -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub_hi -> ZPR4_with_dsub_in_FPR64_lo 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 151, // zsub1_then_bsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub1_then_hsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub1_then_ssub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub1_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub3_then_bsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub3_then_hsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub3_then_ssub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub3_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub2_then_bsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub2_then_hsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub2_then_ssub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub2_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 151, // dsub_zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub_zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo 151, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo 151, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub0_zsub1 -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo 151, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 152, // hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 152, // ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 152, // zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub0 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 152, // zsub1_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub1_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub1_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub1_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub1_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub3_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub3_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub3_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub2_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub2_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub2_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub2_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub2_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 152, // dsub_zsub1_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub_zsub1_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 152, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 153, // hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 153, // ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 153, // zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub0 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 153, // zsub1_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub1_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub1_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub1_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub1_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub3_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub3_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub3_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub2_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub2_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub2_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub2_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub2_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 153, // dsub_zsub1_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub_zsub1_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 153, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub1_in_ZPR_4b 154, // bsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // dsub -> ZPR4_with_zsub1_in_ZPR_4b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 154, // hsub -> ZPR4_with_zsub1_in_ZPR_4b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 154, // ssub -> ZPR4_with_zsub1_in_ZPR_4b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 154, // zsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub0 -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub1 -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub2 -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub3 -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub_hi -> ZPR4_with_zsub1_in_ZPR_4b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 154, // zsub1_then_bsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub1_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub1_then_hsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub1_then_ssub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub1_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub3_then_bsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub3_then_hsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub3_then_ssub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub2_then_bsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub2_then_hsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub2_then_ssub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_4b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 154, // dsub_zsub1_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub_zsub1_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b 154, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub2_in_ZPR_4b 155, // bsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // dsub -> ZPR4_with_zsub2_in_ZPR_4b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 155, // hsub -> ZPR4_with_zsub2_in_ZPR_4b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 155, // ssub -> ZPR4_with_zsub2_in_ZPR_4b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 155, // zsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub0 -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub1 -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub2 -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub3 -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub_hi -> ZPR4_with_zsub2_in_ZPR_4b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 155, // zsub1_then_bsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub1_then_dsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub1_then_hsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub1_then_ssub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub1_then_zsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub1_then_zsub_hi -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub3_then_bsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub3_then_dsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub3_then_hsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub3_then_ssub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub3_then_zsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub3_then_zsub_hi -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub2_then_bsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub2_then_dsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub2_then_hsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub2_then_ssub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub2_then_zsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub2_then_zsub_hi -> ZPR4_with_zsub2_in_ZPR_4b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 155, // dsub_zsub1_then_dsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub_zsub1_then_zsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub0_zsub1 -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub2_in_ZPR_4b 155, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub2_in_ZPR_4b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub3_in_ZPR_4b 156, // bsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // dsub -> ZPR4_with_zsub3_in_ZPR_4b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 156, // hsub -> ZPR4_with_zsub3_in_ZPR_4b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 156, // ssub -> ZPR4_with_zsub3_in_ZPR_4b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 156, // zsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub0 -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub1 -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub2 -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub3 -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub_hi -> ZPR4_with_zsub3_in_ZPR_4b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 156, // zsub1_then_bsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub1_then_dsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub1_then_hsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub1_then_ssub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub1_then_zsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub1_then_zsub_hi -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub3_then_bsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub3_then_dsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub3_then_hsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub3_then_ssub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub3_then_zsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub3_then_zsub_hi -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub2_then_bsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub2_then_dsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub2_then_hsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub2_then_ssub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub2_then_zsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub2_then_zsub_hi -> ZPR4_with_zsub3_in_ZPR_4b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 156, // dsub_zsub1_then_dsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub_zsub1_then_zsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub0_zsub1 -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub3_in_ZPR_4b 156, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub3_in_ZPR_4b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // bsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 157, // hsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 0, // psub0 0, // psub1 157, // qsub0 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub1 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub2 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub3 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // ssub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 157, // qsub1_then_bsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub1_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub1_then_hsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub1_then_ssub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub3_then_bsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub3_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub3_then_hsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub3_then_ssub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub2_then_bsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub2_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub2_then_hsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub2_then_ssub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 157, // dsub_qsub1_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // dsub_qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub0_qsub1 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub0_qsub1_qsub2 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub1_qsub2 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub1_qsub2_qsub3 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub2_qsub3 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 157, // qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // bsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 158, // hsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 0, // psub0 0, // psub1 158, // qsub0 -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub1 -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub2 -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub3 -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // ssub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 158, // qsub1_then_bsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub1_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub1_then_hsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub1_then_ssub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub3_then_bsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub3_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub3_then_hsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub3_then_ssub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub2_then_bsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub2_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub2_then_hsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub2_then_ssub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 158, // dsub_qsub1_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // dsub_qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub0_qsub1 -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub0_qsub1_qsub2 -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub1_qsub2 -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub1_qsub2_qsub3 -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub2_qsub3 -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 158, // qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // bsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // dsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 159, // hsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 0, // psub0 0, // psub1 159, // qsub0 -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub1 -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub2 -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub3 -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // ssub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 159, // qsub1_then_bsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub1_then_dsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub1_then_hsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub1_then_ssub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub3_then_bsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub3_then_dsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub3_then_hsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub3_then_ssub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub2_then_bsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub2_then_dsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub2_then_hsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub2_then_ssub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 159, // dsub_qsub1_then_dsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // dsub_qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub0_qsub1 -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub0_qsub1_qsub2 -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub1_qsub2 -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub1_qsub2_qsub3 -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub2_qsub3 -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 159, // qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 160, // hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 160, // ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 160, // zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub0 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 160, // zsub1_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub1_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub1_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub1_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub3_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub3_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub3_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub3_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub2_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub2_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub2_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub2_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 160, // dsub_zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub_zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub0_zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 160, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // bsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 161, // hsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 161, // ssub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 161, // zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub0 -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub1 -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub2 -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub3 -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub_hi -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 161, // zsub1_then_bsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub1_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub1_then_hsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub1_then_ssub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub1_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub3_then_bsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub3_then_hsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub3_then_ssub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub2_then_bsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub2_then_hsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub2_then_ssub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 161, // dsub_zsub1_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub_zsub1_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 161, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // bsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // dsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 162, // hsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 162, // ssub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 162, // zsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub0 -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub1 -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub2 -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub3 -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub_hi -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 162, // zsub1_then_bsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub1_then_dsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub1_then_hsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub1_then_ssub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub1_then_zsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub1_then_zsub_hi -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub3_then_bsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub3_then_dsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub3_then_hsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub3_then_ssub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub3_then_zsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub3_then_zsub_hi -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub2_then_bsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub2_then_dsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub2_then_hsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub2_then_ssub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub2_then_zsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub2_then_zsub_hi -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 162, // dsub_zsub1_then_dsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub_zsub1_then_zsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub0_zsub1 -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 162, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // bsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 163, // hsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 0, // psub0 0, // psub1 163, // qsub0 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub1 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub2 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub3 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // ssub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 163, // qsub1_then_bsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub1_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub1_then_hsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub1_then_ssub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub3_then_bsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub3_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub3_then_hsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub3_then_ssub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub2_then_bsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub2_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub2_then_hsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub2_then_ssub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 163, // dsub_qsub1_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // dsub_qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub0_qsub1 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub0_qsub1_qsub2 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub1_qsub2 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub1_qsub2_qsub3 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub2_qsub3 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 163, // qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // bsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 164, // hsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 0, // psub0 0, // psub1 164, // qsub0 -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub1 -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub2 -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub3 -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // ssub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 164, // qsub1_then_bsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub1_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub1_then_hsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub1_then_ssub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub3_then_bsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub3_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub3_then_hsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub3_then_ssub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub2_then_bsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub2_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub2_then_hsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub2_then_ssub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 164, // dsub_qsub1_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // dsub_qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub0_qsub1 -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub0_qsub1_qsub2 -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub1_qsub2 -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub1_qsub2_qsub3 -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub2_qsub3 -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 164, // qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 165, // hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 165, // ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 165, // zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub0 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 165, // zsub1_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub1_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub1_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub1_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub3_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub3_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub3_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub3_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub2_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub2_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub2_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub2_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 165, // dsub_zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub_zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub0_zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 165, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // bsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 166, // hsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 166, // ssub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 166, // zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub0 -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub1 -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub2 -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub3 -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub_hi -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 166, // zsub1_then_bsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub1_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub1_then_hsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub1_then_ssub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub1_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub3_then_bsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub3_then_hsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub3_then_ssub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub2_then_bsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub2_then_hsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub2_then_ssub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 166, // dsub_zsub1_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub_zsub1_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 166, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // bsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 167, // hsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 0, // psub0 0, // psub1 167, // qsub0 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub1 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub2 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub3 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // ssub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 167, // qsub1_then_bsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub1_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub1_then_hsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub1_then_ssub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub3_then_bsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub3_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub3_then_hsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub3_then_ssub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub2_then_bsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub2_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub2_then_hsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub2_then_ssub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 167, // dsub_qsub1_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // dsub_qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub0_qsub1 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub0_qsub1_qsub2 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub1_qsub2 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub1_qsub2_qsub3 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub2_qsub3 -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub1_then_dsub_qsub2_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 167, // qsub2_then_dsub_qsub3_then_dsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 168, // hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 168, // ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 168, // zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub0 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 168, // zsub1_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub1_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub1_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub1_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub3_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub3_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub3_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub3_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub2_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub2_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub2_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub2_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 168, // dsub_zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub_zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub0_zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 168, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4Mul4 169, // bsub -> ZPR4Mul4 169, // dsub -> ZPR4Mul4 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 169, // hsub -> ZPR4Mul4 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 169, // ssub -> ZPR4Mul4 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 169, // zsub -> ZPR4Mul4 169, // zsub0 -> ZPR4Mul4 169, // zsub1 -> ZPR4Mul4 169, // zsub2 -> ZPR4Mul4 169, // zsub3 -> ZPR4Mul4 169, // zsub_hi -> ZPR4Mul4 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 169, // zsub1_then_bsub -> ZPR4Mul4 169, // zsub1_then_dsub -> ZPR4Mul4 169, // zsub1_then_hsub -> ZPR4Mul4 169, // zsub1_then_ssub -> ZPR4Mul4 169, // zsub1_then_zsub -> ZPR4Mul4 169, // zsub1_then_zsub_hi -> ZPR4Mul4 169, // zsub3_then_bsub -> ZPR4Mul4 169, // zsub3_then_dsub -> ZPR4Mul4 169, // zsub3_then_hsub -> ZPR4Mul4 169, // zsub3_then_ssub -> ZPR4Mul4 169, // zsub3_then_zsub -> ZPR4Mul4 169, // zsub3_then_zsub_hi -> ZPR4Mul4 169, // zsub2_then_bsub -> ZPR4Mul4 169, // zsub2_then_dsub -> ZPR4Mul4 169, // zsub2_then_hsub -> ZPR4Mul4 169, // zsub2_then_ssub -> ZPR4Mul4 169, // zsub2_then_zsub -> ZPR4Mul4 169, // zsub2_then_zsub_hi -> ZPR4Mul4 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 169, // dsub_zsub1_then_dsub -> ZPR4Mul4 169, // zsub_zsub1_then_zsub -> ZPR4Mul4 169, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4Mul4 169, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4Mul4 169, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4Mul4 169, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4Mul4 169, // zsub0_zsub1 -> ZPR4Mul4 169, // zsub0_zsub1_zsub2 -> ZPR4Mul4 169, // zsub1_zsub2 -> ZPR4Mul4 169, // zsub1_zsub2_zsub3 -> ZPR4Mul4 169, // zsub2_zsub3 -> ZPR4Mul4 169, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4Mul4 169, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4Mul4 169, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4Mul4 169, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4Mul4 169, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4Mul4 169, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4Mul4 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 170, // hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 170, // ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 170, // zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub0 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 170, // zsub1_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub1_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub1_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub1_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub3_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub3_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub3_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub3_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub2_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub2_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub2_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub2_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 170, // dsub_zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub_zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub0_zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 170, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub0_in_ZPR_3b 171, // bsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // dsub -> ZPR4_with_zsub0_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 171, // hsub -> ZPR4_with_zsub0_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 171, // ssub -> ZPR4_with_zsub0_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 171, // zsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub0 -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub1 -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub2 -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub3 -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub_hi -> ZPR4_with_zsub0_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 171, // zsub1_then_bsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub1_then_dsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub1_then_hsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub1_then_ssub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub1_then_zsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub3_then_bsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub3_then_dsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub3_then_hsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub3_then_ssub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub3_then_zsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub2_then_bsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub2_then_dsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub2_then_hsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub2_then_ssub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub2_then_zsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 171, // dsub_zsub1_then_dsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub_zsub1_then_zsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub0_zsub1 -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub1_zsub2 -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub2_zsub3 -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_in_ZPR_3b 171, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_in_ZPR_3b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 172, // hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 172, // ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 172, // zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub0 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 172, // zsub1_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub1_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub1_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub1_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub1_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub3_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub3_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub3_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub2_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub2_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub2_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub2_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub2_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 172, // dsub_zsub1_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub_zsub1_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 172, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 173, // hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 173, // ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 173, // zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub0 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 173, // zsub1_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub1_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub1_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub1_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub1_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub3_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub3_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub3_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub2_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub2_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub2_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub2_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub2_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 173, // dsub_zsub1_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub_zsub1_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 173, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub1_in_ZPR_3b 174, // bsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // dsub -> ZPR4_with_zsub1_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 174, // hsub -> ZPR4_with_zsub1_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 174, // ssub -> ZPR4_with_zsub1_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 174, // zsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub0 -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub1 -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub2 -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub3 -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub_hi -> ZPR4_with_zsub1_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 174, // zsub1_then_bsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub1_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub1_then_hsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub1_then_ssub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub1_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub3_then_bsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub3_then_hsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub3_then_ssub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub2_then_bsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub2_then_hsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub2_then_ssub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 174, // dsub_zsub1_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub_zsub1_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b 174, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 175, // hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 175, // ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 175, // zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub0 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 175, // zsub1_then_bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub1_then_dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub1_then_hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub1_then_ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub1_then_zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub3_then_bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub3_then_dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub3_then_hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub3_then_ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub3_then_zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub2_then_bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub2_then_dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub2_then_hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub2_then_ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub2_then_zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 175, // dsub_zsub1_then_dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub_zsub1_then_zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub0_zsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub1_zsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub2_zsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 175, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub2_in_ZPR_3b 176, // bsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // dsub -> ZPR4_with_zsub2_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 176, // hsub -> ZPR4_with_zsub2_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 176, // ssub -> ZPR4_with_zsub2_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 176, // zsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub0 -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub1 -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub2 -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub3 -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub_hi -> ZPR4_with_zsub2_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 176, // zsub1_then_bsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub1_then_dsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub1_then_hsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub1_then_ssub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub1_then_zsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub1_then_zsub_hi -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub3_then_bsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub3_then_dsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub3_then_hsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub3_then_ssub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub3_then_zsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub3_then_zsub_hi -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub2_then_bsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub2_then_dsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub2_then_hsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub2_then_ssub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub2_then_zsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub2_then_zsub_hi -> ZPR4_with_zsub2_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 176, // dsub_zsub1_then_dsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub_zsub1_then_zsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub0_zsub1 -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub2_in_ZPR_3b 176, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub2_in_ZPR_3b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub3_in_ZPR_3b 177, // bsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // dsub -> ZPR4_with_zsub3_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 177, // hsub -> ZPR4_with_zsub3_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 177, // ssub -> ZPR4_with_zsub3_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 177, // zsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub0 -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub1 -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub2 -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub3 -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub_hi -> ZPR4_with_zsub3_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 177, // zsub1_then_bsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub1_then_dsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub1_then_hsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub1_then_ssub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub1_then_zsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub1_then_zsub_hi -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub3_then_bsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub3_then_dsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub3_then_hsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub3_then_ssub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub3_then_zsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub3_then_zsub_hi -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub2_then_bsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub2_then_dsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub2_then_hsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub2_then_ssub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub2_then_zsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub2_then_zsub_hi -> ZPR4_with_zsub3_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 177, // dsub_zsub1_then_dsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub_zsub1_then_zsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub0_zsub1 -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub3_in_ZPR_3b 177, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub3_in_ZPR_3b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // bsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // dsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 178, // hsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 178, // ssub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 178, // zsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub0 -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub1 -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub2 -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub3 -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub_hi -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 178, // zsub1_then_bsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub1_then_dsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub1_then_hsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub1_then_ssub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub1_then_zsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub1_then_zsub_hi -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub3_then_bsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub3_then_dsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub3_then_hsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub3_then_ssub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub3_then_zsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub3_then_zsub_hi -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub2_then_bsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub2_then_dsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub2_then_hsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub2_then_ssub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub2_then_zsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub2_then_zsub_hi -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 178, // dsub_zsub1_then_dsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub_zsub1_then_zsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub0_zsub1 -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 178, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 179, // hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 179, // ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 179, // zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub0 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 179, // zsub1_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub1_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub1_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub1_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub3_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub3_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub3_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub3_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub2_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub2_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub2_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub2_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 179, // dsub_zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub_zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub0_zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 179, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 180, // hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 180, // ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 180, // zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub0 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 180, // zsub1_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub1_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub1_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub1_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub3_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub3_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub3_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub3_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub2_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub2_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub2_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub2_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 180, // dsub_zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub_zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub0_zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 180, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 181, // hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 181, // ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 181, // zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub0 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 181, // zsub1_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub1_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub1_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub1_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub3_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub3_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub3_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub3_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub2_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub2_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub2_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub2_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 181, // dsub_zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub_zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub0_zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 181, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // bsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 182, // hsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 182, // ssub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 182, // zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub0 -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub1 -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub2 -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub3 -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub_hi -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 182, // zsub1_then_bsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub1_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub1_then_hsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub1_then_ssub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub1_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub3_then_bsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub3_then_hsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub3_then_ssub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub2_then_bsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub2_then_hsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub2_then_ssub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 182, // dsub_zsub1_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub_zsub1_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 182, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // bsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // dsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 183, // hsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 183, // ssub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 183, // zsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub0 -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub1 -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub2 -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub3 -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub_hi -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 183, // zsub1_then_bsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub1_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub1_then_hsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub1_then_ssub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub1_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub3_then_bsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub3_then_hsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub3_then_ssub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub2_then_bsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub2_then_hsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub2_then_ssub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 183, // dsub_zsub1_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub_zsub1_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 183, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // bsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // dsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 184, // hsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 184, // ssub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 184, // zsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub0 -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub1 -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub2 -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub3 -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub_hi -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 184, // zsub1_then_bsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub1_then_dsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub1_then_hsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub1_then_ssub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub1_then_zsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub1_then_zsub_hi -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub3_then_bsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub3_then_dsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub3_then_hsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub3_then_ssub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub3_then_zsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub3_then_zsub_hi -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub2_then_bsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub2_then_dsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub2_then_hsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub2_then_ssub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub2_then_zsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub2_then_zsub_hi -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 184, // dsub_zsub1_then_dsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub_zsub1_then_zsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub0_zsub1 -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub1_zsub2 -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub2_zsub3 -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 184, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 185, // hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 185, // ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 185, // zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub0 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 185, // zsub1_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub1_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub1_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub1_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub3_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub3_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub3_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub3_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub2_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub2_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub2_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub2_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 185, // dsub_zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub_zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub0_zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 185, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // bsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 186, // hsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 186, // ssub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 186, // zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub0 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub1 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub2 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub3 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 186, // zsub1_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub1_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub1_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub1_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub3_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub3_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub3_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub3_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub2_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub2_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub2_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub2_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 186, // dsub_zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub_zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub0_zsub1 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 186, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // bsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 187, // hsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 187, // ssub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 187, // zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub0 -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub1 -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub2 -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub3 -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub_hi -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 187, // zsub1_then_bsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub1_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub1_then_hsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub1_then_ssub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub1_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub3_then_bsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub3_then_hsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub3_then_ssub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub2_then_bsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub2_then_hsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub2_then_ssub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 187, // dsub_zsub1_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub_zsub1_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 187, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 188, // hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 188, // ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 188, // zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub0 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 188, // zsub1_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub1_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub1_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub1_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub3_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub3_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub3_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub3_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub2_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub2_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub2_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub2_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 188, // dsub_zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub_zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub0_zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 188, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // bsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // dsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 189, // hsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 189, // ssub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 189, // zsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub0 -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub1 -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub2 -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub3 -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub_hi -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 189, // zsub1_then_bsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub1_then_dsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub1_then_hsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub1_then_ssub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub1_then_zsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub1_then_zsub_hi -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub3_then_bsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub3_then_dsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub3_then_hsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub3_then_ssub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub3_then_zsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub3_then_zsub_hi -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub2_then_bsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub2_then_dsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub2_then_hsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub2_then_ssub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub2_then_zsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub2_then_zsub_hi -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 189, // dsub_zsub1_then_dsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub_zsub1_then_zsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub0_zsub1 -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub0_zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub1_zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 189, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // bsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 190, // hsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 190, // ssub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 190, // zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub0 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub1 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub2 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub3 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 190, // zsub1_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub1_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub1_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub1_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub3_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub3_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub3_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub3_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub2_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub2_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub2_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub2_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 190, // dsub_zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub_zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub0_zsub1 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 190, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 191, // hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 191, // ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 191, // zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub0 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 191, // zsub1_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub1_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub1_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub1_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub1_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub3_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub3_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub3_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub2_then_bsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub2_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub2_then_hsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub2_then_ssub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub2_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 191, // dsub_zsub1_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub_zsub1_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 191, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 192, // hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 192, // ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 192, // zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub0 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 192, // zsub1_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub1_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub1_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub1_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub1_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub1_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub3_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub3_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub3_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub3_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub2_then_bsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub2_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub2_then_hsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub2_then_ssub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub2_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub2_then_zsub_hi -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 192, // dsub_zsub1_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub_zsub1_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub0_zsub1 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub1_zsub2 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub2_zsub3 -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 192, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 193, // hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 193, // ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 193, // zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub0 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 193, // zsub1_then_bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub1_then_dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub1_then_hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub1_then_ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub1_then_zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub3_then_bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub3_then_dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub3_then_hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub3_then_ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub3_then_zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub2_then_bsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub2_then_dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub2_then_hsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub2_then_ssub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub2_then_zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 193, // dsub_zsub1_then_dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub_zsub1_then_zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub0_zsub1 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub1_zsub2 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub2_zsub3 -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 193, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // bsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // dsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 194, // hsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 194, // ssub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 194, // zsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub0 -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub1 -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub2 -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub3 -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub_hi -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 194, // zsub1_then_bsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub1_then_dsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub1_then_hsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub1_then_ssub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub1_then_zsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub1_then_zsub_hi -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub3_then_bsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub3_then_dsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub3_then_hsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub3_then_ssub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub3_then_zsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub3_then_zsub_hi -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub2_then_bsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub2_then_dsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub2_then_hsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub2_then_ssub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub2_then_zsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub2_then_zsub_hi -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 194, // dsub_zsub1_then_dsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub_zsub1_then_zsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub0_zsub1 -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub1_zsub2 -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub2_zsub3 -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 194, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 195, // hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 195, // ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 195, // zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub0 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 195, // zsub1_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub1_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub1_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub1_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub3_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub3_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub3_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub3_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub2_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub2_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub2_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub2_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 195, // dsub_zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub_zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub0_zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 195, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 196, // hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 196, // ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 196, // zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub0 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 196, // zsub1_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub1_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub1_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub1_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub3_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub3_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub3_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub3_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub2_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub2_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub2_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub2_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 196, // dsub_zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub_zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub0_zsub1 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 196, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // bsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // dsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 197, // hsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 197, // ssub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 197, // zsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub0 -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub1 -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub2 -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub3 -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub_hi -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 197, // zsub1_then_bsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub1_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub1_then_hsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub1_then_ssub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub1_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub1_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub3_then_bsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub3_then_hsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub3_then_ssub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub3_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub2_then_bsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub2_then_hsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub2_then_ssub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub2_then_zsub_hi -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 197, // dsub_zsub1_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub_zsub1_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub0_zsub1 -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub0_zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub1_zsub2 -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub1_zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub2_zsub3 -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 197, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // bsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // dsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 198, // hsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 198, // ssub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 198, // zsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub0 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub1 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 198, // zsub1_then_bsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub1_then_dsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub1_then_hsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub1_then_ssub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub1_then_zsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub1_then_zsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub3_then_bsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub3_then_dsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub3_then_hsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub3_then_ssub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub3_then_zsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub3_then_zsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub2_then_bsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub2_then_dsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub2_then_hsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub2_then_ssub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub2_then_zsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub2_then_zsub_hi -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 198, // dsub_zsub1_then_dsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub_zsub1_then_zsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub0_zsub1 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub0_zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub1_zsub2 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub1_zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub2_zsub3 -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 198, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // bsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 199, // hsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 199, // ssub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 199, // zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub0 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub1 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub2 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub3 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 199, // zsub1_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub1_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub1_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub1_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub3_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub3_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub3_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub3_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub2_then_bsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub2_then_hsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub2_then_ssub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub2_then_zsub_hi -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 199, // dsub_zsub1_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub_zsub1_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // dsub_zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub_zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub0_zsub1 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub0_zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub1_zsub2 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub1_zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub2_zsub3 -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub1_then_dsub_zsub2_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub1_then_zsub_zsub2_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub2_then_dsub_zsub3_then_dsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 199, // zsub2_then_zsub_zsub3_then_zsub -> ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 200, // sub_32 -> GPR64x8Class 0, // sube32 0, // sube64 0, // subo32 0, // subo64 200, // x8sub_0 -> GPR64x8Class 200, // x8sub_1 -> GPR64x8Class 200, // x8sub_2 -> GPR64x8Class 200, // x8sub_3 -> GPR64x8Class 200, // x8sub_4 -> GPR64x8Class 200, // x8sub_5 -> GPR64x8Class 200, // x8sub_6 -> GPR64x8Class 200, // x8sub_7 -> GPR64x8Class 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 200, // x8sub_7_then_sub_32 -> GPR64x8Class 200, // x8sub_6_then_sub_32 -> GPR64x8Class 200, // x8sub_5_then_sub_32 -> GPR64x8Class 200, // x8sub_4_then_sub_32 -> GPR64x8Class 200, // x8sub_3_then_sub_32 -> GPR64x8Class 200, // x8sub_2_then_sub_32 -> GPR64x8Class 200, // x8sub_1_then_sub_32 -> GPR64x8Class 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 200, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class 200, // x8sub_0_x8sub_1 -> GPR64x8Class 200, // x8sub_2_x8sub_3 -> GPR64x8Class 200, // x8sub_4_x8sub_5 -> GPR64x8Class 200, // x8sub_6_x8sub_7 -> GPR64x8Class 200, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class 200, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class 200, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 201, // sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 201, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 201, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 201, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 201, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 202, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 202, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 202, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 202, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 202, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 203, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 203, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 203, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 203, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 203, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 204, // sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 204, // x8sub_0 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_1 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_2 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_3 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_4 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_5 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_6 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_7 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 204, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 204, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 204, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 205, // sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 205, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 205, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 205, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 205, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 206, // sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 206, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 206, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 206, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 206, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 207, // sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 207, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 207, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 207, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 207, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_tcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 208, // sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 0, // sube32 0, // sube64 0, // subo32 0, // subo64 208, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 208, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 208, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 208, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 209, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 209, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 209, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 209, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 209, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 210, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 210, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 210, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 210, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 210, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 211, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 211, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 211, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 211, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 211, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 212, // sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 0, // sube32 0, // sube64 0, // subo32 0, // subo64 212, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 212, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 212, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 212, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 213, // sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 213, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 213, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 213, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 213, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 214, // sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 214, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 214, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 214, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 214, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 215, // sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 215, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 215, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 215, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 215, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_1_in_tcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 216, // sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 0, // sube32 0, // sube64 0, // subo32 0, // subo64 216, // x8sub_0 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_1 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_2 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_3 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_4 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_5 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_6 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_7 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 216, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 216, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 216, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 217, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 217, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 217, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 217, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 217, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 218, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 218, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 218, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 218, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 218, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 219, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 219, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 219, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 219, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 219, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 220, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 220, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 220, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 220, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 220, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 221, // sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 221, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 221, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 221, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 221, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 222, // sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 222, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 222, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 222, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 222, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 223, // sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 223, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 223, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 223, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 223, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 224, // sub_32 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 0, // sube32 0, // sube64 0, // subo32 0, // subo64 224, // x8sub_0 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_1 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_2 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_3 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_4 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_5 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_6 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_7 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 224, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 224, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 224, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 225, // sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 225, // x8sub_0 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_1 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_2 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_3 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_4 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_5 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_6 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_7 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 225, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 225, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 225, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 226, // sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 226, // x8sub_0 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_1 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_2 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_3 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_4 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_5 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_6 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_7 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 226, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 226, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 226, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 227, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 227, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 227, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 227, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 227, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 228, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 228, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 228, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 228, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 228, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 229, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 0, // sube32 0, // sube64 0, // subo32 0, // subo64 229, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 229, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 229, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 229, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 230, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 230, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 230, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 230, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 230, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 231, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 231, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 231, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 231, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 231, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4Strided 232, // bsub -> ZPR4Strided 232, // dsub -> ZPR4Strided 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 232, // hsub -> ZPR4Strided 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 232, // ssub -> ZPR4Strided 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 232, // zsub -> ZPR4Strided 232, // zsub0 -> ZPR4Strided 232, // zsub1 -> ZPR4Strided 232, // zsub2 -> ZPR4Strided 232, // zsub3 -> ZPR4Strided 232, // zsub_hi -> ZPR4Strided 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 232, // zsub1_then_bsub -> ZPR4Strided 232, // zsub1_then_dsub -> ZPR4Strided 232, // zsub1_then_hsub -> ZPR4Strided 232, // zsub1_then_ssub -> ZPR4Strided 232, // zsub1_then_zsub -> ZPR4Strided 232, // zsub1_then_zsub_hi -> ZPR4Strided 232, // zsub3_then_bsub -> ZPR4Strided 232, // zsub3_then_dsub -> ZPR4Strided 232, // zsub3_then_hsub -> ZPR4Strided 232, // zsub3_then_ssub -> ZPR4Strided 232, // zsub3_then_zsub -> ZPR4Strided 232, // zsub3_then_zsub_hi -> ZPR4Strided 232, // zsub2_then_bsub -> ZPR4Strided 232, // zsub2_then_dsub -> ZPR4Strided 232, // zsub2_then_hsub -> ZPR4Strided 232, // zsub2_then_ssub -> ZPR4Strided 232, // zsub2_then_zsub -> ZPR4Strided 232, // zsub2_then_zsub_hi -> ZPR4Strided 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 232, // zsub0_zsub2 -> ZPR4Strided 232, // zsub1_zsub3 -> ZPR4Strided }, { // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 233, // sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 233, // x8sub_0 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_1 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_2 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_3 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_4 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_5 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_6 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_7 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 233, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 233, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 233, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 234, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 234, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 234, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 234, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 234, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 235, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 235, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 235, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 235, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 235, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 236, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 236, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 236, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 236, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 236, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 237, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 237, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 237, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 237, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 237, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 238, // sub_32 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 0, // sube32 0, // sube64 0, // subo32 0, // subo64 238, // x8sub_0 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_1 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_2 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_3 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_4 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_5 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_6 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_7 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 238, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 238, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 238, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 239, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 239, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 239, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 239, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 239, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 240, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 240, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 240, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 240, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 240, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 241, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 241, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 241, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 241, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 241, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 242, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 0, // sube32 0, // sube64 0, // subo32 0, // subo64 242, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 242, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 242, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 242, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 243, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 243, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 243, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 243, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 243, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 244, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 244, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 244, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 244, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 244, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 245, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sube32 0, // sube64 0, // subo32 0, // subo64 245, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 245, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 245, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 245, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 246, // sub_32 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 0, // sube32 0, // sube64 0, // subo32 0, // subo64 246, // x8sub_0 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_1 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_2 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_3 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_4 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_5 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_6 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_7 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 246, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 246, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 246, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 247, // sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 0, // sube32 0, // sube64 0, // subo32 0, // subo64 247, // x8sub_0 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_1 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_2 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_3 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_4 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_5 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_6 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_7 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 247, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 247, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 247, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 248, // sub_32 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 0, // sube32 0, // sube64 0, // subo32 0, // subo64 248, // x8sub_0 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_1 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_2 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_3 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_4 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_5 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_6 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_7 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 248, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 248, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 248, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_sub_32_in_GPR32arg 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 249, // sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg 0, // sube32 0, // sube64 0, // subo32 0, // subo64 249, // x8sub_0 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_1 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_2 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_3 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_4 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_5 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_6 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_7 -> GPR64x8Class_with_sub_32_in_GPR32arg 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 249, // x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_6_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_4_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_2_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 249, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_0_x8sub_1 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_2_x8sub_3 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_4_x8sub_5 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_6_x8sub_7 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg 249, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // MPR32 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 250, // zasubd0 -> MPR32 250, // zasubd1 -> MPR32 0, // zasubh0 0, // zasubh1 250, // zasubq0 -> MPR32 250, // zasubq1 -> MPR32 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 250, // zasubd1_then_zasubq0 -> MPR32 250, // zasubd1_then_zasubq1 -> MPR32 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZPR4Strided_with_dsub_in_FPR64_lo 251, // bsub -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // dsub -> ZPR4Strided_with_dsub_in_FPR64_lo 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 251, // hsub -> ZPR4Strided_with_dsub_in_FPR64_lo 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 251, // ssub -> ZPR4Strided_with_dsub_in_FPR64_lo 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 251, // zsub -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub0 -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub1 -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub2 -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub3 -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 251, // zsub1_then_bsub -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub1_then_dsub -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub1_then_hsub -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub1_then_ssub -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub1_then_zsub -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub1_then_zsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub3_then_bsub -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub3_then_dsub -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub3_then_hsub -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub3_then_ssub -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub3_then_zsub -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub3_then_zsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub2_then_bsub -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub2_then_dsub -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub2_then_hsub -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub2_then_ssub -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub2_then_zsub -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub2_then_zsub_hi -> ZPR4Strided_with_dsub_in_FPR64_lo 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 251, // zsub0_zsub2 -> ZPR4Strided_with_dsub_in_FPR64_lo 251, // zsub1_zsub3 -> ZPR4Strided_with_dsub_in_FPR64_lo }, { // GPR64x8Class_with_x8sub_2_in_GPR64arg 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 252, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 0, // sube32 0, // sube64 0, // subo32 0, // subo64 252, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 252, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 252, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 252, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 253, // sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 0, // sube32 0, // sube64 0, // subo32 0, // subo64 253, // x8sub_0 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_1 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_2 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_3 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_4 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_5 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_6 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_7 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 253, // x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_6_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_4_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_2_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 253, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_0_x8sub_1 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_2_x8sub_3 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_4_x8sub_5 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_6_x8sub_7 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 253, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 254, // sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 0, // sube32 0, // sube64 0, // subo32 0, // subo64 254, // x8sub_0 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_1 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_2 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_3 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_4 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_5 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_6 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_7 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 254, // x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_6_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_4_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_2_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 254, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_0_x8sub_1 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_2_x8sub_3 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_4_x8sub_5 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_6_x8sub_7 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 254, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 255, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 0, // sube32 0, // sube64 0, // subo32 0, // subo64 255, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 255, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 255, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 255, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 256, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // sube32 0, // sube64 0, // subo32 0, // subo64 256, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 256, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 256, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 256, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 257, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // sube32 0, // sube64 0, // subo32 0, // subo64 257, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 257, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 257, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 257, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64arg 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 258, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 0, // sube32 0, // sube64 0, // subo32 0, // subo64 258, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 258, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 258, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 258, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 259, // sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // sube32 0, // sube64 0, // subo32 0, // subo64 259, // x8sub_0 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_1 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_2 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_3 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_4 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_5 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_6 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_7 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 259, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 259, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 259, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 260, // sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // sube32 0, // sube64 0, // subo32 0, // subo64 260, // x8sub_0 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_1 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_2 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_3 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_4 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_5 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_6 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_7 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 260, // x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_6_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_4_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_2_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 260, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_0_x8sub_1 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_2_x8sub_3 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_4_x8sub_5 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_6_x8sub_7 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 260, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 261, // sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // sube32 0, // sube64 0, // subo32 0, // subo64 261, // x8sub_0 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_1 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_2 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_3 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_4 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_5 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_6 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_7 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 261, // x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_6_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_4_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_2_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 261, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_0_x8sub_1 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_2_x8sub_3 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_4_x8sub_5 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_6_x8sub_7 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 261, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_rtcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 262, // sub_32 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 0, // sube32 0, // sube64 0, // subo32 0, // subo64 262, // x8sub_0 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_1 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_2 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_3 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_4 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_5 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_6 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_7 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 262, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 262, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 262, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_0_in_rtcGPR64 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 263, // sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // sube32 0, // sube64 0, // subo32 0, // subo64 263, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 263, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 263, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 263, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_rtcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 264, // sub_32 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 0, // sube32 0, // sube64 0, // subo32 0, // subo64 264, // x8sub_0 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_1 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_2 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_3 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_4 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_5 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_6 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_7 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 264, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 264, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 264, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_2_in_rtcGPR64 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 265, // sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // sube32 0, // sube64 0, // subo32 0, // subo64 265, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 265, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 265, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 265, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_rtcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 266, // sub_32 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 0, // sube32 0, // sube64 0, // subo32 0, // subo64 266, // x8sub_0 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_1 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_2 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_3 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_4 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_5 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_6 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_7 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 266, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 266, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 266, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_4_in_rtcGPR64 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_6_in_GPR64arg 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 267, // sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 0, // sube32 0, // sube64 0, // subo32 0, // subo64 267, // x8sub_0 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_1 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_2 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_3 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_4 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_5 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_6 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_7 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 267, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 267, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 267, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_GPR64arg 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_6_in_rtcGPR64 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 268, // sub_32 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 0, // sube32 0, // sube64 0, // subo32 0, // subo64 268, // x8sub_0 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_1 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_2 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_3 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_4 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_5 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_6 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_7 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 268, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 268, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 268, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_6_in_rtcGPR64 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_7_in_FIXED_REGS 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 269, // sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 0, // sube32 0, // sube64 0, // subo32 0, // subo64 269, // x8sub_0 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_1 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_2 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_3 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_4 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_5 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_6 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_7 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 269, // x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_6_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_4_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_2_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 269, // sub_32_x8sub_1_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_0_x8sub_1 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_2_x8sub_3 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_4_x8sub_5 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_6_x8sub_7 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 269, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> GPR64x8Class_with_x8sub_7_in_FIXED_REGS 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // ZTR 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 0, // zasubd0 0, // zasubd1 0, // zasubh0 0, // zasubh1 0, // zasubq0 0, // zasubq1 0, // zasubs0 0, // zasubs1 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 0, // zasubd1_then_zasubq0 0, // zasubd1_then_zasubq1 0, // zasubs1_then_zasubd0 0, // zasubs1_then_zasubd1 0, // zasubs1_then_zasubq0 0, // zasubs1_then_zasubq1 0, // zasubs1_then_zasubd1_then_zasubq0 0, // zasubs1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // MPR16 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 271, // zasubd0 -> MPR16 271, // zasubd1 -> MPR16 0, // zasubh0 0, // zasubh1 271, // zasubq0 -> MPR16 271, // zasubq1 -> MPR16 271, // zasubs0 -> MPR16 271, // zasubs1 -> MPR16 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 271, // zasubd1_then_zasubq0 -> MPR16 271, // zasubd1_then_zasubq1 -> MPR16 271, // zasubs1_then_zasubd0 -> MPR16 271, // zasubs1_then_zasubd1 -> MPR16 271, // zasubs1_then_zasubq0 -> MPR16 271, // zasubs1_then_zasubq1 -> MPR16 271, // zasubs1_then_zasubd1_then_zasubq0 -> MPR16 271, // zasubs1_then_zasubd1_then_zasubq1 -> MPR16 0, // zasubh1_then_zasubd0 0, // zasubh1_then_zasubd1 0, // zasubh1_then_zasubq0 0, // zasubh1_then_zasubq1 0, // zasubh1_then_zasubs0 0, // zasubh1_then_zasubs1 0, // zasubh1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubd1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd0 0, // zasubh1_then_zasubs1_then_zasubd1 0, // zasubh1_then_zasubs1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubq1 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // MPR 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 272, // zasubb -> MPR 272, // zasubd0 -> MPR 272, // zasubd1 -> MPR 272, // zasubh0 -> MPR 272, // zasubh1 -> MPR 272, // zasubq0 -> MPR 272, // zasubq1 -> MPR 272, // zasubs0 -> MPR 272, // zasubs1 -> MPR 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 272, // zasubd1_then_zasubq0 -> MPR 272, // zasubd1_then_zasubq1 -> MPR 272, // zasubs1_then_zasubd0 -> MPR 272, // zasubs1_then_zasubd1 -> MPR 272, // zasubs1_then_zasubq0 -> MPR 272, // zasubs1_then_zasubq1 -> MPR 272, // zasubs1_then_zasubd1_then_zasubq0 -> MPR 272, // zasubs1_then_zasubd1_then_zasubq1 -> MPR 272, // zasubh1_then_zasubd0 -> MPR 272, // zasubh1_then_zasubd1 -> MPR 272, // zasubh1_then_zasubq0 -> MPR 272, // zasubh1_then_zasubq1 -> MPR 272, // zasubh1_then_zasubs0 -> MPR 272, // zasubh1_then_zasubs1 -> MPR 272, // zasubh1_then_zasubd1_then_zasubq0 -> MPR 272, // zasubh1_then_zasubd1_then_zasubq1 -> MPR 272, // zasubh1_then_zasubs1_then_zasubd0 -> MPR 272, // zasubh1_then_zasubs1_then_zasubd1 -> MPR 272, // zasubh1_then_zasubs1_then_zasubq0 -> MPR 272, // zasubh1_then_zasubs1_then_zasubq1 -> MPR 272, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 -> MPR 272, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 -> MPR 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, { // MPR8 0, // bsub 0, // dsub 0, // dsub0 0, // dsub1 0, // dsub2 0, // dsub3 0, // hsub 0, // psub0 0, // psub1 0, // qsub0 0, // qsub1 0, // qsub2 0, // qsub3 0, // ssub 0, // sub_32 0, // sube32 0, // sube64 0, // subo32 0, // subo64 0, // x8sub_0 0, // x8sub_1 0, // x8sub_2 0, // x8sub_3 0, // x8sub_4 0, // x8sub_5 0, // x8sub_6 0, // x8sub_7 0, // zasubb 273, // zasubd0 -> MPR8 273, // zasubd1 -> MPR8 273, // zasubh0 -> MPR8 273, // zasubh1 -> MPR8 273, // zasubq0 -> MPR8 273, // zasubq1 -> MPR8 273, // zasubs0 -> MPR8 273, // zasubs1 -> MPR8 0, // zsub 0, // zsub0 0, // zsub1 0, // zsub2 0, // zsub3 0, // zsub_hi 273, // zasubd1_then_zasubq0 -> MPR8 273, // zasubd1_then_zasubq1 -> MPR8 273, // zasubs1_then_zasubd0 -> MPR8 273, // zasubs1_then_zasubd1 -> MPR8 273, // zasubs1_then_zasubq0 -> MPR8 273, // zasubs1_then_zasubq1 -> MPR8 273, // zasubs1_then_zasubd1_then_zasubq0 -> MPR8 273, // zasubs1_then_zasubd1_then_zasubq1 -> MPR8 273, // zasubh1_then_zasubd0 -> MPR8 273, // zasubh1_then_zasubd1 -> MPR8 273, // zasubh1_then_zasubq0 -> MPR8 273, // zasubh1_then_zasubq1 -> MPR8 273, // zasubh1_then_zasubs0 -> MPR8 273, // zasubh1_then_zasubs1 -> MPR8 273, // zasubh1_then_zasubd1_then_zasubq0 -> MPR8 273, // zasubh1_then_zasubd1_then_zasubq1 -> MPR8 273, // zasubh1_then_zasubs1_then_zasubd0 -> MPR8 273, // zasubh1_then_zasubs1_then_zasubd1 -> MPR8 273, // zasubh1_then_zasubs1_then_zasubq0 -> MPR8 273, // zasubh1_then_zasubs1_then_zasubq1 -> MPR8 273, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 -> MPR8 273, // zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 -> MPR8 0, // dsub1_then_bsub 0, // dsub1_then_hsub 0, // dsub1_then_ssub 0, // dsub3_then_bsub 0, // dsub3_then_hsub 0, // dsub3_then_ssub 0, // dsub2_then_bsub 0, // dsub2_then_hsub 0, // dsub2_then_ssub 0, // qsub1_then_bsub 0, // qsub1_then_dsub 0, // qsub1_then_hsub 0, // qsub1_then_ssub 0, // qsub3_then_bsub 0, // qsub3_then_dsub 0, // qsub3_then_hsub 0, // qsub3_then_ssub 0, // qsub2_then_bsub 0, // qsub2_then_dsub 0, // qsub2_then_hsub 0, // qsub2_then_ssub 0, // x8sub_7_then_sub_32 0, // x8sub_6_then_sub_32 0, // x8sub_5_then_sub_32 0, // x8sub_4_then_sub_32 0, // x8sub_3_then_sub_32 0, // x8sub_2_then_sub_32 0, // x8sub_1_then_sub_32 0, // subo64_then_sub_32 0, // zsub1_then_bsub 0, // zsub1_then_dsub 0, // zsub1_then_hsub 0, // zsub1_then_ssub 0, // zsub1_then_zsub 0, // zsub1_then_zsub_hi 0, // zsub3_then_bsub 0, // zsub3_then_dsub 0, // zsub3_then_hsub 0, // zsub3_then_ssub 0, // zsub3_then_zsub 0, // zsub3_then_zsub_hi 0, // zsub2_then_bsub 0, // zsub2_then_dsub 0, // zsub2_then_hsub 0, // zsub2_then_ssub 0, // zsub2_then_zsub 0, // zsub2_then_zsub_hi 0, // dsub0_dsub1 0, // dsub0_dsub1_dsub2 0, // dsub1_dsub2 0, // dsub1_dsub2_dsub3 0, // dsub2_dsub3 0, // dsub_qsub1_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // dsub_qsub1_then_dsub_qsub2_then_dsub 0, // qsub0_qsub1 0, // qsub0_qsub1_qsub2 0, // qsub1_qsub2 0, // qsub1_qsub2_qsub3 0, // qsub2_qsub3 0, // qsub1_then_dsub_qsub2_then_dsub 0, // qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // qsub2_then_dsub_qsub3_then_dsub 0, // sub_32_x8sub_1_then_sub_32 0, // x8sub_0_x8sub_1 0, // x8sub_2_x8sub_3 0, // x8sub_4_x8sub_5 0, // x8sub_6_x8sub_7 0, // x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // sub_32_subo64_then_sub_32 0, // dsub_zsub1_then_dsub 0, // zsub_zsub1_then_zsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // dsub_zsub1_then_dsub_zsub2_then_dsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub_zsub1_then_zsub_zsub2_then_zsub 0, // zsub0_zsub1 0, // zsub0_zsub1_zsub2 0, // zsub1_zsub2 0, // zsub1_zsub2_zsub3 0, // zsub2_zsub3 0, // zsub1_then_dsub_zsub2_then_dsub 0, // zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // zsub1_then_zsub_zsub2_then_zsub 0, // zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // zsub2_then_dsub_zsub3_then_dsub 0, // zsub2_then_zsub_zsub3_then_zsub 0, // zsub0_zsub2 0, // zsub1_zsub3 }, }; assert(RC && "Missing regclass"); if (!Idx) return RC; --Idx; assert(Idx < 155 && "Bad subreg"); unsigned TV = Table[RC->getID()][Idx]; return TV ? getRegClass(TV - 1) : nullptr; } const TargetRegisterClass *AArch64GenRegisterInfo::getSubRegisterClass(const TargetRegisterClass *RC, unsigned Idx) const { static const uint16_t Table[273][155] = { { // FPR8 0, // FPR8:bsub 0, // FPR8:dsub 0, // FPR8:dsub0 0, // FPR8:dsub1 0, // FPR8:dsub2 0, // FPR8:dsub3 0, // FPR8:hsub 0, // FPR8:psub0 0, // FPR8:psub1 0, // FPR8:qsub0 0, // FPR8:qsub1 0, // FPR8:qsub2 0, // FPR8:qsub3 0, // FPR8:ssub 0, // FPR8:sub_32 0, // FPR8:sube32 0, // FPR8:sube64 0, // FPR8:subo32 0, // FPR8:subo64 0, // FPR8:x8sub_0 0, // FPR8:x8sub_1 0, // FPR8:x8sub_2 0, // FPR8:x8sub_3 0, // FPR8:x8sub_4 0, // FPR8:x8sub_5 0, // FPR8:x8sub_6 0, // FPR8:x8sub_7 0, // FPR8:zasubb 0, // FPR8:zasubd0 0, // FPR8:zasubd1 0, // FPR8:zasubh0 0, // FPR8:zasubh1 0, // FPR8:zasubq0 0, // FPR8:zasubq1 0, // FPR8:zasubs0 0, // FPR8:zasubs1 0, // FPR8:zsub 0, // FPR8:zsub0 0, // FPR8:zsub1 0, // FPR8:zsub2 0, // FPR8:zsub3 0, // FPR8:zsub_hi 0, // FPR8:zasubd1_then_zasubq0 0, // FPR8:zasubd1_then_zasubq1 0, // FPR8:zasubs1_then_zasubd0 0, // FPR8:zasubs1_then_zasubd1 0, // FPR8:zasubs1_then_zasubq0 0, // FPR8:zasubs1_then_zasubq1 0, // FPR8:zasubs1_then_zasubd1_then_zasubq0 0, // FPR8:zasubs1_then_zasubd1_then_zasubq1 0, // FPR8:zasubh1_then_zasubd0 0, // FPR8:zasubh1_then_zasubd1 0, // FPR8:zasubh1_then_zasubq0 0, // FPR8:zasubh1_then_zasubq1 0, // FPR8:zasubh1_then_zasubs0 0, // FPR8:zasubh1_then_zasubs1 0, // FPR8:zasubh1_then_zasubd1_then_zasubq0 0, // FPR8:zasubh1_then_zasubd1_then_zasubq1 0, // FPR8:zasubh1_then_zasubs1_then_zasubd0 0, // FPR8:zasubh1_then_zasubs1_then_zasubd1 0, // FPR8:zasubh1_then_zasubs1_then_zasubq0 0, // FPR8:zasubh1_then_zasubs1_then_zasubq1 0, // FPR8:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // FPR8:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // FPR8:dsub1_then_bsub 0, // FPR8:dsub1_then_hsub 0, // FPR8:dsub1_then_ssub 0, // FPR8:dsub3_then_bsub 0, // FPR8:dsub3_then_hsub 0, // FPR8:dsub3_then_ssub 0, // FPR8:dsub2_then_bsub 0, // FPR8:dsub2_then_hsub 0, // FPR8:dsub2_then_ssub 0, // FPR8:qsub1_then_bsub 0, // FPR8:qsub1_then_dsub 0, // FPR8:qsub1_then_hsub 0, // FPR8:qsub1_then_ssub 0, // FPR8:qsub3_then_bsub 0, // FPR8:qsub3_then_dsub 0, // FPR8:qsub3_then_hsub 0, // FPR8:qsub3_then_ssub 0, // FPR8:qsub2_then_bsub 0, // FPR8:qsub2_then_dsub 0, // FPR8:qsub2_then_hsub 0, // FPR8:qsub2_then_ssub 0, // FPR8:x8sub_7_then_sub_32 0, // FPR8:x8sub_6_then_sub_32 0, // FPR8:x8sub_5_then_sub_32 0, // FPR8:x8sub_4_then_sub_32 0, // FPR8:x8sub_3_then_sub_32 0, // FPR8:x8sub_2_then_sub_32 0, // FPR8:x8sub_1_then_sub_32 0, // FPR8:subo64_then_sub_32 0, // FPR8:zsub1_then_bsub 0, // FPR8:zsub1_then_dsub 0, // FPR8:zsub1_then_hsub 0, // FPR8:zsub1_then_ssub 0, // FPR8:zsub1_then_zsub 0, // FPR8:zsub1_then_zsub_hi 0, // FPR8:zsub3_then_bsub 0, // FPR8:zsub3_then_dsub 0, // FPR8:zsub3_then_hsub 0, // FPR8:zsub3_then_ssub 0, // FPR8:zsub3_then_zsub 0, // FPR8:zsub3_then_zsub_hi 0, // FPR8:zsub2_then_bsub 0, // FPR8:zsub2_then_dsub 0, // FPR8:zsub2_then_hsub 0, // FPR8:zsub2_then_ssub 0, // FPR8:zsub2_then_zsub 0, // FPR8:zsub2_then_zsub_hi 0, // FPR8:dsub0_dsub1 0, // FPR8:dsub0_dsub1_dsub2 0, // FPR8:dsub1_dsub2 0, // FPR8:dsub1_dsub2_dsub3 0, // FPR8:dsub2_dsub3 0, // FPR8:dsub_qsub1_then_dsub 0, // FPR8:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FPR8:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // FPR8:qsub0_qsub1 0, // FPR8:qsub0_qsub1_qsub2 0, // FPR8:qsub1_qsub2 0, // FPR8:qsub1_qsub2_qsub3 0, // FPR8:qsub2_qsub3 0, // FPR8:qsub1_then_dsub_qsub2_then_dsub 0, // FPR8:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FPR8:qsub2_then_dsub_qsub3_then_dsub 0, // FPR8:sub_32_x8sub_1_then_sub_32 0, // FPR8:x8sub_0_x8sub_1 0, // FPR8:x8sub_2_x8sub_3 0, // FPR8:x8sub_4_x8sub_5 0, // FPR8:x8sub_6_x8sub_7 0, // FPR8:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // FPR8:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // FPR8:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // FPR8:sub_32_subo64_then_sub_32 0, // FPR8:dsub_zsub1_then_dsub 0, // FPR8:zsub_zsub1_then_zsub 0, // FPR8:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FPR8:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // FPR8:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FPR8:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // FPR8:zsub0_zsub1 0, // FPR8:zsub0_zsub1_zsub2 0, // FPR8:zsub1_zsub2 0, // FPR8:zsub1_zsub2_zsub3 0, // FPR8:zsub2_zsub3 0, // FPR8:zsub1_then_dsub_zsub2_then_dsub 0, // FPR8:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FPR8:zsub1_then_zsub_zsub2_then_zsub 0, // FPR8:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FPR8:zsub2_then_dsub_zsub3_then_dsub 0, // FPR8:zsub2_then_zsub_zsub3_then_zsub 0, // FPR8:zsub0_zsub2 0, // FPR8:zsub1_zsub3 }, { // FPR16 1, // FPR16:bsub -> FPR8 0, // FPR16:dsub 0, // FPR16:dsub0 0, // FPR16:dsub1 0, // FPR16:dsub2 0, // FPR16:dsub3 0, // FPR16:hsub 0, // FPR16:psub0 0, // FPR16:psub1 0, // FPR16:qsub0 0, // FPR16:qsub1 0, // FPR16:qsub2 0, // FPR16:qsub3 0, // FPR16:ssub 0, // FPR16:sub_32 0, // FPR16:sube32 0, // FPR16:sube64 0, // FPR16:subo32 0, // FPR16:subo64 0, // FPR16:x8sub_0 0, // FPR16:x8sub_1 0, // FPR16:x8sub_2 0, // FPR16:x8sub_3 0, // FPR16:x8sub_4 0, // FPR16:x8sub_5 0, // FPR16:x8sub_6 0, // FPR16:x8sub_7 0, // FPR16:zasubb 0, // FPR16:zasubd0 0, // FPR16:zasubd1 0, // FPR16:zasubh0 0, // FPR16:zasubh1 0, // FPR16:zasubq0 0, // FPR16:zasubq1 0, // FPR16:zasubs0 0, // FPR16:zasubs1 0, // FPR16:zsub 0, // FPR16:zsub0 0, // FPR16:zsub1 0, // FPR16:zsub2 0, // FPR16:zsub3 0, // FPR16:zsub_hi 0, // FPR16:zasubd1_then_zasubq0 0, // FPR16:zasubd1_then_zasubq1 0, // FPR16:zasubs1_then_zasubd0 0, // FPR16:zasubs1_then_zasubd1 0, // FPR16:zasubs1_then_zasubq0 0, // FPR16:zasubs1_then_zasubq1 0, // FPR16:zasubs1_then_zasubd1_then_zasubq0 0, // FPR16:zasubs1_then_zasubd1_then_zasubq1 0, // FPR16:zasubh1_then_zasubd0 0, // FPR16:zasubh1_then_zasubd1 0, // FPR16:zasubh1_then_zasubq0 0, // FPR16:zasubh1_then_zasubq1 0, // FPR16:zasubh1_then_zasubs0 0, // FPR16:zasubh1_then_zasubs1 0, // FPR16:zasubh1_then_zasubd1_then_zasubq0 0, // FPR16:zasubh1_then_zasubd1_then_zasubq1 0, // FPR16:zasubh1_then_zasubs1_then_zasubd0 0, // FPR16:zasubh1_then_zasubs1_then_zasubd1 0, // FPR16:zasubh1_then_zasubs1_then_zasubq0 0, // FPR16:zasubh1_then_zasubs1_then_zasubq1 0, // FPR16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // FPR16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // FPR16:dsub1_then_bsub 0, // FPR16:dsub1_then_hsub 0, // FPR16:dsub1_then_ssub 0, // FPR16:dsub3_then_bsub 0, // FPR16:dsub3_then_hsub 0, // FPR16:dsub3_then_ssub 0, // FPR16:dsub2_then_bsub 0, // FPR16:dsub2_then_hsub 0, // FPR16:dsub2_then_ssub 0, // FPR16:qsub1_then_bsub 0, // FPR16:qsub1_then_dsub 0, // FPR16:qsub1_then_hsub 0, // FPR16:qsub1_then_ssub 0, // FPR16:qsub3_then_bsub 0, // FPR16:qsub3_then_dsub 0, // FPR16:qsub3_then_hsub 0, // FPR16:qsub3_then_ssub 0, // FPR16:qsub2_then_bsub 0, // FPR16:qsub2_then_dsub 0, // FPR16:qsub2_then_hsub 0, // FPR16:qsub2_then_ssub 0, // FPR16:x8sub_7_then_sub_32 0, // FPR16:x8sub_6_then_sub_32 0, // FPR16:x8sub_5_then_sub_32 0, // FPR16:x8sub_4_then_sub_32 0, // FPR16:x8sub_3_then_sub_32 0, // FPR16:x8sub_2_then_sub_32 0, // FPR16:x8sub_1_then_sub_32 0, // FPR16:subo64_then_sub_32 0, // FPR16:zsub1_then_bsub 0, // FPR16:zsub1_then_dsub 0, // FPR16:zsub1_then_hsub 0, // FPR16:zsub1_then_ssub 0, // FPR16:zsub1_then_zsub 0, // FPR16:zsub1_then_zsub_hi 0, // FPR16:zsub3_then_bsub 0, // FPR16:zsub3_then_dsub 0, // FPR16:zsub3_then_hsub 0, // FPR16:zsub3_then_ssub 0, // FPR16:zsub3_then_zsub 0, // FPR16:zsub3_then_zsub_hi 0, // FPR16:zsub2_then_bsub 0, // FPR16:zsub2_then_dsub 0, // FPR16:zsub2_then_hsub 0, // FPR16:zsub2_then_ssub 0, // FPR16:zsub2_then_zsub 0, // FPR16:zsub2_then_zsub_hi 0, // FPR16:dsub0_dsub1 0, // FPR16:dsub0_dsub1_dsub2 0, // FPR16:dsub1_dsub2 0, // FPR16:dsub1_dsub2_dsub3 0, // FPR16:dsub2_dsub3 0, // FPR16:dsub_qsub1_then_dsub 0, // FPR16:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FPR16:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // FPR16:qsub0_qsub1 0, // FPR16:qsub0_qsub1_qsub2 0, // FPR16:qsub1_qsub2 0, // FPR16:qsub1_qsub2_qsub3 0, // FPR16:qsub2_qsub3 0, // FPR16:qsub1_then_dsub_qsub2_then_dsub 0, // FPR16:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FPR16:qsub2_then_dsub_qsub3_then_dsub 0, // FPR16:sub_32_x8sub_1_then_sub_32 0, // FPR16:x8sub_0_x8sub_1 0, // FPR16:x8sub_2_x8sub_3 0, // FPR16:x8sub_4_x8sub_5 0, // FPR16:x8sub_6_x8sub_7 0, // FPR16:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // FPR16:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // FPR16:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // FPR16:sub_32_subo64_then_sub_32 0, // FPR16:dsub_zsub1_then_dsub 0, // FPR16:zsub_zsub1_then_zsub 0, // FPR16:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FPR16:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // FPR16:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FPR16:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // FPR16:zsub0_zsub1 0, // FPR16:zsub0_zsub1_zsub2 0, // FPR16:zsub1_zsub2 0, // FPR16:zsub1_zsub2_zsub3 0, // FPR16:zsub2_zsub3 0, // FPR16:zsub1_then_dsub_zsub2_then_dsub 0, // FPR16:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FPR16:zsub1_then_zsub_zsub2_then_zsub 0, // FPR16:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FPR16:zsub2_then_dsub_zsub3_then_dsub 0, // FPR16:zsub2_then_zsub_zsub3_then_zsub 0, // FPR16:zsub0_zsub2 0, // FPR16:zsub1_zsub3 }, { // FPR16_lo 1, // FPR16_lo:bsub -> FPR8 0, // FPR16_lo:dsub 0, // FPR16_lo:dsub0 0, // FPR16_lo:dsub1 0, // FPR16_lo:dsub2 0, // FPR16_lo:dsub3 0, // FPR16_lo:hsub 0, // FPR16_lo:psub0 0, // FPR16_lo:psub1 0, // FPR16_lo:qsub0 0, // FPR16_lo:qsub1 0, // FPR16_lo:qsub2 0, // FPR16_lo:qsub3 0, // FPR16_lo:ssub 0, // FPR16_lo:sub_32 0, // FPR16_lo:sube32 0, // FPR16_lo:sube64 0, // FPR16_lo:subo32 0, // FPR16_lo:subo64 0, // FPR16_lo:x8sub_0 0, // FPR16_lo:x8sub_1 0, // FPR16_lo:x8sub_2 0, // FPR16_lo:x8sub_3 0, // FPR16_lo:x8sub_4 0, // FPR16_lo:x8sub_5 0, // FPR16_lo:x8sub_6 0, // FPR16_lo:x8sub_7 0, // FPR16_lo:zasubb 0, // FPR16_lo:zasubd0 0, // FPR16_lo:zasubd1 0, // FPR16_lo:zasubh0 0, // FPR16_lo:zasubh1 0, // FPR16_lo:zasubq0 0, // FPR16_lo:zasubq1 0, // FPR16_lo:zasubs0 0, // FPR16_lo:zasubs1 0, // FPR16_lo:zsub 0, // FPR16_lo:zsub0 0, // FPR16_lo:zsub1 0, // FPR16_lo:zsub2 0, // FPR16_lo:zsub3 0, // FPR16_lo:zsub_hi 0, // FPR16_lo:zasubd1_then_zasubq0 0, // FPR16_lo:zasubd1_then_zasubq1 0, // FPR16_lo:zasubs1_then_zasubd0 0, // FPR16_lo:zasubs1_then_zasubd1 0, // FPR16_lo:zasubs1_then_zasubq0 0, // FPR16_lo:zasubs1_then_zasubq1 0, // FPR16_lo:zasubs1_then_zasubd1_then_zasubq0 0, // FPR16_lo:zasubs1_then_zasubd1_then_zasubq1 0, // FPR16_lo:zasubh1_then_zasubd0 0, // FPR16_lo:zasubh1_then_zasubd1 0, // FPR16_lo:zasubh1_then_zasubq0 0, // FPR16_lo:zasubh1_then_zasubq1 0, // FPR16_lo:zasubh1_then_zasubs0 0, // FPR16_lo:zasubh1_then_zasubs1 0, // FPR16_lo:zasubh1_then_zasubd1_then_zasubq0 0, // FPR16_lo:zasubh1_then_zasubd1_then_zasubq1 0, // FPR16_lo:zasubh1_then_zasubs1_then_zasubd0 0, // FPR16_lo:zasubh1_then_zasubs1_then_zasubd1 0, // FPR16_lo:zasubh1_then_zasubs1_then_zasubq0 0, // FPR16_lo:zasubh1_then_zasubs1_then_zasubq1 0, // FPR16_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // FPR16_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // FPR16_lo:dsub1_then_bsub 0, // FPR16_lo:dsub1_then_hsub 0, // FPR16_lo:dsub1_then_ssub 0, // FPR16_lo:dsub3_then_bsub 0, // FPR16_lo:dsub3_then_hsub 0, // FPR16_lo:dsub3_then_ssub 0, // FPR16_lo:dsub2_then_bsub 0, // FPR16_lo:dsub2_then_hsub 0, // FPR16_lo:dsub2_then_ssub 0, // FPR16_lo:qsub1_then_bsub 0, // FPR16_lo:qsub1_then_dsub 0, // FPR16_lo:qsub1_then_hsub 0, // FPR16_lo:qsub1_then_ssub 0, // FPR16_lo:qsub3_then_bsub 0, // FPR16_lo:qsub3_then_dsub 0, // FPR16_lo:qsub3_then_hsub 0, // FPR16_lo:qsub3_then_ssub 0, // FPR16_lo:qsub2_then_bsub 0, // FPR16_lo:qsub2_then_dsub 0, // FPR16_lo:qsub2_then_hsub 0, // FPR16_lo:qsub2_then_ssub 0, // FPR16_lo:x8sub_7_then_sub_32 0, // FPR16_lo:x8sub_6_then_sub_32 0, // FPR16_lo:x8sub_5_then_sub_32 0, // FPR16_lo:x8sub_4_then_sub_32 0, // FPR16_lo:x8sub_3_then_sub_32 0, // FPR16_lo:x8sub_2_then_sub_32 0, // FPR16_lo:x8sub_1_then_sub_32 0, // FPR16_lo:subo64_then_sub_32 0, // FPR16_lo:zsub1_then_bsub 0, // FPR16_lo:zsub1_then_dsub 0, // FPR16_lo:zsub1_then_hsub 0, // FPR16_lo:zsub1_then_ssub 0, // FPR16_lo:zsub1_then_zsub 0, // FPR16_lo:zsub1_then_zsub_hi 0, // FPR16_lo:zsub3_then_bsub 0, // FPR16_lo:zsub3_then_dsub 0, // FPR16_lo:zsub3_then_hsub 0, // FPR16_lo:zsub3_then_ssub 0, // FPR16_lo:zsub3_then_zsub 0, // FPR16_lo:zsub3_then_zsub_hi 0, // FPR16_lo:zsub2_then_bsub 0, // FPR16_lo:zsub2_then_dsub 0, // FPR16_lo:zsub2_then_hsub 0, // FPR16_lo:zsub2_then_ssub 0, // FPR16_lo:zsub2_then_zsub 0, // FPR16_lo:zsub2_then_zsub_hi 0, // FPR16_lo:dsub0_dsub1 0, // FPR16_lo:dsub0_dsub1_dsub2 0, // FPR16_lo:dsub1_dsub2 0, // FPR16_lo:dsub1_dsub2_dsub3 0, // FPR16_lo:dsub2_dsub3 0, // FPR16_lo:dsub_qsub1_then_dsub 0, // FPR16_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FPR16_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // FPR16_lo:qsub0_qsub1 0, // FPR16_lo:qsub0_qsub1_qsub2 0, // FPR16_lo:qsub1_qsub2 0, // FPR16_lo:qsub1_qsub2_qsub3 0, // FPR16_lo:qsub2_qsub3 0, // FPR16_lo:qsub1_then_dsub_qsub2_then_dsub 0, // FPR16_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FPR16_lo:qsub2_then_dsub_qsub3_then_dsub 0, // FPR16_lo:sub_32_x8sub_1_then_sub_32 0, // FPR16_lo:x8sub_0_x8sub_1 0, // FPR16_lo:x8sub_2_x8sub_3 0, // FPR16_lo:x8sub_4_x8sub_5 0, // FPR16_lo:x8sub_6_x8sub_7 0, // FPR16_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // FPR16_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // FPR16_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // FPR16_lo:sub_32_subo64_then_sub_32 0, // FPR16_lo:dsub_zsub1_then_dsub 0, // FPR16_lo:zsub_zsub1_then_zsub 0, // FPR16_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FPR16_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // FPR16_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FPR16_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // FPR16_lo:zsub0_zsub1 0, // FPR16_lo:zsub0_zsub1_zsub2 0, // FPR16_lo:zsub1_zsub2 0, // FPR16_lo:zsub1_zsub2_zsub3 0, // FPR16_lo:zsub2_zsub3 0, // FPR16_lo:zsub1_then_dsub_zsub2_then_dsub 0, // FPR16_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FPR16_lo:zsub1_then_zsub_zsub2_then_zsub 0, // FPR16_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FPR16_lo:zsub2_then_dsub_zsub3_then_dsub 0, // FPR16_lo:zsub2_then_zsub_zsub3_then_zsub 0, // FPR16_lo:zsub0_zsub2 0, // FPR16_lo:zsub1_zsub3 }, { // PPR 0, // PPR:bsub 0, // PPR:dsub 0, // PPR:dsub0 0, // PPR:dsub1 0, // PPR:dsub2 0, // PPR:dsub3 0, // PPR:hsub 0, // PPR:psub0 0, // PPR:psub1 0, // PPR:qsub0 0, // PPR:qsub1 0, // PPR:qsub2 0, // PPR:qsub3 0, // PPR:ssub 0, // PPR:sub_32 0, // PPR:sube32 0, // PPR:sube64 0, // PPR:subo32 0, // PPR:subo64 0, // PPR:x8sub_0 0, // PPR:x8sub_1 0, // PPR:x8sub_2 0, // PPR:x8sub_3 0, // PPR:x8sub_4 0, // PPR:x8sub_5 0, // PPR:x8sub_6 0, // PPR:x8sub_7 0, // PPR:zasubb 0, // PPR:zasubd0 0, // PPR:zasubd1 0, // PPR:zasubh0 0, // PPR:zasubh1 0, // PPR:zasubq0 0, // PPR:zasubq1 0, // PPR:zasubs0 0, // PPR:zasubs1 0, // PPR:zsub 0, // PPR:zsub0 0, // PPR:zsub1 0, // PPR:zsub2 0, // PPR:zsub3 0, // PPR:zsub_hi 0, // PPR:zasubd1_then_zasubq0 0, // PPR:zasubd1_then_zasubq1 0, // PPR:zasubs1_then_zasubd0 0, // PPR:zasubs1_then_zasubd1 0, // PPR:zasubs1_then_zasubq0 0, // PPR:zasubs1_then_zasubq1 0, // PPR:zasubs1_then_zasubd1_then_zasubq0 0, // PPR:zasubs1_then_zasubd1_then_zasubq1 0, // PPR:zasubh1_then_zasubd0 0, // PPR:zasubh1_then_zasubd1 0, // PPR:zasubh1_then_zasubq0 0, // PPR:zasubh1_then_zasubq1 0, // PPR:zasubh1_then_zasubs0 0, // PPR:zasubh1_then_zasubs1 0, // PPR:zasubh1_then_zasubd1_then_zasubq0 0, // PPR:zasubh1_then_zasubd1_then_zasubq1 0, // PPR:zasubh1_then_zasubs1_then_zasubd0 0, // PPR:zasubh1_then_zasubs1_then_zasubd1 0, // PPR:zasubh1_then_zasubs1_then_zasubq0 0, // PPR:zasubh1_then_zasubs1_then_zasubq1 0, // PPR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // PPR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // PPR:dsub1_then_bsub 0, // PPR:dsub1_then_hsub 0, // PPR:dsub1_then_ssub 0, // PPR:dsub3_then_bsub 0, // PPR:dsub3_then_hsub 0, // PPR:dsub3_then_ssub 0, // PPR:dsub2_then_bsub 0, // PPR:dsub2_then_hsub 0, // PPR:dsub2_then_ssub 0, // PPR:qsub1_then_bsub 0, // PPR:qsub1_then_dsub 0, // PPR:qsub1_then_hsub 0, // PPR:qsub1_then_ssub 0, // PPR:qsub3_then_bsub 0, // PPR:qsub3_then_dsub 0, // PPR:qsub3_then_hsub 0, // PPR:qsub3_then_ssub 0, // PPR:qsub2_then_bsub 0, // PPR:qsub2_then_dsub 0, // PPR:qsub2_then_hsub 0, // PPR:qsub2_then_ssub 0, // PPR:x8sub_7_then_sub_32 0, // PPR:x8sub_6_then_sub_32 0, // PPR:x8sub_5_then_sub_32 0, // PPR:x8sub_4_then_sub_32 0, // PPR:x8sub_3_then_sub_32 0, // PPR:x8sub_2_then_sub_32 0, // PPR:x8sub_1_then_sub_32 0, // PPR:subo64_then_sub_32 0, // PPR:zsub1_then_bsub 0, // PPR:zsub1_then_dsub 0, // PPR:zsub1_then_hsub 0, // PPR:zsub1_then_ssub 0, // PPR:zsub1_then_zsub 0, // PPR:zsub1_then_zsub_hi 0, // PPR:zsub3_then_bsub 0, // PPR:zsub3_then_dsub 0, // PPR:zsub3_then_hsub 0, // PPR:zsub3_then_ssub 0, // PPR:zsub3_then_zsub 0, // PPR:zsub3_then_zsub_hi 0, // PPR:zsub2_then_bsub 0, // PPR:zsub2_then_dsub 0, // PPR:zsub2_then_hsub 0, // PPR:zsub2_then_ssub 0, // PPR:zsub2_then_zsub 0, // PPR:zsub2_then_zsub_hi 0, // PPR:dsub0_dsub1 0, // PPR:dsub0_dsub1_dsub2 0, // PPR:dsub1_dsub2 0, // PPR:dsub1_dsub2_dsub3 0, // PPR:dsub2_dsub3 0, // PPR:dsub_qsub1_then_dsub 0, // PPR:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // PPR:qsub0_qsub1 0, // PPR:qsub0_qsub1_qsub2 0, // PPR:qsub1_qsub2 0, // PPR:qsub1_qsub2_qsub3 0, // PPR:qsub2_qsub3 0, // PPR:qsub1_then_dsub_qsub2_then_dsub 0, // PPR:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR:qsub2_then_dsub_qsub3_then_dsub 0, // PPR:sub_32_x8sub_1_then_sub_32 0, // PPR:x8sub_0_x8sub_1 0, // PPR:x8sub_2_x8sub_3 0, // PPR:x8sub_4_x8sub_5 0, // PPR:x8sub_6_x8sub_7 0, // PPR:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // PPR:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // PPR:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // PPR:sub_32_subo64_then_sub_32 0, // PPR:dsub_zsub1_then_dsub 0, // PPR:zsub_zsub1_then_zsub 0, // PPR:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // PPR:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // PPR:zsub0_zsub1 0, // PPR:zsub0_zsub1_zsub2 0, // PPR:zsub1_zsub2 0, // PPR:zsub1_zsub2_zsub3 0, // PPR:zsub2_zsub3 0, // PPR:zsub1_then_dsub_zsub2_then_dsub 0, // PPR:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR:zsub1_then_zsub_zsub2_then_zsub 0, // PPR:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR:zsub2_then_dsub_zsub3_then_dsub 0, // PPR:zsub2_then_zsub_zsub3_then_zsub 0, // PPR:zsub0_zsub2 0, // PPR:zsub1_zsub3 }, { // PPR_3b 0, // PPR_3b:bsub 0, // PPR_3b:dsub 0, // PPR_3b:dsub0 0, // PPR_3b:dsub1 0, // PPR_3b:dsub2 0, // PPR_3b:dsub3 0, // PPR_3b:hsub 0, // PPR_3b:psub0 0, // PPR_3b:psub1 0, // PPR_3b:qsub0 0, // PPR_3b:qsub1 0, // PPR_3b:qsub2 0, // PPR_3b:qsub3 0, // PPR_3b:ssub 0, // PPR_3b:sub_32 0, // PPR_3b:sube32 0, // PPR_3b:sube64 0, // PPR_3b:subo32 0, // PPR_3b:subo64 0, // PPR_3b:x8sub_0 0, // PPR_3b:x8sub_1 0, // PPR_3b:x8sub_2 0, // PPR_3b:x8sub_3 0, // PPR_3b:x8sub_4 0, // PPR_3b:x8sub_5 0, // PPR_3b:x8sub_6 0, // PPR_3b:x8sub_7 0, // PPR_3b:zasubb 0, // PPR_3b:zasubd0 0, // PPR_3b:zasubd1 0, // PPR_3b:zasubh0 0, // PPR_3b:zasubh1 0, // PPR_3b:zasubq0 0, // PPR_3b:zasubq1 0, // PPR_3b:zasubs0 0, // PPR_3b:zasubs1 0, // PPR_3b:zsub 0, // PPR_3b:zsub0 0, // PPR_3b:zsub1 0, // PPR_3b:zsub2 0, // PPR_3b:zsub3 0, // PPR_3b:zsub_hi 0, // PPR_3b:zasubd1_then_zasubq0 0, // PPR_3b:zasubd1_then_zasubq1 0, // PPR_3b:zasubs1_then_zasubd0 0, // PPR_3b:zasubs1_then_zasubd1 0, // PPR_3b:zasubs1_then_zasubq0 0, // PPR_3b:zasubs1_then_zasubq1 0, // PPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // PPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // PPR_3b:zasubh1_then_zasubd0 0, // PPR_3b:zasubh1_then_zasubd1 0, // PPR_3b:zasubh1_then_zasubq0 0, // PPR_3b:zasubh1_then_zasubq1 0, // PPR_3b:zasubh1_then_zasubs0 0, // PPR_3b:zasubh1_then_zasubs1 0, // PPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // PPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // PPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // PPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // PPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // PPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // PPR_3b:dsub1_then_bsub 0, // PPR_3b:dsub1_then_hsub 0, // PPR_3b:dsub1_then_ssub 0, // PPR_3b:dsub3_then_bsub 0, // PPR_3b:dsub3_then_hsub 0, // PPR_3b:dsub3_then_ssub 0, // PPR_3b:dsub2_then_bsub 0, // PPR_3b:dsub2_then_hsub 0, // PPR_3b:dsub2_then_ssub 0, // PPR_3b:qsub1_then_bsub 0, // PPR_3b:qsub1_then_dsub 0, // PPR_3b:qsub1_then_hsub 0, // PPR_3b:qsub1_then_ssub 0, // PPR_3b:qsub3_then_bsub 0, // PPR_3b:qsub3_then_dsub 0, // PPR_3b:qsub3_then_hsub 0, // PPR_3b:qsub3_then_ssub 0, // PPR_3b:qsub2_then_bsub 0, // PPR_3b:qsub2_then_dsub 0, // PPR_3b:qsub2_then_hsub 0, // PPR_3b:qsub2_then_ssub 0, // PPR_3b:x8sub_7_then_sub_32 0, // PPR_3b:x8sub_6_then_sub_32 0, // PPR_3b:x8sub_5_then_sub_32 0, // PPR_3b:x8sub_4_then_sub_32 0, // PPR_3b:x8sub_3_then_sub_32 0, // PPR_3b:x8sub_2_then_sub_32 0, // PPR_3b:x8sub_1_then_sub_32 0, // PPR_3b:subo64_then_sub_32 0, // PPR_3b:zsub1_then_bsub 0, // PPR_3b:zsub1_then_dsub 0, // PPR_3b:zsub1_then_hsub 0, // PPR_3b:zsub1_then_ssub 0, // PPR_3b:zsub1_then_zsub 0, // PPR_3b:zsub1_then_zsub_hi 0, // PPR_3b:zsub3_then_bsub 0, // PPR_3b:zsub3_then_dsub 0, // PPR_3b:zsub3_then_hsub 0, // PPR_3b:zsub3_then_ssub 0, // PPR_3b:zsub3_then_zsub 0, // PPR_3b:zsub3_then_zsub_hi 0, // PPR_3b:zsub2_then_bsub 0, // PPR_3b:zsub2_then_dsub 0, // PPR_3b:zsub2_then_hsub 0, // PPR_3b:zsub2_then_ssub 0, // PPR_3b:zsub2_then_zsub 0, // PPR_3b:zsub2_then_zsub_hi 0, // PPR_3b:dsub0_dsub1 0, // PPR_3b:dsub0_dsub1_dsub2 0, // PPR_3b:dsub1_dsub2 0, // PPR_3b:dsub1_dsub2_dsub3 0, // PPR_3b:dsub2_dsub3 0, // PPR_3b:dsub_qsub1_then_dsub 0, // PPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // PPR_3b:qsub0_qsub1 0, // PPR_3b:qsub0_qsub1_qsub2 0, // PPR_3b:qsub1_qsub2 0, // PPR_3b:qsub1_qsub2_qsub3 0, // PPR_3b:qsub2_qsub3 0, // PPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // PPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // PPR_3b:sub_32_x8sub_1_then_sub_32 0, // PPR_3b:x8sub_0_x8sub_1 0, // PPR_3b:x8sub_2_x8sub_3 0, // PPR_3b:x8sub_4_x8sub_5 0, // PPR_3b:x8sub_6_x8sub_7 0, // PPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // PPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // PPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // PPR_3b:sub_32_subo64_then_sub_32 0, // PPR_3b:dsub_zsub1_then_dsub 0, // PPR_3b:zsub_zsub1_then_zsub 0, // PPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // PPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // PPR_3b:zsub0_zsub1 0, // PPR_3b:zsub0_zsub1_zsub2 0, // PPR_3b:zsub1_zsub2 0, // PPR_3b:zsub1_zsub2_zsub3 0, // PPR_3b:zsub2_zsub3 0, // PPR_3b:zsub1_then_dsub_zsub2_then_dsub 0, // PPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR_3b:zsub1_then_zsub_zsub2_then_zsub 0, // PPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // PPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // PPR_3b:zsub0_zsub2 0, // PPR_3b:zsub1_zsub3 }, { // PPR_p8to15 0, // PPR_p8to15:bsub 0, // PPR_p8to15:dsub 0, // PPR_p8to15:dsub0 0, // PPR_p8to15:dsub1 0, // PPR_p8to15:dsub2 0, // PPR_p8to15:dsub3 0, // PPR_p8to15:hsub 0, // PPR_p8to15:psub0 0, // PPR_p8to15:psub1 0, // PPR_p8to15:qsub0 0, // PPR_p8to15:qsub1 0, // PPR_p8to15:qsub2 0, // PPR_p8to15:qsub3 0, // PPR_p8to15:ssub 0, // PPR_p8to15:sub_32 0, // PPR_p8to15:sube32 0, // PPR_p8to15:sube64 0, // PPR_p8to15:subo32 0, // PPR_p8to15:subo64 0, // PPR_p8to15:x8sub_0 0, // PPR_p8to15:x8sub_1 0, // PPR_p8to15:x8sub_2 0, // PPR_p8to15:x8sub_3 0, // PPR_p8to15:x8sub_4 0, // PPR_p8to15:x8sub_5 0, // PPR_p8to15:x8sub_6 0, // PPR_p8to15:x8sub_7 0, // PPR_p8to15:zasubb 0, // PPR_p8to15:zasubd0 0, // PPR_p8to15:zasubd1 0, // PPR_p8to15:zasubh0 0, // PPR_p8to15:zasubh1 0, // PPR_p8to15:zasubq0 0, // PPR_p8to15:zasubq1 0, // PPR_p8to15:zasubs0 0, // PPR_p8to15:zasubs1 0, // PPR_p8to15:zsub 0, // PPR_p8to15:zsub0 0, // PPR_p8to15:zsub1 0, // PPR_p8to15:zsub2 0, // PPR_p8to15:zsub3 0, // PPR_p8to15:zsub_hi 0, // PPR_p8to15:zasubd1_then_zasubq0 0, // PPR_p8to15:zasubd1_then_zasubq1 0, // PPR_p8to15:zasubs1_then_zasubd0 0, // PPR_p8to15:zasubs1_then_zasubd1 0, // PPR_p8to15:zasubs1_then_zasubq0 0, // PPR_p8to15:zasubs1_then_zasubq1 0, // PPR_p8to15:zasubs1_then_zasubd1_then_zasubq0 0, // PPR_p8to15:zasubs1_then_zasubd1_then_zasubq1 0, // PPR_p8to15:zasubh1_then_zasubd0 0, // PPR_p8to15:zasubh1_then_zasubd1 0, // PPR_p8to15:zasubh1_then_zasubq0 0, // PPR_p8to15:zasubh1_then_zasubq1 0, // PPR_p8to15:zasubh1_then_zasubs0 0, // PPR_p8to15:zasubh1_then_zasubs1 0, // PPR_p8to15:zasubh1_then_zasubd1_then_zasubq0 0, // PPR_p8to15:zasubh1_then_zasubd1_then_zasubq1 0, // PPR_p8to15:zasubh1_then_zasubs1_then_zasubd0 0, // PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1 0, // PPR_p8to15:zasubh1_then_zasubs1_then_zasubq0 0, // PPR_p8to15:zasubh1_then_zasubs1_then_zasubq1 0, // PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // PPR_p8to15:dsub1_then_bsub 0, // PPR_p8to15:dsub1_then_hsub 0, // PPR_p8to15:dsub1_then_ssub 0, // PPR_p8to15:dsub3_then_bsub 0, // PPR_p8to15:dsub3_then_hsub 0, // PPR_p8to15:dsub3_then_ssub 0, // PPR_p8to15:dsub2_then_bsub 0, // PPR_p8to15:dsub2_then_hsub 0, // PPR_p8to15:dsub2_then_ssub 0, // PPR_p8to15:qsub1_then_bsub 0, // PPR_p8to15:qsub1_then_dsub 0, // PPR_p8to15:qsub1_then_hsub 0, // PPR_p8to15:qsub1_then_ssub 0, // PPR_p8to15:qsub3_then_bsub 0, // PPR_p8to15:qsub3_then_dsub 0, // PPR_p8to15:qsub3_then_hsub 0, // PPR_p8to15:qsub3_then_ssub 0, // PPR_p8to15:qsub2_then_bsub 0, // PPR_p8to15:qsub2_then_dsub 0, // PPR_p8to15:qsub2_then_hsub 0, // PPR_p8to15:qsub2_then_ssub 0, // PPR_p8to15:x8sub_7_then_sub_32 0, // PPR_p8to15:x8sub_6_then_sub_32 0, // PPR_p8to15:x8sub_5_then_sub_32 0, // PPR_p8to15:x8sub_4_then_sub_32 0, // PPR_p8to15:x8sub_3_then_sub_32 0, // PPR_p8to15:x8sub_2_then_sub_32 0, // PPR_p8to15:x8sub_1_then_sub_32 0, // PPR_p8to15:subo64_then_sub_32 0, // PPR_p8to15:zsub1_then_bsub 0, // PPR_p8to15:zsub1_then_dsub 0, // PPR_p8to15:zsub1_then_hsub 0, // PPR_p8to15:zsub1_then_ssub 0, // PPR_p8to15:zsub1_then_zsub 0, // PPR_p8to15:zsub1_then_zsub_hi 0, // PPR_p8to15:zsub3_then_bsub 0, // PPR_p8to15:zsub3_then_dsub 0, // PPR_p8to15:zsub3_then_hsub 0, // PPR_p8to15:zsub3_then_ssub 0, // PPR_p8to15:zsub3_then_zsub 0, // PPR_p8to15:zsub3_then_zsub_hi 0, // PPR_p8to15:zsub2_then_bsub 0, // PPR_p8to15:zsub2_then_dsub 0, // PPR_p8to15:zsub2_then_hsub 0, // PPR_p8to15:zsub2_then_ssub 0, // PPR_p8to15:zsub2_then_zsub 0, // PPR_p8to15:zsub2_then_zsub_hi 0, // PPR_p8to15:dsub0_dsub1 0, // PPR_p8to15:dsub0_dsub1_dsub2 0, // PPR_p8to15:dsub1_dsub2 0, // PPR_p8to15:dsub1_dsub2_dsub3 0, // PPR_p8to15:dsub2_dsub3 0, // PPR_p8to15:dsub_qsub1_then_dsub 0, // PPR_p8to15:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR_p8to15:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // PPR_p8to15:qsub0_qsub1 0, // PPR_p8to15:qsub0_qsub1_qsub2 0, // PPR_p8to15:qsub1_qsub2 0, // PPR_p8to15:qsub1_qsub2_qsub3 0, // PPR_p8to15:qsub2_qsub3 0, // PPR_p8to15:qsub1_then_dsub_qsub2_then_dsub 0, // PPR_p8to15:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR_p8to15:qsub2_then_dsub_qsub3_then_dsub 0, // PPR_p8to15:sub_32_x8sub_1_then_sub_32 0, // PPR_p8to15:x8sub_0_x8sub_1 0, // PPR_p8to15:x8sub_2_x8sub_3 0, // PPR_p8to15:x8sub_4_x8sub_5 0, // PPR_p8to15:x8sub_6_x8sub_7 0, // PPR_p8to15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // PPR_p8to15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // PPR_p8to15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // PPR_p8to15:sub_32_subo64_then_sub_32 0, // PPR_p8to15:dsub_zsub1_then_dsub 0, // PPR_p8to15:zsub_zsub1_then_zsub 0, // PPR_p8to15:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR_p8to15:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // PPR_p8to15:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR_p8to15:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // PPR_p8to15:zsub0_zsub1 0, // PPR_p8to15:zsub0_zsub1_zsub2 0, // PPR_p8to15:zsub1_zsub2 0, // PPR_p8to15:zsub1_zsub2_zsub3 0, // PPR_p8to15:zsub2_zsub3 0, // PPR_p8to15:zsub1_then_dsub_zsub2_then_dsub 0, // PPR_p8to15:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR_p8to15:zsub1_then_zsub_zsub2_then_zsub 0, // PPR_p8to15:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR_p8to15:zsub2_then_dsub_zsub3_then_dsub 0, // PPR_p8to15:zsub2_then_zsub_zsub3_then_zsub 0, // PPR_p8to15:zsub0_zsub2 0, // PPR_p8to15:zsub1_zsub3 }, { // PPR2 0, // PPR2:bsub 0, // PPR2:dsub 0, // PPR2:dsub0 0, // PPR2:dsub1 0, // PPR2:dsub2 0, // PPR2:dsub3 0, // PPR2:hsub 4, // PPR2:psub0 -> PPR 4, // PPR2:psub1 -> PPR 0, // PPR2:qsub0 0, // PPR2:qsub1 0, // PPR2:qsub2 0, // PPR2:qsub3 0, // PPR2:ssub 0, // PPR2:sub_32 0, // PPR2:sube32 0, // PPR2:sube64 0, // PPR2:subo32 0, // PPR2:subo64 0, // PPR2:x8sub_0 0, // PPR2:x8sub_1 0, // PPR2:x8sub_2 0, // PPR2:x8sub_3 0, // PPR2:x8sub_4 0, // PPR2:x8sub_5 0, // PPR2:x8sub_6 0, // PPR2:x8sub_7 0, // PPR2:zasubb 0, // PPR2:zasubd0 0, // PPR2:zasubd1 0, // PPR2:zasubh0 0, // PPR2:zasubh1 0, // PPR2:zasubq0 0, // PPR2:zasubq1 0, // PPR2:zasubs0 0, // PPR2:zasubs1 0, // PPR2:zsub 0, // PPR2:zsub0 0, // PPR2:zsub1 0, // PPR2:zsub2 0, // PPR2:zsub3 0, // PPR2:zsub_hi 0, // PPR2:zasubd1_then_zasubq0 0, // PPR2:zasubd1_then_zasubq1 0, // PPR2:zasubs1_then_zasubd0 0, // PPR2:zasubs1_then_zasubd1 0, // PPR2:zasubs1_then_zasubq0 0, // PPR2:zasubs1_then_zasubq1 0, // PPR2:zasubs1_then_zasubd1_then_zasubq0 0, // PPR2:zasubs1_then_zasubd1_then_zasubq1 0, // PPR2:zasubh1_then_zasubd0 0, // PPR2:zasubh1_then_zasubd1 0, // PPR2:zasubh1_then_zasubq0 0, // PPR2:zasubh1_then_zasubq1 0, // PPR2:zasubh1_then_zasubs0 0, // PPR2:zasubh1_then_zasubs1 0, // PPR2:zasubh1_then_zasubd1_then_zasubq0 0, // PPR2:zasubh1_then_zasubd1_then_zasubq1 0, // PPR2:zasubh1_then_zasubs1_then_zasubd0 0, // PPR2:zasubh1_then_zasubs1_then_zasubd1 0, // PPR2:zasubh1_then_zasubs1_then_zasubq0 0, // PPR2:zasubh1_then_zasubs1_then_zasubq1 0, // PPR2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // PPR2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // PPR2:dsub1_then_bsub 0, // PPR2:dsub1_then_hsub 0, // PPR2:dsub1_then_ssub 0, // PPR2:dsub3_then_bsub 0, // PPR2:dsub3_then_hsub 0, // PPR2:dsub3_then_ssub 0, // PPR2:dsub2_then_bsub 0, // PPR2:dsub2_then_hsub 0, // PPR2:dsub2_then_ssub 0, // PPR2:qsub1_then_bsub 0, // PPR2:qsub1_then_dsub 0, // PPR2:qsub1_then_hsub 0, // PPR2:qsub1_then_ssub 0, // PPR2:qsub3_then_bsub 0, // PPR2:qsub3_then_dsub 0, // PPR2:qsub3_then_hsub 0, // PPR2:qsub3_then_ssub 0, // PPR2:qsub2_then_bsub 0, // PPR2:qsub2_then_dsub 0, // PPR2:qsub2_then_hsub 0, // PPR2:qsub2_then_ssub 0, // PPR2:x8sub_7_then_sub_32 0, // PPR2:x8sub_6_then_sub_32 0, // PPR2:x8sub_5_then_sub_32 0, // PPR2:x8sub_4_then_sub_32 0, // PPR2:x8sub_3_then_sub_32 0, // PPR2:x8sub_2_then_sub_32 0, // PPR2:x8sub_1_then_sub_32 0, // PPR2:subo64_then_sub_32 0, // PPR2:zsub1_then_bsub 0, // PPR2:zsub1_then_dsub 0, // PPR2:zsub1_then_hsub 0, // PPR2:zsub1_then_ssub 0, // PPR2:zsub1_then_zsub 0, // PPR2:zsub1_then_zsub_hi 0, // PPR2:zsub3_then_bsub 0, // PPR2:zsub3_then_dsub 0, // PPR2:zsub3_then_hsub 0, // PPR2:zsub3_then_ssub 0, // PPR2:zsub3_then_zsub 0, // PPR2:zsub3_then_zsub_hi 0, // PPR2:zsub2_then_bsub 0, // PPR2:zsub2_then_dsub 0, // PPR2:zsub2_then_hsub 0, // PPR2:zsub2_then_ssub 0, // PPR2:zsub2_then_zsub 0, // PPR2:zsub2_then_zsub_hi 0, // PPR2:dsub0_dsub1 0, // PPR2:dsub0_dsub1_dsub2 0, // PPR2:dsub1_dsub2 0, // PPR2:dsub1_dsub2_dsub3 0, // PPR2:dsub2_dsub3 0, // PPR2:dsub_qsub1_then_dsub 0, // PPR2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // PPR2:qsub0_qsub1 0, // PPR2:qsub0_qsub1_qsub2 0, // PPR2:qsub1_qsub2 0, // PPR2:qsub1_qsub2_qsub3 0, // PPR2:qsub2_qsub3 0, // PPR2:qsub1_then_dsub_qsub2_then_dsub 0, // PPR2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2:qsub2_then_dsub_qsub3_then_dsub 0, // PPR2:sub_32_x8sub_1_then_sub_32 0, // PPR2:x8sub_0_x8sub_1 0, // PPR2:x8sub_2_x8sub_3 0, // PPR2:x8sub_4_x8sub_5 0, // PPR2:x8sub_6_x8sub_7 0, // PPR2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // PPR2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // PPR2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // PPR2:sub_32_subo64_then_sub_32 0, // PPR2:dsub_zsub1_then_dsub 0, // PPR2:zsub_zsub1_then_zsub 0, // PPR2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // PPR2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // PPR2:zsub0_zsub1 0, // PPR2:zsub0_zsub1_zsub2 0, // PPR2:zsub1_zsub2 0, // PPR2:zsub1_zsub2_zsub3 0, // PPR2:zsub2_zsub3 0, // PPR2:zsub1_then_dsub_zsub2_then_dsub 0, // PPR2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2:zsub1_then_zsub_zsub2_then_zsub 0, // PPR2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2:zsub2_then_dsub_zsub3_then_dsub 0, // PPR2:zsub2_then_zsub_zsub3_then_zsub 0, // PPR2:zsub0_zsub2 0, // PPR2:zsub1_zsub3 }, { // PPR2Mul2 0, // PPR2Mul2:bsub 0, // PPR2Mul2:dsub 0, // PPR2Mul2:dsub0 0, // PPR2Mul2:dsub1 0, // PPR2Mul2:dsub2 0, // PPR2Mul2:dsub3 0, // PPR2Mul2:hsub 4, // PPR2Mul2:psub0 -> PPR 4, // PPR2Mul2:psub1 -> PPR 0, // PPR2Mul2:qsub0 0, // PPR2Mul2:qsub1 0, // PPR2Mul2:qsub2 0, // PPR2Mul2:qsub3 0, // PPR2Mul2:ssub 0, // PPR2Mul2:sub_32 0, // PPR2Mul2:sube32 0, // PPR2Mul2:sube64 0, // PPR2Mul2:subo32 0, // PPR2Mul2:subo64 0, // PPR2Mul2:x8sub_0 0, // PPR2Mul2:x8sub_1 0, // PPR2Mul2:x8sub_2 0, // PPR2Mul2:x8sub_3 0, // PPR2Mul2:x8sub_4 0, // PPR2Mul2:x8sub_5 0, // PPR2Mul2:x8sub_6 0, // PPR2Mul2:x8sub_7 0, // PPR2Mul2:zasubb 0, // PPR2Mul2:zasubd0 0, // PPR2Mul2:zasubd1 0, // PPR2Mul2:zasubh0 0, // PPR2Mul2:zasubh1 0, // PPR2Mul2:zasubq0 0, // PPR2Mul2:zasubq1 0, // PPR2Mul2:zasubs0 0, // PPR2Mul2:zasubs1 0, // PPR2Mul2:zsub 0, // PPR2Mul2:zsub0 0, // PPR2Mul2:zsub1 0, // PPR2Mul2:zsub2 0, // PPR2Mul2:zsub3 0, // PPR2Mul2:zsub_hi 0, // PPR2Mul2:zasubd1_then_zasubq0 0, // PPR2Mul2:zasubd1_then_zasubq1 0, // PPR2Mul2:zasubs1_then_zasubd0 0, // PPR2Mul2:zasubs1_then_zasubd1 0, // PPR2Mul2:zasubs1_then_zasubq0 0, // PPR2Mul2:zasubs1_then_zasubq1 0, // PPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 0, // PPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 0, // PPR2Mul2:zasubh1_then_zasubd0 0, // PPR2Mul2:zasubh1_then_zasubd1 0, // PPR2Mul2:zasubh1_then_zasubq0 0, // PPR2Mul2:zasubh1_then_zasubq1 0, // PPR2Mul2:zasubh1_then_zasubs0 0, // PPR2Mul2:zasubh1_then_zasubs1 0, // PPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 0, // PPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 0, // PPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 0, // PPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 0, // PPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 0, // PPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 0, // PPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // PPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // PPR2Mul2:dsub1_then_bsub 0, // PPR2Mul2:dsub1_then_hsub 0, // PPR2Mul2:dsub1_then_ssub 0, // PPR2Mul2:dsub3_then_bsub 0, // PPR2Mul2:dsub3_then_hsub 0, // PPR2Mul2:dsub3_then_ssub 0, // PPR2Mul2:dsub2_then_bsub 0, // PPR2Mul2:dsub2_then_hsub 0, // PPR2Mul2:dsub2_then_ssub 0, // PPR2Mul2:qsub1_then_bsub 0, // PPR2Mul2:qsub1_then_dsub 0, // PPR2Mul2:qsub1_then_hsub 0, // PPR2Mul2:qsub1_then_ssub 0, // PPR2Mul2:qsub3_then_bsub 0, // PPR2Mul2:qsub3_then_dsub 0, // PPR2Mul2:qsub3_then_hsub 0, // PPR2Mul2:qsub3_then_ssub 0, // PPR2Mul2:qsub2_then_bsub 0, // PPR2Mul2:qsub2_then_dsub 0, // PPR2Mul2:qsub2_then_hsub 0, // PPR2Mul2:qsub2_then_ssub 0, // PPR2Mul2:x8sub_7_then_sub_32 0, // PPR2Mul2:x8sub_6_then_sub_32 0, // PPR2Mul2:x8sub_5_then_sub_32 0, // PPR2Mul2:x8sub_4_then_sub_32 0, // PPR2Mul2:x8sub_3_then_sub_32 0, // PPR2Mul2:x8sub_2_then_sub_32 0, // PPR2Mul2:x8sub_1_then_sub_32 0, // PPR2Mul2:subo64_then_sub_32 0, // PPR2Mul2:zsub1_then_bsub 0, // PPR2Mul2:zsub1_then_dsub 0, // PPR2Mul2:zsub1_then_hsub 0, // PPR2Mul2:zsub1_then_ssub 0, // PPR2Mul2:zsub1_then_zsub 0, // PPR2Mul2:zsub1_then_zsub_hi 0, // PPR2Mul2:zsub3_then_bsub 0, // PPR2Mul2:zsub3_then_dsub 0, // PPR2Mul2:zsub3_then_hsub 0, // PPR2Mul2:zsub3_then_ssub 0, // PPR2Mul2:zsub3_then_zsub 0, // PPR2Mul2:zsub3_then_zsub_hi 0, // PPR2Mul2:zsub2_then_bsub 0, // PPR2Mul2:zsub2_then_dsub 0, // PPR2Mul2:zsub2_then_hsub 0, // PPR2Mul2:zsub2_then_ssub 0, // PPR2Mul2:zsub2_then_zsub 0, // PPR2Mul2:zsub2_then_zsub_hi 0, // PPR2Mul2:dsub0_dsub1 0, // PPR2Mul2:dsub0_dsub1_dsub2 0, // PPR2Mul2:dsub1_dsub2 0, // PPR2Mul2:dsub1_dsub2_dsub3 0, // PPR2Mul2:dsub2_dsub3 0, // PPR2Mul2:dsub_qsub1_then_dsub 0, // PPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // PPR2Mul2:qsub0_qsub1 0, // PPR2Mul2:qsub0_qsub1_qsub2 0, // PPR2Mul2:qsub1_qsub2 0, // PPR2Mul2:qsub1_qsub2_qsub3 0, // PPR2Mul2:qsub2_qsub3 0, // PPR2Mul2:qsub1_then_dsub_qsub2_then_dsub 0, // PPR2Mul2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2Mul2:qsub2_then_dsub_qsub3_then_dsub 0, // PPR2Mul2:sub_32_x8sub_1_then_sub_32 0, // PPR2Mul2:x8sub_0_x8sub_1 0, // PPR2Mul2:x8sub_2_x8sub_3 0, // PPR2Mul2:x8sub_4_x8sub_5 0, // PPR2Mul2:x8sub_6_x8sub_7 0, // PPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // PPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // PPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // PPR2Mul2:sub_32_subo64_then_sub_32 0, // PPR2Mul2:dsub_zsub1_then_dsub 0, // PPR2Mul2:zsub_zsub1_then_zsub 0, // PPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // PPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // PPR2Mul2:zsub0_zsub1 0, // PPR2Mul2:zsub0_zsub1_zsub2 0, // PPR2Mul2:zsub1_zsub2 0, // PPR2Mul2:zsub1_zsub2_zsub3 0, // PPR2Mul2:zsub2_zsub3 0, // PPR2Mul2:zsub1_then_dsub_zsub2_then_dsub 0, // PPR2Mul2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2Mul2:zsub1_then_zsub_zsub2_then_zsub 0, // PPR2Mul2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2Mul2:zsub2_then_dsub_zsub3_then_dsub 0, // PPR2Mul2:zsub2_then_zsub_zsub3_then_zsub 0, // PPR2Mul2:zsub0_zsub2 0, // PPR2Mul2:zsub1_zsub3 }, { // PPR2_with_psub0_in_PPR_3b 0, // PPR2_with_psub0_in_PPR_3b:bsub 0, // PPR2_with_psub0_in_PPR_3b:dsub 0, // PPR2_with_psub0_in_PPR_3b:dsub0 0, // PPR2_with_psub0_in_PPR_3b:dsub1 0, // PPR2_with_psub0_in_PPR_3b:dsub2 0, // PPR2_with_psub0_in_PPR_3b:dsub3 0, // PPR2_with_psub0_in_PPR_3b:hsub 5, // PPR2_with_psub0_in_PPR_3b:psub0 -> PPR_3b 4, // PPR2_with_psub0_in_PPR_3b:psub1 -> PPR 0, // PPR2_with_psub0_in_PPR_3b:qsub0 0, // PPR2_with_psub0_in_PPR_3b:qsub1 0, // PPR2_with_psub0_in_PPR_3b:qsub2 0, // PPR2_with_psub0_in_PPR_3b:qsub3 0, // PPR2_with_psub0_in_PPR_3b:ssub 0, // PPR2_with_psub0_in_PPR_3b:sub_32 0, // PPR2_with_psub0_in_PPR_3b:sube32 0, // PPR2_with_psub0_in_PPR_3b:sube64 0, // PPR2_with_psub0_in_PPR_3b:subo32 0, // PPR2_with_psub0_in_PPR_3b:subo64 0, // PPR2_with_psub0_in_PPR_3b:x8sub_0 0, // PPR2_with_psub0_in_PPR_3b:x8sub_1 0, // PPR2_with_psub0_in_PPR_3b:x8sub_2 0, // PPR2_with_psub0_in_PPR_3b:x8sub_3 0, // PPR2_with_psub0_in_PPR_3b:x8sub_4 0, // PPR2_with_psub0_in_PPR_3b:x8sub_5 0, // PPR2_with_psub0_in_PPR_3b:x8sub_6 0, // PPR2_with_psub0_in_PPR_3b:x8sub_7 0, // PPR2_with_psub0_in_PPR_3b:zasubb 0, // PPR2_with_psub0_in_PPR_3b:zasubd0 0, // PPR2_with_psub0_in_PPR_3b:zasubd1 0, // PPR2_with_psub0_in_PPR_3b:zasubh0 0, // PPR2_with_psub0_in_PPR_3b:zasubh1 0, // PPR2_with_psub0_in_PPR_3b:zasubq0 0, // PPR2_with_psub0_in_PPR_3b:zasubq1 0, // PPR2_with_psub0_in_PPR_3b:zasubs0 0, // PPR2_with_psub0_in_PPR_3b:zasubs1 0, // PPR2_with_psub0_in_PPR_3b:zsub 0, // PPR2_with_psub0_in_PPR_3b:zsub0 0, // PPR2_with_psub0_in_PPR_3b:zsub1 0, // PPR2_with_psub0_in_PPR_3b:zsub2 0, // PPR2_with_psub0_in_PPR_3b:zsub3 0, // PPR2_with_psub0_in_PPR_3b:zsub_hi 0, // PPR2_with_psub0_in_PPR_3b:zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b:zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b:zasubs1_then_zasubd0 0, // PPR2_with_psub0_in_PPR_3b:zasubs1_then_zasubd1 0, // PPR2_with_psub0_in_PPR_3b:zasubs1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b:zasubs1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubd0 0, // PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubd1 0, // PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubs0 0, // PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubs1 0, // PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b:dsub1_then_bsub 0, // PPR2_with_psub0_in_PPR_3b:dsub1_then_hsub 0, // PPR2_with_psub0_in_PPR_3b:dsub1_then_ssub 0, // PPR2_with_psub0_in_PPR_3b:dsub3_then_bsub 0, // PPR2_with_psub0_in_PPR_3b:dsub3_then_hsub 0, // PPR2_with_psub0_in_PPR_3b:dsub3_then_ssub 0, // PPR2_with_psub0_in_PPR_3b:dsub2_then_bsub 0, // PPR2_with_psub0_in_PPR_3b:dsub2_then_hsub 0, // PPR2_with_psub0_in_PPR_3b:dsub2_then_ssub 0, // PPR2_with_psub0_in_PPR_3b:qsub1_then_bsub 0, // PPR2_with_psub0_in_PPR_3b:qsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_3b:qsub1_then_hsub 0, // PPR2_with_psub0_in_PPR_3b:qsub1_then_ssub 0, // PPR2_with_psub0_in_PPR_3b:qsub3_then_bsub 0, // PPR2_with_psub0_in_PPR_3b:qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b:qsub3_then_hsub 0, // PPR2_with_psub0_in_PPR_3b:qsub3_then_ssub 0, // PPR2_with_psub0_in_PPR_3b:qsub2_then_bsub 0, // PPR2_with_psub0_in_PPR_3b:qsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_3b:qsub2_then_hsub 0, // PPR2_with_psub0_in_PPR_3b:qsub2_then_ssub 0, // PPR2_with_psub0_in_PPR_3b:x8sub_7_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b:x8sub_6_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b:x8sub_5_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b:x8sub_4_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b:x8sub_3_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b:x8sub_2_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b:x8sub_1_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b:subo64_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b:zsub1_then_bsub 0, // PPR2_with_psub0_in_PPR_3b:zsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_3b:zsub1_then_hsub 0, // PPR2_with_psub0_in_PPR_3b:zsub1_then_ssub 0, // PPR2_with_psub0_in_PPR_3b:zsub1_then_zsub 0, // PPR2_with_psub0_in_PPR_3b:zsub1_then_zsub_hi 0, // PPR2_with_psub0_in_PPR_3b:zsub3_then_bsub 0, // PPR2_with_psub0_in_PPR_3b:zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b:zsub3_then_hsub 0, // PPR2_with_psub0_in_PPR_3b:zsub3_then_ssub 0, // PPR2_with_psub0_in_PPR_3b:zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_3b:zsub3_then_zsub_hi 0, // PPR2_with_psub0_in_PPR_3b:zsub2_then_bsub 0, // PPR2_with_psub0_in_PPR_3b:zsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_3b:zsub2_then_hsub 0, // PPR2_with_psub0_in_PPR_3b:zsub2_then_ssub 0, // PPR2_with_psub0_in_PPR_3b:zsub2_then_zsub 0, // PPR2_with_psub0_in_PPR_3b:zsub2_then_zsub_hi 0, // PPR2_with_psub0_in_PPR_3b:dsub0_dsub1 0, // PPR2_with_psub0_in_PPR_3b:dsub0_dsub1_dsub2 0, // PPR2_with_psub0_in_PPR_3b:dsub1_dsub2 0, // PPR2_with_psub0_in_PPR_3b:dsub1_dsub2_dsub3 0, // PPR2_with_psub0_in_PPR_3b:dsub2_dsub3 0, // PPR2_with_psub0_in_PPR_3b:dsub_qsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_3b:qsub0_qsub1 0, // PPR2_with_psub0_in_PPR_3b:qsub0_qsub1_qsub2 0, // PPR2_with_psub0_in_PPR_3b:qsub1_qsub2 0, // PPR2_with_psub0_in_PPR_3b:qsub1_qsub2_qsub3 0, // PPR2_with_psub0_in_PPR_3b:qsub2_qsub3 0, // PPR2_with_psub0_in_PPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b:sub_32_x8sub_1_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b:x8sub_0_x8sub_1 0, // PPR2_with_psub0_in_PPR_3b:x8sub_2_x8sub_3 0, // PPR2_with_psub0_in_PPR_3b:x8sub_4_x8sub_5 0, // PPR2_with_psub0_in_PPR_3b:x8sub_6_x8sub_7 0, // PPR2_with_psub0_in_PPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b:sub_32_subo64_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b:dsub_zsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_3b:zsub_zsub1_then_zsub 0, // PPR2_with_psub0_in_PPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // PPR2_with_psub0_in_PPR_3b:zsub0_zsub1 0, // PPR2_with_psub0_in_PPR_3b:zsub0_zsub1_zsub2 0, // PPR2_with_psub0_in_PPR_3b:zsub1_zsub2 0, // PPR2_with_psub0_in_PPR_3b:zsub1_zsub2_zsub3 0, // PPR2_with_psub0_in_PPR_3b:zsub2_zsub3 0, // PPR2_with_psub0_in_PPR_3b:zsub1_then_dsub_zsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b:zsub1_then_zsub_zsub2_then_zsub 0, // PPR2_with_psub0_in_PPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_3b:zsub0_zsub2 0, // PPR2_with_psub0_in_PPR_3b:zsub1_zsub3 }, { // PPR2_with_psub0_in_PPR_p8to15 0, // PPR2_with_psub0_in_PPR_p8to15:bsub 0, // PPR2_with_psub0_in_PPR_p8to15:dsub 0, // PPR2_with_psub0_in_PPR_p8to15:dsub0 0, // PPR2_with_psub0_in_PPR_p8to15:dsub1 0, // PPR2_with_psub0_in_PPR_p8to15:dsub2 0, // PPR2_with_psub0_in_PPR_p8to15:dsub3 0, // PPR2_with_psub0_in_PPR_p8to15:hsub 6, // PPR2_with_psub0_in_PPR_p8to15:psub0 -> PPR_p8to15 4, // PPR2_with_psub0_in_PPR_p8to15:psub1 -> PPR 0, // PPR2_with_psub0_in_PPR_p8to15:qsub0 0, // PPR2_with_psub0_in_PPR_p8to15:qsub1 0, // PPR2_with_psub0_in_PPR_p8to15:qsub2 0, // PPR2_with_psub0_in_PPR_p8to15:qsub3 0, // PPR2_with_psub0_in_PPR_p8to15:ssub 0, // PPR2_with_psub0_in_PPR_p8to15:sub_32 0, // PPR2_with_psub0_in_PPR_p8to15:sube32 0, // PPR2_with_psub0_in_PPR_p8to15:sube64 0, // PPR2_with_psub0_in_PPR_p8to15:subo32 0, // PPR2_with_psub0_in_PPR_p8to15:subo64 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_0 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_1 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_2 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_3 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_4 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_5 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_6 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_7 0, // PPR2_with_psub0_in_PPR_p8to15:zasubb 0, // PPR2_with_psub0_in_PPR_p8to15:zasubd0 0, // PPR2_with_psub0_in_PPR_p8to15:zasubd1 0, // PPR2_with_psub0_in_PPR_p8to15:zasubh0 0, // PPR2_with_psub0_in_PPR_p8to15:zasubh1 0, // PPR2_with_psub0_in_PPR_p8to15:zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15:zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15:zasubs0 0, // PPR2_with_psub0_in_PPR_p8to15:zasubs1 0, // PPR2_with_psub0_in_PPR_p8to15:zsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub0 0, // PPR2_with_psub0_in_PPR_p8to15:zsub1 0, // PPR2_with_psub0_in_PPR_p8to15:zsub2 0, // PPR2_with_psub0_in_PPR_p8to15:zsub3 0, // PPR2_with_psub0_in_PPR_p8to15:zsub_hi 0, // PPR2_with_psub0_in_PPR_p8to15:zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15:zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15:zasubs1_then_zasubd0 0, // PPR2_with_psub0_in_PPR_p8to15:zasubs1_then_zasubd1 0, // PPR2_with_psub0_in_PPR_p8to15:zasubs1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15:zasubs1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubd0 0, // PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubd1 0, // PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubs0 0, // PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubs1 0, // PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd0 0, // PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1 0, // PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15:dsub1_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15:dsub1_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15:dsub1_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15:dsub3_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15:dsub3_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15:dsub3_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15:dsub2_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15:dsub2_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15:dsub2_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15:qsub1_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15:qsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15:qsub1_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15:qsub1_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15:qsub3_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15:qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15:qsub3_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15:qsub3_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15:qsub2_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15:qsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15:qsub2_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15:qsub2_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_7_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_6_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_5_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_4_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_3_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_2_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_1_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15:subo64_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15:zsub1_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub1_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub1_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub1_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub1_then_zsub_hi 0, // PPR2_with_psub0_in_PPR_p8to15:zsub3_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub3_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub3_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub3_then_zsub_hi 0, // PPR2_with_psub0_in_PPR_p8to15:zsub2_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub2_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub2_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub2_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub2_then_zsub_hi 0, // PPR2_with_psub0_in_PPR_p8to15:dsub0_dsub1 0, // PPR2_with_psub0_in_PPR_p8to15:dsub0_dsub1_dsub2 0, // PPR2_with_psub0_in_PPR_p8to15:dsub1_dsub2 0, // PPR2_with_psub0_in_PPR_p8to15:dsub1_dsub2_dsub3 0, // PPR2_with_psub0_in_PPR_p8to15:dsub2_dsub3 0, // PPR2_with_psub0_in_PPR_p8to15:dsub_qsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15:qsub0_qsub1 0, // PPR2_with_psub0_in_PPR_p8to15:qsub0_qsub1_qsub2 0, // PPR2_with_psub0_in_PPR_p8to15:qsub1_qsub2 0, // PPR2_with_psub0_in_PPR_p8to15:qsub1_qsub2_qsub3 0, // PPR2_with_psub0_in_PPR_p8to15:qsub2_qsub3 0, // PPR2_with_psub0_in_PPR_p8to15:qsub1_then_dsub_qsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15:qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15:sub_32_x8sub_1_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_0_x8sub_1 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_2_x8sub_3 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_4_x8sub_5 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_6_x8sub_7 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15:sub_32_subo64_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15:dsub_zsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub_zsub1_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub0_zsub1 0, // PPR2_with_psub0_in_PPR_p8to15:zsub0_zsub1_zsub2 0, // PPR2_with_psub0_in_PPR_p8to15:zsub1_zsub2 0, // PPR2_with_psub0_in_PPR_p8to15:zsub1_zsub2_zsub3 0, // PPR2_with_psub0_in_PPR_p8to15:zsub2_zsub3 0, // PPR2_with_psub0_in_PPR_p8to15:zsub1_then_dsub_zsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub1_then_zsub_zsub2_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15:zsub0_zsub2 0, // PPR2_with_psub0_in_PPR_p8to15:zsub1_zsub3 }, { // PPR2_with_psub1_in_PPR_3b 0, // PPR2_with_psub1_in_PPR_3b:bsub 0, // PPR2_with_psub1_in_PPR_3b:dsub 0, // PPR2_with_psub1_in_PPR_3b:dsub0 0, // PPR2_with_psub1_in_PPR_3b:dsub1 0, // PPR2_with_psub1_in_PPR_3b:dsub2 0, // PPR2_with_psub1_in_PPR_3b:dsub3 0, // PPR2_with_psub1_in_PPR_3b:hsub 4, // PPR2_with_psub1_in_PPR_3b:psub0 -> PPR 5, // PPR2_with_psub1_in_PPR_3b:psub1 -> PPR_3b 0, // PPR2_with_psub1_in_PPR_3b:qsub0 0, // PPR2_with_psub1_in_PPR_3b:qsub1 0, // PPR2_with_psub1_in_PPR_3b:qsub2 0, // PPR2_with_psub1_in_PPR_3b:qsub3 0, // PPR2_with_psub1_in_PPR_3b:ssub 0, // PPR2_with_psub1_in_PPR_3b:sub_32 0, // PPR2_with_psub1_in_PPR_3b:sube32 0, // PPR2_with_psub1_in_PPR_3b:sube64 0, // PPR2_with_psub1_in_PPR_3b:subo32 0, // PPR2_with_psub1_in_PPR_3b:subo64 0, // PPR2_with_psub1_in_PPR_3b:x8sub_0 0, // PPR2_with_psub1_in_PPR_3b:x8sub_1 0, // PPR2_with_psub1_in_PPR_3b:x8sub_2 0, // PPR2_with_psub1_in_PPR_3b:x8sub_3 0, // PPR2_with_psub1_in_PPR_3b:x8sub_4 0, // PPR2_with_psub1_in_PPR_3b:x8sub_5 0, // PPR2_with_psub1_in_PPR_3b:x8sub_6 0, // PPR2_with_psub1_in_PPR_3b:x8sub_7 0, // PPR2_with_psub1_in_PPR_3b:zasubb 0, // PPR2_with_psub1_in_PPR_3b:zasubd0 0, // PPR2_with_psub1_in_PPR_3b:zasubd1 0, // PPR2_with_psub1_in_PPR_3b:zasubh0 0, // PPR2_with_psub1_in_PPR_3b:zasubh1 0, // PPR2_with_psub1_in_PPR_3b:zasubq0 0, // PPR2_with_psub1_in_PPR_3b:zasubq1 0, // PPR2_with_psub1_in_PPR_3b:zasubs0 0, // PPR2_with_psub1_in_PPR_3b:zasubs1 0, // PPR2_with_psub1_in_PPR_3b:zsub 0, // PPR2_with_psub1_in_PPR_3b:zsub0 0, // PPR2_with_psub1_in_PPR_3b:zsub1 0, // PPR2_with_psub1_in_PPR_3b:zsub2 0, // PPR2_with_psub1_in_PPR_3b:zsub3 0, // PPR2_with_psub1_in_PPR_3b:zsub_hi 0, // PPR2_with_psub1_in_PPR_3b:zasubd1_then_zasubq0 0, // PPR2_with_psub1_in_PPR_3b:zasubd1_then_zasubq1 0, // PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd0 0, // PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd1 0, // PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubq0 0, // PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubq1 0, // PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd0 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd1 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubq0 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubq1 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs0 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub1_in_PPR_3b:dsub1_then_bsub 0, // PPR2_with_psub1_in_PPR_3b:dsub1_then_hsub 0, // PPR2_with_psub1_in_PPR_3b:dsub1_then_ssub 0, // PPR2_with_psub1_in_PPR_3b:dsub3_then_bsub 0, // PPR2_with_psub1_in_PPR_3b:dsub3_then_hsub 0, // PPR2_with_psub1_in_PPR_3b:dsub3_then_ssub 0, // PPR2_with_psub1_in_PPR_3b:dsub2_then_bsub 0, // PPR2_with_psub1_in_PPR_3b:dsub2_then_hsub 0, // PPR2_with_psub1_in_PPR_3b:dsub2_then_ssub 0, // PPR2_with_psub1_in_PPR_3b:qsub1_then_bsub 0, // PPR2_with_psub1_in_PPR_3b:qsub1_then_dsub 0, // PPR2_with_psub1_in_PPR_3b:qsub1_then_hsub 0, // PPR2_with_psub1_in_PPR_3b:qsub1_then_ssub 0, // PPR2_with_psub1_in_PPR_3b:qsub3_then_bsub 0, // PPR2_with_psub1_in_PPR_3b:qsub3_then_dsub 0, // PPR2_with_psub1_in_PPR_3b:qsub3_then_hsub 0, // PPR2_with_psub1_in_PPR_3b:qsub3_then_ssub 0, // PPR2_with_psub1_in_PPR_3b:qsub2_then_bsub 0, // PPR2_with_psub1_in_PPR_3b:qsub2_then_dsub 0, // PPR2_with_psub1_in_PPR_3b:qsub2_then_hsub 0, // PPR2_with_psub1_in_PPR_3b:qsub2_then_ssub 0, // PPR2_with_psub1_in_PPR_3b:x8sub_7_then_sub_32 0, // PPR2_with_psub1_in_PPR_3b:x8sub_6_then_sub_32 0, // PPR2_with_psub1_in_PPR_3b:x8sub_5_then_sub_32 0, // PPR2_with_psub1_in_PPR_3b:x8sub_4_then_sub_32 0, // PPR2_with_psub1_in_PPR_3b:x8sub_3_then_sub_32 0, // PPR2_with_psub1_in_PPR_3b:x8sub_2_then_sub_32 0, // PPR2_with_psub1_in_PPR_3b:x8sub_1_then_sub_32 0, // PPR2_with_psub1_in_PPR_3b:subo64_then_sub_32 0, // PPR2_with_psub1_in_PPR_3b:zsub1_then_bsub 0, // PPR2_with_psub1_in_PPR_3b:zsub1_then_dsub 0, // PPR2_with_psub1_in_PPR_3b:zsub1_then_hsub 0, // PPR2_with_psub1_in_PPR_3b:zsub1_then_ssub 0, // PPR2_with_psub1_in_PPR_3b:zsub1_then_zsub 0, // PPR2_with_psub1_in_PPR_3b:zsub1_then_zsub_hi 0, // PPR2_with_psub1_in_PPR_3b:zsub3_then_bsub 0, // PPR2_with_psub1_in_PPR_3b:zsub3_then_dsub 0, // PPR2_with_psub1_in_PPR_3b:zsub3_then_hsub 0, // PPR2_with_psub1_in_PPR_3b:zsub3_then_ssub 0, // PPR2_with_psub1_in_PPR_3b:zsub3_then_zsub 0, // PPR2_with_psub1_in_PPR_3b:zsub3_then_zsub_hi 0, // PPR2_with_psub1_in_PPR_3b:zsub2_then_bsub 0, // PPR2_with_psub1_in_PPR_3b:zsub2_then_dsub 0, // PPR2_with_psub1_in_PPR_3b:zsub2_then_hsub 0, // PPR2_with_psub1_in_PPR_3b:zsub2_then_ssub 0, // PPR2_with_psub1_in_PPR_3b:zsub2_then_zsub 0, // PPR2_with_psub1_in_PPR_3b:zsub2_then_zsub_hi 0, // PPR2_with_psub1_in_PPR_3b:dsub0_dsub1 0, // PPR2_with_psub1_in_PPR_3b:dsub0_dsub1_dsub2 0, // PPR2_with_psub1_in_PPR_3b:dsub1_dsub2 0, // PPR2_with_psub1_in_PPR_3b:dsub1_dsub2_dsub3 0, // PPR2_with_psub1_in_PPR_3b:dsub2_dsub3 0, // PPR2_with_psub1_in_PPR_3b:dsub_qsub1_then_dsub 0, // PPR2_with_psub1_in_PPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub1_in_PPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // PPR2_with_psub1_in_PPR_3b:qsub0_qsub1 0, // PPR2_with_psub1_in_PPR_3b:qsub0_qsub1_qsub2 0, // PPR2_with_psub1_in_PPR_3b:qsub1_qsub2 0, // PPR2_with_psub1_in_PPR_3b:qsub1_qsub2_qsub3 0, // PPR2_with_psub1_in_PPR_3b:qsub2_qsub3 0, // PPR2_with_psub1_in_PPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // PPR2_with_psub1_in_PPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub1_in_PPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub1_in_PPR_3b:sub_32_x8sub_1_then_sub_32 0, // PPR2_with_psub1_in_PPR_3b:x8sub_0_x8sub_1 0, // PPR2_with_psub1_in_PPR_3b:x8sub_2_x8sub_3 0, // PPR2_with_psub1_in_PPR_3b:x8sub_4_x8sub_5 0, // PPR2_with_psub1_in_PPR_3b:x8sub_6_x8sub_7 0, // PPR2_with_psub1_in_PPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // PPR2_with_psub1_in_PPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // PPR2_with_psub1_in_PPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // PPR2_with_psub1_in_PPR_3b:sub_32_subo64_then_sub_32 0, // PPR2_with_psub1_in_PPR_3b:dsub_zsub1_then_dsub 0, // PPR2_with_psub1_in_PPR_3b:zsub_zsub1_then_zsub 0, // PPR2_with_psub1_in_PPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub1_in_PPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // PPR2_with_psub1_in_PPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub1_in_PPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // PPR2_with_psub1_in_PPR_3b:zsub0_zsub1 0, // PPR2_with_psub1_in_PPR_3b:zsub0_zsub1_zsub2 0, // PPR2_with_psub1_in_PPR_3b:zsub1_zsub2 0, // PPR2_with_psub1_in_PPR_3b:zsub1_zsub2_zsub3 0, // PPR2_with_psub1_in_PPR_3b:zsub2_zsub3 0, // PPR2_with_psub1_in_PPR_3b:zsub1_then_dsub_zsub2_then_dsub 0, // PPR2_with_psub1_in_PPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub1_in_PPR_3b:zsub1_then_zsub_zsub2_then_zsub 0, // PPR2_with_psub1_in_PPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub1_in_PPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub1_in_PPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub1_in_PPR_3b:zsub0_zsub2 0, // PPR2_with_psub1_in_PPR_3b:zsub1_zsub3 }, { // PPR2_with_psub1_in_PPR_p8to15 0, // PPR2_with_psub1_in_PPR_p8to15:bsub 0, // PPR2_with_psub1_in_PPR_p8to15:dsub 0, // PPR2_with_psub1_in_PPR_p8to15:dsub0 0, // PPR2_with_psub1_in_PPR_p8to15:dsub1 0, // PPR2_with_psub1_in_PPR_p8to15:dsub2 0, // PPR2_with_psub1_in_PPR_p8to15:dsub3 0, // PPR2_with_psub1_in_PPR_p8to15:hsub 4, // PPR2_with_psub1_in_PPR_p8to15:psub0 -> PPR 6, // PPR2_with_psub1_in_PPR_p8to15:psub1 -> PPR_p8to15 0, // PPR2_with_psub1_in_PPR_p8to15:qsub0 0, // PPR2_with_psub1_in_PPR_p8to15:qsub1 0, // PPR2_with_psub1_in_PPR_p8to15:qsub2 0, // PPR2_with_psub1_in_PPR_p8to15:qsub3 0, // PPR2_with_psub1_in_PPR_p8to15:ssub 0, // PPR2_with_psub1_in_PPR_p8to15:sub_32 0, // PPR2_with_psub1_in_PPR_p8to15:sube32 0, // PPR2_with_psub1_in_PPR_p8to15:sube64 0, // PPR2_with_psub1_in_PPR_p8to15:subo32 0, // PPR2_with_psub1_in_PPR_p8to15:subo64 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_0 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_1 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_2 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_3 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_4 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_5 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_6 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_7 0, // PPR2_with_psub1_in_PPR_p8to15:zasubb 0, // PPR2_with_psub1_in_PPR_p8to15:zasubd0 0, // PPR2_with_psub1_in_PPR_p8to15:zasubd1 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh0 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1 0, // PPR2_with_psub1_in_PPR_p8to15:zasubq0 0, // PPR2_with_psub1_in_PPR_p8to15:zasubq1 0, // PPR2_with_psub1_in_PPR_p8to15:zasubs0 0, // PPR2_with_psub1_in_PPR_p8to15:zasubs1 0, // PPR2_with_psub1_in_PPR_p8to15:zsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub0 0, // PPR2_with_psub1_in_PPR_p8to15:zsub1 0, // PPR2_with_psub1_in_PPR_p8to15:zsub2 0, // PPR2_with_psub1_in_PPR_p8to15:zsub3 0, // PPR2_with_psub1_in_PPR_p8to15:zsub_hi 0, // PPR2_with_psub1_in_PPR_p8to15:zasubd1_then_zasubq0 0, // PPR2_with_psub1_in_PPR_p8to15:zasubd1_then_zasubq1 0, // PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd0 0, // PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd1 0, // PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubq0 0, // PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubq1 0, // PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd0 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd1 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubq0 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubq1 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs0 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd0 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq0 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq1 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub1_in_PPR_p8to15:dsub1_then_bsub 0, // PPR2_with_psub1_in_PPR_p8to15:dsub1_then_hsub 0, // PPR2_with_psub1_in_PPR_p8to15:dsub1_then_ssub 0, // PPR2_with_psub1_in_PPR_p8to15:dsub3_then_bsub 0, // PPR2_with_psub1_in_PPR_p8to15:dsub3_then_hsub 0, // PPR2_with_psub1_in_PPR_p8to15:dsub3_then_ssub 0, // PPR2_with_psub1_in_PPR_p8to15:dsub2_then_bsub 0, // PPR2_with_psub1_in_PPR_p8to15:dsub2_then_hsub 0, // PPR2_with_psub1_in_PPR_p8to15:dsub2_then_ssub 0, // PPR2_with_psub1_in_PPR_p8to15:qsub1_then_bsub 0, // PPR2_with_psub1_in_PPR_p8to15:qsub1_then_dsub 0, // PPR2_with_psub1_in_PPR_p8to15:qsub1_then_hsub 0, // PPR2_with_psub1_in_PPR_p8to15:qsub1_then_ssub 0, // PPR2_with_psub1_in_PPR_p8to15:qsub3_then_bsub 0, // PPR2_with_psub1_in_PPR_p8to15:qsub3_then_dsub 0, // PPR2_with_psub1_in_PPR_p8to15:qsub3_then_hsub 0, // PPR2_with_psub1_in_PPR_p8to15:qsub3_then_ssub 0, // PPR2_with_psub1_in_PPR_p8to15:qsub2_then_bsub 0, // PPR2_with_psub1_in_PPR_p8to15:qsub2_then_dsub 0, // PPR2_with_psub1_in_PPR_p8to15:qsub2_then_hsub 0, // PPR2_with_psub1_in_PPR_p8to15:qsub2_then_ssub 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_7_then_sub_32 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_6_then_sub_32 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_5_then_sub_32 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_4_then_sub_32 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_3_then_sub_32 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_2_then_sub_32 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_1_then_sub_32 0, // PPR2_with_psub1_in_PPR_p8to15:subo64_then_sub_32 0, // PPR2_with_psub1_in_PPR_p8to15:zsub1_then_bsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub1_then_dsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub1_then_hsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub1_then_ssub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub1_then_zsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub1_then_zsub_hi 0, // PPR2_with_psub1_in_PPR_p8to15:zsub3_then_bsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub3_then_dsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub3_then_hsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub3_then_ssub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub3_then_zsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub3_then_zsub_hi 0, // PPR2_with_psub1_in_PPR_p8to15:zsub2_then_bsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub2_then_dsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub2_then_hsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub2_then_ssub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub2_then_zsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub2_then_zsub_hi 0, // PPR2_with_psub1_in_PPR_p8to15:dsub0_dsub1 0, // PPR2_with_psub1_in_PPR_p8to15:dsub0_dsub1_dsub2 0, // PPR2_with_psub1_in_PPR_p8to15:dsub1_dsub2 0, // PPR2_with_psub1_in_PPR_p8to15:dsub1_dsub2_dsub3 0, // PPR2_with_psub1_in_PPR_p8to15:dsub2_dsub3 0, // PPR2_with_psub1_in_PPR_p8to15:dsub_qsub1_then_dsub 0, // PPR2_with_psub1_in_PPR_p8to15:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub1_in_PPR_p8to15:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // PPR2_with_psub1_in_PPR_p8to15:qsub0_qsub1 0, // PPR2_with_psub1_in_PPR_p8to15:qsub0_qsub1_qsub2 0, // PPR2_with_psub1_in_PPR_p8to15:qsub1_qsub2 0, // PPR2_with_psub1_in_PPR_p8to15:qsub1_qsub2_qsub3 0, // PPR2_with_psub1_in_PPR_p8to15:qsub2_qsub3 0, // PPR2_with_psub1_in_PPR_p8to15:qsub1_then_dsub_qsub2_then_dsub 0, // PPR2_with_psub1_in_PPR_p8to15:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub1_in_PPR_p8to15:qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub1_in_PPR_p8to15:sub_32_x8sub_1_then_sub_32 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_0_x8sub_1 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_2_x8sub_3 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_4_x8sub_5 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_6_x8sub_7 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // PPR2_with_psub1_in_PPR_p8to15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // PPR2_with_psub1_in_PPR_p8to15:sub_32_subo64_then_sub_32 0, // PPR2_with_psub1_in_PPR_p8to15:dsub_zsub1_then_dsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub_zsub1_then_zsub 0, // PPR2_with_psub1_in_PPR_p8to15:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub1_in_PPR_p8to15:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub0_zsub1 0, // PPR2_with_psub1_in_PPR_p8to15:zsub0_zsub1_zsub2 0, // PPR2_with_psub1_in_PPR_p8to15:zsub1_zsub2 0, // PPR2_with_psub1_in_PPR_p8to15:zsub1_zsub2_zsub3 0, // PPR2_with_psub1_in_PPR_p8to15:zsub2_zsub3 0, // PPR2_with_psub1_in_PPR_p8to15:zsub1_then_dsub_zsub2_then_dsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub1_then_zsub_zsub2_then_zsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub1_in_PPR_p8to15:zsub0_zsub2 0, // PPR2_with_psub1_in_PPR_p8to15:zsub1_zsub3 }, { // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:hsub 5, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:psub0 -> PPR_3b 5, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:psub1 -> PPR_3b 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:sube32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:sube64 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:subo32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:subo64 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_4 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_5 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_6 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_7 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubb 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubd0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubd1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubq0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubq1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubs0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubs1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub_hi 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub1_then_bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub1_then_hsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub1_then_ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub3_then_bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub3_then_hsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub3_then_ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub2_then_bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub2_then_hsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub2_then_ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub1_then_bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub1_then_hsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub1_then_ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub3_then_bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub3_then_hsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub3_then_ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub2_then_bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub2_then_hsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub2_then_ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_7_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_6_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_5_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_4_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_3_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_2_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_1_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:subo64_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_hsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_zsub_hi 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub3_then_bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub3_then_hsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub3_then_ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub3_then_zsub_hi 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub2_then_bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub2_then_hsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub2_then_ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub2_then_zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub2_then_zsub_hi 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub0_dsub1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub0_dsub1_dsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub1_dsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub1_dsub2_dsub3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub2_dsub3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub_qsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub0_qsub1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub0_qsub1_qsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub1_qsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub1_qsub2_qsub3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub2_qsub3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:sub_32_x8sub_1_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_0_x8sub_1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_2_x8sub_3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_4_x8sub_5 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_6_x8sub_7 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:sub_32_subo64_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub_zsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub_zsub1_then_zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub0_zsub1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub0_zsub1_zsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub1_zsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub1_zsub2_zsub3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub2_zsub3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_dsub_zsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_zsub_zsub2_then_zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub0_zsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b:zsub1_zsub3 }, { // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:hsub 6, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:psub0 -> PPR_p8to15 6, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:psub1 -> PPR_p8to15 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:sube32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:sube64 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:subo32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:subo64 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_4 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_5 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_6 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_7 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubb 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubd0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubd1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubs0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub_hi 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub3_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub3_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub3_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub3_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub3_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub3_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub2_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub2_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub2_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_7_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_6_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_5_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_4_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_3_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_2_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_1_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:subo64_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_zsub_hi 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub3_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub3_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub3_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub3_then_zsub_hi 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_then_zsub_hi 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub0_dsub1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub0_dsub1_dsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_dsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_dsub2_dsub3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_dsub3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub_qsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub0_qsub1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub0_qsub1_qsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_qsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_qsub2_qsub3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub2_qsub3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_then_dsub_qsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:sub_32_x8sub_1_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_0_x8sub_1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_2_x8sub_3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_4_x8sub_5 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_6_x8sub_7 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:sub_32_subo64_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub_zsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub_zsub1_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub0_zsub1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub0_zsub1_zsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_zsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_zsub2_zsub3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_zsub3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_dsub_zsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_zsub_zsub2_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub0_zsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_zsub3 }, { // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:hsub 5, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:psub0 -> PPR_3b 5, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:psub1 -> PPR_3b 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:sube32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:sube64 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:subo32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:subo64 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_4 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_5 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_6 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_7 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubb 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubd0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubd1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubh0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubh1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubq0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubq1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubs0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubs1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub_hi 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubd1_then_zasubq0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubd1_then_zasubq1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubs1_then_zasubd0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubs1_then_zasubd1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubs1_then_zasubq0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubs1_then_zasubq1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubd0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubd1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubq0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubq1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubs0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubs1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub1_then_bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub1_then_hsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub1_then_ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub3_then_bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub3_then_hsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub3_then_ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub2_then_bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub2_then_hsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub2_then_ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub1_then_bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub1_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub1_then_hsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub1_then_ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub3_then_bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub3_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub3_then_hsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub3_then_ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub2_then_bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub2_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub2_then_hsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub2_then_ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_7_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_6_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_5_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_4_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_3_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_2_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_1_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:subo64_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub1_then_bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub1_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub1_then_hsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub1_then_ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub1_then_zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub1_then_zsub_hi 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub3_then_bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub3_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub3_then_hsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub3_then_ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub3_then_zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub3_then_zsub_hi 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub2_then_bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub2_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub2_then_hsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub2_then_ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub2_then_zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub2_then_zsub_hi 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub0_dsub1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub0_dsub1_dsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub1_dsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub1_dsub2_dsub3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub2_dsub3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub_qsub1_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub0_qsub1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub0_qsub1_qsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub1_qsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub1_qsub2_qsub3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub2_qsub3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:sub_32_x8sub_1_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_0_x8sub_1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_2_x8sub_3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_4_x8sub_5 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_6_x8sub_7 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:sub_32_subo64_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub_zsub1_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub_zsub1_then_zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub0_zsub1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub0_zsub1_zsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub1_zsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub1_zsub2_zsub3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub2_zsub3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub1_then_dsub_zsub2_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub1_then_zsub_zsub2_then_zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub0_zsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b:zsub1_zsub3 }, { // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:hsub 6, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:psub0 -> PPR_p8to15 6, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:psub1 -> PPR_p8to15 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:sube32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:sube64 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:subo32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:subo64 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_4 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_5 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_6 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_7 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubb 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubd0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubd1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubh0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubh1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubq0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubq1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubs0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubs1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub_hi 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubd1_then_zasubq0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubd1_then_zasubq1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubs1_then_zasubd0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubs1_then_zasubd1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubs1_then_zasubq0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubs1_then_zasubq1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubd0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubd1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubq0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubq1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubs0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubs1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub1_then_bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub1_then_hsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub1_then_ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub3_then_bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub3_then_hsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub3_then_ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub2_then_bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub2_then_hsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub2_then_ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub1_then_bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub1_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub1_then_hsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub1_then_ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub3_then_bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub3_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub3_then_hsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub3_then_ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub2_then_bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub2_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub2_then_hsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub2_then_ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_7_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_6_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_5_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_4_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_3_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_2_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_1_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:subo64_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub1_then_bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub1_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub1_then_hsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub1_then_ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub1_then_zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub1_then_zsub_hi 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub3_then_bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub3_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub3_then_hsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub3_then_ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub3_then_zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub3_then_zsub_hi 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub2_then_bsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub2_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub2_then_hsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub2_then_ssub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub2_then_zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub2_then_zsub_hi 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub0_dsub1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub0_dsub1_dsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub1_dsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub1_dsub2_dsub3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub2_dsub3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub_qsub1_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub0_qsub1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub0_qsub1_qsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub1_qsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub1_qsub2_qsub3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub2_qsub3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub1_then_dsub_qsub2_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:qsub2_then_dsub_qsub3_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:sub_32_x8sub_1_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_0_x8sub_1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_2_x8sub_3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_4_x8sub_5 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_6_x8sub_7 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:sub_32_subo64_then_sub_32 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub_zsub1_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub_zsub1_then_zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub0_zsub1 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub0_zsub1_zsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub1_zsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub1_zsub2_zsub3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub2_zsub3 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub1_then_dsub_zsub2_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub1_then_zsub_zsub2_then_zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub2_then_dsub_zsub3_then_dsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub2_then_zsub_zsub3_then_zsub 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub0_zsub2 0, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15:zsub1_zsub3 }, { // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:hsub 5, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:psub0 -> PPR_3b 6, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:psub1 -> PPR_p8to15 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:sube32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:sube64 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:subo32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:subo64 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_4 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_5 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_6 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_7 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubb 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubd0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubd1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubq0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubq1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubs0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub_hi 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubs1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_then_bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_then_hsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_then_ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub3_then_bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub3_then_hsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub3_then_ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_then_bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_then_hsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_then_ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_then_bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_then_hsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_then_ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub3_then_bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub3_then_hsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub3_then_ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub2_then_bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub2_then_hsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub2_then_ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_7_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_6_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_5_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_4_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_3_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_2_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_1_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:subo64_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_hsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_zsub_hi 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub3_then_bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub3_then_hsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub3_then_ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub3_then_zsub_hi 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_then_bsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_then_hsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_then_ssub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_then_zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_then_zsub_hi 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub0_dsub1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub0_dsub1_dsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_dsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub1_dsub2_dsub3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub2_dsub3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub_qsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub0_qsub1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub0_qsub1_qsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_qsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_qsub2_qsub3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub2_qsub3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_then_dsub_qsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:sub_32_x8sub_1_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_0_x8sub_1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_2_x8sub_3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_4_x8sub_5 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_6_x8sub_7 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:sub_32_subo64_then_sub_32 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub_zsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub_zsub1_then_zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub0_zsub1 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub0_zsub1_zsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_zsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_zsub2_zsub3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_zsub3 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_dsub_zsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_zsub_zsub2_then_zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub0_zsub2 0, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15:zsub1_zsub3 }, { // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:hsub 6, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:psub0 -> PPR_p8to15 5, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:psub1 -> PPR_3b 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:sube32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:sube64 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:subo32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:subo64 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_4 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_5 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_6 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_7 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubb 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubd0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubd1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubs0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubs1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub_hi 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub1_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub1_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub1_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub3_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub3_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub3_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub2_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub2_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub2_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub1_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub1_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub1_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub3_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub3_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub3_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub2_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub2_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub2_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_7_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_6_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_5_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_4_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_3_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_2_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_1_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:subo64_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_zsub_hi 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub3_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub3_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub3_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub3_then_zsub_hi 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub2_then_bsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub2_then_hsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub2_then_ssub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub2_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub2_then_zsub_hi 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub0_dsub1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub0_dsub1_dsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub1_dsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub1_dsub2_dsub3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub2_dsub3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub_qsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub0_qsub1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub0_qsub1_qsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub1_qsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub1_qsub2_qsub3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub2_qsub3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:sub_32_x8sub_1_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_0_x8sub_1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_2_x8sub_3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_4_x8sub_5 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_6_x8sub_7 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:sub_32_subo64_then_sub_32 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub_zsub1_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub_zsub1_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub0_zsub1 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub0_zsub1_zsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub1_zsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub1_zsub2_zsub3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub2_zsub3 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_dsub_zsub2_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_zsub_zsub2_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub0_zsub2 0, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b:zsub1_zsub3 }, { // GPR32all 0, // GPR32all:bsub 0, // GPR32all:dsub 0, // GPR32all:dsub0 0, // GPR32all:dsub1 0, // GPR32all:dsub2 0, // GPR32all:dsub3 0, // GPR32all:hsub 0, // GPR32all:psub0 0, // GPR32all:psub1 0, // GPR32all:qsub0 0, // GPR32all:qsub1 0, // GPR32all:qsub2 0, // GPR32all:qsub3 0, // GPR32all:ssub 0, // GPR32all:sub_32 0, // GPR32all:sube32 0, // GPR32all:sube64 0, // GPR32all:subo32 0, // GPR32all:subo64 0, // GPR32all:x8sub_0 0, // GPR32all:x8sub_1 0, // GPR32all:x8sub_2 0, // GPR32all:x8sub_3 0, // GPR32all:x8sub_4 0, // GPR32all:x8sub_5 0, // GPR32all:x8sub_6 0, // GPR32all:x8sub_7 0, // GPR32all:zasubb 0, // GPR32all:zasubd0 0, // GPR32all:zasubd1 0, // GPR32all:zasubh0 0, // GPR32all:zasubh1 0, // GPR32all:zasubq0 0, // GPR32all:zasubq1 0, // GPR32all:zasubs0 0, // GPR32all:zasubs1 0, // GPR32all:zsub 0, // GPR32all:zsub0 0, // GPR32all:zsub1 0, // GPR32all:zsub2 0, // GPR32all:zsub3 0, // GPR32all:zsub_hi 0, // GPR32all:zasubd1_then_zasubq0 0, // GPR32all:zasubd1_then_zasubq1 0, // GPR32all:zasubs1_then_zasubd0 0, // GPR32all:zasubs1_then_zasubd1 0, // GPR32all:zasubs1_then_zasubq0 0, // GPR32all:zasubs1_then_zasubq1 0, // GPR32all:zasubs1_then_zasubd1_then_zasubq0 0, // GPR32all:zasubs1_then_zasubd1_then_zasubq1 0, // GPR32all:zasubh1_then_zasubd0 0, // GPR32all:zasubh1_then_zasubd1 0, // GPR32all:zasubh1_then_zasubq0 0, // GPR32all:zasubh1_then_zasubq1 0, // GPR32all:zasubh1_then_zasubs0 0, // GPR32all:zasubh1_then_zasubs1 0, // GPR32all:zasubh1_then_zasubd1_then_zasubq0 0, // GPR32all:zasubh1_then_zasubd1_then_zasubq1 0, // GPR32all:zasubh1_then_zasubs1_then_zasubd0 0, // GPR32all:zasubh1_then_zasubs1_then_zasubd1 0, // GPR32all:zasubh1_then_zasubs1_then_zasubq0 0, // GPR32all:zasubh1_then_zasubs1_then_zasubq1 0, // GPR32all:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR32all:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR32all:dsub1_then_bsub 0, // GPR32all:dsub1_then_hsub 0, // GPR32all:dsub1_then_ssub 0, // GPR32all:dsub3_then_bsub 0, // GPR32all:dsub3_then_hsub 0, // GPR32all:dsub3_then_ssub 0, // GPR32all:dsub2_then_bsub 0, // GPR32all:dsub2_then_hsub 0, // GPR32all:dsub2_then_ssub 0, // GPR32all:qsub1_then_bsub 0, // GPR32all:qsub1_then_dsub 0, // GPR32all:qsub1_then_hsub 0, // GPR32all:qsub1_then_ssub 0, // GPR32all:qsub3_then_bsub 0, // GPR32all:qsub3_then_dsub 0, // GPR32all:qsub3_then_hsub 0, // GPR32all:qsub3_then_ssub 0, // GPR32all:qsub2_then_bsub 0, // GPR32all:qsub2_then_dsub 0, // GPR32all:qsub2_then_hsub 0, // GPR32all:qsub2_then_ssub 0, // GPR32all:x8sub_7_then_sub_32 0, // GPR32all:x8sub_6_then_sub_32 0, // GPR32all:x8sub_5_then_sub_32 0, // GPR32all:x8sub_4_then_sub_32 0, // GPR32all:x8sub_3_then_sub_32 0, // GPR32all:x8sub_2_then_sub_32 0, // GPR32all:x8sub_1_then_sub_32 0, // GPR32all:subo64_then_sub_32 0, // GPR32all:zsub1_then_bsub 0, // GPR32all:zsub1_then_dsub 0, // GPR32all:zsub1_then_hsub 0, // GPR32all:zsub1_then_ssub 0, // GPR32all:zsub1_then_zsub 0, // GPR32all:zsub1_then_zsub_hi 0, // GPR32all:zsub3_then_bsub 0, // GPR32all:zsub3_then_dsub 0, // GPR32all:zsub3_then_hsub 0, // GPR32all:zsub3_then_ssub 0, // GPR32all:zsub3_then_zsub 0, // GPR32all:zsub3_then_zsub_hi 0, // GPR32all:zsub2_then_bsub 0, // GPR32all:zsub2_then_dsub 0, // GPR32all:zsub2_then_hsub 0, // GPR32all:zsub2_then_ssub 0, // GPR32all:zsub2_then_zsub 0, // GPR32all:zsub2_then_zsub_hi 0, // GPR32all:dsub0_dsub1 0, // GPR32all:dsub0_dsub1_dsub2 0, // GPR32all:dsub1_dsub2 0, // GPR32all:dsub1_dsub2_dsub3 0, // GPR32all:dsub2_dsub3 0, // GPR32all:dsub_qsub1_then_dsub 0, // GPR32all:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR32all:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR32all:qsub0_qsub1 0, // GPR32all:qsub0_qsub1_qsub2 0, // GPR32all:qsub1_qsub2 0, // GPR32all:qsub1_qsub2_qsub3 0, // GPR32all:qsub2_qsub3 0, // GPR32all:qsub1_then_dsub_qsub2_then_dsub 0, // GPR32all:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR32all:qsub2_then_dsub_qsub3_then_dsub 0, // GPR32all:sub_32_x8sub_1_then_sub_32 0, // GPR32all:x8sub_0_x8sub_1 0, // GPR32all:x8sub_2_x8sub_3 0, // GPR32all:x8sub_4_x8sub_5 0, // GPR32all:x8sub_6_x8sub_7 0, // GPR32all:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // GPR32all:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // GPR32all:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // GPR32all:sub_32_subo64_then_sub_32 0, // GPR32all:dsub_zsub1_then_dsub 0, // GPR32all:zsub_zsub1_then_zsub 0, // GPR32all:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR32all:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR32all:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR32all:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR32all:zsub0_zsub1 0, // GPR32all:zsub0_zsub1_zsub2 0, // GPR32all:zsub1_zsub2 0, // GPR32all:zsub1_zsub2_zsub3 0, // GPR32all:zsub2_zsub3 0, // GPR32all:zsub1_then_dsub_zsub2_then_dsub 0, // GPR32all:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR32all:zsub1_then_zsub_zsub2_then_zsub 0, // GPR32all:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR32all:zsub2_then_dsub_zsub3_then_dsub 0, // GPR32all:zsub2_then_zsub_zsub3_then_zsub 0, // GPR32all:zsub0_zsub2 0, // GPR32all:zsub1_zsub3 }, { // FPR32 1, // FPR32:bsub -> FPR8 0, // FPR32:dsub 0, // FPR32:dsub0 0, // FPR32:dsub1 0, // FPR32:dsub2 0, // FPR32:dsub3 2, // FPR32:hsub -> FPR16 0, // FPR32:psub0 0, // FPR32:psub1 0, // FPR32:qsub0 0, // FPR32:qsub1 0, // FPR32:qsub2 0, // FPR32:qsub3 0, // FPR32:ssub 0, // FPR32:sub_32 0, // FPR32:sube32 0, // FPR32:sube64 0, // FPR32:subo32 0, // FPR32:subo64 0, // FPR32:x8sub_0 0, // FPR32:x8sub_1 0, // FPR32:x8sub_2 0, // FPR32:x8sub_3 0, // FPR32:x8sub_4 0, // FPR32:x8sub_5 0, // FPR32:x8sub_6 0, // FPR32:x8sub_7 0, // FPR32:zasubb 0, // FPR32:zasubd0 0, // FPR32:zasubd1 0, // FPR32:zasubh0 0, // FPR32:zasubh1 0, // FPR32:zasubq0 0, // FPR32:zasubq1 0, // FPR32:zasubs0 0, // FPR32:zasubs1 0, // FPR32:zsub 0, // FPR32:zsub0 0, // FPR32:zsub1 0, // FPR32:zsub2 0, // FPR32:zsub3 0, // FPR32:zsub_hi 0, // FPR32:zasubd1_then_zasubq0 0, // FPR32:zasubd1_then_zasubq1 0, // FPR32:zasubs1_then_zasubd0 0, // FPR32:zasubs1_then_zasubd1 0, // FPR32:zasubs1_then_zasubq0 0, // FPR32:zasubs1_then_zasubq1 0, // FPR32:zasubs1_then_zasubd1_then_zasubq0 0, // FPR32:zasubs1_then_zasubd1_then_zasubq1 0, // FPR32:zasubh1_then_zasubd0 0, // FPR32:zasubh1_then_zasubd1 0, // FPR32:zasubh1_then_zasubq0 0, // FPR32:zasubh1_then_zasubq1 0, // FPR32:zasubh1_then_zasubs0 0, // FPR32:zasubh1_then_zasubs1 0, // FPR32:zasubh1_then_zasubd1_then_zasubq0 0, // FPR32:zasubh1_then_zasubd1_then_zasubq1 0, // FPR32:zasubh1_then_zasubs1_then_zasubd0 0, // FPR32:zasubh1_then_zasubs1_then_zasubd1 0, // FPR32:zasubh1_then_zasubs1_then_zasubq0 0, // FPR32:zasubh1_then_zasubs1_then_zasubq1 0, // FPR32:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // FPR32:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // FPR32:dsub1_then_bsub 0, // FPR32:dsub1_then_hsub 0, // FPR32:dsub1_then_ssub 0, // FPR32:dsub3_then_bsub 0, // FPR32:dsub3_then_hsub 0, // FPR32:dsub3_then_ssub 0, // FPR32:dsub2_then_bsub 0, // FPR32:dsub2_then_hsub 0, // FPR32:dsub2_then_ssub 0, // FPR32:qsub1_then_bsub 0, // FPR32:qsub1_then_dsub 0, // FPR32:qsub1_then_hsub 0, // FPR32:qsub1_then_ssub 0, // FPR32:qsub3_then_bsub 0, // FPR32:qsub3_then_dsub 0, // FPR32:qsub3_then_hsub 0, // FPR32:qsub3_then_ssub 0, // FPR32:qsub2_then_bsub 0, // FPR32:qsub2_then_dsub 0, // FPR32:qsub2_then_hsub 0, // FPR32:qsub2_then_ssub 0, // FPR32:x8sub_7_then_sub_32 0, // FPR32:x8sub_6_then_sub_32 0, // FPR32:x8sub_5_then_sub_32 0, // FPR32:x8sub_4_then_sub_32 0, // FPR32:x8sub_3_then_sub_32 0, // FPR32:x8sub_2_then_sub_32 0, // FPR32:x8sub_1_then_sub_32 0, // FPR32:subo64_then_sub_32 0, // FPR32:zsub1_then_bsub 0, // FPR32:zsub1_then_dsub 0, // FPR32:zsub1_then_hsub 0, // FPR32:zsub1_then_ssub 0, // FPR32:zsub1_then_zsub 0, // FPR32:zsub1_then_zsub_hi 0, // FPR32:zsub3_then_bsub 0, // FPR32:zsub3_then_dsub 0, // FPR32:zsub3_then_hsub 0, // FPR32:zsub3_then_ssub 0, // FPR32:zsub3_then_zsub 0, // FPR32:zsub3_then_zsub_hi 0, // FPR32:zsub2_then_bsub 0, // FPR32:zsub2_then_dsub 0, // FPR32:zsub2_then_hsub 0, // FPR32:zsub2_then_ssub 0, // FPR32:zsub2_then_zsub 0, // FPR32:zsub2_then_zsub_hi 0, // FPR32:dsub0_dsub1 0, // FPR32:dsub0_dsub1_dsub2 0, // FPR32:dsub1_dsub2 0, // FPR32:dsub1_dsub2_dsub3 0, // FPR32:dsub2_dsub3 0, // FPR32:dsub_qsub1_then_dsub 0, // FPR32:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FPR32:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // FPR32:qsub0_qsub1 0, // FPR32:qsub0_qsub1_qsub2 0, // FPR32:qsub1_qsub2 0, // FPR32:qsub1_qsub2_qsub3 0, // FPR32:qsub2_qsub3 0, // FPR32:qsub1_then_dsub_qsub2_then_dsub 0, // FPR32:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FPR32:qsub2_then_dsub_qsub3_then_dsub 0, // FPR32:sub_32_x8sub_1_then_sub_32 0, // FPR32:x8sub_0_x8sub_1 0, // FPR32:x8sub_2_x8sub_3 0, // FPR32:x8sub_4_x8sub_5 0, // FPR32:x8sub_6_x8sub_7 0, // FPR32:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // FPR32:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // FPR32:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // FPR32:sub_32_subo64_then_sub_32 0, // FPR32:dsub_zsub1_then_dsub 0, // FPR32:zsub_zsub1_then_zsub 0, // FPR32:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FPR32:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // FPR32:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FPR32:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // FPR32:zsub0_zsub1 0, // FPR32:zsub0_zsub1_zsub2 0, // FPR32:zsub1_zsub2 0, // FPR32:zsub1_zsub2_zsub3 0, // FPR32:zsub2_zsub3 0, // FPR32:zsub1_then_dsub_zsub2_then_dsub 0, // FPR32:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FPR32:zsub1_then_zsub_zsub2_then_zsub 0, // FPR32:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FPR32:zsub2_then_dsub_zsub3_then_dsub 0, // FPR32:zsub2_then_zsub_zsub3_then_zsub 0, // FPR32:zsub0_zsub2 0, // FPR32:zsub1_zsub3 }, { // GPR32 0, // GPR32:bsub 0, // GPR32:dsub 0, // GPR32:dsub0 0, // GPR32:dsub1 0, // GPR32:dsub2 0, // GPR32:dsub3 0, // GPR32:hsub 0, // GPR32:psub0 0, // GPR32:psub1 0, // GPR32:qsub0 0, // GPR32:qsub1 0, // GPR32:qsub2 0, // GPR32:qsub3 0, // GPR32:ssub 0, // GPR32:sub_32 0, // GPR32:sube32 0, // GPR32:sube64 0, // GPR32:subo32 0, // GPR32:subo64 0, // GPR32:x8sub_0 0, // GPR32:x8sub_1 0, // GPR32:x8sub_2 0, // GPR32:x8sub_3 0, // GPR32:x8sub_4 0, // GPR32:x8sub_5 0, // GPR32:x8sub_6 0, // GPR32:x8sub_7 0, // GPR32:zasubb 0, // GPR32:zasubd0 0, // GPR32:zasubd1 0, // GPR32:zasubh0 0, // GPR32:zasubh1 0, // GPR32:zasubq0 0, // GPR32:zasubq1 0, // GPR32:zasubs0 0, // GPR32:zasubs1 0, // GPR32:zsub 0, // GPR32:zsub0 0, // GPR32:zsub1 0, // GPR32:zsub2 0, // GPR32:zsub3 0, // GPR32:zsub_hi 0, // GPR32:zasubd1_then_zasubq0 0, // GPR32:zasubd1_then_zasubq1 0, // GPR32:zasubs1_then_zasubd0 0, // GPR32:zasubs1_then_zasubd1 0, // GPR32:zasubs1_then_zasubq0 0, // GPR32:zasubs1_then_zasubq1 0, // GPR32:zasubs1_then_zasubd1_then_zasubq0 0, // GPR32:zasubs1_then_zasubd1_then_zasubq1 0, // GPR32:zasubh1_then_zasubd0 0, // GPR32:zasubh1_then_zasubd1 0, // GPR32:zasubh1_then_zasubq0 0, // GPR32:zasubh1_then_zasubq1 0, // GPR32:zasubh1_then_zasubs0 0, // GPR32:zasubh1_then_zasubs1 0, // GPR32:zasubh1_then_zasubd1_then_zasubq0 0, // GPR32:zasubh1_then_zasubd1_then_zasubq1 0, // GPR32:zasubh1_then_zasubs1_then_zasubd0 0, // GPR32:zasubh1_then_zasubs1_then_zasubd1 0, // GPR32:zasubh1_then_zasubs1_then_zasubq0 0, // GPR32:zasubh1_then_zasubs1_then_zasubq1 0, // GPR32:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR32:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR32:dsub1_then_bsub 0, // GPR32:dsub1_then_hsub 0, // GPR32:dsub1_then_ssub 0, // GPR32:dsub3_then_bsub 0, // GPR32:dsub3_then_hsub 0, // GPR32:dsub3_then_ssub 0, // GPR32:dsub2_then_bsub 0, // GPR32:dsub2_then_hsub 0, // GPR32:dsub2_then_ssub 0, // GPR32:qsub1_then_bsub 0, // GPR32:qsub1_then_dsub 0, // GPR32:qsub1_then_hsub 0, // GPR32:qsub1_then_ssub 0, // GPR32:qsub3_then_bsub 0, // GPR32:qsub3_then_dsub 0, // GPR32:qsub3_then_hsub 0, // GPR32:qsub3_then_ssub 0, // GPR32:qsub2_then_bsub 0, // GPR32:qsub2_then_dsub 0, // GPR32:qsub2_then_hsub 0, // GPR32:qsub2_then_ssub 0, // GPR32:x8sub_7_then_sub_32 0, // GPR32:x8sub_6_then_sub_32 0, // GPR32:x8sub_5_then_sub_32 0, // GPR32:x8sub_4_then_sub_32 0, // GPR32:x8sub_3_then_sub_32 0, // GPR32:x8sub_2_then_sub_32 0, // GPR32:x8sub_1_then_sub_32 0, // GPR32:subo64_then_sub_32 0, // GPR32:zsub1_then_bsub 0, // GPR32:zsub1_then_dsub 0, // GPR32:zsub1_then_hsub 0, // GPR32:zsub1_then_ssub 0, // GPR32:zsub1_then_zsub 0, // GPR32:zsub1_then_zsub_hi 0, // GPR32:zsub3_then_bsub 0, // GPR32:zsub3_then_dsub 0, // GPR32:zsub3_then_hsub 0, // GPR32:zsub3_then_ssub 0, // GPR32:zsub3_then_zsub 0, // GPR32:zsub3_then_zsub_hi 0, // GPR32:zsub2_then_bsub 0, // GPR32:zsub2_then_dsub 0, // GPR32:zsub2_then_hsub 0, // GPR32:zsub2_then_ssub 0, // GPR32:zsub2_then_zsub 0, // GPR32:zsub2_then_zsub_hi 0, // GPR32:dsub0_dsub1 0, // GPR32:dsub0_dsub1_dsub2 0, // GPR32:dsub1_dsub2 0, // GPR32:dsub1_dsub2_dsub3 0, // GPR32:dsub2_dsub3 0, // GPR32:dsub_qsub1_then_dsub 0, // GPR32:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR32:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR32:qsub0_qsub1 0, // GPR32:qsub0_qsub1_qsub2 0, // GPR32:qsub1_qsub2 0, // GPR32:qsub1_qsub2_qsub3 0, // GPR32:qsub2_qsub3 0, // GPR32:qsub1_then_dsub_qsub2_then_dsub 0, // GPR32:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR32:qsub2_then_dsub_qsub3_then_dsub 0, // GPR32:sub_32_x8sub_1_then_sub_32 0, // GPR32:x8sub_0_x8sub_1 0, // GPR32:x8sub_2_x8sub_3 0, // GPR32:x8sub_4_x8sub_5 0, // GPR32:x8sub_6_x8sub_7 0, // GPR32:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // GPR32:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // GPR32:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // GPR32:sub_32_subo64_then_sub_32 0, // GPR32:dsub_zsub1_then_dsub 0, // GPR32:zsub_zsub1_then_zsub 0, // GPR32:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR32:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR32:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR32:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR32:zsub0_zsub1 0, // GPR32:zsub0_zsub1_zsub2 0, // GPR32:zsub1_zsub2 0, // GPR32:zsub1_zsub2_zsub3 0, // GPR32:zsub2_zsub3 0, // GPR32:zsub1_then_dsub_zsub2_then_dsub 0, // GPR32:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR32:zsub1_then_zsub_zsub2_then_zsub 0, // GPR32:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR32:zsub2_then_dsub_zsub3_then_dsub 0, // GPR32:zsub2_then_zsub_zsub3_then_zsub 0, // GPR32:zsub0_zsub2 0, // GPR32:zsub1_zsub3 }, { // GPR32sp 0, // GPR32sp:bsub 0, // GPR32sp:dsub 0, // GPR32sp:dsub0 0, // GPR32sp:dsub1 0, // GPR32sp:dsub2 0, // GPR32sp:dsub3 0, // GPR32sp:hsub 0, // GPR32sp:psub0 0, // GPR32sp:psub1 0, // GPR32sp:qsub0 0, // GPR32sp:qsub1 0, // GPR32sp:qsub2 0, // GPR32sp:qsub3 0, // GPR32sp:ssub 0, // GPR32sp:sub_32 0, // GPR32sp:sube32 0, // GPR32sp:sube64 0, // GPR32sp:subo32 0, // GPR32sp:subo64 0, // GPR32sp:x8sub_0 0, // GPR32sp:x8sub_1 0, // GPR32sp:x8sub_2 0, // GPR32sp:x8sub_3 0, // GPR32sp:x8sub_4 0, // GPR32sp:x8sub_5 0, // GPR32sp:x8sub_6 0, // GPR32sp:x8sub_7 0, // GPR32sp:zasubb 0, // GPR32sp:zasubd0 0, // GPR32sp:zasubd1 0, // GPR32sp:zasubh0 0, // GPR32sp:zasubh1 0, // GPR32sp:zasubq0 0, // GPR32sp:zasubq1 0, // GPR32sp:zasubs0 0, // GPR32sp:zasubs1 0, // GPR32sp:zsub 0, // GPR32sp:zsub0 0, // GPR32sp:zsub1 0, // GPR32sp:zsub2 0, // GPR32sp:zsub3 0, // GPR32sp:zsub_hi 0, // GPR32sp:zasubd1_then_zasubq0 0, // GPR32sp:zasubd1_then_zasubq1 0, // GPR32sp:zasubs1_then_zasubd0 0, // GPR32sp:zasubs1_then_zasubd1 0, // GPR32sp:zasubs1_then_zasubq0 0, // GPR32sp:zasubs1_then_zasubq1 0, // GPR32sp:zasubs1_then_zasubd1_then_zasubq0 0, // GPR32sp:zasubs1_then_zasubd1_then_zasubq1 0, // GPR32sp:zasubh1_then_zasubd0 0, // GPR32sp:zasubh1_then_zasubd1 0, // GPR32sp:zasubh1_then_zasubq0 0, // GPR32sp:zasubh1_then_zasubq1 0, // GPR32sp:zasubh1_then_zasubs0 0, // GPR32sp:zasubh1_then_zasubs1 0, // GPR32sp:zasubh1_then_zasubd1_then_zasubq0 0, // GPR32sp:zasubh1_then_zasubd1_then_zasubq1 0, // GPR32sp:zasubh1_then_zasubs1_then_zasubd0 0, // GPR32sp:zasubh1_then_zasubs1_then_zasubd1 0, // GPR32sp:zasubh1_then_zasubs1_then_zasubq0 0, // GPR32sp:zasubh1_then_zasubs1_then_zasubq1 0, // GPR32sp:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR32sp:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR32sp:dsub1_then_bsub 0, // GPR32sp:dsub1_then_hsub 0, // GPR32sp:dsub1_then_ssub 0, // GPR32sp:dsub3_then_bsub 0, // GPR32sp:dsub3_then_hsub 0, // GPR32sp:dsub3_then_ssub 0, // GPR32sp:dsub2_then_bsub 0, // GPR32sp:dsub2_then_hsub 0, // GPR32sp:dsub2_then_ssub 0, // GPR32sp:qsub1_then_bsub 0, // GPR32sp:qsub1_then_dsub 0, // GPR32sp:qsub1_then_hsub 0, // GPR32sp:qsub1_then_ssub 0, // GPR32sp:qsub3_then_bsub 0, // GPR32sp:qsub3_then_dsub 0, // GPR32sp:qsub3_then_hsub 0, // GPR32sp:qsub3_then_ssub 0, // GPR32sp:qsub2_then_bsub 0, // GPR32sp:qsub2_then_dsub 0, // GPR32sp:qsub2_then_hsub 0, // GPR32sp:qsub2_then_ssub 0, // GPR32sp:x8sub_7_then_sub_32 0, // GPR32sp:x8sub_6_then_sub_32 0, // GPR32sp:x8sub_5_then_sub_32 0, // GPR32sp:x8sub_4_then_sub_32 0, // GPR32sp:x8sub_3_then_sub_32 0, // GPR32sp:x8sub_2_then_sub_32 0, // GPR32sp:x8sub_1_then_sub_32 0, // GPR32sp:subo64_then_sub_32 0, // GPR32sp:zsub1_then_bsub 0, // GPR32sp:zsub1_then_dsub 0, // GPR32sp:zsub1_then_hsub 0, // GPR32sp:zsub1_then_ssub 0, // GPR32sp:zsub1_then_zsub 0, // GPR32sp:zsub1_then_zsub_hi 0, // GPR32sp:zsub3_then_bsub 0, // GPR32sp:zsub3_then_dsub 0, // GPR32sp:zsub3_then_hsub 0, // GPR32sp:zsub3_then_ssub 0, // GPR32sp:zsub3_then_zsub 0, // GPR32sp:zsub3_then_zsub_hi 0, // GPR32sp:zsub2_then_bsub 0, // GPR32sp:zsub2_then_dsub 0, // GPR32sp:zsub2_then_hsub 0, // GPR32sp:zsub2_then_ssub 0, // GPR32sp:zsub2_then_zsub 0, // GPR32sp:zsub2_then_zsub_hi 0, // GPR32sp:dsub0_dsub1 0, // GPR32sp:dsub0_dsub1_dsub2 0, // GPR32sp:dsub1_dsub2 0, // GPR32sp:dsub1_dsub2_dsub3 0, // GPR32sp:dsub2_dsub3 0, // GPR32sp:dsub_qsub1_then_dsub 0, // GPR32sp:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR32sp:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR32sp:qsub0_qsub1 0, // GPR32sp:qsub0_qsub1_qsub2 0, // GPR32sp:qsub1_qsub2 0, // GPR32sp:qsub1_qsub2_qsub3 0, // GPR32sp:qsub2_qsub3 0, // GPR32sp:qsub1_then_dsub_qsub2_then_dsub 0, // GPR32sp:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR32sp:qsub2_then_dsub_qsub3_then_dsub 0, // GPR32sp:sub_32_x8sub_1_then_sub_32 0, // GPR32sp:x8sub_0_x8sub_1 0, // GPR32sp:x8sub_2_x8sub_3 0, // GPR32sp:x8sub_4_x8sub_5 0, // GPR32sp:x8sub_6_x8sub_7 0, // GPR32sp:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // GPR32sp:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // GPR32sp:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // GPR32sp:sub_32_subo64_then_sub_32 0, // GPR32sp:dsub_zsub1_then_dsub 0, // GPR32sp:zsub_zsub1_then_zsub 0, // GPR32sp:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR32sp:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR32sp:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR32sp:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR32sp:zsub0_zsub1 0, // GPR32sp:zsub0_zsub1_zsub2 0, // GPR32sp:zsub1_zsub2 0, // GPR32sp:zsub1_zsub2_zsub3 0, // GPR32sp:zsub2_zsub3 0, // GPR32sp:zsub1_then_dsub_zsub2_then_dsub 0, // GPR32sp:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR32sp:zsub1_then_zsub_zsub2_then_zsub 0, // GPR32sp:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR32sp:zsub2_then_dsub_zsub3_then_dsub 0, // GPR32sp:zsub2_then_zsub_zsub3_then_zsub 0, // GPR32sp:zsub0_zsub2 0, // GPR32sp:zsub1_zsub3 }, { // GPR32common 0, // GPR32common:bsub 0, // GPR32common:dsub 0, // GPR32common:dsub0 0, // GPR32common:dsub1 0, // GPR32common:dsub2 0, // GPR32common:dsub3 0, // GPR32common:hsub 0, // GPR32common:psub0 0, // GPR32common:psub1 0, // GPR32common:qsub0 0, // GPR32common:qsub1 0, // GPR32common:qsub2 0, // GPR32common:qsub3 0, // GPR32common:ssub 0, // GPR32common:sub_32 0, // GPR32common:sube32 0, // GPR32common:sube64 0, // GPR32common:subo32 0, // GPR32common:subo64 0, // GPR32common:x8sub_0 0, // GPR32common:x8sub_1 0, // GPR32common:x8sub_2 0, // GPR32common:x8sub_3 0, // GPR32common:x8sub_4 0, // GPR32common:x8sub_5 0, // GPR32common:x8sub_6 0, // GPR32common:x8sub_7 0, // GPR32common:zasubb 0, // GPR32common:zasubd0 0, // GPR32common:zasubd1 0, // GPR32common:zasubh0 0, // GPR32common:zasubh1 0, // GPR32common:zasubq0 0, // GPR32common:zasubq1 0, // GPR32common:zasubs0 0, // GPR32common:zasubs1 0, // GPR32common:zsub 0, // GPR32common:zsub0 0, // GPR32common:zsub1 0, // GPR32common:zsub2 0, // GPR32common:zsub3 0, // GPR32common:zsub_hi 0, // GPR32common:zasubd1_then_zasubq0 0, // GPR32common:zasubd1_then_zasubq1 0, // GPR32common:zasubs1_then_zasubd0 0, // GPR32common:zasubs1_then_zasubd1 0, // GPR32common:zasubs1_then_zasubq0 0, // GPR32common:zasubs1_then_zasubq1 0, // GPR32common:zasubs1_then_zasubd1_then_zasubq0 0, // GPR32common:zasubs1_then_zasubd1_then_zasubq1 0, // GPR32common:zasubh1_then_zasubd0 0, // GPR32common:zasubh1_then_zasubd1 0, // GPR32common:zasubh1_then_zasubq0 0, // GPR32common:zasubh1_then_zasubq1 0, // GPR32common:zasubh1_then_zasubs0 0, // GPR32common:zasubh1_then_zasubs1 0, // GPR32common:zasubh1_then_zasubd1_then_zasubq0 0, // GPR32common:zasubh1_then_zasubd1_then_zasubq1 0, // GPR32common:zasubh1_then_zasubs1_then_zasubd0 0, // GPR32common:zasubh1_then_zasubs1_then_zasubd1 0, // GPR32common:zasubh1_then_zasubs1_then_zasubq0 0, // GPR32common:zasubh1_then_zasubs1_then_zasubq1 0, // GPR32common:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR32common:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR32common:dsub1_then_bsub 0, // GPR32common:dsub1_then_hsub 0, // GPR32common:dsub1_then_ssub 0, // GPR32common:dsub3_then_bsub 0, // GPR32common:dsub3_then_hsub 0, // GPR32common:dsub3_then_ssub 0, // GPR32common:dsub2_then_bsub 0, // GPR32common:dsub2_then_hsub 0, // GPR32common:dsub2_then_ssub 0, // GPR32common:qsub1_then_bsub 0, // GPR32common:qsub1_then_dsub 0, // GPR32common:qsub1_then_hsub 0, // GPR32common:qsub1_then_ssub 0, // GPR32common:qsub3_then_bsub 0, // GPR32common:qsub3_then_dsub 0, // GPR32common:qsub3_then_hsub 0, // GPR32common:qsub3_then_ssub 0, // GPR32common:qsub2_then_bsub 0, // GPR32common:qsub2_then_dsub 0, // GPR32common:qsub2_then_hsub 0, // GPR32common:qsub2_then_ssub 0, // GPR32common:x8sub_7_then_sub_32 0, // GPR32common:x8sub_6_then_sub_32 0, // GPR32common:x8sub_5_then_sub_32 0, // GPR32common:x8sub_4_then_sub_32 0, // GPR32common:x8sub_3_then_sub_32 0, // GPR32common:x8sub_2_then_sub_32 0, // GPR32common:x8sub_1_then_sub_32 0, // GPR32common:subo64_then_sub_32 0, // GPR32common:zsub1_then_bsub 0, // GPR32common:zsub1_then_dsub 0, // GPR32common:zsub1_then_hsub 0, // GPR32common:zsub1_then_ssub 0, // GPR32common:zsub1_then_zsub 0, // GPR32common:zsub1_then_zsub_hi 0, // GPR32common:zsub3_then_bsub 0, // GPR32common:zsub3_then_dsub 0, // GPR32common:zsub3_then_hsub 0, // GPR32common:zsub3_then_ssub 0, // GPR32common:zsub3_then_zsub 0, // GPR32common:zsub3_then_zsub_hi 0, // GPR32common:zsub2_then_bsub 0, // GPR32common:zsub2_then_dsub 0, // GPR32common:zsub2_then_hsub 0, // GPR32common:zsub2_then_ssub 0, // GPR32common:zsub2_then_zsub 0, // GPR32common:zsub2_then_zsub_hi 0, // GPR32common:dsub0_dsub1 0, // GPR32common:dsub0_dsub1_dsub2 0, // GPR32common:dsub1_dsub2 0, // GPR32common:dsub1_dsub2_dsub3 0, // GPR32common:dsub2_dsub3 0, // GPR32common:dsub_qsub1_then_dsub 0, // GPR32common:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR32common:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR32common:qsub0_qsub1 0, // GPR32common:qsub0_qsub1_qsub2 0, // GPR32common:qsub1_qsub2 0, // GPR32common:qsub1_qsub2_qsub3 0, // GPR32common:qsub2_qsub3 0, // GPR32common:qsub1_then_dsub_qsub2_then_dsub 0, // GPR32common:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR32common:qsub2_then_dsub_qsub3_then_dsub 0, // GPR32common:sub_32_x8sub_1_then_sub_32 0, // GPR32common:x8sub_0_x8sub_1 0, // GPR32common:x8sub_2_x8sub_3 0, // GPR32common:x8sub_4_x8sub_5 0, // GPR32common:x8sub_6_x8sub_7 0, // GPR32common:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // GPR32common:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // GPR32common:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // GPR32common:sub_32_subo64_then_sub_32 0, // GPR32common:dsub_zsub1_then_dsub 0, // GPR32common:zsub_zsub1_then_zsub 0, // GPR32common:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR32common:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR32common:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR32common:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR32common:zsub0_zsub1 0, // GPR32common:zsub0_zsub1_zsub2 0, // GPR32common:zsub1_zsub2 0, // GPR32common:zsub1_zsub2_zsub3 0, // GPR32common:zsub2_zsub3 0, // GPR32common:zsub1_then_dsub_zsub2_then_dsub 0, // GPR32common:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR32common:zsub1_then_zsub_zsub2_then_zsub 0, // GPR32common:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR32common:zsub2_then_dsub_zsub3_then_dsub 0, // GPR32common:zsub2_then_zsub_zsub3_then_zsub 0, // GPR32common:zsub0_zsub2 0, // GPR32common:zsub1_zsub3 }, { // FPR32_with_hsub_in_FPR16_lo 1, // FPR32_with_hsub_in_FPR16_lo:bsub -> FPR8 0, // FPR32_with_hsub_in_FPR16_lo:dsub 0, // FPR32_with_hsub_in_FPR16_lo:dsub0 0, // FPR32_with_hsub_in_FPR16_lo:dsub1 0, // FPR32_with_hsub_in_FPR16_lo:dsub2 0, // FPR32_with_hsub_in_FPR16_lo:dsub3 3, // FPR32_with_hsub_in_FPR16_lo:hsub -> FPR16_lo 0, // FPR32_with_hsub_in_FPR16_lo:psub0 0, // FPR32_with_hsub_in_FPR16_lo:psub1 0, // FPR32_with_hsub_in_FPR16_lo:qsub0 0, // FPR32_with_hsub_in_FPR16_lo:qsub1 0, // FPR32_with_hsub_in_FPR16_lo:qsub2 0, // FPR32_with_hsub_in_FPR16_lo:qsub3 0, // FPR32_with_hsub_in_FPR16_lo:ssub 0, // FPR32_with_hsub_in_FPR16_lo:sub_32 0, // FPR32_with_hsub_in_FPR16_lo:sube32 0, // FPR32_with_hsub_in_FPR16_lo:sube64 0, // FPR32_with_hsub_in_FPR16_lo:subo32 0, // FPR32_with_hsub_in_FPR16_lo:subo64 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_0 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_1 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_2 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_3 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_4 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_5 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_6 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_7 0, // FPR32_with_hsub_in_FPR16_lo:zasubb 0, // FPR32_with_hsub_in_FPR16_lo:zasubd0 0, // FPR32_with_hsub_in_FPR16_lo:zasubd1 0, // FPR32_with_hsub_in_FPR16_lo:zasubh0 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1 0, // FPR32_with_hsub_in_FPR16_lo:zasubq0 0, // FPR32_with_hsub_in_FPR16_lo:zasubq1 0, // FPR32_with_hsub_in_FPR16_lo:zasubs0 0, // FPR32_with_hsub_in_FPR16_lo:zasubs1 0, // FPR32_with_hsub_in_FPR16_lo:zsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub0 0, // FPR32_with_hsub_in_FPR16_lo:zsub1 0, // FPR32_with_hsub_in_FPR16_lo:zsub2 0, // FPR32_with_hsub_in_FPR16_lo:zsub3 0, // FPR32_with_hsub_in_FPR16_lo:zsub_hi 0, // FPR32_with_hsub_in_FPR16_lo:zasubd1_then_zasubq0 0, // FPR32_with_hsub_in_FPR16_lo:zasubd1_then_zasubq1 0, // FPR32_with_hsub_in_FPR16_lo:zasubs1_then_zasubd0 0, // FPR32_with_hsub_in_FPR16_lo:zasubs1_then_zasubd1 0, // FPR32_with_hsub_in_FPR16_lo:zasubs1_then_zasubq0 0, // FPR32_with_hsub_in_FPR16_lo:zasubs1_then_zasubq1 0, // FPR32_with_hsub_in_FPR16_lo:zasubs1_then_zasubd1_then_zasubq0 0, // FPR32_with_hsub_in_FPR16_lo:zasubs1_then_zasubd1_then_zasubq1 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubd0 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubd1 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubq0 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubq1 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubs0 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubs1 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubd1_then_zasubq0 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubd1_then_zasubq1 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubs1_then_zasubd0 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubs1_then_zasubd1 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubs1_then_zasubq0 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubs1_then_zasubq1 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // FPR32_with_hsub_in_FPR16_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // FPR32_with_hsub_in_FPR16_lo:dsub1_then_bsub 0, // FPR32_with_hsub_in_FPR16_lo:dsub1_then_hsub 0, // FPR32_with_hsub_in_FPR16_lo:dsub1_then_ssub 0, // FPR32_with_hsub_in_FPR16_lo:dsub3_then_bsub 0, // FPR32_with_hsub_in_FPR16_lo:dsub3_then_hsub 0, // FPR32_with_hsub_in_FPR16_lo:dsub3_then_ssub 0, // FPR32_with_hsub_in_FPR16_lo:dsub2_then_bsub 0, // FPR32_with_hsub_in_FPR16_lo:dsub2_then_hsub 0, // FPR32_with_hsub_in_FPR16_lo:dsub2_then_ssub 0, // FPR32_with_hsub_in_FPR16_lo:qsub1_then_bsub 0, // FPR32_with_hsub_in_FPR16_lo:qsub1_then_dsub 0, // FPR32_with_hsub_in_FPR16_lo:qsub1_then_hsub 0, // FPR32_with_hsub_in_FPR16_lo:qsub1_then_ssub 0, // FPR32_with_hsub_in_FPR16_lo:qsub3_then_bsub 0, // FPR32_with_hsub_in_FPR16_lo:qsub3_then_dsub 0, // FPR32_with_hsub_in_FPR16_lo:qsub3_then_hsub 0, // FPR32_with_hsub_in_FPR16_lo:qsub3_then_ssub 0, // FPR32_with_hsub_in_FPR16_lo:qsub2_then_bsub 0, // FPR32_with_hsub_in_FPR16_lo:qsub2_then_dsub 0, // FPR32_with_hsub_in_FPR16_lo:qsub2_then_hsub 0, // FPR32_with_hsub_in_FPR16_lo:qsub2_then_ssub 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_7_then_sub_32 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_6_then_sub_32 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_5_then_sub_32 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_4_then_sub_32 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_3_then_sub_32 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_2_then_sub_32 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_1_then_sub_32 0, // FPR32_with_hsub_in_FPR16_lo:subo64_then_sub_32 0, // FPR32_with_hsub_in_FPR16_lo:zsub1_then_bsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub1_then_dsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub1_then_hsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub1_then_ssub 0, // FPR32_with_hsub_in_FPR16_lo:zsub1_then_zsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub1_then_zsub_hi 0, // FPR32_with_hsub_in_FPR16_lo:zsub3_then_bsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub3_then_dsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub3_then_hsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub3_then_ssub 0, // FPR32_with_hsub_in_FPR16_lo:zsub3_then_zsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub3_then_zsub_hi 0, // FPR32_with_hsub_in_FPR16_lo:zsub2_then_bsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub2_then_dsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub2_then_hsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub2_then_ssub 0, // FPR32_with_hsub_in_FPR16_lo:zsub2_then_zsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub2_then_zsub_hi 0, // FPR32_with_hsub_in_FPR16_lo:dsub0_dsub1 0, // FPR32_with_hsub_in_FPR16_lo:dsub0_dsub1_dsub2 0, // FPR32_with_hsub_in_FPR16_lo:dsub1_dsub2 0, // FPR32_with_hsub_in_FPR16_lo:dsub1_dsub2_dsub3 0, // FPR32_with_hsub_in_FPR16_lo:dsub2_dsub3 0, // FPR32_with_hsub_in_FPR16_lo:dsub_qsub1_then_dsub 0, // FPR32_with_hsub_in_FPR16_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FPR32_with_hsub_in_FPR16_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // FPR32_with_hsub_in_FPR16_lo:qsub0_qsub1 0, // FPR32_with_hsub_in_FPR16_lo:qsub0_qsub1_qsub2 0, // FPR32_with_hsub_in_FPR16_lo:qsub1_qsub2 0, // FPR32_with_hsub_in_FPR16_lo:qsub1_qsub2_qsub3 0, // FPR32_with_hsub_in_FPR16_lo:qsub2_qsub3 0, // FPR32_with_hsub_in_FPR16_lo:qsub1_then_dsub_qsub2_then_dsub 0, // FPR32_with_hsub_in_FPR16_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FPR32_with_hsub_in_FPR16_lo:qsub2_then_dsub_qsub3_then_dsub 0, // FPR32_with_hsub_in_FPR16_lo:sub_32_x8sub_1_then_sub_32 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_0_x8sub_1 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_2_x8sub_3 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_4_x8sub_5 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_6_x8sub_7 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // FPR32_with_hsub_in_FPR16_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // FPR32_with_hsub_in_FPR16_lo:sub_32_subo64_then_sub_32 0, // FPR32_with_hsub_in_FPR16_lo:dsub_zsub1_then_dsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub_zsub1_then_zsub 0, // FPR32_with_hsub_in_FPR16_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FPR32_with_hsub_in_FPR16_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub0_zsub1 0, // FPR32_with_hsub_in_FPR16_lo:zsub0_zsub1_zsub2 0, // FPR32_with_hsub_in_FPR16_lo:zsub1_zsub2 0, // FPR32_with_hsub_in_FPR16_lo:zsub1_zsub2_zsub3 0, // FPR32_with_hsub_in_FPR16_lo:zsub2_zsub3 0, // FPR32_with_hsub_in_FPR16_lo:zsub1_then_dsub_zsub2_then_dsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub1_then_zsub_zsub2_then_zsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub2_then_dsub_zsub3_then_dsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub2_then_zsub_zsub3_then_zsub 0, // FPR32_with_hsub_in_FPR16_lo:zsub0_zsub2 0, // FPR32_with_hsub_in_FPR16_lo:zsub1_zsub3 }, { // GPR32arg 0, // GPR32arg:bsub 0, // GPR32arg:dsub 0, // GPR32arg:dsub0 0, // GPR32arg:dsub1 0, // GPR32arg:dsub2 0, // GPR32arg:dsub3 0, // GPR32arg:hsub 0, // GPR32arg:psub0 0, // GPR32arg:psub1 0, // GPR32arg:qsub0 0, // GPR32arg:qsub1 0, // GPR32arg:qsub2 0, // GPR32arg:qsub3 0, // GPR32arg:ssub 0, // GPR32arg:sub_32 0, // GPR32arg:sube32 0, // GPR32arg:sube64 0, // GPR32arg:subo32 0, // GPR32arg:subo64 0, // GPR32arg:x8sub_0 0, // GPR32arg:x8sub_1 0, // GPR32arg:x8sub_2 0, // GPR32arg:x8sub_3 0, // GPR32arg:x8sub_4 0, // GPR32arg:x8sub_5 0, // GPR32arg:x8sub_6 0, // GPR32arg:x8sub_7 0, // GPR32arg:zasubb 0, // GPR32arg:zasubd0 0, // GPR32arg:zasubd1 0, // GPR32arg:zasubh0 0, // GPR32arg:zasubh1 0, // GPR32arg:zasubq0 0, // GPR32arg:zasubq1 0, // GPR32arg:zasubs0 0, // GPR32arg:zasubs1 0, // GPR32arg:zsub 0, // GPR32arg:zsub0 0, // GPR32arg:zsub1 0, // GPR32arg:zsub2 0, // GPR32arg:zsub3 0, // GPR32arg:zsub_hi 0, // GPR32arg:zasubd1_then_zasubq0 0, // GPR32arg:zasubd1_then_zasubq1 0, // GPR32arg:zasubs1_then_zasubd0 0, // GPR32arg:zasubs1_then_zasubd1 0, // GPR32arg:zasubs1_then_zasubq0 0, // GPR32arg:zasubs1_then_zasubq1 0, // GPR32arg:zasubs1_then_zasubd1_then_zasubq0 0, // GPR32arg:zasubs1_then_zasubd1_then_zasubq1 0, // GPR32arg:zasubh1_then_zasubd0 0, // GPR32arg:zasubh1_then_zasubd1 0, // GPR32arg:zasubh1_then_zasubq0 0, // GPR32arg:zasubh1_then_zasubq1 0, // GPR32arg:zasubh1_then_zasubs0 0, // GPR32arg:zasubh1_then_zasubs1 0, // GPR32arg:zasubh1_then_zasubd1_then_zasubq0 0, // GPR32arg:zasubh1_then_zasubd1_then_zasubq1 0, // GPR32arg:zasubh1_then_zasubs1_then_zasubd0 0, // GPR32arg:zasubh1_then_zasubs1_then_zasubd1 0, // GPR32arg:zasubh1_then_zasubs1_then_zasubq0 0, // GPR32arg:zasubh1_then_zasubs1_then_zasubq1 0, // GPR32arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR32arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR32arg:dsub1_then_bsub 0, // GPR32arg:dsub1_then_hsub 0, // GPR32arg:dsub1_then_ssub 0, // GPR32arg:dsub3_then_bsub 0, // GPR32arg:dsub3_then_hsub 0, // GPR32arg:dsub3_then_ssub 0, // GPR32arg:dsub2_then_bsub 0, // GPR32arg:dsub2_then_hsub 0, // GPR32arg:dsub2_then_ssub 0, // GPR32arg:qsub1_then_bsub 0, // GPR32arg:qsub1_then_dsub 0, // GPR32arg:qsub1_then_hsub 0, // GPR32arg:qsub1_then_ssub 0, // GPR32arg:qsub3_then_bsub 0, // GPR32arg:qsub3_then_dsub 0, // GPR32arg:qsub3_then_hsub 0, // GPR32arg:qsub3_then_ssub 0, // GPR32arg:qsub2_then_bsub 0, // GPR32arg:qsub2_then_dsub 0, // GPR32arg:qsub2_then_hsub 0, // GPR32arg:qsub2_then_ssub 0, // GPR32arg:x8sub_7_then_sub_32 0, // GPR32arg:x8sub_6_then_sub_32 0, // GPR32arg:x8sub_5_then_sub_32 0, // GPR32arg:x8sub_4_then_sub_32 0, // GPR32arg:x8sub_3_then_sub_32 0, // GPR32arg:x8sub_2_then_sub_32 0, // GPR32arg:x8sub_1_then_sub_32 0, // GPR32arg:subo64_then_sub_32 0, // GPR32arg:zsub1_then_bsub 0, // GPR32arg:zsub1_then_dsub 0, // GPR32arg:zsub1_then_hsub 0, // GPR32arg:zsub1_then_ssub 0, // GPR32arg:zsub1_then_zsub 0, // GPR32arg:zsub1_then_zsub_hi 0, // GPR32arg:zsub3_then_bsub 0, // GPR32arg:zsub3_then_dsub 0, // GPR32arg:zsub3_then_hsub 0, // GPR32arg:zsub3_then_ssub 0, // GPR32arg:zsub3_then_zsub 0, // GPR32arg:zsub3_then_zsub_hi 0, // GPR32arg:zsub2_then_bsub 0, // GPR32arg:zsub2_then_dsub 0, // GPR32arg:zsub2_then_hsub 0, // GPR32arg:zsub2_then_ssub 0, // GPR32arg:zsub2_then_zsub 0, // GPR32arg:zsub2_then_zsub_hi 0, // GPR32arg:dsub0_dsub1 0, // GPR32arg:dsub0_dsub1_dsub2 0, // GPR32arg:dsub1_dsub2 0, // GPR32arg:dsub1_dsub2_dsub3 0, // GPR32arg:dsub2_dsub3 0, // GPR32arg:dsub_qsub1_then_dsub 0, // GPR32arg:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR32arg:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR32arg:qsub0_qsub1 0, // GPR32arg:qsub0_qsub1_qsub2 0, // GPR32arg:qsub1_qsub2 0, // GPR32arg:qsub1_qsub2_qsub3 0, // GPR32arg:qsub2_qsub3 0, // GPR32arg:qsub1_then_dsub_qsub2_then_dsub 0, // GPR32arg:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR32arg:qsub2_then_dsub_qsub3_then_dsub 0, // GPR32arg:sub_32_x8sub_1_then_sub_32 0, // GPR32arg:x8sub_0_x8sub_1 0, // GPR32arg:x8sub_2_x8sub_3 0, // GPR32arg:x8sub_4_x8sub_5 0, // GPR32arg:x8sub_6_x8sub_7 0, // GPR32arg:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // GPR32arg:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // GPR32arg:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // GPR32arg:sub_32_subo64_then_sub_32 0, // GPR32arg:dsub_zsub1_then_dsub 0, // GPR32arg:zsub_zsub1_then_zsub 0, // GPR32arg:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR32arg:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR32arg:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR32arg:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR32arg:zsub0_zsub1 0, // GPR32arg:zsub0_zsub1_zsub2 0, // GPR32arg:zsub1_zsub2 0, // GPR32arg:zsub1_zsub2_zsub3 0, // GPR32arg:zsub2_zsub3 0, // GPR32arg:zsub1_then_dsub_zsub2_then_dsub 0, // GPR32arg:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR32arg:zsub1_then_zsub_zsub2_then_zsub 0, // GPR32arg:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR32arg:zsub2_then_dsub_zsub3_then_dsub 0, // GPR32arg:zsub2_then_zsub_zsub3_then_zsub 0, // GPR32arg:zsub0_zsub2 0, // GPR32arg:zsub1_zsub3 }, { // MatrixIndexGPR32_12_15 0, // MatrixIndexGPR32_12_15:bsub 0, // MatrixIndexGPR32_12_15:dsub 0, // MatrixIndexGPR32_12_15:dsub0 0, // MatrixIndexGPR32_12_15:dsub1 0, // MatrixIndexGPR32_12_15:dsub2 0, // MatrixIndexGPR32_12_15:dsub3 0, // MatrixIndexGPR32_12_15:hsub 0, // MatrixIndexGPR32_12_15:psub0 0, // MatrixIndexGPR32_12_15:psub1 0, // MatrixIndexGPR32_12_15:qsub0 0, // MatrixIndexGPR32_12_15:qsub1 0, // MatrixIndexGPR32_12_15:qsub2 0, // MatrixIndexGPR32_12_15:qsub3 0, // MatrixIndexGPR32_12_15:ssub 0, // MatrixIndexGPR32_12_15:sub_32 0, // MatrixIndexGPR32_12_15:sube32 0, // MatrixIndexGPR32_12_15:sube64 0, // MatrixIndexGPR32_12_15:subo32 0, // MatrixIndexGPR32_12_15:subo64 0, // MatrixIndexGPR32_12_15:x8sub_0 0, // MatrixIndexGPR32_12_15:x8sub_1 0, // MatrixIndexGPR32_12_15:x8sub_2 0, // MatrixIndexGPR32_12_15:x8sub_3 0, // MatrixIndexGPR32_12_15:x8sub_4 0, // MatrixIndexGPR32_12_15:x8sub_5 0, // MatrixIndexGPR32_12_15:x8sub_6 0, // MatrixIndexGPR32_12_15:x8sub_7 0, // MatrixIndexGPR32_12_15:zasubb 0, // MatrixIndexGPR32_12_15:zasubd0 0, // MatrixIndexGPR32_12_15:zasubd1 0, // MatrixIndexGPR32_12_15:zasubh0 0, // MatrixIndexGPR32_12_15:zasubh1 0, // MatrixIndexGPR32_12_15:zasubq0 0, // MatrixIndexGPR32_12_15:zasubq1 0, // MatrixIndexGPR32_12_15:zasubs0 0, // MatrixIndexGPR32_12_15:zasubs1 0, // MatrixIndexGPR32_12_15:zsub 0, // MatrixIndexGPR32_12_15:zsub0 0, // MatrixIndexGPR32_12_15:zsub1 0, // MatrixIndexGPR32_12_15:zsub2 0, // MatrixIndexGPR32_12_15:zsub3 0, // MatrixIndexGPR32_12_15:zsub_hi 0, // MatrixIndexGPR32_12_15:zasubd1_then_zasubq0 0, // MatrixIndexGPR32_12_15:zasubd1_then_zasubq1 0, // MatrixIndexGPR32_12_15:zasubs1_then_zasubd0 0, // MatrixIndexGPR32_12_15:zasubs1_then_zasubd1 0, // MatrixIndexGPR32_12_15:zasubs1_then_zasubq0 0, // MatrixIndexGPR32_12_15:zasubs1_then_zasubq1 0, // MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq0 0, // MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq1 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubd0 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubd1 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubq0 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubq1 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubs0 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubs1 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq0 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq1 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd0 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq0 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq1 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // MatrixIndexGPR32_12_15:dsub1_then_bsub 0, // MatrixIndexGPR32_12_15:dsub1_then_hsub 0, // MatrixIndexGPR32_12_15:dsub1_then_ssub 0, // MatrixIndexGPR32_12_15:dsub3_then_bsub 0, // MatrixIndexGPR32_12_15:dsub3_then_hsub 0, // MatrixIndexGPR32_12_15:dsub3_then_ssub 0, // MatrixIndexGPR32_12_15:dsub2_then_bsub 0, // MatrixIndexGPR32_12_15:dsub2_then_hsub 0, // MatrixIndexGPR32_12_15:dsub2_then_ssub 0, // MatrixIndexGPR32_12_15:qsub1_then_bsub 0, // MatrixIndexGPR32_12_15:qsub1_then_dsub 0, // MatrixIndexGPR32_12_15:qsub1_then_hsub 0, // MatrixIndexGPR32_12_15:qsub1_then_ssub 0, // MatrixIndexGPR32_12_15:qsub3_then_bsub 0, // MatrixIndexGPR32_12_15:qsub3_then_dsub 0, // MatrixIndexGPR32_12_15:qsub3_then_hsub 0, // MatrixIndexGPR32_12_15:qsub3_then_ssub 0, // MatrixIndexGPR32_12_15:qsub2_then_bsub 0, // MatrixIndexGPR32_12_15:qsub2_then_dsub 0, // MatrixIndexGPR32_12_15:qsub2_then_hsub 0, // MatrixIndexGPR32_12_15:qsub2_then_ssub 0, // MatrixIndexGPR32_12_15:x8sub_7_then_sub_32 0, // MatrixIndexGPR32_12_15:x8sub_6_then_sub_32 0, // MatrixIndexGPR32_12_15:x8sub_5_then_sub_32 0, // MatrixIndexGPR32_12_15:x8sub_4_then_sub_32 0, // MatrixIndexGPR32_12_15:x8sub_3_then_sub_32 0, // MatrixIndexGPR32_12_15:x8sub_2_then_sub_32 0, // MatrixIndexGPR32_12_15:x8sub_1_then_sub_32 0, // MatrixIndexGPR32_12_15:subo64_then_sub_32 0, // MatrixIndexGPR32_12_15:zsub1_then_bsub 0, // MatrixIndexGPR32_12_15:zsub1_then_dsub 0, // MatrixIndexGPR32_12_15:zsub1_then_hsub 0, // MatrixIndexGPR32_12_15:zsub1_then_ssub 0, // MatrixIndexGPR32_12_15:zsub1_then_zsub 0, // MatrixIndexGPR32_12_15:zsub1_then_zsub_hi 0, // MatrixIndexGPR32_12_15:zsub3_then_bsub 0, // MatrixIndexGPR32_12_15:zsub3_then_dsub 0, // MatrixIndexGPR32_12_15:zsub3_then_hsub 0, // MatrixIndexGPR32_12_15:zsub3_then_ssub 0, // MatrixIndexGPR32_12_15:zsub3_then_zsub 0, // MatrixIndexGPR32_12_15:zsub3_then_zsub_hi 0, // MatrixIndexGPR32_12_15:zsub2_then_bsub 0, // MatrixIndexGPR32_12_15:zsub2_then_dsub 0, // MatrixIndexGPR32_12_15:zsub2_then_hsub 0, // MatrixIndexGPR32_12_15:zsub2_then_ssub 0, // MatrixIndexGPR32_12_15:zsub2_then_zsub 0, // MatrixIndexGPR32_12_15:zsub2_then_zsub_hi 0, // MatrixIndexGPR32_12_15:dsub0_dsub1 0, // MatrixIndexGPR32_12_15:dsub0_dsub1_dsub2 0, // MatrixIndexGPR32_12_15:dsub1_dsub2 0, // MatrixIndexGPR32_12_15:dsub1_dsub2_dsub3 0, // MatrixIndexGPR32_12_15:dsub2_dsub3 0, // MatrixIndexGPR32_12_15:dsub_qsub1_then_dsub 0, // MatrixIndexGPR32_12_15:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // MatrixIndexGPR32_12_15:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // MatrixIndexGPR32_12_15:qsub0_qsub1 0, // MatrixIndexGPR32_12_15:qsub0_qsub1_qsub2 0, // MatrixIndexGPR32_12_15:qsub1_qsub2 0, // MatrixIndexGPR32_12_15:qsub1_qsub2_qsub3 0, // MatrixIndexGPR32_12_15:qsub2_qsub3 0, // MatrixIndexGPR32_12_15:qsub1_then_dsub_qsub2_then_dsub 0, // MatrixIndexGPR32_12_15:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // MatrixIndexGPR32_12_15:qsub2_then_dsub_qsub3_then_dsub 0, // MatrixIndexGPR32_12_15:sub_32_x8sub_1_then_sub_32 0, // MatrixIndexGPR32_12_15:x8sub_0_x8sub_1 0, // MatrixIndexGPR32_12_15:x8sub_2_x8sub_3 0, // MatrixIndexGPR32_12_15:x8sub_4_x8sub_5 0, // MatrixIndexGPR32_12_15:x8sub_6_x8sub_7 0, // MatrixIndexGPR32_12_15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // MatrixIndexGPR32_12_15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // MatrixIndexGPR32_12_15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // MatrixIndexGPR32_12_15:sub_32_subo64_then_sub_32 0, // MatrixIndexGPR32_12_15:dsub_zsub1_then_dsub 0, // MatrixIndexGPR32_12_15:zsub_zsub1_then_zsub 0, // MatrixIndexGPR32_12_15:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // MatrixIndexGPR32_12_15:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // MatrixIndexGPR32_12_15:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // MatrixIndexGPR32_12_15:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // MatrixIndexGPR32_12_15:zsub0_zsub1 0, // MatrixIndexGPR32_12_15:zsub0_zsub1_zsub2 0, // MatrixIndexGPR32_12_15:zsub1_zsub2 0, // MatrixIndexGPR32_12_15:zsub1_zsub2_zsub3 0, // MatrixIndexGPR32_12_15:zsub2_zsub3 0, // MatrixIndexGPR32_12_15:zsub1_then_dsub_zsub2_then_dsub 0, // MatrixIndexGPR32_12_15:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // MatrixIndexGPR32_12_15:zsub1_then_zsub_zsub2_then_zsub 0, // MatrixIndexGPR32_12_15:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // MatrixIndexGPR32_12_15:zsub2_then_dsub_zsub3_then_dsub 0, // MatrixIndexGPR32_12_15:zsub2_then_zsub_zsub3_then_zsub 0, // MatrixIndexGPR32_12_15:zsub0_zsub2 0, // MatrixIndexGPR32_12_15:zsub1_zsub3 }, { // MatrixIndexGPR32_8_11 0, // MatrixIndexGPR32_8_11:bsub 0, // MatrixIndexGPR32_8_11:dsub 0, // MatrixIndexGPR32_8_11:dsub0 0, // MatrixIndexGPR32_8_11:dsub1 0, // MatrixIndexGPR32_8_11:dsub2 0, // MatrixIndexGPR32_8_11:dsub3 0, // MatrixIndexGPR32_8_11:hsub 0, // MatrixIndexGPR32_8_11:psub0 0, // MatrixIndexGPR32_8_11:psub1 0, // MatrixIndexGPR32_8_11:qsub0 0, // MatrixIndexGPR32_8_11:qsub1 0, // MatrixIndexGPR32_8_11:qsub2 0, // MatrixIndexGPR32_8_11:qsub3 0, // MatrixIndexGPR32_8_11:ssub 0, // MatrixIndexGPR32_8_11:sub_32 0, // MatrixIndexGPR32_8_11:sube32 0, // MatrixIndexGPR32_8_11:sube64 0, // MatrixIndexGPR32_8_11:subo32 0, // MatrixIndexGPR32_8_11:subo64 0, // MatrixIndexGPR32_8_11:x8sub_0 0, // MatrixIndexGPR32_8_11:x8sub_1 0, // MatrixIndexGPR32_8_11:x8sub_2 0, // MatrixIndexGPR32_8_11:x8sub_3 0, // MatrixIndexGPR32_8_11:x8sub_4 0, // MatrixIndexGPR32_8_11:x8sub_5 0, // MatrixIndexGPR32_8_11:x8sub_6 0, // MatrixIndexGPR32_8_11:x8sub_7 0, // MatrixIndexGPR32_8_11:zasubb 0, // MatrixIndexGPR32_8_11:zasubd0 0, // MatrixIndexGPR32_8_11:zasubd1 0, // MatrixIndexGPR32_8_11:zasubh0 0, // MatrixIndexGPR32_8_11:zasubh1 0, // MatrixIndexGPR32_8_11:zasubq0 0, // MatrixIndexGPR32_8_11:zasubq1 0, // MatrixIndexGPR32_8_11:zasubs0 0, // MatrixIndexGPR32_8_11:zasubs1 0, // MatrixIndexGPR32_8_11:zsub 0, // MatrixIndexGPR32_8_11:zsub0 0, // MatrixIndexGPR32_8_11:zsub1 0, // MatrixIndexGPR32_8_11:zsub2 0, // MatrixIndexGPR32_8_11:zsub3 0, // MatrixIndexGPR32_8_11:zsub_hi 0, // MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 0, // MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 0, // MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 0, // MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 0, // MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 0, // MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 0, // MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 0, // MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // MatrixIndexGPR32_8_11:dsub1_then_bsub 0, // MatrixIndexGPR32_8_11:dsub1_then_hsub 0, // MatrixIndexGPR32_8_11:dsub1_then_ssub 0, // MatrixIndexGPR32_8_11:dsub3_then_bsub 0, // MatrixIndexGPR32_8_11:dsub3_then_hsub 0, // MatrixIndexGPR32_8_11:dsub3_then_ssub 0, // MatrixIndexGPR32_8_11:dsub2_then_bsub 0, // MatrixIndexGPR32_8_11:dsub2_then_hsub 0, // MatrixIndexGPR32_8_11:dsub2_then_ssub 0, // MatrixIndexGPR32_8_11:qsub1_then_bsub 0, // MatrixIndexGPR32_8_11:qsub1_then_dsub 0, // MatrixIndexGPR32_8_11:qsub1_then_hsub 0, // MatrixIndexGPR32_8_11:qsub1_then_ssub 0, // MatrixIndexGPR32_8_11:qsub3_then_bsub 0, // MatrixIndexGPR32_8_11:qsub3_then_dsub 0, // MatrixIndexGPR32_8_11:qsub3_then_hsub 0, // MatrixIndexGPR32_8_11:qsub3_then_ssub 0, // MatrixIndexGPR32_8_11:qsub2_then_bsub 0, // MatrixIndexGPR32_8_11:qsub2_then_dsub 0, // MatrixIndexGPR32_8_11:qsub2_then_hsub 0, // MatrixIndexGPR32_8_11:qsub2_then_ssub 0, // MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 0, // MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 0, // MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 0, // MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 0, // MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 0, // MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 0, // MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 0, // MatrixIndexGPR32_8_11:subo64_then_sub_32 0, // MatrixIndexGPR32_8_11:zsub1_then_bsub 0, // MatrixIndexGPR32_8_11:zsub1_then_dsub 0, // MatrixIndexGPR32_8_11:zsub1_then_hsub 0, // MatrixIndexGPR32_8_11:zsub1_then_ssub 0, // MatrixIndexGPR32_8_11:zsub1_then_zsub 0, // MatrixIndexGPR32_8_11:zsub1_then_zsub_hi 0, // MatrixIndexGPR32_8_11:zsub3_then_bsub 0, // MatrixIndexGPR32_8_11:zsub3_then_dsub 0, // MatrixIndexGPR32_8_11:zsub3_then_hsub 0, // MatrixIndexGPR32_8_11:zsub3_then_ssub 0, // MatrixIndexGPR32_8_11:zsub3_then_zsub 0, // MatrixIndexGPR32_8_11:zsub3_then_zsub_hi 0, // MatrixIndexGPR32_8_11:zsub2_then_bsub 0, // MatrixIndexGPR32_8_11:zsub2_then_dsub 0, // MatrixIndexGPR32_8_11:zsub2_then_hsub 0, // MatrixIndexGPR32_8_11:zsub2_then_ssub 0, // MatrixIndexGPR32_8_11:zsub2_then_zsub 0, // MatrixIndexGPR32_8_11:zsub2_then_zsub_hi 0, // MatrixIndexGPR32_8_11:dsub0_dsub1 0, // MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 0, // MatrixIndexGPR32_8_11:dsub1_dsub2 0, // MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 0, // MatrixIndexGPR32_8_11:dsub2_dsub3 0, // MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub 0, // MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // MatrixIndexGPR32_8_11:qsub0_qsub1 0, // MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 0, // MatrixIndexGPR32_8_11:qsub1_qsub2 0, // MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 0, // MatrixIndexGPR32_8_11:qsub2_qsub3 0, // MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub 0, // MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // MatrixIndexGPR32_8_11:qsub2_then_dsub_qsub3_then_dsub 0, // MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 0, // MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 0, // MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 0, // MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 0, // MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 0, // MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 0, // MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub 0, // MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub 0, // MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // MatrixIndexGPR32_8_11:zsub0_zsub1 0, // MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 0, // MatrixIndexGPR32_8_11:zsub1_zsub2 0, // MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 0, // MatrixIndexGPR32_8_11:zsub2_zsub3 0, // MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub 0, // MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub 0, // MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // MatrixIndexGPR32_8_11:zsub2_then_dsub_zsub3_then_dsub 0, // MatrixIndexGPR32_8_11:zsub2_then_zsub_zsub3_then_zsub 0, // MatrixIndexGPR32_8_11:zsub0_zsub2 0, // MatrixIndexGPR32_8_11:zsub1_zsub3 }, { // CCR 0, // CCR:bsub 0, // CCR:dsub 0, // CCR:dsub0 0, // CCR:dsub1 0, // CCR:dsub2 0, // CCR:dsub3 0, // CCR:hsub 0, // CCR:psub0 0, // CCR:psub1 0, // CCR:qsub0 0, // CCR:qsub1 0, // CCR:qsub2 0, // CCR:qsub3 0, // CCR:ssub 0, // CCR:sub_32 0, // CCR:sube32 0, // CCR:sube64 0, // CCR:subo32 0, // CCR:subo64 0, // CCR:x8sub_0 0, // CCR:x8sub_1 0, // CCR:x8sub_2 0, // CCR:x8sub_3 0, // CCR:x8sub_4 0, // CCR:x8sub_5 0, // CCR:x8sub_6 0, // CCR:x8sub_7 0, // CCR:zasubb 0, // CCR:zasubd0 0, // CCR:zasubd1 0, // CCR:zasubh0 0, // CCR:zasubh1 0, // CCR:zasubq0 0, // CCR:zasubq1 0, // CCR:zasubs0 0, // CCR:zasubs1 0, // CCR:zsub 0, // CCR:zsub0 0, // CCR:zsub1 0, // CCR:zsub2 0, // CCR:zsub3 0, // CCR:zsub_hi 0, // CCR:zasubd1_then_zasubq0 0, // CCR:zasubd1_then_zasubq1 0, // CCR:zasubs1_then_zasubd0 0, // CCR:zasubs1_then_zasubd1 0, // CCR:zasubs1_then_zasubq0 0, // CCR:zasubs1_then_zasubq1 0, // CCR:zasubs1_then_zasubd1_then_zasubq0 0, // CCR:zasubs1_then_zasubd1_then_zasubq1 0, // CCR:zasubh1_then_zasubd0 0, // CCR:zasubh1_then_zasubd1 0, // CCR:zasubh1_then_zasubq0 0, // CCR:zasubh1_then_zasubq1 0, // CCR:zasubh1_then_zasubs0 0, // CCR:zasubh1_then_zasubs1 0, // CCR:zasubh1_then_zasubd1_then_zasubq0 0, // CCR:zasubh1_then_zasubd1_then_zasubq1 0, // CCR:zasubh1_then_zasubs1_then_zasubd0 0, // CCR:zasubh1_then_zasubs1_then_zasubd1 0, // CCR:zasubh1_then_zasubs1_then_zasubq0 0, // CCR:zasubh1_then_zasubs1_then_zasubq1 0, // CCR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // CCR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // CCR:dsub1_then_bsub 0, // CCR:dsub1_then_hsub 0, // CCR:dsub1_then_ssub 0, // CCR:dsub3_then_bsub 0, // CCR:dsub3_then_hsub 0, // CCR:dsub3_then_ssub 0, // CCR:dsub2_then_bsub 0, // CCR:dsub2_then_hsub 0, // CCR:dsub2_then_ssub 0, // CCR:qsub1_then_bsub 0, // CCR:qsub1_then_dsub 0, // CCR:qsub1_then_hsub 0, // CCR:qsub1_then_ssub 0, // CCR:qsub3_then_bsub 0, // CCR:qsub3_then_dsub 0, // CCR:qsub3_then_hsub 0, // CCR:qsub3_then_ssub 0, // CCR:qsub2_then_bsub 0, // CCR:qsub2_then_dsub 0, // CCR:qsub2_then_hsub 0, // CCR:qsub2_then_ssub 0, // CCR:x8sub_7_then_sub_32 0, // CCR:x8sub_6_then_sub_32 0, // CCR:x8sub_5_then_sub_32 0, // CCR:x8sub_4_then_sub_32 0, // CCR:x8sub_3_then_sub_32 0, // CCR:x8sub_2_then_sub_32 0, // CCR:x8sub_1_then_sub_32 0, // CCR:subo64_then_sub_32 0, // CCR:zsub1_then_bsub 0, // CCR:zsub1_then_dsub 0, // CCR:zsub1_then_hsub 0, // CCR:zsub1_then_ssub 0, // CCR:zsub1_then_zsub 0, // CCR:zsub1_then_zsub_hi 0, // CCR:zsub3_then_bsub 0, // CCR:zsub3_then_dsub 0, // CCR:zsub3_then_hsub 0, // CCR:zsub3_then_ssub 0, // CCR:zsub3_then_zsub 0, // CCR:zsub3_then_zsub_hi 0, // CCR:zsub2_then_bsub 0, // CCR:zsub2_then_dsub 0, // CCR:zsub2_then_hsub 0, // CCR:zsub2_then_ssub 0, // CCR:zsub2_then_zsub 0, // CCR:zsub2_then_zsub_hi 0, // CCR:dsub0_dsub1 0, // CCR:dsub0_dsub1_dsub2 0, // CCR:dsub1_dsub2 0, // CCR:dsub1_dsub2_dsub3 0, // CCR:dsub2_dsub3 0, // CCR:dsub_qsub1_then_dsub 0, // CCR:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // CCR:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // CCR:qsub0_qsub1 0, // CCR:qsub0_qsub1_qsub2 0, // CCR:qsub1_qsub2 0, // CCR:qsub1_qsub2_qsub3 0, // CCR:qsub2_qsub3 0, // CCR:qsub1_then_dsub_qsub2_then_dsub 0, // CCR:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // CCR:qsub2_then_dsub_qsub3_then_dsub 0, // CCR:sub_32_x8sub_1_then_sub_32 0, // CCR:x8sub_0_x8sub_1 0, // CCR:x8sub_2_x8sub_3 0, // CCR:x8sub_4_x8sub_5 0, // CCR:x8sub_6_x8sub_7 0, // CCR:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // CCR:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // CCR:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // CCR:sub_32_subo64_then_sub_32 0, // CCR:dsub_zsub1_then_dsub 0, // CCR:zsub_zsub1_then_zsub 0, // CCR:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // CCR:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // CCR:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // CCR:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // CCR:zsub0_zsub1 0, // CCR:zsub0_zsub1_zsub2 0, // CCR:zsub1_zsub2 0, // CCR:zsub1_zsub2_zsub3 0, // CCR:zsub2_zsub3 0, // CCR:zsub1_then_dsub_zsub2_then_dsub 0, // CCR:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // CCR:zsub1_then_zsub_zsub2_then_zsub 0, // CCR:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // CCR:zsub2_then_dsub_zsub3_then_dsub 0, // CCR:zsub2_then_zsub_zsub3_then_zsub 0, // CCR:zsub0_zsub2 0, // CCR:zsub1_zsub3 }, { // GPR32sponly 0, // GPR32sponly:bsub 0, // GPR32sponly:dsub 0, // GPR32sponly:dsub0 0, // GPR32sponly:dsub1 0, // GPR32sponly:dsub2 0, // GPR32sponly:dsub3 0, // GPR32sponly:hsub 0, // GPR32sponly:psub0 0, // GPR32sponly:psub1 0, // GPR32sponly:qsub0 0, // GPR32sponly:qsub1 0, // GPR32sponly:qsub2 0, // GPR32sponly:qsub3 0, // GPR32sponly:ssub 0, // GPR32sponly:sub_32 0, // GPR32sponly:sube32 0, // GPR32sponly:sube64 0, // GPR32sponly:subo32 0, // GPR32sponly:subo64 0, // GPR32sponly:x8sub_0 0, // GPR32sponly:x8sub_1 0, // GPR32sponly:x8sub_2 0, // GPR32sponly:x8sub_3 0, // GPR32sponly:x8sub_4 0, // GPR32sponly:x8sub_5 0, // GPR32sponly:x8sub_6 0, // GPR32sponly:x8sub_7 0, // GPR32sponly:zasubb 0, // GPR32sponly:zasubd0 0, // GPR32sponly:zasubd1 0, // GPR32sponly:zasubh0 0, // GPR32sponly:zasubh1 0, // GPR32sponly:zasubq0 0, // GPR32sponly:zasubq1 0, // GPR32sponly:zasubs0 0, // GPR32sponly:zasubs1 0, // GPR32sponly:zsub 0, // GPR32sponly:zsub0 0, // GPR32sponly:zsub1 0, // GPR32sponly:zsub2 0, // GPR32sponly:zsub3 0, // GPR32sponly:zsub_hi 0, // GPR32sponly:zasubd1_then_zasubq0 0, // GPR32sponly:zasubd1_then_zasubq1 0, // GPR32sponly:zasubs1_then_zasubd0 0, // GPR32sponly:zasubs1_then_zasubd1 0, // GPR32sponly:zasubs1_then_zasubq0 0, // GPR32sponly:zasubs1_then_zasubq1 0, // GPR32sponly:zasubs1_then_zasubd1_then_zasubq0 0, // GPR32sponly:zasubs1_then_zasubd1_then_zasubq1 0, // GPR32sponly:zasubh1_then_zasubd0 0, // GPR32sponly:zasubh1_then_zasubd1 0, // GPR32sponly:zasubh1_then_zasubq0 0, // GPR32sponly:zasubh1_then_zasubq1 0, // GPR32sponly:zasubh1_then_zasubs0 0, // GPR32sponly:zasubh1_then_zasubs1 0, // GPR32sponly:zasubh1_then_zasubd1_then_zasubq0 0, // GPR32sponly:zasubh1_then_zasubd1_then_zasubq1 0, // GPR32sponly:zasubh1_then_zasubs1_then_zasubd0 0, // GPR32sponly:zasubh1_then_zasubs1_then_zasubd1 0, // GPR32sponly:zasubh1_then_zasubs1_then_zasubq0 0, // GPR32sponly:zasubh1_then_zasubs1_then_zasubq1 0, // GPR32sponly:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR32sponly:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR32sponly:dsub1_then_bsub 0, // GPR32sponly:dsub1_then_hsub 0, // GPR32sponly:dsub1_then_ssub 0, // GPR32sponly:dsub3_then_bsub 0, // GPR32sponly:dsub3_then_hsub 0, // GPR32sponly:dsub3_then_ssub 0, // GPR32sponly:dsub2_then_bsub 0, // GPR32sponly:dsub2_then_hsub 0, // GPR32sponly:dsub2_then_ssub 0, // GPR32sponly:qsub1_then_bsub 0, // GPR32sponly:qsub1_then_dsub 0, // GPR32sponly:qsub1_then_hsub 0, // GPR32sponly:qsub1_then_ssub 0, // GPR32sponly:qsub3_then_bsub 0, // GPR32sponly:qsub3_then_dsub 0, // GPR32sponly:qsub3_then_hsub 0, // GPR32sponly:qsub3_then_ssub 0, // GPR32sponly:qsub2_then_bsub 0, // GPR32sponly:qsub2_then_dsub 0, // GPR32sponly:qsub2_then_hsub 0, // GPR32sponly:qsub2_then_ssub 0, // GPR32sponly:x8sub_7_then_sub_32 0, // GPR32sponly:x8sub_6_then_sub_32 0, // GPR32sponly:x8sub_5_then_sub_32 0, // GPR32sponly:x8sub_4_then_sub_32 0, // GPR32sponly:x8sub_3_then_sub_32 0, // GPR32sponly:x8sub_2_then_sub_32 0, // GPR32sponly:x8sub_1_then_sub_32 0, // GPR32sponly:subo64_then_sub_32 0, // GPR32sponly:zsub1_then_bsub 0, // GPR32sponly:zsub1_then_dsub 0, // GPR32sponly:zsub1_then_hsub 0, // GPR32sponly:zsub1_then_ssub 0, // GPR32sponly:zsub1_then_zsub 0, // GPR32sponly:zsub1_then_zsub_hi 0, // GPR32sponly:zsub3_then_bsub 0, // GPR32sponly:zsub3_then_dsub 0, // GPR32sponly:zsub3_then_hsub 0, // GPR32sponly:zsub3_then_ssub 0, // GPR32sponly:zsub3_then_zsub 0, // GPR32sponly:zsub3_then_zsub_hi 0, // GPR32sponly:zsub2_then_bsub 0, // GPR32sponly:zsub2_then_dsub 0, // GPR32sponly:zsub2_then_hsub 0, // GPR32sponly:zsub2_then_ssub 0, // GPR32sponly:zsub2_then_zsub 0, // GPR32sponly:zsub2_then_zsub_hi 0, // GPR32sponly:dsub0_dsub1 0, // GPR32sponly:dsub0_dsub1_dsub2 0, // GPR32sponly:dsub1_dsub2 0, // GPR32sponly:dsub1_dsub2_dsub3 0, // GPR32sponly:dsub2_dsub3 0, // GPR32sponly:dsub_qsub1_then_dsub 0, // GPR32sponly:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR32sponly:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR32sponly:qsub0_qsub1 0, // GPR32sponly:qsub0_qsub1_qsub2 0, // GPR32sponly:qsub1_qsub2 0, // GPR32sponly:qsub1_qsub2_qsub3 0, // GPR32sponly:qsub2_qsub3 0, // GPR32sponly:qsub1_then_dsub_qsub2_then_dsub 0, // GPR32sponly:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR32sponly:qsub2_then_dsub_qsub3_then_dsub 0, // GPR32sponly:sub_32_x8sub_1_then_sub_32 0, // GPR32sponly:x8sub_0_x8sub_1 0, // GPR32sponly:x8sub_2_x8sub_3 0, // GPR32sponly:x8sub_4_x8sub_5 0, // GPR32sponly:x8sub_6_x8sub_7 0, // GPR32sponly:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // GPR32sponly:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // GPR32sponly:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // GPR32sponly:sub_32_subo64_then_sub_32 0, // GPR32sponly:dsub_zsub1_then_dsub 0, // GPR32sponly:zsub_zsub1_then_zsub 0, // GPR32sponly:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR32sponly:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR32sponly:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR32sponly:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR32sponly:zsub0_zsub1 0, // GPR32sponly:zsub0_zsub1_zsub2 0, // GPR32sponly:zsub1_zsub2 0, // GPR32sponly:zsub1_zsub2_zsub3 0, // GPR32sponly:zsub2_zsub3 0, // GPR32sponly:zsub1_then_dsub_zsub2_then_dsub 0, // GPR32sponly:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR32sponly:zsub1_then_zsub_zsub2_then_zsub 0, // GPR32sponly:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR32sponly:zsub2_then_dsub_zsub3_then_dsub 0, // GPR32sponly:zsub2_then_zsub_zsub3_then_zsub 0, // GPR32sponly:zsub0_zsub2 0, // GPR32sponly:zsub1_zsub3 }, { // WSeqPairsClass 0, // WSeqPairsClass:bsub 0, // WSeqPairsClass:dsub 0, // WSeqPairsClass:dsub0 0, // WSeqPairsClass:dsub1 0, // WSeqPairsClass:dsub2 0, // WSeqPairsClass:dsub3 0, // WSeqPairsClass:hsub 0, // WSeqPairsClass:psub0 0, // WSeqPairsClass:psub1 0, // WSeqPairsClass:qsub0 0, // WSeqPairsClass:qsub1 0, // WSeqPairsClass:qsub2 0, // WSeqPairsClass:qsub3 0, // WSeqPairsClass:ssub 0, // WSeqPairsClass:sub_32 23, // WSeqPairsClass:sube32 -> GPR32common 0, // WSeqPairsClass:sube64 21, // WSeqPairsClass:subo32 -> GPR32 0, // WSeqPairsClass:subo64 0, // WSeqPairsClass:x8sub_0 0, // WSeqPairsClass:x8sub_1 0, // WSeqPairsClass:x8sub_2 0, // WSeqPairsClass:x8sub_3 0, // WSeqPairsClass:x8sub_4 0, // WSeqPairsClass:x8sub_5 0, // WSeqPairsClass:x8sub_6 0, // WSeqPairsClass:x8sub_7 0, // WSeqPairsClass:zasubb 0, // WSeqPairsClass:zasubd0 0, // WSeqPairsClass:zasubd1 0, // WSeqPairsClass:zasubh0 0, // WSeqPairsClass:zasubh1 0, // WSeqPairsClass:zasubq0 0, // WSeqPairsClass:zasubq1 0, // WSeqPairsClass:zasubs0 0, // WSeqPairsClass:zasubs1 0, // WSeqPairsClass:zsub 0, // WSeqPairsClass:zsub0 0, // WSeqPairsClass:zsub1 0, // WSeqPairsClass:zsub2 0, // WSeqPairsClass:zsub3 0, // WSeqPairsClass:zsub_hi 0, // WSeqPairsClass:zasubd1_then_zasubq0 0, // WSeqPairsClass:zasubd1_then_zasubq1 0, // WSeqPairsClass:zasubs1_then_zasubd0 0, // WSeqPairsClass:zasubs1_then_zasubd1 0, // WSeqPairsClass:zasubs1_then_zasubq0 0, // WSeqPairsClass:zasubs1_then_zasubq1 0, // WSeqPairsClass:zasubs1_then_zasubd1_then_zasubq0 0, // WSeqPairsClass:zasubs1_then_zasubd1_then_zasubq1 0, // WSeqPairsClass:zasubh1_then_zasubd0 0, // WSeqPairsClass:zasubh1_then_zasubd1 0, // WSeqPairsClass:zasubh1_then_zasubq0 0, // WSeqPairsClass:zasubh1_then_zasubq1 0, // WSeqPairsClass:zasubh1_then_zasubs0 0, // WSeqPairsClass:zasubh1_then_zasubs1 0, // WSeqPairsClass:zasubh1_then_zasubd1_then_zasubq0 0, // WSeqPairsClass:zasubh1_then_zasubd1_then_zasubq1 0, // WSeqPairsClass:zasubh1_then_zasubs1_then_zasubd0 0, // WSeqPairsClass:zasubh1_then_zasubs1_then_zasubd1 0, // WSeqPairsClass:zasubh1_then_zasubs1_then_zasubq0 0, // WSeqPairsClass:zasubh1_then_zasubs1_then_zasubq1 0, // WSeqPairsClass:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // WSeqPairsClass:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // WSeqPairsClass:dsub1_then_bsub 0, // WSeqPairsClass:dsub1_then_hsub 0, // WSeqPairsClass:dsub1_then_ssub 0, // WSeqPairsClass:dsub3_then_bsub 0, // WSeqPairsClass:dsub3_then_hsub 0, // WSeqPairsClass:dsub3_then_ssub 0, // WSeqPairsClass:dsub2_then_bsub 0, // WSeqPairsClass:dsub2_then_hsub 0, // WSeqPairsClass:dsub2_then_ssub 0, // WSeqPairsClass:qsub1_then_bsub 0, // WSeqPairsClass:qsub1_then_dsub 0, // WSeqPairsClass:qsub1_then_hsub 0, // WSeqPairsClass:qsub1_then_ssub 0, // WSeqPairsClass:qsub3_then_bsub 0, // WSeqPairsClass:qsub3_then_dsub 0, // WSeqPairsClass:qsub3_then_hsub 0, // WSeqPairsClass:qsub3_then_ssub 0, // WSeqPairsClass:qsub2_then_bsub 0, // WSeqPairsClass:qsub2_then_dsub 0, // WSeqPairsClass:qsub2_then_hsub 0, // WSeqPairsClass:qsub2_then_ssub 0, // WSeqPairsClass:x8sub_7_then_sub_32 0, // WSeqPairsClass:x8sub_6_then_sub_32 0, // WSeqPairsClass:x8sub_5_then_sub_32 0, // WSeqPairsClass:x8sub_4_then_sub_32 0, // WSeqPairsClass:x8sub_3_then_sub_32 0, // WSeqPairsClass:x8sub_2_then_sub_32 0, // WSeqPairsClass:x8sub_1_then_sub_32 0, // WSeqPairsClass:subo64_then_sub_32 0, // WSeqPairsClass:zsub1_then_bsub 0, // WSeqPairsClass:zsub1_then_dsub 0, // WSeqPairsClass:zsub1_then_hsub 0, // WSeqPairsClass:zsub1_then_ssub 0, // WSeqPairsClass:zsub1_then_zsub 0, // WSeqPairsClass:zsub1_then_zsub_hi 0, // WSeqPairsClass:zsub3_then_bsub 0, // WSeqPairsClass:zsub3_then_dsub 0, // WSeqPairsClass:zsub3_then_hsub 0, // WSeqPairsClass:zsub3_then_ssub 0, // WSeqPairsClass:zsub3_then_zsub 0, // WSeqPairsClass:zsub3_then_zsub_hi 0, // WSeqPairsClass:zsub2_then_bsub 0, // WSeqPairsClass:zsub2_then_dsub 0, // WSeqPairsClass:zsub2_then_hsub 0, // WSeqPairsClass:zsub2_then_ssub 0, // WSeqPairsClass:zsub2_then_zsub 0, // WSeqPairsClass:zsub2_then_zsub_hi 0, // WSeqPairsClass:dsub0_dsub1 0, // WSeqPairsClass:dsub0_dsub1_dsub2 0, // WSeqPairsClass:dsub1_dsub2 0, // WSeqPairsClass:dsub1_dsub2_dsub3 0, // WSeqPairsClass:dsub2_dsub3 0, // WSeqPairsClass:dsub_qsub1_then_dsub 0, // WSeqPairsClass:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // WSeqPairsClass:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // WSeqPairsClass:qsub0_qsub1 0, // WSeqPairsClass:qsub0_qsub1_qsub2 0, // WSeqPairsClass:qsub1_qsub2 0, // WSeqPairsClass:qsub1_qsub2_qsub3 0, // WSeqPairsClass:qsub2_qsub3 0, // WSeqPairsClass:qsub1_then_dsub_qsub2_then_dsub 0, // WSeqPairsClass:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // WSeqPairsClass:qsub2_then_dsub_qsub3_then_dsub 0, // WSeqPairsClass:sub_32_x8sub_1_then_sub_32 0, // WSeqPairsClass:x8sub_0_x8sub_1 0, // WSeqPairsClass:x8sub_2_x8sub_3 0, // WSeqPairsClass:x8sub_4_x8sub_5 0, // WSeqPairsClass:x8sub_6_x8sub_7 0, // WSeqPairsClass:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // WSeqPairsClass:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // WSeqPairsClass:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // WSeqPairsClass:sub_32_subo64_then_sub_32 0, // WSeqPairsClass:dsub_zsub1_then_dsub 0, // WSeqPairsClass:zsub_zsub1_then_zsub 0, // WSeqPairsClass:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // WSeqPairsClass:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // WSeqPairsClass:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // WSeqPairsClass:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // WSeqPairsClass:zsub0_zsub1 0, // WSeqPairsClass:zsub0_zsub1_zsub2 0, // WSeqPairsClass:zsub1_zsub2 0, // WSeqPairsClass:zsub1_zsub2_zsub3 0, // WSeqPairsClass:zsub2_zsub3 0, // WSeqPairsClass:zsub1_then_dsub_zsub2_then_dsub 0, // WSeqPairsClass:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // WSeqPairsClass:zsub1_then_zsub_zsub2_then_zsub 0, // WSeqPairsClass:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // WSeqPairsClass:zsub2_then_dsub_zsub3_then_dsub 0, // WSeqPairsClass:zsub2_then_zsub_zsub3_then_zsub 0, // WSeqPairsClass:zsub0_zsub2 0, // WSeqPairsClass:zsub1_zsub3 }, { // WSeqPairsClass_with_subo32_in_GPR32common 0, // WSeqPairsClass_with_subo32_in_GPR32common:bsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub0 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub1 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub2 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub3 0, // WSeqPairsClass_with_subo32_in_GPR32common:hsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:psub0 0, // WSeqPairsClass_with_subo32_in_GPR32common:psub1 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub0 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub1 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub2 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub3 0, // WSeqPairsClass_with_subo32_in_GPR32common:ssub 0, // WSeqPairsClass_with_subo32_in_GPR32common:sub_32 23, // WSeqPairsClass_with_subo32_in_GPR32common:sube32 -> GPR32common 0, // WSeqPairsClass_with_subo32_in_GPR32common:sube64 23, // WSeqPairsClass_with_subo32_in_GPR32common:subo32 -> GPR32common 0, // WSeqPairsClass_with_subo32_in_GPR32common:subo64 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_0 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_1 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_2 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_3 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_4 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_5 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_6 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_7 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubb 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubd0 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubd1 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh0 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubq0 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubq1 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubs0 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubs1 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub0 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub1 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub2 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub3 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub_hi 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubd1_then_zasubq0 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubd1_then_zasubq1 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubs1_then_zasubd0 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubs1_then_zasubd1 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubs1_then_zasubq0 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubs1_then_zasubq1 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubs1_then_zasubd1_then_zasubq0 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubs1_then_zasubd1_then_zasubq1 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubd0 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubd1 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubq0 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubq1 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubs0 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubs1 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubd1_then_zasubq0 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubd1_then_zasubq1 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubs1_then_zasubd0 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubs1_then_zasubd1 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubs1_then_zasubq0 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubs1_then_zasubq1 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // WSeqPairsClass_with_subo32_in_GPR32common:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub1_then_bsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub1_then_hsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub1_then_ssub 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub3_then_bsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub3_then_hsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub3_then_ssub 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub2_then_bsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub2_then_hsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub2_then_ssub 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub1_then_bsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub1_then_dsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub1_then_hsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub1_then_ssub 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub3_then_bsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub3_then_dsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub3_then_hsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub3_then_ssub 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub2_then_bsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub2_then_dsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub2_then_hsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub2_then_ssub 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_7_then_sub_32 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_6_then_sub_32 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_5_then_sub_32 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_4_then_sub_32 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_3_then_sub_32 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_2_then_sub_32 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_1_then_sub_32 0, // WSeqPairsClass_with_subo32_in_GPR32common:subo64_then_sub_32 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub1_then_bsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub1_then_dsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub1_then_hsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub1_then_ssub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub1_then_zsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub1_then_zsub_hi 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub3_then_bsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub3_then_dsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub3_then_hsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub3_then_ssub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub3_then_zsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub3_then_zsub_hi 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub2_then_bsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub2_then_dsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub2_then_hsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub2_then_ssub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub2_then_zsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub2_then_zsub_hi 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub0_dsub1 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub0_dsub1_dsub2 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub1_dsub2 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub1_dsub2_dsub3 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub2_dsub3 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub_qsub1_then_dsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub0_qsub1 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub0_qsub1_qsub2 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub1_qsub2 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub1_qsub2_qsub3 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub2_qsub3 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub1_then_dsub_qsub2_then_dsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:qsub2_then_dsub_qsub3_then_dsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:sub_32_x8sub_1_then_sub_32 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_0_x8sub_1 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_2_x8sub_3 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_4_x8sub_5 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_6_x8sub_7 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // WSeqPairsClass_with_subo32_in_GPR32common:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // WSeqPairsClass_with_subo32_in_GPR32common:sub_32_subo64_then_sub_32 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub_zsub1_then_dsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub_zsub1_then_zsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub0_zsub1 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub0_zsub1_zsub2 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub1_zsub2 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub1_zsub2_zsub3 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub2_zsub3 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub1_then_dsub_zsub2_then_dsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub1_then_zsub_zsub2_then_zsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub2_then_dsub_zsub3_then_dsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub2_then_zsub_zsub3_then_zsub 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub0_zsub2 0, // WSeqPairsClass_with_subo32_in_GPR32common:zsub1_zsub3 }, { // WSeqPairsClass_with_sube32_in_GPR32arg 0, // WSeqPairsClass_with_sube32_in_GPR32arg:bsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub2 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub3 0, // WSeqPairsClass_with_sube32_in_GPR32arg:hsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:psub0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:psub1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub2 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub3 0, // WSeqPairsClass_with_sube32_in_GPR32arg:ssub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:sub_32 25, // WSeqPairsClass_with_sube32_in_GPR32arg:sube32 -> GPR32arg 0, // WSeqPairsClass_with_sube32_in_GPR32arg:sube64 25, // WSeqPairsClass_with_sube32_in_GPR32arg:subo32 -> GPR32arg 0, // WSeqPairsClass_with_sube32_in_GPR32arg:subo64 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_2 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_3 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_4 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_5 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_6 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_7 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubb 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubd0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubd1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubq0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubq1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubs0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubs1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub2 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub3 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub_hi 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubd1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubd1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubs1_then_zasubd0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubs1_then_zasubd1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubs1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubs1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubs1_then_zasubd1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubs1_then_zasubd1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubd0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubd1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubs0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubs1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubd1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubd1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub1_then_bsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub1_then_hsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub1_then_ssub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub3_then_bsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub3_then_hsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub3_then_ssub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub2_then_bsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub2_then_hsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub2_then_ssub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub1_then_bsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub1_then_dsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub1_then_hsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub1_then_ssub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub3_then_bsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub3_then_hsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub3_then_ssub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub2_then_bsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub2_then_dsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub2_then_hsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub2_then_ssub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_7_then_sub_32 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_6_then_sub_32 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_5_then_sub_32 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_4_then_sub_32 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_3_then_sub_32 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_2_then_sub_32 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_1_then_sub_32 0, // WSeqPairsClass_with_sube32_in_GPR32arg:subo64_then_sub_32 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub1_then_bsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub1_then_dsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub1_then_hsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub1_then_ssub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub1_then_zsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub1_then_zsub_hi 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub3_then_bsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub3_then_hsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub3_then_ssub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub3_then_zsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub3_then_zsub_hi 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub2_then_bsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub2_then_dsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub2_then_hsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub2_then_ssub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub2_then_zsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub2_then_zsub_hi 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub0_dsub1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub0_dsub1_dsub2 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub1_dsub2 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub1_dsub2_dsub3 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub2_dsub3 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub_qsub1_then_dsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub0_qsub1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub0_qsub1_qsub2 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub1_qsub2 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub1_qsub2_qsub3 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub2_qsub3 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub1_then_dsub_qsub2_then_dsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:qsub2_then_dsub_qsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:sub_32_x8sub_1_then_sub_32 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_0_x8sub_1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_2_x8sub_3 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_4_x8sub_5 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_6_x8sub_7 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // WSeqPairsClass_with_sube32_in_GPR32arg:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // WSeqPairsClass_with_sube32_in_GPR32arg:sub_32_subo64_then_sub_32 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub_zsub1_then_dsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub_zsub1_then_zsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub0_zsub1 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub0_zsub1_zsub2 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub1_zsub2 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub1_zsub2_zsub3 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub2_zsub3 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub1_then_dsub_zsub2_then_dsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub1_then_zsub_zsub2_then_zsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub2_then_dsub_zsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub2_then_zsub_zsub3_then_zsub 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub0_zsub2 0, // WSeqPairsClass_with_sube32_in_GPR32arg:zsub1_zsub3 }, { // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:psub0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:psub1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:sub_32 26, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:sube32 -> MatrixIndexGPR32_12_15 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:sube64 26, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:subo32 -> MatrixIndexGPR32_12_15 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:subo64 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_4 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_5 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_6 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_7 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubb 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubd0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubd1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubq0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubq1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubs0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubs1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub_hi 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub1_then_bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub1_then_hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub1_then_ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub3_then_bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub3_then_hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub3_then_ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub2_then_bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub2_then_hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub2_then_ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub1_then_bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub1_then_hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub1_then_ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub3_then_bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub3_then_hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub3_then_ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub2_then_bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub2_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub2_then_hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub2_then_ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_7_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_5_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_3_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_1_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:subo64_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub1_then_bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub1_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub1_then_hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub1_then_ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_hi 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub3_then_bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub3_then_hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub3_then_ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub3_then_zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub3_then_zsub_hi 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub2_then_bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub2_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub2_then_hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub2_then_ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub_hi 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub0_dsub1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub0_dsub1_dsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub1_dsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub1_dsub2_dsub3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub2_dsub3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub_qsub1_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub0_qsub1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub0_qsub1_qsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub1_qsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub1_qsub2_qsub3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub2_qsub3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub_qsub2_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:qsub2_then_dsub_qsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:sub_32_x8sub_1_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_0_x8sub_1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_2_x8sub_3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_4_x8sub_5 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_6_x8sub_7 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:sub_32_subo64_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub_zsub1_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub_zsub1_then_zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub0_zsub1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub0_zsub1_zsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub1_zsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub1_zsub2_zsub3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub2_zsub3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub1_then_dsub_zsub2_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_zsub2_then_zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub2_then_dsub_zsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub_zsub3_then_zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub0_zsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15:zsub1_zsub3 }, { // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:psub0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:psub1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:sub_32 27, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:sube32 -> MatrixIndexGPR32_8_11 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:sube64 27, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:subo32 -> MatrixIndexGPR32_8_11 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:subo64 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_4 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_5 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_6 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_7 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubb 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubd0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubd1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubq0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubq1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubs0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubs1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub_hi 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub1_then_bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub1_then_hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub1_then_ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub3_then_bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub3_then_hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub3_then_ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub2_then_bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub2_then_hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub2_then_ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub1_then_bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub1_then_hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub1_then_ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub3_then_bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub3_then_hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub3_then_ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub2_then_bsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub2_then_hsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub2_then_ssub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_qsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub_zsub3_then_dsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_zsub3_then_zsub 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 0, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 }, { // GPR64all 0, // GPR64all:bsub 0, // GPR64all:dsub 0, // GPR64all:dsub0 0, // GPR64all:dsub1 0, // GPR64all:dsub2 0, // GPR64all:dsub3 0, // GPR64all:hsub 0, // GPR64all:psub0 0, // GPR64all:psub1 0, // GPR64all:qsub0 0, // GPR64all:qsub1 0, // GPR64all:qsub2 0, // GPR64all:qsub3 0, // GPR64all:ssub 19, // GPR64all:sub_32 -> GPR32all 0, // GPR64all:sube32 0, // GPR64all:sube64 0, // GPR64all:subo32 0, // GPR64all:subo64 0, // GPR64all:x8sub_0 0, // GPR64all:x8sub_1 0, // GPR64all:x8sub_2 0, // GPR64all:x8sub_3 0, // GPR64all:x8sub_4 0, // GPR64all:x8sub_5 0, // GPR64all:x8sub_6 0, // GPR64all:x8sub_7 0, // GPR64all:zasubb 0, // GPR64all:zasubd0 0, // GPR64all:zasubd1 0, // GPR64all:zasubh0 0, // GPR64all:zasubh1 0, // GPR64all:zasubq0 0, // GPR64all:zasubq1 0, // GPR64all:zasubs0 0, // GPR64all:zasubs1 0, // GPR64all:zsub 0, // GPR64all:zsub0 0, // GPR64all:zsub1 0, // GPR64all:zsub2 0, // GPR64all:zsub3 0, // GPR64all:zsub_hi 0, // GPR64all:zasubd1_then_zasubq0 0, // GPR64all:zasubd1_then_zasubq1 0, // GPR64all:zasubs1_then_zasubd0 0, // GPR64all:zasubs1_then_zasubd1 0, // GPR64all:zasubs1_then_zasubq0 0, // GPR64all:zasubs1_then_zasubq1 0, // GPR64all:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64all:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64all:zasubh1_then_zasubd0 0, // GPR64all:zasubh1_then_zasubd1 0, // GPR64all:zasubh1_then_zasubq0 0, // GPR64all:zasubh1_then_zasubq1 0, // GPR64all:zasubh1_then_zasubs0 0, // GPR64all:zasubh1_then_zasubs1 0, // GPR64all:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64all:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64all:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64all:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64all:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64all:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64all:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64all:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64all:dsub1_then_bsub 0, // GPR64all:dsub1_then_hsub 0, // GPR64all:dsub1_then_ssub 0, // GPR64all:dsub3_then_bsub 0, // GPR64all:dsub3_then_hsub 0, // GPR64all:dsub3_then_ssub 0, // GPR64all:dsub2_then_bsub 0, // GPR64all:dsub2_then_hsub 0, // GPR64all:dsub2_then_ssub 0, // GPR64all:qsub1_then_bsub 0, // GPR64all:qsub1_then_dsub 0, // GPR64all:qsub1_then_hsub 0, // GPR64all:qsub1_then_ssub 0, // GPR64all:qsub3_then_bsub 0, // GPR64all:qsub3_then_dsub 0, // GPR64all:qsub3_then_hsub 0, // GPR64all:qsub3_then_ssub 0, // GPR64all:qsub2_then_bsub 0, // GPR64all:qsub2_then_dsub 0, // GPR64all:qsub2_then_hsub 0, // GPR64all:qsub2_then_ssub 0, // GPR64all:x8sub_7_then_sub_32 0, // GPR64all:x8sub_6_then_sub_32 0, // GPR64all:x8sub_5_then_sub_32 0, // GPR64all:x8sub_4_then_sub_32 0, // GPR64all:x8sub_3_then_sub_32 0, // GPR64all:x8sub_2_then_sub_32 0, // GPR64all:x8sub_1_then_sub_32 0, // GPR64all:subo64_then_sub_32 0, // GPR64all:zsub1_then_bsub 0, // GPR64all:zsub1_then_dsub 0, // GPR64all:zsub1_then_hsub 0, // GPR64all:zsub1_then_ssub 0, // GPR64all:zsub1_then_zsub 0, // GPR64all:zsub1_then_zsub_hi 0, // GPR64all:zsub3_then_bsub 0, // GPR64all:zsub3_then_dsub 0, // GPR64all:zsub3_then_hsub 0, // GPR64all:zsub3_then_ssub 0, // GPR64all:zsub3_then_zsub 0, // GPR64all:zsub3_then_zsub_hi 0, // GPR64all:zsub2_then_bsub 0, // GPR64all:zsub2_then_dsub 0, // GPR64all:zsub2_then_hsub 0, // GPR64all:zsub2_then_ssub 0, // GPR64all:zsub2_then_zsub 0, // GPR64all:zsub2_then_zsub_hi 0, // GPR64all:dsub0_dsub1 0, // GPR64all:dsub0_dsub1_dsub2 0, // GPR64all:dsub1_dsub2 0, // GPR64all:dsub1_dsub2_dsub3 0, // GPR64all:dsub2_dsub3 0, // GPR64all:dsub_qsub1_then_dsub 0, // GPR64all:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64all:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64all:qsub0_qsub1 0, // GPR64all:qsub0_qsub1_qsub2 0, // GPR64all:qsub1_qsub2 0, // GPR64all:qsub1_qsub2_qsub3 0, // GPR64all:qsub2_qsub3 0, // GPR64all:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64all:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64all:qsub2_then_dsub_qsub3_then_dsub 0, // GPR64all:sub_32_x8sub_1_then_sub_32 0, // GPR64all:x8sub_0_x8sub_1 0, // GPR64all:x8sub_2_x8sub_3 0, // GPR64all:x8sub_4_x8sub_5 0, // GPR64all:x8sub_6_x8sub_7 0, // GPR64all:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // GPR64all:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // GPR64all:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // GPR64all:sub_32_subo64_then_sub_32 0, // GPR64all:dsub_zsub1_then_dsub 0, // GPR64all:zsub_zsub1_then_zsub 0, // GPR64all:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64all:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64all:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64all:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64all:zsub0_zsub1 0, // GPR64all:zsub0_zsub1_zsub2 0, // GPR64all:zsub1_zsub2 0, // GPR64all:zsub1_zsub2_zsub3 0, // GPR64all:zsub2_zsub3 0, // GPR64all:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64all:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64all:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64all:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64all:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64all:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64all:zsub0_zsub2 0, // GPR64all:zsub1_zsub3 }, { // FPR64 1, // FPR64:bsub -> FPR8 0, // FPR64:dsub 0, // FPR64:dsub0 0, // FPR64:dsub1 0, // FPR64:dsub2 0, // FPR64:dsub3 2, // FPR64:hsub -> FPR16 0, // FPR64:psub0 0, // FPR64:psub1 0, // FPR64:qsub0 0, // FPR64:qsub1 0, // FPR64:qsub2 0, // FPR64:qsub3 20, // FPR64:ssub -> FPR32 0, // FPR64:sub_32 0, // FPR64:sube32 0, // FPR64:sube64 0, // FPR64:subo32 0, // FPR64:subo64 0, // FPR64:x8sub_0 0, // FPR64:x8sub_1 0, // FPR64:x8sub_2 0, // FPR64:x8sub_3 0, // FPR64:x8sub_4 0, // FPR64:x8sub_5 0, // FPR64:x8sub_6 0, // FPR64:x8sub_7 0, // FPR64:zasubb 0, // FPR64:zasubd0 0, // FPR64:zasubd1 0, // FPR64:zasubh0 0, // FPR64:zasubh1 0, // FPR64:zasubq0 0, // FPR64:zasubq1 0, // FPR64:zasubs0 0, // FPR64:zasubs1 0, // FPR64:zsub 0, // FPR64:zsub0 0, // FPR64:zsub1 0, // FPR64:zsub2 0, // FPR64:zsub3 0, // FPR64:zsub_hi 0, // FPR64:zasubd1_then_zasubq0 0, // FPR64:zasubd1_then_zasubq1 0, // FPR64:zasubs1_then_zasubd0 0, // FPR64:zasubs1_then_zasubd1 0, // FPR64:zasubs1_then_zasubq0 0, // FPR64:zasubs1_then_zasubq1 0, // FPR64:zasubs1_then_zasubd1_then_zasubq0 0, // FPR64:zasubs1_then_zasubd1_then_zasubq1 0, // FPR64:zasubh1_then_zasubd0 0, // FPR64:zasubh1_then_zasubd1 0, // FPR64:zasubh1_then_zasubq0 0, // FPR64:zasubh1_then_zasubq1 0, // FPR64:zasubh1_then_zasubs0 0, // FPR64:zasubh1_then_zasubs1 0, // FPR64:zasubh1_then_zasubd1_then_zasubq0 0, // FPR64:zasubh1_then_zasubd1_then_zasubq1 0, // FPR64:zasubh1_then_zasubs1_then_zasubd0 0, // FPR64:zasubh1_then_zasubs1_then_zasubd1 0, // FPR64:zasubh1_then_zasubs1_then_zasubq0 0, // FPR64:zasubh1_then_zasubs1_then_zasubq1 0, // FPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // FPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // FPR64:dsub1_then_bsub 0, // FPR64:dsub1_then_hsub 0, // FPR64:dsub1_then_ssub 0, // FPR64:dsub3_then_bsub 0, // FPR64:dsub3_then_hsub 0, // FPR64:dsub3_then_ssub 0, // FPR64:dsub2_then_bsub 0, // FPR64:dsub2_then_hsub 0, // FPR64:dsub2_then_ssub 0, // FPR64:qsub1_then_bsub 0, // FPR64:qsub1_then_dsub 0, // FPR64:qsub1_then_hsub 0, // FPR64:qsub1_then_ssub 0, // FPR64:qsub3_then_bsub 0, // FPR64:qsub3_then_dsub 0, // FPR64:qsub3_then_hsub 0, // FPR64:qsub3_then_ssub 0, // FPR64:qsub2_then_bsub 0, // FPR64:qsub2_then_dsub 0, // FPR64:qsub2_then_hsub 0, // FPR64:qsub2_then_ssub 0, // FPR64:x8sub_7_then_sub_32 0, // FPR64:x8sub_6_then_sub_32 0, // FPR64:x8sub_5_then_sub_32 0, // FPR64:x8sub_4_then_sub_32 0, // FPR64:x8sub_3_then_sub_32 0, // FPR64:x8sub_2_then_sub_32 0, // FPR64:x8sub_1_then_sub_32 0, // FPR64:subo64_then_sub_32 0, // FPR64:zsub1_then_bsub 0, // FPR64:zsub1_then_dsub 0, // FPR64:zsub1_then_hsub 0, // FPR64:zsub1_then_ssub 0, // FPR64:zsub1_then_zsub 0, // FPR64:zsub1_then_zsub_hi 0, // FPR64:zsub3_then_bsub 0, // FPR64:zsub3_then_dsub 0, // FPR64:zsub3_then_hsub 0, // FPR64:zsub3_then_ssub 0, // FPR64:zsub3_then_zsub 0, // FPR64:zsub3_then_zsub_hi 0, // FPR64:zsub2_then_bsub 0, // FPR64:zsub2_then_dsub 0, // FPR64:zsub2_then_hsub 0, // FPR64:zsub2_then_ssub 0, // FPR64:zsub2_then_zsub 0, // FPR64:zsub2_then_zsub_hi 0, // FPR64:dsub0_dsub1 0, // FPR64:dsub0_dsub1_dsub2 0, // FPR64:dsub1_dsub2 0, // FPR64:dsub1_dsub2_dsub3 0, // FPR64:dsub2_dsub3 0, // FPR64:dsub_qsub1_then_dsub 0, // FPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // FPR64:qsub0_qsub1 0, // FPR64:qsub0_qsub1_qsub2 0, // FPR64:qsub1_qsub2 0, // FPR64:qsub1_qsub2_qsub3 0, // FPR64:qsub2_qsub3 0, // FPR64:qsub1_then_dsub_qsub2_then_dsub 0, // FPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FPR64:qsub2_then_dsub_qsub3_then_dsub 0, // FPR64:sub_32_x8sub_1_then_sub_32 0, // FPR64:x8sub_0_x8sub_1 0, // FPR64:x8sub_2_x8sub_3 0, // FPR64:x8sub_4_x8sub_5 0, // FPR64:x8sub_6_x8sub_7 0, // FPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // FPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // FPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // FPR64:sub_32_subo64_then_sub_32 0, // FPR64:dsub_zsub1_then_dsub 0, // FPR64:zsub_zsub1_then_zsub 0, // FPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // FPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // FPR64:zsub0_zsub1 0, // FPR64:zsub0_zsub1_zsub2 0, // FPR64:zsub1_zsub2 0, // FPR64:zsub1_zsub2_zsub3 0, // FPR64:zsub2_zsub3 0, // FPR64:zsub1_then_dsub_zsub2_then_dsub 0, // FPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FPR64:zsub1_then_zsub_zsub2_then_zsub 0, // FPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FPR64:zsub2_then_dsub_zsub3_then_dsub 0, // FPR64:zsub2_then_zsub_zsub3_then_zsub 0, // FPR64:zsub0_zsub2 0, // FPR64:zsub1_zsub3 }, { // GPR64 0, // GPR64:bsub 0, // GPR64:dsub 0, // GPR64:dsub0 0, // GPR64:dsub1 0, // GPR64:dsub2 0, // GPR64:dsub3 0, // GPR64:hsub 0, // GPR64:psub0 0, // GPR64:psub1 0, // GPR64:qsub0 0, // GPR64:qsub1 0, // GPR64:qsub2 0, // GPR64:qsub3 0, // GPR64:ssub 21, // GPR64:sub_32 -> GPR32 0, // GPR64:sube32 0, // GPR64:sube64 0, // GPR64:subo32 0, // GPR64:subo64 0, // GPR64:x8sub_0 0, // GPR64:x8sub_1 0, // GPR64:x8sub_2 0, // GPR64:x8sub_3 0, // GPR64:x8sub_4 0, // GPR64:x8sub_5 0, // GPR64:x8sub_6 0, // GPR64:x8sub_7 0, // GPR64:zasubb 0, // GPR64:zasubd0 0, // GPR64:zasubd1 0, // GPR64:zasubh0 0, // GPR64:zasubh1 0, // GPR64:zasubq0 0, // GPR64:zasubq1 0, // GPR64:zasubs0 0, // GPR64:zasubs1 0, // GPR64:zsub 0, // GPR64:zsub0 0, // GPR64:zsub1 0, // GPR64:zsub2 0, // GPR64:zsub3 0, // GPR64:zsub_hi 0, // GPR64:zasubd1_then_zasubq0 0, // GPR64:zasubd1_then_zasubq1 0, // GPR64:zasubs1_then_zasubd0 0, // GPR64:zasubs1_then_zasubd1 0, // GPR64:zasubs1_then_zasubq0 0, // GPR64:zasubs1_then_zasubq1 0, // GPR64:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64:zasubh1_then_zasubd0 0, // GPR64:zasubh1_then_zasubd1 0, // GPR64:zasubh1_then_zasubq0 0, // GPR64:zasubh1_then_zasubq1 0, // GPR64:zasubh1_then_zasubs0 0, // GPR64:zasubh1_then_zasubs1 0, // GPR64:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64:dsub1_then_bsub 0, // GPR64:dsub1_then_hsub 0, // GPR64:dsub1_then_ssub 0, // GPR64:dsub3_then_bsub 0, // GPR64:dsub3_then_hsub 0, // GPR64:dsub3_then_ssub 0, // GPR64:dsub2_then_bsub 0, // GPR64:dsub2_then_hsub 0, // GPR64:dsub2_then_ssub 0, // GPR64:qsub1_then_bsub 0, // GPR64:qsub1_then_dsub 0, // GPR64:qsub1_then_hsub 0, // GPR64:qsub1_then_ssub 0, // GPR64:qsub3_then_bsub 0, // GPR64:qsub3_then_dsub 0, // GPR64:qsub3_then_hsub 0, // GPR64:qsub3_then_ssub 0, // GPR64:qsub2_then_bsub 0, // GPR64:qsub2_then_dsub 0, // GPR64:qsub2_then_hsub 0, // GPR64:qsub2_then_ssub 0, // GPR64:x8sub_7_then_sub_32 0, // GPR64:x8sub_6_then_sub_32 0, // GPR64:x8sub_5_then_sub_32 0, // GPR64:x8sub_4_then_sub_32 0, // GPR64:x8sub_3_then_sub_32 0, // GPR64:x8sub_2_then_sub_32 0, // GPR64:x8sub_1_then_sub_32 0, // GPR64:subo64_then_sub_32 0, // GPR64:zsub1_then_bsub 0, // GPR64:zsub1_then_dsub 0, // GPR64:zsub1_then_hsub 0, // GPR64:zsub1_then_ssub 0, // GPR64:zsub1_then_zsub 0, // GPR64:zsub1_then_zsub_hi 0, // GPR64:zsub3_then_bsub 0, // GPR64:zsub3_then_dsub 0, // GPR64:zsub3_then_hsub 0, // GPR64:zsub3_then_ssub 0, // GPR64:zsub3_then_zsub 0, // GPR64:zsub3_then_zsub_hi 0, // GPR64:zsub2_then_bsub 0, // GPR64:zsub2_then_dsub 0, // GPR64:zsub2_then_hsub 0, // GPR64:zsub2_then_ssub 0, // GPR64:zsub2_then_zsub 0, // GPR64:zsub2_then_zsub_hi 0, // GPR64:dsub0_dsub1 0, // GPR64:dsub0_dsub1_dsub2 0, // GPR64:dsub1_dsub2 0, // GPR64:dsub1_dsub2_dsub3 0, // GPR64:dsub2_dsub3 0, // GPR64:dsub_qsub1_then_dsub 0, // GPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64:qsub0_qsub1 0, // GPR64:qsub0_qsub1_qsub2 0, // GPR64:qsub1_qsub2 0, // GPR64:qsub1_qsub2_qsub3 0, // GPR64:qsub2_qsub3 0, // GPR64:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64:qsub2_then_dsub_qsub3_then_dsub 0, // GPR64:sub_32_x8sub_1_then_sub_32 0, // GPR64:x8sub_0_x8sub_1 0, // GPR64:x8sub_2_x8sub_3 0, // GPR64:x8sub_4_x8sub_5 0, // GPR64:x8sub_6_x8sub_7 0, // GPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // GPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // GPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // GPR64:sub_32_subo64_then_sub_32 0, // GPR64:dsub_zsub1_then_dsub 0, // GPR64:zsub_zsub1_then_zsub 0, // GPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64:zsub0_zsub1 0, // GPR64:zsub0_zsub1_zsub2 0, // GPR64:zsub1_zsub2 0, // GPR64:zsub1_zsub2_zsub3 0, // GPR64:zsub2_zsub3 0, // GPR64:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64:zsub0_zsub2 0, // GPR64:zsub1_zsub3 }, { // GPR64sp 0, // GPR64sp:bsub 0, // GPR64sp:dsub 0, // GPR64sp:dsub0 0, // GPR64sp:dsub1 0, // GPR64sp:dsub2 0, // GPR64sp:dsub3 0, // GPR64sp:hsub 0, // GPR64sp:psub0 0, // GPR64sp:psub1 0, // GPR64sp:qsub0 0, // GPR64sp:qsub1 0, // GPR64sp:qsub2 0, // GPR64sp:qsub3 0, // GPR64sp:ssub 22, // GPR64sp:sub_32 -> GPR32sp 0, // GPR64sp:sube32 0, // GPR64sp:sube64 0, // GPR64sp:subo32 0, // GPR64sp:subo64 0, // GPR64sp:x8sub_0 0, // GPR64sp:x8sub_1 0, // GPR64sp:x8sub_2 0, // GPR64sp:x8sub_3 0, // GPR64sp:x8sub_4 0, // GPR64sp:x8sub_5 0, // GPR64sp:x8sub_6 0, // GPR64sp:x8sub_7 0, // GPR64sp:zasubb 0, // GPR64sp:zasubd0 0, // GPR64sp:zasubd1 0, // GPR64sp:zasubh0 0, // GPR64sp:zasubh1 0, // GPR64sp:zasubq0 0, // GPR64sp:zasubq1 0, // GPR64sp:zasubs0 0, // GPR64sp:zasubs1 0, // GPR64sp:zsub 0, // GPR64sp:zsub0 0, // GPR64sp:zsub1 0, // GPR64sp:zsub2 0, // GPR64sp:zsub3 0, // GPR64sp:zsub_hi 0, // GPR64sp:zasubd1_then_zasubq0 0, // GPR64sp:zasubd1_then_zasubq1 0, // GPR64sp:zasubs1_then_zasubd0 0, // GPR64sp:zasubs1_then_zasubd1 0, // GPR64sp:zasubs1_then_zasubq0 0, // GPR64sp:zasubs1_then_zasubq1 0, // GPR64sp:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64sp:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64sp:zasubh1_then_zasubd0 0, // GPR64sp:zasubh1_then_zasubd1 0, // GPR64sp:zasubh1_then_zasubq0 0, // GPR64sp:zasubh1_then_zasubq1 0, // GPR64sp:zasubh1_then_zasubs0 0, // GPR64sp:zasubh1_then_zasubs1 0, // GPR64sp:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64sp:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64sp:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64sp:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64sp:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64sp:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64sp:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64sp:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64sp:dsub1_then_bsub 0, // GPR64sp:dsub1_then_hsub 0, // GPR64sp:dsub1_then_ssub 0, // GPR64sp:dsub3_then_bsub 0, // GPR64sp:dsub3_then_hsub 0, // GPR64sp:dsub3_then_ssub 0, // GPR64sp:dsub2_then_bsub 0, // GPR64sp:dsub2_then_hsub 0, // GPR64sp:dsub2_then_ssub 0, // GPR64sp:qsub1_then_bsub 0, // GPR64sp:qsub1_then_dsub 0, // GPR64sp:qsub1_then_hsub 0, // GPR64sp:qsub1_then_ssub 0, // GPR64sp:qsub3_then_bsub 0, // GPR64sp:qsub3_then_dsub 0, // GPR64sp:qsub3_then_hsub 0, // GPR64sp:qsub3_then_ssub 0, // GPR64sp:qsub2_then_bsub 0, // GPR64sp:qsub2_then_dsub 0, // GPR64sp:qsub2_then_hsub 0, // GPR64sp:qsub2_then_ssub 0, // GPR64sp:x8sub_7_then_sub_32 0, // GPR64sp:x8sub_6_then_sub_32 0, // GPR64sp:x8sub_5_then_sub_32 0, // GPR64sp:x8sub_4_then_sub_32 0, // GPR64sp:x8sub_3_then_sub_32 0, // GPR64sp:x8sub_2_then_sub_32 0, // GPR64sp:x8sub_1_then_sub_32 0, // GPR64sp:subo64_then_sub_32 0, // GPR64sp:zsub1_then_bsub 0, // GPR64sp:zsub1_then_dsub 0, // GPR64sp:zsub1_then_hsub 0, // GPR64sp:zsub1_then_ssub 0, // GPR64sp:zsub1_then_zsub 0, // GPR64sp:zsub1_then_zsub_hi 0, // GPR64sp:zsub3_then_bsub 0, // GPR64sp:zsub3_then_dsub 0, // GPR64sp:zsub3_then_hsub 0, // GPR64sp:zsub3_then_ssub 0, // GPR64sp:zsub3_then_zsub 0, // GPR64sp:zsub3_then_zsub_hi 0, // GPR64sp:zsub2_then_bsub 0, // GPR64sp:zsub2_then_dsub 0, // GPR64sp:zsub2_then_hsub 0, // GPR64sp:zsub2_then_ssub 0, // GPR64sp:zsub2_then_zsub 0, // GPR64sp:zsub2_then_zsub_hi 0, // GPR64sp:dsub0_dsub1 0, // GPR64sp:dsub0_dsub1_dsub2 0, // GPR64sp:dsub1_dsub2 0, // GPR64sp:dsub1_dsub2_dsub3 0, // GPR64sp:dsub2_dsub3 0, // GPR64sp:dsub_qsub1_then_dsub 0, // GPR64sp:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64sp:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64sp:qsub0_qsub1 0, // GPR64sp:qsub0_qsub1_qsub2 0, // GPR64sp:qsub1_qsub2 0, // GPR64sp:qsub1_qsub2_qsub3 0, // GPR64sp:qsub2_qsub3 0, // GPR64sp:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64sp:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64sp:qsub2_then_dsub_qsub3_then_dsub 0, // GPR64sp:sub_32_x8sub_1_then_sub_32 0, // GPR64sp:x8sub_0_x8sub_1 0, // GPR64sp:x8sub_2_x8sub_3 0, // GPR64sp:x8sub_4_x8sub_5 0, // GPR64sp:x8sub_6_x8sub_7 0, // GPR64sp:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // GPR64sp:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // GPR64sp:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // GPR64sp:sub_32_subo64_then_sub_32 0, // GPR64sp:dsub_zsub1_then_dsub 0, // GPR64sp:zsub_zsub1_then_zsub 0, // GPR64sp:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64sp:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64sp:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64sp:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64sp:zsub0_zsub1 0, // GPR64sp:zsub0_zsub1_zsub2 0, // GPR64sp:zsub1_zsub2 0, // GPR64sp:zsub1_zsub2_zsub3 0, // GPR64sp:zsub2_zsub3 0, // GPR64sp:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64sp:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64sp:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64sp:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64sp:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64sp:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64sp:zsub0_zsub2 0, // GPR64sp:zsub1_zsub3 }, { // GPR64common 0, // GPR64common:bsub 0, // GPR64common:dsub 0, // GPR64common:dsub0 0, // GPR64common:dsub1 0, // GPR64common:dsub2 0, // GPR64common:dsub3 0, // GPR64common:hsub 0, // GPR64common:psub0 0, // GPR64common:psub1 0, // GPR64common:qsub0 0, // GPR64common:qsub1 0, // GPR64common:qsub2 0, // GPR64common:qsub3 0, // GPR64common:ssub 23, // GPR64common:sub_32 -> GPR32common 0, // GPR64common:sube32 0, // GPR64common:sube64 0, // GPR64common:subo32 0, // GPR64common:subo64 0, // GPR64common:x8sub_0 0, // GPR64common:x8sub_1 0, // GPR64common:x8sub_2 0, // GPR64common:x8sub_3 0, // GPR64common:x8sub_4 0, // GPR64common:x8sub_5 0, // GPR64common:x8sub_6 0, // GPR64common:x8sub_7 0, // GPR64common:zasubb 0, // GPR64common:zasubd0 0, // GPR64common:zasubd1 0, // GPR64common:zasubh0 0, // GPR64common:zasubh1 0, // GPR64common:zasubq0 0, // GPR64common:zasubq1 0, // GPR64common:zasubs0 0, // GPR64common:zasubs1 0, // GPR64common:zsub 0, // GPR64common:zsub0 0, // GPR64common:zsub1 0, // GPR64common:zsub2 0, // GPR64common:zsub3 0, // GPR64common:zsub_hi 0, // GPR64common:zasubd1_then_zasubq0 0, // GPR64common:zasubd1_then_zasubq1 0, // GPR64common:zasubs1_then_zasubd0 0, // GPR64common:zasubs1_then_zasubd1 0, // GPR64common:zasubs1_then_zasubq0 0, // GPR64common:zasubs1_then_zasubq1 0, // GPR64common:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64common:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64common:zasubh1_then_zasubd0 0, // GPR64common:zasubh1_then_zasubd1 0, // GPR64common:zasubh1_then_zasubq0 0, // GPR64common:zasubh1_then_zasubq1 0, // GPR64common:zasubh1_then_zasubs0 0, // GPR64common:zasubh1_then_zasubs1 0, // GPR64common:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64common:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64common:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64common:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64common:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64common:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64common:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64common:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64common:dsub1_then_bsub 0, // GPR64common:dsub1_then_hsub 0, // GPR64common:dsub1_then_ssub 0, // GPR64common:dsub3_then_bsub 0, // GPR64common:dsub3_then_hsub 0, // GPR64common:dsub3_then_ssub 0, // GPR64common:dsub2_then_bsub 0, // GPR64common:dsub2_then_hsub 0, // GPR64common:dsub2_then_ssub 0, // GPR64common:qsub1_then_bsub 0, // GPR64common:qsub1_then_dsub 0, // GPR64common:qsub1_then_hsub 0, // GPR64common:qsub1_then_ssub 0, // GPR64common:qsub3_then_bsub 0, // GPR64common:qsub3_then_dsub 0, // GPR64common:qsub3_then_hsub 0, // GPR64common:qsub3_then_ssub 0, // GPR64common:qsub2_then_bsub 0, // GPR64common:qsub2_then_dsub 0, // GPR64common:qsub2_then_hsub 0, // GPR64common:qsub2_then_ssub 0, // GPR64common:x8sub_7_then_sub_32 0, // GPR64common:x8sub_6_then_sub_32 0, // GPR64common:x8sub_5_then_sub_32 0, // GPR64common:x8sub_4_then_sub_32 0, // GPR64common:x8sub_3_then_sub_32 0, // GPR64common:x8sub_2_then_sub_32 0, // GPR64common:x8sub_1_then_sub_32 0, // GPR64common:subo64_then_sub_32 0, // GPR64common:zsub1_then_bsub 0, // GPR64common:zsub1_then_dsub 0, // GPR64common:zsub1_then_hsub 0, // GPR64common:zsub1_then_ssub 0, // GPR64common:zsub1_then_zsub 0, // GPR64common:zsub1_then_zsub_hi 0, // GPR64common:zsub3_then_bsub 0, // GPR64common:zsub3_then_dsub 0, // GPR64common:zsub3_then_hsub 0, // GPR64common:zsub3_then_ssub 0, // GPR64common:zsub3_then_zsub 0, // GPR64common:zsub3_then_zsub_hi 0, // GPR64common:zsub2_then_bsub 0, // GPR64common:zsub2_then_dsub 0, // GPR64common:zsub2_then_hsub 0, // GPR64common:zsub2_then_ssub 0, // GPR64common:zsub2_then_zsub 0, // GPR64common:zsub2_then_zsub_hi 0, // GPR64common:dsub0_dsub1 0, // GPR64common:dsub0_dsub1_dsub2 0, // GPR64common:dsub1_dsub2 0, // GPR64common:dsub1_dsub2_dsub3 0, // GPR64common:dsub2_dsub3 0, // GPR64common:dsub_qsub1_then_dsub 0, // GPR64common:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64common:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64common:qsub0_qsub1 0, // GPR64common:qsub0_qsub1_qsub2 0, // GPR64common:qsub1_qsub2 0, // GPR64common:qsub1_qsub2_qsub3 0, // GPR64common:qsub2_qsub3 0, // GPR64common:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64common:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64common:qsub2_then_dsub_qsub3_then_dsub 0, // GPR64common:sub_32_x8sub_1_then_sub_32 0, // GPR64common:x8sub_0_x8sub_1 0, // GPR64common:x8sub_2_x8sub_3 0, // GPR64common:x8sub_4_x8sub_5 0, // GPR64common:x8sub_6_x8sub_7 0, // GPR64common:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // GPR64common:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // GPR64common:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // GPR64common:sub_32_subo64_then_sub_32 0, // GPR64common:dsub_zsub1_then_dsub 0, // GPR64common:zsub_zsub1_then_zsub 0, // GPR64common:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64common:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64common:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64common:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64common:zsub0_zsub1 0, // GPR64common:zsub0_zsub1_zsub2 0, // GPR64common:zsub1_zsub2 0, // GPR64common:zsub1_zsub2_zsub3 0, // GPR64common:zsub2_zsub3 0, // GPR64common:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64common:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64common:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64common:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64common:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64common:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64common:zsub0_zsub2 0, // GPR64common:zsub1_zsub3 }, { // GPR64noip 0, // GPR64noip:bsub 0, // GPR64noip:dsub 0, // GPR64noip:dsub0 0, // GPR64noip:dsub1 0, // GPR64noip:dsub2 0, // GPR64noip:dsub3 0, // GPR64noip:hsub 0, // GPR64noip:psub0 0, // GPR64noip:psub1 0, // GPR64noip:qsub0 0, // GPR64noip:qsub1 0, // GPR64noip:qsub2 0, // GPR64noip:qsub3 0, // GPR64noip:ssub 21, // GPR64noip:sub_32 -> GPR32 0, // GPR64noip:sube32 0, // GPR64noip:sube64 0, // GPR64noip:subo32 0, // GPR64noip:subo64 0, // GPR64noip:x8sub_0 0, // GPR64noip:x8sub_1 0, // GPR64noip:x8sub_2 0, // GPR64noip:x8sub_3 0, // GPR64noip:x8sub_4 0, // GPR64noip:x8sub_5 0, // GPR64noip:x8sub_6 0, // GPR64noip:x8sub_7 0, // GPR64noip:zasubb 0, // GPR64noip:zasubd0 0, // GPR64noip:zasubd1 0, // GPR64noip:zasubh0 0, // GPR64noip:zasubh1 0, // GPR64noip:zasubq0 0, // GPR64noip:zasubq1 0, // GPR64noip:zasubs0 0, // GPR64noip:zasubs1 0, // GPR64noip:zsub 0, // GPR64noip:zsub0 0, // GPR64noip:zsub1 0, // GPR64noip:zsub2 0, // GPR64noip:zsub3 0, // GPR64noip:zsub_hi 0, // GPR64noip:zasubd1_then_zasubq0 0, // GPR64noip:zasubd1_then_zasubq1 0, // GPR64noip:zasubs1_then_zasubd0 0, // GPR64noip:zasubs1_then_zasubd1 0, // GPR64noip:zasubs1_then_zasubq0 0, // GPR64noip:zasubs1_then_zasubq1 0, // GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64noip:zasubh1_then_zasubd0 0, // GPR64noip:zasubh1_then_zasubd1 0, // GPR64noip:zasubh1_then_zasubq0 0, // GPR64noip:zasubh1_then_zasubq1 0, // GPR64noip:zasubh1_then_zasubs0 0, // GPR64noip:zasubh1_then_zasubs1 0, // GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64noip:dsub1_then_bsub 0, // GPR64noip:dsub1_then_hsub 0, // GPR64noip:dsub1_then_ssub 0, // GPR64noip:dsub3_then_bsub 0, // GPR64noip:dsub3_then_hsub 0, // GPR64noip:dsub3_then_ssub 0, // GPR64noip:dsub2_then_bsub 0, // GPR64noip:dsub2_then_hsub 0, // GPR64noip:dsub2_then_ssub 0, // GPR64noip:qsub1_then_bsub 0, // GPR64noip:qsub1_then_dsub 0, // GPR64noip:qsub1_then_hsub 0, // GPR64noip:qsub1_then_ssub 0, // GPR64noip:qsub3_then_bsub 0, // GPR64noip:qsub3_then_dsub 0, // GPR64noip:qsub3_then_hsub 0, // GPR64noip:qsub3_then_ssub 0, // GPR64noip:qsub2_then_bsub 0, // GPR64noip:qsub2_then_dsub 0, // GPR64noip:qsub2_then_hsub 0, // GPR64noip:qsub2_then_ssub 0, // GPR64noip:x8sub_7_then_sub_32 0, // GPR64noip:x8sub_6_then_sub_32 0, // GPR64noip:x8sub_5_then_sub_32 0, // GPR64noip:x8sub_4_then_sub_32 0, // GPR64noip:x8sub_3_then_sub_32 0, // GPR64noip:x8sub_2_then_sub_32 0, // GPR64noip:x8sub_1_then_sub_32 0, // GPR64noip:subo64_then_sub_32 0, // GPR64noip:zsub1_then_bsub 0, // GPR64noip:zsub1_then_dsub 0, // GPR64noip:zsub1_then_hsub 0, // GPR64noip:zsub1_then_ssub 0, // GPR64noip:zsub1_then_zsub 0, // GPR64noip:zsub1_then_zsub_hi 0, // GPR64noip:zsub3_then_bsub 0, // GPR64noip:zsub3_then_dsub 0, // GPR64noip:zsub3_then_hsub 0, // GPR64noip:zsub3_then_ssub 0, // GPR64noip:zsub3_then_zsub 0, // GPR64noip:zsub3_then_zsub_hi 0, // GPR64noip:zsub2_then_bsub 0, // GPR64noip:zsub2_then_dsub 0, // GPR64noip:zsub2_then_hsub 0, // GPR64noip:zsub2_then_ssub 0, // GPR64noip:zsub2_then_zsub 0, // GPR64noip:zsub2_then_zsub_hi 0, // GPR64noip:dsub0_dsub1 0, // GPR64noip:dsub0_dsub1_dsub2 0, // GPR64noip:dsub1_dsub2 0, // GPR64noip:dsub1_dsub2_dsub3 0, // GPR64noip:dsub2_dsub3 0, // GPR64noip:dsub_qsub1_then_dsub 0, // GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64noip:qsub0_qsub1 0, // GPR64noip:qsub0_qsub1_qsub2 0, // GPR64noip:qsub1_qsub2 0, // GPR64noip:qsub1_qsub2_qsub3 0, // GPR64noip:qsub2_qsub3 0, // GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64noip:qsub2_then_dsub_qsub3_then_dsub 0, // GPR64noip:sub_32_x8sub_1_then_sub_32 0, // GPR64noip:x8sub_0_x8sub_1 0, // GPR64noip:x8sub_2_x8sub_3 0, // GPR64noip:x8sub_4_x8sub_5 0, // GPR64noip:x8sub_6_x8sub_7 0, // GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64noip:dsub_zsub1_then_dsub 0, // GPR64noip:zsub_zsub1_then_zsub 0, // GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64noip:zsub0_zsub1 0, // GPR64noip:zsub0_zsub1_zsub2 0, // GPR64noip:zsub1_zsub2 0, // GPR64noip:zsub1_zsub2_zsub3 0, // GPR64noip:zsub2_zsub3 0, // GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64noip:zsub0_zsub2 0, // GPR64noip:zsub1_zsub3 }, { // GPR64common_and_GPR64noip 0, // GPR64common_and_GPR64noip:bsub 0, // GPR64common_and_GPR64noip:dsub 0, // GPR64common_and_GPR64noip:dsub0 0, // GPR64common_and_GPR64noip:dsub1 0, // GPR64common_and_GPR64noip:dsub2 0, // GPR64common_and_GPR64noip:dsub3 0, // GPR64common_and_GPR64noip:hsub 0, // GPR64common_and_GPR64noip:psub0 0, // GPR64common_and_GPR64noip:psub1 0, // GPR64common_and_GPR64noip:qsub0 0, // GPR64common_and_GPR64noip:qsub1 0, // GPR64common_and_GPR64noip:qsub2 0, // GPR64common_and_GPR64noip:qsub3 0, // GPR64common_and_GPR64noip:ssub 23, // GPR64common_and_GPR64noip:sub_32 -> GPR32common 0, // GPR64common_and_GPR64noip:sube32 0, // GPR64common_and_GPR64noip:sube64 0, // GPR64common_and_GPR64noip:subo32 0, // GPR64common_and_GPR64noip:subo64 0, // GPR64common_and_GPR64noip:x8sub_0 0, // GPR64common_and_GPR64noip:x8sub_1 0, // GPR64common_and_GPR64noip:x8sub_2 0, // GPR64common_and_GPR64noip:x8sub_3 0, // GPR64common_and_GPR64noip:x8sub_4 0, // GPR64common_and_GPR64noip:x8sub_5 0, // GPR64common_and_GPR64noip:x8sub_6 0, // GPR64common_and_GPR64noip:x8sub_7 0, // GPR64common_and_GPR64noip:zasubb 0, // GPR64common_and_GPR64noip:zasubd0 0, // GPR64common_and_GPR64noip:zasubd1 0, // GPR64common_and_GPR64noip:zasubh0 0, // GPR64common_and_GPR64noip:zasubh1 0, // GPR64common_and_GPR64noip:zasubq0 0, // GPR64common_and_GPR64noip:zasubq1 0, // GPR64common_and_GPR64noip:zasubs0 0, // GPR64common_and_GPR64noip:zasubs1 0, // GPR64common_and_GPR64noip:zsub 0, // GPR64common_and_GPR64noip:zsub0 0, // GPR64common_and_GPR64noip:zsub1 0, // GPR64common_and_GPR64noip:zsub2 0, // GPR64common_and_GPR64noip:zsub3 0, // GPR64common_and_GPR64noip:zsub_hi 0, // GPR64common_and_GPR64noip:zasubd1_then_zasubq0 0, // GPR64common_and_GPR64noip:zasubd1_then_zasubq1 0, // GPR64common_and_GPR64noip:zasubs1_then_zasubd0 0, // GPR64common_and_GPR64noip:zasubs1_then_zasubd1 0, // GPR64common_and_GPR64noip:zasubs1_then_zasubq0 0, // GPR64common_and_GPR64noip:zasubs1_then_zasubq1 0, // GPR64common_and_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64common_and_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubd0 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubd1 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubq0 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubq1 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubs0 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubs1 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64common_and_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64common_and_GPR64noip:dsub1_then_bsub 0, // GPR64common_and_GPR64noip:dsub1_then_hsub 0, // GPR64common_and_GPR64noip:dsub1_then_ssub 0, // GPR64common_and_GPR64noip:dsub3_then_bsub 0, // GPR64common_and_GPR64noip:dsub3_then_hsub 0, // GPR64common_and_GPR64noip:dsub3_then_ssub 0, // GPR64common_and_GPR64noip:dsub2_then_bsub 0, // GPR64common_and_GPR64noip:dsub2_then_hsub 0, // GPR64common_and_GPR64noip:dsub2_then_ssub 0, // GPR64common_and_GPR64noip:qsub1_then_bsub 0, // GPR64common_and_GPR64noip:qsub1_then_dsub 0, // GPR64common_and_GPR64noip:qsub1_then_hsub 0, // GPR64common_and_GPR64noip:qsub1_then_ssub 0, // GPR64common_and_GPR64noip:qsub3_then_bsub 0, // GPR64common_and_GPR64noip:qsub3_then_dsub 0, // GPR64common_and_GPR64noip:qsub3_then_hsub 0, // GPR64common_and_GPR64noip:qsub3_then_ssub 0, // GPR64common_and_GPR64noip:qsub2_then_bsub 0, // GPR64common_and_GPR64noip:qsub2_then_dsub 0, // GPR64common_and_GPR64noip:qsub2_then_hsub 0, // GPR64common_and_GPR64noip:qsub2_then_ssub 0, // GPR64common_and_GPR64noip:x8sub_7_then_sub_32 0, // GPR64common_and_GPR64noip:x8sub_6_then_sub_32 0, // GPR64common_and_GPR64noip:x8sub_5_then_sub_32 0, // GPR64common_and_GPR64noip:x8sub_4_then_sub_32 0, // GPR64common_and_GPR64noip:x8sub_3_then_sub_32 0, // GPR64common_and_GPR64noip:x8sub_2_then_sub_32 0, // GPR64common_and_GPR64noip:x8sub_1_then_sub_32 0, // GPR64common_and_GPR64noip:subo64_then_sub_32 0, // GPR64common_and_GPR64noip:zsub1_then_bsub 0, // GPR64common_and_GPR64noip:zsub1_then_dsub 0, // GPR64common_and_GPR64noip:zsub1_then_hsub 0, // GPR64common_and_GPR64noip:zsub1_then_ssub 0, // GPR64common_and_GPR64noip:zsub1_then_zsub 0, // GPR64common_and_GPR64noip:zsub1_then_zsub_hi 0, // GPR64common_and_GPR64noip:zsub3_then_bsub 0, // GPR64common_and_GPR64noip:zsub3_then_dsub 0, // GPR64common_and_GPR64noip:zsub3_then_hsub 0, // GPR64common_and_GPR64noip:zsub3_then_ssub 0, // GPR64common_and_GPR64noip:zsub3_then_zsub 0, // GPR64common_and_GPR64noip:zsub3_then_zsub_hi 0, // GPR64common_and_GPR64noip:zsub2_then_bsub 0, // GPR64common_and_GPR64noip:zsub2_then_dsub 0, // GPR64common_and_GPR64noip:zsub2_then_hsub 0, // GPR64common_and_GPR64noip:zsub2_then_ssub 0, // GPR64common_and_GPR64noip:zsub2_then_zsub 0, // GPR64common_and_GPR64noip:zsub2_then_zsub_hi 0, // GPR64common_and_GPR64noip:dsub0_dsub1 0, // GPR64common_and_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64common_and_GPR64noip:dsub1_dsub2 0, // GPR64common_and_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64common_and_GPR64noip:dsub2_dsub3 0, // GPR64common_and_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64common_and_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64common_and_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64common_and_GPR64noip:qsub0_qsub1 0, // GPR64common_and_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64common_and_GPR64noip:qsub1_qsub2 0, // GPR64common_and_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64common_and_GPR64noip:qsub2_qsub3 0, // GPR64common_and_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64common_and_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64common_and_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 0, // GPR64common_and_GPR64noip:sub_32_x8sub_1_then_sub_32 0, // GPR64common_and_GPR64noip:x8sub_0_x8sub_1 0, // GPR64common_and_GPR64noip:x8sub_2_x8sub_3 0, // GPR64common_and_GPR64noip:x8sub_4_x8sub_5 0, // GPR64common_and_GPR64noip:x8sub_6_x8sub_7 0, // GPR64common_and_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // GPR64common_and_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // GPR64common_and_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // GPR64common_and_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64common_and_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64common_and_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64common_and_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64common_and_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64common_and_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64common_and_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64common_and_GPR64noip:zsub0_zsub1 0, // GPR64common_and_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64common_and_GPR64noip:zsub1_zsub2 0, // GPR64common_and_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64common_and_GPR64noip:zsub2_zsub3 0, // GPR64common_and_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64common_and_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64common_and_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64common_and_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64common_and_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64common_and_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64common_and_GPR64noip:zsub0_zsub2 0, // GPR64common_and_GPR64noip:zsub1_zsub3 }, { // tcGPR64 0, // tcGPR64:bsub 0, // tcGPR64:dsub 0, // tcGPR64:dsub0 0, // tcGPR64:dsub1 0, // tcGPR64:dsub2 0, // tcGPR64:dsub3 0, // tcGPR64:hsub 0, // tcGPR64:psub0 0, // tcGPR64:psub1 0, // tcGPR64:qsub0 0, // tcGPR64:qsub1 0, // tcGPR64:qsub2 0, // tcGPR64:qsub3 0, // tcGPR64:ssub 23, // tcGPR64:sub_32 -> GPR32common 0, // tcGPR64:sube32 0, // tcGPR64:sube64 0, // tcGPR64:subo32 0, // tcGPR64:subo64 0, // tcGPR64:x8sub_0 0, // tcGPR64:x8sub_1 0, // tcGPR64:x8sub_2 0, // tcGPR64:x8sub_3 0, // tcGPR64:x8sub_4 0, // tcGPR64:x8sub_5 0, // tcGPR64:x8sub_6 0, // tcGPR64:x8sub_7 0, // tcGPR64:zasubb 0, // tcGPR64:zasubd0 0, // tcGPR64:zasubd1 0, // tcGPR64:zasubh0 0, // tcGPR64:zasubh1 0, // tcGPR64:zasubq0 0, // tcGPR64:zasubq1 0, // tcGPR64:zasubs0 0, // tcGPR64:zasubs1 0, // tcGPR64:zsub 0, // tcGPR64:zsub0 0, // tcGPR64:zsub1 0, // tcGPR64:zsub2 0, // tcGPR64:zsub3 0, // tcGPR64:zsub_hi 0, // tcGPR64:zasubd1_then_zasubq0 0, // tcGPR64:zasubd1_then_zasubq1 0, // tcGPR64:zasubs1_then_zasubd0 0, // tcGPR64:zasubs1_then_zasubd1 0, // tcGPR64:zasubs1_then_zasubq0 0, // tcGPR64:zasubs1_then_zasubq1 0, // tcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // tcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // tcGPR64:zasubh1_then_zasubd0 0, // tcGPR64:zasubh1_then_zasubd1 0, // tcGPR64:zasubh1_then_zasubq0 0, // tcGPR64:zasubh1_then_zasubq1 0, // tcGPR64:zasubh1_then_zasubs0 0, // tcGPR64:zasubh1_then_zasubs1 0, // tcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // tcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // tcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // tcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // tcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // tcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // tcGPR64:dsub1_then_bsub 0, // tcGPR64:dsub1_then_hsub 0, // tcGPR64:dsub1_then_ssub 0, // tcGPR64:dsub3_then_bsub 0, // tcGPR64:dsub3_then_hsub 0, // tcGPR64:dsub3_then_ssub 0, // tcGPR64:dsub2_then_bsub 0, // tcGPR64:dsub2_then_hsub 0, // tcGPR64:dsub2_then_ssub 0, // tcGPR64:qsub1_then_bsub 0, // tcGPR64:qsub1_then_dsub 0, // tcGPR64:qsub1_then_hsub 0, // tcGPR64:qsub1_then_ssub 0, // tcGPR64:qsub3_then_bsub 0, // tcGPR64:qsub3_then_dsub 0, // tcGPR64:qsub3_then_hsub 0, // tcGPR64:qsub3_then_ssub 0, // tcGPR64:qsub2_then_bsub 0, // tcGPR64:qsub2_then_dsub 0, // tcGPR64:qsub2_then_hsub 0, // tcGPR64:qsub2_then_ssub 0, // tcGPR64:x8sub_7_then_sub_32 0, // tcGPR64:x8sub_6_then_sub_32 0, // tcGPR64:x8sub_5_then_sub_32 0, // tcGPR64:x8sub_4_then_sub_32 0, // tcGPR64:x8sub_3_then_sub_32 0, // tcGPR64:x8sub_2_then_sub_32 0, // tcGPR64:x8sub_1_then_sub_32 0, // tcGPR64:subo64_then_sub_32 0, // tcGPR64:zsub1_then_bsub 0, // tcGPR64:zsub1_then_dsub 0, // tcGPR64:zsub1_then_hsub 0, // tcGPR64:zsub1_then_ssub 0, // tcGPR64:zsub1_then_zsub 0, // tcGPR64:zsub1_then_zsub_hi 0, // tcGPR64:zsub3_then_bsub 0, // tcGPR64:zsub3_then_dsub 0, // tcGPR64:zsub3_then_hsub 0, // tcGPR64:zsub3_then_ssub 0, // tcGPR64:zsub3_then_zsub 0, // tcGPR64:zsub3_then_zsub_hi 0, // tcGPR64:zsub2_then_bsub 0, // tcGPR64:zsub2_then_dsub 0, // tcGPR64:zsub2_then_hsub 0, // tcGPR64:zsub2_then_ssub 0, // tcGPR64:zsub2_then_zsub 0, // tcGPR64:zsub2_then_zsub_hi 0, // tcGPR64:dsub0_dsub1 0, // tcGPR64:dsub0_dsub1_dsub2 0, // tcGPR64:dsub1_dsub2 0, // tcGPR64:dsub1_dsub2_dsub3 0, // tcGPR64:dsub2_dsub3 0, // tcGPR64:dsub_qsub1_then_dsub 0, // tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // tcGPR64:qsub0_qsub1 0, // tcGPR64:qsub0_qsub1_qsub2 0, // tcGPR64:qsub1_qsub2 0, // tcGPR64:qsub1_qsub2_qsub3 0, // tcGPR64:qsub2_qsub3 0, // tcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // tcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // tcGPR64:qsub2_then_dsub_qsub3_then_dsub 0, // tcGPR64:sub_32_x8sub_1_then_sub_32 0, // tcGPR64:x8sub_0_x8sub_1 0, // tcGPR64:x8sub_2_x8sub_3 0, // tcGPR64:x8sub_4_x8sub_5 0, // tcGPR64:x8sub_6_x8sub_7 0, // tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // tcGPR64:sub_32_subo64_then_sub_32 0, // tcGPR64:dsub_zsub1_then_dsub 0, // tcGPR64:zsub_zsub1_then_zsub 0, // tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // tcGPR64:zsub0_zsub1 0, // tcGPR64:zsub0_zsub1_zsub2 0, // tcGPR64:zsub1_zsub2 0, // tcGPR64:zsub1_zsub2_zsub3 0, // tcGPR64:zsub2_zsub3 0, // tcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // tcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // tcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // tcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // tcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // tcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // tcGPR64:zsub0_zsub2 0, // tcGPR64:zsub1_zsub3 }, { // GPR64noip_and_tcGPR64 0, // GPR64noip_and_tcGPR64:bsub 0, // GPR64noip_and_tcGPR64:dsub 0, // GPR64noip_and_tcGPR64:dsub0 0, // GPR64noip_and_tcGPR64:dsub1 0, // GPR64noip_and_tcGPR64:dsub2 0, // GPR64noip_and_tcGPR64:dsub3 0, // GPR64noip_and_tcGPR64:hsub 0, // GPR64noip_and_tcGPR64:psub0 0, // GPR64noip_and_tcGPR64:psub1 0, // GPR64noip_and_tcGPR64:qsub0 0, // GPR64noip_and_tcGPR64:qsub1 0, // GPR64noip_and_tcGPR64:qsub2 0, // GPR64noip_and_tcGPR64:qsub3 0, // GPR64noip_and_tcGPR64:ssub 23, // GPR64noip_and_tcGPR64:sub_32 -> GPR32common 0, // GPR64noip_and_tcGPR64:sube32 0, // GPR64noip_and_tcGPR64:sube64 0, // GPR64noip_and_tcGPR64:subo32 0, // GPR64noip_and_tcGPR64:subo64 0, // GPR64noip_and_tcGPR64:x8sub_0 0, // GPR64noip_and_tcGPR64:x8sub_1 0, // GPR64noip_and_tcGPR64:x8sub_2 0, // GPR64noip_and_tcGPR64:x8sub_3 0, // GPR64noip_and_tcGPR64:x8sub_4 0, // GPR64noip_and_tcGPR64:x8sub_5 0, // GPR64noip_and_tcGPR64:x8sub_6 0, // GPR64noip_and_tcGPR64:x8sub_7 0, // GPR64noip_and_tcGPR64:zasubb 0, // GPR64noip_and_tcGPR64:zasubd0 0, // GPR64noip_and_tcGPR64:zasubd1 0, // GPR64noip_and_tcGPR64:zasubh0 0, // GPR64noip_and_tcGPR64:zasubh1 0, // GPR64noip_and_tcGPR64:zasubq0 0, // GPR64noip_and_tcGPR64:zasubq1 0, // GPR64noip_and_tcGPR64:zasubs0 0, // GPR64noip_and_tcGPR64:zasubs1 0, // GPR64noip_and_tcGPR64:zsub 0, // GPR64noip_and_tcGPR64:zsub0 0, // GPR64noip_and_tcGPR64:zsub1 0, // GPR64noip_and_tcGPR64:zsub2 0, // GPR64noip_and_tcGPR64:zsub3 0, // GPR64noip_and_tcGPR64:zsub_hi 0, // GPR64noip_and_tcGPR64:zasubd1_then_zasubq0 0, // GPR64noip_and_tcGPR64:zasubd1_then_zasubq1 0, // GPR64noip_and_tcGPR64:zasubs1_then_zasubd0 0, // GPR64noip_and_tcGPR64:zasubs1_then_zasubd1 0, // GPR64noip_and_tcGPR64:zasubs1_then_zasubq0 0, // GPR64noip_and_tcGPR64:zasubs1_then_zasubq1 0, // GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64noip_and_tcGPR64:zasubh1_then_zasubd0 0, // GPR64noip_and_tcGPR64:zasubh1_then_zasubd1 0, // GPR64noip_and_tcGPR64:zasubh1_then_zasubq0 0, // GPR64noip_and_tcGPR64:zasubh1_then_zasubq1 0, // GPR64noip_and_tcGPR64:zasubh1_then_zasubs0 0, // GPR64noip_and_tcGPR64:zasubh1_then_zasubs1 0, // GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64noip_and_tcGPR64:dsub1_then_bsub 0, // GPR64noip_and_tcGPR64:dsub1_then_hsub 0, // GPR64noip_and_tcGPR64:dsub1_then_ssub 0, // GPR64noip_and_tcGPR64:dsub3_then_bsub 0, // GPR64noip_and_tcGPR64:dsub3_then_hsub 0, // GPR64noip_and_tcGPR64:dsub3_then_ssub 0, // GPR64noip_and_tcGPR64:dsub2_then_bsub 0, // GPR64noip_and_tcGPR64:dsub2_then_hsub 0, // GPR64noip_and_tcGPR64:dsub2_then_ssub 0, // GPR64noip_and_tcGPR64:qsub1_then_bsub 0, // GPR64noip_and_tcGPR64:qsub1_then_dsub 0, // GPR64noip_and_tcGPR64:qsub1_then_hsub 0, // GPR64noip_and_tcGPR64:qsub1_then_ssub 0, // GPR64noip_and_tcGPR64:qsub3_then_bsub 0, // GPR64noip_and_tcGPR64:qsub3_then_dsub 0, // GPR64noip_and_tcGPR64:qsub3_then_hsub 0, // GPR64noip_and_tcGPR64:qsub3_then_ssub 0, // GPR64noip_and_tcGPR64:qsub2_then_bsub 0, // GPR64noip_and_tcGPR64:qsub2_then_dsub 0, // GPR64noip_and_tcGPR64:qsub2_then_hsub 0, // GPR64noip_and_tcGPR64:qsub2_then_ssub 0, // GPR64noip_and_tcGPR64:x8sub_7_then_sub_32 0, // GPR64noip_and_tcGPR64:x8sub_6_then_sub_32 0, // GPR64noip_and_tcGPR64:x8sub_5_then_sub_32 0, // GPR64noip_and_tcGPR64:x8sub_4_then_sub_32 0, // GPR64noip_and_tcGPR64:x8sub_3_then_sub_32 0, // GPR64noip_and_tcGPR64:x8sub_2_then_sub_32 0, // GPR64noip_and_tcGPR64:x8sub_1_then_sub_32 0, // GPR64noip_and_tcGPR64:subo64_then_sub_32 0, // GPR64noip_and_tcGPR64:zsub1_then_bsub 0, // GPR64noip_and_tcGPR64:zsub1_then_dsub 0, // GPR64noip_and_tcGPR64:zsub1_then_hsub 0, // GPR64noip_and_tcGPR64:zsub1_then_ssub 0, // GPR64noip_and_tcGPR64:zsub1_then_zsub 0, // GPR64noip_and_tcGPR64:zsub1_then_zsub_hi 0, // GPR64noip_and_tcGPR64:zsub3_then_bsub 0, // GPR64noip_and_tcGPR64:zsub3_then_dsub 0, // GPR64noip_and_tcGPR64:zsub3_then_hsub 0, // GPR64noip_and_tcGPR64:zsub3_then_ssub 0, // GPR64noip_and_tcGPR64:zsub3_then_zsub 0, // GPR64noip_and_tcGPR64:zsub3_then_zsub_hi 0, // GPR64noip_and_tcGPR64:zsub2_then_bsub 0, // GPR64noip_and_tcGPR64:zsub2_then_dsub 0, // GPR64noip_and_tcGPR64:zsub2_then_hsub 0, // GPR64noip_and_tcGPR64:zsub2_then_ssub 0, // GPR64noip_and_tcGPR64:zsub2_then_zsub 0, // GPR64noip_and_tcGPR64:zsub2_then_zsub_hi 0, // GPR64noip_and_tcGPR64:dsub0_dsub1 0, // GPR64noip_and_tcGPR64:dsub0_dsub1_dsub2 0, // GPR64noip_and_tcGPR64:dsub1_dsub2 0, // GPR64noip_and_tcGPR64:dsub1_dsub2_dsub3 0, // GPR64noip_and_tcGPR64:dsub2_dsub3 0, // GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub 0, // GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64noip_and_tcGPR64:qsub0_qsub1 0, // GPR64noip_and_tcGPR64:qsub0_qsub1_qsub2 0, // GPR64noip_and_tcGPR64:qsub1_qsub2 0, // GPR64noip_and_tcGPR64:qsub1_qsub2_qsub3 0, // GPR64noip_and_tcGPR64:qsub2_qsub3 0, // GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64noip_and_tcGPR64:qsub2_then_dsub_qsub3_then_dsub 0, // GPR64noip_and_tcGPR64:sub_32_x8sub_1_then_sub_32 0, // GPR64noip_and_tcGPR64:x8sub_0_x8sub_1 0, // GPR64noip_and_tcGPR64:x8sub_2_x8sub_3 0, // GPR64noip_and_tcGPR64:x8sub_4_x8sub_5 0, // GPR64noip_and_tcGPR64:x8sub_6_x8sub_7 0, // GPR64noip_and_tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // GPR64noip_and_tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // GPR64noip_and_tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // GPR64noip_and_tcGPR64:sub_32_subo64_then_sub_32 0, // GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub 0, // GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub 0, // GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64noip_and_tcGPR64:zsub0_zsub1 0, // GPR64noip_and_tcGPR64:zsub0_zsub1_zsub2 0, // GPR64noip_and_tcGPR64:zsub1_zsub2 0, // GPR64noip_and_tcGPR64:zsub1_zsub2_zsub3 0, // GPR64noip_and_tcGPR64:zsub2_zsub3 0, // GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64noip_and_tcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64noip_and_tcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64noip_and_tcGPR64:zsub0_zsub2 0, // GPR64noip_and_tcGPR64:zsub1_zsub3 }, { // FPR64_lo 1, // FPR64_lo:bsub -> FPR8 0, // FPR64_lo:dsub 0, // FPR64_lo:dsub0 0, // FPR64_lo:dsub1 0, // FPR64_lo:dsub2 0, // FPR64_lo:dsub3 3, // FPR64_lo:hsub -> FPR16_lo 0, // FPR64_lo:psub0 0, // FPR64_lo:psub1 0, // FPR64_lo:qsub0 0, // FPR64_lo:qsub1 0, // FPR64_lo:qsub2 0, // FPR64_lo:qsub3 24, // FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // FPR64_lo:sub_32 0, // FPR64_lo:sube32 0, // FPR64_lo:sube64 0, // FPR64_lo:subo32 0, // FPR64_lo:subo64 0, // FPR64_lo:x8sub_0 0, // FPR64_lo:x8sub_1 0, // FPR64_lo:x8sub_2 0, // FPR64_lo:x8sub_3 0, // FPR64_lo:x8sub_4 0, // FPR64_lo:x8sub_5 0, // FPR64_lo:x8sub_6 0, // FPR64_lo:x8sub_7 0, // FPR64_lo:zasubb 0, // FPR64_lo:zasubd0 0, // FPR64_lo:zasubd1 0, // FPR64_lo:zasubh0 0, // FPR64_lo:zasubh1 0, // FPR64_lo:zasubq0 0, // FPR64_lo:zasubq1 0, // FPR64_lo:zasubs0 0, // FPR64_lo:zasubs1 0, // FPR64_lo:zsub 0, // FPR64_lo:zsub0 0, // FPR64_lo:zsub1 0, // FPR64_lo:zsub2 0, // FPR64_lo:zsub3 0, // FPR64_lo:zsub_hi 0, // FPR64_lo:zasubd1_then_zasubq0 0, // FPR64_lo:zasubd1_then_zasubq1 0, // FPR64_lo:zasubs1_then_zasubd0 0, // FPR64_lo:zasubs1_then_zasubd1 0, // FPR64_lo:zasubs1_then_zasubq0 0, // FPR64_lo:zasubs1_then_zasubq1 0, // FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // FPR64_lo:zasubh1_then_zasubd0 0, // FPR64_lo:zasubh1_then_zasubd1 0, // FPR64_lo:zasubh1_then_zasubq0 0, // FPR64_lo:zasubh1_then_zasubq1 0, // FPR64_lo:zasubh1_then_zasubs0 0, // FPR64_lo:zasubh1_then_zasubs1 0, // FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // FPR64_lo:dsub1_then_bsub 0, // FPR64_lo:dsub1_then_hsub 0, // FPR64_lo:dsub1_then_ssub 0, // FPR64_lo:dsub3_then_bsub 0, // FPR64_lo:dsub3_then_hsub 0, // FPR64_lo:dsub3_then_ssub 0, // FPR64_lo:dsub2_then_bsub 0, // FPR64_lo:dsub2_then_hsub 0, // FPR64_lo:dsub2_then_ssub 0, // FPR64_lo:qsub1_then_bsub 0, // FPR64_lo:qsub1_then_dsub 0, // FPR64_lo:qsub1_then_hsub 0, // FPR64_lo:qsub1_then_ssub 0, // FPR64_lo:qsub3_then_bsub 0, // FPR64_lo:qsub3_then_dsub 0, // FPR64_lo:qsub3_then_hsub 0, // FPR64_lo:qsub3_then_ssub 0, // FPR64_lo:qsub2_then_bsub 0, // FPR64_lo:qsub2_then_dsub 0, // FPR64_lo:qsub2_then_hsub 0, // FPR64_lo:qsub2_then_ssub 0, // FPR64_lo:x8sub_7_then_sub_32 0, // FPR64_lo:x8sub_6_then_sub_32 0, // FPR64_lo:x8sub_5_then_sub_32 0, // FPR64_lo:x8sub_4_then_sub_32 0, // FPR64_lo:x8sub_3_then_sub_32 0, // FPR64_lo:x8sub_2_then_sub_32 0, // FPR64_lo:x8sub_1_then_sub_32 0, // FPR64_lo:subo64_then_sub_32 0, // FPR64_lo:zsub1_then_bsub 0, // FPR64_lo:zsub1_then_dsub 0, // FPR64_lo:zsub1_then_hsub 0, // FPR64_lo:zsub1_then_ssub 0, // FPR64_lo:zsub1_then_zsub 0, // FPR64_lo:zsub1_then_zsub_hi 0, // FPR64_lo:zsub3_then_bsub 0, // FPR64_lo:zsub3_then_dsub 0, // FPR64_lo:zsub3_then_hsub 0, // FPR64_lo:zsub3_then_ssub 0, // FPR64_lo:zsub3_then_zsub 0, // FPR64_lo:zsub3_then_zsub_hi 0, // FPR64_lo:zsub2_then_bsub 0, // FPR64_lo:zsub2_then_dsub 0, // FPR64_lo:zsub2_then_hsub 0, // FPR64_lo:zsub2_then_ssub 0, // FPR64_lo:zsub2_then_zsub 0, // FPR64_lo:zsub2_then_zsub_hi 0, // FPR64_lo:dsub0_dsub1 0, // FPR64_lo:dsub0_dsub1_dsub2 0, // FPR64_lo:dsub1_dsub2 0, // FPR64_lo:dsub1_dsub2_dsub3 0, // FPR64_lo:dsub2_dsub3 0, // FPR64_lo:dsub_qsub1_then_dsub 0, // FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // FPR64_lo:qsub0_qsub1 0, // FPR64_lo:qsub0_qsub1_qsub2 0, // FPR64_lo:qsub1_qsub2 0, // FPR64_lo:qsub1_qsub2_qsub3 0, // FPR64_lo:qsub2_qsub3 0, // FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // FPR64_lo:x8sub_0_x8sub_1 0, // FPR64_lo:x8sub_2_x8sub_3 0, // FPR64_lo:x8sub_4_x8sub_5 0, // FPR64_lo:x8sub_6_x8sub_7 0, // FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // FPR64_lo:sub_32_subo64_then_sub_32 0, // FPR64_lo:dsub_zsub1_then_dsub 0, // FPR64_lo:zsub_zsub1_then_zsub 0, // FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // FPR64_lo:zsub0_zsub1 0, // FPR64_lo:zsub0_zsub1_zsub2 0, // FPR64_lo:zsub1_zsub2 0, // FPR64_lo:zsub1_zsub2_zsub3 0, // FPR64_lo:zsub2_zsub3 0, // FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // FPR64_lo:zsub0_zsub2 0, // FPR64_lo:zsub1_zsub3 }, { // GPR64arg 0, // GPR64arg:bsub 0, // GPR64arg:dsub 0, // GPR64arg:dsub0 0, // GPR64arg:dsub1 0, // GPR64arg:dsub2 0, // GPR64arg:dsub3 0, // GPR64arg:hsub 0, // GPR64arg:psub0 0, // GPR64arg:psub1 0, // GPR64arg:qsub0 0, // GPR64arg:qsub1 0, // GPR64arg:qsub2 0, // GPR64arg:qsub3 0, // GPR64arg:ssub 25, // GPR64arg:sub_32 -> GPR32arg 0, // GPR64arg:sube32 0, // GPR64arg:sube64 0, // GPR64arg:subo32 0, // GPR64arg:subo64 0, // GPR64arg:x8sub_0 0, // GPR64arg:x8sub_1 0, // GPR64arg:x8sub_2 0, // GPR64arg:x8sub_3 0, // GPR64arg:x8sub_4 0, // GPR64arg:x8sub_5 0, // GPR64arg:x8sub_6 0, // GPR64arg:x8sub_7 0, // GPR64arg:zasubb 0, // GPR64arg:zasubd0 0, // GPR64arg:zasubd1 0, // GPR64arg:zasubh0 0, // GPR64arg:zasubh1 0, // GPR64arg:zasubq0 0, // GPR64arg:zasubq1 0, // GPR64arg:zasubs0 0, // GPR64arg:zasubs1 0, // GPR64arg:zsub 0, // GPR64arg:zsub0 0, // GPR64arg:zsub1 0, // GPR64arg:zsub2 0, // GPR64arg:zsub3 0, // GPR64arg:zsub_hi 0, // GPR64arg:zasubd1_then_zasubq0 0, // GPR64arg:zasubd1_then_zasubq1 0, // GPR64arg:zasubs1_then_zasubd0 0, // GPR64arg:zasubs1_then_zasubd1 0, // GPR64arg:zasubs1_then_zasubq0 0, // GPR64arg:zasubs1_then_zasubq1 0, // GPR64arg:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64arg:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64arg:zasubh1_then_zasubd0 0, // GPR64arg:zasubh1_then_zasubd1 0, // GPR64arg:zasubh1_then_zasubq0 0, // GPR64arg:zasubh1_then_zasubq1 0, // GPR64arg:zasubh1_then_zasubs0 0, // GPR64arg:zasubh1_then_zasubs1 0, // GPR64arg:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64arg:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64arg:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64arg:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64arg:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64arg:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64arg:dsub1_then_bsub 0, // GPR64arg:dsub1_then_hsub 0, // GPR64arg:dsub1_then_ssub 0, // GPR64arg:dsub3_then_bsub 0, // GPR64arg:dsub3_then_hsub 0, // GPR64arg:dsub3_then_ssub 0, // GPR64arg:dsub2_then_bsub 0, // GPR64arg:dsub2_then_hsub 0, // GPR64arg:dsub2_then_ssub 0, // GPR64arg:qsub1_then_bsub 0, // GPR64arg:qsub1_then_dsub 0, // GPR64arg:qsub1_then_hsub 0, // GPR64arg:qsub1_then_ssub 0, // GPR64arg:qsub3_then_bsub 0, // GPR64arg:qsub3_then_dsub 0, // GPR64arg:qsub3_then_hsub 0, // GPR64arg:qsub3_then_ssub 0, // GPR64arg:qsub2_then_bsub 0, // GPR64arg:qsub2_then_dsub 0, // GPR64arg:qsub2_then_hsub 0, // GPR64arg:qsub2_then_ssub 0, // GPR64arg:x8sub_7_then_sub_32 0, // GPR64arg:x8sub_6_then_sub_32 0, // GPR64arg:x8sub_5_then_sub_32 0, // GPR64arg:x8sub_4_then_sub_32 0, // GPR64arg:x8sub_3_then_sub_32 0, // GPR64arg:x8sub_2_then_sub_32 0, // GPR64arg:x8sub_1_then_sub_32 0, // GPR64arg:subo64_then_sub_32 0, // GPR64arg:zsub1_then_bsub 0, // GPR64arg:zsub1_then_dsub 0, // GPR64arg:zsub1_then_hsub 0, // GPR64arg:zsub1_then_ssub 0, // GPR64arg:zsub1_then_zsub 0, // GPR64arg:zsub1_then_zsub_hi 0, // GPR64arg:zsub3_then_bsub 0, // GPR64arg:zsub3_then_dsub 0, // GPR64arg:zsub3_then_hsub 0, // GPR64arg:zsub3_then_ssub 0, // GPR64arg:zsub3_then_zsub 0, // GPR64arg:zsub3_then_zsub_hi 0, // GPR64arg:zsub2_then_bsub 0, // GPR64arg:zsub2_then_dsub 0, // GPR64arg:zsub2_then_hsub 0, // GPR64arg:zsub2_then_ssub 0, // GPR64arg:zsub2_then_zsub 0, // GPR64arg:zsub2_then_zsub_hi 0, // GPR64arg:dsub0_dsub1 0, // GPR64arg:dsub0_dsub1_dsub2 0, // GPR64arg:dsub1_dsub2 0, // GPR64arg:dsub1_dsub2_dsub3 0, // GPR64arg:dsub2_dsub3 0, // GPR64arg:dsub_qsub1_then_dsub 0, // GPR64arg:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64arg:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64arg:qsub0_qsub1 0, // GPR64arg:qsub0_qsub1_qsub2 0, // GPR64arg:qsub1_qsub2 0, // GPR64arg:qsub1_qsub2_qsub3 0, // GPR64arg:qsub2_qsub3 0, // GPR64arg:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64arg:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64arg:qsub2_then_dsub_qsub3_then_dsub 0, // GPR64arg:sub_32_x8sub_1_then_sub_32 0, // GPR64arg:x8sub_0_x8sub_1 0, // GPR64arg:x8sub_2_x8sub_3 0, // GPR64arg:x8sub_4_x8sub_5 0, // GPR64arg:x8sub_6_x8sub_7 0, // GPR64arg:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // GPR64arg:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // GPR64arg:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // GPR64arg:sub_32_subo64_then_sub_32 0, // GPR64arg:dsub_zsub1_then_dsub 0, // GPR64arg:zsub_zsub1_then_zsub 0, // GPR64arg:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64arg:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64arg:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64arg:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64arg:zsub0_zsub1 0, // GPR64arg:zsub0_zsub1_zsub2 0, // GPR64arg:zsub1_zsub2 0, // GPR64arg:zsub1_zsub2_zsub3 0, // GPR64arg:zsub2_zsub3 0, // GPR64arg:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64arg:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64arg:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64arg:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64arg:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64arg:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64arg:zsub0_zsub2 0, // GPR64arg:zsub1_zsub3 }, { // FIXED_REGS 0, // FIXED_REGS:bsub 0, // FIXED_REGS:dsub 0, // FIXED_REGS:dsub0 0, // FIXED_REGS:dsub1 0, // FIXED_REGS:dsub2 0, // FIXED_REGS:dsub3 0, // FIXED_REGS:hsub 0, // FIXED_REGS:psub0 0, // FIXED_REGS:psub1 0, // FIXED_REGS:qsub0 0, // FIXED_REGS:qsub1 0, // FIXED_REGS:qsub2 0, // FIXED_REGS:qsub3 0, // FIXED_REGS:ssub 22, // FIXED_REGS:sub_32 -> GPR32sp 0, // FIXED_REGS:sube32 0, // FIXED_REGS:sube64 0, // FIXED_REGS:subo32 0, // FIXED_REGS:subo64 0, // FIXED_REGS:x8sub_0 0, // FIXED_REGS:x8sub_1 0, // FIXED_REGS:x8sub_2 0, // FIXED_REGS:x8sub_3 0, // FIXED_REGS:x8sub_4 0, // FIXED_REGS:x8sub_5 0, // FIXED_REGS:x8sub_6 0, // FIXED_REGS:x8sub_7 0, // FIXED_REGS:zasubb 0, // FIXED_REGS:zasubd0 0, // FIXED_REGS:zasubd1 0, // FIXED_REGS:zasubh0 0, // FIXED_REGS:zasubh1 0, // FIXED_REGS:zasubq0 0, // FIXED_REGS:zasubq1 0, // FIXED_REGS:zasubs0 0, // FIXED_REGS:zasubs1 0, // FIXED_REGS:zsub 0, // FIXED_REGS:zsub0 0, // FIXED_REGS:zsub1 0, // FIXED_REGS:zsub2 0, // FIXED_REGS:zsub3 0, // FIXED_REGS:zsub_hi 0, // FIXED_REGS:zasubd1_then_zasubq0 0, // FIXED_REGS:zasubd1_then_zasubq1 0, // FIXED_REGS:zasubs1_then_zasubd0 0, // FIXED_REGS:zasubs1_then_zasubd1 0, // FIXED_REGS:zasubs1_then_zasubq0 0, // FIXED_REGS:zasubs1_then_zasubq1 0, // FIXED_REGS:zasubs1_then_zasubd1_then_zasubq0 0, // FIXED_REGS:zasubs1_then_zasubd1_then_zasubq1 0, // FIXED_REGS:zasubh1_then_zasubd0 0, // FIXED_REGS:zasubh1_then_zasubd1 0, // FIXED_REGS:zasubh1_then_zasubq0 0, // FIXED_REGS:zasubh1_then_zasubq1 0, // FIXED_REGS:zasubh1_then_zasubs0 0, // FIXED_REGS:zasubh1_then_zasubs1 0, // FIXED_REGS:zasubh1_then_zasubd1_then_zasubq0 0, // FIXED_REGS:zasubh1_then_zasubd1_then_zasubq1 0, // FIXED_REGS:zasubh1_then_zasubs1_then_zasubd0 0, // FIXED_REGS:zasubh1_then_zasubs1_then_zasubd1 0, // FIXED_REGS:zasubh1_then_zasubs1_then_zasubq0 0, // FIXED_REGS:zasubh1_then_zasubs1_then_zasubq1 0, // FIXED_REGS:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // FIXED_REGS:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // FIXED_REGS:dsub1_then_bsub 0, // FIXED_REGS:dsub1_then_hsub 0, // FIXED_REGS:dsub1_then_ssub 0, // FIXED_REGS:dsub3_then_bsub 0, // FIXED_REGS:dsub3_then_hsub 0, // FIXED_REGS:dsub3_then_ssub 0, // FIXED_REGS:dsub2_then_bsub 0, // FIXED_REGS:dsub2_then_hsub 0, // FIXED_REGS:dsub2_then_ssub 0, // FIXED_REGS:qsub1_then_bsub 0, // FIXED_REGS:qsub1_then_dsub 0, // FIXED_REGS:qsub1_then_hsub 0, // FIXED_REGS:qsub1_then_ssub 0, // FIXED_REGS:qsub3_then_bsub 0, // FIXED_REGS:qsub3_then_dsub 0, // FIXED_REGS:qsub3_then_hsub 0, // FIXED_REGS:qsub3_then_ssub 0, // FIXED_REGS:qsub2_then_bsub 0, // FIXED_REGS:qsub2_then_dsub 0, // FIXED_REGS:qsub2_then_hsub 0, // FIXED_REGS:qsub2_then_ssub 0, // FIXED_REGS:x8sub_7_then_sub_32 0, // FIXED_REGS:x8sub_6_then_sub_32 0, // FIXED_REGS:x8sub_5_then_sub_32 0, // FIXED_REGS:x8sub_4_then_sub_32 0, // FIXED_REGS:x8sub_3_then_sub_32 0, // FIXED_REGS:x8sub_2_then_sub_32 0, // FIXED_REGS:x8sub_1_then_sub_32 0, // FIXED_REGS:subo64_then_sub_32 0, // FIXED_REGS:zsub1_then_bsub 0, // FIXED_REGS:zsub1_then_dsub 0, // FIXED_REGS:zsub1_then_hsub 0, // FIXED_REGS:zsub1_then_ssub 0, // FIXED_REGS:zsub1_then_zsub 0, // FIXED_REGS:zsub1_then_zsub_hi 0, // FIXED_REGS:zsub3_then_bsub 0, // FIXED_REGS:zsub3_then_dsub 0, // FIXED_REGS:zsub3_then_hsub 0, // FIXED_REGS:zsub3_then_ssub 0, // FIXED_REGS:zsub3_then_zsub 0, // FIXED_REGS:zsub3_then_zsub_hi 0, // FIXED_REGS:zsub2_then_bsub 0, // FIXED_REGS:zsub2_then_dsub 0, // FIXED_REGS:zsub2_then_hsub 0, // FIXED_REGS:zsub2_then_ssub 0, // FIXED_REGS:zsub2_then_zsub 0, // FIXED_REGS:zsub2_then_zsub_hi 0, // FIXED_REGS:dsub0_dsub1 0, // FIXED_REGS:dsub0_dsub1_dsub2 0, // FIXED_REGS:dsub1_dsub2 0, // FIXED_REGS:dsub1_dsub2_dsub3 0, // FIXED_REGS:dsub2_dsub3 0, // FIXED_REGS:dsub_qsub1_then_dsub 0, // FIXED_REGS:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FIXED_REGS:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // FIXED_REGS:qsub0_qsub1 0, // FIXED_REGS:qsub0_qsub1_qsub2 0, // FIXED_REGS:qsub1_qsub2 0, // FIXED_REGS:qsub1_qsub2_qsub3 0, // FIXED_REGS:qsub2_qsub3 0, // FIXED_REGS:qsub1_then_dsub_qsub2_then_dsub 0, // FIXED_REGS:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FIXED_REGS:qsub2_then_dsub_qsub3_then_dsub 0, // FIXED_REGS:sub_32_x8sub_1_then_sub_32 0, // FIXED_REGS:x8sub_0_x8sub_1 0, // FIXED_REGS:x8sub_2_x8sub_3 0, // FIXED_REGS:x8sub_4_x8sub_5 0, // FIXED_REGS:x8sub_6_x8sub_7 0, // FIXED_REGS:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // FIXED_REGS:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // FIXED_REGS:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // FIXED_REGS:sub_32_subo64_then_sub_32 0, // FIXED_REGS:dsub_zsub1_then_dsub 0, // FIXED_REGS:zsub_zsub1_then_zsub 0, // FIXED_REGS:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FIXED_REGS:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // FIXED_REGS:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FIXED_REGS:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // FIXED_REGS:zsub0_zsub1 0, // FIXED_REGS:zsub0_zsub1_zsub2 0, // FIXED_REGS:zsub1_zsub2 0, // FIXED_REGS:zsub1_zsub2_zsub3 0, // FIXED_REGS:zsub2_zsub3 0, // FIXED_REGS:zsub1_then_dsub_zsub2_then_dsub 0, // FIXED_REGS:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FIXED_REGS:zsub1_then_zsub_zsub2_then_zsub 0, // FIXED_REGS:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FIXED_REGS:zsub2_then_dsub_zsub3_then_dsub 0, // FIXED_REGS:zsub2_then_zsub_zsub3_then_zsub 0, // FIXED_REGS:zsub0_zsub2 0, // FIXED_REGS:zsub1_zsub3 }, { // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:psub0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:psub1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:ssub 26, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32 -> MatrixIndexGPR32_12_15 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sube32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sube64 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:subo32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:subo64 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubb 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubq0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubq1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_hi 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_ssub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_ssub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_ssub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_ssub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_ssub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_ssub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:subo64_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_ssub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_hi 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_ssub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_zsub_hi 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_ssub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub_hi 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0_dsub1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0_dsub1_dsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_dsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_dsub2_dsub3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_dsub3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_qsub1_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0_qsub1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0_qsub1_qsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_qsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_qsub2_qsub3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_qsub3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_dsub_qsub3_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_x8sub_1_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_0_x8sub_1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_x8sub_3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_x8sub_5 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_x8sub_7 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_subo64_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_zsub1_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_zsub1_then_zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub1_zsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub2_zsub3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_zsub3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub3 }, { // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub 27, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> MatrixIndexGPR32_8_11 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_ssub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_ssub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_ssub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_ssub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_ssub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_bsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_hsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_ssub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_qsub3_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 0, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 }, { // FIXED_REGS_with_sub_32 0, // FIXED_REGS_with_sub_32:bsub 0, // FIXED_REGS_with_sub_32:dsub 0, // FIXED_REGS_with_sub_32:dsub0 0, // FIXED_REGS_with_sub_32:dsub1 0, // FIXED_REGS_with_sub_32:dsub2 0, // FIXED_REGS_with_sub_32:dsub3 0, // FIXED_REGS_with_sub_32:hsub 0, // FIXED_REGS_with_sub_32:psub0 0, // FIXED_REGS_with_sub_32:psub1 0, // FIXED_REGS_with_sub_32:qsub0 0, // FIXED_REGS_with_sub_32:qsub1 0, // FIXED_REGS_with_sub_32:qsub2 0, // FIXED_REGS_with_sub_32:qsub3 0, // FIXED_REGS_with_sub_32:ssub 22, // FIXED_REGS_with_sub_32:sub_32 -> GPR32sp 0, // FIXED_REGS_with_sub_32:sube32 0, // FIXED_REGS_with_sub_32:sube64 0, // FIXED_REGS_with_sub_32:subo32 0, // FIXED_REGS_with_sub_32:subo64 0, // FIXED_REGS_with_sub_32:x8sub_0 0, // FIXED_REGS_with_sub_32:x8sub_1 0, // FIXED_REGS_with_sub_32:x8sub_2 0, // FIXED_REGS_with_sub_32:x8sub_3 0, // FIXED_REGS_with_sub_32:x8sub_4 0, // FIXED_REGS_with_sub_32:x8sub_5 0, // FIXED_REGS_with_sub_32:x8sub_6 0, // FIXED_REGS_with_sub_32:x8sub_7 0, // FIXED_REGS_with_sub_32:zasubb 0, // FIXED_REGS_with_sub_32:zasubd0 0, // FIXED_REGS_with_sub_32:zasubd1 0, // FIXED_REGS_with_sub_32:zasubh0 0, // FIXED_REGS_with_sub_32:zasubh1 0, // FIXED_REGS_with_sub_32:zasubq0 0, // FIXED_REGS_with_sub_32:zasubq1 0, // FIXED_REGS_with_sub_32:zasubs0 0, // FIXED_REGS_with_sub_32:zasubs1 0, // FIXED_REGS_with_sub_32:zsub 0, // FIXED_REGS_with_sub_32:zsub0 0, // FIXED_REGS_with_sub_32:zsub1 0, // FIXED_REGS_with_sub_32:zsub2 0, // FIXED_REGS_with_sub_32:zsub3 0, // FIXED_REGS_with_sub_32:zsub_hi 0, // FIXED_REGS_with_sub_32:zasubd1_then_zasubq0 0, // FIXED_REGS_with_sub_32:zasubd1_then_zasubq1 0, // FIXED_REGS_with_sub_32:zasubs1_then_zasubd0 0, // FIXED_REGS_with_sub_32:zasubs1_then_zasubd1 0, // FIXED_REGS_with_sub_32:zasubs1_then_zasubq0 0, // FIXED_REGS_with_sub_32:zasubs1_then_zasubq1 0, // FIXED_REGS_with_sub_32:zasubs1_then_zasubd1_then_zasubq0 0, // FIXED_REGS_with_sub_32:zasubs1_then_zasubd1_then_zasubq1 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubd0 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubd1 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubq0 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubq1 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubs0 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubs1 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubd1_then_zasubq0 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubd1_then_zasubq1 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubs1_then_zasubd0 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubs1_then_zasubd1 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubs1_then_zasubq0 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubs1_then_zasubq1 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // FIXED_REGS_with_sub_32:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // FIXED_REGS_with_sub_32:dsub1_then_bsub 0, // FIXED_REGS_with_sub_32:dsub1_then_hsub 0, // FIXED_REGS_with_sub_32:dsub1_then_ssub 0, // FIXED_REGS_with_sub_32:dsub3_then_bsub 0, // FIXED_REGS_with_sub_32:dsub3_then_hsub 0, // FIXED_REGS_with_sub_32:dsub3_then_ssub 0, // FIXED_REGS_with_sub_32:dsub2_then_bsub 0, // FIXED_REGS_with_sub_32:dsub2_then_hsub 0, // FIXED_REGS_with_sub_32:dsub2_then_ssub 0, // FIXED_REGS_with_sub_32:qsub1_then_bsub 0, // FIXED_REGS_with_sub_32:qsub1_then_dsub 0, // FIXED_REGS_with_sub_32:qsub1_then_hsub 0, // FIXED_REGS_with_sub_32:qsub1_then_ssub 0, // FIXED_REGS_with_sub_32:qsub3_then_bsub 0, // FIXED_REGS_with_sub_32:qsub3_then_dsub 0, // FIXED_REGS_with_sub_32:qsub3_then_hsub 0, // FIXED_REGS_with_sub_32:qsub3_then_ssub 0, // FIXED_REGS_with_sub_32:qsub2_then_bsub 0, // FIXED_REGS_with_sub_32:qsub2_then_dsub 0, // FIXED_REGS_with_sub_32:qsub2_then_hsub 0, // FIXED_REGS_with_sub_32:qsub2_then_ssub 0, // FIXED_REGS_with_sub_32:x8sub_7_then_sub_32 0, // FIXED_REGS_with_sub_32:x8sub_6_then_sub_32 0, // FIXED_REGS_with_sub_32:x8sub_5_then_sub_32 0, // FIXED_REGS_with_sub_32:x8sub_4_then_sub_32 0, // FIXED_REGS_with_sub_32:x8sub_3_then_sub_32 0, // FIXED_REGS_with_sub_32:x8sub_2_then_sub_32 0, // FIXED_REGS_with_sub_32:x8sub_1_then_sub_32 0, // FIXED_REGS_with_sub_32:subo64_then_sub_32 0, // FIXED_REGS_with_sub_32:zsub1_then_bsub 0, // FIXED_REGS_with_sub_32:zsub1_then_dsub 0, // FIXED_REGS_with_sub_32:zsub1_then_hsub 0, // FIXED_REGS_with_sub_32:zsub1_then_ssub 0, // FIXED_REGS_with_sub_32:zsub1_then_zsub 0, // FIXED_REGS_with_sub_32:zsub1_then_zsub_hi 0, // FIXED_REGS_with_sub_32:zsub3_then_bsub 0, // FIXED_REGS_with_sub_32:zsub3_then_dsub 0, // FIXED_REGS_with_sub_32:zsub3_then_hsub 0, // FIXED_REGS_with_sub_32:zsub3_then_ssub 0, // FIXED_REGS_with_sub_32:zsub3_then_zsub 0, // FIXED_REGS_with_sub_32:zsub3_then_zsub_hi 0, // FIXED_REGS_with_sub_32:zsub2_then_bsub 0, // FIXED_REGS_with_sub_32:zsub2_then_dsub 0, // FIXED_REGS_with_sub_32:zsub2_then_hsub 0, // FIXED_REGS_with_sub_32:zsub2_then_ssub 0, // FIXED_REGS_with_sub_32:zsub2_then_zsub 0, // FIXED_REGS_with_sub_32:zsub2_then_zsub_hi 0, // FIXED_REGS_with_sub_32:dsub0_dsub1 0, // FIXED_REGS_with_sub_32:dsub0_dsub1_dsub2 0, // FIXED_REGS_with_sub_32:dsub1_dsub2 0, // FIXED_REGS_with_sub_32:dsub1_dsub2_dsub3 0, // FIXED_REGS_with_sub_32:dsub2_dsub3 0, // FIXED_REGS_with_sub_32:dsub_qsub1_then_dsub 0, // FIXED_REGS_with_sub_32:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FIXED_REGS_with_sub_32:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // FIXED_REGS_with_sub_32:qsub0_qsub1 0, // FIXED_REGS_with_sub_32:qsub0_qsub1_qsub2 0, // FIXED_REGS_with_sub_32:qsub1_qsub2 0, // FIXED_REGS_with_sub_32:qsub1_qsub2_qsub3 0, // FIXED_REGS_with_sub_32:qsub2_qsub3 0, // FIXED_REGS_with_sub_32:qsub1_then_dsub_qsub2_then_dsub 0, // FIXED_REGS_with_sub_32:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FIXED_REGS_with_sub_32:qsub2_then_dsub_qsub3_then_dsub 0, // FIXED_REGS_with_sub_32:sub_32_x8sub_1_then_sub_32 0, // FIXED_REGS_with_sub_32:x8sub_0_x8sub_1 0, // FIXED_REGS_with_sub_32:x8sub_2_x8sub_3 0, // FIXED_REGS_with_sub_32:x8sub_4_x8sub_5 0, // FIXED_REGS_with_sub_32:x8sub_6_x8sub_7 0, // FIXED_REGS_with_sub_32:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // FIXED_REGS_with_sub_32:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // FIXED_REGS_with_sub_32:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // FIXED_REGS_with_sub_32:sub_32_subo64_then_sub_32 0, // FIXED_REGS_with_sub_32:dsub_zsub1_then_dsub 0, // FIXED_REGS_with_sub_32:zsub_zsub1_then_zsub 0, // FIXED_REGS_with_sub_32:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FIXED_REGS_with_sub_32:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // FIXED_REGS_with_sub_32:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FIXED_REGS_with_sub_32:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // FIXED_REGS_with_sub_32:zsub0_zsub1 0, // FIXED_REGS_with_sub_32:zsub0_zsub1_zsub2 0, // FIXED_REGS_with_sub_32:zsub1_zsub2 0, // FIXED_REGS_with_sub_32:zsub1_zsub2_zsub3 0, // FIXED_REGS_with_sub_32:zsub2_zsub3 0, // FIXED_REGS_with_sub_32:zsub1_then_dsub_zsub2_then_dsub 0, // FIXED_REGS_with_sub_32:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FIXED_REGS_with_sub_32:zsub1_then_zsub_zsub2_then_zsub 0, // FIXED_REGS_with_sub_32:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FIXED_REGS_with_sub_32:zsub2_then_dsub_zsub3_then_dsub 0, // FIXED_REGS_with_sub_32:zsub2_then_zsub_zsub3_then_zsub 0, // FIXED_REGS_with_sub_32:zsub0_zsub2 0, // FIXED_REGS_with_sub_32:zsub1_zsub3 }, { // rtcGPR64 0, // rtcGPR64:bsub 0, // rtcGPR64:dsub 0, // rtcGPR64:dsub0 0, // rtcGPR64:dsub1 0, // rtcGPR64:dsub2 0, // rtcGPR64:dsub3 0, // rtcGPR64:hsub 0, // rtcGPR64:psub0 0, // rtcGPR64:psub1 0, // rtcGPR64:qsub0 0, // rtcGPR64:qsub1 0, // rtcGPR64:qsub2 0, // rtcGPR64:qsub3 0, // rtcGPR64:ssub 23, // rtcGPR64:sub_32 -> GPR32common 0, // rtcGPR64:sube32 0, // rtcGPR64:sube64 0, // rtcGPR64:subo32 0, // rtcGPR64:subo64 0, // rtcGPR64:x8sub_0 0, // rtcGPR64:x8sub_1 0, // rtcGPR64:x8sub_2 0, // rtcGPR64:x8sub_3 0, // rtcGPR64:x8sub_4 0, // rtcGPR64:x8sub_5 0, // rtcGPR64:x8sub_6 0, // rtcGPR64:x8sub_7 0, // rtcGPR64:zasubb 0, // rtcGPR64:zasubd0 0, // rtcGPR64:zasubd1 0, // rtcGPR64:zasubh0 0, // rtcGPR64:zasubh1 0, // rtcGPR64:zasubq0 0, // rtcGPR64:zasubq1 0, // rtcGPR64:zasubs0 0, // rtcGPR64:zasubs1 0, // rtcGPR64:zsub 0, // rtcGPR64:zsub0 0, // rtcGPR64:zsub1 0, // rtcGPR64:zsub2 0, // rtcGPR64:zsub3 0, // rtcGPR64:zsub_hi 0, // rtcGPR64:zasubd1_then_zasubq0 0, // rtcGPR64:zasubd1_then_zasubq1 0, // rtcGPR64:zasubs1_then_zasubd0 0, // rtcGPR64:zasubs1_then_zasubd1 0, // rtcGPR64:zasubs1_then_zasubq0 0, // rtcGPR64:zasubs1_then_zasubq1 0, // rtcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // rtcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // rtcGPR64:zasubh1_then_zasubd0 0, // rtcGPR64:zasubh1_then_zasubd1 0, // rtcGPR64:zasubh1_then_zasubq0 0, // rtcGPR64:zasubh1_then_zasubq1 0, // rtcGPR64:zasubh1_then_zasubs0 0, // rtcGPR64:zasubh1_then_zasubs1 0, // rtcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // rtcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // rtcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // rtcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // rtcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // rtcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // rtcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // rtcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // rtcGPR64:dsub1_then_bsub 0, // rtcGPR64:dsub1_then_hsub 0, // rtcGPR64:dsub1_then_ssub 0, // rtcGPR64:dsub3_then_bsub 0, // rtcGPR64:dsub3_then_hsub 0, // rtcGPR64:dsub3_then_ssub 0, // rtcGPR64:dsub2_then_bsub 0, // rtcGPR64:dsub2_then_hsub 0, // rtcGPR64:dsub2_then_ssub 0, // rtcGPR64:qsub1_then_bsub 0, // rtcGPR64:qsub1_then_dsub 0, // rtcGPR64:qsub1_then_hsub 0, // rtcGPR64:qsub1_then_ssub 0, // rtcGPR64:qsub3_then_bsub 0, // rtcGPR64:qsub3_then_dsub 0, // rtcGPR64:qsub3_then_hsub 0, // rtcGPR64:qsub3_then_ssub 0, // rtcGPR64:qsub2_then_bsub 0, // rtcGPR64:qsub2_then_dsub 0, // rtcGPR64:qsub2_then_hsub 0, // rtcGPR64:qsub2_then_ssub 0, // rtcGPR64:x8sub_7_then_sub_32 0, // rtcGPR64:x8sub_6_then_sub_32 0, // rtcGPR64:x8sub_5_then_sub_32 0, // rtcGPR64:x8sub_4_then_sub_32 0, // rtcGPR64:x8sub_3_then_sub_32 0, // rtcGPR64:x8sub_2_then_sub_32 0, // rtcGPR64:x8sub_1_then_sub_32 0, // rtcGPR64:subo64_then_sub_32 0, // rtcGPR64:zsub1_then_bsub 0, // rtcGPR64:zsub1_then_dsub 0, // rtcGPR64:zsub1_then_hsub 0, // rtcGPR64:zsub1_then_ssub 0, // rtcGPR64:zsub1_then_zsub 0, // rtcGPR64:zsub1_then_zsub_hi 0, // rtcGPR64:zsub3_then_bsub 0, // rtcGPR64:zsub3_then_dsub 0, // rtcGPR64:zsub3_then_hsub 0, // rtcGPR64:zsub3_then_ssub 0, // rtcGPR64:zsub3_then_zsub 0, // rtcGPR64:zsub3_then_zsub_hi 0, // rtcGPR64:zsub2_then_bsub 0, // rtcGPR64:zsub2_then_dsub 0, // rtcGPR64:zsub2_then_hsub 0, // rtcGPR64:zsub2_then_ssub 0, // rtcGPR64:zsub2_then_zsub 0, // rtcGPR64:zsub2_then_zsub_hi 0, // rtcGPR64:dsub0_dsub1 0, // rtcGPR64:dsub0_dsub1_dsub2 0, // rtcGPR64:dsub1_dsub2 0, // rtcGPR64:dsub1_dsub2_dsub3 0, // rtcGPR64:dsub2_dsub3 0, // rtcGPR64:dsub_qsub1_then_dsub 0, // rtcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // rtcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // rtcGPR64:qsub0_qsub1 0, // rtcGPR64:qsub0_qsub1_qsub2 0, // rtcGPR64:qsub1_qsub2 0, // rtcGPR64:qsub1_qsub2_qsub3 0, // rtcGPR64:qsub2_qsub3 0, // rtcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // rtcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // rtcGPR64:qsub2_then_dsub_qsub3_then_dsub 0, // rtcGPR64:sub_32_x8sub_1_then_sub_32 0, // rtcGPR64:x8sub_0_x8sub_1 0, // rtcGPR64:x8sub_2_x8sub_3 0, // rtcGPR64:x8sub_4_x8sub_5 0, // rtcGPR64:x8sub_6_x8sub_7 0, // rtcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // rtcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // rtcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // rtcGPR64:sub_32_subo64_then_sub_32 0, // rtcGPR64:dsub_zsub1_then_dsub 0, // rtcGPR64:zsub_zsub1_then_zsub 0, // rtcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // rtcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // rtcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // rtcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // rtcGPR64:zsub0_zsub1 0, // rtcGPR64:zsub0_zsub1_zsub2 0, // rtcGPR64:zsub1_zsub2 0, // rtcGPR64:zsub1_zsub2_zsub3 0, // rtcGPR64:zsub2_zsub3 0, // rtcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // rtcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // rtcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // rtcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // rtcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // rtcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // rtcGPR64:zsub0_zsub2 0, // rtcGPR64:zsub1_zsub3 }, { // FIXED_REGS_and_GPR64 0, // FIXED_REGS_and_GPR64:bsub 0, // FIXED_REGS_and_GPR64:dsub 0, // FIXED_REGS_and_GPR64:dsub0 0, // FIXED_REGS_and_GPR64:dsub1 0, // FIXED_REGS_and_GPR64:dsub2 0, // FIXED_REGS_and_GPR64:dsub3 0, // FIXED_REGS_and_GPR64:hsub 0, // FIXED_REGS_and_GPR64:psub0 0, // FIXED_REGS_and_GPR64:psub1 0, // FIXED_REGS_and_GPR64:qsub0 0, // FIXED_REGS_and_GPR64:qsub1 0, // FIXED_REGS_and_GPR64:qsub2 0, // FIXED_REGS_and_GPR64:qsub3 0, // FIXED_REGS_and_GPR64:ssub 23, // FIXED_REGS_and_GPR64:sub_32 -> GPR32common 0, // FIXED_REGS_and_GPR64:sube32 0, // FIXED_REGS_and_GPR64:sube64 0, // FIXED_REGS_and_GPR64:subo32 0, // FIXED_REGS_and_GPR64:subo64 0, // FIXED_REGS_and_GPR64:x8sub_0 0, // FIXED_REGS_and_GPR64:x8sub_1 0, // FIXED_REGS_and_GPR64:x8sub_2 0, // FIXED_REGS_and_GPR64:x8sub_3 0, // FIXED_REGS_and_GPR64:x8sub_4 0, // FIXED_REGS_and_GPR64:x8sub_5 0, // FIXED_REGS_and_GPR64:x8sub_6 0, // FIXED_REGS_and_GPR64:x8sub_7 0, // FIXED_REGS_and_GPR64:zasubb 0, // FIXED_REGS_and_GPR64:zasubd0 0, // FIXED_REGS_and_GPR64:zasubd1 0, // FIXED_REGS_and_GPR64:zasubh0 0, // FIXED_REGS_and_GPR64:zasubh1 0, // FIXED_REGS_and_GPR64:zasubq0 0, // FIXED_REGS_and_GPR64:zasubq1 0, // FIXED_REGS_and_GPR64:zasubs0 0, // FIXED_REGS_and_GPR64:zasubs1 0, // FIXED_REGS_and_GPR64:zsub 0, // FIXED_REGS_and_GPR64:zsub0 0, // FIXED_REGS_and_GPR64:zsub1 0, // FIXED_REGS_and_GPR64:zsub2 0, // FIXED_REGS_and_GPR64:zsub3 0, // FIXED_REGS_and_GPR64:zsub_hi 0, // FIXED_REGS_and_GPR64:zasubd1_then_zasubq0 0, // FIXED_REGS_and_GPR64:zasubd1_then_zasubq1 0, // FIXED_REGS_and_GPR64:zasubs1_then_zasubd0 0, // FIXED_REGS_and_GPR64:zasubs1_then_zasubd1 0, // FIXED_REGS_and_GPR64:zasubs1_then_zasubq0 0, // FIXED_REGS_and_GPR64:zasubs1_then_zasubq1 0, // FIXED_REGS_and_GPR64:zasubs1_then_zasubd1_then_zasubq0 0, // FIXED_REGS_and_GPR64:zasubs1_then_zasubd1_then_zasubq1 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubd0 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubd1 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubq0 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubq1 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubs0 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubs1 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubd1_then_zasubq0 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubd1_then_zasubq1 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubs1_then_zasubd0 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubs1_then_zasubd1 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubs1_then_zasubq0 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubs1_then_zasubq1 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // FIXED_REGS_and_GPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // FIXED_REGS_and_GPR64:dsub1_then_bsub 0, // FIXED_REGS_and_GPR64:dsub1_then_hsub 0, // FIXED_REGS_and_GPR64:dsub1_then_ssub 0, // FIXED_REGS_and_GPR64:dsub3_then_bsub 0, // FIXED_REGS_and_GPR64:dsub3_then_hsub 0, // FIXED_REGS_and_GPR64:dsub3_then_ssub 0, // FIXED_REGS_and_GPR64:dsub2_then_bsub 0, // FIXED_REGS_and_GPR64:dsub2_then_hsub 0, // FIXED_REGS_and_GPR64:dsub2_then_ssub 0, // FIXED_REGS_and_GPR64:qsub1_then_bsub 0, // FIXED_REGS_and_GPR64:qsub1_then_dsub 0, // FIXED_REGS_and_GPR64:qsub1_then_hsub 0, // FIXED_REGS_and_GPR64:qsub1_then_ssub 0, // FIXED_REGS_and_GPR64:qsub3_then_bsub 0, // FIXED_REGS_and_GPR64:qsub3_then_dsub 0, // FIXED_REGS_and_GPR64:qsub3_then_hsub 0, // FIXED_REGS_and_GPR64:qsub3_then_ssub 0, // FIXED_REGS_and_GPR64:qsub2_then_bsub 0, // FIXED_REGS_and_GPR64:qsub2_then_dsub 0, // FIXED_REGS_and_GPR64:qsub2_then_hsub 0, // FIXED_REGS_and_GPR64:qsub2_then_ssub 0, // FIXED_REGS_and_GPR64:x8sub_7_then_sub_32 0, // FIXED_REGS_and_GPR64:x8sub_6_then_sub_32 0, // FIXED_REGS_and_GPR64:x8sub_5_then_sub_32 0, // FIXED_REGS_and_GPR64:x8sub_4_then_sub_32 0, // FIXED_REGS_and_GPR64:x8sub_3_then_sub_32 0, // FIXED_REGS_and_GPR64:x8sub_2_then_sub_32 0, // FIXED_REGS_and_GPR64:x8sub_1_then_sub_32 0, // FIXED_REGS_and_GPR64:subo64_then_sub_32 0, // FIXED_REGS_and_GPR64:zsub1_then_bsub 0, // FIXED_REGS_and_GPR64:zsub1_then_dsub 0, // FIXED_REGS_and_GPR64:zsub1_then_hsub 0, // FIXED_REGS_and_GPR64:zsub1_then_ssub 0, // FIXED_REGS_and_GPR64:zsub1_then_zsub 0, // FIXED_REGS_and_GPR64:zsub1_then_zsub_hi 0, // FIXED_REGS_and_GPR64:zsub3_then_bsub 0, // FIXED_REGS_and_GPR64:zsub3_then_dsub 0, // FIXED_REGS_and_GPR64:zsub3_then_hsub 0, // FIXED_REGS_and_GPR64:zsub3_then_ssub 0, // FIXED_REGS_and_GPR64:zsub3_then_zsub 0, // FIXED_REGS_and_GPR64:zsub3_then_zsub_hi 0, // FIXED_REGS_and_GPR64:zsub2_then_bsub 0, // FIXED_REGS_and_GPR64:zsub2_then_dsub 0, // FIXED_REGS_and_GPR64:zsub2_then_hsub 0, // FIXED_REGS_and_GPR64:zsub2_then_ssub 0, // FIXED_REGS_and_GPR64:zsub2_then_zsub 0, // FIXED_REGS_and_GPR64:zsub2_then_zsub_hi 0, // FIXED_REGS_and_GPR64:dsub0_dsub1 0, // FIXED_REGS_and_GPR64:dsub0_dsub1_dsub2 0, // FIXED_REGS_and_GPR64:dsub1_dsub2 0, // FIXED_REGS_and_GPR64:dsub1_dsub2_dsub3 0, // FIXED_REGS_and_GPR64:dsub2_dsub3 0, // FIXED_REGS_and_GPR64:dsub_qsub1_then_dsub 0, // FIXED_REGS_and_GPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FIXED_REGS_and_GPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // FIXED_REGS_and_GPR64:qsub0_qsub1 0, // FIXED_REGS_and_GPR64:qsub0_qsub1_qsub2 0, // FIXED_REGS_and_GPR64:qsub1_qsub2 0, // FIXED_REGS_and_GPR64:qsub1_qsub2_qsub3 0, // FIXED_REGS_and_GPR64:qsub2_qsub3 0, // FIXED_REGS_and_GPR64:qsub1_then_dsub_qsub2_then_dsub 0, // FIXED_REGS_and_GPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FIXED_REGS_and_GPR64:qsub2_then_dsub_qsub3_then_dsub 0, // FIXED_REGS_and_GPR64:sub_32_x8sub_1_then_sub_32 0, // FIXED_REGS_and_GPR64:x8sub_0_x8sub_1 0, // FIXED_REGS_and_GPR64:x8sub_2_x8sub_3 0, // FIXED_REGS_and_GPR64:x8sub_4_x8sub_5 0, // FIXED_REGS_and_GPR64:x8sub_6_x8sub_7 0, // FIXED_REGS_and_GPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // FIXED_REGS_and_GPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // FIXED_REGS_and_GPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // FIXED_REGS_and_GPR64:sub_32_subo64_then_sub_32 0, // FIXED_REGS_and_GPR64:dsub_zsub1_then_dsub 0, // FIXED_REGS_and_GPR64:zsub_zsub1_then_zsub 0, // FIXED_REGS_and_GPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FIXED_REGS_and_GPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // FIXED_REGS_and_GPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FIXED_REGS_and_GPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // FIXED_REGS_and_GPR64:zsub0_zsub1 0, // FIXED_REGS_and_GPR64:zsub0_zsub1_zsub2 0, // FIXED_REGS_and_GPR64:zsub1_zsub2 0, // FIXED_REGS_and_GPR64:zsub1_zsub2_zsub3 0, // FIXED_REGS_and_GPR64:zsub2_zsub3 0, // FIXED_REGS_and_GPR64:zsub1_then_dsub_zsub2_then_dsub 0, // FIXED_REGS_and_GPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FIXED_REGS_and_GPR64:zsub1_then_zsub_zsub2_then_zsub 0, // FIXED_REGS_and_GPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FIXED_REGS_and_GPR64:zsub2_then_dsub_zsub3_then_dsub 0, // FIXED_REGS_and_GPR64:zsub2_then_zsub_zsub3_then_zsub 0, // FIXED_REGS_and_GPR64:zsub0_zsub2 0, // FIXED_REGS_and_GPR64:zsub1_zsub3 }, { // GPR64sponly 0, // GPR64sponly:bsub 0, // GPR64sponly:dsub 0, // GPR64sponly:dsub0 0, // GPR64sponly:dsub1 0, // GPR64sponly:dsub2 0, // GPR64sponly:dsub3 0, // GPR64sponly:hsub 0, // GPR64sponly:psub0 0, // GPR64sponly:psub1 0, // GPR64sponly:qsub0 0, // GPR64sponly:qsub1 0, // GPR64sponly:qsub2 0, // GPR64sponly:qsub3 0, // GPR64sponly:ssub 29, // GPR64sponly:sub_32 -> GPR32sponly 0, // GPR64sponly:sube32 0, // GPR64sponly:sube64 0, // GPR64sponly:subo32 0, // GPR64sponly:subo64 0, // GPR64sponly:x8sub_0 0, // GPR64sponly:x8sub_1 0, // GPR64sponly:x8sub_2 0, // GPR64sponly:x8sub_3 0, // GPR64sponly:x8sub_4 0, // GPR64sponly:x8sub_5 0, // GPR64sponly:x8sub_6 0, // GPR64sponly:x8sub_7 0, // GPR64sponly:zasubb 0, // GPR64sponly:zasubd0 0, // GPR64sponly:zasubd1 0, // GPR64sponly:zasubh0 0, // GPR64sponly:zasubh1 0, // GPR64sponly:zasubq0 0, // GPR64sponly:zasubq1 0, // GPR64sponly:zasubs0 0, // GPR64sponly:zasubs1 0, // GPR64sponly:zsub 0, // GPR64sponly:zsub0 0, // GPR64sponly:zsub1 0, // GPR64sponly:zsub2 0, // GPR64sponly:zsub3 0, // GPR64sponly:zsub_hi 0, // GPR64sponly:zasubd1_then_zasubq0 0, // GPR64sponly:zasubd1_then_zasubq1 0, // GPR64sponly:zasubs1_then_zasubd0 0, // GPR64sponly:zasubs1_then_zasubd1 0, // GPR64sponly:zasubs1_then_zasubq0 0, // GPR64sponly:zasubs1_then_zasubq1 0, // GPR64sponly:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64sponly:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64sponly:zasubh1_then_zasubd0 0, // GPR64sponly:zasubh1_then_zasubd1 0, // GPR64sponly:zasubh1_then_zasubq0 0, // GPR64sponly:zasubh1_then_zasubq1 0, // GPR64sponly:zasubh1_then_zasubs0 0, // GPR64sponly:zasubh1_then_zasubs1 0, // GPR64sponly:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64sponly:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64sponly:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64sponly:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64sponly:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64sponly:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64sponly:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64sponly:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64sponly:dsub1_then_bsub 0, // GPR64sponly:dsub1_then_hsub 0, // GPR64sponly:dsub1_then_ssub 0, // GPR64sponly:dsub3_then_bsub 0, // GPR64sponly:dsub3_then_hsub 0, // GPR64sponly:dsub3_then_ssub 0, // GPR64sponly:dsub2_then_bsub 0, // GPR64sponly:dsub2_then_hsub 0, // GPR64sponly:dsub2_then_ssub 0, // GPR64sponly:qsub1_then_bsub 0, // GPR64sponly:qsub1_then_dsub 0, // GPR64sponly:qsub1_then_hsub 0, // GPR64sponly:qsub1_then_ssub 0, // GPR64sponly:qsub3_then_bsub 0, // GPR64sponly:qsub3_then_dsub 0, // GPR64sponly:qsub3_then_hsub 0, // GPR64sponly:qsub3_then_ssub 0, // GPR64sponly:qsub2_then_bsub 0, // GPR64sponly:qsub2_then_dsub 0, // GPR64sponly:qsub2_then_hsub 0, // GPR64sponly:qsub2_then_ssub 0, // GPR64sponly:x8sub_7_then_sub_32 0, // GPR64sponly:x8sub_6_then_sub_32 0, // GPR64sponly:x8sub_5_then_sub_32 0, // GPR64sponly:x8sub_4_then_sub_32 0, // GPR64sponly:x8sub_3_then_sub_32 0, // GPR64sponly:x8sub_2_then_sub_32 0, // GPR64sponly:x8sub_1_then_sub_32 0, // GPR64sponly:subo64_then_sub_32 0, // GPR64sponly:zsub1_then_bsub 0, // GPR64sponly:zsub1_then_dsub 0, // GPR64sponly:zsub1_then_hsub 0, // GPR64sponly:zsub1_then_ssub 0, // GPR64sponly:zsub1_then_zsub 0, // GPR64sponly:zsub1_then_zsub_hi 0, // GPR64sponly:zsub3_then_bsub 0, // GPR64sponly:zsub3_then_dsub 0, // GPR64sponly:zsub3_then_hsub 0, // GPR64sponly:zsub3_then_ssub 0, // GPR64sponly:zsub3_then_zsub 0, // GPR64sponly:zsub3_then_zsub_hi 0, // GPR64sponly:zsub2_then_bsub 0, // GPR64sponly:zsub2_then_dsub 0, // GPR64sponly:zsub2_then_hsub 0, // GPR64sponly:zsub2_then_ssub 0, // GPR64sponly:zsub2_then_zsub 0, // GPR64sponly:zsub2_then_zsub_hi 0, // GPR64sponly:dsub0_dsub1 0, // GPR64sponly:dsub0_dsub1_dsub2 0, // GPR64sponly:dsub1_dsub2 0, // GPR64sponly:dsub1_dsub2_dsub3 0, // GPR64sponly:dsub2_dsub3 0, // GPR64sponly:dsub_qsub1_then_dsub 0, // GPR64sponly:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64sponly:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64sponly:qsub0_qsub1 0, // GPR64sponly:qsub0_qsub1_qsub2 0, // GPR64sponly:qsub1_qsub2 0, // GPR64sponly:qsub1_qsub2_qsub3 0, // GPR64sponly:qsub2_qsub3 0, // GPR64sponly:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64sponly:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64sponly:qsub2_then_dsub_qsub3_then_dsub 0, // GPR64sponly:sub_32_x8sub_1_then_sub_32 0, // GPR64sponly:x8sub_0_x8sub_1 0, // GPR64sponly:x8sub_2_x8sub_3 0, // GPR64sponly:x8sub_4_x8sub_5 0, // GPR64sponly:x8sub_6_x8sub_7 0, // GPR64sponly:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // GPR64sponly:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // GPR64sponly:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // GPR64sponly:sub_32_subo64_then_sub_32 0, // GPR64sponly:dsub_zsub1_then_dsub 0, // GPR64sponly:zsub_zsub1_then_zsub 0, // GPR64sponly:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64sponly:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64sponly:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64sponly:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64sponly:zsub0_zsub1 0, // GPR64sponly:zsub0_zsub1_zsub2 0, // GPR64sponly:zsub1_zsub2 0, // GPR64sponly:zsub1_zsub2_zsub3 0, // GPR64sponly:zsub2_zsub3 0, // GPR64sponly:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64sponly:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64sponly:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64sponly:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64sponly:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64sponly:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64sponly:zsub0_zsub2 0, // GPR64sponly:zsub1_zsub3 }, { // DD 1, // DD:bsub -> FPR8 0, // DD:dsub 36, // DD:dsub0 -> FPR64 36, // DD:dsub1 -> FPR64 0, // DD:dsub2 0, // DD:dsub3 2, // DD:hsub -> FPR16 0, // DD:psub0 0, // DD:psub1 0, // DD:qsub0 0, // DD:qsub1 0, // DD:qsub2 0, // DD:qsub3 20, // DD:ssub -> FPR32 0, // DD:sub_32 0, // DD:sube32 0, // DD:sube64 0, // DD:subo32 0, // DD:subo64 0, // DD:x8sub_0 0, // DD:x8sub_1 0, // DD:x8sub_2 0, // DD:x8sub_3 0, // DD:x8sub_4 0, // DD:x8sub_5 0, // DD:x8sub_6 0, // DD:x8sub_7 0, // DD:zasubb 0, // DD:zasubd0 0, // DD:zasubd1 0, // DD:zasubh0 0, // DD:zasubh1 0, // DD:zasubq0 0, // DD:zasubq1 0, // DD:zasubs0 0, // DD:zasubs1 0, // DD:zsub 0, // DD:zsub0 0, // DD:zsub1 0, // DD:zsub2 0, // DD:zsub3 0, // DD:zsub_hi 0, // DD:zasubd1_then_zasubq0 0, // DD:zasubd1_then_zasubq1 0, // DD:zasubs1_then_zasubd0 0, // DD:zasubs1_then_zasubd1 0, // DD:zasubs1_then_zasubq0 0, // DD:zasubs1_then_zasubq1 0, // DD:zasubs1_then_zasubd1_then_zasubq0 0, // DD:zasubs1_then_zasubd1_then_zasubq1 0, // DD:zasubh1_then_zasubd0 0, // DD:zasubh1_then_zasubd1 0, // DD:zasubh1_then_zasubq0 0, // DD:zasubh1_then_zasubq1 0, // DD:zasubh1_then_zasubs0 0, // DD:zasubh1_then_zasubs1 0, // DD:zasubh1_then_zasubd1_then_zasubq0 0, // DD:zasubh1_then_zasubd1_then_zasubq1 0, // DD:zasubh1_then_zasubs1_then_zasubd0 0, // DD:zasubh1_then_zasubs1_then_zasubd1 0, // DD:zasubh1_then_zasubs1_then_zasubq0 0, // DD:zasubh1_then_zasubs1_then_zasubq1 0, // DD:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DD:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DD:dsub1_then_bsub -> FPR8 2, // DD:dsub1_then_hsub -> FPR16 20, // DD:dsub1_then_ssub -> FPR32 0, // DD:dsub3_then_bsub 0, // DD:dsub3_then_hsub 0, // DD:dsub3_then_ssub 0, // DD:dsub2_then_bsub 0, // DD:dsub2_then_hsub 0, // DD:dsub2_then_ssub 0, // DD:qsub1_then_bsub 0, // DD:qsub1_then_dsub 0, // DD:qsub1_then_hsub 0, // DD:qsub1_then_ssub 0, // DD:qsub3_then_bsub 0, // DD:qsub3_then_dsub 0, // DD:qsub3_then_hsub 0, // DD:qsub3_then_ssub 0, // DD:qsub2_then_bsub 0, // DD:qsub2_then_dsub 0, // DD:qsub2_then_hsub 0, // DD:qsub2_then_ssub 0, // DD:x8sub_7_then_sub_32 0, // DD:x8sub_6_then_sub_32 0, // DD:x8sub_5_then_sub_32 0, // DD:x8sub_4_then_sub_32 0, // DD:x8sub_3_then_sub_32 0, // DD:x8sub_2_then_sub_32 0, // DD:x8sub_1_then_sub_32 0, // DD:subo64_then_sub_32 0, // DD:zsub1_then_bsub 0, // DD:zsub1_then_dsub 0, // DD:zsub1_then_hsub 0, // DD:zsub1_then_ssub 0, // DD:zsub1_then_zsub 0, // DD:zsub1_then_zsub_hi 0, // DD:zsub3_then_bsub 0, // DD:zsub3_then_dsub 0, // DD:zsub3_then_hsub 0, // DD:zsub3_then_ssub 0, // DD:zsub3_then_zsub 0, // DD:zsub3_then_zsub_hi 0, // DD:zsub2_then_bsub 0, // DD:zsub2_then_dsub 0, // DD:zsub2_then_hsub 0, // DD:zsub2_then_ssub 0, // DD:zsub2_then_zsub 0, // DD:zsub2_then_zsub_hi 0, // DD:dsub0_dsub1 0, // DD:dsub0_dsub1_dsub2 0, // DD:dsub1_dsub2 0, // DD:dsub1_dsub2_dsub3 0, // DD:dsub2_dsub3 0, // DD:dsub_qsub1_then_dsub 0, // DD:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DD:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DD:qsub0_qsub1 0, // DD:qsub0_qsub1_qsub2 0, // DD:qsub1_qsub2 0, // DD:qsub1_qsub2_qsub3 0, // DD:qsub2_qsub3 0, // DD:qsub1_then_dsub_qsub2_then_dsub 0, // DD:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DD:qsub2_then_dsub_qsub3_then_dsub 0, // DD:sub_32_x8sub_1_then_sub_32 0, // DD:x8sub_0_x8sub_1 0, // DD:x8sub_2_x8sub_3 0, // DD:x8sub_4_x8sub_5 0, // DD:x8sub_6_x8sub_7 0, // DD:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DD:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DD:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DD:sub_32_subo64_then_sub_32 0, // DD:dsub_zsub1_then_dsub 0, // DD:zsub_zsub1_then_zsub 0, // DD:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DD:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DD:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DD:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DD:zsub0_zsub1 0, // DD:zsub0_zsub1_zsub2 0, // DD:zsub1_zsub2 0, // DD:zsub1_zsub2_zsub3 0, // DD:zsub2_zsub3 0, // DD:zsub1_then_dsub_zsub2_then_dsub 0, // DD:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DD:zsub1_then_zsub_zsub2_then_zsub 0, // DD:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DD:zsub2_then_dsub_zsub3_then_dsub 0, // DD:zsub2_then_zsub_zsub3_then_zsub 0, // DD:zsub0_zsub2 0, // DD:zsub1_zsub3 }, { // DD_with_dsub0_in_FPR64_lo 1, // DD_with_dsub0_in_FPR64_lo:bsub -> FPR8 0, // DD_with_dsub0_in_FPR64_lo:dsub 44, // DD_with_dsub0_in_FPR64_lo:dsub0 -> FPR64_lo 36, // DD_with_dsub0_in_FPR64_lo:dsub1 -> FPR64 0, // DD_with_dsub0_in_FPR64_lo:dsub2 0, // DD_with_dsub0_in_FPR64_lo:dsub3 3, // DD_with_dsub0_in_FPR64_lo:hsub -> FPR16_lo 0, // DD_with_dsub0_in_FPR64_lo:psub0 0, // DD_with_dsub0_in_FPR64_lo:psub1 0, // DD_with_dsub0_in_FPR64_lo:qsub0 0, // DD_with_dsub0_in_FPR64_lo:qsub1 0, // DD_with_dsub0_in_FPR64_lo:qsub2 0, // DD_with_dsub0_in_FPR64_lo:qsub3 24, // DD_with_dsub0_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DD_with_dsub0_in_FPR64_lo:sub_32 0, // DD_with_dsub0_in_FPR64_lo:sube32 0, // DD_with_dsub0_in_FPR64_lo:sube64 0, // DD_with_dsub0_in_FPR64_lo:subo32 0, // DD_with_dsub0_in_FPR64_lo:subo64 0, // DD_with_dsub0_in_FPR64_lo:x8sub_0 0, // DD_with_dsub0_in_FPR64_lo:x8sub_1 0, // DD_with_dsub0_in_FPR64_lo:x8sub_2 0, // DD_with_dsub0_in_FPR64_lo:x8sub_3 0, // DD_with_dsub0_in_FPR64_lo:x8sub_4 0, // DD_with_dsub0_in_FPR64_lo:x8sub_5 0, // DD_with_dsub0_in_FPR64_lo:x8sub_6 0, // DD_with_dsub0_in_FPR64_lo:x8sub_7 0, // DD_with_dsub0_in_FPR64_lo:zasubb 0, // DD_with_dsub0_in_FPR64_lo:zasubd0 0, // DD_with_dsub0_in_FPR64_lo:zasubd1 0, // DD_with_dsub0_in_FPR64_lo:zasubh0 0, // DD_with_dsub0_in_FPR64_lo:zasubh1 0, // DD_with_dsub0_in_FPR64_lo:zasubq0 0, // DD_with_dsub0_in_FPR64_lo:zasubq1 0, // DD_with_dsub0_in_FPR64_lo:zasubs0 0, // DD_with_dsub0_in_FPR64_lo:zasubs1 0, // DD_with_dsub0_in_FPR64_lo:zsub 0, // DD_with_dsub0_in_FPR64_lo:zsub0 0, // DD_with_dsub0_in_FPR64_lo:zsub1 0, // DD_with_dsub0_in_FPR64_lo:zsub2 0, // DD_with_dsub0_in_FPR64_lo:zsub3 0, // DD_with_dsub0_in_FPR64_lo:zsub_hi 0, // DD_with_dsub0_in_FPR64_lo:zasubd1_then_zasubq0 0, // DD_with_dsub0_in_FPR64_lo:zasubd1_then_zasubq1 0, // DD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd0 0, // DD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd1 0, // DD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubq0 0, // DD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubq1 0, // DD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // DD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd0 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd1 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubq0 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubq1 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs0 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DD_with_dsub0_in_FPR64_lo:dsub1_then_bsub -> FPR8 2, // DD_with_dsub0_in_FPR64_lo:dsub1_then_hsub -> FPR16 20, // DD_with_dsub0_in_FPR64_lo:dsub1_then_ssub -> FPR32 0, // DD_with_dsub0_in_FPR64_lo:dsub3_then_bsub 0, // DD_with_dsub0_in_FPR64_lo:dsub3_then_hsub 0, // DD_with_dsub0_in_FPR64_lo:dsub3_then_ssub 0, // DD_with_dsub0_in_FPR64_lo:dsub2_then_bsub 0, // DD_with_dsub0_in_FPR64_lo:dsub2_then_hsub 0, // DD_with_dsub0_in_FPR64_lo:dsub2_then_ssub 0, // DD_with_dsub0_in_FPR64_lo:qsub1_then_bsub 0, // DD_with_dsub0_in_FPR64_lo:qsub1_then_dsub 0, // DD_with_dsub0_in_FPR64_lo:qsub1_then_hsub 0, // DD_with_dsub0_in_FPR64_lo:qsub1_then_ssub 0, // DD_with_dsub0_in_FPR64_lo:qsub3_then_bsub 0, // DD_with_dsub0_in_FPR64_lo:qsub3_then_dsub 0, // DD_with_dsub0_in_FPR64_lo:qsub3_then_hsub 0, // DD_with_dsub0_in_FPR64_lo:qsub3_then_ssub 0, // DD_with_dsub0_in_FPR64_lo:qsub2_then_bsub 0, // DD_with_dsub0_in_FPR64_lo:qsub2_then_dsub 0, // DD_with_dsub0_in_FPR64_lo:qsub2_then_hsub 0, // DD_with_dsub0_in_FPR64_lo:qsub2_then_ssub 0, // DD_with_dsub0_in_FPR64_lo:x8sub_7_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo:x8sub_6_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo:x8sub_5_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo:x8sub_4_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo:x8sub_3_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo:x8sub_2_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo:x8sub_1_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo:subo64_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo:zsub1_then_bsub 0, // DD_with_dsub0_in_FPR64_lo:zsub1_then_dsub 0, // DD_with_dsub0_in_FPR64_lo:zsub1_then_hsub 0, // DD_with_dsub0_in_FPR64_lo:zsub1_then_ssub 0, // DD_with_dsub0_in_FPR64_lo:zsub1_then_zsub 0, // DD_with_dsub0_in_FPR64_lo:zsub1_then_zsub_hi 0, // DD_with_dsub0_in_FPR64_lo:zsub3_then_bsub 0, // DD_with_dsub0_in_FPR64_lo:zsub3_then_dsub 0, // DD_with_dsub0_in_FPR64_lo:zsub3_then_hsub 0, // DD_with_dsub0_in_FPR64_lo:zsub3_then_ssub 0, // DD_with_dsub0_in_FPR64_lo:zsub3_then_zsub 0, // DD_with_dsub0_in_FPR64_lo:zsub3_then_zsub_hi 0, // DD_with_dsub0_in_FPR64_lo:zsub2_then_bsub 0, // DD_with_dsub0_in_FPR64_lo:zsub2_then_dsub 0, // DD_with_dsub0_in_FPR64_lo:zsub2_then_hsub 0, // DD_with_dsub0_in_FPR64_lo:zsub2_then_ssub 0, // DD_with_dsub0_in_FPR64_lo:zsub2_then_zsub 0, // DD_with_dsub0_in_FPR64_lo:zsub2_then_zsub_hi 0, // DD_with_dsub0_in_FPR64_lo:dsub0_dsub1 0, // DD_with_dsub0_in_FPR64_lo:dsub0_dsub1_dsub2 0, // DD_with_dsub0_in_FPR64_lo:dsub1_dsub2 0, // DD_with_dsub0_in_FPR64_lo:dsub1_dsub2_dsub3 0, // DD_with_dsub0_in_FPR64_lo:dsub2_dsub3 0, // DD_with_dsub0_in_FPR64_lo:dsub_qsub1_then_dsub 0, // DD_with_dsub0_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DD_with_dsub0_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DD_with_dsub0_in_FPR64_lo:qsub0_qsub1 0, // DD_with_dsub0_in_FPR64_lo:qsub0_qsub1_qsub2 0, // DD_with_dsub0_in_FPR64_lo:qsub1_qsub2 0, // DD_with_dsub0_in_FPR64_lo:qsub1_qsub2_qsub3 0, // DD_with_dsub0_in_FPR64_lo:qsub2_qsub3 0, // DD_with_dsub0_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // DD_with_dsub0_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DD_with_dsub0_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // DD_with_dsub0_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo:x8sub_0_x8sub_1 0, // DD_with_dsub0_in_FPR64_lo:x8sub_2_x8sub_3 0, // DD_with_dsub0_in_FPR64_lo:x8sub_4_x8sub_5 0, // DD_with_dsub0_in_FPR64_lo:x8sub_6_x8sub_7 0, // DD_with_dsub0_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo:dsub_zsub1_then_dsub 0, // DD_with_dsub0_in_FPR64_lo:zsub_zsub1_then_zsub 0, // DD_with_dsub0_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DD_with_dsub0_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DD_with_dsub0_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DD_with_dsub0_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DD_with_dsub0_in_FPR64_lo:zsub0_zsub1 0, // DD_with_dsub0_in_FPR64_lo:zsub0_zsub1_zsub2 0, // DD_with_dsub0_in_FPR64_lo:zsub1_zsub2 0, // DD_with_dsub0_in_FPR64_lo:zsub1_zsub2_zsub3 0, // DD_with_dsub0_in_FPR64_lo:zsub2_zsub3 0, // DD_with_dsub0_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // DD_with_dsub0_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DD_with_dsub0_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // DD_with_dsub0_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DD_with_dsub0_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // DD_with_dsub0_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // DD_with_dsub0_in_FPR64_lo:zsub0_zsub2 0, // DD_with_dsub0_in_FPR64_lo:zsub1_zsub3 }, { // DD_with_dsub1_in_FPR64_lo 1, // DD_with_dsub1_in_FPR64_lo:bsub -> FPR8 0, // DD_with_dsub1_in_FPR64_lo:dsub 36, // DD_with_dsub1_in_FPR64_lo:dsub0 -> FPR64 44, // DD_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo 0, // DD_with_dsub1_in_FPR64_lo:dsub2 0, // DD_with_dsub1_in_FPR64_lo:dsub3 2, // DD_with_dsub1_in_FPR64_lo:hsub -> FPR16 0, // DD_with_dsub1_in_FPR64_lo:psub0 0, // DD_with_dsub1_in_FPR64_lo:psub1 0, // DD_with_dsub1_in_FPR64_lo:qsub0 0, // DD_with_dsub1_in_FPR64_lo:qsub1 0, // DD_with_dsub1_in_FPR64_lo:qsub2 0, // DD_with_dsub1_in_FPR64_lo:qsub3 20, // DD_with_dsub1_in_FPR64_lo:ssub -> FPR32 0, // DD_with_dsub1_in_FPR64_lo:sub_32 0, // DD_with_dsub1_in_FPR64_lo:sube32 0, // DD_with_dsub1_in_FPR64_lo:sube64 0, // DD_with_dsub1_in_FPR64_lo:subo32 0, // DD_with_dsub1_in_FPR64_lo:subo64 0, // DD_with_dsub1_in_FPR64_lo:x8sub_0 0, // DD_with_dsub1_in_FPR64_lo:x8sub_1 0, // DD_with_dsub1_in_FPR64_lo:x8sub_2 0, // DD_with_dsub1_in_FPR64_lo:x8sub_3 0, // DD_with_dsub1_in_FPR64_lo:x8sub_4 0, // DD_with_dsub1_in_FPR64_lo:x8sub_5 0, // DD_with_dsub1_in_FPR64_lo:x8sub_6 0, // DD_with_dsub1_in_FPR64_lo:x8sub_7 0, // DD_with_dsub1_in_FPR64_lo:zasubb 0, // DD_with_dsub1_in_FPR64_lo:zasubd0 0, // DD_with_dsub1_in_FPR64_lo:zasubd1 0, // DD_with_dsub1_in_FPR64_lo:zasubh0 0, // DD_with_dsub1_in_FPR64_lo:zasubh1 0, // DD_with_dsub1_in_FPR64_lo:zasubq0 0, // DD_with_dsub1_in_FPR64_lo:zasubq1 0, // DD_with_dsub1_in_FPR64_lo:zasubs0 0, // DD_with_dsub1_in_FPR64_lo:zasubs1 0, // DD_with_dsub1_in_FPR64_lo:zsub 0, // DD_with_dsub1_in_FPR64_lo:zsub0 0, // DD_with_dsub1_in_FPR64_lo:zsub1 0, // DD_with_dsub1_in_FPR64_lo:zsub2 0, // DD_with_dsub1_in_FPR64_lo:zsub3 0, // DD_with_dsub1_in_FPR64_lo:zsub_hi 0, // DD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 0, // DD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 0, // DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 0, // DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 0, // DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 0, // DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 0, // DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DD_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 3, // DD_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo 24, // DD_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DD_with_dsub1_in_FPR64_lo:dsub3_then_bsub 0, // DD_with_dsub1_in_FPR64_lo:dsub3_then_hsub 0, // DD_with_dsub1_in_FPR64_lo:dsub3_then_ssub 0, // DD_with_dsub1_in_FPR64_lo:dsub2_then_bsub 0, // DD_with_dsub1_in_FPR64_lo:dsub2_then_hsub 0, // DD_with_dsub1_in_FPR64_lo:dsub2_then_ssub 0, // DD_with_dsub1_in_FPR64_lo:qsub1_then_bsub 0, // DD_with_dsub1_in_FPR64_lo:qsub1_then_dsub 0, // DD_with_dsub1_in_FPR64_lo:qsub1_then_hsub 0, // DD_with_dsub1_in_FPR64_lo:qsub1_then_ssub 0, // DD_with_dsub1_in_FPR64_lo:qsub3_then_bsub 0, // DD_with_dsub1_in_FPR64_lo:qsub3_then_dsub 0, // DD_with_dsub1_in_FPR64_lo:qsub3_then_hsub 0, // DD_with_dsub1_in_FPR64_lo:qsub3_then_ssub 0, // DD_with_dsub1_in_FPR64_lo:qsub2_then_bsub 0, // DD_with_dsub1_in_FPR64_lo:qsub2_then_dsub 0, // DD_with_dsub1_in_FPR64_lo:qsub2_then_hsub 0, // DD_with_dsub1_in_FPR64_lo:qsub2_then_ssub 0, // DD_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 0, // DD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 0, // DD_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 0, // DD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 0, // DD_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 0, // DD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 0, // DD_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 0, // DD_with_dsub1_in_FPR64_lo:subo64_then_sub_32 0, // DD_with_dsub1_in_FPR64_lo:zsub1_then_bsub 0, // DD_with_dsub1_in_FPR64_lo:zsub1_then_dsub 0, // DD_with_dsub1_in_FPR64_lo:zsub1_then_hsub 0, // DD_with_dsub1_in_FPR64_lo:zsub1_then_ssub 0, // DD_with_dsub1_in_FPR64_lo:zsub1_then_zsub 0, // DD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi 0, // DD_with_dsub1_in_FPR64_lo:zsub3_then_bsub 0, // DD_with_dsub1_in_FPR64_lo:zsub3_then_dsub 0, // DD_with_dsub1_in_FPR64_lo:zsub3_then_hsub 0, // DD_with_dsub1_in_FPR64_lo:zsub3_then_ssub 0, // DD_with_dsub1_in_FPR64_lo:zsub3_then_zsub 0, // DD_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi 0, // DD_with_dsub1_in_FPR64_lo:zsub2_then_bsub 0, // DD_with_dsub1_in_FPR64_lo:zsub2_then_dsub 0, // DD_with_dsub1_in_FPR64_lo:zsub2_then_hsub 0, // DD_with_dsub1_in_FPR64_lo:zsub2_then_ssub 0, // DD_with_dsub1_in_FPR64_lo:zsub2_then_zsub 0, // DD_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi 0, // DD_with_dsub1_in_FPR64_lo:dsub0_dsub1 0, // DD_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 0, // DD_with_dsub1_in_FPR64_lo:dsub1_dsub2 0, // DD_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 0, // DD_with_dsub1_in_FPR64_lo:dsub2_dsub3 0, // DD_with_dsub1_in_FPR64_lo:dsub_qsub1_then_dsub 0, // DD_with_dsub1_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DD_with_dsub1_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DD_with_dsub1_in_FPR64_lo:qsub0_qsub1 0, // DD_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 0, // DD_with_dsub1_in_FPR64_lo:qsub1_qsub2 0, // DD_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 0, // DD_with_dsub1_in_FPR64_lo:qsub2_qsub3 0, // DD_with_dsub1_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // DD_with_dsub1_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DD_with_dsub1_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // DD_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // DD_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 0, // DD_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 0, // DD_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 0, // DD_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 0, // DD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DD_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // DD_with_dsub1_in_FPR64_lo:dsub_zsub1_then_dsub 0, // DD_with_dsub1_in_FPR64_lo:zsub_zsub1_then_zsub 0, // DD_with_dsub1_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DD_with_dsub1_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DD_with_dsub1_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DD_with_dsub1_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DD_with_dsub1_in_FPR64_lo:zsub0_zsub1 0, // DD_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 0, // DD_with_dsub1_in_FPR64_lo:zsub1_zsub2 0, // DD_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 0, // DD_with_dsub1_in_FPR64_lo:zsub2_zsub3 0, // DD_with_dsub1_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // DD_with_dsub1_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // DD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DD_with_dsub1_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // DD_with_dsub1_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // DD_with_dsub1_in_FPR64_lo:zsub0_zsub2 0, // DD_with_dsub1_in_FPR64_lo:zsub1_zsub3 }, { // XSeqPairsClass 0, // XSeqPairsClass:bsub 0, // XSeqPairsClass:dsub 0, // XSeqPairsClass:dsub0 0, // XSeqPairsClass:dsub1 0, // XSeqPairsClass:dsub2 0, // XSeqPairsClass:dsub3 0, // XSeqPairsClass:hsub 0, // XSeqPairsClass:psub0 0, // XSeqPairsClass:psub1 0, // XSeqPairsClass:qsub0 0, // XSeqPairsClass:qsub1 0, // XSeqPairsClass:qsub2 0, // XSeqPairsClass:qsub3 0, // XSeqPairsClass:ssub 23, // XSeqPairsClass:sub_32 -> GPR32common 0, // XSeqPairsClass:sube32 39, // XSeqPairsClass:sube64 -> GPR64common 0, // XSeqPairsClass:subo32 37, // XSeqPairsClass:subo64 -> GPR64 0, // XSeqPairsClass:x8sub_0 0, // XSeqPairsClass:x8sub_1 0, // XSeqPairsClass:x8sub_2 0, // XSeqPairsClass:x8sub_3 0, // XSeqPairsClass:x8sub_4 0, // XSeqPairsClass:x8sub_5 0, // XSeqPairsClass:x8sub_6 0, // XSeqPairsClass:x8sub_7 0, // XSeqPairsClass:zasubb 0, // XSeqPairsClass:zasubd0 0, // XSeqPairsClass:zasubd1 0, // XSeqPairsClass:zasubh0 0, // XSeqPairsClass:zasubh1 0, // XSeqPairsClass:zasubq0 0, // XSeqPairsClass:zasubq1 0, // XSeqPairsClass:zasubs0 0, // XSeqPairsClass:zasubs1 0, // XSeqPairsClass:zsub 0, // XSeqPairsClass:zsub0 0, // XSeqPairsClass:zsub1 0, // XSeqPairsClass:zsub2 0, // XSeqPairsClass:zsub3 0, // XSeqPairsClass:zsub_hi 0, // XSeqPairsClass:zasubd1_then_zasubq0 0, // XSeqPairsClass:zasubd1_then_zasubq1 0, // XSeqPairsClass:zasubs1_then_zasubd0 0, // XSeqPairsClass:zasubs1_then_zasubd1 0, // XSeqPairsClass:zasubs1_then_zasubq0 0, // XSeqPairsClass:zasubs1_then_zasubq1 0, // XSeqPairsClass:zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass:zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass:zasubh1_then_zasubd0 0, // XSeqPairsClass:zasubh1_then_zasubd1 0, // XSeqPairsClass:zasubh1_then_zasubq0 0, // XSeqPairsClass:zasubh1_then_zasubq1 0, // XSeqPairsClass:zasubh1_then_zasubs0 0, // XSeqPairsClass:zasubh1_then_zasubs1 0, // XSeqPairsClass:zasubh1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass:zasubh1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass:zasubh1_then_zasubs1_then_zasubd0 0, // XSeqPairsClass:zasubh1_then_zasubs1_then_zasubd1 0, // XSeqPairsClass:zasubh1_then_zasubs1_then_zasubq0 0, // XSeqPairsClass:zasubh1_then_zasubs1_then_zasubq1 0, // XSeqPairsClass:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass:dsub1_then_bsub 0, // XSeqPairsClass:dsub1_then_hsub 0, // XSeqPairsClass:dsub1_then_ssub 0, // XSeqPairsClass:dsub3_then_bsub 0, // XSeqPairsClass:dsub3_then_hsub 0, // XSeqPairsClass:dsub3_then_ssub 0, // XSeqPairsClass:dsub2_then_bsub 0, // XSeqPairsClass:dsub2_then_hsub 0, // XSeqPairsClass:dsub2_then_ssub 0, // XSeqPairsClass:qsub1_then_bsub 0, // XSeqPairsClass:qsub1_then_dsub 0, // XSeqPairsClass:qsub1_then_hsub 0, // XSeqPairsClass:qsub1_then_ssub 0, // XSeqPairsClass:qsub3_then_bsub 0, // XSeqPairsClass:qsub3_then_dsub 0, // XSeqPairsClass:qsub3_then_hsub 0, // XSeqPairsClass:qsub3_then_ssub 0, // XSeqPairsClass:qsub2_then_bsub 0, // XSeqPairsClass:qsub2_then_dsub 0, // XSeqPairsClass:qsub2_then_hsub 0, // XSeqPairsClass:qsub2_then_ssub 0, // XSeqPairsClass:x8sub_7_then_sub_32 0, // XSeqPairsClass:x8sub_6_then_sub_32 0, // XSeqPairsClass:x8sub_5_then_sub_32 0, // XSeqPairsClass:x8sub_4_then_sub_32 0, // XSeqPairsClass:x8sub_3_then_sub_32 0, // XSeqPairsClass:x8sub_2_then_sub_32 0, // XSeqPairsClass:x8sub_1_then_sub_32 21, // XSeqPairsClass:subo64_then_sub_32 -> GPR32 0, // XSeqPairsClass:zsub1_then_bsub 0, // XSeqPairsClass:zsub1_then_dsub 0, // XSeqPairsClass:zsub1_then_hsub 0, // XSeqPairsClass:zsub1_then_ssub 0, // XSeqPairsClass:zsub1_then_zsub 0, // XSeqPairsClass:zsub1_then_zsub_hi 0, // XSeqPairsClass:zsub3_then_bsub 0, // XSeqPairsClass:zsub3_then_dsub 0, // XSeqPairsClass:zsub3_then_hsub 0, // XSeqPairsClass:zsub3_then_ssub 0, // XSeqPairsClass:zsub3_then_zsub 0, // XSeqPairsClass:zsub3_then_zsub_hi 0, // XSeqPairsClass:zsub2_then_bsub 0, // XSeqPairsClass:zsub2_then_dsub 0, // XSeqPairsClass:zsub2_then_hsub 0, // XSeqPairsClass:zsub2_then_ssub 0, // XSeqPairsClass:zsub2_then_zsub 0, // XSeqPairsClass:zsub2_then_zsub_hi 0, // XSeqPairsClass:dsub0_dsub1 0, // XSeqPairsClass:dsub0_dsub1_dsub2 0, // XSeqPairsClass:dsub1_dsub2 0, // XSeqPairsClass:dsub1_dsub2_dsub3 0, // XSeqPairsClass:dsub2_dsub3 0, // XSeqPairsClass:dsub_qsub1_then_dsub 0, // XSeqPairsClass:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass:qsub0_qsub1 0, // XSeqPairsClass:qsub0_qsub1_qsub2 0, // XSeqPairsClass:qsub1_qsub2 0, // XSeqPairsClass:qsub1_qsub2_qsub3 0, // XSeqPairsClass:qsub2_qsub3 0, // XSeqPairsClass:qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass:qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass:sub_32_x8sub_1_then_sub_32 0, // XSeqPairsClass:x8sub_0_x8sub_1 0, // XSeqPairsClass:x8sub_2_x8sub_3 0, // XSeqPairsClass:x8sub_4_x8sub_5 0, // XSeqPairsClass:x8sub_6_x8sub_7 0, // XSeqPairsClass:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // XSeqPairsClass:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // XSeqPairsClass:x8sub_2_then_sub_32_x8sub_3_then_sub_32 30, // XSeqPairsClass:sub_32_subo64_then_sub_32 -> WSeqPairsClass 0, // XSeqPairsClass:dsub_zsub1_then_dsub 0, // XSeqPairsClass:zsub_zsub1_then_zsub 0, // XSeqPairsClass:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass:zsub0_zsub1 0, // XSeqPairsClass:zsub0_zsub1_zsub2 0, // XSeqPairsClass:zsub1_zsub2 0, // XSeqPairsClass:zsub1_zsub2_zsub3 0, // XSeqPairsClass:zsub2_zsub3 0, // XSeqPairsClass:zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass:zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass:zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass:zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass:zsub0_zsub2 0, // XSeqPairsClass:zsub1_zsub3 }, { // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 1, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:bsub -> FPR8 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub 44, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub0 -> FPR64_lo 44, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub2 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub3 3, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:hsub -> FPR16_lo 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:psub0 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:psub1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub0 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub2 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub3 24, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:sub_32 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:sube32 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:sube64 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:subo32 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:subo64 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_0 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_2 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_3 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_4 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_5 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_6 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_7 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubb 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubd0 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubd1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh0 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubq0 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubq1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubs0 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubs1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub0 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub2 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub3 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub_hi 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 3, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo 24, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub3_then_bsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub3_then_hsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub3_then_ssub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub2_then_bsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub2_then_hsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub2_then_ssub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub1_then_bsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub1_then_dsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub1_then_hsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub1_then_ssub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub3_then_bsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub3_then_dsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub3_then_hsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub3_then_ssub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub2_then_bsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub2_then_dsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub2_then_hsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub2_then_ssub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:subo64_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub1_then_bsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub1_then_dsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub1_then_hsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub1_then_ssub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub1_then_zsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub3_then_bsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub3_then_dsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub3_then_hsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub3_then_ssub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub3_then_zsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub2_then_bsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub2_then_dsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub2_then_hsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub2_then_ssub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub2_then_zsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub0_dsub1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub1_dsub2 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub2_dsub3 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub_qsub1_then_dsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub0_qsub1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub1_qsub2 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub2_qsub3 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub_zsub1_then_dsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub_zsub1_then_zsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub0_zsub1 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub1_zsub2 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub2_zsub3 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub0_zsub2 0, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo:zsub1_zsub3 }, { // XSeqPairsClass_with_subo64_in_GPR64common 0, // XSeqPairsClass_with_subo64_in_GPR64common:bsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub0 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub1 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub2 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub3 0, // XSeqPairsClass_with_subo64_in_GPR64common:hsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:psub0 0, // XSeqPairsClass_with_subo64_in_GPR64common:psub1 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub0 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub1 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub2 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub3 0, // XSeqPairsClass_with_subo64_in_GPR64common:ssub 23, // XSeqPairsClass_with_subo64_in_GPR64common:sub_32 -> GPR32common 0, // XSeqPairsClass_with_subo64_in_GPR64common:sube32 39, // XSeqPairsClass_with_subo64_in_GPR64common:sube64 -> GPR64common 0, // XSeqPairsClass_with_subo64_in_GPR64common:subo32 39, // XSeqPairsClass_with_subo64_in_GPR64common:subo64 -> GPR64common 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_0 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_1 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_2 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_3 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_4 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_5 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_6 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_7 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubb 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubd0 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubd1 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh0 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubs0 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubs1 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub0 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub1 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub2 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub3 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub_hi 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubs1_then_zasubd0 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubs1_then_zasubd1 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubs1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubs1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubd0 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubd1 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubs0 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubs1 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubs1_then_zasubd0 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubs1_then_zasubd1 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubs1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubs1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64common:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub1_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub1_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub1_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub3_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub3_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub3_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub2_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub2_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub2_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub1_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub1_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub1_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub3_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub3_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub3_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub2_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub2_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub2_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_7_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_6_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_5_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_4_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_3_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_2_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_1_then_sub_32 23, // XSeqPairsClass_with_subo64_in_GPR64common:subo64_then_sub_32 -> GPR32common 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub1_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub1_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub1_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub1_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub1_then_zsub_hi 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub3_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub3_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub3_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub3_then_zsub_hi 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub2_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub2_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub2_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub2_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub2_then_zsub_hi 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub0_dsub1 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub0_dsub1_dsub2 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub1_dsub2 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub1_dsub2_dsub3 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub2_dsub3 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub_qsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub0_qsub1 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub0_qsub1_qsub2 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub1_qsub2 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub1_qsub2_qsub3 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub2_qsub3 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:sub_32_x8sub_1_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_0_x8sub_1 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_2_x8sub_3 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_4_x8sub_5 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_6_x8sub_7 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64common:x8sub_2_then_sub_32_x8sub_3_then_sub_32 31, // XSeqPairsClass_with_subo64_in_GPR64common:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub_zsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub_zsub1_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub0_zsub1 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub0_zsub1_zsub2 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub1_zsub2 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub1_zsub2_zsub3 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub2_zsub3 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub0_zsub2 0, // XSeqPairsClass_with_subo64_in_GPR64common:zsub1_zsub3 }, { // XSeqPairsClass_with_subo64_in_GPR64noip 0, // XSeqPairsClass_with_subo64_in_GPR64noip:bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub3 0, // XSeqPairsClass_with_subo64_in_GPR64noip:hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:psub0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:psub1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub3 0, // XSeqPairsClass_with_subo64_in_GPR64noip:ssub 23, // XSeqPairsClass_with_subo64_in_GPR64noip:sub_32 -> GPR32common 0, // XSeqPairsClass_with_subo64_in_GPR64noip:sube32 39, // XSeqPairsClass_with_subo64_in_GPR64noip:sube64 -> GPR64common 0, // XSeqPairsClass_with_subo64_in_GPR64noip:subo32 40, // XSeqPairsClass_with_subo64_in_GPR64noip:subo64 -> GPR64noip 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_2 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_3 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_4 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_5 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_6 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_7 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubb 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubd0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubd1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubs0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubs1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub3 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub_hi 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubs1_then_zasubd0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubs1_then_zasubd1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubs1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubs1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubd0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubd1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubs0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubs1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub1_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub1_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub1_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub3_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub3_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub3_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub2_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub2_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub2_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub1_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub1_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub1_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub3_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub3_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub3_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub2_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub2_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub2_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_7_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_6_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_5_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_4_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_3_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_2_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_1_then_sub_32 21, // XSeqPairsClass_with_subo64_in_GPR64noip:subo64_then_sub_32 -> GPR32 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub1_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub1_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub1_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub1_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub1_then_zsub_hi 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub3_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub3_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub3_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub3_then_zsub_hi 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub2_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub2_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub2_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub2_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub2_then_zsub_hi 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub0_dsub1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub0_dsub1_dsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub1_dsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub1_dsub2_dsub3 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub2_dsub3 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub_qsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub0_qsub1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub0_qsub1_qsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub1_qsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub1_qsub2_qsub3 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub2_qsub3 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:sub_32_x8sub_1_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_0_x8sub_1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_2_x8sub_3 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_4_x8sub_5 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_6_x8sub_7 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 30, // XSeqPairsClass_with_subo64_in_GPR64noip:sub_32_subo64_then_sub_32 -> WSeqPairsClass 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub_zsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub_zsub1_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub0_zsub1 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub0_zsub1_zsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub1_zsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub1_zsub2_zsub3 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub2_zsub3 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub0_zsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip:zsub1_zsub3 }, { // XSeqPairsClass_with_sube64_in_GPR64noip 0, // XSeqPairsClass_with_sube64_in_GPR64noip:bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub3 0, // XSeqPairsClass_with_sube64_in_GPR64noip:hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:psub0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:psub1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub3 0, // XSeqPairsClass_with_sube64_in_GPR64noip:ssub 23, // XSeqPairsClass_with_sube64_in_GPR64noip:sub_32 -> GPR32common 0, // XSeqPairsClass_with_sube64_in_GPR64noip:sube32 41, // XSeqPairsClass_with_sube64_in_GPR64noip:sube64 -> GPR64common_and_GPR64noip 0, // XSeqPairsClass_with_sube64_in_GPR64noip:subo32 41, // XSeqPairsClass_with_sube64_in_GPR64noip:subo64 -> GPR64common_and_GPR64noip 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_2 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_3 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_4 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_5 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_6 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_7 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubb 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubd0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubd1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubq0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubq1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubs0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubs1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub3 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub_hi 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubs1_then_zasubd0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubs1_then_zasubd1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubs1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubs1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubd0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubd1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubs0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubs1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub1_then_bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub1_then_hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub1_then_ssub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub3_then_bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub3_then_hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub3_then_ssub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub2_then_bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub2_then_hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub2_then_ssub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub1_then_bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub1_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub1_then_hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub1_then_ssub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub3_then_bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub3_then_hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub3_then_ssub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub2_then_bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub2_then_hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub2_then_ssub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_7_then_sub_32 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_6_then_sub_32 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_5_then_sub_32 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_4_then_sub_32 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_3_then_sub_32 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_2_then_sub_32 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_1_then_sub_32 23, // XSeqPairsClass_with_sube64_in_GPR64noip:subo64_then_sub_32 -> GPR32common 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub1_then_bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub1_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub1_then_hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub1_then_ssub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub1_then_zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub1_then_zsub_hi 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub3_then_bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub3_then_hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub3_then_ssub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub3_then_zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub3_then_zsub_hi 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub2_then_bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub2_then_hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub2_then_ssub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub2_then_zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub2_then_zsub_hi 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub0_dsub1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub0_dsub1_dsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub1_dsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub1_dsub2_dsub3 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub2_dsub3 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub_qsub1_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub0_qsub1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub0_qsub1_qsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub1_qsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub1_qsub2_qsub3 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub2_qsub3 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:sub_32_x8sub_1_then_sub_32 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_0_x8sub_1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_2_x8sub_3 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_4_x8sub_5 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_6_x8sub_7 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // XSeqPairsClass_with_sube64_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 31, // XSeqPairsClass_with_sube64_in_GPR64noip:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub_zsub1_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub_zsub1_then_zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub0_zsub1 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub0_zsub1_zsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub1_zsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub1_zsub2_zsub3 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub2_zsub3 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub0_zsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip:zsub1_zsub3 }, { // XSeqPairsClass_with_sube64_in_tcGPR64 0, // XSeqPairsClass_with_sube64_in_tcGPR64:bsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub2 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub3 0, // XSeqPairsClass_with_sube64_in_tcGPR64:hsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:psub0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:psub1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub2 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub3 0, // XSeqPairsClass_with_sube64_in_tcGPR64:ssub 23, // XSeqPairsClass_with_sube64_in_tcGPR64:sub_32 -> GPR32common 0, // XSeqPairsClass_with_sube64_in_tcGPR64:sube32 42, // XSeqPairsClass_with_sube64_in_tcGPR64:sube64 -> tcGPR64 0, // XSeqPairsClass_with_sube64_in_tcGPR64:subo32 39, // XSeqPairsClass_with_sube64_in_tcGPR64:subo64 -> GPR64common 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_2 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_3 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_4 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_5 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_6 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_7 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubb 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubd0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubd1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubq0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubq1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubs0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubs1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub2 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub3 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub_hi 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubs1_then_zasubd0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubs1_then_zasubd1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubs1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubs1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubd0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubd1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubs0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubs1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub1_then_bsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub1_then_hsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub1_then_ssub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub3_then_bsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub3_then_hsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub3_then_ssub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub2_then_bsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub2_then_hsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub2_then_ssub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub1_then_bsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub1_then_dsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub1_then_hsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub1_then_ssub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub3_then_bsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub3_then_hsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub3_then_ssub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub2_then_bsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub2_then_hsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub2_then_ssub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_7_then_sub_32 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_6_then_sub_32 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_5_then_sub_32 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_4_then_sub_32 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_3_then_sub_32 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_2_then_sub_32 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_1_then_sub_32 23, // XSeqPairsClass_with_sube64_in_tcGPR64:subo64_then_sub_32 -> GPR32common 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub1_then_bsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub1_then_dsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub1_then_hsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub1_then_ssub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub1_then_zsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub1_then_zsub_hi 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub3_then_bsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub3_then_hsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub3_then_ssub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub3_then_zsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub3_then_zsub_hi 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub2_then_bsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub2_then_hsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub2_then_ssub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub2_then_zsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub2_then_zsub_hi 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub0_dsub1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub0_dsub1_dsub2 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub1_dsub2 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub1_dsub2_dsub3 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub2_dsub3 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub_qsub1_then_dsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub0_qsub1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub0_qsub1_qsub2 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub1_qsub2 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub1_qsub2_qsub3 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub2_qsub3 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:sub_32_x8sub_1_then_sub_32 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_0_x8sub_1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_2_x8sub_3 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_4_x8sub_5 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_6_x8sub_7 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // XSeqPairsClass_with_sube64_in_tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 31, // XSeqPairsClass_with_sube64_in_tcGPR64:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub_zsub1_then_dsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub_zsub1_then_zsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub0_zsub1 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub0_zsub1_zsub2 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub1_zsub2 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub1_zsub2_zsub3 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub2_zsub3 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub0_zsub2 0, // XSeqPairsClass_with_sube64_in_tcGPR64:zsub1_zsub3 }, { // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub3 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:psub0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:psub1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub3 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:ssub 23, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:sub_32 -> GPR32common 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:sube32 43, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:sube64 -> GPR64noip_and_tcGPR64 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:subo32 41, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:subo64 -> GPR64common_and_GPR64noip 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_2 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_3 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_4 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_5 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_6 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_7 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubb 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubd0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubd1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubh0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubh1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubq0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubq1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubs0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubs1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub3 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub_hi 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub1_then_bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub1_then_hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub1_then_ssub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub3_then_bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub3_then_hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub3_then_ssub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub2_then_bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub2_then_hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub2_then_ssub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub1_then_bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub1_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub1_then_hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub1_then_ssub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub3_then_bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub3_then_hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub3_then_ssub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub2_then_bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub2_then_hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub2_then_ssub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_7_then_sub_32 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_5_then_sub_32 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_3_then_sub_32 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_1_then_sub_32 23, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:subo64_then_sub_32 -> GPR32common 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub1_then_bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub1_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub1_then_hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub1_then_ssub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub1_then_zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_hi 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub3_then_bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub3_then_hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub3_then_ssub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub3_then_zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub3_then_zsub_hi 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub2_then_bsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub2_then_hsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub2_then_ssub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub2_then_zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_hi 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub0_dsub1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub0_dsub1_dsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub1_dsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub1_dsub2_dsub3 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub2_dsub3 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub0_qsub1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub0_qsub1_qsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub1_qsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub1_qsub2_qsub3 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub2_qsub3 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:sub_32_x8sub_1_then_sub_32 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_0_x8sub_1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_2_x8sub_3 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_4_x8sub_5 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_6_x8sub_7 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 31, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub0_zsub1 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub0_zsub1_zsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub1_zsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub1_zsub2_zsub3 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub2_zsub3 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub0_zsub2 0, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64:zsub1_zsub3 }, { // XSeqPairsClass_with_subo64_in_tcGPR64 0, // XSeqPairsClass_with_subo64_in_tcGPR64:bsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub2 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub3 0, // XSeqPairsClass_with_subo64_in_tcGPR64:hsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:psub0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:psub1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub2 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub3 0, // XSeqPairsClass_with_subo64_in_tcGPR64:ssub 23, // XSeqPairsClass_with_subo64_in_tcGPR64:sub_32 -> GPR32common 0, // XSeqPairsClass_with_subo64_in_tcGPR64:sube32 42, // XSeqPairsClass_with_subo64_in_tcGPR64:sube64 -> tcGPR64 0, // XSeqPairsClass_with_subo64_in_tcGPR64:subo32 42, // XSeqPairsClass_with_subo64_in_tcGPR64:subo64 -> tcGPR64 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_2 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_3 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_4 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_5 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_6 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_7 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubb 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubd0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubd1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubq0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubq1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubs0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubs1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub2 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub3 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub_hi 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubs1_then_zasubd0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubs1_then_zasubd1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubs1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubs1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubd0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubd1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubs0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubs1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub1_then_bsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub1_then_hsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub1_then_ssub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub3_then_bsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub3_then_hsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub3_then_ssub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub2_then_bsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub2_then_hsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub2_then_ssub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub1_then_bsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub1_then_hsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub1_then_ssub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub3_then_bsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub3_then_hsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub3_then_ssub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub2_then_bsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub2_then_hsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub2_then_ssub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_7_then_sub_32 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_6_then_sub_32 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_5_then_sub_32 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_4_then_sub_32 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_3_then_sub_32 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_2_then_sub_32 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_1_then_sub_32 23, // XSeqPairsClass_with_subo64_in_tcGPR64:subo64_then_sub_32 -> GPR32common 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub1_then_bsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub1_then_hsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub1_then_ssub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub1_then_zsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub1_then_zsub_hi 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub3_then_bsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub3_then_hsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub3_then_ssub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub3_then_zsub_hi 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub2_then_bsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub2_then_hsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub2_then_ssub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub2_then_zsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub2_then_zsub_hi 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub0_dsub1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub0_dsub1_dsub2 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub1_dsub2 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub1_dsub2_dsub3 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub2_dsub3 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub_qsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub0_qsub1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub0_qsub1_qsub2 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub1_qsub2 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub1_qsub2_qsub3 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub2_qsub3 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:sub_32_x8sub_1_then_sub_32 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_0_x8sub_1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_2_x8sub_3 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_4_x8sub_5 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_6_x8sub_7 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // XSeqPairsClass_with_subo64_in_tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 31, // XSeqPairsClass_with_subo64_in_tcGPR64:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub_zsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub_zsub1_then_zsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub0_zsub1 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub0_zsub1_zsub2 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub1_zsub2 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub1_zsub2_zsub3 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub2_zsub3 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub0_zsub2 0, // XSeqPairsClass_with_subo64_in_tcGPR64:zsub1_zsub3 }, { // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub3 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:psub0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:psub1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub3 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:ssub 23, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:sub_32 -> GPR32common 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:sube32 43, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:sube64 -> GPR64noip_and_tcGPR64 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:subo32 43, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:subo64 -> GPR64noip_and_tcGPR64 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_2 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_3 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_4 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_5 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_6 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_7 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubb 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubd0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubd1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubh0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubh1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubs0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubs1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub3 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub_hi 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub1_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub1_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub1_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub3_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub3_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub3_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub2_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub2_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub2_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub1_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub1_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub1_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub3_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub3_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub3_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub2_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub2_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub2_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_7_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_5_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_3_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_1_then_sub_32 23, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:subo64_then_sub_32 -> GPR32common 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub1_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub1_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub1_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub1_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_hi 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub3_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub3_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub3_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub3_then_zsub_hi 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub2_then_bsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub2_then_hsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub2_then_ssub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub2_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_hi 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub0_dsub1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub0_dsub1_dsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub1_dsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub1_dsub2_dsub3 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub2_dsub3 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub0_qsub1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub0_qsub1_qsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub1_qsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub1_qsub2_qsub3 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub2_qsub3 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:sub_32_x8sub_1_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_0_x8sub_1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_2_x8sub_3 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_4_x8sub_5 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_6_x8sub_7 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 31, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub0_zsub1 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub0_zsub1_zsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub1_zsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub1_zsub2_zsub3 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub2_zsub3 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub0_zsub2 0, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64:zsub1_zsub3 }, { // XSeqPairsClass_with_sub_32_in_GPR32arg 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:bsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub2 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub3 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:hsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:psub0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:psub1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub2 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub3 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:ssub 25, // XSeqPairsClass_with_sub_32_in_GPR32arg:sub_32 -> GPR32arg 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:sube32 45, // XSeqPairsClass_with_sub_32_in_GPR32arg:sube64 -> GPR64arg 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:subo32 45, // XSeqPairsClass_with_sub_32_in_GPR32arg:subo64 -> GPR64arg 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_2 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_3 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_4 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_5 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_6 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_7 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubb 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubd0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubd1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubh0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubh1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubq0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubq1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubs0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubs1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub2 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub3 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub_hi 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubs1_then_zasubd0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubs1_then_zasubd1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubs1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubs1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubh1_then_zasubd0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubh1_then_zasubd1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubh1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubh1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubh1_then_zasubs0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubh1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubh1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub1_then_bsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub1_then_hsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub1_then_ssub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub3_then_bsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub3_then_hsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub3_then_ssub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub2_then_bsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub2_then_hsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub2_then_ssub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub1_then_bsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub1_then_dsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub1_then_hsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub1_then_ssub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub3_then_bsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub3_then_hsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub3_then_ssub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub2_then_bsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub2_then_dsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub2_then_hsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub2_then_ssub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_7_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_6_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_5_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_4_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_3_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_2_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_1_then_sub_32 25, // XSeqPairsClass_with_sub_32_in_GPR32arg:subo64_then_sub_32 -> GPR32arg 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub1_then_bsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub1_then_dsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub1_then_hsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub1_then_ssub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub1_then_zsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub1_then_zsub_hi 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub3_then_bsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub3_then_hsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub3_then_ssub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub3_then_zsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub3_then_zsub_hi 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub2_then_bsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub2_then_dsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub2_then_hsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub2_then_ssub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub2_then_zsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub2_then_zsub_hi 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub0_dsub1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub0_dsub1_dsub2 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub1_dsub2 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub1_dsub2_dsub3 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub2_dsub3 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub_qsub1_then_dsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub0_qsub1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub0_qsub1_qsub2 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub1_qsub2 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub1_qsub2_qsub3 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub2_qsub3 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:sub_32_x8sub_1_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_0_x8sub_1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_2_x8sub_3 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_4_x8sub_5 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_6_x8sub_7 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:x8sub_2_then_sub_32_x8sub_3_then_sub_32 32, // XSeqPairsClass_with_sub_32_in_GPR32arg:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub_zsub1_then_dsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub_zsub1_then_zsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub0_zsub1 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub0_zsub1_zsub2 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub1_zsub2 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub1_zsub2_zsub3 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub2_zsub3 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub0_zsub2 0, // XSeqPairsClass_with_sub_32_in_GPR32arg:zsub1_zsub3 }, { // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:psub0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:psub1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:ssub 26, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32 -> MatrixIndexGPR32_12_15 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:sube32 47, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:sube64 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:subo32 47, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:subo64 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubb 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubq0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubq1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_hi 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_ssub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_ssub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_ssub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_ssub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_ssub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_ssub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1_then_sub_32 26, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:subo64_then_sub_32 -> MatrixIndexGPR32_12_15 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_ssub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_hi 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_ssub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_zsub_hi 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_ssub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub_hi 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0_dsub1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0_dsub1_dsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_dsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_dsub2_dsub3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_dsub3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_qsub1_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0_qsub1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0_qsub1_qsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_qsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_qsub2_qsub3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_qsub3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_x8sub_1_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_0_x8sub_1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_x8sub_3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_x8sub_5 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_x8sub_7 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 33, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_zsub1_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_zsub1_then_zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub1_zsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub2_zsub3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_zsub3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub3 }, { // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:ssub 27, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> MatrixIndexGPR32_8_11 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 48, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 48, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_ssub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_ssub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_ssub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 27, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 -> MatrixIndexGPR32_8_11 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_ssub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_ssub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_bsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_hsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_ssub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 34, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 0, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 }, { // XSeqPairsClass_with_sube64_in_rtcGPR64 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:bsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub2 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub3 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:hsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:psub0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:psub1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub2 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub3 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:ssub 23, // XSeqPairsClass_with_sube64_in_rtcGPR64:sub_32 -> GPR32common 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:sube32 50, // XSeqPairsClass_with_sube64_in_rtcGPR64:sube64 -> rtcGPR64 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:subo32 50, // XSeqPairsClass_with_sube64_in_rtcGPR64:subo64 -> rtcGPR64 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_2 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_3 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_4 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_5 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_6 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_7 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubb 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubd0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubd1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubh0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubh1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubq0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubq1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubs0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubs1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub2 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub3 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub_hi 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubs1_then_zasubd0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubs1_then_zasubd1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubs1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubs1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubh1_then_zasubd0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubh1_then_zasubd1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubh1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubh1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubh1_then_zasubs0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubh1_then_zasubs1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub1_then_bsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub1_then_hsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub1_then_ssub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub3_then_bsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub3_then_hsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub3_then_ssub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub2_then_bsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub2_then_hsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub2_then_ssub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub1_then_bsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub1_then_dsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub1_then_hsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub1_then_ssub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub3_then_bsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub3_then_hsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub3_then_ssub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub2_then_bsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub2_then_hsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub2_then_ssub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_7_then_sub_32 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_6_then_sub_32 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_5_then_sub_32 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_4_then_sub_32 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_3_then_sub_32 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_2_then_sub_32 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_1_then_sub_32 23, // XSeqPairsClass_with_sube64_in_rtcGPR64:subo64_then_sub_32 -> GPR32common 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub1_then_bsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub1_then_dsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub1_then_hsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub1_then_ssub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub1_then_zsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub1_then_zsub_hi 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub3_then_bsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub3_then_hsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub3_then_ssub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub3_then_zsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub3_then_zsub_hi 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub2_then_bsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub2_then_hsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub2_then_ssub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub2_then_zsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub2_then_zsub_hi 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub0_dsub1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub0_dsub1_dsub2 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub1_dsub2 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub1_dsub2_dsub3 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub2_dsub3 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub_qsub1_then_dsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub0_qsub1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub0_qsub1_qsub2 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub1_qsub2 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub1_qsub2_qsub3 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub2_qsub3 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:sub_32_x8sub_1_then_sub_32 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_0_x8sub_1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_2_x8sub_3 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_4_x8sub_5 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_6_x8sub_7 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 31, // XSeqPairsClass_with_sube64_in_rtcGPR64:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub_zsub1_then_dsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub_zsub1_then_zsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub0_zsub1 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub0_zsub1_zsub2 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub1_zsub2 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub1_zsub2_zsub3 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub2_zsub3 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub0_zsub2 0, // XSeqPairsClass_with_sube64_in_rtcGPR64:zsub1_zsub3 }, { // XSeqPairsClass_with_subo64_in_FIXED_REGS 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:bsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub2 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub3 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:hsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:psub0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:psub1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub2 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub3 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:ssub 23, // XSeqPairsClass_with_subo64_in_FIXED_REGS:sub_32 -> GPR32common 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:sube32 41, // XSeqPairsClass_with_subo64_in_FIXED_REGS:sube64 -> GPR64common_and_GPR64noip 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:subo32 51, // XSeqPairsClass_with_subo64_in_FIXED_REGS:subo64 -> FIXED_REGS_and_GPR64 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_2 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_3 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_4 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_5 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_6 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_7 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubb 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubd0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubd1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubq0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubq1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubs0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubs1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub2 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub3 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub_hi 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubs1_then_zasubd0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubs1_then_zasubd1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubs1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubs1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubd0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubd1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubs0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubs1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubd0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubd1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub1_then_bsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub1_then_hsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub1_then_ssub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub3_then_bsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub3_then_hsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub3_then_ssub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub2_then_bsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub2_then_hsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub2_then_ssub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub1_then_bsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub1_then_hsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub1_then_ssub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub3_then_bsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub3_then_hsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub3_then_ssub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub2_then_bsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub2_then_hsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub2_then_ssub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_7_then_sub_32 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_6_then_sub_32 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_5_then_sub_32 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_4_then_sub_32 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_3_then_sub_32 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_2_then_sub_32 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_1_then_sub_32 23, // XSeqPairsClass_with_subo64_in_FIXED_REGS:subo64_then_sub_32 -> GPR32common 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub1_then_bsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub1_then_hsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub1_then_ssub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub1_then_zsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub1_then_zsub_hi 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub3_then_bsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub3_then_hsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub3_then_ssub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub3_then_zsub_hi 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub2_then_bsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub2_then_hsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub2_then_ssub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub2_then_zsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub2_then_zsub_hi 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub0_dsub1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub0_dsub1_dsub2 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub1_dsub2 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub1_dsub2_dsub3 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub2_dsub3 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub_qsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub0_qsub1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub0_qsub1_qsub2 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub1_qsub2 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub1_qsub2_qsub3 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub2_qsub3 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub1_then_dsub_qsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:qsub2_then_dsub_qsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:sub_32_x8sub_1_then_sub_32 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_0_x8sub_1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_2_x8sub_3 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_4_x8sub_5 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_6_x8sub_7 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:x8sub_2_then_sub_32_x8sub_3_then_sub_32 31, // XSeqPairsClass_with_subo64_in_FIXED_REGS:sub_32_subo64_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub_zsub1_then_dsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub_zsub1_then_zsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub0_zsub1 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub0_zsub1_zsub2 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub1_zsub2 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub1_zsub2_zsub3 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub2_zsub3 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub1_then_dsub_zsub2_then_dsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub1_then_zsub_zsub2_then_zsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub2_then_dsub_zsub3_then_dsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub2_then_zsub_zsub3_then_zsub 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub0_zsub2 0, // XSeqPairsClass_with_subo64_in_FIXED_REGS:zsub1_zsub3 }, { // FPR128 1, // FPR128:bsub -> FPR8 36, // FPR128:dsub -> FPR64 0, // FPR128:dsub0 0, // FPR128:dsub1 0, // FPR128:dsub2 0, // FPR128:dsub3 2, // FPR128:hsub -> FPR16 0, // FPR128:psub0 0, // FPR128:psub1 0, // FPR128:qsub0 0, // FPR128:qsub1 0, // FPR128:qsub2 0, // FPR128:qsub3 20, // FPR128:ssub -> FPR32 0, // FPR128:sub_32 0, // FPR128:sube32 0, // FPR128:sube64 0, // FPR128:subo32 0, // FPR128:subo64 0, // FPR128:x8sub_0 0, // FPR128:x8sub_1 0, // FPR128:x8sub_2 0, // FPR128:x8sub_3 0, // FPR128:x8sub_4 0, // FPR128:x8sub_5 0, // FPR128:x8sub_6 0, // FPR128:x8sub_7 0, // FPR128:zasubb 0, // FPR128:zasubd0 0, // FPR128:zasubd1 0, // FPR128:zasubh0 0, // FPR128:zasubh1 0, // FPR128:zasubq0 0, // FPR128:zasubq1 0, // FPR128:zasubs0 0, // FPR128:zasubs1 0, // FPR128:zsub 0, // FPR128:zsub0 0, // FPR128:zsub1 0, // FPR128:zsub2 0, // FPR128:zsub3 0, // FPR128:zsub_hi 0, // FPR128:zasubd1_then_zasubq0 0, // FPR128:zasubd1_then_zasubq1 0, // FPR128:zasubs1_then_zasubd0 0, // FPR128:zasubs1_then_zasubd1 0, // FPR128:zasubs1_then_zasubq0 0, // FPR128:zasubs1_then_zasubq1 0, // FPR128:zasubs1_then_zasubd1_then_zasubq0 0, // FPR128:zasubs1_then_zasubd1_then_zasubq1 0, // FPR128:zasubh1_then_zasubd0 0, // FPR128:zasubh1_then_zasubd1 0, // FPR128:zasubh1_then_zasubq0 0, // FPR128:zasubh1_then_zasubq1 0, // FPR128:zasubh1_then_zasubs0 0, // FPR128:zasubh1_then_zasubs1 0, // FPR128:zasubh1_then_zasubd1_then_zasubq0 0, // FPR128:zasubh1_then_zasubd1_then_zasubq1 0, // FPR128:zasubh1_then_zasubs1_then_zasubd0 0, // FPR128:zasubh1_then_zasubs1_then_zasubd1 0, // FPR128:zasubh1_then_zasubs1_then_zasubq0 0, // FPR128:zasubh1_then_zasubs1_then_zasubq1 0, // FPR128:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // FPR128:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // FPR128:dsub1_then_bsub 0, // FPR128:dsub1_then_hsub 0, // FPR128:dsub1_then_ssub 0, // FPR128:dsub3_then_bsub 0, // FPR128:dsub3_then_hsub 0, // FPR128:dsub3_then_ssub 0, // FPR128:dsub2_then_bsub 0, // FPR128:dsub2_then_hsub 0, // FPR128:dsub2_then_ssub 0, // FPR128:qsub1_then_bsub 0, // FPR128:qsub1_then_dsub 0, // FPR128:qsub1_then_hsub 0, // FPR128:qsub1_then_ssub 0, // FPR128:qsub3_then_bsub 0, // FPR128:qsub3_then_dsub 0, // FPR128:qsub3_then_hsub 0, // FPR128:qsub3_then_ssub 0, // FPR128:qsub2_then_bsub 0, // FPR128:qsub2_then_dsub 0, // FPR128:qsub2_then_hsub 0, // FPR128:qsub2_then_ssub 0, // FPR128:x8sub_7_then_sub_32 0, // FPR128:x8sub_6_then_sub_32 0, // FPR128:x8sub_5_then_sub_32 0, // FPR128:x8sub_4_then_sub_32 0, // FPR128:x8sub_3_then_sub_32 0, // FPR128:x8sub_2_then_sub_32 0, // FPR128:x8sub_1_then_sub_32 0, // FPR128:subo64_then_sub_32 0, // FPR128:zsub1_then_bsub 0, // FPR128:zsub1_then_dsub 0, // FPR128:zsub1_then_hsub 0, // FPR128:zsub1_then_ssub 0, // FPR128:zsub1_then_zsub 0, // FPR128:zsub1_then_zsub_hi 0, // FPR128:zsub3_then_bsub 0, // FPR128:zsub3_then_dsub 0, // FPR128:zsub3_then_hsub 0, // FPR128:zsub3_then_ssub 0, // FPR128:zsub3_then_zsub 0, // FPR128:zsub3_then_zsub_hi 0, // FPR128:zsub2_then_bsub 0, // FPR128:zsub2_then_dsub 0, // FPR128:zsub2_then_hsub 0, // FPR128:zsub2_then_ssub 0, // FPR128:zsub2_then_zsub 0, // FPR128:zsub2_then_zsub_hi 0, // FPR128:dsub0_dsub1 0, // FPR128:dsub0_dsub1_dsub2 0, // FPR128:dsub1_dsub2 0, // FPR128:dsub1_dsub2_dsub3 0, // FPR128:dsub2_dsub3 0, // FPR128:dsub_qsub1_then_dsub 0, // FPR128:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FPR128:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // FPR128:qsub0_qsub1 0, // FPR128:qsub0_qsub1_qsub2 0, // FPR128:qsub1_qsub2 0, // FPR128:qsub1_qsub2_qsub3 0, // FPR128:qsub2_qsub3 0, // FPR128:qsub1_then_dsub_qsub2_then_dsub 0, // FPR128:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FPR128:qsub2_then_dsub_qsub3_then_dsub 0, // FPR128:sub_32_x8sub_1_then_sub_32 0, // FPR128:x8sub_0_x8sub_1 0, // FPR128:x8sub_2_x8sub_3 0, // FPR128:x8sub_4_x8sub_5 0, // FPR128:x8sub_6_x8sub_7 0, // FPR128:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // FPR128:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // FPR128:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // FPR128:sub_32_subo64_then_sub_32 0, // FPR128:dsub_zsub1_then_dsub 0, // FPR128:zsub_zsub1_then_zsub 0, // FPR128:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FPR128:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // FPR128:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FPR128:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // FPR128:zsub0_zsub1 0, // FPR128:zsub0_zsub1_zsub2 0, // FPR128:zsub1_zsub2 0, // FPR128:zsub1_zsub2_zsub3 0, // FPR128:zsub2_zsub3 0, // FPR128:zsub1_then_dsub_zsub2_then_dsub 0, // FPR128:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FPR128:zsub1_then_zsub_zsub2_then_zsub 0, // FPR128:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FPR128:zsub2_then_dsub_zsub3_then_dsub 0, // FPR128:zsub2_then_zsub_zsub3_then_zsub 0, // FPR128:zsub0_zsub2 0, // FPR128:zsub1_zsub3 }, { // ZPR 1, // ZPR:bsub -> FPR8 36, // ZPR:dsub -> FPR64 0, // ZPR:dsub0 0, // ZPR:dsub1 0, // ZPR:dsub2 0, // ZPR:dsub3 2, // ZPR:hsub -> FPR16 0, // ZPR:psub0 0, // ZPR:psub1 0, // ZPR:qsub0 0, // ZPR:qsub1 0, // ZPR:qsub2 0, // ZPR:qsub3 20, // ZPR:ssub -> FPR32 0, // ZPR:sub_32 0, // ZPR:sube32 0, // ZPR:sube64 0, // ZPR:subo32 0, // ZPR:subo64 0, // ZPR:x8sub_0 0, // ZPR:x8sub_1 0, // ZPR:x8sub_2 0, // ZPR:x8sub_3 0, // ZPR:x8sub_4 0, // ZPR:x8sub_5 0, // ZPR:x8sub_6 0, // ZPR:x8sub_7 0, // ZPR:zasubb 0, // ZPR:zasubd0 0, // ZPR:zasubd1 0, // ZPR:zasubh0 0, // ZPR:zasubh1 0, // ZPR:zasubq0 0, // ZPR:zasubq1 0, // ZPR:zasubs0 0, // ZPR:zasubs1 70, // ZPR:zsub -> FPR128 0, // ZPR:zsub0 0, // ZPR:zsub1 0, // ZPR:zsub2 0, // ZPR:zsub3 0, // ZPR:zsub_hi 0, // ZPR:zasubd1_then_zasubq0 0, // ZPR:zasubd1_then_zasubq1 0, // ZPR:zasubs1_then_zasubd0 0, // ZPR:zasubs1_then_zasubd1 0, // ZPR:zasubs1_then_zasubq0 0, // ZPR:zasubs1_then_zasubq1 0, // ZPR:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR:zasubh1_then_zasubd0 0, // ZPR:zasubh1_then_zasubd1 0, // ZPR:zasubh1_then_zasubq0 0, // ZPR:zasubh1_then_zasubq1 0, // ZPR:zasubh1_then_zasubs0 0, // ZPR:zasubh1_then_zasubs1 0, // ZPR:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR:dsub1_then_bsub 0, // ZPR:dsub1_then_hsub 0, // ZPR:dsub1_then_ssub 0, // ZPR:dsub3_then_bsub 0, // ZPR:dsub3_then_hsub 0, // ZPR:dsub3_then_ssub 0, // ZPR:dsub2_then_bsub 0, // ZPR:dsub2_then_hsub 0, // ZPR:dsub2_then_ssub 0, // ZPR:qsub1_then_bsub 0, // ZPR:qsub1_then_dsub 0, // ZPR:qsub1_then_hsub 0, // ZPR:qsub1_then_ssub 0, // ZPR:qsub3_then_bsub 0, // ZPR:qsub3_then_dsub 0, // ZPR:qsub3_then_hsub 0, // ZPR:qsub3_then_ssub 0, // ZPR:qsub2_then_bsub 0, // ZPR:qsub2_then_dsub 0, // ZPR:qsub2_then_hsub 0, // ZPR:qsub2_then_ssub 0, // ZPR:x8sub_7_then_sub_32 0, // ZPR:x8sub_6_then_sub_32 0, // ZPR:x8sub_5_then_sub_32 0, // ZPR:x8sub_4_then_sub_32 0, // ZPR:x8sub_3_then_sub_32 0, // ZPR:x8sub_2_then_sub_32 0, // ZPR:x8sub_1_then_sub_32 0, // ZPR:subo64_then_sub_32 0, // ZPR:zsub1_then_bsub 0, // ZPR:zsub1_then_dsub 0, // ZPR:zsub1_then_hsub 0, // ZPR:zsub1_then_ssub 0, // ZPR:zsub1_then_zsub 0, // ZPR:zsub1_then_zsub_hi 0, // ZPR:zsub3_then_bsub 0, // ZPR:zsub3_then_dsub 0, // ZPR:zsub3_then_hsub 0, // ZPR:zsub3_then_ssub 0, // ZPR:zsub3_then_zsub 0, // ZPR:zsub3_then_zsub_hi 0, // ZPR:zsub2_then_bsub 0, // ZPR:zsub2_then_dsub 0, // ZPR:zsub2_then_hsub 0, // ZPR:zsub2_then_ssub 0, // ZPR:zsub2_then_zsub 0, // ZPR:zsub2_then_zsub_hi 0, // ZPR:dsub0_dsub1 0, // ZPR:dsub0_dsub1_dsub2 0, // ZPR:dsub1_dsub2 0, // ZPR:dsub1_dsub2_dsub3 0, // ZPR:dsub2_dsub3 0, // ZPR:dsub_qsub1_then_dsub 0, // ZPR:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR:qsub0_qsub1 0, // ZPR:qsub0_qsub1_qsub2 0, // ZPR:qsub1_qsub2 0, // ZPR:qsub1_qsub2_qsub3 0, // ZPR:qsub2_qsub3 0, // ZPR:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR:sub_32_x8sub_1_then_sub_32 0, // ZPR:x8sub_0_x8sub_1 0, // ZPR:x8sub_2_x8sub_3 0, // ZPR:x8sub_4_x8sub_5 0, // ZPR:x8sub_6_x8sub_7 0, // ZPR:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR:sub_32_subo64_then_sub_32 0, // ZPR:dsub_zsub1_then_dsub 0, // ZPR:zsub_zsub1_then_zsub 0, // ZPR:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // ZPR:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // ZPR:zsub0_zsub1 0, // ZPR:zsub0_zsub1_zsub2 0, // ZPR:zsub1_zsub2 0, // ZPR:zsub1_zsub2_zsub3 0, // ZPR:zsub2_zsub3 0, // ZPR:zsub1_then_dsub_zsub2_then_dsub 0, // ZPR:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR:zsub1_then_zsub_zsub2_then_zsub 0, // ZPR:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR:zsub0_zsub2 0, // ZPR:zsub1_zsub3 }, { // FPR128_lo 1, // FPR128_lo:bsub -> FPR8 44, // FPR128_lo:dsub -> FPR64_lo 0, // FPR128_lo:dsub0 0, // FPR128_lo:dsub1 0, // FPR128_lo:dsub2 0, // FPR128_lo:dsub3 3, // FPR128_lo:hsub -> FPR16_lo 0, // FPR128_lo:psub0 0, // FPR128_lo:psub1 0, // FPR128_lo:qsub0 0, // FPR128_lo:qsub1 0, // FPR128_lo:qsub2 0, // FPR128_lo:qsub3 24, // FPR128_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // FPR128_lo:sub_32 0, // FPR128_lo:sube32 0, // FPR128_lo:sube64 0, // FPR128_lo:subo32 0, // FPR128_lo:subo64 0, // FPR128_lo:x8sub_0 0, // FPR128_lo:x8sub_1 0, // FPR128_lo:x8sub_2 0, // FPR128_lo:x8sub_3 0, // FPR128_lo:x8sub_4 0, // FPR128_lo:x8sub_5 0, // FPR128_lo:x8sub_6 0, // FPR128_lo:x8sub_7 0, // FPR128_lo:zasubb 0, // FPR128_lo:zasubd0 0, // FPR128_lo:zasubd1 0, // FPR128_lo:zasubh0 0, // FPR128_lo:zasubh1 0, // FPR128_lo:zasubq0 0, // FPR128_lo:zasubq1 0, // FPR128_lo:zasubs0 0, // FPR128_lo:zasubs1 0, // FPR128_lo:zsub 0, // FPR128_lo:zsub0 0, // FPR128_lo:zsub1 0, // FPR128_lo:zsub2 0, // FPR128_lo:zsub3 0, // FPR128_lo:zsub_hi 0, // FPR128_lo:zasubd1_then_zasubq0 0, // FPR128_lo:zasubd1_then_zasubq1 0, // FPR128_lo:zasubs1_then_zasubd0 0, // FPR128_lo:zasubs1_then_zasubd1 0, // FPR128_lo:zasubs1_then_zasubq0 0, // FPR128_lo:zasubs1_then_zasubq1 0, // FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 0, // FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 0, // FPR128_lo:zasubh1_then_zasubd0 0, // FPR128_lo:zasubh1_then_zasubd1 0, // FPR128_lo:zasubh1_then_zasubq0 0, // FPR128_lo:zasubh1_then_zasubq1 0, // FPR128_lo:zasubh1_then_zasubs0 0, // FPR128_lo:zasubh1_then_zasubs1 0, // FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 0, // FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 0, // FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 0, // FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 0, // FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 0, // FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 0, // FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // FPR128_lo:dsub1_then_bsub 0, // FPR128_lo:dsub1_then_hsub 0, // FPR128_lo:dsub1_then_ssub 0, // FPR128_lo:dsub3_then_bsub 0, // FPR128_lo:dsub3_then_hsub 0, // FPR128_lo:dsub3_then_ssub 0, // FPR128_lo:dsub2_then_bsub 0, // FPR128_lo:dsub2_then_hsub 0, // FPR128_lo:dsub2_then_ssub 0, // FPR128_lo:qsub1_then_bsub 0, // FPR128_lo:qsub1_then_dsub 0, // FPR128_lo:qsub1_then_hsub 0, // FPR128_lo:qsub1_then_ssub 0, // FPR128_lo:qsub3_then_bsub 0, // FPR128_lo:qsub3_then_dsub 0, // FPR128_lo:qsub3_then_hsub 0, // FPR128_lo:qsub3_then_ssub 0, // FPR128_lo:qsub2_then_bsub 0, // FPR128_lo:qsub2_then_dsub 0, // FPR128_lo:qsub2_then_hsub 0, // FPR128_lo:qsub2_then_ssub 0, // FPR128_lo:x8sub_7_then_sub_32 0, // FPR128_lo:x8sub_6_then_sub_32 0, // FPR128_lo:x8sub_5_then_sub_32 0, // FPR128_lo:x8sub_4_then_sub_32 0, // FPR128_lo:x8sub_3_then_sub_32 0, // FPR128_lo:x8sub_2_then_sub_32 0, // FPR128_lo:x8sub_1_then_sub_32 0, // FPR128_lo:subo64_then_sub_32 0, // FPR128_lo:zsub1_then_bsub 0, // FPR128_lo:zsub1_then_dsub 0, // FPR128_lo:zsub1_then_hsub 0, // FPR128_lo:zsub1_then_ssub 0, // FPR128_lo:zsub1_then_zsub 0, // FPR128_lo:zsub1_then_zsub_hi 0, // FPR128_lo:zsub3_then_bsub 0, // FPR128_lo:zsub3_then_dsub 0, // FPR128_lo:zsub3_then_hsub 0, // FPR128_lo:zsub3_then_ssub 0, // FPR128_lo:zsub3_then_zsub 0, // FPR128_lo:zsub3_then_zsub_hi 0, // FPR128_lo:zsub2_then_bsub 0, // FPR128_lo:zsub2_then_dsub 0, // FPR128_lo:zsub2_then_hsub 0, // FPR128_lo:zsub2_then_ssub 0, // FPR128_lo:zsub2_then_zsub 0, // FPR128_lo:zsub2_then_zsub_hi 0, // FPR128_lo:dsub0_dsub1 0, // FPR128_lo:dsub0_dsub1_dsub2 0, // FPR128_lo:dsub1_dsub2 0, // FPR128_lo:dsub1_dsub2_dsub3 0, // FPR128_lo:dsub2_dsub3 0, // FPR128_lo:dsub_qsub1_then_dsub 0, // FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // FPR128_lo:qsub0_qsub1 0, // FPR128_lo:qsub0_qsub1_qsub2 0, // FPR128_lo:qsub1_qsub2 0, // FPR128_lo:qsub1_qsub2_qsub3 0, // FPR128_lo:qsub2_qsub3 0, // FPR128_lo:qsub1_then_dsub_qsub2_then_dsub 0, // FPR128_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // FPR128_lo:qsub2_then_dsub_qsub3_then_dsub 0, // FPR128_lo:sub_32_x8sub_1_then_sub_32 0, // FPR128_lo:x8sub_0_x8sub_1 0, // FPR128_lo:x8sub_2_x8sub_3 0, // FPR128_lo:x8sub_4_x8sub_5 0, // FPR128_lo:x8sub_6_x8sub_7 0, // FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // FPR128_lo:sub_32_subo64_then_sub_32 0, // FPR128_lo:dsub_zsub1_then_dsub 0, // FPR128_lo:zsub_zsub1_then_zsub 0, // FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // FPR128_lo:zsub0_zsub1 0, // FPR128_lo:zsub0_zsub1_zsub2 0, // FPR128_lo:zsub1_zsub2 0, // FPR128_lo:zsub1_zsub2_zsub3 0, // FPR128_lo:zsub2_zsub3 0, // FPR128_lo:zsub1_then_dsub_zsub2_then_dsub 0, // FPR128_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // FPR128_lo:zsub1_then_zsub_zsub2_then_zsub 0, // FPR128_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // FPR128_lo:zsub2_then_dsub_zsub3_then_dsub 0, // FPR128_lo:zsub2_then_zsub_zsub3_then_zsub 0, // FPR128_lo:zsub0_zsub2 0, // FPR128_lo:zsub1_zsub3 }, { // MPR128 0, // MPR128:bsub 0, // MPR128:dsub 0, // MPR128:dsub0 0, // MPR128:dsub1 0, // MPR128:dsub2 0, // MPR128:dsub3 0, // MPR128:hsub 0, // MPR128:psub0 0, // MPR128:psub1 0, // MPR128:qsub0 0, // MPR128:qsub1 0, // MPR128:qsub2 0, // MPR128:qsub3 0, // MPR128:ssub 0, // MPR128:sub_32 0, // MPR128:sube32 0, // MPR128:sube64 0, // MPR128:subo32 0, // MPR128:subo64 0, // MPR128:x8sub_0 0, // MPR128:x8sub_1 0, // MPR128:x8sub_2 0, // MPR128:x8sub_3 0, // MPR128:x8sub_4 0, // MPR128:x8sub_5 0, // MPR128:x8sub_6 0, // MPR128:x8sub_7 0, // MPR128:zasubb 0, // MPR128:zasubd0 0, // MPR128:zasubd1 0, // MPR128:zasubh0 0, // MPR128:zasubh1 0, // MPR128:zasubq0 0, // MPR128:zasubq1 0, // MPR128:zasubs0 0, // MPR128:zasubs1 0, // MPR128:zsub 0, // MPR128:zsub0 0, // MPR128:zsub1 0, // MPR128:zsub2 0, // MPR128:zsub3 0, // MPR128:zsub_hi 0, // MPR128:zasubd1_then_zasubq0 0, // MPR128:zasubd1_then_zasubq1 0, // MPR128:zasubs1_then_zasubd0 0, // MPR128:zasubs1_then_zasubd1 0, // MPR128:zasubs1_then_zasubq0 0, // MPR128:zasubs1_then_zasubq1 0, // MPR128:zasubs1_then_zasubd1_then_zasubq0 0, // MPR128:zasubs1_then_zasubd1_then_zasubq1 0, // MPR128:zasubh1_then_zasubd0 0, // MPR128:zasubh1_then_zasubd1 0, // MPR128:zasubh1_then_zasubq0 0, // MPR128:zasubh1_then_zasubq1 0, // MPR128:zasubh1_then_zasubs0 0, // MPR128:zasubh1_then_zasubs1 0, // MPR128:zasubh1_then_zasubd1_then_zasubq0 0, // MPR128:zasubh1_then_zasubd1_then_zasubq1 0, // MPR128:zasubh1_then_zasubs1_then_zasubd0 0, // MPR128:zasubh1_then_zasubs1_then_zasubd1 0, // MPR128:zasubh1_then_zasubs1_then_zasubq0 0, // MPR128:zasubh1_then_zasubs1_then_zasubq1 0, // MPR128:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // MPR128:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // MPR128:dsub1_then_bsub 0, // MPR128:dsub1_then_hsub 0, // MPR128:dsub1_then_ssub 0, // MPR128:dsub3_then_bsub 0, // MPR128:dsub3_then_hsub 0, // MPR128:dsub3_then_ssub 0, // MPR128:dsub2_then_bsub 0, // MPR128:dsub2_then_hsub 0, // MPR128:dsub2_then_ssub 0, // MPR128:qsub1_then_bsub 0, // MPR128:qsub1_then_dsub 0, // MPR128:qsub1_then_hsub 0, // MPR128:qsub1_then_ssub 0, // MPR128:qsub3_then_bsub 0, // MPR128:qsub3_then_dsub 0, // MPR128:qsub3_then_hsub 0, // MPR128:qsub3_then_ssub 0, // MPR128:qsub2_then_bsub 0, // MPR128:qsub2_then_dsub 0, // MPR128:qsub2_then_hsub 0, // MPR128:qsub2_then_ssub 0, // MPR128:x8sub_7_then_sub_32 0, // MPR128:x8sub_6_then_sub_32 0, // MPR128:x8sub_5_then_sub_32 0, // MPR128:x8sub_4_then_sub_32 0, // MPR128:x8sub_3_then_sub_32 0, // MPR128:x8sub_2_then_sub_32 0, // MPR128:x8sub_1_then_sub_32 0, // MPR128:subo64_then_sub_32 0, // MPR128:zsub1_then_bsub 0, // MPR128:zsub1_then_dsub 0, // MPR128:zsub1_then_hsub 0, // MPR128:zsub1_then_ssub 0, // MPR128:zsub1_then_zsub 0, // MPR128:zsub1_then_zsub_hi 0, // MPR128:zsub3_then_bsub 0, // MPR128:zsub3_then_dsub 0, // MPR128:zsub3_then_hsub 0, // MPR128:zsub3_then_ssub 0, // MPR128:zsub3_then_zsub 0, // MPR128:zsub3_then_zsub_hi 0, // MPR128:zsub2_then_bsub 0, // MPR128:zsub2_then_dsub 0, // MPR128:zsub2_then_hsub 0, // MPR128:zsub2_then_ssub 0, // MPR128:zsub2_then_zsub 0, // MPR128:zsub2_then_zsub_hi 0, // MPR128:dsub0_dsub1 0, // MPR128:dsub0_dsub1_dsub2 0, // MPR128:dsub1_dsub2 0, // MPR128:dsub1_dsub2_dsub3 0, // MPR128:dsub2_dsub3 0, // MPR128:dsub_qsub1_then_dsub 0, // MPR128:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // MPR128:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // MPR128:qsub0_qsub1 0, // MPR128:qsub0_qsub1_qsub2 0, // MPR128:qsub1_qsub2 0, // MPR128:qsub1_qsub2_qsub3 0, // MPR128:qsub2_qsub3 0, // MPR128:qsub1_then_dsub_qsub2_then_dsub 0, // MPR128:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // MPR128:qsub2_then_dsub_qsub3_then_dsub 0, // MPR128:sub_32_x8sub_1_then_sub_32 0, // MPR128:x8sub_0_x8sub_1 0, // MPR128:x8sub_2_x8sub_3 0, // MPR128:x8sub_4_x8sub_5 0, // MPR128:x8sub_6_x8sub_7 0, // MPR128:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // MPR128:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // MPR128:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // MPR128:sub_32_subo64_then_sub_32 0, // MPR128:dsub_zsub1_then_dsub 0, // MPR128:zsub_zsub1_then_zsub 0, // MPR128:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // MPR128:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // MPR128:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // MPR128:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // MPR128:zsub0_zsub1 0, // MPR128:zsub0_zsub1_zsub2 0, // MPR128:zsub1_zsub2 0, // MPR128:zsub1_zsub2_zsub3 0, // MPR128:zsub2_zsub3 0, // MPR128:zsub1_then_dsub_zsub2_then_dsub 0, // MPR128:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // MPR128:zsub1_then_zsub_zsub2_then_zsub 0, // MPR128:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // MPR128:zsub2_then_dsub_zsub3_then_dsub 0, // MPR128:zsub2_then_zsub_zsub3_then_zsub 0, // MPR128:zsub0_zsub2 0, // MPR128:zsub1_zsub3 }, { // ZPR_4b 1, // ZPR_4b:bsub -> FPR8 44, // ZPR_4b:dsub -> FPR64_lo 0, // ZPR_4b:dsub0 0, // ZPR_4b:dsub1 0, // ZPR_4b:dsub2 0, // ZPR_4b:dsub3 3, // ZPR_4b:hsub -> FPR16_lo 0, // ZPR_4b:psub0 0, // ZPR_4b:psub1 0, // ZPR_4b:qsub0 0, // ZPR_4b:qsub1 0, // ZPR_4b:qsub2 0, // ZPR_4b:qsub3 24, // ZPR_4b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR_4b:sub_32 0, // ZPR_4b:sube32 0, // ZPR_4b:sube64 0, // ZPR_4b:subo32 0, // ZPR_4b:subo64 0, // ZPR_4b:x8sub_0 0, // ZPR_4b:x8sub_1 0, // ZPR_4b:x8sub_2 0, // ZPR_4b:x8sub_3 0, // ZPR_4b:x8sub_4 0, // ZPR_4b:x8sub_5 0, // ZPR_4b:x8sub_6 0, // ZPR_4b:x8sub_7 0, // ZPR_4b:zasubb 0, // ZPR_4b:zasubd0 0, // ZPR_4b:zasubd1 0, // ZPR_4b:zasubh0 0, // ZPR_4b:zasubh1 0, // ZPR_4b:zasubq0 0, // ZPR_4b:zasubq1 0, // ZPR_4b:zasubs0 0, // ZPR_4b:zasubs1 72, // ZPR_4b:zsub -> FPR128_lo 0, // ZPR_4b:zsub0 0, // ZPR_4b:zsub1 0, // ZPR_4b:zsub2 0, // ZPR_4b:zsub3 0, // ZPR_4b:zsub_hi 0, // ZPR_4b:zasubd1_then_zasubq0 0, // ZPR_4b:zasubd1_then_zasubq1 0, // ZPR_4b:zasubs1_then_zasubd0 0, // ZPR_4b:zasubs1_then_zasubd1 0, // ZPR_4b:zasubs1_then_zasubq0 0, // ZPR_4b:zasubs1_then_zasubq1 0, // ZPR_4b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR_4b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR_4b:zasubh1_then_zasubd0 0, // ZPR_4b:zasubh1_then_zasubd1 0, // ZPR_4b:zasubh1_then_zasubq0 0, // ZPR_4b:zasubh1_then_zasubq1 0, // ZPR_4b:zasubh1_then_zasubs0 0, // ZPR_4b:zasubh1_then_zasubs1 0, // ZPR_4b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR_4b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR_4b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR_4b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR_4b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR_4b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR_4b:dsub1_then_bsub 0, // ZPR_4b:dsub1_then_hsub 0, // ZPR_4b:dsub1_then_ssub 0, // ZPR_4b:dsub3_then_bsub 0, // ZPR_4b:dsub3_then_hsub 0, // ZPR_4b:dsub3_then_ssub 0, // ZPR_4b:dsub2_then_bsub 0, // ZPR_4b:dsub2_then_hsub 0, // ZPR_4b:dsub2_then_ssub 0, // ZPR_4b:qsub1_then_bsub 0, // ZPR_4b:qsub1_then_dsub 0, // ZPR_4b:qsub1_then_hsub 0, // ZPR_4b:qsub1_then_ssub 0, // ZPR_4b:qsub3_then_bsub 0, // ZPR_4b:qsub3_then_dsub 0, // ZPR_4b:qsub3_then_hsub 0, // ZPR_4b:qsub3_then_ssub 0, // ZPR_4b:qsub2_then_bsub 0, // ZPR_4b:qsub2_then_dsub 0, // ZPR_4b:qsub2_then_hsub 0, // ZPR_4b:qsub2_then_ssub 0, // ZPR_4b:x8sub_7_then_sub_32 0, // ZPR_4b:x8sub_6_then_sub_32 0, // ZPR_4b:x8sub_5_then_sub_32 0, // ZPR_4b:x8sub_4_then_sub_32 0, // ZPR_4b:x8sub_3_then_sub_32 0, // ZPR_4b:x8sub_2_then_sub_32 0, // ZPR_4b:x8sub_1_then_sub_32 0, // ZPR_4b:subo64_then_sub_32 0, // ZPR_4b:zsub1_then_bsub 0, // ZPR_4b:zsub1_then_dsub 0, // ZPR_4b:zsub1_then_hsub 0, // ZPR_4b:zsub1_then_ssub 0, // ZPR_4b:zsub1_then_zsub 0, // ZPR_4b:zsub1_then_zsub_hi 0, // ZPR_4b:zsub3_then_bsub 0, // ZPR_4b:zsub3_then_dsub 0, // ZPR_4b:zsub3_then_hsub 0, // ZPR_4b:zsub3_then_ssub 0, // ZPR_4b:zsub3_then_zsub 0, // ZPR_4b:zsub3_then_zsub_hi 0, // ZPR_4b:zsub2_then_bsub 0, // ZPR_4b:zsub2_then_dsub 0, // ZPR_4b:zsub2_then_hsub 0, // ZPR_4b:zsub2_then_ssub 0, // ZPR_4b:zsub2_then_zsub 0, // ZPR_4b:zsub2_then_zsub_hi 0, // ZPR_4b:dsub0_dsub1 0, // ZPR_4b:dsub0_dsub1_dsub2 0, // ZPR_4b:dsub1_dsub2 0, // ZPR_4b:dsub1_dsub2_dsub3 0, // ZPR_4b:dsub2_dsub3 0, // ZPR_4b:dsub_qsub1_then_dsub 0, // ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR_4b:qsub0_qsub1 0, // ZPR_4b:qsub0_qsub1_qsub2 0, // ZPR_4b:qsub1_qsub2 0, // ZPR_4b:qsub1_qsub2_qsub3 0, // ZPR_4b:qsub2_qsub3 0, // ZPR_4b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR_4b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR_4b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR_4b:sub_32_x8sub_1_then_sub_32 0, // ZPR_4b:x8sub_0_x8sub_1 0, // ZPR_4b:x8sub_2_x8sub_3 0, // ZPR_4b:x8sub_4_x8sub_5 0, // ZPR_4b:x8sub_6_x8sub_7 0, // ZPR_4b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR_4b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR_4b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR_4b:sub_32_subo64_then_sub_32 0, // ZPR_4b:dsub_zsub1_then_dsub 0, // ZPR_4b:zsub_zsub1_then_zsub 0, // ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // ZPR_4b:zsub0_zsub1 0, // ZPR_4b:zsub0_zsub1_zsub2 0, // ZPR_4b:zsub1_zsub2 0, // ZPR_4b:zsub1_zsub2_zsub3 0, // ZPR_4b:zsub2_zsub3 0, // ZPR_4b:zsub1_then_dsub_zsub2_then_dsub 0, // ZPR_4b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR_4b:zsub1_then_zsub_zsub2_then_zsub 0, // ZPR_4b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR_4b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR_4b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR_4b:zsub0_zsub2 0, // ZPR_4b:zsub1_zsub3 }, { // ZPR_3b 1, // ZPR_3b:bsub -> FPR8 44, // ZPR_3b:dsub -> FPR64_lo 0, // ZPR_3b:dsub0 0, // ZPR_3b:dsub1 0, // ZPR_3b:dsub2 0, // ZPR_3b:dsub3 3, // ZPR_3b:hsub -> FPR16_lo 0, // ZPR_3b:psub0 0, // ZPR_3b:psub1 0, // ZPR_3b:qsub0 0, // ZPR_3b:qsub1 0, // ZPR_3b:qsub2 0, // ZPR_3b:qsub3 24, // ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR_3b:sub_32 0, // ZPR_3b:sube32 0, // ZPR_3b:sube64 0, // ZPR_3b:subo32 0, // ZPR_3b:subo64 0, // ZPR_3b:x8sub_0 0, // ZPR_3b:x8sub_1 0, // ZPR_3b:x8sub_2 0, // ZPR_3b:x8sub_3 0, // ZPR_3b:x8sub_4 0, // ZPR_3b:x8sub_5 0, // ZPR_3b:x8sub_6 0, // ZPR_3b:x8sub_7 0, // ZPR_3b:zasubb 0, // ZPR_3b:zasubd0 0, // ZPR_3b:zasubd1 0, // ZPR_3b:zasubh0 0, // ZPR_3b:zasubh1 0, // ZPR_3b:zasubq0 0, // ZPR_3b:zasubq1 0, // ZPR_3b:zasubs0 0, // ZPR_3b:zasubs1 72, // ZPR_3b:zsub -> FPR128_lo 0, // ZPR_3b:zsub0 0, // ZPR_3b:zsub1 0, // ZPR_3b:zsub2 0, // ZPR_3b:zsub3 0, // ZPR_3b:zsub_hi 0, // ZPR_3b:zasubd1_then_zasubq0 0, // ZPR_3b:zasubd1_then_zasubq1 0, // ZPR_3b:zasubs1_then_zasubd0 0, // ZPR_3b:zasubs1_then_zasubd1 0, // ZPR_3b:zasubs1_then_zasubq0 0, // ZPR_3b:zasubs1_then_zasubq1 0, // ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR_3b:zasubh1_then_zasubd0 0, // ZPR_3b:zasubh1_then_zasubd1 0, // ZPR_3b:zasubh1_then_zasubq0 0, // ZPR_3b:zasubh1_then_zasubq1 0, // ZPR_3b:zasubh1_then_zasubs0 0, // ZPR_3b:zasubh1_then_zasubs1 0, // ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR_3b:dsub1_then_bsub 0, // ZPR_3b:dsub1_then_hsub 0, // ZPR_3b:dsub1_then_ssub 0, // ZPR_3b:dsub3_then_bsub 0, // ZPR_3b:dsub3_then_hsub 0, // ZPR_3b:dsub3_then_ssub 0, // ZPR_3b:dsub2_then_bsub 0, // ZPR_3b:dsub2_then_hsub 0, // ZPR_3b:dsub2_then_ssub 0, // ZPR_3b:qsub1_then_bsub 0, // ZPR_3b:qsub1_then_dsub 0, // ZPR_3b:qsub1_then_hsub 0, // ZPR_3b:qsub1_then_ssub 0, // ZPR_3b:qsub3_then_bsub 0, // ZPR_3b:qsub3_then_dsub 0, // ZPR_3b:qsub3_then_hsub 0, // ZPR_3b:qsub3_then_ssub 0, // ZPR_3b:qsub2_then_bsub 0, // ZPR_3b:qsub2_then_dsub 0, // ZPR_3b:qsub2_then_hsub 0, // ZPR_3b:qsub2_then_ssub 0, // ZPR_3b:x8sub_7_then_sub_32 0, // ZPR_3b:x8sub_6_then_sub_32 0, // ZPR_3b:x8sub_5_then_sub_32 0, // ZPR_3b:x8sub_4_then_sub_32 0, // ZPR_3b:x8sub_3_then_sub_32 0, // ZPR_3b:x8sub_2_then_sub_32 0, // ZPR_3b:x8sub_1_then_sub_32 0, // ZPR_3b:subo64_then_sub_32 0, // ZPR_3b:zsub1_then_bsub 0, // ZPR_3b:zsub1_then_dsub 0, // ZPR_3b:zsub1_then_hsub 0, // ZPR_3b:zsub1_then_ssub 0, // ZPR_3b:zsub1_then_zsub 0, // ZPR_3b:zsub1_then_zsub_hi 0, // ZPR_3b:zsub3_then_bsub 0, // ZPR_3b:zsub3_then_dsub 0, // ZPR_3b:zsub3_then_hsub 0, // ZPR_3b:zsub3_then_ssub 0, // ZPR_3b:zsub3_then_zsub 0, // ZPR_3b:zsub3_then_zsub_hi 0, // ZPR_3b:zsub2_then_bsub 0, // ZPR_3b:zsub2_then_dsub 0, // ZPR_3b:zsub2_then_hsub 0, // ZPR_3b:zsub2_then_ssub 0, // ZPR_3b:zsub2_then_zsub 0, // ZPR_3b:zsub2_then_zsub_hi 0, // ZPR_3b:dsub0_dsub1 0, // ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR_3b:dsub1_dsub2 0, // ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR_3b:dsub2_dsub3 0, // ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR_3b:qsub0_qsub1 0, // ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR_3b:qsub1_qsub2 0, // ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR_3b:qsub2_qsub3 0, // ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR_3b:x8sub_0_x8sub_1 0, // ZPR_3b:x8sub_2_x8sub_3 0, // ZPR_3b:x8sub_4_x8sub_5 0, // ZPR_3b:x8sub_6_x8sub_7 0, // ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR_3b:sub_32_subo64_then_sub_32 0, // ZPR_3b:dsub_zsub1_then_dsub 0, // ZPR_3b:zsub_zsub1_then_zsub 0, // ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // ZPR_3b:zsub0_zsub1 0, // ZPR_3b:zsub0_zsub1_zsub2 0, // ZPR_3b:zsub1_zsub2 0, // ZPR_3b:zsub1_zsub2_zsub3 0, // ZPR_3b:zsub2_zsub3 0, // ZPR_3b:zsub1_then_dsub_zsub2_then_dsub 0, // ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR_3b:zsub1_then_zsub_zsub2_then_zsub 0, // ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR_3b:zsub0_zsub2 0, // ZPR_3b:zsub1_zsub3 }, { // DDD 1, // DDD:bsub -> FPR8 0, // DDD:dsub 36, // DDD:dsub0 -> FPR64 36, // DDD:dsub1 -> FPR64 36, // DDD:dsub2 -> FPR64 0, // DDD:dsub3 2, // DDD:hsub -> FPR16 0, // DDD:psub0 0, // DDD:psub1 0, // DDD:qsub0 0, // DDD:qsub1 0, // DDD:qsub2 0, // DDD:qsub3 20, // DDD:ssub -> FPR32 0, // DDD:sub_32 0, // DDD:sube32 0, // DDD:sube64 0, // DDD:subo32 0, // DDD:subo64 0, // DDD:x8sub_0 0, // DDD:x8sub_1 0, // DDD:x8sub_2 0, // DDD:x8sub_3 0, // DDD:x8sub_4 0, // DDD:x8sub_5 0, // DDD:x8sub_6 0, // DDD:x8sub_7 0, // DDD:zasubb 0, // DDD:zasubd0 0, // DDD:zasubd1 0, // DDD:zasubh0 0, // DDD:zasubh1 0, // DDD:zasubq0 0, // DDD:zasubq1 0, // DDD:zasubs0 0, // DDD:zasubs1 0, // DDD:zsub 0, // DDD:zsub0 0, // DDD:zsub1 0, // DDD:zsub2 0, // DDD:zsub3 0, // DDD:zsub_hi 0, // DDD:zasubd1_then_zasubq0 0, // DDD:zasubd1_then_zasubq1 0, // DDD:zasubs1_then_zasubd0 0, // DDD:zasubs1_then_zasubd1 0, // DDD:zasubs1_then_zasubq0 0, // DDD:zasubs1_then_zasubq1 0, // DDD:zasubs1_then_zasubd1_then_zasubq0 0, // DDD:zasubs1_then_zasubd1_then_zasubq1 0, // DDD:zasubh1_then_zasubd0 0, // DDD:zasubh1_then_zasubd1 0, // DDD:zasubh1_then_zasubq0 0, // DDD:zasubh1_then_zasubq1 0, // DDD:zasubh1_then_zasubs0 0, // DDD:zasubh1_then_zasubs1 0, // DDD:zasubh1_then_zasubd1_then_zasubq0 0, // DDD:zasubh1_then_zasubd1_then_zasubq1 0, // DDD:zasubh1_then_zasubs1_then_zasubd0 0, // DDD:zasubh1_then_zasubs1_then_zasubd1 0, // DDD:zasubh1_then_zasubs1_then_zasubq0 0, // DDD:zasubh1_then_zasubs1_then_zasubq1 0, // DDD:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DDD:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DDD:dsub1_then_bsub -> FPR8 2, // DDD:dsub1_then_hsub -> FPR16 20, // DDD:dsub1_then_ssub -> FPR32 0, // DDD:dsub3_then_bsub 0, // DDD:dsub3_then_hsub 0, // DDD:dsub3_then_ssub 1, // DDD:dsub2_then_bsub -> FPR8 2, // DDD:dsub2_then_hsub -> FPR16 20, // DDD:dsub2_then_ssub -> FPR32 0, // DDD:qsub1_then_bsub 0, // DDD:qsub1_then_dsub 0, // DDD:qsub1_then_hsub 0, // DDD:qsub1_then_ssub 0, // DDD:qsub3_then_bsub 0, // DDD:qsub3_then_dsub 0, // DDD:qsub3_then_hsub 0, // DDD:qsub3_then_ssub 0, // DDD:qsub2_then_bsub 0, // DDD:qsub2_then_dsub 0, // DDD:qsub2_then_hsub 0, // DDD:qsub2_then_ssub 0, // DDD:x8sub_7_then_sub_32 0, // DDD:x8sub_6_then_sub_32 0, // DDD:x8sub_5_then_sub_32 0, // DDD:x8sub_4_then_sub_32 0, // DDD:x8sub_3_then_sub_32 0, // DDD:x8sub_2_then_sub_32 0, // DDD:x8sub_1_then_sub_32 0, // DDD:subo64_then_sub_32 0, // DDD:zsub1_then_bsub 0, // DDD:zsub1_then_dsub 0, // DDD:zsub1_then_hsub 0, // DDD:zsub1_then_ssub 0, // DDD:zsub1_then_zsub 0, // DDD:zsub1_then_zsub_hi 0, // DDD:zsub3_then_bsub 0, // DDD:zsub3_then_dsub 0, // DDD:zsub3_then_hsub 0, // DDD:zsub3_then_ssub 0, // DDD:zsub3_then_zsub 0, // DDD:zsub3_then_zsub_hi 0, // DDD:zsub2_then_bsub 0, // DDD:zsub2_then_dsub 0, // DDD:zsub2_then_hsub 0, // DDD:zsub2_then_ssub 0, // DDD:zsub2_then_zsub 0, // DDD:zsub2_then_zsub_hi 53, // DDD:dsub0_dsub1 -> DD 0, // DDD:dsub0_dsub1_dsub2 53, // DDD:dsub1_dsub2 -> DD 0, // DDD:dsub1_dsub2_dsub3 0, // DDD:dsub2_dsub3 0, // DDD:dsub_qsub1_then_dsub 0, // DDD:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDD:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DDD:qsub0_qsub1 0, // DDD:qsub0_qsub1_qsub2 0, // DDD:qsub1_qsub2 0, // DDD:qsub1_qsub2_qsub3 0, // DDD:qsub2_qsub3 0, // DDD:qsub1_then_dsub_qsub2_then_dsub 0, // DDD:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDD:qsub2_then_dsub_qsub3_then_dsub 0, // DDD:sub_32_x8sub_1_then_sub_32 0, // DDD:x8sub_0_x8sub_1 0, // DDD:x8sub_2_x8sub_3 0, // DDD:x8sub_4_x8sub_5 0, // DDD:x8sub_6_x8sub_7 0, // DDD:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DDD:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DDD:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DDD:sub_32_subo64_then_sub_32 0, // DDD:dsub_zsub1_then_dsub 0, // DDD:zsub_zsub1_then_zsub 0, // DDD:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDD:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DDD:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDD:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DDD:zsub0_zsub1 0, // DDD:zsub0_zsub1_zsub2 0, // DDD:zsub1_zsub2 0, // DDD:zsub1_zsub2_zsub3 0, // DDD:zsub2_zsub3 0, // DDD:zsub1_then_dsub_zsub2_then_dsub 0, // DDD:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDD:zsub1_then_zsub_zsub2_then_zsub 0, // DDD:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDD:zsub2_then_dsub_zsub3_then_dsub 0, // DDD:zsub2_then_zsub_zsub3_then_zsub 0, // DDD:zsub0_zsub2 0, // DDD:zsub1_zsub3 }, { // DDD_with_dsub0_in_FPR64_lo 1, // DDD_with_dsub0_in_FPR64_lo:bsub -> FPR8 0, // DDD_with_dsub0_in_FPR64_lo:dsub 44, // DDD_with_dsub0_in_FPR64_lo:dsub0 -> FPR64_lo 36, // DDD_with_dsub0_in_FPR64_lo:dsub1 -> FPR64 36, // DDD_with_dsub0_in_FPR64_lo:dsub2 -> FPR64 0, // DDD_with_dsub0_in_FPR64_lo:dsub3 3, // DDD_with_dsub0_in_FPR64_lo:hsub -> FPR16_lo 0, // DDD_with_dsub0_in_FPR64_lo:psub0 0, // DDD_with_dsub0_in_FPR64_lo:psub1 0, // DDD_with_dsub0_in_FPR64_lo:qsub0 0, // DDD_with_dsub0_in_FPR64_lo:qsub1 0, // DDD_with_dsub0_in_FPR64_lo:qsub2 0, // DDD_with_dsub0_in_FPR64_lo:qsub3 24, // DDD_with_dsub0_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDD_with_dsub0_in_FPR64_lo:sub_32 0, // DDD_with_dsub0_in_FPR64_lo:sube32 0, // DDD_with_dsub0_in_FPR64_lo:sube64 0, // DDD_with_dsub0_in_FPR64_lo:subo32 0, // DDD_with_dsub0_in_FPR64_lo:subo64 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_0 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_1 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_2 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_3 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_4 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_5 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_6 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_7 0, // DDD_with_dsub0_in_FPR64_lo:zasubb 0, // DDD_with_dsub0_in_FPR64_lo:zasubd0 0, // DDD_with_dsub0_in_FPR64_lo:zasubd1 0, // DDD_with_dsub0_in_FPR64_lo:zasubh0 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1 0, // DDD_with_dsub0_in_FPR64_lo:zasubq0 0, // DDD_with_dsub0_in_FPR64_lo:zasubq1 0, // DDD_with_dsub0_in_FPR64_lo:zasubs0 0, // DDD_with_dsub0_in_FPR64_lo:zasubs1 0, // DDD_with_dsub0_in_FPR64_lo:zsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub0 0, // DDD_with_dsub0_in_FPR64_lo:zsub1 0, // DDD_with_dsub0_in_FPR64_lo:zsub2 0, // DDD_with_dsub0_in_FPR64_lo:zsub3 0, // DDD_with_dsub0_in_FPR64_lo:zsub_hi 0, // DDD_with_dsub0_in_FPR64_lo:zasubd1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo:zasubd1_then_zasubq1 0, // DDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd0 0, // DDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd1 0, // DDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubq1 0, // DDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd0 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd1 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubq1 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs0 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DDD_with_dsub0_in_FPR64_lo:dsub1_then_bsub -> FPR8 2, // DDD_with_dsub0_in_FPR64_lo:dsub1_then_hsub -> FPR16 20, // DDD_with_dsub0_in_FPR64_lo:dsub1_then_ssub -> FPR32 0, // DDD_with_dsub0_in_FPR64_lo:dsub3_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo:dsub3_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo:dsub3_then_ssub 1, // DDD_with_dsub0_in_FPR64_lo:dsub2_then_bsub -> FPR8 2, // DDD_with_dsub0_in_FPR64_lo:dsub2_then_hsub -> FPR16 20, // DDD_with_dsub0_in_FPR64_lo:dsub2_then_ssub -> FPR32 0, // DDD_with_dsub0_in_FPR64_lo:qsub1_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo:qsub1_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo:qsub1_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo:qsub1_then_ssub 0, // DDD_with_dsub0_in_FPR64_lo:qsub3_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo:qsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo:qsub3_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo:qsub3_then_ssub 0, // DDD_with_dsub0_in_FPR64_lo:qsub2_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo:qsub2_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo:qsub2_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo:qsub2_then_ssub 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_7_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_6_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_5_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_4_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_3_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_2_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_1_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo:subo64_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo:zsub1_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub1_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub1_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub1_then_ssub 0, // DDD_with_dsub0_in_FPR64_lo:zsub1_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub1_then_zsub_hi 0, // DDD_with_dsub0_in_FPR64_lo:zsub3_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub3_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub3_then_ssub 0, // DDD_with_dsub0_in_FPR64_lo:zsub3_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub3_then_zsub_hi 0, // DDD_with_dsub0_in_FPR64_lo:zsub2_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub2_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub2_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub2_then_ssub 0, // DDD_with_dsub0_in_FPR64_lo:zsub2_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub2_then_zsub_hi 54, // DDD_with_dsub0_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub0_in_FPR64_lo 0, // DDD_with_dsub0_in_FPR64_lo:dsub0_dsub1_dsub2 53, // DDD_with_dsub0_in_FPR64_lo:dsub1_dsub2 -> DD 0, // DDD_with_dsub0_in_FPR64_lo:dsub1_dsub2_dsub3 0, // DDD_with_dsub0_in_FPR64_lo:dsub2_dsub3 0, // DDD_with_dsub0_in_FPR64_lo:dsub_qsub1_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo:qsub0_qsub1 0, // DDD_with_dsub0_in_FPR64_lo:qsub0_qsub1_qsub2 0, // DDD_with_dsub0_in_FPR64_lo:qsub1_qsub2 0, // DDD_with_dsub0_in_FPR64_lo:qsub1_qsub2_qsub3 0, // DDD_with_dsub0_in_FPR64_lo:qsub2_qsub3 0, // DDD_with_dsub0_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_0_x8sub_1 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_2_x8sub_3 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_4_x8sub_5 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_6_x8sub_7 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo:dsub_zsub1_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub_zsub1_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub0_zsub1 0, // DDD_with_dsub0_in_FPR64_lo:zsub0_zsub1_zsub2 0, // DDD_with_dsub0_in_FPR64_lo:zsub1_zsub2 0, // DDD_with_dsub0_in_FPR64_lo:zsub1_zsub2_zsub3 0, // DDD_with_dsub0_in_FPR64_lo:zsub2_zsub3 0, // DDD_with_dsub0_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo:zsub0_zsub2 0, // DDD_with_dsub0_in_FPR64_lo:zsub1_zsub3 }, { // DDD_with_dsub1_in_FPR64_lo 1, // DDD_with_dsub1_in_FPR64_lo:bsub -> FPR8 0, // DDD_with_dsub1_in_FPR64_lo:dsub 36, // DDD_with_dsub1_in_FPR64_lo:dsub0 -> FPR64 44, // DDD_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo 36, // DDD_with_dsub1_in_FPR64_lo:dsub2 -> FPR64 0, // DDD_with_dsub1_in_FPR64_lo:dsub3 2, // DDD_with_dsub1_in_FPR64_lo:hsub -> FPR16 0, // DDD_with_dsub1_in_FPR64_lo:psub0 0, // DDD_with_dsub1_in_FPR64_lo:psub1 0, // DDD_with_dsub1_in_FPR64_lo:qsub0 0, // DDD_with_dsub1_in_FPR64_lo:qsub1 0, // DDD_with_dsub1_in_FPR64_lo:qsub2 0, // DDD_with_dsub1_in_FPR64_lo:qsub3 20, // DDD_with_dsub1_in_FPR64_lo:ssub -> FPR32 0, // DDD_with_dsub1_in_FPR64_lo:sub_32 0, // DDD_with_dsub1_in_FPR64_lo:sube32 0, // DDD_with_dsub1_in_FPR64_lo:sube64 0, // DDD_with_dsub1_in_FPR64_lo:subo32 0, // DDD_with_dsub1_in_FPR64_lo:subo64 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_0 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_1 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_2 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_3 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_4 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_5 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_6 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_7 0, // DDD_with_dsub1_in_FPR64_lo:zasubb 0, // DDD_with_dsub1_in_FPR64_lo:zasubd0 0, // DDD_with_dsub1_in_FPR64_lo:zasubd1 0, // DDD_with_dsub1_in_FPR64_lo:zasubh0 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1 0, // DDD_with_dsub1_in_FPR64_lo:zasubq0 0, // DDD_with_dsub1_in_FPR64_lo:zasubq1 0, // DDD_with_dsub1_in_FPR64_lo:zasubs0 0, // DDD_with_dsub1_in_FPR64_lo:zasubs1 0, // DDD_with_dsub1_in_FPR64_lo:zsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub0 0, // DDD_with_dsub1_in_FPR64_lo:zsub1 0, // DDD_with_dsub1_in_FPR64_lo:zsub2 0, // DDD_with_dsub1_in_FPR64_lo:zsub3 0, // DDD_with_dsub1_in_FPR64_lo:zsub_hi 0, // DDD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 0, // DDD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 0, // DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 0, // DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 0, // DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 0, // DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 0, // DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DDD_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 3, // DDD_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo 24, // DDD_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDD_with_dsub1_in_FPR64_lo:dsub3_then_bsub 0, // DDD_with_dsub1_in_FPR64_lo:dsub3_then_hsub 0, // DDD_with_dsub1_in_FPR64_lo:dsub3_then_ssub 1, // DDD_with_dsub1_in_FPR64_lo:dsub2_then_bsub -> FPR8 2, // DDD_with_dsub1_in_FPR64_lo:dsub2_then_hsub -> FPR16 20, // DDD_with_dsub1_in_FPR64_lo:dsub2_then_ssub -> FPR32 0, // DDD_with_dsub1_in_FPR64_lo:qsub1_then_bsub 0, // DDD_with_dsub1_in_FPR64_lo:qsub1_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo:qsub1_then_hsub 0, // DDD_with_dsub1_in_FPR64_lo:qsub1_then_ssub 0, // DDD_with_dsub1_in_FPR64_lo:qsub3_then_bsub 0, // DDD_with_dsub1_in_FPR64_lo:qsub3_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo:qsub3_then_hsub 0, // DDD_with_dsub1_in_FPR64_lo:qsub3_then_ssub 0, // DDD_with_dsub1_in_FPR64_lo:qsub2_then_bsub 0, // DDD_with_dsub1_in_FPR64_lo:qsub2_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo:qsub2_then_hsub 0, // DDD_with_dsub1_in_FPR64_lo:qsub2_then_ssub 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo:subo64_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo:zsub1_then_bsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub1_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub1_then_hsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub1_then_ssub 0, // DDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi 0, // DDD_with_dsub1_in_FPR64_lo:zsub3_then_bsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub3_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub3_then_hsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub3_then_ssub 0, // DDD_with_dsub1_in_FPR64_lo:zsub3_then_zsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi 0, // DDD_with_dsub1_in_FPR64_lo:zsub2_then_bsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub2_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub2_then_hsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub2_then_ssub 0, // DDD_with_dsub1_in_FPR64_lo:zsub2_then_zsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi 55, // DDD_with_dsub1_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub1_in_FPR64_lo 0, // DDD_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 54, // DDD_with_dsub1_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo 0, // DDD_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 0, // DDD_with_dsub1_in_FPR64_lo:dsub2_dsub3 0, // DDD_with_dsub1_in_FPR64_lo:dsub_qsub1_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo:qsub0_qsub1 0, // DDD_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 0, // DDD_with_dsub1_in_FPR64_lo:qsub1_qsub2 0, // DDD_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 0, // DDD_with_dsub1_in_FPR64_lo:qsub2_qsub3 0, // DDD_with_dsub1_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo:dsub_zsub1_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub_zsub1_then_zsub 0, // DDD_with_dsub1_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub0_zsub1 0, // DDD_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 0, // DDD_with_dsub1_in_FPR64_lo:zsub1_zsub2 0, // DDD_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 0, // DDD_with_dsub1_in_FPR64_lo:zsub2_zsub3 0, // DDD_with_dsub1_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // DDD_with_dsub1_in_FPR64_lo:zsub0_zsub2 0, // DDD_with_dsub1_in_FPR64_lo:zsub1_zsub3 }, { // DDD_with_dsub2_in_FPR64_lo 1, // DDD_with_dsub2_in_FPR64_lo:bsub -> FPR8 0, // DDD_with_dsub2_in_FPR64_lo:dsub 36, // DDD_with_dsub2_in_FPR64_lo:dsub0 -> FPR64 36, // DDD_with_dsub2_in_FPR64_lo:dsub1 -> FPR64 44, // DDD_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo 0, // DDD_with_dsub2_in_FPR64_lo:dsub3 2, // DDD_with_dsub2_in_FPR64_lo:hsub -> FPR16 0, // DDD_with_dsub2_in_FPR64_lo:psub0 0, // DDD_with_dsub2_in_FPR64_lo:psub1 0, // DDD_with_dsub2_in_FPR64_lo:qsub0 0, // DDD_with_dsub2_in_FPR64_lo:qsub1 0, // DDD_with_dsub2_in_FPR64_lo:qsub2 0, // DDD_with_dsub2_in_FPR64_lo:qsub3 20, // DDD_with_dsub2_in_FPR64_lo:ssub -> FPR32 0, // DDD_with_dsub2_in_FPR64_lo:sub_32 0, // DDD_with_dsub2_in_FPR64_lo:sube32 0, // DDD_with_dsub2_in_FPR64_lo:sube64 0, // DDD_with_dsub2_in_FPR64_lo:subo32 0, // DDD_with_dsub2_in_FPR64_lo:subo64 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_0 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_1 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_2 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_3 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_4 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_5 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_6 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_7 0, // DDD_with_dsub2_in_FPR64_lo:zasubb 0, // DDD_with_dsub2_in_FPR64_lo:zasubd0 0, // DDD_with_dsub2_in_FPR64_lo:zasubd1 0, // DDD_with_dsub2_in_FPR64_lo:zasubh0 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1 0, // DDD_with_dsub2_in_FPR64_lo:zasubq0 0, // DDD_with_dsub2_in_FPR64_lo:zasubq1 0, // DDD_with_dsub2_in_FPR64_lo:zasubs0 0, // DDD_with_dsub2_in_FPR64_lo:zasubs1 0, // DDD_with_dsub2_in_FPR64_lo:zsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub0 0, // DDD_with_dsub2_in_FPR64_lo:zsub1 0, // DDD_with_dsub2_in_FPR64_lo:zsub2 0, // DDD_with_dsub2_in_FPR64_lo:zsub3 0, // DDD_with_dsub2_in_FPR64_lo:zsub_hi 0, // DDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 0, // DDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 0, // DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 0, // DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 0, // DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 0, // DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 0, // DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DDD_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 2, // DDD_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16 20, // DDD_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32 0, // DDD_with_dsub2_in_FPR64_lo:dsub3_then_bsub 0, // DDD_with_dsub2_in_FPR64_lo:dsub3_then_hsub 0, // DDD_with_dsub2_in_FPR64_lo:dsub3_then_ssub 1, // DDD_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 3, // DDD_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo 24, // DDD_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDD_with_dsub2_in_FPR64_lo:qsub1_then_bsub 0, // DDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub 0, // DDD_with_dsub2_in_FPR64_lo:qsub1_then_hsub 0, // DDD_with_dsub2_in_FPR64_lo:qsub1_then_ssub 0, // DDD_with_dsub2_in_FPR64_lo:qsub3_then_bsub 0, // DDD_with_dsub2_in_FPR64_lo:qsub3_then_dsub 0, // DDD_with_dsub2_in_FPR64_lo:qsub3_then_hsub 0, // DDD_with_dsub2_in_FPR64_lo:qsub3_then_ssub 0, // DDD_with_dsub2_in_FPR64_lo:qsub2_then_bsub 0, // DDD_with_dsub2_in_FPR64_lo:qsub2_then_dsub 0, // DDD_with_dsub2_in_FPR64_lo:qsub2_then_hsub 0, // DDD_with_dsub2_in_FPR64_lo:qsub2_then_ssub 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 0, // DDD_with_dsub2_in_FPR64_lo:subo64_then_sub_32 0, // DDD_with_dsub2_in_FPR64_lo:zsub1_then_bsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub1_then_dsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub1_then_hsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub1_then_ssub 0, // DDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi 0, // DDD_with_dsub2_in_FPR64_lo:zsub3_then_bsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub3_then_dsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub3_then_hsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub3_then_ssub 0, // DDD_with_dsub2_in_FPR64_lo:zsub3_then_zsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi 0, // DDD_with_dsub2_in_FPR64_lo:zsub2_then_bsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub2_then_dsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub2_then_hsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub2_then_ssub 0, // DDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi 53, // DDD_with_dsub2_in_FPR64_lo:dsub0_dsub1 -> DD 0, // DDD_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 55, // DDD_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo 0, // DDD_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 0, // DDD_with_dsub2_in_FPR64_lo:dsub2_dsub3 0, // DDD_with_dsub2_in_FPR64_lo:dsub_qsub1_then_dsub 0, // DDD_with_dsub2_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDD_with_dsub2_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DDD_with_dsub2_in_FPR64_lo:qsub0_qsub1 0, // DDD_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 0, // DDD_with_dsub2_in_FPR64_lo:qsub1_qsub2 0, // DDD_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 0, // DDD_with_dsub2_in_FPR64_lo:qsub2_qsub3 0, // DDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // DDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDD_with_dsub2_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // DDD_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DDD_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // DDD_with_dsub2_in_FPR64_lo:dsub_zsub1_then_dsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub_zsub1_then_zsub 0, // DDD_with_dsub2_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDD_with_dsub2_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub0_zsub1 0, // DDD_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 0, // DDD_with_dsub2_in_FPR64_lo:zsub1_zsub2 0, // DDD_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 0, // DDD_with_dsub2_in_FPR64_lo:zsub2_zsub3 0, // DDD_with_dsub2_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // DDD_with_dsub2_in_FPR64_lo:zsub0_zsub2 0, // DDD_with_dsub2_in_FPR64_lo:zsub1_zsub3 }, { // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 1, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:bsub -> FPR8 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub 44, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub0 -> FPR64_lo 44, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo 36, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub2 -> FPR64 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub3 3, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:hsub -> FPR16_lo 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:psub0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:psub1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub2 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub3 24, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:sube32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:sube64 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:subo32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:subo64 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_2 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_3 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_4 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_5 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_6 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_7 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubb 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubd0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubd1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubq0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubq1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubs0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubs1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub2 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub3 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub_hi 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 3, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo 24, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub3_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub3_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub3_then_ssub 1, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub2_then_bsub -> FPR8 2, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub2_then_hsub -> FPR16 20, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub2_then_ssub -> FPR32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub1_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub1_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub1_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub1_then_ssub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub3_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub3_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub3_then_ssub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub2_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub2_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub2_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub2_then_ssub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:subo64_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub1_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub1_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub1_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub1_then_ssub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub3_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub3_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub3_then_ssub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub3_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub2_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub2_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub2_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub2_then_ssub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub2_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi 57, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 54, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub2_dsub3 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub_qsub1_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub0_qsub1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub1_qsub2 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub2_qsub3 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub_zsub1_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub_zsub1_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub0_zsub1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub1_zsub2 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub2_zsub3 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub0_zsub2 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo:zsub1_zsub3 }, { // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 1, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:bsub -> FPR8 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub 36, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub0 -> FPR64 44, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1 -> FPR64_lo 44, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3 2, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:hsub -> FPR16 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:psub0 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:psub1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub0 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub3 20, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:ssub -> FPR32 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sub_32 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sube32 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sube64 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:subo32 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:subo64 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_0 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_2 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_3 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_4 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_5 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_6 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_7 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubb 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubd0 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubd1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh0 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubq0 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubq1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs0 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub0 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub3 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub_hi 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 3, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo 24, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3_then_bsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3_then_hsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3_then_ssub 1, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 3, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo 24, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_then_bsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_then_hsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_then_ssub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub3_then_bsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub3_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub3_then_hsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub3_then_ssub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2_then_bsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2_then_hsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2_then_ssub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:subo64_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_bsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_hsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_ssub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub3_then_bsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub3_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub3_then_hsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub3_then_ssub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub3_then_zsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_then_bsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_then_hsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_then_ssub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi 55, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub1_in_FPR64_lo 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 57, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_dsub3 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_qsub1_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub0_qsub1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_qsub2 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2_qsub3 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_zsub1_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub_zsub1_then_zsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub0_zsub1 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_zsub2 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_zsub3 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub0_zsub2 0, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_zsub3 }, { // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 1, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:bsub -> FPR8 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub 44, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub0 -> FPR64_lo 44, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1 -> FPR64_lo 44, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3 3, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:hsub -> FPR16_lo 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:psub0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:psub1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub3 24, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sube32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sube64 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:subo32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:subo64 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_2 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_3 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_4 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_5 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_6 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_7 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubb 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubd0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubd1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubq0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubq1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub3 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub_hi 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 3, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo 24, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub3_then_ssub 1, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 3, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo 24, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_then_ssub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub3_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub3_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub3_then_ssub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2_then_ssub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:subo64_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_ssub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub3_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub3_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub3_then_ssub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub3_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_then_bsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_then_hsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_then_ssub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi 57, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 57, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub2_dsub3 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_qsub1_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub0_qsub1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_qsub2 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2_qsub3 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_zsub1_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub_zsub1_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub0_zsub1 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_zsub2 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_zsub3 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub0_zsub2 0, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo:zsub1_zsub3 }, { // DDDD 1, // DDDD:bsub -> FPR8 0, // DDDD:dsub 36, // DDDD:dsub0 -> FPR64 36, // DDDD:dsub1 -> FPR64 36, // DDDD:dsub2 -> FPR64 36, // DDDD:dsub3 -> FPR64 2, // DDDD:hsub -> FPR16 0, // DDDD:psub0 0, // DDDD:psub1 0, // DDDD:qsub0 0, // DDDD:qsub1 0, // DDDD:qsub2 0, // DDDD:qsub3 20, // DDDD:ssub -> FPR32 0, // DDDD:sub_32 0, // DDDD:sube32 0, // DDDD:sube64 0, // DDDD:subo32 0, // DDDD:subo64 0, // DDDD:x8sub_0 0, // DDDD:x8sub_1 0, // DDDD:x8sub_2 0, // DDDD:x8sub_3 0, // DDDD:x8sub_4 0, // DDDD:x8sub_5 0, // DDDD:x8sub_6 0, // DDDD:x8sub_7 0, // DDDD:zasubb 0, // DDDD:zasubd0 0, // DDDD:zasubd1 0, // DDDD:zasubh0 0, // DDDD:zasubh1 0, // DDDD:zasubq0 0, // DDDD:zasubq1 0, // DDDD:zasubs0 0, // DDDD:zasubs1 0, // DDDD:zsub 0, // DDDD:zsub0 0, // DDDD:zsub1 0, // DDDD:zsub2 0, // DDDD:zsub3 0, // DDDD:zsub_hi 0, // DDDD:zasubd1_then_zasubq0 0, // DDDD:zasubd1_then_zasubq1 0, // DDDD:zasubs1_then_zasubd0 0, // DDDD:zasubs1_then_zasubd1 0, // DDDD:zasubs1_then_zasubq0 0, // DDDD:zasubs1_then_zasubq1 0, // DDDD:zasubs1_then_zasubd1_then_zasubq0 0, // DDDD:zasubs1_then_zasubd1_then_zasubq1 0, // DDDD:zasubh1_then_zasubd0 0, // DDDD:zasubh1_then_zasubd1 0, // DDDD:zasubh1_then_zasubq0 0, // DDDD:zasubh1_then_zasubq1 0, // DDDD:zasubh1_then_zasubs0 0, // DDDD:zasubh1_then_zasubs1 0, // DDDD:zasubh1_then_zasubd1_then_zasubq0 0, // DDDD:zasubh1_then_zasubd1_then_zasubq1 0, // DDDD:zasubh1_then_zasubs1_then_zasubd0 0, // DDDD:zasubh1_then_zasubs1_then_zasubd1 0, // DDDD:zasubh1_then_zasubs1_then_zasubq0 0, // DDDD:zasubh1_then_zasubs1_then_zasubq1 0, // DDDD:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DDDD:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DDDD:dsub1_then_bsub -> FPR8 2, // DDDD:dsub1_then_hsub -> FPR16 20, // DDDD:dsub1_then_ssub -> FPR32 1, // DDDD:dsub3_then_bsub -> FPR8 2, // DDDD:dsub3_then_hsub -> FPR16 20, // DDDD:dsub3_then_ssub -> FPR32 1, // DDDD:dsub2_then_bsub -> FPR8 2, // DDDD:dsub2_then_hsub -> FPR16 20, // DDDD:dsub2_then_ssub -> FPR32 0, // DDDD:qsub1_then_bsub 0, // DDDD:qsub1_then_dsub 0, // DDDD:qsub1_then_hsub 0, // DDDD:qsub1_then_ssub 0, // DDDD:qsub3_then_bsub 0, // DDDD:qsub3_then_dsub 0, // DDDD:qsub3_then_hsub 0, // DDDD:qsub3_then_ssub 0, // DDDD:qsub2_then_bsub 0, // DDDD:qsub2_then_dsub 0, // DDDD:qsub2_then_hsub 0, // DDDD:qsub2_then_ssub 0, // DDDD:x8sub_7_then_sub_32 0, // DDDD:x8sub_6_then_sub_32 0, // DDDD:x8sub_5_then_sub_32 0, // DDDD:x8sub_4_then_sub_32 0, // DDDD:x8sub_3_then_sub_32 0, // DDDD:x8sub_2_then_sub_32 0, // DDDD:x8sub_1_then_sub_32 0, // DDDD:subo64_then_sub_32 0, // DDDD:zsub1_then_bsub 0, // DDDD:zsub1_then_dsub 0, // DDDD:zsub1_then_hsub 0, // DDDD:zsub1_then_ssub 0, // DDDD:zsub1_then_zsub 0, // DDDD:zsub1_then_zsub_hi 0, // DDDD:zsub3_then_bsub 0, // DDDD:zsub3_then_dsub 0, // DDDD:zsub3_then_hsub 0, // DDDD:zsub3_then_ssub 0, // DDDD:zsub3_then_zsub 0, // DDDD:zsub3_then_zsub_hi 0, // DDDD:zsub2_then_bsub 0, // DDDD:zsub2_then_dsub 0, // DDDD:zsub2_then_hsub 0, // DDDD:zsub2_then_ssub 0, // DDDD:zsub2_then_zsub 0, // DDDD:zsub2_then_zsub_hi 53, // DDDD:dsub0_dsub1 -> DD 76, // DDDD:dsub0_dsub1_dsub2 -> DDD 53, // DDDD:dsub1_dsub2 -> DD 76, // DDDD:dsub1_dsub2_dsub3 -> DDD 53, // DDDD:dsub2_dsub3 -> DD 0, // DDDD:dsub_qsub1_then_dsub 0, // DDDD:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DDDD:qsub0_qsub1 0, // DDDD:qsub0_qsub1_qsub2 0, // DDDD:qsub1_qsub2 0, // DDDD:qsub1_qsub2_qsub3 0, // DDDD:qsub2_qsub3 0, // DDDD:qsub1_then_dsub_qsub2_then_dsub 0, // DDDD:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD:qsub2_then_dsub_qsub3_then_dsub 0, // DDDD:sub_32_x8sub_1_then_sub_32 0, // DDDD:x8sub_0_x8sub_1 0, // DDDD:x8sub_2_x8sub_3 0, // DDDD:x8sub_4_x8sub_5 0, // DDDD:x8sub_6_x8sub_7 0, // DDDD:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DDDD:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DDDD:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DDDD:sub_32_subo64_then_sub_32 0, // DDDD:dsub_zsub1_then_dsub 0, // DDDD:zsub_zsub1_then_zsub 0, // DDDD:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DDDD:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DDDD:zsub0_zsub1 0, // DDDD:zsub0_zsub1_zsub2 0, // DDDD:zsub1_zsub2 0, // DDDD:zsub1_zsub2_zsub3 0, // DDDD:zsub2_zsub3 0, // DDDD:zsub1_then_dsub_zsub2_then_dsub 0, // DDDD:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD:zsub1_then_zsub_zsub2_then_zsub 0, // DDDD:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD:zsub2_then_dsub_zsub3_then_dsub 0, // DDDD:zsub2_then_zsub_zsub3_then_zsub 0, // DDDD:zsub0_zsub2 0, // DDDD:zsub1_zsub3 }, { // DDDD_with_dsub0_in_FPR64_lo 1, // DDDD_with_dsub0_in_FPR64_lo:bsub -> FPR8 0, // DDDD_with_dsub0_in_FPR64_lo:dsub 44, // DDDD_with_dsub0_in_FPR64_lo:dsub0 -> FPR64_lo 36, // DDDD_with_dsub0_in_FPR64_lo:dsub1 -> FPR64 36, // DDDD_with_dsub0_in_FPR64_lo:dsub2 -> FPR64 36, // DDDD_with_dsub0_in_FPR64_lo:dsub3 -> FPR64 3, // DDDD_with_dsub0_in_FPR64_lo:hsub -> FPR16_lo 0, // DDDD_with_dsub0_in_FPR64_lo:psub0 0, // DDDD_with_dsub0_in_FPR64_lo:psub1 0, // DDDD_with_dsub0_in_FPR64_lo:qsub0 0, // DDDD_with_dsub0_in_FPR64_lo:qsub1 0, // DDDD_with_dsub0_in_FPR64_lo:qsub2 0, // DDDD_with_dsub0_in_FPR64_lo:qsub3 24, // DDDD_with_dsub0_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDDD_with_dsub0_in_FPR64_lo:sub_32 0, // DDDD_with_dsub0_in_FPR64_lo:sube32 0, // DDDD_with_dsub0_in_FPR64_lo:sube64 0, // DDDD_with_dsub0_in_FPR64_lo:subo32 0, // DDDD_with_dsub0_in_FPR64_lo:subo64 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_0 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_1 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_2 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_3 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_4 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_5 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_6 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_7 0, // DDDD_with_dsub0_in_FPR64_lo:zasubb 0, // DDDD_with_dsub0_in_FPR64_lo:zasubd0 0, // DDDD_with_dsub0_in_FPR64_lo:zasubd1 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh0 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1 0, // DDDD_with_dsub0_in_FPR64_lo:zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo:zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo:zasubs0 0, // DDDD_with_dsub0_in_FPR64_lo:zasubs1 0, // DDDD_with_dsub0_in_FPR64_lo:zsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub0 0, // DDDD_with_dsub0_in_FPR64_lo:zsub1 0, // DDDD_with_dsub0_in_FPR64_lo:zsub2 0, // DDDD_with_dsub0_in_FPR64_lo:zsub3 0, // DDDD_with_dsub0_in_FPR64_lo:zsub_hi 0, // DDDD_with_dsub0_in_FPR64_lo:zasubd1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo:zasubd1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd0 0, // DDDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd1 0, // DDDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd0 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd1 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs0 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DDDD_with_dsub0_in_FPR64_lo:dsub1_then_bsub -> FPR8 2, // DDDD_with_dsub0_in_FPR64_lo:dsub1_then_hsub -> FPR16 20, // DDDD_with_dsub0_in_FPR64_lo:dsub1_then_ssub -> FPR32 1, // DDDD_with_dsub0_in_FPR64_lo:dsub3_then_bsub -> FPR8 2, // DDDD_with_dsub0_in_FPR64_lo:dsub3_then_hsub -> FPR16 20, // DDDD_with_dsub0_in_FPR64_lo:dsub3_then_ssub -> FPR32 1, // DDDD_with_dsub0_in_FPR64_lo:dsub2_then_bsub -> FPR8 2, // DDDD_with_dsub0_in_FPR64_lo:dsub2_then_hsub -> FPR16 20, // DDDD_with_dsub0_in_FPR64_lo:dsub2_then_ssub -> FPR32 0, // DDDD_with_dsub0_in_FPR64_lo:qsub1_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo:qsub1_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo:qsub1_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo:qsub1_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo:qsub3_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo:qsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo:qsub3_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo:qsub3_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo:qsub2_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo:qsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo:qsub2_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo:qsub2_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_7_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_6_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_5_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_4_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_3_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_2_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_1_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo:subo64_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo:zsub1_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub1_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub1_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub1_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub1_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub1_then_zsub_hi 0, // DDDD_with_dsub0_in_FPR64_lo:zsub3_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub3_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub3_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub3_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub3_then_zsub_hi 0, // DDDD_with_dsub0_in_FPR64_lo:zsub2_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub2_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub2_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub2_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub2_then_zsub_hi 54, // DDDD_with_dsub0_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub0_in_FPR64_lo 77, // DDDD_with_dsub0_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo 53, // DDDD_with_dsub0_in_FPR64_lo:dsub1_dsub2 -> DD 76, // DDDD_with_dsub0_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD 53, // DDDD_with_dsub0_in_FPR64_lo:dsub2_dsub3 -> DD 0, // DDDD_with_dsub0_in_FPR64_lo:dsub_qsub1_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo:qsub0_qsub1 0, // DDDD_with_dsub0_in_FPR64_lo:qsub0_qsub1_qsub2 0, // DDDD_with_dsub0_in_FPR64_lo:qsub1_qsub2 0, // DDDD_with_dsub0_in_FPR64_lo:qsub1_qsub2_qsub3 0, // DDDD_with_dsub0_in_FPR64_lo:qsub2_qsub3 0, // DDDD_with_dsub0_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_0_x8sub_1 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_2_x8sub_3 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_4_x8sub_5 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_6_x8sub_7 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo:dsub_zsub1_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub_zsub1_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub0_zsub1 0, // DDDD_with_dsub0_in_FPR64_lo:zsub0_zsub1_zsub2 0, // DDDD_with_dsub0_in_FPR64_lo:zsub1_zsub2 0, // DDDD_with_dsub0_in_FPR64_lo:zsub1_zsub2_zsub3 0, // DDDD_with_dsub0_in_FPR64_lo:zsub2_zsub3 0, // DDDD_with_dsub0_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo:zsub0_zsub2 0, // DDDD_with_dsub0_in_FPR64_lo:zsub1_zsub3 }, { // DDDD_with_dsub1_in_FPR64_lo 1, // DDDD_with_dsub1_in_FPR64_lo:bsub -> FPR8 0, // DDDD_with_dsub1_in_FPR64_lo:dsub 36, // DDDD_with_dsub1_in_FPR64_lo:dsub0 -> FPR64 44, // DDDD_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo 36, // DDDD_with_dsub1_in_FPR64_lo:dsub2 -> FPR64 36, // DDDD_with_dsub1_in_FPR64_lo:dsub3 -> FPR64 2, // DDDD_with_dsub1_in_FPR64_lo:hsub -> FPR16 0, // DDDD_with_dsub1_in_FPR64_lo:psub0 0, // DDDD_with_dsub1_in_FPR64_lo:psub1 0, // DDDD_with_dsub1_in_FPR64_lo:qsub0 0, // DDDD_with_dsub1_in_FPR64_lo:qsub1 0, // DDDD_with_dsub1_in_FPR64_lo:qsub2 0, // DDDD_with_dsub1_in_FPR64_lo:qsub3 20, // DDDD_with_dsub1_in_FPR64_lo:ssub -> FPR32 0, // DDDD_with_dsub1_in_FPR64_lo:sub_32 0, // DDDD_with_dsub1_in_FPR64_lo:sube32 0, // DDDD_with_dsub1_in_FPR64_lo:sube64 0, // DDDD_with_dsub1_in_FPR64_lo:subo32 0, // DDDD_with_dsub1_in_FPR64_lo:subo64 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_0 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_1 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_2 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_3 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_4 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_5 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_6 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_7 0, // DDDD_with_dsub1_in_FPR64_lo:zasubb 0, // DDDD_with_dsub1_in_FPR64_lo:zasubd0 0, // DDDD_with_dsub1_in_FPR64_lo:zasubd1 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh0 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1 0, // DDDD_with_dsub1_in_FPR64_lo:zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo:zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo:zasubs0 0, // DDDD_with_dsub1_in_FPR64_lo:zasubs1 0, // DDDD_with_dsub1_in_FPR64_lo:zsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub0 0, // DDDD_with_dsub1_in_FPR64_lo:zsub1 0, // DDDD_with_dsub1_in_FPR64_lo:zsub2 0, // DDDD_with_dsub1_in_FPR64_lo:zsub3 0, // DDDD_with_dsub1_in_FPR64_lo:zsub_hi 0, // DDDD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 0, // DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 0, // DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DDDD_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 3, // DDDD_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo 24, // DDDD_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // DDDD_with_dsub1_in_FPR64_lo:dsub3_then_bsub -> FPR8 2, // DDDD_with_dsub1_in_FPR64_lo:dsub3_then_hsub -> FPR16 20, // DDDD_with_dsub1_in_FPR64_lo:dsub3_then_ssub -> FPR32 1, // DDDD_with_dsub1_in_FPR64_lo:dsub2_then_bsub -> FPR8 2, // DDDD_with_dsub1_in_FPR64_lo:dsub2_then_hsub -> FPR16 20, // DDDD_with_dsub1_in_FPR64_lo:dsub2_then_ssub -> FPR32 0, // DDDD_with_dsub1_in_FPR64_lo:qsub1_then_bsub 0, // DDDD_with_dsub1_in_FPR64_lo:qsub1_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo:qsub1_then_hsub 0, // DDDD_with_dsub1_in_FPR64_lo:qsub1_then_ssub 0, // DDDD_with_dsub1_in_FPR64_lo:qsub3_then_bsub 0, // DDDD_with_dsub1_in_FPR64_lo:qsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo:qsub3_then_hsub 0, // DDDD_with_dsub1_in_FPR64_lo:qsub3_then_ssub 0, // DDDD_with_dsub1_in_FPR64_lo:qsub2_then_bsub 0, // DDDD_with_dsub1_in_FPR64_lo:qsub2_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo:qsub2_then_hsub 0, // DDDD_with_dsub1_in_FPR64_lo:qsub2_then_ssub 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo:subo64_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo:zsub1_then_bsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub1_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub1_then_hsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub1_then_ssub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi 0, // DDDD_with_dsub1_in_FPR64_lo:zsub3_then_bsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub3_then_hsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub3_then_ssub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub3_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi 0, // DDDD_with_dsub1_in_FPR64_lo:zsub2_then_bsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub2_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub2_then_hsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub2_then_ssub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub2_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi 55, // DDDD_with_dsub1_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub1_in_FPR64_lo 78, // DDDD_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo 54, // DDDD_with_dsub1_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo 77, // DDDD_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo 53, // DDDD_with_dsub1_in_FPR64_lo:dsub2_dsub3 -> DD 0, // DDDD_with_dsub1_in_FPR64_lo:dsub_qsub1_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo:qsub0_qsub1 0, // DDDD_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 0, // DDDD_with_dsub1_in_FPR64_lo:qsub1_qsub2 0, // DDDD_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 0, // DDDD_with_dsub1_in_FPR64_lo:qsub2_qsub3 0, // DDDD_with_dsub1_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo:dsub_zsub1_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub_zsub1_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub0_zsub1 0, // DDDD_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 0, // DDDD_with_dsub1_in_FPR64_lo:zsub1_zsub2 0, // DDDD_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 0, // DDDD_with_dsub1_in_FPR64_lo:zsub2_zsub3 0, // DDDD_with_dsub1_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo:zsub0_zsub2 0, // DDDD_with_dsub1_in_FPR64_lo:zsub1_zsub3 }, { // DDDD_with_dsub2_in_FPR64_lo 1, // DDDD_with_dsub2_in_FPR64_lo:bsub -> FPR8 0, // DDDD_with_dsub2_in_FPR64_lo:dsub 36, // DDDD_with_dsub2_in_FPR64_lo:dsub0 -> FPR64 36, // DDDD_with_dsub2_in_FPR64_lo:dsub1 -> FPR64 44, // DDDD_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo 36, // DDDD_with_dsub2_in_FPR64_lo:dsub3 -> FPR64 2, // DDDD_with_dsub2_in_FPR64_lo:hsub -> FPR16 0, // DDDD_with_dsub2_in_FPR64_lo:psub0 0, // DDDD_with_dsub2_in_FPR64_lo:psub1 0, // DDDD_with_dsub2_in_FPR64_lo:qsub0 0, // DDDD_with_dsub2_in_FPR64_lo:qsub1 0, // DDDD_with_dsub2_in_FPR64_lo:qsub2 0, // DDDD_with_dsub2_in_FPR64_lo:qsub3 20, // DDDD_with_dsub2_in_FPR64_lo:ssub -> FPR32 0, // DDDD_with_dsub2_in_FPR64_lo:sub_32 0, // DDDD_with_dsub2_in_FPR64_lo:sube32 0, // DDDD_with_dsub2_in_FPR64_lo:sube64 0, // DDDD_with_dsub2_in_FPR64_lo:subo32 0, // DDDD_with_dsub2_in_FPR64_lo:subo64 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_0 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_1 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_2 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_3 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_4 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_5 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_6 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_7 0, // DDDD_with_dsub2_in_FPR64_lo:zasubb 0, // DDDD_with_dsub2_in_FPR64_lo:zasubd0 0, // DDDD_with_dsub2_in_FPR64_lo:zasubd1 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh0 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1 0, // DDDD_with_dsub2_in_FPR64_lo:zasubq0 0, // DDDD_with_dsub2_in_FPR64_lo:zasubq1 0, // DDDD_with_dsub2_in_FPR64_lo:zasubs0 0, // DDDD_with_dsub2_in_FPR64_lo:zasubs1 0, // DDDD_with_dsub2_in_FPR64_lo:zsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub0 0, // DDDD_with_dsub2_in_FPR64_lo:zsub1 0, // DDDD_with_dsub2_in_FPR64_lo:zsub2 0, // DDDD_with_dsub2_in_FPR64_lo:zsub3 0, // DDDD_with_dsub2_in_FPR64_lo:zsub_hi 0, // DDDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 0, // DDDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 0, // DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 0, // DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 0, // DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 0, // DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 0, // DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DDDD_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 2, // DDDD_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16 20, // DDDD_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32 1, // DDDD_with_dsub2_in_FPR64_lo:dsub3_then_bsub -> FPR8 2, // DDDD_with_dsub2_in_FPR64_lo:dsub3_then_hsub -> FPR16 20, // DDDD_with_dsub2_in_FPR64_lo:dsub3_then_ssub -> FPR32 1, // DDDD_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 3, // DDDD_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo 24, // DDDD_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDDD_with_dsub2_in_FPR64_lo:qsub1_then_bsub 0, // DDDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo:qsub1_then_hsub 0, // DDDD_with_dsub2_in_FPR64_lo:qsub1_then_ssub 0, // DDDD_with_dsub2_in_FPR64_lo:qsub3_then_bsub 0, // DDDD_with_dsub2_in_FPR64_lo:qsub3_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo:qsub3_then_hsub 0, // DDDD_with_dsub2_in_FPR64_lo:qsub3_then_ssub 0, // DDDD_with_dsub2_in_FPR64_lo:qsub2_then_bsub 0, // DDDD_with_dsub2_in_FPR64_lo:qsub2_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo:qsub2_then_hsub 0, // DDDD_with_dsub2_in_FPR64_lo:qsub2_then_ssub 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo:subo64_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo:zsub1_then_bsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub1_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub1_then_hsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub1_then_ssub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi 0, // DDDD_with_dsub2_in_FPR64_lo:zsub3_then_bsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub3_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub3_then_hsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub3_then_ssub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub3_then_zsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi 0, // DDDD_with_dsub2_in_FPR64_lo:zsub2_then_bsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub2_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub2_then_hsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub2_then_ssub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi 53, // DDDD_with_dsub2_in_FPR64_lo:dsub0_dsub1 -> DD 79, // DDDD_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo 55, // DDDD_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo 78, // DDDD_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub1_in_FPR64_lo 54, // DDDD_with_dsub2_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo 0, // DDDD_with_dsub2_in_FPR64_lo:dsub_qsub1_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo:qsub0_qsub1 0, // DDDD_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 0, // DDDD_with_dsub2_in_FPR64_lo:qsub1_qsub2 0, // DDDD_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 0, // DDDD_with_dsub2_in_FPR64_lo:qsub2_qsub3 0, // DDDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo:dsub_zsub1_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub_zsub1_then_zsub 0, // DDDD_with_dsub2_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub0_zsub1 0, // DDDD_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 0, // DDDD_with_dsub2_in_FPR64_lo:zsub1_zsub2 0, // DDDD_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 0, // DDDD_with_dsub2_in_FPR64_lo:zsub2_zsub3 0, // DDDD_with_dsub2_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub2_in_FPR64_lo:zsub0_zsub2 0, // DDDD_with_dsub2_in_FPR64_lo:zsub1_zsub3 }, { // DDDD_with_dsub3_in_FPR64_lo 1, // DDDD_with_dsub3_in_FPR64_lo:bsub -> FPR8 0, // DDDD_with_dsub3_in_FPR64_lo:dsub 36, // DDDD_with_dsub3_in_FPR64_lo:dsub0 -> FPR64 36, // DDDD_with_dsub3_in_FPR64_lo:dsub1 -> FPR64 36, // DDDD_with_dsub3_in_FPR64_lo:dsub2 -> FPR64 44, // DDDD_with_dsub3_in_FPR64_lo:dsub3 -> FPR64_lo 2, // DDDD_with_dsub3_in_FPR64_lo:hsub -> FPR16 0, // DDDD_with_dsub3_in_FPR64_lo:psub0 0, // DDDD_with_dsub3_in_FPR64_lo:psub1 0, // DDDD_with_dsub3_in_FPR64_lo:qsub0 0, // DDDD_with_dsub3_in_FPR64_lo:qsub1 0, // DDDD_with_dsub3_in_FPR64_lo:qsub2 0, // DDDD_with_dsub3_in_FPR64_lo:qsub3 20, // DDDD_with_dsub3_in_FPR64_lo:ssub -> FPR32 0, // DDDD_with_dsub3_in_FPR64_lo:sub_32 0, // DDDD_with_dsub3_in_FPR64_lo:sube32 0, // DDDD_with_dsub3_in_FPR64_lo:sube64 0, // DDDD_with_dsub3_in_FPR64_lo:subo32 0, // DDDD_with_dsub3_in_FPR64_lo:subo64 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_0 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_1 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_2 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_3 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_4 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_5 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_6 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_7 0, // DDDD_with_dsub3_in_FPR64_lo:zasubb 0, // DDDD_with_dsub3_in_FPR64_lo:zasubd0 0, // DDDD_with_dsub3_in_FPR64_lo:zasubd1 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh0 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1 0, // DDDD_with_dsub3_in_FPR64_lo:zasubq0 0, // DDDD_with_dsub3_in_FPR64_lo:zasubq1 0, // DDDD_with_dsub3_in_FPR64_lo:zasubs0 0, // DDDD_with_dsub3_in_FPR64_lo:zasubs1 0, // DDDD_with_dsub3_in_FPR64_lo:zsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub0 0, // DDDD_with_dsub3_in_FPR64_lo:zsub1 0, // DDDD_with_dsub3_in_FPR64_lo:zsub2 0, // DDDD_with_dsub3_in_FPR64_lo:zsub3 0, // DDDD_with_dsub3_in_FPR64_lo:zsub_hi 0, // DDDD_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq0 0, // DDDD_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq1 0, // DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd0 0, // DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1 0, // DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq0 0, // DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq1 0, // DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd0 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq0 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq1 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs0 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DDDD_with_dsub3_in_FPR64_lo:dsub1_then_bsub -> FPR8 2, // DDDD_with_dsub3_in_FPR64_lo:dsub1_then_hsub -> FPR16 20, // DDDD_with_dsub3_in_FPR64_lo:dsub1_then_ssub -> FPR32 1, // DDDD_with_dsub3_in_FPR64_lo:dsub3_then_bsub -> FPR8 3, // DDDD_with_dsub3_in_FPR64_lo:dsub3_then_hsub -> FPR16_lo 24, // DDDD_with_dsub3_in_FPR64_lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // DDDD_with_dsub3_in_FPR64_lo:dsub2_then_bsub -> FPR8 2, // DDDD_with_dsub3_in_FPR64_lo:dsub2_then_hsub -> FPR16 20, // DDDD_with_dsub3_in_FPR64_lo:dsub2_then_ssub -> FPR32 0, // DDDD_with_dsub3_in_FPR64_lo:qsub1_then_bsub 0, // DDDD_with_dsub3_in_FPR64_lo:qsub1_then_dsub 0, // DDDD_with_dsub3_in_FPR64_lo:qsub1_then_hsub 0, // DDDD_with_dsub3_in_FPR64_lo:qsub1_then_ssub 0, // DDDD_with_dsub3_in_FPR64_lo:qsub3_then_bsub 0, // DDDD_with_dsub3_in_FPR64_lo:qsub3_then_dsub 0, // DDDD_with_dsub3_in_FPR64_lo:qsub3_then_hsub 0, // DDDD_with_dsub3_in_FPR64_lo:qsub3_then_ssub 0, // DDDD_with_dsub3_in_FPR64_lo:qsub2_then_bsub 0, // DDDD_with_dsub3_in_FPR64_lo:qsub2_then_dsub 0, // DDDD_with_dsub3_in_FPR64_lo:qsub2_then_hsub 0, // DDDD_with_dsub3_in_FPR64_lo:qsub2_then_ssub 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32 0, // DDDD_with_dsub3_in_FPR64_lo:subo64_then_sub_32 0, // DDDD_with_dsub3_in_FPR64_lo:zsub1_then_bsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub1_then_dsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub1_then_hsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub1_then_ssub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub_hi 0, // DDDD_with_dsub3_in_FPR64_lo:zsub3_then_bsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub3_then_dsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub3_then_hsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub3_then_ssub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub3_then_zsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub3_then_zsub_hi 0, // DDDD_with_dsub3_in_FPR64_lo:zsub2_then_bsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub2_then_dsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub2_then_hsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub2_then_ssub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub2_then_zsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub2_then_zsub_hi 53, // DDDD_with_dsub3_in_FPR64_lo:dsub0_dsub1 -> DD 76, // DDDD_with_dsub3_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD 53, // DDDD_with_dsub3_in_FPR64_lo:dsub1_dsub2 -> DD 79, // DDDD_with_dsub3_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub2_in_FPR64_lo 55, // DDDD_with_dsub3_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub1_in_FPR64_lo 0, // DDDD_with_dsub3_in_FPR64_lo:dsub_qsub1_then_dsub 0, // DDDD_with_dsub3_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub3_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub3_in_FPR64_lo:qsub0_qsub1 0, // DDDD_with_dsub3_in_FPR64_lo:qsub0_qsub1_qsub2 0, // DDDD_with_dsub3_in_FPR64_lo:qsub1_qsub2 0, // DDDD_with_dsub3_in_FPR64_lo:qsub1_qsub2_qsub3 0, // DDDD_with_dsub3_in_FPR64_lo:qsub2_qsub3 0, // DDDD_with_dsub3_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub3_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub3_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub3_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_0_x8sub_1 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_2_x8sub_3 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_4_x8sub_5 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_6_x8sub_7 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DDDD_with_dsub3_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // DDDD_with_dsub3_in_FPR64_lo:dsub_zsub1_then_dsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub_zsub1_then_zsub 0, // DDDD_with_dsub3_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub3_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub1 0, // DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub1_zsub2 0, // DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub2 0, // DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub2_zsub3 0, // DDDD_with_dsub3_in_FPR64_lo:zsub2_zsub3 0, // DDDD_with_dsub3_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub2 0, // DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub3 }, { // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 1, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:bsub -> FPR8 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub 44, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub0 -> FPR64_lo 44, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub1 -> FPR64_lo 36, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub2 -> FPR64 36, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub3 -> FPR64 3, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:hsub -> FPR16_lo 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:psub0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:psub1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub3 24, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:sube32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:sube64 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:subo32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:subo64 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_4 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_5 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_6 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_7 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubb 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubd0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubd1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubs0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubs1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub_hi 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubd1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub1_then_bsub -> FPR8 3, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo 24, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub3_then_bsub -> FPR8 2, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub3_then_hsub -> FPR16 20, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub3_then_ssub -> FPR32 1, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub2_then_bsub -> FPR8 2, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub2_then_hsub -> FPR16 20, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub2_then_ssub -> FPR32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub1_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub1_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub1_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub1_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub3_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub3_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub3_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub2_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub2_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub2_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_7_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_5_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_3_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_1_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:subo64_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub1_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub1_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub1_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub1_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_hi 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub3_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub3_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub3_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub3_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub3_then_zsub_hi 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub2_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub2_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub2_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub2_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub2_then_zsub_hi 57, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 80, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 54, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo 77, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo 53, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub2_dsub3 -> DD 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub_qsub1_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub0_qsub1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub0_qsub1_qsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub1_qsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub1_qsub2_qsub3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub2_qsub3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_0_x8sub_1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_2_x8sub_3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_4_x8sub_5 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_6_x8sub_7 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub_zsub1_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub_zsub1_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub0_zsub1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub0_zsub1_zsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub1_zsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub1_zsub2_zsub3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub2_zsub3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub0_zsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo:zsub1_zsub3 }, { // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 1, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:bsub -> FPR8 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub 36, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub0 -> FPR64 44, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1 -> FPR64_lo 44, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo 36, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3 -> FPR64 2, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:hsub -> FPR16 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:psub0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:psub1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub3 20, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:ssub -> FPR32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sube32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sube64 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:subo32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:subo64 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_2 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_3 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_4 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_5 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_6 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_7 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubb 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubd0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubd1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub3 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub_hi 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 3, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo 24, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3_then_bsub -> FPR8 2, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3_then_hsub -> FPR16 20, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3_then_ssub -> FPR32 1, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 3, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo 24, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_then_bsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_then_hsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_then_ssub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub3_then_bsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub3_then_hsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub3_then_ssub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2_then_bsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2_then_hsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2_then_ssub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:subo64_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_bsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_hsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_ssub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub3_then_bsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub3_then_hsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub3_then_ssub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub3_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_then_bsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_then_hsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_then_ssub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi 55, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub1_in_FPR64_lo 81, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 57, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 80, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 54, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_qsub1_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub0_qsub1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_qsub2 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2_qsub3 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_zsub1_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub_zsub1_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub0_zsub1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_zsub2 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_zsub3 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub0_zsub2 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_zsub3 }, { // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 1, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:bsub -> FPR8 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub 36, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub0 -> FPR64 36, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1 -> FPR64 44, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2 -> FPR64_lo 44, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3 -> FPR64_lo 2, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:hsub -> FPR16 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:psub0 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:psub1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub0 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3 20, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:ssub -> FPR32 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sube32 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sube64 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo32 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo64 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_0 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_3 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_5 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_7 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubb 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd0 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh0 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubq0 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubq1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs0 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_hi 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq0 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd0 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq0 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd0 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq0 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs0 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_bsub -> FPR8 2, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_hsub -> FPR16 20, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_ssub -> FPR32 1, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_bsub -> FPR8 3, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_hsub -> FPR16_lo 24, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_bsub -> FPR8 3, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo 24, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_bsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_hsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_ssub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3_then_bsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3_then_hsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3_then_ssub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_then_bsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_then_hsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_then_ssub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo64_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_bsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_hsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_ssub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub_hi 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_bsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_hsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_ssub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_zsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_zsub_hi 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_bsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_hsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_ssub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_zsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_zsub_hi 53, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub0_dsub1 -> DD 79, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD_with_dsub2_in_FPR64_lo 55, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub1_in_FPR64_lo 81, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 57, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_qsub1_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub0_qsub1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub0_qsub1_qsub2 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_qsub2 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_qsub2_qsub3 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_qsub3 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_0_x8sub_1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_x8sub_3 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_x8sub_5 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_x8sub_7 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_zsub1_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_zsub1_then_zsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub1 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub1_zsub2 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub2 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub2_zsub3 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_zsub3 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub2 0, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub3 }, { // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 1, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:bsub -> FPR8 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub 44, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub0 -> FPR64_lo 44, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1 -> FPR64_lo 44, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2 -> FPR64_lo 36, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3 -> FPR64 3, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:hsub -> FPR16_lo 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:psub0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:psub1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub3 24, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sube32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sube64 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:subo32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:subo64 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_4 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_5 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_6 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_7 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubb 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubd0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubd1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub_hi 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubd1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_then_bsub -> FPR8 3, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo 24, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3_then_bsub -> FPR8 2, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3_then_hsub -> FPR16 20, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub3_then_ssub -> FPR32 1, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_then_bsub -> FPR8 3, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo 24, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub3_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub3_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub3_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_7_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_5_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_3_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_1_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:subo64_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_hi 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub3_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub3_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub3_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub3_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub3_then_zsub_hi 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub_hi 57, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 57, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 80, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 54, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_qsub1_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub0_qsub1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub0_qsub1_qsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_qsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_qsub2_qsub3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2_qsub3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_0_x8sub_1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_2_x8sub_3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_4_x8sub_5 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_6_x8sub_7 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_zsub1_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub_zsub1_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub0_zsub1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub0_zsub1_zsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_zsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_zsub2_zsub3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_zsub3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub0_zsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo:zsub1_zsub3 }, { // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 1, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:bsub -> FPR8 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub 36, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub0 -> FPR64 44, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1 -> FPR64_lo 44, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2 -> FPR64_lo 44, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3 -> FPR64_lo 2, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:hsub -> FPR16 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:psub0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:psub1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3 20, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:ssub -> FPR32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sube32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sube64 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo64 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_3 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_5 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_7 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubb 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_hi 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_bsub -> FPR8 3, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo 24, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_bsub -> FPR8 3, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_hsub -> FPR16_lo 24, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_bsub -> FPR8 3, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo 24, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_bsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_hsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_ssub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3_then_bsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3_then_hsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3_then_ssub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_then_bsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_then_hsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_then_ssub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo64_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_bsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_hsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_ssub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub_hi 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_bsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_hsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_ssub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_zsub_hi 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_bsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_hsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_ssub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_zsub_hi 55, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub1_in_FPR64_lo 81, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 57, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 57, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_qsub1_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub0_qsub1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub0_qsub1_qsub2 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_qsub2 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_qsub2_qsub3 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_qsub3 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_0_x8sub_1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_x8sub_3 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_x8sub_5 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_x8sub_7 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_zsub1_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_zsub1_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub1 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub1_zsub2 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub2 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub2_zsub3 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_zsub3 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub2 0, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub3 }, { // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 1, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:bsub -> FPR8 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub 44, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub0 -> FPR64_lo 44, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1 -> FPR64_lo 44, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2 -> FPR64_lo 44, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3 -> FPR64_lo 3, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:hsub -> FPR16_lo 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:psub0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:psub1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3 24, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sube32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sube64 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo64 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_5 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_7 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubb 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_hi 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubd1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 1, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_bsub -> FPR8 3, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_hsub -> FPR16_lo 24, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_bsub -> FPR8 3, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_hsub -> FPR16_lo 24, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_bsub -> FPR8 3, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_hsub -> FPR16_lo 24, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub3_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_7_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_5_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_3_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_1_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:subo64_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub_hi 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub3_then_zsub_hi 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_bsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_hsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_ssub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_zsub_hi 57, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub0_dsub1 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub0_dsub1_dsub2 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 57, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_dsub2 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub1_dsub2_dsub3 -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 57, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub2_dsub3 -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_qsub1_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub0_qsub1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub0_qsub1_qsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_qsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_qsub2_qsub3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_qsub3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_0_x8sub_1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_x8sub_3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_x8sub_5 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_x8sub_7 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_zsub1_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_zsub1_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub1 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub1_zsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub2_zsub3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_zsub3 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub0_zsub2 0, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo:zsub1_zsub3 }, { // QQ 1, // QQ:bsub -> FPR8 36, // QQ:dsub -> FPR64 0, // QQ:dsub0 0, // QQ:dsub1 0, // QQ:dsub2 0, // QQ:dsub3 2, // QQ:hsub -> FPR16 0, // QQ:psub0 0, // QQ:psub1 70, // QQ:qsub0 -> FPR128 70, // QQ:qsub1 -> FPR128 0, // QQ:qsub2 0, // QQ:qsub3 20, // QQ:ssub -> FPR32 0, // QQ:sub_32 0, // QQ:sube32 0, // QQ:sube64 0, // QQ:subo32 0, // QQ:subo64 0, // QQ:x8sub_0 0, // QQ:x8sub_1 0, // QQ:x8sub_2 0, // QQ:x8sub_3 0, // QQ:x8sub_4 0, // QQ:x8sub_5 0, // QQ:x8sub_6 0, // QQ:x8sub_7 0, // QQ:zasubb 0, // QQ:zasubd0 0, // QQ:zasubd1 0, // QQ:zasubh0 0, // QQ:zasubh1 0, // QQ:zasubq0 0, // QQ:zasubq1 0, // QQ:zasubs0 0, // QQ:zasubs1 0, // QQ:zsub 0, // QQ:zsub0 0, // QQ:zsub1 0, // QQ:zsub2 0, // QQ:zsub3 0, // QQ:zsub_hi 0, // QQ:zasubd1_then_zasubq0 0, // QQ:zasubd1_then_zasubq1 0, // QQ:zasubs1_then_zasubd0 0, // QQ:zasubs1_then_zasubd1 0, // QQ:zasubs1_then_zasubq0 0, // QQ:zasubs1_then_zasubq1 0, // QQ:zasubs1_then_zasubd1_then_zasubq0 0, // QQ:zasubs1_then_zasubd1_then_zasubq1 0, // QQ:zasubh1_then_zasubd0 0, // QQ:zasubh1_then_zasubd1 0, // QQ:zasubh1_then_zasubq0 0, // QQ:zasubh1_then_zasubq1 0, // QQ:zasubh1_then_zasubs0 0, // QQ:zasubh1_then_zasubs1 0, // QQ:zasubh1_then_zasubd1_then_zasubq0 0, // QQ:zasubh1_then_zasubd1_then_zasubq1 0, // QQ:zasubh1_then_zasubs1_then_zasubd0 0, // QQ:zasubh1_then_zasubs1_then_zasubd1 0, // QQ:zasubh1_then_zasubs1_then_zasubq0 0, // QQ:zasubh1_then_zasubs1_then_zasubq1 0, // QQ:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQ:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQ:dsub1_then_bsub 0, // QQ:dsub1_then_hsub 0, // QQ:dsub1_then_ssub 0, // QQ:dsub3_then_bsub 0, // QQ:dsub3_then_hsub 0, // QQ:dsub3_then_ssub 0, // QQ:dsub2_then_bsub 0, // QQ:dsub2_then_hsub 0, // QQ:dsub2_then_ssub 1, // QQ:qsub1_then_bsub -> FPR8 36, // QQ:qsub1_then_dsub -> FPR64 2, // QQ:qsub1_then_hsub -> FPR16 20, // QQ:qsub1_then_ssub -> FPR32 0, // QQ:qsub3_then_bsub 0, // QQ:qsub3_then_dsub 0, // QQ:qsub3_then_hsub 0, // QQ:qsub3_then_ssub 0, // QQ:qsub2_then_bsub 0, // QQ:qsub2_then_dsub 0, // QQ:qsub2_then_hsub 0, // QQ:qsub2_then_ssub 0, // QQ:x8sub_7_then_sub_32 0, // QQ:x8sub_6_then_sub_32 0, // QQ:x8sub_5_then_sub_32 0, // QQ:x8sub_4_then_sub_32 0, // QQ:x8sub_3_then_sub_32 0, // QQ:x8sub_2_then_sub_32 0, // QQ:x8sub_1_then_sub_32 0, // QQ:subo64_then_sub_32 0, // QQ:zsub1_then_bsub 0, // QQ:zsub1_then_dsub 0, // QQ:zsub1_then_hsub 0, // QQ:zsub1_then_ssub 0, // QQ:zsub1_then_zsub 0, // QQ:zsub1_then_zsub_hi 0, // QQ:zsub3_then_bsub 0, // QQ:zsub3_then_dsub 0, // QQ:zsub3_then_hsub 0, // QQ:zsub3_then_ssub 0, // QQ:zsub3_then_zsub 0, // QQ:zsub3_then_zsub_hi 0, // QQ:zsub2_then_bsub 0, // QQ:zsub2_then_dsub 0, // QQ:zsub2_then_hsub 0, // QQ:zsub2_then_ssub 0, // QQ:zsub2_then_zsub 0, // QQ:zsub2_then_zsub_hi 0, // QQ:dsub0_dsub1 0, // QQ:dsub0_dsub1_dsub2 0, // QQ:dsub1_dsub2 0, // QQ:dsub1_dsub2_dsub3 0, // QQ:dsub2_dsub3 53, // QQ:dsub_qsub1_then_dsub -> DD 0, // QQ:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // QQ:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // QQ:qsub0_qsub1 0, // QQ:qsub0_qsub1_qsub2 0, // QQ:qsub1_qsub2 0, // QQ:qsub1_qsub2_qsub3 0, // QQ:qsub2_qsub3 0, // QQ:qsub1_then_dsub_qsub2_then_dsub 0, // QQ:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // QQ:qsub2_then_dsub_qsub3_then_dsub 0, // QQ:sub_32_x8sub_1_then_sub_32 0, // QQ:x8sub_0_x8sub_1 0, // QQ:x8sub_2_x8sub_3 0, // QQ:x8sub_4_x8sub_5 0, // QQ:x8sub_6_x8sub_7 0, // QQ:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQ:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQ:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQ:sub_32_subo64_then_sub_32 0, // QQ:dsub_zsub1_then_dsub 0, // QQ:zsub_zsub1_then_zsub 0, // QQ:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQ:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQ:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQ:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQ:zsub0_zsub1 0, // QQ:zsub0_zsub1_zsub2 0, // QQ:zsub1_zsub2 0, // QQ:zsub1_zsub2_zsub3 0, // QQ:zsub2_zsub3 0, // QQ:zsub1_then_dsub_zsub2_then_dsub 0, // QQ:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQ:zsub1_then_zsub_zsub2_then_zsub 0, // QQ:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQ:zsub2_then_dsub_zsub3_then_dsub 0, // QQ:zsub2_then_zsub_zsub3_then_zsub 0, // QQ:zsub0_zsub2 0, // QQ:zsub1_zsub3 }, { // ZPR2 1, // ZPR2:bsub -> FPR8 36, // ZPR2:dsub -> FPR64 0, // ZPR2:dsub0 0, // ZPR2:dsub1 0, // ZPR2:dsub2 0, // ZPR2:dsub3 2, // ZPR2:hsub -> FPR16 0, // ZPR2:psub0 0, // ZPR2:psub1 0, // ZPR2:qsub0 0, // ZPR2:qsub1 0, // ZPR2:qsub2 0, // ZPR2:qsub3 20, // ZPR2:ssub -> FPR32 0, // ZPR2:sub_32 0, // ZPR2:sube32 0, // ZPR2:sube64 0, // ZPR2:subo32 0, // ZPR2:subo64 0, // ZPR2:x8sub_0 0, // ZPR2:x8sub_1 0, // ZPR2:x8sub_2 0, // ZPR2:x8sub_3 0, // ZPR2:x8sub_4 0, // ZPR2:x8sub_5 0, // ZPR2:x8sub_6 0, // ZPR2:x8sub_7 0, // ZPR2:zasubb 0, // ZPR2:zasubd0 0, // ZPR2:zasubd1 0, // ZPR2:zasubh0 0, // ZPR2:zasubh1 0, // ZPR2:zasubq0 0, // ZPR2:zasubq1 0, // ZPR2:zasubs0 0, // ZPR2:zasubs1 70, // ZPR2:zsub -> FPR128 71, // ZPR2:zsub0 -> ZPR 71, // ZPR2:zsub1 -> ZPR 0, // ZPR2:zsub2 0, // ZPR2:zsub3 0, // ZPR2:zsub_hi 0, // ZPR2:zasubd1_then_zasubq0 0, // ZPR2:zasubd1_then_zasubq1 0, // ZPR2:zasubs1_then_zasubd0 0, // ZPR2:zasubs1_then_zasubd1 0, // ZPR2:zasubs1_then_zasubq0 0, // ZPR2:zasubs1_then_zasubq1 0, // ZPR2:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2:zasubh1_then_zasubd0 0, // ZPR2:zasubh1_then_zasubd1 0, // ZPR2:zasubh1_then_zasubq0 0, // ZPR2:zasubh1_then_zasubq1 0, // ZPR2:zasubh1_then_zasubs0 0, // ZPR2:zasubh1_then_zasubs1 0, // ZPR2:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR2:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR2:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR2:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR2:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR2:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2:dsub1_then_bsub 0, // ZPR2:dsub1_then_hsub 0, // ZPR2:dsub1_then_ssub 0, // ZPR2:dsub3_then_bsub 0, // ZPR2:dsub3_then_hsub 0, // ZPR2:dsub3_then_ssub 0, // ZPR2:dsub2_then_bsub 0, // ZPR2:dsub2_then_hsub 0, // ZPR2:dsub2_then_ssub 0, // ZPR2:qsub1_then_bsub 0, // ZPR2:qsub1_then_dsub 0, // ZPR2:qsub1_then_hsub 0, // ZPR2:qsub1_then_ssub 0, // ZPR2:qsub3_then_bsub 0, // ZPR2:qsub3_then_dsub 0, // ZPR2:qsub3_then_hsub 0, // ZPR2:qsub3_then_ssub 0, // ZPR2:qsub2_then_bsub 0, // ZPR2:qsub2_then_dsub 0, // ZPR2:qsub2_then_hsub 0, // ZPR2:qsub2_then_ssub 0, // ZPR2:x8sub_7_then_sub_32 0, // ZPR2:x8sub_6_then_sub_32 0, // ZPR2:x8sub_5_then_sub_32 0, // ZPR2:x8sub_4_then_sub_32 0, // ZPR2:x8sub_3_then_sub_32 0, // ZPR2:x8sub_2_then_sub_32 0, // ZPR2:x8sub_1_then_sub_32 0, // ZPR2:subo64_then_sub_32 1, // ZPR2:zsub1_then_bsub -> FPR8 36, // ZPR2:zsub1_then_dsub -> FPR64 2, // ZPR2:zsub1_then_hsub -> FPR16 20, // ZPR2:zsub1_then_ssub -> FPR32 70, // ZPR2:zsub1_then_zsub -> FPR128 0, // ZPR2:zsub1_then_zsub_hi 0, // ZPR2:zsub3_then_bsub 0, // ZPR2:zsub3_then_dsub 0, // ZPR2:zsub3_then_hsub 0, // ZPR2:zsub3_then_ssub 0, // ZPR2:zsub3_then_zsub 0, // ZPR2:zsub3_then_zsub_hi 0, // ZPR2:zsub2_then_bsub 0, // ZPR2:zsub2_then_dsub 0, // ZPR2:zsub2_then_hsub 0, // ZPR2:zsub2_then_ssub 0, // ZPR2:zsub2_then_zsub 0, // ZPR2:zsub2_then_zsub_hi 0, // ZPR2:dsub0_dsub1 0, // ZPR2:dsub0_dsub1_dsub2 0, // ZPR2:dsub1_dsub2 0, // ZPR2:dsub1_dsub2_dsub3 0, // ZPR2:dsub2_dsub3 0, // ZPR2:dsub_qsub1_then_dsub 0, // ZPR2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2:qsub0_qsub1 0, // ZPR2:qsub0_qsub1_qsub2 0, // ZPR2:qsub1_qsub2 0, // ZPR2:qsub1_qsub2_qsub3 0, // ZPR2:qsub2_qsub3 0, // ZPR2:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2:sub_32_x8sub_1_then_sub_32 0, // ZPR2:x8sub_0_x8sub_1 0, // ZPR2:x8sub_2_x8sub_3 0, // ZPR2:x8sub_4_x8sub_5 0, // ZPR2:x8sub_6_x8sub_7 0, // ZPR2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR2:sub_32_subo64_then_sub_32 53, // ZPR2:dsub_zsub1_then_dsub -> DD 94, // ZPR2:zsub_zsub1_then_zsub -> QQ 0, // ZPR2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2:zsub0_zsub1 0, // ZPR2:zsub0_zsub1_zsub2 0, // ZPR2:zsub1_zsub2 0, // ZPR2:zsub1_zsub2_zsub3 0, // ZPR2:zsub2_zsub3 0, // ZPR2:zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2:zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2:zsub0_zsub2 0, // ZPR2:zsub1_zsub3 }, { // QQ_with_dsub_in_FPR64_lo 1, // QQ_with_dsub_in_FPR64_lo:bsub -> FPR8 44, // QQ_with_dsub_in_FPR64_lo:dsub -> FPR64_lo 0, // QQ_with_dsub_in_FPR64_lo:dsub0 0, // QQ_with_dsub_in_FPR64_lo:dsub1 0, // QQ_with_dsub_in_FPR64_lo:dsub2 0, // QQ_with_dsub_in_FPR64_lo:dsub3 3, // QQ_with_dsub_in_FPR64_lo:hsub -> FPR16_lo 0, // QQ_with_dsub_in_FPR64_lo:psub0 0, // QQ_with_dsub_in_FPR64_lo:psub1 72, // QQ_with_dsub_in_FPR64_lo:qsub0 -> FPR128_lo 70, // QQ_with_dsub_in_FPR64_lo:qsub1 -> FPR128 0, // QQ_with_dsub_in_FPR64_lo:qsub2 0, // QQ_with_dsub_in_FPR64_lo:qsub3 24, // QQ_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQ_with_dsub_in_FPR64_lo:sub_32 0, // QQ_with_dsub_in_FPR64_lo:sube32 0, // QQ_with_dsub_in_FPR64_lo:sube64 0, // QQ_with_dsub_in_FPR64_lo:subo32 0, // QQ_with_dsub_in_FPR64_lo:subo64 0, // QQ_with_dsub_in_FPR64_lo:x8sub_0 0, // QQ_with_dsub_in_FPR64_lo:x8sub_1 0, // QQ_with_dsub_in_FPR64_lo:x8sub_2 0, // QQ_with_dsub_in_FPR64_lo:x8sub_3 0, // QQ_with_dsub_in_FPR64_lo:x8sub_4 0, // QQ_with_dsub_in_FPR64_lo:x8sub_5 0, // QQ_with_dsub_in_FPR64_lo:x8sub_6 0, // QQ_with_dsub_in_FPR64_lo:x8sub_7 0, // QQ_with_dsub_in_FPR64_lo:zasubb 0, // QQ_with_dsub_in_FPR64_lo:zasubd0 0, // QQ_with_dsub_in_FPR64_lo:zasubd1 0, // QQ_with_dsub_in_FPR64_lo:zasubh0 0, // QQ_with_dsub_in_FPR64_lo:zasubh1 0, // QQ_with_dsub_in_FPR64_lo:zasubq0 0, // QQ_with_dsub_in_FPR64_lo:zasubq1 0, // QQ_with_dsub_in_FPR64_lo:zasubs0 0, // QQ_with_dsub_in_FPR64_lo:zasubs1 0, // QQ_with_dsub_in_FPR64_lo:zsub 0, // QQ_with_dsub_in_FPR64_lo:zsub0 0, // QQ_with_dsub_in_FPR64_lo:zsub1 0, // QQ_with_dsub_in_FPR64_lo:zsub2 0, // QQ_with_dsub_in_FPR64_lo:zsub3 0, // QQ_with_dsub_in_FPR64_lo:zsub_hi 0, // QQ_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // QQ_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // QQ_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // QQ_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // QQ_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // QQ_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // QQ_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // QQ_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // QQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // QQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // QQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // QQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // QQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // QQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // QQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // QQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // QQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // QQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // QQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // QQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // QQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQ_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // QQ_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // QQ_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // QQ_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // QQ_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // QQ_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // QQ_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // QQ_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // QQ_with_dsub_in_FPR64_lo:dsub2_then_ssub 1, // QQ_with_dsub_in_FPR64_lo:qsub1_then_bsub -> FPR8 36, // QQ_with_dsub_in_FPR64_lo:qsub1_then_dsub -> FPR64 2, // QQ_with_dsub_in_FPR64_lo:qsub1_then_hsub -> FPR16 20, // QQ_with_dsub_in_FPR64_lo:qsub1_then_ssub -> FPR32 0, // QQ_with_dsub_in_FPR64_lo:qsub3_then_bsub 0, // QQ_with_dsub_in_FPR64_lo:qsub3_then_dsub 0, // QQ_with_dsub_in_FPR64_lo:qsub3_then_hsub 0, // QQ_with_dsub_in_FPR64_lo:qsub3_then_ssub 0, // QQ_with_dsub_in_FPR64_lo:qsub2_then_bsub 0, // QQ_with_dsub_in_FPR64_lo:qsub2_then_dsub 0, // QQ_with_dsub_in_FPR64_lo:qsub2_then_hsub 0, // QQ_with_dsub_in_FPR64_lo:qsub2_then_ssub 0, // QQ_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo:subo64_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo:zsub1_then_bsub 0, // QQ_with_dsub_in_FPR64_lo:zsub1_then_dsub 0, // QQ_with_dsub_in_FPR64_lo:zsub1_then_hsub 0, // QQ_with_dsub_in_FPR64_lo:zsub1_then_ssub 0, // QQ_with_dsub_in_FPR64_lo:zsub1_then_zsub 0, // QQ_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 0, // QQ_with_dsub_in_FPR64_lo:zsub3_then_bsub 0, // QQ_with_dsub_in_FPR64_lo:zsub3_then_dsub 0, // QQ_with_dsub_in_FPR64_lo:zsub3_then_hsub 0, // QQ_with_dsub_in_FPR64_lo:zsub3_then_ssub 0, // QQ_with_dsub_in_FPR64_lo:zsub3_then_zsub 0, // QQ_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 0, // QQ_with_dsub_in_FPR64_lo:zsub2_then_bsub 0, // QQ_with_dsub_in_FPR64_lo:zsub2_then_dsub 0, // QQ_with_dsub_in_FPR64_lo:zsub2_then_hsub 0, // QQ_with_dsub_in_FPR64_lo:zsub2_then_ssub 0, // QQ_with_dsub_in_FPR64_lo:zsub2_then_zsub 0, // QQ_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // QQ_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // QQ_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // QQ_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // QQ_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // QQ_with_dsub_in_FPR64_lo:dsub2_dsub3 54, // QQ_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo 0, // QQ_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // QQ_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // QQ_with_dsub_in_FPR64_lo:qsub0_qsub1 0, // QQ_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 0, // QQ_with_dsub_in_FPR64_lo:qsub1_qsub2 0, // QQ_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 0, // QQ_with_dsub_in_FPR64_lo:qsub2_qsub3 0, // QQ_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // QQ_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // QQ_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // QQ_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // QQ_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // QQ_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // QQ_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // QQ_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub 0, // QQ_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub 0, // QQ_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQ_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQ_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQ_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQ_with_dsub_in_FPR64_lo:zsub0_zsub1 0, // QQ_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 0, // QQ_with_dsub_in_FPR64_lo:zsub1_zsub2 0, // QQ_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 0, // QQ_with_dsub_in_FPR64_lo:zsub2_zsub3 0, // QQ_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // QQ_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQ_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // QQ_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQ_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // QQ_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // QQ_with_dsub_in_FPR64_lo:zsub0_zsub2 0, // QQ_with_dsub_in_FPR64_lo:zsub1_zsub3 }, { // QQ_with_qsub1_in_FPR128_lo 1, // QQ_with_qsub1_in_FPR128_lo:bsub -> FPR8 36, // QQ_with_qsub1_in_FPR128_lo:dsub -> FPR64 0, // QQ_with_qsub1_in_FPR128_lo:dsub0 0, // QQ_with_qsub1_in_FPR128_lo:dsub1 0, // QQ_with_qsub1_in_FPR128_lo:dsub2 0, // QQ_with_qsub1_in_FPR128_lo:dsub3 2, // QQ_with_qsub1_in_FPR128_lo:hsub -> FPR16 0, // QQ_with_qsub1_in_FPR128_lo:psub0 0, // QQ_with_qsub1_in_FPR128_lo:psub1 70, // QQ_with_qsub1_in_FPR128_lo:qsub0 -> FPR128 72, // QQ_with_qsub1_in_FPR128_lo:qsub1 -> FPR128_lo 0, // QQ_with_qsub1_in_FPR128_lo:qsub2 0, // QQ_with_qsub1_in_FPR128_lo:qsub3 20, // QQ_with_qsub1_in_FPR128_lo:ssub -> FPR32 0, // QQ_with_qsub1_in_FPR128_lo:sub_32 0, // QQ_with_qsub1_in_FPR128_lo:sube32 0, // QQ_with_qsub1_in_FPR128_lo:sube64 0, // QQ_with_qsub1_in_FPR128_lo:subo32 0, // QQ_with_qsub1_in_FPR128_lo:subo64 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_0 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_1 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_2 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_3 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_4 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_5 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_6 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_7 0, // QQ_with_qsub1_in_FPR128_lo:zasubb 0, // QQ_with_qsub1_in_FPR128_lo:zasubd0 0, // QQ_with_qsub1_in_FPR128_lo:zasubd1 0, // QQ_with_qsub1_in_FPR128_lo:zasubh0 0, // QQ_with_qsub1_in_FPR128_lo:zasubh1 0, // QQ_with_qsub1_in_FPR128_lo:zasubq0 0, // QQ_with_qsub1_in_FPR128_lo:zasubq1 0, // QQ_with_qsub1_in_FPR128_lo:zasubs0 0, // QQ_with_qsub1_in_FPR128_lo:zasubs1 0, // QQ_with_qsub1_in_FPR128_lo:zsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub0 0, // QQ_with_qsub1_in_FPR128_lo:zsub1 0, // QQ_with_qsub1_in_FPR128_lo:zsub2 0, // QQ_with_qsub1_in_FPR128_lo:zsub3 0, // QQ_with_qsub1_in_FPR128_lo:zsub_hi 0, // QQ_with_qsub1_in_FPR128_lo:zasubd1_then_zasubq0 0, // QQ_with_qsub1_in_FPR128_lo:zasubd1_then_zasubq1 0, // QQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd0 0, // QQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd1 0, // QQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubq0 0, // QQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubq1 0, // QQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 0, // QQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 0, // QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd0 0, // QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd1 0, // QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubq0 0, // QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubq1 0, // QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs0 0, // QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1 0, // QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 0, // QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 0, // QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 0, // QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 0, // QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 0, // QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 0, // QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQ_with_qsub1_in_FPR128_lo:dsub1_then_bsub 0, // QQ_with_qsub1_in_FPR128_lo:dsub1_then_hsub 0, // QQ_with_qsub1_in_FPR128_lo:dsub1_then_ssub 0, // QQ_with_qsub1_in_FPR128_lo:dsub3_then_bsub 0, // QQ_with_qsub1_in_FPR128_lo:dsub3_then_hsub 0, // QQ_with_qsub1_in_FPR128_lo:dsub3_then_ssub 0, // QQ_with_qsub1_in_FPR128_lo:dsub2_then_bsub 0, // QQ_with_qsub1_in_FPR128_lo:dsub2_then_hsub 0, // QQ_with_qsub1_in_FPR128_lo:dsub2_then_ssub 1, // QQ_with_qsub1_in_FPR128_lo:qsub1_then_bsub -> FPR8 44, // QQ_with_qsub1_in_FPR128_lo:qsub1_then_dsub -> FPR64_lo 3, // QQ_with_qsub1_in_FPR128_lo:qsub1_then_hsub -> FPR16_lo 24, // QQ_with_qsub1_in_FPR128_lo:qsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQ_with_qsub1_in_FPR128_lo:qsub3_then_bsub 0, // QQ_with_qsub1_in_FPR128_lo:qsub3_then_dsub 0, // QQ_with_qsub1_in_FPR128_lo:qsub3_then_hsub 0, // QQ_with_qsub1_in_FPR128_lo:qsub3_then_ssub 0, // QQ_with_qsub1_in_FPR128_lo:qsub2_then_bsub 0, // QQ_with_qsub1_in_FPR128_lo:qsub2_then_dsub 0, // QQ_with_qsub1_in_FPR128_lo:qsub2_then_hsub 0, // QQ_with_qsub1_in_FPR128_lo:qsub2_then_ssub 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_7_then_sub_32 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_6_then_sub_32 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_5_then_sub_32 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_4_then_sub_32 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_3_then_sub_32 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_2_then_sub_32 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_1_then_sub_32 0, // QQ_with_qsub1_in_FPR128_lo:subo64_then_sub_32 0, // QQ_with_qsub1_in_FPR128_lo:zsub1_then_bsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub1_then_dsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub1_then_hsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub1_then_ssub 0, // QQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub_hi 0, // QQ_with_qsub1_in_FPR128_lo:zsub3_then_bsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub3_then_dsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub3_then_hsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub3_then_ssub 0, // QQ_with_qsub1_in_FPR128_lo:zsub3_then_zsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub3_then_zsub_hi 0, // QQ_with_qsub1_in_FPR128_lo:zsub2_then_bsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub2_then_dsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub2_then_hsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub2_then_ssub 0, // QQ_with_qsub1_in_FPR128_lo:zsub2_then_zsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub2_then_zsub_hi 0, // QQ_with_qsub1_in_FPR128_lo:dsub0_dsub1 0, // QQ_with_qsub1_in_FPR128_lo:dsub0_dsub1_dsub2 0, // QQ_with_qsub1_in_FPR128_lo:dsub1_dsub2 0, // QQ_with_qsub1_in_FPR128_lo:dsub1_dsub2_dsub3 0, // QQ_with_qsub1_in_FPR128_lo:dsub2_dsub3 55, // QQ_with_qsub1_in_FPR128_lo:dsub_qsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 0, // QQ_with_qsub1_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // QQ_with_qsub1_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // QQ_with_qsub1_in_FPR128_lo:qsub0_qsub1 0, // QQ_with_qsub1_in_FPR128_lo:qsub0_qsub1_qsub2 0, // QQ_with_qsub1_in_FPR128_lo:qsub1_qsub2 0, // QQ_with_qsub1_in_FPR128_lo:qsub1_qsub2_qsub3 0, // QQ_with_qsub1_in_FPR128_lo:qsub2_qsub3 0, // QQ_with_qsub1_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub 0, // QQ_with_qsub1_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // QQ_with_qsub1_in_FPR128_lo:qsub2_then_dsub_qsub3_then_dsub 0, // QQ_with_qsub1_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_0_x8sub_1 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_2_x8sub_3 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_4_x8sub_5 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_6_x8sub_7 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQ_with_qsub1_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQ_with_qsub1_in_FPR128_lo:sub_32_subo64_then_sub_32 0, // QQ_with_qsub1_in_FPR128_lo:dsub_zsub1_then_dsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub_zsub1_then_zsub 0, // QQ_with_qsub1_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQ_with_qsub1_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub0_zsub1 0, // QQ_with_qsub1_in_FPR128_lo:zsub0_zsub1_zsub2 0, // QQ_with_qsub1_in_FPR128_lo:zsub1_zsub2 0, // QQ_with_qsub1_in_FPR128_lo:zsub1_zsub2_zsub3 0, // QQ_with_qsub1_in_FPR128_lo:zsub2_zsub3 0, // QQ_with_qsub1_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub2_then_dsub_zsub3_then_dsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub2_then_zsub_zsub3_then_zsub 0, // QQ_with_qsub1_in_FPR128_lo:zsub0_zsub2 0, // QQ_with_qsub1_in_FPR128_lo:zsub1_zsub3 }, { // ZPR2Mul2 1, // ZPR2Mul2:bsub -> FPR8 36, // ZPR2Mul2:dsub -> FPR64 0, // ZPR2Mul2:dsub0 0, // ZPR2Mul2:dsub1 0, // ZPR2Mul2:dsub2 0, // ZPR2Mul2:dsub3 2, // ZPR2Mul2:hsub -> FPR16 0, // ZPR2Mul2:psub0 0, // ZPR2Mul2:psub1 0, // ZPR2Mul2:qsub0 0, // ZPR2Mul2:qsub1 0, // ZPR2Mul2:qsub2 0, // ZPR2Mul2:qsub3 20, // ZPR2Mul2:ssub -> FPR32 0, // ZPR2Mul2:sub_32 0, // ZPR2Mul2:sube32 0, // ZPR2Mul2:sube64 0, // ZPR2Mul2:subo32 0, // ZPR2Mul2:subo64 0, // ZPR2Mul2:x8sub_0 0, // ZPR2Mul2:x8sub_1 0, // ZPR2Mul2:x8sub_2 0, // ZPR2Mul2:x8sub_3 0, // ZPR2Mul2:x8sub_4 0, // ZPR2Mul2:x8sub_5 0, // ZPR2Mul2:x8sub_6 0, // ZPR2Mul2:x8sub_7 0, // ZPR2Mul2:zasubb 0, // ZPR2Mul2:zasubd0 0, // ZPR2Mul2:zasubd1 0, // ZPR2Mul2:zasubh0 0, // ZPR2Mul2:zasubh1 0, // ZPR2Mul2:zasubq0 0, // ZPR2Mul2:zasubq1 0, // ZPR2Mul2:zasubs0 0, // ZPR2Mul2:zasubs1 70, // ZPR2Mul2:zsub -> FPR128 71, // ZPR2Mul2:zsub0 -> ZPR 71, // ZPR2Mul2:zsub1 -> ZPR 0, // ZPR2Mul2:zsub2 0, // ZPR2Mul2:zsub3 0, // ZPR2Mul2:zsub_hi 0, // ZPR2Mul2:zasubd1_then_zasubq0 0, // ZPR2Mul2:zasubd1_then_zasubq1 0, // ZPR2Mul2:zasubs1_then_zasubd0 0, // ZPR2Mul2:zasubs1_then_zasubd1 0, // ZPR2Mul2:zasubs1_then_zasubq0 0, // ZPR2Mul2:zasubs1_then_zasubq1 0, // ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2Mul2:zasubh1_then_zasubd0 0, // ZPR2Mul2:zasubh1_then_zasubd1 0, // ZPR2Mul2:zasubh1_then_zasubq0 0, // ZPR2Mul2:zasubh1_then_zasubq1 0, // ZPR2Mul2:zasubh1_then_zasubs0 0, // ZPR2Mul2:zasubh1_then_zasubs1 0, // ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2Mul2:dsub1_then_bsub 0, // ZPR2Mul2:dsub1_then_hsub 0, // ZPR2Mul2:dsub1_then_ssub 0, // ZPR2Mul2:dsub3_then_bsub 0, // ZPR2Mul2:dsub3_then_hsub 0, // ZPR2Mul2:dsub3_then_ssub 0, // ZPR2Mul2:dsub2_then_bsub 0, // ZPR2Mul2:dsub2_then_hsub 0, // ZPR2Mul2:dsub2_then_ssub 0, // ZPR2Mul2:qsub1_then_bsub 0, // ZPR2Mul2:qsub1_then_dsub 0, // ZPR2Mul2:qsub1_then_hsub 0, // ZPR2Mul2:qsub1_then_ssub 0, // ZPR2Mul2:qsub3_then_bsub 0, // ZPR2Mul2:qsub3_then_dsub 0, // ZPR2Mul2:qsub3_then_hsub 0, // ZPR2Mul2:qsub3_then_ssub 0, // ZPR2Mul2:qsub2_then_bsub 0, // ZPR2Mul2:qsub2_then_dsub 0, // ZPR2Mul2:qsub2_then_hsub 0, // ZPR2Mul2:qsub2_then_ssub 0, // ZPR2Mul2:x8sub_7_then_sub_32 0, // ZPR2Mul2:x8sub_6_then_sub_32 0, // ZPR2Mul2:x8sub_5_then_sub_32 0, // ZPR2Mul2:x8sub_4_then_sub_32 0, // ZPR2Mul2:x8sub_3_then_sub_32 0, // ZPR2Mul2:x8sub_2_then_sub_32 0, // ZPR2Mul2:x8sub_1_then_sub_32 0, // ZPR2Mul2:subo64_then_sub_32 1, // ZPR2Mul2:zsub1_then_bsub -> FPR8 36, // ZPR2Mul2:zsub1_then_dsub -> FPR64 2, // ZPR2Mul2:zsub1_then_hsub -> FPR16 20, // ZPR2Mul2:zsub1_then_ssub -> FPR32 70, // ZPR2Mul2:zsub1_then_zsub -> FPR128 0, // ZPR2Mul2:zsub1_then_zsub_hi 0, // ZPR2Mul2:zsub3_then_bsub 0, // ZPR2Mul2:zsub3_then_dsub 0, // ZPR2Mul2:zsub3_then_hsub 0, // ZPR2Mul2:zsub3_then_ssub 0, // ZPR2Mul2:zsub3_then_zsub 0, // ZPR2Mul2:zsub3_then_zsub_hi 0, // ZPR2Mul2:zsub2_then_bsub 0, // ZPR2Mul2:zsub2_then_dsub 0, // ZPR2Mul2:zsub2_then_hsub 0, // ZPR2Mul2:zsub2_then_ssub 0, // ZPR2Mul2:zsub2_then_zsub 0, // ZPR2Mul2:zsub2_then_zsub_hi 0, // ZPR2Mul2:dsub0_dsub1 0, // ZPR2Mul2:dsub0_dsub1_dsub2 0, // ZPR2Mul2:dsub1_dsub2 0, // ZPR2Mul2:dsub1_dsub2_dsub3 0, // ZPR2Mul2:dsub2_dsub3 0, // ZPR2Mul2:dsub_qsub1_then_dsub 0, // ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2Mul2:qsub0_qsub1 0, // ZPR2Mul2:qsub0_qsub1_qsub2 0, // ZPR2Mul2:qsub1_qsub2 0, // ZPR2Mul2:qsub1_qsub2_qsub3 0, // ZPR2Mul2:qsub2_qsub3 0, // ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2Mul2:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2Mul2:sub_32_x8sub_1_then_sub_32 0, // ZPR2Mul2:x8sub_0_x8sub_1 0, // ZPR2Mul2:x8sub_2_x8sub_3 0, // ZPR2Mul2:x8sub_4_x8sub_5 0, // ZPR2Mul2:x8sub_6_x8sub_7 0, // ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR2Mul2:sub_32_subo64_then_sub_32 53, // ZPR2Mul2:dsub_zsub1_then_dsub -> DD 94, // ZPR2Mul2:zsub_zsub1_then_zsub -> QQ 0, // ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2Mul2:zsub0_zsub1 0, // ZPR2Mul2:zsub0_zsub1_zsub2 0, // ZPR2Mul2:zsub1_zsub2 0, // ZPR2Mul2:zsub1_zsub2_zsub3 0, // ZPR2Mul2:zsub2_zsub3 0, // ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2Mul2:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2Mul2:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2Mul2:zsub0_zsub2 0, // ZPR2Mul2:zsub1_zsub3 }, { // ZPR2_with_dsub_in_FPR64_lo 1, // ZPR2_with_dsub_in_FPR64_lo:bsub -> FPR8 44, // ZPR2_with_dsub_in_FPR64_lo:dsub -> FPR64_lo 0, // ZPR2_with_dsub_in_FPR64_lo:dsub0 0, // ZPR2_with_dsub_in_FPR64_lo:dsub1 0, // ZPR2_with_dsub_in_FPR64_lo:dsub2 0, // ZPR2_with_dsub_in_FPR64_lo:dsub3 3, // ZPR2_with_dsub_in_FPR64_lo:hsub -> FPR16_lo 0, // ZPR2_with_dsub_in_FPR64_lo:psub0 0, // ZPR2_with_dsub_in_FPR64_lo:psub1 0, // ZPR2_with_dsub_in_FPR64_lo:qsub0 0, // ZPR2_with_dsub_in_FPR64_lo:qsub1 0, // ZPR2_with_dsub_in_FPR64_lo:qsub2 0, // ZPR2_with_dsub_in_FPR64_lo:qsub3 24, // ZPR2_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR2_with_dsub_in_FPR64_lo:sub_32 0, // ZPR2_with_dsub_in_FPR64_lo:sube32 0, // ZPR2_with_dsub_in_FPR64_lo:sube64 0, // ZPR2_with_dsub_in_FPR64_lo:subo32 0, // ZPR2_with_dsub_in_FPR64_lo:subo64 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_0 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_1 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_2 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_3 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_4 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_5 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_6 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_7 0, // ZPR2_with_dsub_in_FPR64_lo:zasubb 0, // ZPR2_with_dsub_in_FPR64_lo:zasubd0 0, // ZPR2_with_dsub_in_FPR64_lo:zasubd1 0, // ZPR2_with_dsub_in_FPR64_lo:zasubh0 0, // ZPR2_with_dsub_in_FPR64_lo:zasubh1 0, // ZPR2_with_dsub_in_FPR64_lo:zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo:zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo:zasubs0 0, // ZPR2_with_dsub_in_FPR64_lo:zasubs1 72, // ZPR2_with_dsub_in_FPR64_lo:zsub -> FPR128_lo 74, // ZPR2_with_dsub_in_FPR64_lo:zsub0 -> ZPR_4b 71, // ZPR2_with_dsub_in_FPR64_lo:zsub1 -> ZPR 0, // ZPR2_with_dsub_in_FPR64_lo:zsub2 0, // ZPR2_with_dsub_in_FPR64_lo:zsub3 0, // ZPR2_with_dsub_in_FPR64_lo:zsub_hi 0, // ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo:dsub2_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo:qsub1_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo:qsub1_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo:qsub1_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo:qsub3_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo:qsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo:qsub3_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo:qsub3_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo:qsub2_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo:qsub2_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo:qsub2_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo:subo64_then_sub_32 1, // ZPR2_with_dsub_in_FPR64_lo:zsub1_then_bsub -> FPR8 36, // ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub -> FPR64 2, // ZPR2_with_dsub_in_FPR64_lo:zsub1_then_hsub -> FPR16 20, // ZPR2_with_dsub_in_FPR64_lo:zsub1_then_ssub -> FPR32 70, // ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub -> FPR128 0, // ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 0, // ZPR2_with_dsub_in_FPR64_lo:zsub3_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo:zsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo:zsub3_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo:zsub3_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 0, // ZPR2_with_dsub_in_FPR64_lo:zsub2_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo:zsub2_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo:zsub2_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // ZPR2_with_dsub_in_FPR64_lo:dsub2_dsub3 0, // ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1 0, // ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 0, // ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2 0, // ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 0, // ZPR2_with_dsub_in_FPR64_lo:qsub2_qsub3 0, // ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 54, // ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo 96, // ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo 0, // ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1 0, // ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 0, // ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2 0, // ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 0, // ZPR2_with_dsub_in_FPR64_lo:zsub2_zsub3 0, // ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub2 0, // ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub3 }, { // ZPR2_with_zsub1_in_ZPR_4b 1, // ZPR2_with_zsub1_in_ZPR_4b:bsub -> FPR8 36, // ZPR2_with_zsub1_in_ZPR_4b:dsub -> FPR64 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub0 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub1 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub2 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub3 2, // ZPR2_with_zsub1_in_ZPR_4b:hsub -> FPR16 0, // ZPR2_with_zsub1_in_ZPR_4b:psub0 0, // ZPR2_with_zsub1_in_ZPR_4b:psub1 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub0 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub1 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub2 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub3 20, // ZPR2_with_zsub1_in_ZPR_4b:ssub -> FPR32 0, // ZPR2_with_zsub1_in_ZPR_4b:sub_32 0, // ZPR2_with_zsub1_in_ZPR_4b:sube32 0, // ZPR2_with_zsub1_in_ZPR_4b:sube64 0, // ZPR2_with_zsub1_in_ZPR_4b:subo32 0, // ZPR2_with_zsub1_in_ZPR_4b:subo64 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_0 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_1 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_2 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_3 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_4 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_5 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_6 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_7 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubb 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubd0 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubd1 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubh0 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubh1 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubq0 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubq1 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubs0 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubs1 70, // ZPR2_with_zsub1_in_ZPR_4b:zsub -> FPR128 71, // ZPR2_with_zsub1_in_ZPR_4b:zsub0 -> ZPR 74, // ZPR2_with_zsub1_in_ZPR_4b:zsub1 -> ZPR_4b 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub2 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub3 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub_hi 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubd1_then_zasubq0 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubd1_then_zasubq1 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd0 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd1 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubs1_then_zasubq0 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubs1_then_zasubq1 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd0 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd1 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubq0 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubq1 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs0 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub1_then_bsub 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub1_then_hsub 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub1_then_ssub 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub3_then_bsub 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub3_then_hsub 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub3_then_ssub 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub2_then_bsub 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub2_then_hsub 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub2_then_ssub 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub1_then_bsub 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub1_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub1_then_hsub 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub1_then_ssub 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub3_then_bsub 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub3_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub3_then_hsub 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub3_then_ssub 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub2_then_bsub 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub2_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub2_then_hsub 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub2_then_ssub 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_7_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_6_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_5_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_4_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_3_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_2_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_1_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_4b:subo64_then_sub_32 1, // ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_bsub -> FPR8 44, // ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_dsub -> FPR64_lo 3, // ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_hsub -> FPR16_lo 24, // ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_zsub -> FPR128_lo 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_zsub_hi 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub3_then_bsub 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub3_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub3_then_hsub 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub3_then_ssub 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub3_then_zsub 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub3_then_zsub_hi 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub2_then_bsub 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub2_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub2_then_hsub 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub2_then_ssub 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub2_then_zsub 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub2_then_zsub_hi 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub0_dsub1 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub0_dsub1_dsub2 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub1_dsub2 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub1_dsub2_dsub3 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub2_dsub3 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub_qsub1_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub0_qsub1 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub0_qsub1_qsub2 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub1_qsub2 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub1_qsub2_qsub3 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub2_qsub3 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_4b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_4b:sub_32_x8sub_1_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_0_x8sub_1 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_2_x8sub_3 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_4_x8sub_5 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_6_x8sub_7 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_4b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_4b:sub_32_subo64_then_sub_32 55, // ZPR2_with_zsub1_in_ZPR_4b:dsub_zsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR2_with_zsub1_in_ZPR_4b:zsub_zsub1_then_zsub -> QQ_with_qsub1_in_FPR128_lo 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub0_zsub1 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub0_zsub1_zsub2 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub1_zsub2 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub1_zsub2_zsub3 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub2_zsub3 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub0_zsub2 0, // ZPR2_with_zsub1_in_ZPR_4b:zsub1_zsub3 }, { // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 1, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:bsub -> FPR8 44, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub -> FPR64_lo 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub0 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub2 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub3 3, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:hsub -> FPR16_lo 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:psub0 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:psub1 72, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub0 -> FPR128_lo 72, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub1 -> FPR128_lo 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub2 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub3 24, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:sub_32 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:sube32 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:sube64 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:subo32 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:subo64 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_0 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_2 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_3 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_4 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_5 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_6 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_7 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubb 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubd0 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubd1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubh0 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubh1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubq0 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubq1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubs0 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubs1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub0 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub2 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub3 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub_hi 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubd1_then_zasubq0 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubd1_then_zasubq1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd0 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubq0 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubq1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd0 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubq0 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubq1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs0 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub1_then_bsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub1_then_hsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub1_then_ssub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub3_then_bsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub3_then_hsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub3_then_ssub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub2_then_bsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub2_then_hsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub2_then_ssub 1, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub1_then_bsub -> FPR8 44, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub1_then_dsub -> FPR64_lo 3, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub1_then_hsub -> FPR16_lo 24, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub3_then_bsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub3_then_dsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub3_then_hsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub3_then_ssub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub2_then_bsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub2_then_dsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub2_then_hsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub2_then_ssub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_7_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_6_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_5_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_4_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_3_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_2_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_1_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:subo64_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub1_then_bsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub1_then_dsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub1_then_hsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub1_then_ssub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub_hi 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub3_then_bsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub3_then_dsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub3_then_hsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub3_then_ssub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub3_then_zsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub3_then_zsub_hi 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub2_then_bsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub2_then_dsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub2_then_hsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub2_then_ssub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub2_then_zsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub2_then_zsub_hi 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub0_dsub1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub0_dsub1_dsub2 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub1_dsub2 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub1_dsub2_dsub3 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub2_dsub3 57, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub_qsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub0_qsub1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub0_qsub1_qsub2 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub1_qsub2 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub1_qsub2_qsub3 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub2_qsub3 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:qsub2_then_dsub_qsub3_then_dsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_0_x8sub_1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_2_x8sub_3 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_4_x8sub_5 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_6_x8sub_7 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:sub_32_subo64_then_sub_32 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub_zsub1_then_dsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub_zsub1_then_zsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub0_zsub1 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub0_zsub1_zsub2 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub1_zsub2 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub1_zsub2_zsub3 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub2_zsub3 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub2_then_dsub_zsub3_then_dsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub2_then_zsub_zsub3_then_zsub 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub0_zsub2 0, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo:zsub1_zsub3 }, { // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 1, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:bsub -> FPR8 44, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub -> FPR64_lo 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub3 3, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:hsub -> FPR16_lo 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:psub0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:psub1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub3 24, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:sube32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:sube64 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:subo32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:subo64 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_3 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_4 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_5 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_6 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_7 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubb 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubd0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubd1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubh0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubh1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubs0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubs1 72, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub -> FPR128_lo 74, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub0 -> ZPR_4b 74, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub1 -> ZPR_4b 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub3 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub_hi 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubd1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubd1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubs1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubs1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub1_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub1_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub1_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub3_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub3_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub3_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub2_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub2_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub2_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub1_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub1_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub1_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub1_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub3_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub3_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub3_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub2_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub2_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub2_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub2_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_7_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_6_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_5_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_4_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_3_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_2_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_1_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:subo64_then_sub_32 1, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_bsub -> FPR8 44, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_dsub -> FPR64_lo 3, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_hsub -> FPR16_lo 24, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_zsub -> FPR128_lo 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_zsub_hi 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub3_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub3_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub3_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub3_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub3_then_zsub_hi 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub2_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub2_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub2_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub2_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub2_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub2_then_zsub_hi 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub0_dsub1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub0_dsub1_dsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub1_dsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub1_dsub2_dsub3 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub2_dsub3 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub_qsub1_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub0_qsub1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub0_qsub1_qsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub1_qsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub1_qsub2_qsub3 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub2_qsub3 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:sub_32_x8sub_1_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_0_x8sub_1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_2_x8sub_3 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_4_x8sub_5 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_6_x8sub_7 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:sub_32_subo64_then_sub_32 57, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub0_zsub1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub0_zsub1_zsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub1_zsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub1_zsub2_zsub3 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub2_zsub3 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub0_zsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b:zsub1_zsub3 }, { // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 1, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:bsub -> FPR8 44, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub -> FPR64_lo 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3 3, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:hsub -> FPR16_lo 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub0 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3 24, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube32 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube64 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo32 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubb 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd0 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh0 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq0 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs0 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1 72, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub -> FPR128_lo 74, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0 -> ZPR_4b 74, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1 -> ZPR_4b 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_hi 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_ssub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_bsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_hsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_ssub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_bsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_hsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_ssub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_bsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_hsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_ssub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64_then_sub_32 1, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_bsub -> FPR8 44, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub -> FPR64_lo 3, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_hsub -> FPR16_lo 24, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub -> FPR128_lo 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_bsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_hsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_ssub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_bsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_hsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_ssub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_dsub3 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_qsub3 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 57, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_zsub3 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub2 0, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub3 }, { // ZPR2_with_zsub0_in_ZPR_3b 1, // ZPR2_with_zsub0_in_ZPR_3b:bsub -> FPR8 44, // ZPR2_with_zsub0_in_ZPR_3b:dsub -> FPR64_lo 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub0 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub1 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub2 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub3 3, // ZPR2_with_zsub0_in_ZPR_3b:hsub -> FPR16_lo 0, // ZPR2_with_zsub0_in_ZPR_3b:psub0 0, // ZPR2_with_zsub0_in_ZPR_3b:psub1 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub0 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub1 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub2 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub3 24, // ZPR2_with_zsub0_in_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR2_with_zsub0_in_ZPR_3b:sub_32 0, // ZPR2_with_zsub0_in_ZPR_3b:sube32 0, // ZPR2_with_zsub0_in_ZPR_3b:sube64 0, // ZPR2_with_zsub0_in_ZPR_3b:subo32 0, // ZPR2_with_zsub0_in_ZPR_3b:subo64 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_0 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_1 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_2 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_3 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_4 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_5 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_6 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_7 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubb 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubd0 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubd1 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubh0 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubh1 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubq0 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubq1 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubs0 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubs1 72, // ZPR2_with_zsub0_in_ZPR_3b:zsub -> FPR128_lo 75, // ZPR2_with_zsub0_in_ZPR_3b:zsub0 -> ZPR_3b 74, // ZPR2_with_zsub0_in_ZPR_3b:zsub1 -> ZPR_4b 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub2 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub3 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub_hi 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_bsub 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_hsub 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_ssub 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_bsub 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_hsub 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_ssub 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_bsub 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_hsub 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_ssub 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_bsub 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_hsub 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_ssub 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_bsub 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_dsub 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_hsub 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_ssub 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_bsub 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_hsub 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_ssub 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR2_with_zsub0_in_ZPR_3b:subo64_then_sub_32 1, // ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_hi 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_bsub 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_dsub 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_hsub 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_ssub 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub_hi 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_bsub 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_hsub 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_ssub 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub2_dsub3 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub2_qsub3 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2_with_zsub0_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR2_with_zsub0_in_ZPR_3b:sub_32_subo64_then_sub_32 57, // ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1_zsub2 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2_zsub3 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub2_zsub3 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub2 0, // ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub3 }, { // ZPR2_with_zsub1_in_ZPR_3b 1, // ZPR2_with_zsub1_in_ZPR_3b:bsub -> FPR8 36, // ZPR2_with_zsub1_in_ZPR_3b:dsub -> FPR64 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub0 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub1 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub2 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub3 2, // ZPR2_with_zsub1_in_ZPR_3b:hsub -> FPR16 0, // ZPR2_with_zsub1_in_ZPR_3b:psub0 0, // ZPR2_with_zsub1_in_ZPR_3b:psub1 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub0 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub1 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub2 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub3 20, // ZPR2_with_zsub1_in_ZPR_3b:ssub -> FPR32 0, // ZPR2_with_zsub1_in_ZPR_3b:sub_32 0, // ZPR2_with_zsub1_in_ZPR_3b:sube32 0, // ZPR2_with_zsub1_in_ZPR_3b:sube64 0, // ZPR2_with_zsub1_in_ZPR_3b:subo32 0, // ZPR2_with_zsub1_in_ZPR_3b:subo64 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_0 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_1 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_2 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_3 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_4 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_5 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_6 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_7 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubb 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubd0 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubd1 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubh0 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubh1 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubq0 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubq1 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubs0 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubs1 70, // ZPR2_with_zsub1_in_ZPR_3b:zsub -> FPR128 71, // ZPR2_with_zsub1_in_ZPR_3b:zsub0 -> ZPR 75, // ZPR2_with_zsub1_in_ZPR_3b:zsub1 -> ZPR_3b 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub2 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub3 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub_hi 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub1_then_bsub 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub1_then_hsub 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub1_then_ssub 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub3_then_bsub 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub3_then_hsub 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub3_then_ssub 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub2_then_bsub 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub2_then_hsub 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub2_then_ssub 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub1_then_bsub 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub1_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub1_then_hsub 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub1_then_ssub 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub3_then_bsub 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub3_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub3_then_hsub 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub3_then_ssub 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub2_then_bsub 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub2_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub2_then_hsub 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub2_then_ssub 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_3b:subo64_then_sub_32 1, // ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_zsub_hi 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub3_then_bsub 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub3_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub3_then_hsub 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub3_then_ssub 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub3_then_zsub 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub3_then_zsub_hi 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub2_then_bsub 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub2_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub2_then_hsub 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub2_then_ssub 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub2_then_zsub 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub0_dsub1 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub1_dsub2 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub2_dsub3 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub0_qsub1 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub1_qsub2 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub2_qsub3 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR2_with_zsub1_in_ZPR_3b:sub_32_subo64_then_sub_32 55, // ZPR2_with_zsub1_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR2_with_zsub1_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_qsub1_in_FPR128_lo 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub0_zsub1 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub0_zsub1_zsub2 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub1_zsub2 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub1_zsub2_zsub3 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub2_zsub3 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub0_zsub2 0, // ZPR2_with_zsub1_in_ZPR_3b:zsub1_zsub3 }, { // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 1, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:bsub -> FPR8 44, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub -> FPR64_lo 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub3 3, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:hsub -> FPR16_lo 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:psub0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:psub1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub3 24, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:sube32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:sube64 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:subo32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:subo64 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_3 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_4 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_5 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_6 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_7 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubb 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubd0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubd1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubh0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubh1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubs0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubs1 72, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub -> FPR128_lo 75, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub0 -> ZPR_3b 75, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub1 -> ZPR_3b 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub3 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub_hi 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub1_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub1_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub1_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub3_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub3_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub3_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub2_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub2_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub2_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub1_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub1_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub1_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub1_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub3_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub3_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub3_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub2_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub2_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub2_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub2_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:subo64_then_sub_32 1, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_zsub_hi 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub3_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub3_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub3_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub3_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub3_then_zsub_hi 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub2_then_bsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub2_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub2_then_hsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub2_then_ssub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub2_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub0_dsub1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub1_dsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub2_dsub3 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub0_qsub1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub1_qsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub2_qsub3 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:sub_32_subo64_then_sub_32 57, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub0_zsub1 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub0_zsub1_zsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub1_zsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub1_zsub2_zsub3 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub2_zsub3 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub0_zsub2 0, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b:zsub1_zsub3 }, { // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 1, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:bsub -> FPR8 44, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub -> FPR64_lo 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3 3, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:hsub -> FPR16_lo 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:psub0 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:psub1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3 24, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sube32 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sube64 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo32 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo64 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_0 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_3 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_5 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_7 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubb 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd0 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh0 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubq0 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubq1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs0 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1 72, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub -> FPR128_lo 75, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0 -> ZPR_3b 75, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1 -> ZPR_3b 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_hi 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_bsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_hsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_ssub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_bsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_hsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_ssub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_bsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_hsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_ssub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_bsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_hsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_ssub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_bsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_hsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_ssub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_bsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_hsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_ssub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo64_then_sub_32 1, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_hi 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_bsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_hsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_ssub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub_hi 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_bsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_hsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_ssub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_dsub3 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_qsub3 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32_subo64_then_sub_32 57, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1_zsub2 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2_zsub3 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_zsub3 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub2 0, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub3 }, { // ZPR2Strided 1, // ZPR2Strided:bsub -> FPR8 36, // ZPR2Strided:dsub -> FPR64 0, // ZPR2Strided:dsub0 0, // ZPR2Strided:dsub1 0, // ZPR2Strided:dsub2 0, // ZPR2Strided:dsub3 2, // ZPR2Strided:hsub -> FPR16 0, // ZPR2Strided:psub0 0, // ZPR2Strided:psub1 0, // ZPR2Strided:qsub0 0, // ZPR2Strided:qsub1 0, // ZPR2Strided:qsub2 0, // ZPR2Strided:qsub3 20, // ZPR2Strided:ssub -> FPR32 0, // ZPR2Strided:sub_32 0, // ZPR2Strided:sube32 0, // ZPR2Strided:sube64 0, // ZPR2Strided:subo32 0, // ZPR2Strided:subo64 0, // ZPR2Strided:x8sub_0 0, // ZPR2Strided:x8sub_1 0, // ZPR2Strided:x8sub_2 0, // ZPR2Strided:x8sub_3 0, // ZPR2Strided:x8sub_4 0, // ZPR2Strided:x8sub_5 0, // ZPR2Strided:x8sub_6 0, // ZPR2Strided:x8sub_7 0, // ZPR2Strided:zasubb 0, // ZPR2Strided:zasubd0 0, // ZPR2Strided:zasubd1 0, // ZPR2Strided:zasubh0 0, // ZPR2Strided:zasubh1 0, // ZPR2Strided:zasubq0 0, // ZPR2Strided:zasubq1 0, // ZPR2Strided:zasubs0 0, // ZPR2Strided:zasubs1 70, // ZPR2Strided:zsub -> FPR128 71, // ZPR2Strided:zsub0 -> ZPR 71, // ZPR2Strided:zsub1 -> ZPR 0, // ZPR2Strided:zsub2 0, // ZPR2Strided:zsub3 0, // ZPR2Strided:zsub_hi 0, // ZPR2Strided:zasubd1_then_zasubq0 0, // ZPR2Strided:zasubd1_then_zasubq1 0, // ZPR2Strided:zasubs1_then_zasubd0 0, // ZPR2Strided:zasubs1_then_zasubd1 0, // ZPR2Strided:zasubs1_then_zasubq0 0, // ZPR2Strided:zasubs1_then_zasubq1 0, // ZPR2Strided:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2Strided:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2Strided:zasubh1_then_zasubd0 0, // ZPR2Strided:zasubh1_then_zasubd1 0, // ZPR2Strided:zasubh1_then_zasubq0 0, // ZPR2Strided:zasubh1_then_zasubq1 0, // ZPR2Strided:zasubh1_then_zasubs0 0, // ZPR2Strided:zasubh1_then_zasubs1 0, // ZPR2Strided:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR2Strided:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR2Strided:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR2Strided:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR2Strided:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR2Strided:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR2Strided:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2Strided:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2Strided:dsub1_then_bsub 0, // ZPR2Strided:dsub1_then_hsub 0, // ZPR2Strided:dsub1_then_ssub 0, // ZPR2Strided:dsub3_then_bsub 0, // ZPR2Strided:dsub3_then_hsub 0, // ZPR2Strided:dsub3_then_ssub 0, // ZPR2Strided:dsub2_then_bsub 0, // ZPR2Strided:dsub2_then_hsub 0, // ZPR2Strided:dsub2_then_ssub 0, // ZPR2Strided:qsub1_then_bsub 0, // ZPR2Strided:qsub1_then_dsub 0, // ZPR2Strided:qsub1_then_hsub 0, // ZPR2Strided:qsub1_then_ssub 0, // ZPR2Strided:qsub3_then_bsub 0, // ZPR2Strided:qsub3_then_dsub 0, // ZPR2Strided:qsub3_then_hsub 0, // ZPR2Strided:qsub3_then_ssub 0, // ZPR2Strided:qsub2_then_bsub 0, // ZPR2Strided:qsub2_then_dsub 0, // ZPR2Strided:qsub2_then_hsub 0, // ZPR2Strided:qsub2_then_ssub 0, // ZPR2Strided:x8sub_7_then_sub_32 0, // ZPR2Strided:x8sub_6_then_sub_32 0, // ZPR2Strided:x8sub_5_then_sub_32 0, // ZPR2Strided:x8sub_4_then_sub_32 0, // ZPR2Strided:x8sub_3_then_sub_32 0, // ZPR2Strided:x8sub_2_then_sub_32 0, // ZPR2Strided:x8sub_1_then_sub_32 0, // ZPR2Strided:subo64_then_sub_32 1, // ZPR2Strided:zsub1_then_bsub -> FPR8 36, // ZPR2Strided:zsub1_then_dsub -> FPR64 2, // ZPR2Strided:zsub1_then_hsub -> FPR16 20, // ZPR2Strided:zsub1_then_ssub -> FPR32 70, // ZPR2Strided:zsub1_then_zsub -> FPR128 0, // ZPR2Strided:zsub1_then_zsub_hi 0, // ZPR2Strided:zsub3_then_bsub 0, // ZPR2Strided:zsub3_then_dsub 0, // ZPR2Strided:zsub3_then_hsub 0, // ZPR2Strided:zsub3_then_ssub 0, // ZPR2Strided:zsub3_then_zsub 0, // ZPR2Strided:zsub3_then_zsub_hi 0, // ZPR2Strided:zsub2_then_bsub 0, // ZPR2Strided:zsub2_then_dsub 0, // ZPR2Strided:zsub2_then_hsub 0, // ZPR2Strided:zsub2_then_ssub 0, // ZPR2Strided:zsub2_then_zsub 0, // ZPR2Strided:zsub2_then_zsub_hi 0, // ZPR2Strided:dsub0_dsub1 0, // ZPR2Strided:dsub0_dsub1_dsub2 0, // ZPR2Strided:dsub1_dsub2 0, // ZPR2Strided:dsub1_dsub2_dsub3 0, // ZPR2Strided:dsub2_dsub3 0, // ZPR2Strided:dsub_qsub1_then_dsub 0, // ZPR2Strided:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2Strided:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2Strided:qsub0_qsub1 0, // ZPR2Strided:qsub0_qsub1_qsub2 0, // ZPR2Strided:qsub1_qsub2 0, // ZPR2Strided:qsub1_qsub2_qsub3 0, // ZPR2Strided:qsub2_qsub3 0, // ZPR2Strided:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2Strided:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2Strided:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2Strided:sub_32_x8sub_1_then_sub_32 0, // ZPR2Strided:x8sub_0_x8sub_1 0, // ZPR2Strided:x8sub_2_x8sub_3 0, // ZPR2Strided:x8sub_4_x8sub_5 0, // ZPR2Strided:x8sub_6_x8sub_7 0, // ZPR2Strided:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR2Strided:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR2Strided:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR2Strided:sub_32_subo64_then_sub_32 0, // ZPR2Strided:dsub_zsub1_then_dsub 0, // ZPR2Strided:zsub_zsub1_then_zsub 0, // ZPR2Strided:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2Strided:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2Strided:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2Strided:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2Strided:zsub0_zsub1 0, // ZPR2Strided:zsub0_zsub1_zsub2 0, // ZPR2Strided:zsub1_zsub2 0, // ZPR2Strided:zsub1_zsub2_zsub3 0, // ZPR2Strided:zsub2_zsub3 0, // ZPR2Strided:zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2Strided:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2Strided:zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2Strided:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2Strided:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2Strided:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2Strided:zsub0_zsub2 0, // ZPR2Strided:zsub1_zsub3 }, { // MPR64 0, // MPR64:bsub 0, // MPR64:dsub 0, // MPR64:dsub0 0, // MPR64:dsub1 0, // MPR64:dsub2 0, // MPR64:dsub3 0, // MPR64:hsub 0, // MPR64:psub0 0, // MPR64:psub1 0, // MPR64:qsub0 0, // MPR64:qsub1 0, // MPR64:qsub2 0, // MPR64:qsub3 0, // MPR64:ssub 0, // MPR64:sub_32 0, // MPR64:sube32 0, // MPR64:sube64 0, // MPR64:subo32 0, // MPR64:subo64 0, // MPR64:x8sub_0 0, // MPR64:x8sub_1 0, // MPR64:x8sub_2 0, // MPR64:x8sub_3 0, // MPR64:x8sub_4 0, // MPR64:x8sub_5 0, // MPR64:x8sub_6 0, // MPR64:x8sub_7 0, // MPR64:zasubb 0, // MPR64:zasubd0 0, // MPR64:zasubd1 0, // MPR64:zasubh0 0, // MPR64:zasubh1 73, // MPR64:zasubq0 -> MPR128 73, // MPR64:zasubq1 -> MPR128 0, // MPR64:zasubs0 0, // MPR64:zasubs1 0, // MPR64:zsub 0, // MPR64:zsub0 0, // MPR64:zsub1 0, // MPR64:zsub2 0, // MPR64:zsub3 0, // MPR64:zsub_hi 0, // MPR64:zasubd1_then_zasubq0 0, // MPR64:zasubd1_then_zasubq1 0, // MPR64:zasubs1_then_zasubd0 0, // MPR64:zasubs1_then_zasubd1 0, // MPR64:zasubs1_then_zasubq0 0, // MPR64:zasubs1_then_zasubq1 0, // MPR64:zasubs1_then_zasubd1_then_zasubq0 0, // MPR64:zasubs1_then_zasubd1_then_zasubq1 0, // MPR64:zasubh1_then_zasubd0 0, // MPR64:zasubh1_then_zasubd1 0, // MPR64:zasubh1_then_zasubq0 0, // MPR64:zasubh1_then_zasubq1 0, // MPR64:zasubh1_then_zasubs0 0, // MPR64:zasubh1_then_zasubs1 0, // MPR64:zasubh1_then_zasubd1_then_zasubq0 0, // MPR64:zasubh1_then_zasubd1_then_zasubq1 0, // MPR64:zasubh1_then_zasubs1_then_zasubd0 0, // MPR64:zasubh1_then_zasubs1_then_zasubd1 0, // MPR64:zasubh1_then_zasubs1_then_zasubq0 0, // MPR64:zasubh1_then_zasubs1_then_zasubq1 0, // MPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // MPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // MPR64:dsub1_then_bsub 0, // MPR64:dsub1_then_hsub 0, // MPR64:dsub1_then_ssub 0, // MPR64:dsub3_then_bsub 0, // MPR64:dsub3_then_hsub 0, // MPR64:dsub3_then_ssub 0, // MPR64:dsub2_then_bsub 0, // MPR64:dsub2_then_hsub 0, // MPR64:dsub2_then_ssub 0, // MPR64:qsub1_then_bsub 0, // MPR64:qsub1_then_dsub 0, // MPR64:qsub1_then_hsub 0, // MPR64:qsub1_then_ssub 0, // MPR64:qsub3_then_bsub 0, // MPR64:qsub3_then_dsub 0, // MPR64:qsub3_then_hsub 0, // MPR64:qsub3_then_ssub 0, // MPR64:qsub2_then_bsub 0, // MPR64:qsub2_then_dsub 0, // MPR64:qsub2_then_hsub 0, // MPR64:qsub2_then_ssub 0, // MPR64:x8sub_7_then_sub_32 0, // MPR64:x8sub_6_then_sub_32 0, // MPR64:x8sub_5_then_sub_32 0, // MPR64:x8sub_4_then_sub_32 0, // MPR64:x8sub_3_then_sub_32 0, // MPR64:x8sub_2_then_sub_32 0, // MPR64:x8sub_1_then_sub_32 0, // MPR64:subo64_then_sub_32 0, // MPR64:zsub1_then_bsub 0, // MPR64:zsub1_then_dsub 0, // MPR64:zsub1_then_hsub 0, // MPR64:zsub1_then_ssub 0, // MPR64:zsub1_then_zsub 0, // MPR64:zsub1_then_zsub_hi 0, // MPR64:zsub3_then_bsub 0, // MPR64:zsub3_then_dsub 0, // MPR64:zsub3_then_hsub 0, // MPR64:zsub3_then_ssub 0, // MPR64:zsub3_then_zsub 0, // MPR64:zsub3_then_zsub_hi 0, // MPR64:zsub2_then_bsub 0, // MPR64:zsub2_then_dsub 0, // MPR64:zsub2_then_hsub 0, // MPR64:zsub2_then_ssub 0, // MPR64:zsub2_then_zsub 0, // MPR64:zsub2_then_zsub_hi 0, // MPR64:dsub0_dsub1 0, // MPR64:dsub0_dsub1_dsub2 0, // MPR64:dsub1_dsub2 0, // MPR64:dsub1_dsub2_dsub3 0, // MPR64:dsub2_dsub3 0, // MPR64:dsub_qsub1_then_dsub 0, // MPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // MPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // MPR64:qsub0_qsub1 0, // MPR64:qsub0_qsub1_qsub2 0, // MPR64:qsub1_qsub2 0, // MPR64:qsub1_qsub2_qsub3 0, // MPR64:qsub2_qsub3 0, // MPR64:qsub1_then_dsub_qsub2_then_dsub 0, // MPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // MPR64:qsub2_then_dsub_qsub3_then_dsub 0, // MPR64:sub_32_x8sub_1_then_sub_32 0, // MPR64:x8sub_0_x8sub_1 0, // MPR64:x8sub_2_x8sub_3 0, // MPR64:x8sub_4_x8sub_5 0, // MPR64:x8sub_6_x8sub_7 0, // MPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // MPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // MPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // MPR64:sub_32_subo64_then_sub_32 0, // MPR64:dsub_zsub1_then_dsub 0, // MPR64:zsub_zsub1_then_zsub 0, // MPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // MPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // MPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // MPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // MPR64:zsub0_zsub1 0, // MPR64:zsub0_zsub1_zsub2 0, // MPR64:zsub1_zsub2 0, // MPR64:zsub1_zsub2_zsub3 0, // MPR64:zsub2_zsub3 0, // MPR64:zsub1_then_dsub_zsub2_then_dsub 0, // MPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // MPR64:zsub1_then_zsub_zsub2_then_zsub 0, // MPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // MPR64:zsub2_then_dsub_zsub3_then_dsub 0, // MPR64:zsub2_then_zsub_zsub3_then_zsub 0, // MPR64:zsub0_zsub2 0, // MPR64:zsub1_zsub3 }, { // ZPR2Strided_with_dsub_in_FPR64_lo 1, // ZPR2Strided_with_dsub_in_FPR64_lo:bsub -> FPR8 44, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub -> FPR64_lo 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub0 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub2 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub3 3, // ZPR2Strided_with_dsub_in_FPR64_lo:hsub -> FPR16_lo 0, // ZPR2Strided_with_dsub_in_FPR64_lo:psub0 0, // ZPR2Strided_with_dsub_in_FPR64_lo:psub1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub0 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub2 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub3 24, // ZPR2Strided_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR2Strided_with_dsub_in_FPR64_lo:sub_32 0, // ZPR2Strided_with_dsub_in_FPR64_lo:sube32 0, // ZPR2Strided_with_dsub_in_FPR64_lo:sube64 0, // ZPR2Strided_with_dsub_in_FPR64_lo:subo32 0, // ZPR2Strided_with_dsub_in_FPR64_lo:subo64 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_0 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_2 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_3 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_4 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_5 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_6 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_7 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubb 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubd0 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubd1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh0 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubq0 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubq1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubs0 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubs1 72, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub -> FPR128_lo 75, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub0 -> ZPR_3b 74, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub1 -> ZPR_4b 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub2 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub3 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub_hi 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub2_then_ssub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub1_then_bsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub1_then_dsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub1_then_hsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub1_then_ssub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub3_then_bsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub3_then_dsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub3_then_hsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub3_then_ssub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub2_then_bsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub2_then_dsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub2_then_hsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub2_then_ssub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // ZPR2Strided_with_dsub_in_FPR64_lo:subo64_then_sub_32 1, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub1_then_bsub -> FPR8 44, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub1_then_dsub -> FPR64_lo 3, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub1_then_hsub -> FPR16_lo 24, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub1_then_zsub -> FPR128_lo 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub3_then_bsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub3_then_dsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub3_then_hsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub3_then_ssub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub3_then_zsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub2_then_bsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub2_then_dsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub2_then_hsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub2_then_ssub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub2_then_zsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub2_dsub3 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub0_qsub1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub1_qsub2 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub2_qsub3 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR2Strided_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR2Strided_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub0_zsub1 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub1_zsub2 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub2_zsub3 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub0_zsub2 0, // ZPR2Strided_with_dsub_in_FPR64_lo:zsub1_zsub3 }, { // QQQ 1, // QQQ:bsub -> FPR8 36, // QQQ:dsub -> FPR64 0, // QQQ:dsub0 0, // QQQ:dsub1 0, // QQQ:dsub2 0, // QQQ:dsub3 2, // QQQ:hsub -> FPR16 0, // QQQ:psub0 0, // QQQ:psub1 70, // QQQ:qsub0 -> FPR128 70, // QQQ:qsub1 -> FPR128 70, // QQQ:qsub2 -> FPR128 0, // QQQ:qsub3 20, // QQQ:ssub -> FPR32 0, // QQQ:sub_32 0, // QQQ:sube32 0, // QQQ:sube64 0, // QQQ:subo32 0, // QQQ:subo64 0, // QQQ:x8sub_0 0, // QQQ:x8sub_1 0, // QQQ:x8sub_2 0, // QQQ:x8sub_3 0, // QQQ:x8sub_4 0, // QQQ:x8sub_5 0, // QQQ:x8sub_6 0, // QQQ:x8sub_7 0, // QQQ:zasubb 0, // QQQ:zasubd0 0, // QQQ:zasubd1 0, // QQQ:zasubh0 0, // QQQ:zasubh1 0, // QQQ:zasubq0 0, // QQQ:zasubq1 0, // QQQ:zasubs0 0, // QQQ:zasubs1 0, // QQQ:zsub 0, // QQQ:zsub0 0, // QQQ:zsub1 0, // QQQ:zsub2 0, // QQQ:zsub3 0, // QQQ:zsub_hi 0, // QQQ:zasubd1_then_zasubq0 0, // QQQ:zasubd1_then_zasubq1 0, // QQQ:zasubs1_then_zasubd0 0, // QQQ:zasubs1_then_zasubd1 0, // QQQ:zasubs1_then_zasubq0 0, // QQQ:zasubs1_then_zasubq1 0, // QQQ:zasubs1_then_zasubd1_then_zasubq0 0, // QQQ:zasubs1_then_zasubd1_then_zasubq1 0, // QQQ:zasubh1_then_zasubd0 0, // QQQ:zasubh1_then_zasubd1 0, // QQQ:zasubh1_then_zasubq0 0, // QQQ:zasubh1_then_zasubq1 0, // QQQ:zasubh1_then_zasubs0 0, // QQQ:zasubh1_then_zasubs1 0, // QQQ:zasubh1_then_zasubd1_then_zasubq0 0, // QQQ:zasubh1_then_zasubd1_then_zasubq1 0, // QQQ:zasubh1_then_zasubs1_then_zasubd0 0, // QQQ:zasubh1_then_zasubs1_then_zasubd1 0, // QQQ:zasubh1_then_zasubs1_then_zasubq0 0, // QQQ:zasubh1_then_zasubs1_then_zasubq1 0, // QQQ:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQQ:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQQ:dsub1_then_bsub 0, // QQQ:dsub1_then_hsub 0, // QQQ:dsub1_then_ssub 0, // QQQ:dsub3_then_bsub 0, // QQQ:dsub3_then_hsub 0, // QQQ:dsub3_then_ssub 0, // QQQ:dsub2_then_bsub 0, // QQQ:dsub2_then_hsub 0, // QQQ:dsub2_then_ssub 1, // QQQ:qsub1_then_bsub -> FPR8 36, // QQQ:qsub1_then_dsub -> FPR64 2, // QQQ:qsub1_then_hsub -> FPR16 20, // QQQ:qsub1_then_ssub -> FPR32 0, // QQQ:qsub3_then_bsub 0, // QQQ:qsub3_then_dsub 0, // QQQ:qsub3_then_hsub 0, // QQQ:qsub3_then_ssub 1, // QQQ:qsub2_then_bsub -> FPR8 36, // QQQ:qsub2_then_dsub -> FPR64 2, // QQQ:qsub2_then_hsub -> FPR16 20, // QQQ:qsub2_then_ssub -> FPR32 0, // QQQ:x8sub_7_then_sub_32 0, // QQQ:x8sub_6_then_sub_32 0, // QQQ:x8sub_5_then_sub_32 0, // QQQ:x8sub_4_then_sub_32 0, // QQQ:x8sub_3_then_sub_32 0, // QQQ:x8sub_2_then_sub_32 0, // QQQ:x8sub_1_then_sub_32 0, // QQQ:subo64_then_sub_32 0, // QQQ:zsub1_then_bsub 0, // QQQ:zsub1_then_dsub 0, // QQQ:zsub1_then_hsub 0, // QQQ:zsub1_then_ssub 0, // QQQ:zsub1_then_zsub 0, // QQQ:zsub1_then_zsub_hi 0, // QQQ:zsub3_then_bsub 0, // QQQ:zsub3_then_dsub 0, // QQQ:zsub3_then_hsub 0, // QQQ:zsub3_then_ssub 0, // QQQ:zsub3_then_zsub 0, // QQQ:zsub3_then_zsub_hi 0, // QQQ:zsub2_then_bsub 0, // QQQ:zsub2_then_dsub 0, // QQQ:zsub2_then_hsub 0, // QQQ:zsub2_then_ssub 0, // QQQ:zsub2_then_zsub 0, // QQQ:zsub2_then_zsub_hi 0, // QQQ:dsub0_dsub1 0, // QQQ:dsub0_dsub1_dsub2 0, // QQQ:dsub1_dsub2 0, // QQQ:dsub1_dsub2_dsub3 0, // QQQ:dsub2_dsub3 53, // QQQ:dsub_qsub1_then_dsub -> DD 0, // QQQ:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 76, // QQQ:dsub_qsub1_then_dsub_qsub2_then_dsub -> DDD 94, // QQQ:qsub0_qsub1 -> QQ 0, // QQQ:qsub0_qsub1_qsub2 94, // QQQ:qsub1_qsub2 -> QQ 0, // QQQ:qsub1_qsub2_qsub3 0, // QQQ:qsub2_qsub3 53, // QQQ:qsub1_then_dsub_qsub2_then_dsub -> DD 0, // QQQ:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // QQQ:qsub2_then_dsub_qsub3_then_dsub 0, // QQQ:sub_32_x8sub_1_then_sub_32 0, // QQQ:x8sub_0_x8sub_1 0, // QQQ:x8sub_2_x8sub_3 0, // QQQ:x8sub_4_x8sub_5 0, // QQQ:x8sub_6_x8sub_7 0, // QQQ:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQQ:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQQ:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQQ:sub_32_subo64_then_sub_32 0, // QQQ:dsub_zsub1_then_dsub 0, // QQQ:zsub_zsub1_then_zsub 0, // QQQ:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQ:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQQ:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQ:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQQ:zsub0_zsub1 0, // QQQ:zsub0_zsub1_zsub2 0, // QQQ:zsub1_zsub2 0, // QQQ:zsub1_zsub2_zsub3 0, // QQQ:zsub2_zsub3 0, // QQQ:zsub1_then_dsub_zsub2_then_dsub 0, // QQQ:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQ:zsub1_then_zsub_zsub2_then_zsub 0, // QQQ:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQ:zsub2_then_dsub_zsub3_then_dsub 0, // QQQ:zsub2_then_zsub_zsub3_then_zsub 0, // QQQ:zsub0_zsub2 0, // QQQ:zsub1_zsub3 }, { // ZPR3 1, // ZPR3:bsub -> FPR8 36, // ZPR3:dsub -> FPR64 0, // ZPR3:dsub0 0, // ZPR3:dsub1 0, // ZPR3:dsub2 0, // ZPR3:dsub3 2, // ZPR3:hsub -> FPR16 0, // ZPR3:psub0 0, // ZPR3:psub1 0, // ZPR3:qsub0 0, // ZPR3:qsub1 0, // ZPR3:qsub2 0, // ZPR3:qsub3 20, // ZPR3:ssub -> FPR32 0, // ZPR3:sub_32 0, // ZPR3:sube32 0, // ZPR3:sube64 0, // ZPR3:subo32 0, // ZPR3:subo64 0, // ZPR3:x8sub_0 0, // ZPR3:x8sub_1 0, // ZPR3:x8sub_2 0, // ZPR3:x8sub_3 0, // ZPR3:x8sub_4 0, // ZPR3:x8sub_5 0, // ZPR3:x8sub_6 0, // ZPR3:x8sub_7 0, // ZPR3:zasubb 0, // ZPR3:zasubd0 0, // ZPR3:zasubd1 0, // ZPR3:zasubh0 0, // ZPR3:zasubh1 0, // ZPR3:zasubq0 0, // ZPR3:zasubq1 0, // ZPR3:zasubs0 0, // ZPR3:zasubs1 70, // ZPR3:zsub -> FPR128 71, // ZPR3:zsub0 -> ZPR 71, // ZPR3:zsub1 -> ZPR 71, // ZPR3:zsub2 -> ZPR 0, // ZPR3:zsub3 0, // ZPR3:zsub_hi 0, // ZPR3:zasubd1_then_zasubq0 0, // ZPR3:zasubd1_then_zasubq1 0, // ZPR3:zasubs1_then_zasubd0 0, // ZPR3:zasubs1_then_zasubd1 0, // ZPR3:zasubs1_then_zasubq0 0, // ZPR3:zasubs1_then_zasubq1 0, // ZPR3:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3:zasubh1_then_zasubd0 0, // ZPR3:zasubh1_then_zasubd1 0, // ZPR3:zasubh1_then_zasubq0 0, // ZPR3:zasubh1_then_zasubq1 0, // ZPR3:zasubh1_then_zasubs0 0, // ZPR3:zasubh1_then_zasubs1 0, // ZPR3:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3:dsub1_then_bsub 0, // ZPR3:dsub1_then_hsub 0, // ZPR3:dsub1_then_ssub 0, // ZPR3:dsub3_then_bsub 0, // ZPR3:dsub3_then_hsub 0, // ZPR3:dsub3_then_ssub 0, // ZPR3:dsub2_then_bsub 0, // ZPR3:dsub2_then_hsub 0, // ZPR3:dsub2_then_ssub 0, // ZPR3:qsub1_then_bsub 0, // ZPR3:qsub1_then_dsub 0, // ZPR3:qsub1_then_hsub 0, // ZPR3:qsub1_then_ssub 0, // ZPR3:qsub3_then_bsub 0, // ZPR3:qsub3_then_dsub 0, // ZPR3:qsub3_then_hsub 0, // ZPR3:qsub3_then_ssub 0, // ZPR3:qsub2_then_bsub 0, // ZPR3:qsub2_then_dsub 0, // ZPR3:qsub2_then_hsub 0, // ZPR3:qsub2_then_ssub 0, // ZPR3:x8sub_7_then_sub_32 0, // ZPR3:x8sub_6_then_sub_32 0, // ZPR3:x8sub_5_then_sub_32 0, // ZPR3:x8sub_4_then_sub_32 0, // ZPR3:x8sub_3_then_sub_32 0, // ZPR3:x8sub_2_then_sub_32 0, // ZPR3:x8sub_1_then_sub_32 0, // ZPR3:subo64_then_sub_32 1, // ZPR3:zsub1_then_bsub -> FPR8 36, // ZPR3:zsub1_then_dsub -> FPR64 2, // ZPR3:zsub1_then_hsub -> FPR16 20, // ZPR3:zsub1_then_ssub -> FPR32 70, // ZPR3:zsub1_then_zsub -> FPR128 0, // ZPR3:zsub1_then_zsub_hi 0, // ZPR3:zsub3_then_bsub 0, // ZPR3:zsub3_then_dsub 0, // ZPR3:zsub3_then_hsub 0, // ZPR3:zsub3_then_ssub 0, // ZPR3:zsub3_then_zsub 0, // ZPR3:zsub3_then_zsub_hi 1, // ZPR3:zsub2_then_bsub -> FPR8 36, // ZPR3:zsub2_then_dsub -> FPR64 2, // ZPR3:zsub2_then_hsub -> FPR16 20, // ZPR3:zsub2_then_ssub -> FPR32 70, // ZPR3:zsub2_then_zsub -> FPR128 0, // ZPR3:zsub2_then_zsub_hi 0, // ZPR3:dsub0_dsub1 0, // ZPR3:dsub0_dsub1_dsub2 0, // ZPR3:dsub1_dsub2 0, // ZPR3:dsub1_dsub2_dsub3 0, // ZPR3:dsub2_dsub3 0, // ZPR3:dsub_qsub1_then_dsub 0, // ZPR3:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3:qsub0_qsub1 0, // ZPR3:qsub0_qsub1_qsub2 0, // ZPR3:qsub1_qsub2 0, // ZPR3:qsub1_qsub2_qsub3 0, // ZPR3:qsub2_qsub3 0, // ZPR3:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3:sub_32_x8sub_1_then_sub_32 0, // ZPR3:x8sub_0_x8sub_1 0, // ZPR3:x8sub_2_x8sub_3 0, // ZPR3:x8sub_4_x8sub_5 0, // ZPR3:x8sub_6_x8sub_7 0, // ZPR3:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3:sub_32_subo64_then_sub_32 53, // ZPR3:dsub_zsub1_then_dsub -> DD 94, // ZPR3:zsub_zsub1_then_zsub -> QQ 0, // ZPR3:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 76, // ZPR3:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD 0, // ZPR3:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 111, // ZPR3:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ 95, // ZPR3:zsub0_zsub1 -> ZPR2 0, // ZPR3:zsub0_zsub1_zsub2 95, // ZPR3:zsub1_zsub2 -> ZPR2 0, // ZPR3:zsub1_zsub2_zsub3 0, // ZPR3:zsub2_zsub3 53, // ZPR3:zsub1_then_dsub_zsub2_then_dsub -> DD 0, // ZPR3:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 94, // ZPR3:zsub1_then_zsub_zsub2_then_zsub -> QQ 0, // ZPR3:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3:zsub0_zsub2 0, // ZPR3:zsub1_zsub3 }, { // QQQ_with_dsub_in_FPR64_lo 1, // QQQ_with_dsub_in_FPR64_lo:bsub -> FPR8 44, // QQQ_with_dsub_in_FPR64_lo:dsub -> FPR64_lo 0, // QQQ_with_dsub_in_FPR64_lo:dsub0 0, // QQQ_with_dsub_in_FPR64_lo:dsub1 0, // QQQ_with_dsub_in_FPR64_lo:dsub2 0, // QQQ_with_dsub_in_FPR64_lo:dsub3 3, // QQQ_with_dsub_in_FPR64_lo:hsub -> FPR16_lo 0, // QQQ_with_dsub_in_FPR64_lo:psub0 0, // QQQ_with_dsub_in_FPR64_lo:psub1 72, // QQQ_with_dsub_in_FPR64_lo:qsub0 -> FPR128_lo 70, // QQQ_with_dsub_in_FPR64_lo:qsub1 -> FPR128 70, // QQQ_with_dsub_in_FPR64_lo:qsub2 -> FPR128 0, // QQQ_with_dsub_in_FPR64_lo:qsub3 24, // QQQ_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQ_with_dsub_in_FPR64_lo:sub_32 0, // QQQ_with_dsub_in_FPR64_lo:sube32 0, // QQQ_with_dsub_in_FPR64_lo:sube64 0, // QQQ_with_dsub_in_FPR64_lo:subo32 0, // QQQ_with_dsub_in_FPR64_lo:subo64 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_0 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_1 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_2 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_3 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_4 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_5 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_6 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_7 0, // QQQ_with_dsub_in_FPR64_lo:zasubb 0, // QQQ_with_dsub_in_FPR64_lo:zasubd0 0, // QQQ_with_dsub_in_FPR64_lo:zasubd1 0, // QQQ_with_dsub_in_FPR64_lo:zasubh0 0, // QQQ_with_dsub_in_FPR64_lo:zasubh1 0, // QQQ_with_dsub_in_FPR64_lo:zasubq0 0, // QQQ_with_dsub_in_FPR64_lo:zasubq1 0, // QQQ_with_dsub_in_FPR64_lo:zasubs0 0, // QQQ_with_dsub_in_FPR64_lo:zasubs1 0, // QQQ_with_dsub_in_FPR64_lo:zsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub0 0, // QQQ_with_dsub_in_FPR64_lo:zsub1 0, // QQQ_with_dsub_in_FPR64_lo:zsub2 0, // QQQ_with_dsub_in_FPR64_lo:zsub3 0, // QQQ_with_dsub_in_FPR64_lo:zsub_hi 0, // QQQ_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // QQQ_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // QQQ_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // QQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // QQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // QQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // QQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // QQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // QQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // QQQ_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // QQQ_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo:dsub2_then_ssub 1, // QQQ_with_dsub_in_FPR64_lo:qsub1_then_bsub -> FPR8 36, // QQQ_with_dsub_in_FPR64_lo:qsub1_then_dsub -> FPR64 2, // QQQ_with_dsub_in_FPR64_lo:qsub1_then_hsub -> FPR16 20, // QQQ_with_dsub_in_FPR64_lo:qsub1_then_ssub -> FPR32 0, // QQQ_with_dsub_in_FPR64_lo:qsub3_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo:qsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo:qsub3_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo:qsub3_then_ssub 1, // QQQ_with_dsub_in_FPR64_lo:qsub2_then_bsub -> FPR8 36, // QQQ_with_dsub_in_FPR64_lo:qsub2_then_dsub -> FPR64 2, // QQQ_with_dsub_in_FPR64_lo:qsub2_then_hsub -> FPR16 20, // QQQ_with_dsub_in_FPR64_lo:qsub2_then_ssub -> FPR32 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo:subo64_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo:zsub1_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub1_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub1_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub1_then_ssub 0, // QQQ_with_dsub_in_FPR64_lo:zsub1_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 0, // QQQ_with_dsub_in_FPR64_lo:zsub3_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub3_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub3_then_ssub 0, // QQQ_with_dsub_in_FPR64_lo:zsub3_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 0, // QQQ_with_dsub_in_FPR64_lo:zsub2_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub2_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub2_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub2_then_ssub 0, // QQQ_with_dsub_in_FPR64_lo:zsub2_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // QQQ_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // QQQ_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // QQQ_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // QQQ_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // QQQ_with_dsub_in_FPR64_lo:dsub2_dsub3 54, // QQQ_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo 0, // QQQ_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 77, // QQQ_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo 96, // QQQ_with_dsub_in_FPR64_lo:qsub0_qsub1 -> QQ_with_dsub_in_FPR64_lo 0, // QQQ_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 94, // QQQ_with_dsub_in_FPR64_lo:qsub1_qsub2 -> QQ 0, // QQQ_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 0, // QQQ_with_dsub_in_FPR64_lo:qsub2_qsub3 53, // QQQ_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub -> DD 0, // QQQ_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub0_zsub1 0, // QQQ_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 0, // QQQ_with_dsub_in_FPR64_lo:zsub1_zsub2 0, // QQQ_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 0, // QQQ_with_dsub_in_FPR64_lo:zsub2_zsub3 0, // QQQ_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo:zsub0_zsub2 0, // QQQ_with_dsub_in_FPR64_lo:zsub1_zsub3 }, { // QQQ_with_qsub1_in_FPR128_lo 1, // QQQ_with_qsub1_in_FPR128_lo:bsub -> FPR8 36, // QQQ_with_qsub1_in_FPR128_lo:dsub -> FPR64 0, // QQQ_with_qsub1_in_FPR128_lo:dsub0 0, // QQQ_with_qsub1_in_FPR128_lo:dsub1 0, // QQQ_with_qsub1_in_FPR128_lo:dsub2 0, // QQQ_with_qsub1_in_FPR128_lo:dsub3 2, // QQQ_with_qsub1_in_FPR128_lo:hsub -> FPR16 0, // QQQ_with_qsub1_in_FPR128_lo:psub0 0, // QQQ_with_qsub1_in_FPR128_lo:psub1 70, // QQQ_with_qsub1_in_FPR128_lo:qsub0 -> FPR128 72, // QQQ_with_qsub1_in_FPR128_lo:qsub1 -> FPR128_lo 70, // QQQ_with_qsub1_in_FPR128_lo:qsub2 -> FPR128 0, // QQQ_with_qsub1_in_FPR128_lo:qsub3 20, // QQQ_with_qsub1_in_FPR128_lo:ssub -> FPR32 0, // QQQ_with_qsub1_in_FPR128_lo:sub_32 0, // QQQ_with_qsub1_in_FPR128_lo:sube32 0, // QQQ_with_qsub1_in_FPR128_lo:sube64 0, // QQQ_with_qsub1_in_FPR128_lo:subo32 0, // QQQ_with_qsub1_in_FPR128_lo:subo64 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_0 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_1 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_2 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_3 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_4 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_5 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_6 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_7 0, // QQQ_with_qsub1_in_FPR128_lo:zasubb 0, // QQQ_with_qsub1_in_FPR128_lo:zasubd0 0, // QQQ_with_qsub1_in_FPR128_lo:zasubd1 0, // QQQ_with_qsub1_in_FPR128_lo:zasubh0 0, // QQQ_with_qsub1_in_FPR128_lo:zasubh1 0, // QQQ_with_qsub1_in_FPR128_lo:zasubq0 0, // QQQ_with_qsub1_in_FPR128_lo:zasubq1 0, // QQQ_with_qsub1_in_FPR128_lo:zasubs0 0, // QQQ_with_qsub1_in_FPR128_lo:zasubs1 0, // QQQ_with_qsub1_in_FPR128_lo:zsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub0 0, // QQQ_with_qsub1_in_FPR128_lo:zsub1 0, // QQQ_with_qsub1_in_FPR128_lo:zsub2 0, // QQQ_with_qsub1_in_FPR128_lo:zsub3 0, // QQQ_with_qsub1_in_FPR128_lo:zsub_hi 0, // QQQ_with_qsub1_in_FPR128_lo:zasubd1_then_zasubq0 0, // QQQ_with_qsub1_in_FPR128_lo:zasubd1_then_zasubq1 0, // QQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd0 0, // QQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd1 0, // QQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubq0 0, // QQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubq1 0, // QQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 0, // QQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 0, // QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd0 0, // QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd1 0, // QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubq0 0, // QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubq1 0, // QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs0 0, // QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1 0, // QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 0, // QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 0, // QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 0, // QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 0, // QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 0, // QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 0, // QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQQ_with_qsub1_in_FPR128_lo:dsub1_then_bsub 0, // QQQ_with_qsub1_in_FPR128_lo:dsub1_then_hsub 0, // QQQ_with_qsub1_in_FPR128_lo:dsub1_then_ssub 0, // QQQ_with_qsub1_in_FPR128_lo:dsub3_then_bsub 0, // QQQ_with_qsub1_in_FPR128_lo:dsub3_then_hsub 0, // QQQ_with_qsub1_in_FPR128_lo:dsub3_then_ssub 0, // QQQ_with_qsub1_in_FPR128_lo:dsub2_then_bsub 0, // QQQ_with_qsub1_in_FPR128_lo:dsub2_then_hsub 0, // QQQ_with_qsub1_in_FPR128_lo:dsub2_then_ssub 1, // QQQ_with_qsub1_in_FPR128_lo:qsub1_then_bsub -> FPR8 44, // QQQ_with_qsub1_in_FPR128_lo:qsub1_then_dsub -> FPR64_lo 3, // QQQ_with_qsub1_in_FPR128_lo:qsub1_then_hsub -> FPR16_lo 24, // QQQ_with_qsub1_in_FPR128_lo:qsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQ_with_qsub1_in_FPR128_lo:qsub3_then_bsub 0, // QQQ_with_qsub1_in_FPR128_lo:qsub3_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo:qsub3_then_hsub 0, // QQQ_with_qsub1_in_FPR128_lo:qsub3_then_ssub 1, // QQQ_with_qsub1_in_FPR128_lo:qsub2_then_bsub -> FPR8 36, // QQQ_with_qsub1_in_FPR128_lo:qsub2_then_dsub -> FPR64 2, // QQQ_with_qsub1_in_FPR128_lo:qsub2_then_hsub -> FPR16 20, // QQQ_with_qsub1_in_FPR128_lo:qsub2_then_ssub -> FPR32 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_7_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_6_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_5_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_4_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_3_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_2_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_1_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo:subo64_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo:zsub1_then_bsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub1_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub1_then_hsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub1_then_ssub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub_hi 0, // QQQ_with_qsub1_in_FPR128_lo:zsub3_then_bsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub3_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub3_then_hsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub3_then_ssub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub3_then_zsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub3_then_zsub_hi 0, // QQQ_with_qsub1_in_FPR128_lo:zsub2_then_bsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub2_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub2_then_hsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub2_then_ssub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub2_then_zsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub2_then_zsub_hi 0, // QQQ_with_qsub1_in_FPR128_lo:dsub0_dsub1 0, // QQQ_with_qsub1_in_FPR128_lo:dsub0_dsub1_dsub2 0, // QQQ_with_qsub1_in_FPR128_lo:dsub1_dsub2 0, // QQQ_with_qsub1_in_FPR128_lo:dsub1_dsub2_dsub3 0, // QQQ_with_qsub1_in_FPR128_lo:dsub2_dsub3 55, // QQQ_with_qsub1_in_FPR128_lo:dsub_qsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 0, // QQQ_with_qsub1_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 78, // QQQ_with_qsub1_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo 97, // QQQ_with_qsub1_in_FPR128_lo:qsub0_qsub1 -> QQ_with_qsub1_in_FPR128_lo 0, // QQQ_with_qsub1_in_FPR128_lo:qsub0_qsub1_qsub2 96, // QQQ_with_qsub1_in_FPR128_lo:qsub1_qsub2 -> QQ_with_dsub_in_FPR64_lo 0, // QQQ_with_qsub1_in_FPR128_lo:qsub1_qsub2_qsub3 0, // QQQ_with_qsub1_in_FPR128_lo:qsub2_qsub3 54, // QQQ_with_qsub1_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo 0, // QQQ_with_qsub1_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo:qsub2_then_dsub_qsub3_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_0_x8sub_1 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_2_x8sub_3 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_4_x8sub_5 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_6_x8sub_7 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo:sub_32_subo64_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo:dsub_zsub1_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub_zsub1_then_zsub 0, // QQQ_with_qsub1_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub0_zsub1 0, // QQQ_with_qsub1_in_FPR128_lo:zsub0_zsub1_zsub2 0, // QQQ_with_qsub1_in_FPR128_lo:zsub1_zsub2 0, // QQQ_with_qsub1_in_FPR128_lo:zsub1_zsub2_zsub3 0, // QQQ_with_qsub1_in_FPR128_lo:zsub2_zsub3 0, // QQQ_with_qsub1_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub2_then_dsub_zsub3_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub2_then_zsub_zsub3_then_zsub 0, // QQQ_with_qsub1_in_FPR128_lo:zsub0_zsub2 0, // QQQ_with_qsub1_in_FPR128_lo:zsub1_zsub3 }, { // QQQ_with_qsub2_in_FPR128_lo 1, // QQQ_with_qsub2_in_FPR128_lo:bsub -> FPR8 36, // QQQ_with_qsub2_in_FPR128_lo:dsub -> FPR64 0, // QQQ_with_qsub2_in_FPR128_lo:dsub0 0, // QQQ_with_qsub2_in_FPR128_lo:dsub1 0, // QQQ_with_qsub2_in_FPR128_lo:dsub2 0, // QQQ_with_qsub2_in_FPR128_lo:dsub3 2, // QQQ_with_qsub2_in_FPR128_lo:hsub -> FPR16 0, // QQQ_with_qsub2_in_FPR128_lo:psub0 0, // QQQ_with_qsub2_in_FPR128_lo:psub1 70, // QQQ_with_qsub2_in_FPR128_lo:qsub0 -> FPR128 70, // QQQ_with_qsub2_in_FPR128_lo:qsub1 -> FPR128 72, // QQQ_with_qsub2_in_FPR128_lo:qsub2 -> FPR128_lo 0, // QQQ_with_qsub2_in_FPR128_lo:qsub3 20, // QQQ_with_qsub2_in_FPR128_lo:ssub -> FPR32 0, // QQQ_with_qsub2_in_FPR128_lo:sub_32 0, // QQQ_with_qsub2_in_FPR128_lo:sube32 0, // QQQ_with_qsub2_in_FPR128_lo:sube64 0, // QQQ_with_qsub2_in_FPR128_lo:subo32 0, // QQQ_with_qsub2_in_FPR128_lo:subo64 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_0 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_1 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_2 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_3 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_4 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_5 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_6 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_7 0, // QQQ_with_qsub2_in_FPR128_lo:zasubb 0, // QQQ_with_qsub2_in_FPR128_lo:zasubd0 0, // QQQ_with_qsub2_in_FPR128_lo:zasubd1 0, // QQQ_with_qsub2_in_FPR128_lo:zasubh0 0, // QQQ_with_qsub2_in_FPR128_lo:zasubh1 0, // QQQ_with_qsub2_in_FPR128_lo:zasubq0 0, // QQQ_with_qsub2_in_FPR128_lo:zasubq1 0, // QQQ_with_qsub2_in_FPR128_lo:zasubs0 0, // QQQ_with_qsub2_in_FPR128_lo:zasubs1 0, // QQQ_with_qsub2_in_FPR128_lo:zsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub0 0, // QQQ_with_qsub2_in_FPR128_lo:zsub1 0, // QQQ_with_qsub2_in_FPR128_lo:zsub2 0, // QQQ_with_qsub2_in_FPR128_lo:zsub3 0, // QQQ_with_qsub2_in_FPR128_lo:zsub_hi 0, // QQQ_with_qsub2_in_FPR128_lo:zasubd1_then_zasubq0 0, // QQQ_with_qsub2_in_FPR128_lo:zasubd1_then_zasubq1 0, // QQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd0 0, // QQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd1 0, // QQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubq0 0, // QQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubq1 0, // QQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 0, // QQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 0, // QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd0 0, // QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd1 0, // QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubq0 0, // QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubq1 0, // QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs0 0, // QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1 0, // QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 0, // QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 0, // QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 0, // QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 0, // QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 0, // QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 0, // QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQQ_with_qsub2_in_FPR128_lo:dsub1_then_bsub 0, // QQQ_with_qsub2_in_FPR128_lo:dsub1_then_hsub 0, // QQQ_with_qsub2_in_FPR128_lo:dsub1_then_ssub 0, // QQQ_with_qsub2_in_FPR128_lo:dsub3_then_bsub 0, // QQQ_with_qsub2_in_FPR128_lo:dsub3_then_hsub 0, // QQQ_with_qsub2_in_FPR128_lo:dsub3_then_ssub 0, // QQQ_with_qsub2_in_FPR128_lo:dsub2_then_bsub 0, // QQQ_with_qsub2_in_FPR128_lo:dsub2_then_hsub 0, // QQQ_with_qsub2_in_FPR128_lo:dsub2_then_ssub 1, // QQQ_with_qsub2_in_FPR128_lo:qsub1_then_bsub -> FPR8 36, // QQQ_with_qsub2_in_FPR128_lo:qsub1_then_dsub -> FPR64 2, // QQQ_with_qsub2_in_FPR128_lo:qsub1_then_hsub -> FPR16 20, // QQQ_with_qsub2_in_FPR128_lo:qsub1_then_ssub -> FPR32 0, // QQQ_with_qsub2_in_FPR128_lo:qsub3_then_bsub 0, // QQQ_with_qsub2_in_FPR128_lo:qsub3_then_dsub 0, // QQQ_with_qsub2_in_FPR128_lo:qsub3_then_hsub 0, // QQQ_with_qsub2_in_FPR128_lo:qsub3_then_ssub 1, // QQQ_with_qsub2_in_FPR128_lo:qsub2_then_bsub -> FPR8 44, // QQQ_with_qsub2_in_FPR128_lo:qsub2_then_dsub -> FPR64_lo 3, // QQQ_with_qsub2_in_FPR128_lo:qsub2_then_hsub -> FPR16_lo 24, // QQQ_with_qsub2_in_FPR128_lo:qsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_7_then_sub_32 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_6_then_sub_32 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_5_then_sub_32 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_4_then_sub_32 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_3_then_sub_32 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_2_then_sub_32 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_1_then_sub_32 0, // QQQ_with_qsub2_in_FPR128_lo:subo64_then_sub_32 0, // QQQ_with_qsub2_in_FPR128_lo:zsub1_then_bsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub1_then_dsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub1_then_hsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub1_then_ssub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub_hi 0, // QQQ_with_qsub2_in_FPR128_lo:zsub3_then_bsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub3_then_dsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub3_then_hsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub3_then_ssub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub3_then_zsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub3_then_zsub_hi 0, // QQQ_with_qsub2_in_FPR128_lo:zsub2_then_bsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub2_then_dsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub2_then_hsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub2_then_ssub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub2_then_zsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub2_then_zsub_hi 0, // QQQ_with_qsub2_in_FPR128_lo:dsub0_dsub1 0, // QQQ_with_qsub2_in_FPR128_lo:dsub0_dsub1_dsub2 0, // QQQ_with_qsub2_in_FPR128_lo:dsub1_dsub2 0, // QQQ_with_qsub2_in_FPR128_lo:dsub1_dsub2_dsub3 0, // QQQ_with_qsub2_in_FPR128_lo:dsub2_dsub3 53, // QQQ_with_qsub2_in_FPR128_lo:dsub_qsub1_then_dsub -> DD 0, // QQQ_with_qsub2_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 79, // QQQ_with_qsub2_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub -> DDD_with_dsub2_in_FPR64_lo 94, // QQQ_with_qsub2_in_FPR128_lo:qsub0_qsub1 -> QQ 0, // QQQ_with_qsub2_in_FPR128_lo:qsub0_qsub1_qsub2 97, // QQQ_with_qsub2_in_FPR128_lo:qsub1_qsub2 -> QQ_with_qsub1_in_FPR128_lo 0, // QQQ_with_qsub2_in_FPR128_lo:qsub1_qsub2_qsub3 0, // QQQ_with_qsub2_in_FPR128_lo:qsub2_qsub3 55, // QQQ_with_qsub2_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub -> DD_with_dsub1_in_FPR64_lo 0, // QQQ_with_qsub2_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // QQQ_with_qsub2_in_FPR128_lo:qsub2_then_dsub_qsub3_then_dsub 0, // QQQ_with_qsub2_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_0_x8sub_1 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_2_x8sub_3 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_4_x8sub_5 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_6_x8sub_7 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQQ_with_qsub2_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQQ_with_qsub2_in_FPR128_lo:sub_32_subo64_then_sub_32 0, // QQQ_with_qsub2_in_FPR128_lo:dsub_zsub1_then_dsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub_zsub1_then_zsub 0, // QQQ_with_qsub2_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQ_with_qsub2_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub0_zsub1 0, // QQQ_with_qsub2_in_FPR128_lo:zsub0_zsub1_zsub2 0, // QQQ_with_qsub2_in_FPR128_lo:zsub1_zsub2 0, // QQQ_with_qsub2_in_FPR128_lo:zsub1_zsub2_zsub3 0, // QQQ_with_qsub2_in_FPR128_lo:zsub2_zsub3 0, // QQQ_with_qsub2_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub2_then_dsub_zsub3_then_dsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub2_then_zsub_zsub3_then_zsub 0, // QQQ_with_qsub2_in_FPR128_lo:zsub0_zsub2 0, // QQQ_with_qsub2_in_FPR128_lo:zsub1_zsub3 }, { // ZPR3_with_dsub_in_FPR64_lo 1, // ZPR3_with_dsub_in_FPR64_lo:bsub -> FPR8 44, // ZPR3_with_dsub_in_FPR64_lo:dsub -> FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo:dsub0 0, // ZPR3_with_dsub_in_FPR64_lo:dsub1 0, // ZPR3_with_dsub_in_FPR64_lo:dsub2 0, // ZPR3_with_dsub_in_FPR64_lo:dsub3 3, // ZPR3_with_dsub_in_FPR64_lo:hsub -> FPR16_lo 0, // ZPR3_with_dsub_in_FPR64_lo:psub0 0, // ZPR3_with_dsub_in_FPR64_lo:psub1 0, // ZPR3_with_dsub_in_FPR64_lo:qsub0 0, // ZPR3_with_dsub_in_FPR64_lo:qsub1 0, // ZPR3_with_dsub_in_FPR64_lo:qsub2 0, // ZPR3_with_dsub_in_FPR64_lo:qsub3 24, // ZPR3_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR3_with_dsub_in_FPR64_lo:sub_32 0, // ZPR3_with_dsub_in_FPR64_lo:sube32 0, // ZPR3_with_dsub_in_FPR64_lo:sube64 0, // ZPR3_with_dsub_in_FPR64_lo:subo32 0, // ZPR3_with_dsub_in_FPR64_lo:subo64 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_0 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_1 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_2 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_3 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_4 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_5 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_6 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_7 0, // ZPR3_with_dsub_in_FPR64_lo:zasubb 0, // ZPR3_with_dsub_in_FPR64_lo:zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo:zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo:zasubh0 0, // ZPR3_with_dsub_in_FPR64_lo:zasubh1 0, // ZPR3_with_dsub_in_FPR64_lo:zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo:zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo:zasubs0 0, // ZPR3_with_dsub_in_FPR64_lo:zasubs1 72, // ZPR3_with_dsub_in_FPR64_lo:zsub -> FPR128_lo 74, // ZPR3_with_dsub_in_FPR64_lo:zsub0 -> ZPR_4b 71, // ZPR3_with_dsub_in_FPR64_lo:zsub1 -> ZPR 71, // ZPR3_with_dsub_in_FPR64_lo:zsub2 -> ZPR 0, // ZPR3_with_dsub_in_FPR64_lo:zsub3 0, // ZPR3_with_dsub_in_FPR64_lo:zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // ZPR3_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // ZPR3_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo:dsub2_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo:qsub1_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo:qsub1_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo:qsub1_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo:qsub1_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo:qsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo:qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo:qsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo:qsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo:qsub2_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo:qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo:qsub2_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo:qsub2_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo:subo64_then_sub_32 1, // ZPR3_with_dsub_in_FPR64_lo:zsub1_then_bsub -> FPR8 36, // ZPR3_with_dsub_in_FPR64_lo:zsub1_then_dsub -> FPR64 2, // ZPR3_with_dsub_in_FPR64_lo:zsub1_then_hsub -> FPR16 20, // ZPR3_with_dsub_in_FPR64_lo:zsub1_then_ssub -> FPR32 70, // ZPR3_with_dsub_in_FPR64_lo:zsub1_then_zsub -> FPR128 0, // ZPR3_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo:zsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo:zsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo:zsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo:zsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo:zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 1, // ZPR3_with_dsub_in_FPR64_lo:zsub2_then_bsub -> FPR8 36, // ZPR3_with_dsub_in_FPR64_lo:zsub2_then_dsub -> FPR64 2, // ZPR3_with_dsub_in_FPR64_lo:zsub2_then_hsub -> FPR16 20, // ZPR3_with_dsub_in_FPR64_lo:zsub2_then_ssub -> FPR32 70, // ZPR3_with_dsub_in_FPR64_lo:zsub2_then_zsub -> FPR128 0, // ZPR3_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // ZPR3_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // ZPR3_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // ZPR3_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // ZPR3_with_dsub_in_FPR64_lo:dsub2_dsub3 0, // ZPR3_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo:qsub0_qsub1 0, // ZPR3_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 0, // ZPR3_with_dsub_in_FPR64_lo:qsub1_qsub2 0, // ZPR3_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 0, // ZPR3_with_dsub_in_FPR64_lo:qsub2_qsub3 0, // ZPR3_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 54, // ZPR3_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo 96, // ZPR3_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 77, // ZPR3_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 113, // ZPR3_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo 99, // ZPR3_with_dsub_in_FPR64_lo:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 95, // ZPR3_with_dsub_in_FPR64_lo:zsub1_zsub2 -> ZPR2 0, // ZPR3_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 0, // ZPR3_with_dsub_in_FPR64_lo:zsub2_zsub3 53, // ZPR3_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub -> DD 0, // ZPR3_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 94, // ZPR3_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub -> QQ 0, // ZPR3_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo:zsub0_zsub2 0, // ZPR3_with_dsub_in_FPR64_lo:zsub1_zsub3 }, { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 1, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:bsub -> FPR8 36, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub -> FPR64 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3 2, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:hsub -> FPR16 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:psub0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:psub1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3 20, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:ssub -> FPR32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sube32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sube64 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo64 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubb 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1 70, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub -> FPR128 71, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0 -> ZPR 71, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1 -> ZPR 71, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2 -> ZPR 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_hi 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo64_then_sub_32 1, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_bsub -> FPR8 36, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub -> FPR64 2, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_hsub -> FPR16 20, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_ssub -> FPR32 70, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub -> FPR128 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_hi 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_zsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_zsub_hi 1, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_bsub -> FPR8 36, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_dsub -> FPR64 2, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_hsub -> FPR16 20, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_ssub -> FPR32 70, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub -> FPR128 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub_hi 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1_dsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2_dsub3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_dsub3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1_qsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2_qsub3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_qsub3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0_x8sub_1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_x8sub_3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_x8sub_5 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_x8sub_7 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_subo64_then_sub_32 53, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub -> DD 94, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub -> QQ 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 76, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 111, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ 98, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1 -> ZPR2Mul2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1_zsub2 95, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2 -> ZPR2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2_zsub3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_zsub3 53, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub -> DD 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 94, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub -> QQ 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub3 }, { // ZPR3_with_zsub1_in_ZPR_4b 1, // ZPR3_with_zsub1_in_ZPR_4b:bsub -> FPR8 36, // ZPR3_with_zsub1_in_ZPR_4b:dsub -> FPR64 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub0 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub1 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub2 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub3 2, // ZPR3_with_zsub1_in_ZPR_4b:hsub -> FPR16 0, // ZPR3_with_zsub1_in_ZPR_4b:psub0 0, // ZPR3_with_zsub1_in_ZPR_4b:psub1 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub0 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub1 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub2 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub3 20, // ZPR3_with_zsub1_in_ZPR_4b:ssub -> FPR32 0, // ZPR3_with_zsub1_in_ZPR_4b:sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b:sube32 0, // ZPR3_with_zsub1_in_ZPR_4b:sube64 0, // ZPR3_with_zsub1_in_ZPR_4b:subo32 0, // ZPR3_with_zsub1_in_ZPR_4b:subo64 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_0 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_1 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_2 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_3 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_4 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_5 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_6 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_7 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubb 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubd0 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubd1 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubh0 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubh1 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubq0 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubq1 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubs0 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubs1 70, // ZPR3_with_zsub1_in_ZPR_4b:zsub -> FPR128 71, // ZPR3_with_zsub1_in_ZPR_4b:zsub0 -> ZPR 74, // ZPR3_with_zsub1_in_ZPR_4b:zsub1 -> ZPR_4b 71, // ZPR3_with_zsub1_in_ZPR_4b:zsub2 -> ZPR 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub3 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub_hi 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd0 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd1 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubs1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubs1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd0 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd1 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs0 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub1_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub1_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub1_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub3_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub3_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub3_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub2_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub2_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub2_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub1_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub1_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub1_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub1_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub3_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub3_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub3_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub2_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub2_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub2_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub2_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_7_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_6_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_5_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_4_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_3_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_2_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_1_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b:subo64_then_sub_32 1, // ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_bsub -> FPR8 44, // ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_zsub_hi 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub3_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub3_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub3_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub3_then_zsub 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub3_then_zsub_hi 1, // ZPR3_with_zsub1_in_ZPR_4b:zsub2_then_bsub -> FPR8 36, // ZPR3_with_zsub1_in_ZPR_4b:zsub2_then_dsub -> FPR64 2, // ZPR3_with_zsub1_in_ZPR_4b:zsub2_then_hsub -> FPR16 20, // ZPR3_with_zsub1_in_ZPR_4b:zsub2_then_ssub -> FPR32 70, // ZPR3_with_zsub1_in_ZPR_4b:zsub2_then_zsub -> FPR128 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub2_then_zsub_hi 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub0_dsub1 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub0_dsub1_dsub2 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub1_dsub2 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub1_dsub2_dsub3 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub2_dsub3 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub_qsub1_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub0_qsub1 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub0_qsub1_qsub2 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub1_qsub2 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub1_qsub2_qsub3 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub2_qsub3 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_0_x8sub_1 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_2_x8sub_3 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_4_x8sub_5 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_6_x8sub_7 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b:sub_32_subo64_then_sub_32 55, // ZPR3_with_zsub1_in_ZPR_4b:dsub_zsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR3_with_zsub1_in_ZPR_4b:zsub_zsub1_then_zsub -> QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub1_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 78, // ZPR3_with_zsub1_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 114, // ZPR3_with_zsub1_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub1_in_FPR128_lo 100, // ZPR3_with_zsub1_in_ZPR_4b:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_4b 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub0_zsub1_zsub2 99, // ZPR3_with_zsub1_in_ZPR_4b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub1_zsub2_zsub3 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub2_zsub3 54, // ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 96, // ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub0_zsub2 0, // ZPR3_with_zsub1_in_ZPR_4b:zsub1_zsub3 }, { // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 1, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:bsub -> FPR8 36, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub -> FPR64 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3 2, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:hsub -> FPR16 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:psub0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:psub1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3 20, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:ssub -> FPR32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sube32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sube64 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo64 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_5 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_7 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubb 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1 70, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub -> FPR128 71, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0 -> ZPR 71, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1 -> ZPR 71, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2 -> ZPR 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_hi 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_7_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_5_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_3_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_1_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo64_then_sub_32 1, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_bsub -> FPR8 36, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub -> FPR64 2, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_hsub -> FPR16 20, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_ssub -> FPR32 70, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub -> FPR128 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_hi 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_zsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_zsub_hi 1, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_bsub -> FPR8 36, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_dsub -> FPR64 2, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_hsub -> FPR16 20, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_ssub -> FPR32 70, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub -> FPR128 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub_hi 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0_dsub1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0_dsub1_dsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_dsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_dsub2_dsub3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_dsub3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0_qsub1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0_qsub1_qsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_qsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_qsub2_qsub3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_qsub3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_0_x8sub_1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_x8sub_3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_x8sub_5 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_x8sub_7 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32_subo64_then_sub_32 53, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub -> DD 94, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub -> QQ 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 76, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 111, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ 95, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub1 -> ZPR2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub1_zsub2 98, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub2 -> ZPR2Mul2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub2_zsub3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_zsub3 53, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub -> DD 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 94, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub -> QQ 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub3 }, { // ZPR3_with_zsub2_in_ZPR_4b 1, // ZPR3_with_zsub2_in_ZPR_4b:bsub -> FPR8 36, // ZPR3_with_zsub2_in_ZPR_4b:dsub -> FPR64 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub0 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub1 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub2 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub3 2, // ZPR3_with_zsub2_in_ZPR_4b:hsub -> FPR16 0, // ZPR3_with_zsub2_in_ZPR_4b:psub0 0, // ZPR3_with_zsub2_in_ZPR_4b:psub1 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub0 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub1 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub2 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub3 20, // ZPR3_with_zsub2_in_ZPR_4b:ssub -> FPR32 0, // ZPR3_with_zsub2_in_ZPR_4b:sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b:sube32 0, // ZPR3_with_zsub2_in_ZPR_4b:sube64 0, // ZPR3_with_zsub2_in_ZPR_4b:subo32 0, // ZPR3_with_zsub2_in_ZPR_4b:subo64 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_0 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_1 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_2 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_3 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_4 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_5 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_6 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_7 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubb 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubd0 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubd1 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubh0 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubh1 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubs0 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubs1 70, // ZPR3_with_zsub2_in_ZPR_4b:zsub -> FPR128 71, // ZPR3_with_zsub2_in_ZPR_4b:zsub0 -> ZPR 71, // ZPR3_with_zsub2_in_ZPR_4b:zsub1 -> ZPR 74, // ZPR3_with_zsub2_in_ZPR_4b:zsub2 -> ZPR_4b 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub3 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub_hi 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd0 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd1 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubs1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubs1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd0 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd1 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs0 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub1_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub1_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub1_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub3_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub3_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub3_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub2_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub2_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub2_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub1_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub1_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub1_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub1_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub3_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub3_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub3_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub2_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub2_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub2_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub2_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_7_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_6_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_5_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_4_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_3_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_2_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_1_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b:subo64_then_sub_32 1, // ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_bsub -> FPR8 36, // ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_dsub -> FPR64 2, // ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_hsub -> FPR16 20, // ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_ssub -> FPR32 70, // ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_zsub -> FPR128 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_zsub_hi 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub3_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub3_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub3_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub3_then_zsub 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub3_then_zsub_hi 1, // ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_bsub -> FPR8 44, // ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_zsub_hi 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub0_dsub1 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub0_dsub1_dsub2 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub1_dsub2 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub1_dsub2_dsub3 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub2_dsub3 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub_qsub1_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub0_qsub1 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub0_qsub1_qsub2 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub1_qsub2 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub1_qsub2_qsub3 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub2_qsub3 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_0_x8sub_1 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_2_x8sub_3 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_4_x8sub_5 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_6_x8sub_7 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b:sub_32_subo64_then_sub_32 53, // ZPR3_with_zsub2_in_ZPR_4b:dsub_zsub1_then_dsub -> DD 94, // ZPR3_with_zsub2_in_ZPR_4b:zsub_zsub1_then_zsub -> QQ 0, // ZPR3_with_zsub2_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 79, // ZPR3_with_zsub2_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub2_in_FPR64_lo 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 115, // ZPR3_with_zsub2_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub2_in_FPR128_lo 95, // ZPR3_with_zsub2_in_ZPR_4b:zsub0_zsub1 -> ZPR2 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub0_zsub1_zsub2 100, // ZPR3_with_zsub2_in_ZPR_4b:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPR_4b 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub1_zsub2_zsub3 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub2_zsub3 55, // ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 97, // ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub0_zsub2 0, // ZPR3_with_zsub2_in_ZPR_4b:zsub1_zsub3 }, { // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 1, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:bsub -> FPR8 44, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub -> FPR64_lo 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub2 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub3 3, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:hsub -> FPR16_lo 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:psub0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:psub1 72, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub0 -> FPR128_lo 72, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub1 -> FPR128_lo 70, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub2 -> FPR128 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub3 24, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:sube32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:sube64 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:subo32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:subo64 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_2 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_3 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_4 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_5 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_6 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_7 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubb 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubd0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubd1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubh0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubh1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubq0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubq1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubs0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubs1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub2 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub3 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub_hi 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubd1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubd1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub1_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub1_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub1_then_ssub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub3_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub3_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub3_then_ssub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub2_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub2_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub2_then_ssub 1, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub1_then_bsub -> FPR8 44, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub1_then_dsub -> FPR64_lo 3, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub1_then_hsub -> FPR16_lo 24, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub3_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub3_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub3_then_ssub 1, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub2_then_bsub -> FPR8 36, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub2_then_dsub -> FPR64 2, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub2_then_hsub -> FPR16 20, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub2_then_ssub -> FPR32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_7_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_6_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_5_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_4_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_3_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_2_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_1_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:subo64_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub1_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub1_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub1_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub1_then_ssub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub_hi 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub3_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub3_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub3_then_ssub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub3_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub3_then_zsub_hi 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub2_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub2_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub2_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub2_then_ssub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub2_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub2_then_zsub_hi 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub0_dsub1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub0_dsub1_dsub2 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub1_dsub2 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub1_dsub2_dsub3 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub2_dsub3 57, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub_qsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 80, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 101, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub0_qsub1 -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub0_qsub1_qsub2 96, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub1_qsub2 -> QQ_with_dsub_in_FPR64_lo 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub1_qsub2_qsub3 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub2_qsub3 54, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:qsub2_then_dsub_qsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_0_x8sub_1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_2_x8sub_3 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_4_x8sub_5 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_6_x8sub_7 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:sub_32_subo64_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub_zsub1_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub_zsub1_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub0_zsub1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub0_zsub1_zsub2 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub1_zsub2 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub1_zsub2_zsub3 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub2_zsub3 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub2_then_dsub_zsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub2_then_zsub_zsub3_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub0_zsub2 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo:zsub1_zsub3 }, { // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 1, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:bsub -> FPR8 36, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub -> FPR64 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub0 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub2 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub3 2, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:hsub -> FPR16 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:psub0 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:psub1 70, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub0 -> FPR128 72, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub1 -> FPR128_lo 72, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub2 -> FPR128_lo 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub3 20, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:ssub -> FPR32 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:sub_32 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:sube32 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:sube64 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:subo32 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:subo64 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_0 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_2 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_3 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_4 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_5 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_6 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_7 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubb 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubd0 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubd1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh0 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubq0 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubq1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubs0 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubs1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub0 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub3 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub_hi 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubd1_then_zasubq0 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubd1_then_zasubq1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd0 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubq0 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubq1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd0 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubq0 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubq1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs0 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub1_then_bsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub1_then_hsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub1_then_ssub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub3_then_bsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub3_then_hsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub3_then_ssub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub2_then_bsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub2_then_hsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub2_then_ssub 1, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub1_then_bsub -> FPR8 44, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub1_then_dsub -> FPR64_lo 3, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub1_then_hsub -> FPR16_lo 24, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub3_then_bsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub3_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub3_then_hsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub3_then_ssub 1, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub2_then_bsub -> FPR8 44, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub2_then_dsub -> FPR64_lo 3, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub2_then_hsub -> FPR16_lo 24, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_7_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_6_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_5_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_4_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_3_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_2_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_1_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:subo64_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_bsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_hsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_ssub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub_hi 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub3_then_bsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub3_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub3_then_hsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub3_then_ssub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub3_then_zsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub3_then_zsub_hi 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2_then_bsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2_then_hsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2_then_ssub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2_then_zsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2_then_zsub_hi 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub0_dsub1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub0_dsub1_dsub2 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub1_dsub2 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub1_dsub2_dsub3 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub2_dsub3 55, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub_qsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 81, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 97, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub0_qsub1 -> QQ_with_qsub1_in_FPR128_lo 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub0_qsub1_qsub2 101, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub1_qsub2 -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub1_qsub2_qsub3 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub2_qsub3 57, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub2_then_dsub_qsub3_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_0_x8sub_1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_2_x8sub_3 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_4_x8sub_5 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_6_x8sub_7 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:sub_32_subo64_then_sub_32 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub_zsub1_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub_zsub1_then_zsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub0_zsub1 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub0_zsub1_zsub2 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_zsub2 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_zsub2_zsub3 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2_zsub3 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2_then_dsub_zsub3_then_dsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2_then_zsub_zsub3_then_zsub 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub0_zsub2 0, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_zsub3 }, { // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:bsub -> FPR8 44, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub -> FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub3 3, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:hsub -> FPR16_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:psub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:psub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub3 24, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:sube32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:sube64 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:subo32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:subo64 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_4 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_5 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_6 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_7 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubb 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubh0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubh1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubs0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubs1 72, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub -> FPR128_lo 74, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub0 -> ZPR_4b 74, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub1 -> ZPR_4b 71, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub2 -> ZPR 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubs1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubs1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub1_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub1_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub1_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub2_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub2_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub2_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub1_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub1_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub1_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub1_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub2_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub2_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub2_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_7_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_6_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_5_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_4_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_3_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_2_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_1_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:subo64_then_sub_32 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_bsub -> FPR8 44, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_dsub -> FPR64_lo 3, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_hsub -> FPR16_lo 24, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_zsub -> FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub3_then_zsub_hi 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub2_then_bsub -> FPR8 36, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub2_then_dsub -> FPR64 2, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub2_then_hsub -> FPR16 20, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub2_then_ssub -> FPR32 70, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub2_then_zsub -> FPR128 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub2_then_zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub0_dsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub0_dsub1_dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub1_dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub1_dsub2_dsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub2_dsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub_qsub1_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub0_qsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub0_qsub1_qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub1_qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub1_qsub2_qsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub2_qsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_0_x8sub_1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_2_x8sub_3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_4_x8sub_5 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_6_x8sub_7 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:sub_32_subo64_then_sub_32 57, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 80, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 121, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 102, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub0_zsub1_zsub2 99, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub1_zsub2_zsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub2_zsub3 54, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 96, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub0_zsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b:zsub1_zsub3 }, { // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 1, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:bsub -> FPR8 36, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub -> FPR64 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub0 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub2 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub3 2, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:hsub -> FPR16 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:psub0 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:psub1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub0 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub2 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub3 20, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:ssub -> FPR32 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:sube32 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:sube64 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:subo32 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:subo64 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_0 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_2 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_3 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_4 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_5 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_6 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_7 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubb 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubd0 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubd1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh0 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubq0 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubq1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubs0 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubs1 70, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub -> FPR128 71, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub0 -> ZPR 74, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1 -> ZPR_4b 74, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2 -> ZPR_4b 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub3 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub_hi 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd0 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubs1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubs1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd0 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs0 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub1_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub1_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub1_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub3_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub3_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub3_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub2_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub2_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub2_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub1_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub1_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub1_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub1_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub3_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub3_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub3_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub2_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub2_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub2_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub2_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_7_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_6_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_5_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_4_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_3_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_2_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_1_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:subo64_then_sub_32 1, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_bsub -> FPR8 44, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_zsub_hi 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub3_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub3_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub3_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub3_then_zsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub3_then_zsub_hi 1, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_bsub -> FPR8 44, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_zsub_hi 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub0_dsub1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub0_dsub1_dsub2 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub1_dsub2 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub1_dsub2_dsub3 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub2_dsub3 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub_qsub1_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub0_qsub1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub0_qsub1_qsub2 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub1_qsub2 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub1_qsub2_qsub3 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub2_qsub3 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_0_x8sub_1 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_2_x8sub_3 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_4_x8sub_5 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_6_x8sub_7 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:sub_32_subo64_then_sub_32 55, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub_zsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub_zsub1_then_zsub -> QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 81, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 122, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 100, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_4b 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub0_zsub1_zsub2 102, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_zsub2_zsub3 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2_zsub3 57, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 101, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub0_zsub2 0, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_zsub3 }, { // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 1, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:bsub -> FPR8 44, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub -> FPR64_lo 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub2 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub3 3, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:hsub -> FPR16_lo 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:psub0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:psub1 72, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub0 -> FPR128_lo 72, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub1 -> FPR128_lo 72, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub2 -> FPR128_lo 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub3 24, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:sube32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:sube64 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:subo32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:subo64 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_2 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_3 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_4 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_5 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_6 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_7 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubb 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubd0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubd1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubq0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubq1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubs0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubs1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub3 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub_hi 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubd1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubd1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub1_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub1_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub1_then_ssub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub3_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub3_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub3_then_ssub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub2_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub2_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub2_then_ssub 1, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub1_then_bsub -> FPR8 44, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub1_then_dsub -> FPR64_lo 3, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub1_then_hsub -> FPR16_lo 24, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub3_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub3_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub3_then_ssub 1, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub2_then_bsub -> FPR8 44, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub2_then_dsub -> FPR64_lo 3, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub2_then_hsub -> FPR16_lo 24, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_7_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_6_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_5_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_4_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_3_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_2_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_1_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:subo64_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_ssub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub_hi 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub3_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub3_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub3_then_ssub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub3_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub3_then_zsub_hi 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2_then_bsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2_then_hsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2_then_ssub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2_then_zsub_hi 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub0_dsub1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub0_dsub1_dsub2 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub1_dsub2 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub1_dsub2_dsub3 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub2_dsub3 57, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub_qsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 82, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub0_qsub1 -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub0_qsub1_qsub2 101, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub1_qsub2 -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub1_qsub2_qsub3 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub2_qsub3 57, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:qsub2_then_dsub_qsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_0_x8sub_1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_2_x8sub_3 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_4_x8sub_5 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_6_x8sub_7 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:sub_32_subo64_then_sub_32 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub_zsub1_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub_zsub1_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub0_zsub1 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub0_zsub1_zsub2 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_zsub2 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_zsub2_zsub3 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2_zsub3 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2_then_dsub_zsub3_then_dsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub2_then_zsub_zsub3_then_zsub 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub0_zsub2 0, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo:zsub1_zsub3 }, { // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:bsub -> FPR8 44, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub -> FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub3 3, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:hsub -> FPR16_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:psub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:psub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub3 24, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:sube32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:sube64 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:subo32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:subo64 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_4 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_5 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_6 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_7 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubb 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubs0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubs1 72, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub -> FPR128_lo 74, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub0 -> ZPR_4b 74, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1 -> ZPR_4b 74, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2 -> ZPR_4b 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubs1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubs1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub1_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub1_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub1_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub2_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub2_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub2_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub1_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub1_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub1_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub1_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub2_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub2_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub2_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_7_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_6_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_5_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_4_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_3_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_2_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_1_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:subo64_then_sub_32 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_bsub -> FPR8 44, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_dsub -> FPR64_lo 3, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_hsub -> FPR16_lo 24, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_zsub -> FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub3_then_zsub_hi 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_bsub -> FPR8 44, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_dsub -> FPR64_lo 3, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_hsub -> FPR16_lo 24, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_zsub -> FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub0_dsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub0_dsub1_dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub1_dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub1_dsub2_dsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub2_dsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub_qsub1_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub0_qsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub0_qsub1_qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub1_qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub1_qsub2_qsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub2_qsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_0_x8sub_1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_2_x8sub_3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_4_x8sub_5 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_6_x8sub_7 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:sub_32_subo64_then_sub_32 57, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 82, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 125, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 102, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub0_zsub1_zsub2 102, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_zsub2_zsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2_zsub3 57, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 101, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub0_zsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b:zsub1_zsub3 }, { // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:bsub -> FPR8 44, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub -> FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3 3, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:hsub -> FPR16_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:psub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:psub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3 24, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sube32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sube64 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo64 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_5 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_7 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubb 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1 72, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub -> FPR128_lo 74, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0 -> ZPR_4b 71, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1 -> ZPR 71, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2 -> ZPR 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_7_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_5_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_3_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_1_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo64_then_sub_32 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_bsub -> FPR8 36, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub -> FPR64 2, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_hsub -> FPR16 20, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_ssub -> FPR32 70, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub -> FPR128 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_zsub_hi 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_bsub -> FPR8 36, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_dsub -> FPR64 2, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_hsub -> FPR16 20, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_ssub -> FPR32 70, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub -> FPR128 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0_dsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0_dsub1_dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_dsub2_dsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_dsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0_qsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0_qsub1_qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_qsub2_qsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_qsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_0_x8sub_1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_x8sub_3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_x8sub_5 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_x8sub_7 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32_subo64_then_sub_32 54, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo 96, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 77, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 113, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo 99, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub1_zsub2 98, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub2 -> ZPR2Mul2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub2_zsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_zsub3 53, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub -> DD 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 94, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub -> QQ 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub3 }, { // ZPR3_with_zsub0_in_ZPR_3b 1, // ZPR3_with_zsub0_in_ZPR_3b:bsub -> FPR8 44, // ZPR3_with_zsub0_in_ZPR_3b:dsub -> FPR64_lo 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub0 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub1 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub2 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub3 3, // ZPR3_with_zsub0_in_ZPR_3b:hsub -> FPR16_lo 0, // ZPR3_with_zsub0_in_ZPR_3b:psub0 0, // ZPR3_with_zsub0_in_ZPR_3b:psub1 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub0 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub1 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub2 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub3 24, // ZPR3_with_zsub0_in_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR3_with_zsub0_in_ZPR_3b:sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b:sube32 0, // ZPR3_with_zsub0_in_ZPR_3b:sube64 0, // ZPR3_with_zsub0_in_ZPR_3b:subo32 0, // ZPR3_with_zsub0_in_ZPR_3b:subo64 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_0 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_1 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_2 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_3 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_4 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_5 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_6 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_7 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubb 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubd0 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubd1 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubh0 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubh1 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubq0 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubq1 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubs0 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubs1 72, // ZPR3_with_zsub0_in_ZPR_3b:zsub -> FPR128_lo 75, // ZPR3_with_zsub0_in_ZPR_3b:zsub0 -> ZPR_3b 74, // ZPR3_with_zsub0_in_ZPR_3b:zsub1 -> ZPR_4b 74, // ZPR3_with_zsub0_in_ZPR_3b:zsub2 -> ZPR_4b 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub3 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub_hi 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub1_then_bsub 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub1_then_hsub 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub1_then_ssub 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub3_then_bsub 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub3_then_hsub 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub3_then_ssub 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub2_then_bsub 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub2_then_hsub 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub2_then_ssub 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub1_then_bsub 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub1_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub1_then_hsub 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub1_then_ssub 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub3_then_bsub 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub3_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub3_then_hsub 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub3_then_ssub 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub2_then_bsub 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub2_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub2_then_hsub 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub2_then_ssub 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b:subo64_then_sub_32 1, // ZPR3_with_zsub0_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR3_with_zsub0_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub0_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub0_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub0_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub1_then_zsub_hi 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub3_then_bsub 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub3_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub3_then_hsub 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub3_then_ssub 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub3_then_zsub 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR3_with_zsub0_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR3_with_zsub0_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub0_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub0_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub0_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub0_dsub1 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub1_dsub2 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub2_dsub3 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub0_qsub1 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub1_qsub2 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub2_qsub3 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b:sub_32_subo64_then_sub_32 57, // ZPR3_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR3_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 82, // ZPR3_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 125, // ZPR3_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 104, // ZPR3_with_zsub0_in_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_3b 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub0_zsub1_zsub2 102, // ZPR3_with_zsub0_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub1_zsub2_zsub3 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub2_zsub3 57, // ZPR3_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 101, // ZPR3_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub0_zsub2 0, // ZPR3_with_zsub0_in_ZPR_3b:zsub1_zsub3 }, { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 1, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:bsub -> FPR8 44, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub -> FPR64_lo 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3 3, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:hsub -> FPR16_lo 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3 24, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube64 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubb 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1 72, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub -> FPR128_lo 74, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0 -> ZPR_4b 74, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1 -> ZPR_4b 71, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2 -> ZPR 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_hi 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64_then_sub_32 1, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_bsub -> FPR8 44, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 1, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_bsub -> FPR8 36, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub -> FPR64 2, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_hsub -> FPR16 20, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_ssub -> FPR32 70, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub -> FPR128 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_dsub3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_qsub3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 57, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 80, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 121, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 103, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 99, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_zsub3 54, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 96, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub3 }, { // ZPR3_with_zsub1_in_ZPR_3b 1, // ZPR3_with_zsub1_in_ZPR_3b:bsub -> FPR8 36, // ZPR3_with_zsub1_in_ZPR_3b:dsub -> FPR64 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub0 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub1 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub2 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub3 2, // ZPR3_with_zsub1_in_ZPR_3b:hsub -> FPR16 0, // ZPR3_with_zsub1_in_ZPR_3b:psub0 0, // ZPR3_with_zsub1_in_ZPR_3b:psub1 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub0 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub1 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub2 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub3 20, // ZPR3_with_zsub1_in_ZPR_3b:ssub -> FPR32 0, // ZPR3_with_zsub1_in_ZPR_3b:sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b:sube32 0, // ZPR3_with_zsub1_in_ZPR_3b:sube64 0, // ZPR3_with_zsub1_in_ZPR_3b:subo32 0, // ZPR3_with_zsub1_in_ZPR_3b:subo64 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_0 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_1 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_2 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_3 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_4 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_5 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_6 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_7 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubb 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubd0 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubd1 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubh0 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubh1 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubq0 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubq1 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubs0 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubs1 70, // ZPR3_with_zsub1_in_ZPR_3b:zsub -> FPR128 71, // ZPR3_with_zsub1_in_ZPR_3b:zsub0 -> ZPR 75, // ZPR3_with_zsub1_in_ZPR_3b:zsub1 -> ZPR_3b 74, // ZPR3_with_zsub1_in_ZPR_3b:zsub2 -> ZPR_4b 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub3 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub_hi 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub1_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub1_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub1_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub3_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub3_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub3_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub2_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub2_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub2_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub1_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub1_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub1_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub1_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub3_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub3_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub3_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub2_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub2_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub2_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub2_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b:subo64_then_sub_32 1, // ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_zsub_hi 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub3_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub3_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub3_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub3_then_zsub 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR3_with_zsub1_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR3_with_zsub1_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub1_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub1_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub1_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub0_dsub1 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub1_dsub2 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub2_dsub3 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub0_qsub1 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub1_qsub2 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub2_qsub3 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b:sub_32_subo64_then_sub_32 55, // ZPR3_with_zsub1_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR3_with_zsub1_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub1_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 81, // ZPR3_with_zsub1_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 122, // ZPR3_with_zsub1_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 105, // ZPR3_with_zsub1_in_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_3b 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub0_zsub1_zsub2 104, // ZPR3_with_zsub1_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_3b 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub1_zsub2_zsub3 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub2_zsub3 57, // ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 101, // ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub0_zsub2 0, // ZPR3_with_zsub1_in_ZPR_3b:zsub1_zsub3 }, { // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 1, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:bsub -> FPR8 36, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub -> FPR64 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3 2, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:hsub -> FPR16 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3 20, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:ssub -> FPR32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube64 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubb 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1 70, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub -> FPR128 71, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0 -> ZPR 74, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1 -> ZPR_4b 74, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2 -> ZPR_4b 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_hi 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64_then_sub_32 1, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_bsub -> FPR8 44, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 1, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_bsub -> FPR8 44, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_dsub3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_qsub3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 55, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub -> QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 81, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 122, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 100, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_4b 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 103, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_zsub3 57, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 101, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub3 }, { // ZPR3_with_zsub2_in_ZPR_3b 1, // ZPR3_with_zsub2_in_ZPR_3b:bsub -> FPR8 36, // ZPR3_with_zsub2_in_ZPR_3b:dsub -> FPR64 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub0 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub1 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub2 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub3 2, // ZPR3_with_zsub2_in_ZPR_3b:hsub -> FPR16 0, // ZPR3_with_zsub2_in_ZPR_3b:psub0 0, // ZPR3_with_zsub2_in_ZPR_3b:psub1 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub0 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub1 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub2 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub3 20, // ZPR3_with_zsub2_in_ZPR_3b:ssub -> FPR32 0, // ZPR3_with_zsub2_in_ZPR_3b:sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b:sube32 0, // ZPR3_with_zsub2_in_ZPR_3b:sube64 0, // ZPR3_with_zsub2_in_ZPR_3b:subo32 0, // ZPR3_with_zsub2_in_ZPR_3b:subo64 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_0 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_1 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_2 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_3 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_4 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_5 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_6 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_7 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubb 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubd0 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubd1 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubh0 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubh1 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubs0 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubs1 70, // ZPR3_with_zsub2_in_ZPR_3b:zsub -> FPR128 71, // ZPR3_with_zsub2_in_ZPR_3b:zsub0 -> ZPR 71, // ZPR3_with_zsub2_in_ZPR_3b:zsub1 -> ZPR 75, // ZPR3_with_zsub2_in_ZPR_3b:zsub2 -> ZPR_3b 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub3 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub_hi 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub1_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub1_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub1_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub3_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub3_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub3_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub2_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub2_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub2_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub1_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub1_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub1_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub1_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub3_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub3_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub3_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub2_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub2_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub2_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub2_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b:subo64_then_sub_32 1, // ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_bsub -> FPR8 36, // ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_dsub -> FPR64 2, // ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_hsub -> FPR16 20, // ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_ssub -> FPR32 70, // ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_zsub -> FPR128 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_zsub_hi 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub3_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub3_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub3_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub3_then_zsub 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub0_dsub1 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub1_dsub2 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub2_dsub3 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub0_qsub1 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub1_qsub2 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub2_qsub3 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b:sub_32_subo64_then_sub_32 53, // ZPR3_with_zsub2_in_ZPR_3b:dsub_zsub1_then_dsub -> DD 94, // ZPR3_with_zsub2_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ 0, // ZPR3_with_zsub2_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 79, // ZPR3_with_zsub2_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub2_in_FPR64_lo 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 115, // ZPR3_with_zsub2_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub2_in_FPR128_lo 95, // ZPR3_with_zsub2_in_ZPR_3b:zsub0_zsub1 -> ZPR2 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub0_zsub1_zsub2 105, // ZPR3_with_zsub2_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPR_3b 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub1_zsub2_zsub3 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub2_zsub3 55, // ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 97, // ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub0_zsub2 0, // ZPR3_with_zsub2_in_ZPR_3b:zsub1_zsub3 }, { // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 1, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:bsub -> FPR8 36, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub -> FPR64 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3 2, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:hsub -> FPR16 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:psub0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:psub1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3 20, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:ssub -> FPR32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sube32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sube64 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo64 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubb 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1 70, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub -> FPR128 71, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0 -> ZPR 71, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1 -> ZPR 74, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2 -> ZPR_4b 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_hi 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo64_then_sub_32 1, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_bsub -> FPR8 36, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub -> FPR64 2, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_hsub -> FPR16 20, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_ssub -> FPR32 70, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub -> FPR128 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_hi 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_zsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_zsub_hi 1, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_bsub -> FPR8 44, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub_hi 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1_dsub2 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2_dsub3 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_dsub3 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1_qsub2 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2_qsub3 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_qsub3 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0_x8sub_1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_x8sub_3 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_x8sub_5 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_x8sub_7 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_subo64_then_sub_32 53, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub -> DD 94, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub -> QQ 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 79, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub2_in_FPR64_lo 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 115, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub2_in_FPR128_lo 98, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1 -> ZPR2Mul2 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1_zsub2 100, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPR_4b 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2_zsub3 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_zsub3 55, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 97, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub2 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub3 }, { // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:bsub -> FPR8 44, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub -> FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub3 3, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:hsub -> FPR16_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:psub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:psub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub3 24, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:sube32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:sube64 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:subo32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:subo64 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_4 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_5 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_6 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_7 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubb 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubh0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubh1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubs0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubs1 72, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub -> FPR128_lo 75, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub0 -> ZPR_3b 75, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub1 -> ZPR_3b 74, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub2 -> ZPR_4b 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub1_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub1_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub1_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub2_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub2_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub2_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub1_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub1_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub1_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub1_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub2_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub2_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub2_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:subo64_then_sub_32 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub0_dsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub1_dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub2_dsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub0_qsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub1_qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub2_qsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:sub_32_subo64_then_sub_32 57, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 82, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 125, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 106, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub0_zsub1_zsub2 104, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_3b 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub1_zsub2_zsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub2_zsub3 57, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 101, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub0_zsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b:zsub1_zsub3 }, { // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:bsub -> FPR8 44, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub -> FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3 3, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:hsub -> FPR16_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3 24, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube64 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubb 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1 72, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub -> FPR128_lo 74, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0 -> ZPR_4b 74, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1 -> ZPR_4b 74, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2 -> ZPR_4b 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64_then_sub_32 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_bsub -> FPR8 44, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub -> FPR64_lo 3, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_hsub -> FPR16_lo 24, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub -> FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_bsub -> FPR8 44, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub -> FPR64_lo 3, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_hsub -> FPR16_lo 24, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub -> FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_dsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_qsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 57, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 82, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 125, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 102, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 103, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_zsub3 57, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 101, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub3 }, { // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 1, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:bsub -> FPR8 36, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub -> FPR64 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub0 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub2 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub3 2, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:hsub -> FPR16 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:psub0 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:psub1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub0 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub2 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub3 20, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:ssub -> FPR32 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:sube32 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:sube64 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:subo32 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:subo64 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_0 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_2 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_3 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_4 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_5 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_6 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_7 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubb 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubd0 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubd1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh0 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubq0 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubq1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubs0 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubs1 70, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub -> FPR128 71, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub0 -> ZPR 75, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1 -> ZPR_3b 75, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2 -> ZPR_3b 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub3 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub_hi 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub1_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub1_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub1_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub3_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub3_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub3_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub2_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub2_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub2_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub1_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub1_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub1_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub1_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub3_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub3_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub3_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub2_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub2_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub2_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub2_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:subo64_then_sub_32 1, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_zsub_hi 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub3_then_bsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub3_then_hsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub3_then_ssub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub3_then_zsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub0_dsub1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub1_dsub2 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub2_dsub3 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub0_qsub1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub1_qsub2 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub2_qsub3 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:sub_32_subo64_then_sub_32 55, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 81, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 122, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 105, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_3b 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub0_zsub1_zsub2 106, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_zsub2_zsub3 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2_zsub3 57, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 101, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub0_zsub2 0, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_zsub3 }, { // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 1, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:bsub -> FPR8 44, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub -> FPR64_lo 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3 3, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:hsub -> FPR16_lo 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3 24, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube64 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubb 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1 72, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub -> FPR128_lo 74, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0 -> ZPR_4b 74, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1 -> ZPR_4b 74, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2 -> ZPR_4b 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_hi 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64_then_sub_32 1, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_bsub -> FPR8 44, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 1, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_bsub -> FPR8 44, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_dsub3 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_qsub3 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 57, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 82, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 125, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 103, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 102, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_zsub3 57, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 101, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub2 0, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub3 }, { // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:bsub -> FPR8 44, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub -> FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub3 3, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:hsub -> FPR16_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:psub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:psub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub3 24, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:sube32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:sube64 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:subo32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:subo64 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_4 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_5 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_6 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_7 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubb 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubs0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubs1 72, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub -> FPR128_lo 75, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub0 -> ZPR_3b 75, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1 -> ZPR_3b 75, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2 -> ZPR_3b 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub1_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub1_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub1_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub2_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub2_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub2_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub1_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub1_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub1_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub1_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub2_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub2_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub2_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:subo64_then_sub_32 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub0_dsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub1_dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub2_dsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub0_qsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub1_qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub2_qsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:sub_32_subo64_then_sub_32 57, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 82, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 125, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 106, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub0_zsub1_zsub2 106, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_zsub2_zsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2_zsub3 57, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 101, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub0_zsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b:zsub1_zsub3 }, { // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 1, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:bsub -> FPR8 44, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub -> FPR64_lo 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3 3, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:hsub -> FPR16_lo 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:psub0 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:psub1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3 24, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sube32 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sube64 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo32 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo64 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_0 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_3 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_5 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_7 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubb 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd0 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh0 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubq0 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubq1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs0 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1 72, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub -> FPR128_lo 75, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0 -> ZPR_3b 74, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1 -> ZPR_4b 74, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2 -> ZPR_4b 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_hi 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd0 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubq0 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubq1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd0 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubq0 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubq1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs0 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_bsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_hsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_ssub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_bsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_hsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_ssub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_bsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_hsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_ssub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_bsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_hsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_ssub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_bsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_hsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_ssub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_bsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_hsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_ssub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_7_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_5_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_3_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_1_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo64_then_sub_32 1, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_bsub -> FPR8 44, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_hi 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_bsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_hsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_ssub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_zsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_zsub_hi 1, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_bsub -> FPR8 44, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub_hi 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0_dsub1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0_dsub1_dsub2 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_dsub2 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_dsub2_dsub3 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_dsub3 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0_qsub1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0_qsub1_qsub2 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_qsub2 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_qsub2_qsub3 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_qsub3 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_0_x8sub_1 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_x8sub_3 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_x8sub_5 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_x8sub_7 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32_subo64_then_sub_32 57, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 82, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 125, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 104, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_3b 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub1_zsub2 103, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub2_zsub3 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_zsub3 57, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 101, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub2 0, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub3 }, { // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 1, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:bsub -> FPR8 44, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub -> FPR64_lo 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3 3, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:hsub -> FPR16_lo 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:psub0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:psub1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3 24, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sube32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sube64 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo64 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_5 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_7 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubb 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1 72, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub -> FPR128_lo 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0 -> ZPR_3b 75, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1 -> ZPR_3b 74, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2 -> ZPR_4b 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_hi 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo64_then_sub_32 1, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_hi 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_bsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_hsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_ssub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_dsub3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_qsub3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32_subo64_then_sub_32 57, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 82, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 125, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 107, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1_zsub2 104, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_3b 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2_zsub3 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_zsub3 57, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 101, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub2 0, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub3 }, { // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 1, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:bsub -> FPR8 36, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub -> FPR64 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3 2, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:hsub -> FPR16 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:psub0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:psub1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3 20, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:ssub -> FPR32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sube32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sube64 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo64 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_5 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_7 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubb 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1 70, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub -> FPR128 71, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0 -> ZPR 75, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1 -> ZPR_3b 75, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2 -> ZPR_3b 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_hi 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo64_then_sub_32 1, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_hi 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_bsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_hsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_ssub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_dsub3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_qsub3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32_subo64_then_sub_32 55, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 81, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 122, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 105, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_3b 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1_zsub2 107, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2_zsub3 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_zsub3 57, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 101, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub2 0, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub3 }, { // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 1, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:bsub -> FPR8 36, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub -> FPR64 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3 2, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:hsub -> FPR16 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:psub0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:psub1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3 20, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:ssub -> FPR32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sube32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sube64 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo64 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubb 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1 70, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub -> FPR128 71, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0 -> ZPR 71, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1 -> ZPR 75, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2 -> ZPR_3b 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_hi 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo64_then_sub_32 1, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_bsub -> FPR8 36, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub -> FPR64 2, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_hsub -> FPR16 20, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_ssub -> FPR32 70, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub -> FPR128 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_hi 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_zsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_zsub_hi 1, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_bsub -> FPR8 44, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub_hi 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1_dsub2 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2_dsub3 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_dsub3 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1_qsub2 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2_qsub3 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_qsub3 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0_x8sub_1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_x8sub_3 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_x8sub_5 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_x8sub_7 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_subo64_then_sub_32 53, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub -> DD 94, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub -> QQ 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 79, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub2_in_FPR64_lo 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 115, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub2_in_FPR128_lo 98, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1 -> ZPR2Mul2 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1_zsub2 105, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPR_3b 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2_zsub3 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_zsub3 55, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 97, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub2 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub3 }, { // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:bsub -> FPR8 44, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub -> FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3 3, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:hsub -> FPR16_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:psub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:psub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3 24, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sube32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sube64 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo64 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_5 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_7 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubb 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1 72, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub -> FPR128_lo 75, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0 -> ZPR_3b 75, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1 -> ZPR_3b 75, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2 -> ZPR_3b 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo64_then_sub_32 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_bsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_hsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_ssub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_dsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_qsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32_subo64_then_sub_32 57, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 82, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 125, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 106, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1_zsub2 107, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2_zsub3 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_zsub3 57, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 101, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub2 0, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub3 }, { // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 1, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:bsub -> FPR8 44, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub -> FPR64_lo 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3 3, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:hsub -> FPR16_lo 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3 24, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube64 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubb 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1 72, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub -> FPR128_lo 75, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0 -> ZPR_3b 75, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1 -> ZPR_3b 75, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2 -> ZPR_3b 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_hi 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64_then_sub_32 1, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_bsub -> FPR8 44, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_bsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_hsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_ssub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 1, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_bsub -> FPR8 44, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub -> FPR64_lo 3, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_hsub -> FPR16_lo 24, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub -> FPR128_lo 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_dsub3 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_qsub3 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 57, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 82, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 125, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 107, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 106, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_zsub3 57, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 101, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub2 0, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub3 }, { // QQQQ 1, // QQQQ:bsub -> FPR8 36, // QQQQ:dsub -> FPR64 0, // QQQQ:dsub0 0, // QQQQ:dsub1 0, // QQQQ:dsub2 0, // QQQQ:dsub3 2, // QQQQ:hsub -> FPR16 0, // QQQQ:psub0 0, // QQQQ:psub1 70, // QQQQ:qsub0 -> FPR128 70, // QQQQ:qsub1 -> FPR128 70, // QQQQ:qsub2 -> FPR128 70, // QQQQ:qsub3 -> FPR128 20, // QQQQ:ssub -> FPR32 0, // QQQQ:sub_32 0, // QQQQ:sube32 0, // QQQQ:sube64 0, // QQQQ:subo32 0, // QQQQ:subo64 0, // QQQQ:x8sub_0 0, // QQQQ:x8sub_1 0, // QQQQ:x8sub_2 0, // QQQQ:x8sub_3 0, // QQQQ:x8sub_4 0, // QQQQ:x8sub_5 0, // QQQQ:x8sub_6 0, // QQQQ:x8sub_7 0, // QQQQ:zasubb 0, // QQQQ:zasubd0 0, // QQQQ:zasubd1 0, // QQQQ:zasubh0 0, // QQQQ:zasubh1 0, // QQQQ:zasubq0 0, // QQQQ:zasubq1 0, // QQQQ:zasubs0 0, // QQQQ:zasubs1 0, // QQQQ:zsub 0, // QQQQ:zsub0 0, // QQQQ:zsub1 0, // QQQQ:zsub2 0, // QQQQ:zsub3 0, // QQQQ:zsub_hi 0, // QQQQ:zasubd1_then_zasubq0 0, // QQQQ:zasubd1_then_zasubq1 0, // QQQQ:zasubs1_then_zasubd0 0, // QQQQ:zasubs1_then_zasubd1 0, // QQQQ:zasubs1_then_zasubq0 0, // QQQQ:zasubs1_then_zasubq1 0, // QQQQ:zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ:zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ:zasubh1_then_zasubd0 0, // QQQQ:zasubh1_then_zasubd1 0, // QQQQ:zasubh1_then_zasubq0 0, // QQQQ:zasubh1_then_zasubq1 0, // QQQQ:zasubh1_then_zasubs0 0, // QQQQ:zasubh1_then_zasubs1 0, // QQQQ:zasubh1_then_zasubd1_then_zasubq0 0, // QQQQ:zasubh1_then_zasubd1_then_zasubq1 0, // QQQQ:zasubh1_then_zasubs1_then_zasubd0 0, // QQQQ:zasubh1_then_zasubs1_then_zasubd1 0, // QQQQ:zasubh1_then_zasubs1_then_zasubq0 0, // QQQQ:zasubh1_then_zasubs1_then_zasubq1 0, // QQQQ:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ:dsub1_then_bsub 0, // QQQQ:dsub1_then_hsub 0, // QQQQ:dsub1_then_ssub 0, // QQQQ:dsub3_then_bsub 0, // QQQQ:dsub3_then_hsub 0, // QQQQ:dsub3_then_ssub 0, // QQQQ:dsub2_then_bsub 0, // QQQQ:dsub2_then_hsub 0, // QQQQ:dsub2_then_ssub 1, // QQQQ:qsub1_then_bsub -> FPR8 36, // QQQQ:qsub1_then_dsub -> FPR64 2, // QQQQ:qsub1_then_hsub -> FPR16 20, // QQQQ:qsub1_then_ssub -> FPR32 1, // QQQQ:qsub3_then_bsub -> FPR8 36, // QQQQ:qsub3_then_dsub -> FPR64 2, // QQQQ:qsub3_then_hsub -> FPR16 20, // QQQQ:qsub3_then_ssub -> FPR32 1, // QQQQ:qsub2_then_bsub -> FPR8 36, // QQQQ:qsub2_then_dsub -> FPR64 2, // QQQQ:qsub2_then_hsub -> FPR16 20, // QQQQ:qsub2_then_ssub -> FPR32 0, // QQQQ:x8sub_7_then_sub_32 0, // QQQQ:x8sub_6_then_sub_32 0, // QQQQ:x8sub_5_then_sub_32 0, // QQQQ:x8sub_4_then_sub_32 0, // QQQQ:x8sub_3_then_sub_32 0, // QQQQ:x8sub_2_then_sub_32 0, // QQQQ:x8sub_1_then_sub_32 0, // QQQQ:subo64_then_sub_32 0, // QQQQ:zsub1_then_bsub 0, // QQQQ:zsub1_then_dsub 0, // QQQQ:zsub1_then_hsub 0, // QQQQ:zsub1_then_ssub 0, // QQQQ:zsub1_then_zsub 0, // QQQQ:zsub1_then_zsub_hi 0, // QQQQ:zsub3_then_bsub 0, // QQQQ:zsub3_then_dsub 0, // QQQQ:zsub3_then_hsub 0, // QQQQ:zsub3_then_ssub 0, // QQQQ:zsub3_then_zsub 0, // QQQQ:zsub3_then_zsub_hi 0, // QQQQ:zsub2_then_bsub 0, // QQQQ:zsub2_then_dsub 0, // QQQQ:zsub2_then_hsub 0, // QQQQ:zsub2_then_ssub 0, // QQQQ:zsub2_then_zsub 0, // QQQQ:zsub2_then_zsub_hi 0, // QQQQ:dsub0_dsub1 0, // QQQQ:dsub0_dsub1_dsub2 0, // QQQQ:dsub1_dsub2 0, // QQQQ:dsub1_dsub2_dsub3 0, // QQQQ:dsub2_dsub3 53, // QQQQ:dsub_qsub1_then_dsub -> DD 83, // QQQQ:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDDD 76, // QQQQ:dsub_qsub1_then_dsub_qsub2_then_dsub -> DDD 94, // QQQQ:qsub0_qsub1 -> QQ 111, // QQQQ:qsub0_qsub1_qsub2 -> QQQ 94, // QQQQ:qsub1_qsub2 -> QQ 111, // QQQQ:qsub1_qsub2_qsub3 -> QQQ 94, // QQQQ:qsub2_qsub3 -> QQ 53, // QQQQ:qsub1_then_dsub_qsub2_then_dsub -> DD 76, // QQQQ:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDD 53, // QQQQ:qsub2_then_dsub_qsub3_then_dsub -> DD 0, // QQQQ:sub_32_x8sub_1_then_sub_32 0, // QQQQ:x8sub_0_x8sub_1 0, // QQQQ:x8sub_2_x8sub_3 0, // QQQQ:x8sub_4_x8sub_5 0, // QQQQ:x8sub_6_x8sub_7 0, // QQQQ:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQQQ:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQQQ:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQQQ:sub_32_subo64_then_sub_32 0, // QQQQ:dsub_zsub1_then_dsub 0, // QQQQ:zsub_zsub1_then_zsub 0, // QQQQ:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ:zsub0_zsub1 0, // QQQQ:zsub0_zsub1_zsub2 0, // QQQQ:zsub1_zsub2 0, // QQQQ:zsub1_zsub2_zsub3 0, // QQQQ:zsub2_zsub3 0, // QQQQ:zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ:zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ:zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ:zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ:zsub0_zsub2 0, // QQQQ:zsub1_zsub3 }, { // ZPR4 1, // ZPR4:bsub -> FPR8 36, // ZPR4:dsub -> FPR64 0, // ZPR4:dsub0 0, // ZPR4:dsub1 0, // ZPR4:dsub2 0, // ZPR4:dsub3 2, // ZPR4:hsub -> FPR16 0, // ZPR4:psub0 0, // ZPR4:psub1 0, // ZPR4:qsub0 0, // ZPR4:qsub1 0, // ZPR4:qsub2 0, // ZPR4:qsub3 20, // ZPR4:ssub -> FPR32 0, // ZPR4:sub_32 0, // ZPR4:sube32 0, // ZPR4:sube64 0, // ZPR4:subo32 0, // ZPR4:subo64 0, // ZPR4:x8sub_0 0, // ZPR4:x8sub_1 0, // ZPR4:x8sub_2 0, // ZPR4:x8sub_3 0, // ZPR4:x8sub_4 0, // ZPR4:x8sub_5 0, // ZPR4:x8sub_6 0, // ZPR4:x8sub_7 0, // ZPR4:zasubb 0, // ZPR4:zasubd0 0, // ZPR4:zasubd1 0, // ZPR4:zasubh0 0, // ZPR4:zasubh1 0, // ZPR4:zasubq0 0, // ZPR4:zasubq1 0, // ZPR4:zasubs0 0, // ZPR4:zasubs1 70, // ZPR4:zsub -> FPR128 71, // ZPR4:zsub0 -> ZPR 71, // ZPR4:zsub1 -> ZPR 71, // ZPR4:zsub2 -> ZPR 71, // ZPR4:zsub3 -> ZPR 0, // ZPR4:zsub_hi 0, // ZPR4:zasubd1_then_zasubq0 0, // ZPR4:zasubd1_then_zasubq1 0, // ZPR4:zasubs1_then_zasubd0 0, // ZPR4:zasubs1_then_zasubd1 0, // ZPR4:zasubs1_then_zasubq0 0, // ZPR4:zasubs1_then_zasubq1 0, // ZPR4:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4:zasubh1_then_zasubd0 0, // ZPR4:zasubh1_then_zasubd1 0, // ZPR4:zasubh1_then_zasubq0 0, // ZPR4:zasubh1_then_zasubq1 0, // ZPR4:zasubh1_then_zasubs0 0, // ZPR4:zasubh1_then_zasubs1 0, // ZPR4:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4:dsub1_then_bsub 0, // ZPR4:dsub1_then_hsub 0, // ZPR4:dsub1_then_ssub 0, // ZPR4:dsub3_then_bsub 0, // ZPR4:dsub3_then_hsub 0, // ZPR4:dsub3_then_ssub 0, // ZPR4:dsub2_then_bsub 0, // ZPR4:dsub2_then_hsub 0, // ZPR4:dsub2_then_ssub 0, // ZPR4:qsub1_then_bsub 0, // ZPR4:qsub1_then_dsub 0, // ZPR4:qsub1_then_hsub 0, // ZPR4:qsub1_then_ssub 0, // ZPR4:qsub3_then_bsub 0, // ZPR4:qsub3_then_dsub 0, // ZPR4:qsub3_then_hsub 0, // ZPR4:qsub3_then_ssub 0, // ZPR4:qsub2_then_bsub 0, // ZPR4:qsub2_then_dsub 0, // ZPR4:qsub2_then_hsub 0, // ZPR4:qsub2_then_ssub 0, // ZPR4:x8sub_7_then_sub_32 0, // ZPR4:x8sub_6_then_sub_32 0, // ZPR4:x8sub_5_then_sub_32 0, // ZPR4:x8sub_4_then_sub_32 0, // ZPR4:x8sub_3_then_sub_32 0, // ZPR4:x8sub_2_then_sub_32 0, // ZPR4:x8sub_1_then_sub_32 0, // ZPR4:subo64_then_sub_32 1, // ZPR4:zsub1_then_bsub -> FPR8 36, // ZPR4:zsub1_then_dsub -> FPR64 2, // ZPR4:zsub1_then_hsub -> FPR16 20, // ZPR4:zsub1_then_ssub -> FPR32 70, // ZPR4:zsub1_then_zsub -> FPR128 0, // ZPR4:zsub1_then_zsub_hi 1, // ZPR4:zsub3_then_bsub -> FPR8 36, // ZPR4:zsub3_then_dsub -> FPR64 2, // ZPR4:zsub3_then_hsub -> FPR16 20, // ZPR4:zsub3_then_ssub -> FPR32 70, // ZPR4:zsub3_then_zsub -> FPR128 0, // ZPR4:zsub3_then_zsub_hi 1, // ZPR4:zsub2_then_bsub -> FPR8 36, // ZPR4:zsub2_then_dsub -> FPR64 2, // ZPR4:zsub2_then_hsub -> FPR16 20, // ZPR4:zsub2_then_ssub -> FPR32 70, // ZPR4:zsub2_then_zsub -> FPR128 0, // ZPR4:zsub2_then_zsub_hi 0, // ZPR4:dsub0_dsub1 0, // ZPR4:dsub0_dsub1_dsub2 0, // ZPR4:dsub1_dsub2 0, // ZPR4:dsub1_dsub2_dsub3 0, // ZPR4:dsub2_dsub3 0, // ZPR4:dsub_qsub1_then_dsub 0, // ZPR4:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4:qsub0_qsub1 0, // ZPR4:qsub0_qsub1_qsub2 0, // ZPR4:qsub1_qsub2 0, // ZPR4:qsub1_qsub2_qsub3 0, // ZPR4:qsub2_qsub3 0, // ZPR4:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4:sub_32_x8sub_1_then_sub_32 0, // ZPR4:x8sub_0_x8sub_1 0, // ZPR4:x8sub_2_x8sub_3 0, // ZPR4:x8sub_4_x8sub_5 0, // ZPR4:x8sub_6_x8sub_7 0, // ZPR4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4:sub_32_subo64_then_sub_32 53, // ZPR4:dsub_zsub1_then_dsub -> DD 94, // ZPR4:zsub_zsub1_then_zsub -> QQ 83, // ZPR4:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD 76, // ZPR4:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD 145, // ZPR4:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ 111, // ZPR4:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ 95, // ZPR4:zsub0_zsub1 -> ZPR2 112, // ZPR4:zsub0_zsub1_zsub2 -> ZPR3 95, // ZPR4:zsub1_zsub2 -> ZPR2 112, // ZPR4:zsub1_zsub2_zsub3 -> ZPR3 95, // ZPR4:zsub2_zsub3 -> ZPR2 53, // ZPR4:zsub1_then_dsub_zsub2_then_dsub -> DD 76, // ZPR4:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD 94, // ZPR4:zsub1_then_zsub_zsub2_then_zsub -> QQ 111, // ZPR4:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ 53, // ZPR4:zsub2_then_dsub_zsub3_then_dsub -> DD 94, // ZPR4:zsub2_then_zsub_zsub3_then_zsub -> QQ 0, // ZPR4:zsub0_zsub2 0, // ZPR4:zsub1_zsub3 }, { // QQQQ_with_dsub_in_FPR64_lo 1, // QQQQ_with_dsub_in_FPR64_lo:bsub -> FPR8 44, // QQQQ_with_dsub_in_FPR64_lo:dsub -> FPR64_lo 0, // QQQQ_with_dsub_in_FPR64_lo:dsub0 0, // QQQQ_with_dsub_in_FPR64_lo:dsub1 0, // QQQQ_with_dsub_in_FPR64_lo:dsub2 0, // QQQQ_with_dsub_in_FPR64_lo:dsub3 3, // QQQQ_with_dsub_in_FPR64_lo:hsub -> FPR16_lo 0, // QQQQ_with_dsub_in_FPR64_lo:psub0 0, // QQQQ_with_dsub_in_FPR64_lo:psub1 72, // QQQQ_with_dsub_in_FPR64_lo:qsub0 -> FPR128_lo 70, // QQQQ_with_dsub_in_FPR64_lo:qsub1 -> FPR128 70, // QQQQ_with_dsub_in_FPR64_lo:qsub2 -> FPR128 70, // QQQQ_with_dsub_in_FPR64_lo:qsub3 -> FPR128 24, // QQQQ_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQQ_with_dsub_in_FPR64_lo:sub_32 0, // QQQQ_with_dsub_in_FPR64_lo:sube32 0, // QQQQ_with_dsub_in_FPR64_lo:sube64 0, // QQQQ_with_dsub_in_FPR64_lo:subo32 0, // QQQQ_with_dsub_in_FPR64_lo:subo64 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_0 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_1 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_2 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_3 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_4 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_5 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_6 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_7 0, // QQQQ_with_dsub_in_FPR64_lo:zasubb 0, // QQQQ_with_dsub_in_FPR64_lo:zasubd0 0, // QQQQ_with_dsub_in_FPR64_lo:zasubd1 0, // QQQQ_with_dsub_in_FPR64_lo:zasubh0 0, // QQQQ_with_dsub_in_FPR64_lo:zasubh1 0, // QQQQ_with_dsub_in_FPR64_lo:zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo:zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo:zasubs0 0, // QQQQ_with_dsub_in_FPR64_lo:zasubs1 0, // QQQQ_with_dsub_in_FPR64_lo:zsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub0 0, // QQQQ_with_dsub_in_FPR64_lo:zsub1 0, // QQQQ_with_dsub_in_FPR64_lo:zsub2 0, // QQQQ_with_dsub_in_FPR64_lo:zsub3 0, // QQQQ_with_dsub_in_FPR64_lo:zsub_hi 0, // QQQQ_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // QQQQ_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // QQQQ_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // QQQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // QQQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // QQQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // QQQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // QQQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // QQQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo:dsub2_then_ssub 1, // QQQQ_with_dsub_in_FPR64_lo:qsub1_then_bsub -> FPR8 36, // QQQQ_with_dsub_in_FPR64_lo:qsub1_then_dsub -> FPR64 2, // QQQQ_with_dsub_in_FPR64_lo:qsub1_then_hsub -> FPR16 20, // QQQQ_with_dsub_in_FPR64_lo:qsub1_then_ssub -> FPR32 1, // QQQQ_with_dsub_in_FPR64_lo:qsub3_then_bsub -> FPR8 36, // QQQQ_with_dsub_in_FPR64_lo:qsub3_then_dsub -> FPR64 2, // QQQQ_with_dsub_in_FPR64_lo:qsub3_then_hsub -> FPR16 20, // QQQQ_with_dsub_in_FPR64_lo:qsub3_then_ssub -> FPR32 1, // QQQQ_with_dsub_in_FPR64_lo:qsub2_then_bsub -> FPR8 36, // QQQQ_with_dsub_in_FPR64_lo:qsub2_then_dsub -> FPR64 2, // QQQQ_with_dsub_in_FPR64_lo:qsub2_then_hsub -> FPR16 20, // QQQQ_with_dsub_in_FPR64_lo:qsub2_then_ssub -> FPR32 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo:subo64_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo:zsub1_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub1_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub1_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub1_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub1_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 0, // QQQQ_with_dsub_in_FPR64_lo:zsub3_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub3_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub3_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub3_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub3_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 0, // QQQQ_with_dsub_in_FPR64_lo:zsub2_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub2_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub2_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub2_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub2_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // QQQQ_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // QQQQ_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // QQQQ_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // QQQQ_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // QQQQ_with_dsub_in_FPR64_lo:dsub2_dsub3 54, // QQQQ_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo 84, // QQQQ_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo 77, // QQQQ_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo 96, // QQQQ_with_dsub_in_FPR64_lo:qsub0_qsub1 -> QQ_with_dsub_in_FPR64_lo 113, // QQQQ_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 -> QQQ_with_dsub_in_FPR64_lo 94, // QQQQ_with_dsub_in_FPR64_lo:qsub1_qsub2 -> QQ 111, // QQQQ_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 -> QQQ 94, // QQQQ_with_dsub_in_FPR64_lo:qsub2_qsub3 -> QQ 53, // QQQQ_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub -> DD 76, // QQQQ_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDD 53, // QQQQ_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub -> DD 0, // QQQQ_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub0_zsub1 0, // QQQQ_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 0, // QQQQ_with_dsub_in_FPR64_lo:zsub1_zsub2 0, // QQQQ_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 0, // QQQQ_with_dsub_in_FPR64_lo:zsub2_zsub3 0, // QQQQ_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo:zsub0_zsub2 0, // QQQQ_with_dsub_in_FPR64_lo:zsub1_zsub3 }, { // QQQQ_with_qsub1_in_FPR128_lo 1, // QQQQ_with_qsub1_in_FPR128_lo:bsub -> FPR8 36, // QQQQ_with_qsub1_in_FPR128_lo:dsub -> FPR64 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub0 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub1 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub2 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub3 2, // QQQQ_with_qsub1_in_FPR128_lo:hsub -> FPR16 0, // QQQQ_with_qsub1_in_FPR128_lo:psub0 0, // QQQQ_with_qsub1_in_FPR128_lo:psub1 70, // QQQQ_with_qsub1_in_FPR128_lo:qsub0 -> FPR128 72, // QQQQ_with_qsub1_in_FPR128_lo:qsub1 -> FPR128_lo 70, // QQQQ_with_qsub1_in_FPR128_lo:qsub2 -> FPR128 70, // QQQQ_with_qsub1_in_FPR128_lo:qsub3 -> FPR128 20, // QQQQ_with_qsub1_in_FPR128_lo:ssub -> FPR32 0, // QQQQ_with_qsub1_in_FPR128_lo:sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo:sube32 0, // QQQQ_with_qsub1_in_FPR128_lo:sube64 0, // QQQQ_with_qsub1_in_FPR128_lo:subo32 0, // QQQQ_with_qsub1_in_FPR128_lo:subo64 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_0 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_1 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_2 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_3 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_4 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_5 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_6 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_7 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubb 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubd0 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubd1 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubh0 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubh1 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubs0 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubs1 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub0 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub1 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub2 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub3 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub_hi 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubd1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubd1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd0 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd1 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd0 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd1 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs0 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub1_then_bsub 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub1_then_hsub 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub1_then_ssub 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub3_then_bsub 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub3_then_hsub 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub3_then_ssub 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub2_then_bsub 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub2_then_hsub 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub2_then_ssub 1, // QQQQ_with_qsub1_in_FPR128_lo:qsub1_then_bsub -> FPR8 44, // QQQQ_with_qsub1_in_FPR128_lo:qsub1_then_dsub -> FPR64_lo 3, // QQQQ_with_qsub1_in_FPR128_lo:qsub1_then_hsub -> FPR16_lo 24, // QQQQ_with_qsub1_in_FPR128_lo:qsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // QQQQ_with_qsub1_in_FPR128_lo:qsub3_then_bsub -> FPR8 36, // QQQQ_with_qsub1_in_FPR128_lo:qsub3_then_dsub -> FPR64 2, // QQQQ_with_qsub1_in_FPR128_lo:qsub3_then_hsub -> FPR16 20, // QQQQ_with_qsub1_in_FPR128_lo:qsub3_then_ssub -> FPR32 1, // QQQQ_with_qsub1_in_FPR128_lo:qsub2_then_bsub -> FPR8 36, // QQQQ_with_qsub1_in_FPR128_lo:qsub2_then_dsub -> FPR64 2, // QQQQ_with_qsub1_in_FPR128_lo:qsub2_then_hsub -> FPR16 20, // QQQQ_with_qsub1_in_FPR128_lo:qsub2_then_ssub -> FPR32 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_7_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_6_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_5_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_4_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_3_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_2_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_1_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo:subo64_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_bsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_hsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_ssub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub_hi 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub3_then_bsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub3_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub3_then_hsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub3_then_ssub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub3_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub3_then_zsub_hi 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub2_then_bsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub2_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub2_then_hsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub2_then_ssub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub2_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub2_then_zsub_hi 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub0_dsub1 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub0_dsub1_dsub2 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub1_dsub2 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub1_dsub2_dsub3 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub2_dsub3 55, // QQQQ_with_qsub1_in_FPR128_lo:dsub_qsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 85, // QQQQ_with_qsub1_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDDD_with_dsub1_in_FPR64_lo 78, // QQQQ_with_qsub1_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo 97, // QQQQ_with_qsub1_in_FPR128_lo:qsub0_qsub1 -> QQ_with_qsub1_in_FPR128_lo 114, // QQQQ_with_qsub1_in_FPR128_lo:qsub0_qsub1_qsub2 -> QQQ_with_qsub1_in_FPR128_lo 96, // QQQQ_with_qsub1_in_FPR128_lo:qsub1_qsub2 -> QQ_with_dsub_in_FPR64_lo 113, // QQQQ_with_qsub1_in_FPR128_lo:qsub1_qsub2_qsub3 -> QQQ_with_dsub_in_FPR64_lo 94, // QQQQ_with_qsub1_in_FPR128_lo:qsub2_qsub3 -> QQ 54, // QQQQ_with_qsub1_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo 77, // QQQQ_with_qsub1_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo 53, // QQQQ_with_qsub1_in_FPR128_lo:qsub2_then_dsub_qsub3_then_dsub -> DD 0, // QQQQ_with_qsub1_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_0_x8sub_1 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_2_x8sub_3 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_4_x8sub_5 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_6_x8sub_7 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo:sub_32_subo64_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub_zsub1_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub_zsub1_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub0_zsub1 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub0_zsub1_zsub2 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub1_zsub2 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub1_zsub2_zsub3 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub2_zsub3 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub0_zsub2 0, // QQQQ_with_qsub1_in_FPR128_lo:zsub1_zsub3 }, { // QQQQ_with_qsub2_in_FPR128_lo 1, // QQQQ_with_qsub2_in_FPR128_lo:bsub -> FPR8 36, // QQQQ_with_qsub2_in_FPR128_lo:dsub -> FPR64 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub0 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub1 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub2 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub3 2, // QQQQ_with_qsub2_in_FPR128_lo:hsub -> FPR16 0, // QQQQ_with_qsub2_in_FPR128_lo:psub0 0, // QQQQ_with_qsub2_in_FPR128_lo:psub1 70, // QQQQ_with_qsub2_in_FPR128_lo:qsub0 -> FPR128 70, // QQQQ_with_qsub2_in_FPR128_lo:qsub1 -> FPR128 72, // QQQQ_with_qsub2_in_FPR128_lo:qsub2 -> FPR128_lo 70, // QQQQ_with_qsub2_in_FPR128_lo:qsub3 -> FPR128 20, // QQQQ_with_qsub2_in_FPR128_lo:ssub -> FPR32 0, // QQQQ_with_qsub2_in_FPR128_lo:sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo:sube32 0, // QQQQ_with_qsub2_in_FPR128_lo:sube64 0, // QQQQ_with_qsub2_in_FPR128_lo:subo32 0, // QQQQ_with_qsub2_in_FPR128_lo:subo64 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_0 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_1 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_2 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_3 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_4 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_5 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_6 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_7 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubb 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubd0 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubd1 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubh0 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubh1 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubq0 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubq1 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubs0 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubs1 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub0 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub1 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub2 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub3 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub_hi 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubd1_then_zasubq0 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubd1_then_zasubq1 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd0 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd1 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubq0 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubq1 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd0 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd1 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubq0 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubq1 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs0 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub1_then_bsub 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub1_then_hsub 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub1_then_ssub 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub3_then_bsub 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub3_then_hsub 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub3_then_ssub 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub2_then_bsub 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub2_then_hsub 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub2_then_ssub 1, // QQQQ_with_qsub2_in_FPR128_lo:qsub1_then_bsub -> FPR8 36, // QQQQ_with_qsub2_in_FPR128_lo:qsub1_then_dsub -> FPR64 2, // QQQQ_with_qsub2_in_FPR128_lo:qsub1_then_hsub -> FPR16 20, // QQQQ_with_qsub2_in_FPR128_lo:qsub1_then_ssub -> FPR32 1, // QQQQ_with_qsub2_in_FPR128_lo:qsub3_then_bsub -> FPR8 36, // QQQQ_with_qsub2_in_FPR128_lo:qsub3_then_dsub -> FPR64 2, // QQQQ_with_qsub2_in_FPR128_lo:qsub3_then_hsub -> FPR16 20, // QQQQ_with_qsub2_in_FPR128_lo:qsub3_then_ssub -> FPR32 1, // QQQQ_with_qsub2_in_FPR128_lo:qsub2_then_bsub -> FPR8 44, // QQQQ_with_qsub2_in_FPR128_lo:qsub2_then_dsub -> FPR64_lo 3, // QQQQ_with_qsub2_in_FPR128_lo:qsub2_then_hsub -> FPR16_lo 24, // QQQQ_with_qsub2_in_FPR128_lo:qsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_7_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_6_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_5_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_4_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_3_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_2_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_1_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo:subo64_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_bsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_dsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_hsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_ssub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub_hi 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub3_then_bsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub3_then_dsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub3_then_hsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub3_then_ssub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub3_then_zsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub3_then_zsub_hi 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_bsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_dsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_hsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_ssub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_zsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_zsub_hi 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub0_dsub1 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub0_dsub1_dsub2 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub1_dsub2 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub1_dsub2_dsub3 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub2_dsub3 53, // QQQQ_with_qsub2_in_FPR128_lo:dsub_qsub1_then_dsub -> DD 86, // QQQQ_with_qsub2_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDDD_with_dsub2_in_FPR64_lo 79, // QQQQ_with_qsub2_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub -> DDD_with_dsub2_in_FPR64_lo 94, // QQQQ_with_qsub2_in_FPR128_lo:qsub0_qsub1 -> QQ 115, // QQQQ_with_qsub2_in_FPR128_lo:qsub0_qsub1_qsub2 -> QQQ_with_qsub2_in_FPR128_lo 97, // QQQQ_with_qsub2_in_FPR128_lo:qsub1_qsub2 -> QQ_with_qsub1_in_FPR128_lo 114, // QQQQ_with_qsub2_in_FPR128_lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub1_in_FPR128_lo 96, // QQQQ_with_qsub2_in_FPR128_lo:qsub2_qsub3 -> QQ_with_dsub_in_FPR64_lo 55, // QQQQ_with_qsub2_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub -> DD_with_dsub1_in_FPR64_lo 78, // QQQQ_with_qsub2_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDD_with_dsub1_in_FPR64_lo 54, // QQQQ_with_qsub2_in_FPR128_lo:qsub2_then_dsub_qsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo 0, // QQQQ_with_qsub2_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_0_x8sub_1 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_2_x8sub_3 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_4_x8sub_5 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_6_x8sub_7 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo:sub_32_subo64_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub_zsub1_then_dsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub_zsub1_then_zsub 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_qsub2_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub0_zsub1 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub0_zsub1_zsub2 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub1_zsub2 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub1_zsub2_zsub3 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub2_zsub3 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub0_zsub2 0, // QQQQ_with_qsub2_in_FPR128_lo:zsub1_zsub3 }, { // QQQQ_with_qsub3_in_FPR128_lo 1, // QQQQ_with_qsub3_in_FPR128_lo:bsub -> FPR8 36, // QQQQ_with_qsub3_in_FPR128_lo:dsub -> FPR64 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub0 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub1 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub2 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub3 2, // QQQQ_with_qsub3_in_FPR128_lo:hsub -> FPR16 0, // QQQQ_with_qsub3_in_FPR128_lo:psub0 0, // QQQQ_with_qsub3_in_FPR128_lo:psub1 70, // QQQQ_with_qsub3_in_FPR128_lo:qsub0 -> FPR128 70, // QQQQ_with_qsub3_in_FPR128_lo:qsub1 -> FPR128 70, // QQQQ_with_qsub3_in_FPR128_lo:qsub2 -> FPR128 72, // QQQQ_with_qsub3_in_FPR128_lo:qsub3 -> FPR128_lo 20, // QQQQ_with_qsub3_in_FPR128_lo:ssub -> FPR32 0, // QQQQ_with_qsub3_in_FPR128_lo:sub_32 0, // QQQQ_with_qsub3_in_FPR128_lo:sube32 0, // QQQQ_with_qsub3_in_FPR128_lo:sube64 0, // QQQQ_with_qsub3_in_FPR128_lo:subo32 0, // QQQQ_with_qsub3_in_FPR128_lo:subo64 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_0 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_1 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_2 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_3 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_4 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_5 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_6 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_7 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubb 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubd0 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubd1 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubh0 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubh1 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubq0 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubq1 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubs0 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubs1 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub0 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub1 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub2 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub3 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub_hi 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubd1_then_zasubq0 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubd1_then_zasubq1 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubd0 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubd1 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubq0 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubq1 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubd0 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubd1 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubq0 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubq1 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs0 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub1_then_bsub 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub1_then_hsub 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub1_then_ssub 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub3_then_bsub 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub3_then_hsub 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub3_then_ssub 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub2_then_bsub 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub2_then_hsub 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub2_then_ssub 1, // QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_bsub -> FPR8 36, // QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_dsub -> FPR64 2, // QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_hsub -> FPR16 20, // QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_ssub -> FPR32 1, // QQQQ_with_qsub3_in_FPR128_lo:qsub3_then_bsub -> FPR8 44, // QQQQ_with_qsub3_in_FPR128_lo:qsub3_then_dsub -> FPR64_lo 3, // QQQQ_with_qsub3_in_FPR128_lo:qsub3_then_hsub -> FPR16_lo 24, // QQQQ_with_qsub3_in_FPR128_lo:qsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_bsub -> FPR8 36, // QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_dsub -> FPR64 2, // QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_hsub -> FPR16 20, // QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_ssub -> FPR32 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_7_then_sub_32 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_6_then_sub_32 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_5_then_sub_32 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_4_then_sub_32 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_3_then_sub_32 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_2_then_sub_32 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_1_then_sub_32 0, // QQQQ_with_qsub3_in_FPR128_lo:subo64_then_sub_32 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_bsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_dsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_hsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_ssub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_zsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_zsub_hi 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_bsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_dsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_hsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_ssub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_zsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_zsub_hi 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_bsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_dsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_hsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_ssub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_zsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_zsub_hi 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub0_dsub1 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub0_dsub1_dsub2 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub1_dsub2 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub1_dsub2_dsub3 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub2_dsub3 53, // QQQQ_with_qsub3_in_FPR128_lo:dsub_qsub1_then_dsub -> DD 87, // QQQQ_with_qsub3_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDDD_with_dsub3_in_FPR64_lo 76, // QQQQ_with_qsub3_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub -> DDD 94, // QQQQ_with_qsub3_in_FPR128_lo:qsub0_qsub1 -> QQ 111, // QQQQ_with_qsub3_in_FPR128_lo:qsub0_qsub1_qsub2 -> QQQ 94, // QQQQ_with_qsub3_in_FPR128_lo:qsub1_qsub2 -> QQ 115, // QQQQ_with_qsub3_in_FPR128_lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub2_in_FPR128_lo 97, // QQQQ_with_qsub3_in_FPR128_lo:qsub2_qsub3 -> QQ_with_qsub1_in_FPR128_lo 53, // QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub -> DD 79, // QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDD_with_dsub2_in_FPR64_lo 55, // QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_dsub_qsub3_then_dsub -> DD_with_dsub1_in_FPR64_lo 0, // QQQQ_with_qsub3_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_0_x8sub_1 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_2_x8sub_3 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_4_x8sub_5 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_6_x8sub_7 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQQQ_with_qsub3_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQQQ_with_qsub3_in_FPR128_lo:sub_32_subo64_then_sub_32 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub_zsub1_then_dsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub_zsub1_then_zsub 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_qsub3_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub0_zsub1 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub0_zsub1_zsub2 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub1_zsub2 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub1_zsub2_zsub3 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub2_zsub3 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub0_zsub2 0, // QQQQ_with_qsub3_in_FPR128_lo:zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo 1, // ZPR4_with_dsub_in_FPR64_lo:bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo:dsub -> FPR64_lo 0, // ZPR4_with_dsub_in_FPR64_lo:dsub0 0, // ZPR4_with_dsub_in_FPR64_lo:dsub1 0, // ZPR4_with_dsub_in_FPR64_lo:dsub2 0, // ZPR4_with_dsub_in_FPR64_lo:dsub3 3, // ZPR4_with_dsub_in_FPR64_lo:hsub -> FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo:psub0 0, // ZPR4_with_dsub_in_FPR64_lo:psub1 0, // ZPR4_with_dsub_in_FPR64_lo:qsub0 0, // ZPR4_with_dsub_in_FPR64_lo:qsub1 0, // ZPR4_with_dsub_in_FPR64_lo:qsub2 0, // ZPR4_with_dsub_in_FPR64_lo:qsub3 24, // ZPR4_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo:sub_32 0, // ZPR4_with_dsub_in_FPR64_lo:sube32 0, // ZPR4_with_dsub_in_FPR64_lo:sube64 0, // ZPR4_with_dsub_in_FPR64_lo:subo32 0, // ZPR4_with_dsub_in_FPR64_lo:subo64 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_0 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_2 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_4 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_6 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo:zasubb 0, // ZPR4_with_dsub_in_FPR64_lo:zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo:zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo:zasubh0 0, // ZPR4_with_dsub_in_FPR64_lo:zasubh1 0, // ZPR4_with_dsub_in_FPR64_lo:zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo:zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo:zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo:zasubs1 72, // ZPR4_with_dsub_in_FPR64_lo:zsub -> FPR128_lo 74, // ZPR4_with_dsub_in_FPR64_lo:zsub0 -> ZPR_4b 71, // ZPR4_with_dsub_in_FPR64_lo:zsub1 -> ZPR 71, // ZPR4_with_dsub_in_FPR64_lo:zsub2 -> ZPR 71, // ZPR4_with_dsub_in_FPR64_lo:zsub3 -> ZPR 0, // ZPR4_with_dsub_in_FPR64_lo:zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo:dsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo:qsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo:qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo:qsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo:qsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo:qsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo:qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo:qsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo:qsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo:qsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo:qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo:qsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo:qsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo:subo64_then_sub_32 1, // ZPR4_with_dsub_in_FPR64_lo:zsub1_then_bsub -> FPR8 36, // ZPR4_with_dsub_in_FPR64_lo:zsub1_then_dsub -> FPR64 2, // ZPR4_with_dsub_in_FPR64_lo:zsub1_then_hsub -> FPR16 20, // ZPR4_with_dsub_in_FPR64_lo:zsub1_then_ssub -> FPR32 70, // ZPR4_with_dsub_in_FPR64_lo:zsub1_then_zsub -> FPR128 0, // ZPR4_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo:zsub3_then_bsub -> FPR8 36, // ZPR4_with_dsub_in_FPR64_lo:zsub3_then_dsub -> FPR64 2, // ZPR4_with_dsub_in_FPR64_lo:zsub3_then_hsub -> FPR16 20, // ZPR4_with_dsub_in_FPR64_lo:zsub3_then_ssub -> FPR32 70, // ZPR4_with_dsub_in_FPR64_lo:zsub3_then_zsub -> FPR128 0, // ZPR4_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo:zsub2_then_bsub -> FPR8 36, // ZPR4_with_dsub_in_FPR64_lo:zsub2_then_dsub -> FPR64 2, // ZPR4_with_dsub_in_FPR64_lo:zsub2_then_hsub -> FPR16 20, // ZPR4_with_dsub_in_FPR64_lo:zsub2_then_ssub -> FPR32 70, // ZPR4_with_dsub_in_FPR64_lo:zsub2_then_zsub -> FPR128 0, // ZPR4_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // ZPR4_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo:dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo:qsub0_qsub1 0, // ZPR4_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo:qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo:qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 54, // ZPR4_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo 96, // ZPR4_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo 84, // ZPR4_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo 77, // ZPR4_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo 147, // ZPR4_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo 113, // ZPR4_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo 99, // ZPR4_with_dsub_in_FPR64_lo:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo 116, // ZPR4_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo 95, // ZPR4_with_dsub_in_FPR64_lo:zsub1_zsub2 -> ZPR2 112, // ZPR4_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 -> ZPR3 95, // ZPR4_with_dsub_in_FPR64_lo:zsub2_zsub3 -> ZPR2 53, // ZPR4_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub -> DD 76, // ZPR4_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD 94, // ZPR4_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub -> QQ 111, // ZPR4_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ 53, // ZPR4_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub -> DD 94, // ZPR4_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub -> QQ 0, // ZPR4_with_dsub_in_FPR64_lo:zsub0_zsub2 0, // ZPR4_with_dsub_in_FPR64_lo:zsub1_zsub3 }, { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 1, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:bsub -> FPR8 36, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub -> FPR64 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub3 2, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:hsub -> FPR16 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:psub0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:psub1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub3 20, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:ssub -> FPR32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:sube32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:sube64 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:subo32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:subo64 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubb 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubd0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubs0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1 70, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub -> FPR128 71, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub0 -> ZPR 71, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub1 -> ZPR 71, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub2 -> ZPR 71, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub3 -> ZPR 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub_hi 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_bsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_hsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_ssub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_bsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_hsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_ssub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_bsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_hsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_ssub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_bsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_hsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_ssub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_bsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_hsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_ssub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_bsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_hsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_ssub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:subo64_then_sub_32 1, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_bsub -> FPR8 36, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub -> FPR64 2, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_hsub -> FPR16 20, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_ssub -> FPR32 70, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub -> FPR128 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_hi 1, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_bsub -> FPR8 36, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_dsub -> FPR64 2, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_hsub -> FPR16 20, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_ssub -> FPR32 70, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_zsub -> FPR128 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_zsub_hi 1, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_bsub -> FPR8 36, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_dsub -> FPR64 2, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_hsub -> FPR16 20, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_ssub -> FPR32 70, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub -> FPR128 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub_hi 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_dsub3 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_qsub3 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0_x8sub_1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_x8sub_3 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_x8sub_5 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_x8sub_7 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_subo64_then_sub_32 53, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub -> DD 94, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub -> QQ 83, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD 76, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD 145, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ 111, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ 98, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1 -> ZPR2Mul2 117, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 95, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2 -> ZPR2 119, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 98, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_zsub3 -> ZPR2Mul2 53, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub -> DD 76, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD 94, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub -> QQ 111, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ 53, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_dsub_zsub3_then_dsub -> DD 94, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub_zsub3_then_zsub -> QQ 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub3 }, { // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 1, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:bsub -> FPR8 36, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub -> FPR64 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3 2, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:hsub -> FPR16 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:psub0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:psub1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3 20, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:ssub -> FPR32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sube32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sube64 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo64 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_3 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_5 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_7 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubb 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1 70, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub -> FPR128 71, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0 -> ZPR 71, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1 -> ZPR 71, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2 -> ZPR 71, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3 -> ZPR 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_hi 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_bsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_hsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_ssub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_bsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_hsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_ssub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_bsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_hsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_ssub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_bsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_hsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_ssub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_bsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_hsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_ssub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_bsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_hsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_ssub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_7_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_5_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_3_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_1_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo64_then_sub_32 1, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_bsub -> FPR8 36, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub -> FPR64 2, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_hsub -> FPR16 20, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_ssub -> FPR32 70, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub -> FPR128 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_hi 1, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_bsub -> FPR8 36, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_dsub -> FPR64 2, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_hsub -> FPR16 20, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_ssub -> FPR32 70, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_zsub -> FPR128 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_zsub_hi 1, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_bsub -> FPR8 36, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_dsub -> FPR64 2, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_hsub -> FPR16 20, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_ssub -> FPR32 70, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub -> FPR128 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub_hi 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0_dsub1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_dsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_dsub3 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0_qsub1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_qsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_qsub3 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_0_x8sub_1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_x8sub_3 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_x8sub_5 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_x8sub_7 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32_subo64_then_sub_32 53, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub -> DD 94, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub -> QQ 83, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD 76, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD 145, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ 111, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ 95, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub1 -> ZPR2 119, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 98, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub2 -> ZPR2Mul2 117, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 95, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_zsub3 -> ZPR2 53, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub -> DD 76, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD 94, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub -> QQ 111, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ 53, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_dsub_zsub3_then_dsub -> DD 94, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub_zsub3_then_zsub -> QQ 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub3 }, { // ZPR4_with_zsub1_in_ZPR_4b 1, // ZPR4_with_zsub1_in_ZPR_4b:bsub -> FPR8 36, // ZPR4_with_zsub1_in_ZPR_4b:dsub -> FPR64 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub0 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub1 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub2 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub3 2, // ZPR4_with_zsub1_in_ZPR_4b:hsub -> FPR16 0, // ZPR4_with_zsub1_in_ZPR_4b:psub0 0, // ZPR4_with_zsub1_in_ZPR_4b:psub1 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub0 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub1 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub2 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub3 20, // ZPR4_with_zsub1_in_ZPR_4b:ssub -> FPR32 0, // ZPR4_with_zsub1_in_ZPR_4b:sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b:sube32 0, // ZPR4_with_zsub1_in_ZPR_4b:sube64 0, // ZPR4_with_zsub1_in_ZPR_4b:subo32 0, // ZPR4_with_zsub1_in_ZPR_4b:subo64 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_0 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_1 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_2 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_3 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_4 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_5 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_6 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_7 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubb 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubd0 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubd1 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubh0 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubh1 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubs0 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubs1 70, // ZPR4_with_zsub1_in_ZPR_4b:zsub -> FPR128 71, // ZPR4_with_zsub1_in_ZPR_4b:zsub0 -> ZPR 74, // ZPR4_with_zsub1_in_ZPR_4b:zsub1 -> ZPR_4b 71, // ZPR4_with_zsub1_in_ZPR_4b:zsub2 -> ZPR 71, // ZPR4_with_zsub1_in_ZPR_4b:zsub3 -> ZPR 0, // ZPR4_with_zsub1_in_ZPR_4b:zsub_hi 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs0 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub1_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub1_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub1_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub3_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub3_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub3_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub2_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub2_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub2_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub1_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub1_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub1_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub1_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub3_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub3_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub3_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub2_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub2_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub2_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_6_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_4_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_2_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b:subo64_then_sub_32 1, // ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_zsub_hi 1, // ZPR4_with_zsub1_in_ZPR_4b:zsub3_then_bsub -> FPR8 36, // ZPR4_with_zsub1_in_ZPR_4b:zsub3_then_dsub -> FPR64 2, // ZPR4_with_zsub1_in_ZPR_4b:zsub3_then_hsub -> FPR16 20, // ZPR4_with_zsub1_in_ZPR_4b:zsub3_then_ssub -> FPR32 70, // ZPR4_with_zsub1_in_ZPR_4b:zsub3_then_zsub -> FPR128 0, // ZPR4_with_zsub1_in_ZPR_4b:zsub3_then_zsub_hi 1, // ZPR4_with_zsub1_in_ZPR_4b:zsub2_then_bsub -> FPR8 36, // ZPR4_with_zsub1_in_ZPR_4b:zsub2_then_dsub -> FPR64 2, // ZPR4_with_zsub1_in_ZPR_4b:zsub2_then_hsub -> FPR16 20, // ZPR4_with_zsub1_in_ZPR_4b:zsub2_then_ssub -> FPR32 70, // ZPR4_with_zsub1_in_ZPR_4b:zsub2_then_zsub -> FPR128 0, // ZPR4_with_zsub1_in_ZPR_4b:zsub2_then_zsub_hi 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub0_dsub1 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub1_dsub2 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub2_dsub3 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub0_qsub1 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub1_qsub2 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub2_qsub3 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_0_x8sub_1 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_2_x8sub_3 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_4_x8sub_5 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_6_x8sub_7 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b:sub_32_subo64_then_sub_32 55, // ZPR4_with_zsub1_in_ZPR_4b:dsub_zsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR4_with_zsub1_in_ZPR_4b:zsub_zsub1_then_zsub -> QQ_with_qsub1_in_FPR128_lo 85, // ZPR4_with_zsub1_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub1_in_FPR64_lo 78, // ZPR4_with_zsub1_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo 148, // ZPR4_with_zsub1_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub1_in_FPR128_lo 114, // ZPR4_with_zsub1_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub1_in_FPR128_lo 100, // ZPR4_with_zsub1_in_ZPR_4b:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_4b 118, // ZPR4_with_zsub1_in_ZPR_4b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPR_4b 99, // ZPR4_with_zsub1_in_ZPR_4b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo 116, // ZPR4_with_zsub1_in_ZPR_4b:zsub1_zsub2_zsub3 -> ZPR3_with_dsub_in_FPR64_lo 95, // ZPR4_with_zsub1_in_ZPR_4b:zsub2_zsub3 -> ZPR2 54, // ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo 77, // ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo 96, // ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo 113, // ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo 53, // ZPR4_with_zsub1_in_ZPR_4b:zsub2_then_dsub_zsub3_then_dsub -> DD 94, // ZPR4_with_zsub1_in_ZPR_4b:zsub2_then_zsub_zsub3_then_zsub -> QQ 0, // ZPR4_with_zsub1_in_ZPR_4b:zsub0_zsub2 0, // ZPR4_with_zsub1_in_ZPR_4b:zsub1_zsub3 }, { // ZPR4_with_zsub2_in_ZPR_4b 1, // ZPR4_with_zsub2_in_ZPR_4b:bsub -> FPR8 36, // ZPR4_with_zsub2_in_ZPR_4b:dsub -> FPR64 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub0 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub1 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub2 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub3 2, // ZPR4_with_zsub2_in_ZPR_4b:hsub -> FPR16 0, // ZPR4_with_zsub2_in_ZPR_4b:psub0 0, // ZPR4_with_zsub2_in_ZPR_4b:psub1 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub0 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub1 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub2 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub3 20, // ZPR4_with_zsub2_in_ZPR_4b:ssub -> FPR32 0, // ZPR4_with_zsub2_in_ZPR_4b:sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b:sube32 0, // ZPR4_with_zsub2_in_ZPR_4b:sube64 0, // ZPR4_with_zsub2_in_ZPR_4b:subo32 0, // ZPR4_with_zsub2_in_ZPR_4b:subo64 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_0 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_1 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_2 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_3 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_4 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_5 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_6 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_7 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubb 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubd0 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubd1 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubh0 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubh1 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubq0 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubq1 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubs0 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubs1 70, // ZPR4_with_zsub2_in_ZPR_4b:zsub -> FPR128 71, // ZPR4_with_zsub2_in_ZPR_4b:zsub0 -> ZPR 71, // ZPR4_with_zsub2_in_ZPR_4b:zsub1 -> ZPR 74, // ZPR4_with_zsub2_in_ZPR_4b:zsub2 -> ZPR_4b 71, // ZPR4_with_zsub2_in_ZPR_4b:zsub3 -> ZPR 0, // ZPR4_with_zsub2_in_ZPR_4b:zsub_hi 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubd1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubd1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd0 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd1 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubs1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubs1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd0 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd1 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs0 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub1_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub1_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub1_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub3_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub3_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub3_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub2_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub2_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub2_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub1_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub1_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub1_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub1_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub3_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub3_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub3_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub3_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub2_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub2_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub2_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub2_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_7_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_6_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_5_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_4_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_3_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_2_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_1_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b:subo64_then_sub_32 1, // ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_bsub -> FPR8 36, // ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_dsub -> FPR64 2, // ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_hsub -> FPR16 20, // ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_ssub -> FPR32 70, // ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_zsub -> FPR128 0, // ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_zsub_hi 1, // ZPR4_with_zsub2_in_ZPR_4b:zsub3_then_bsub -> FPR8 36, // ZPR4_with_zsub2_in_ZPR_4b:zsub3_then_dsub -> FPR64 2, // ZPR4_with_zsub2_in_ZPR_4b:zsub3_then_hsub -> FPR16 20, // ZPR4_with_zsub2_in_ZPR_4b:zsub3_then_ssub -> FPR32 70, // ZPR4_with_zsub2_in_ZPR_4b:zsub3_then_zsub -> FPR128 0, // ZPR4_with_zsub2_in_ZPR_4b:zsub3_then_zsub_hi 1, // ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_zsub_hi 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub0_dsub1 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub1_dsub2 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub2_dsub3 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub0_qsub1 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub1_qsub2 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub2_qsub3 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_4b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_4b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_0_x8sub_1 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_2_x8sub_3 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_4_x8sub_5 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_6_x8sub_7 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b:sub_32_subo64_then_sub_32 53, // ZPR4_with_zsub2_in_ZPR_4b:dsub_zsub1_then_dsub -> DD 94, // ZPR4_with_zsub2_in_ZPR_4b:zsub_zsub1_then_zsub -> QQ 86, // ZPR4_with_zsub2_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub2_in_FPR64_lo 79, // ZPR4_with_zsub2_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub2_in_FPR64_lo 149, // ZPR4_with_zsub2_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub2_in_FPR128_lo 115, // ZPR4_with_zsub2_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub2_in_FPR128_lo 95, // ZPR4_with_zsub2_in_ZPR_4b:zsub0_zsub1 -> ZPR2 120, // ZPR4_with_zsub2_in_ZPR_4b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPR_4b 100, // ZPR4_with_zsub2_in_ZPR_4b:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPR_4b 118, // ZPR4_with_zsub2_in_ZPR_4b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPR_4b 99, // ZPR4_with_zsub2_in_ZPR_4b:zsub2_zsub3 -> ZPR2_with_dsub_in_FPR64_lo 55, // ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub1_in_FPR64_lo 78, // ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub1_in_FPR64_lo 97, // ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_qsub1_in_FPR128_lo 114, // ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_qsub1_in_FPR128_lo 54, // ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo 96, // ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo 0, // ZPR4_with_zsub2_in_ZPR_4b:zsub0_zsub2 0, // ZPR4_with_zsub2_in_ZPR_4b:zsub1_zsub3 }, { // ZPR4_with_zsub3_in_ZPR_4b 1, // ZPR4_with_zsub3_in_ZPR_4b:bsub -> FPR8 36, // ZPR4_with_zsub3_in_ZPR_4b:dsub -> FPR64 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub0 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub1 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub2 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub3 2, // ZPR4_with_zsub3_in_ZPR_4b:hsub -> FPR16 0, // ZPR4_with_zsub3_in_ZPR_4b:psub0 0, // ZPR4_with_zsub3_in_ZPR_4b:psub1 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub0 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub1 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub2 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub3 20, // ZPR4_with_zsub3_in_ZPR_4b:ssub -> FPR32 0, // ZPR4_with_zsub3_in_ZPR_4b:sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b:sube32 0, // ZPR4_with_zsub3_in_ZPR_4b:sube64 0, // ZPR4_with_zsub3_in_ZPR_4b:subo32 0, // ZPR4_with_zsub3_in_ZPR_4b:subo64 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_0 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_1 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_2 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_3 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_4 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_5 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_6 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_7 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubb 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubd0 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubd1 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubh0 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubh1 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubq0 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubq1 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubs0 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubs1 70, // ZPR4_with_zsub3_in_ZPR_4b:zsub -> FPR128 71, // ZPR4_with_zsub3_in_ZPR_4b:zsub0 -> ZPR 71, // ZPR4_with_zsub3_in_ZPR_4b:zsub1 -> ZPR 71, // ZPR4_with_zsub3_in_ZPR_4b:zsub2 -> ZPR 74, // ZPR4_with_zsub3_in_ZPR_4b:zsub3 -> ZPR_4b 0, // ZPR4_with_zsub3_in_ZPR_4b:zsub_hi 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubd1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubd1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubd0 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubd1 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubd0 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubd1 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs0 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub1_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub1_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub1_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub3_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub3_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub3_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub2_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub2_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub2_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub3_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub3_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub3_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub3_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_7_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_6_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_5_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_4_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_3_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_2_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_1_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b:subo64_then_sub_32 1, // ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_bsub -> FPR8 36, // ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_dsub -> FPR64 2, // ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_hsub -> FPR16 20, // ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_ssub -> FPR32 70, // ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_zsub -> FPR128 0, // ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_zsub_hi 1, // ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_bsub -> FPR8 44, // ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_zsub_hi 1, // ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_bsub -> FPR8 36, // ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_dsub -> FPR64 2, // ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_hsub -> FPR16 20, // ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_ssub -> FPR32 70, // ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_zsub -> FPR128 0, // ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_zsub_hi 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub0_dsub1 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub1_dsub2 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub2_dsub3 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub0_qsub1 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub1_qsub2 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub2_qsub3 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_4b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_0_x8sub_1 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_2_x8sub_3 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_4_x8sub_5 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_6_x8sub_7 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b:sub_32_subo64_then_sub_32 53, // ZPR4_with_zsub3_in_ZPR_4b:dsub_zsub1_then_dsub -> DD 94, // ZPR4_with_zsub3_in_ZPR_4b:zsub_zsub1_then_zsub -> QQ 87, // ZPR4_with_zsub3_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub3_in_FPR64_lo 76, // ZPR4_with_zsub3_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD 150, // ZPR4_with_zsub3_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub3_in_FPR128_lo 111, // ZPR4_with_zsub3_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ 95, // ZPR4_with_zsub3_in_ZPR_4b:zsub0_zsub1 -> ZPR2 112, // ZPR4_with_zsub3_in_ZPR_4b:zsub0_zsub1_zsub2 -> ZPR3 95, // ZPR4_with_zsub3_in_ZPR_4b:zsub1_zsub2 -> ZPR2 120, // ZPR4_with_zsub3_in_ZPR_4b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPR_4b 100, // ZPR4_with_zsub3_in_ZPR_4b:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPR_4b 53, // ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub -> DD 79, // ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub2_in_FPR64_lo 94, // ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub -> QQ 115, // ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_qsub2_in_FPR128_lo 55, // ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_zsub3_in_ZPR_4b:zsub0_zsub2 0, // ZPR4_with_zsub3_in_ZPR_4b:zsub1_zsub3 }, { // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 1, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:bsub -> FPR8 44, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub -> FPR64_lo 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub3 3, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:hsub -> FPR16_lo 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:psub0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:psub1 72, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub0 -> FPR128_lo 72, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub1 -> FPR128_lo 70, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub2 -> FPR128 70, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub3 -> FPR128 24, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:sube32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:sube64 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:subo32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:subo64 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_3 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_4 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_5 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_6 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_7 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubb 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubd0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubd1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubh0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubh1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubs0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubs1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub3 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub_hi 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubd1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubd1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub1_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub1_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub1_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub3_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub3_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub3_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub2_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub2_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub2_then_ssub 1, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub1_then_bsub -> FPR8 44, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub1_then_dsub -> FPR64_lo 3, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub1_then_hsub -> FPR16_lo 24, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub3_then_bsub -> FPR8 36, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub3_then_dsub -> FPR64 2, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub3_then_hsub -> FPR16 20, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub3_then_ssub -> FPR32 1, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub2_then_bsub -> FPR8 36, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub2_then_dsub -> FPR64 2, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub2_then_hsub -> FPR16 20, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub2_then_ssub -> FPR32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_7_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_6_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_5_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_4_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_3_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_2_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_1_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:subo64_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub_hi 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub3_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub3_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub3_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub3_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub3_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub3_then_zsub_hi 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub2_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub2_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub2_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub2_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub2_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub2_then_zsub_hi 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub0_dsub1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub0_dsub1_dsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub1_dsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub1_dsub2_dsub3 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub2_dsub3 57, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub_qsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 88, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 80, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 101, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub0_qsub1 -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 121, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub0_qsub1_qsub2 -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 96, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub1_qsub2 -> QQ_with_dsub_in_FPR64_lo 113, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub1_qsub2_qsub3 -> QQQ_with_dsub_in_FPR64_lo 94, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub2_qsub3 -> QQ 54, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo 77, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo 53, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:qsub2_then_dsub_qsub3_then_dsub -> DD 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_0_x8sub_1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_2_x8sub_3 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_4_x8sub_5 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_6_x8sub_7 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:sub_32_subo64_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub_zsub1_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub_zsub1_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub0_zsub1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub0_zsub1_zsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub1_zsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub1_zsub2_zsub3 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub2_zsub3 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub0_zsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo:zsub1_zsub3 }, { // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 1, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:bsub -> FPR8 36, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub -> FPR64 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub2 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub3 2, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:hsub -> FPR16 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:psub0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:psub1 70, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub0 -> FPR128 72, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub1 -> FPR128_lo 72, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub2 -> FPR128_lo 70, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub3 -> FPR128 20, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:ssub -> FPR32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:sube32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:sube64 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:subo32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:subo64 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_2 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_3 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_4 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_5 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_6 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_7 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubb 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubd0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubd1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubs0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubs1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub3 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub_hi 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubd1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubd1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub1_then_bsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub1_then_hsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub1_then_ssub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub3_then_bsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub3_then_hsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub3_then_ssub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub2_then_bsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub2_then_hsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub2_then_ssub 1, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub1_then_bsub -> FPR8 44, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub1_then_dsub -> FPR64_lo 3, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub1_then_hsub -> FPR16_lo 24, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub3_then_bsub -> FPR8 36, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub3_then_dsub -> FPR64 2, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub3_then_hsub -> FPR16 20, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub3_then_ssub -> FPR32 1, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub2_then_bsub -> FPR8 44, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub2_then_dsub -> FPR64_lo 3, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub2_then_hsub -> FPR16_lo 24, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_7_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_6_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_5_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_4_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_3_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_2_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_1_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:subo64_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_bsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_hsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_ssub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub_hi 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub3_then_bsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub3_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub3_then_hsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub3_then_ssub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub3_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub3_then_zsub_hi 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_bsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_hsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_ssub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_zsub_hi 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub0_dsub1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub0_dsub1_dsub2 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub1_dsub2 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub1_dsub2_dsub3 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub2_dsub3 55, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub_qsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 89, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 81, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 97, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub0_qsub1 -> QQ_with_qsub1_in_FPR128_lo 122, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub0_qsub1_qsub2 -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 101, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub1_qsub2 -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 121, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub1_qsub2_qsub3 -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 96, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub2_qsub3 -> QQ_with_dsub_in_FPR64_lo 57, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 80, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 54, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub2_then_dsub_qsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_0_x8sub_1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_2_x8sub_3 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_4_x8sub_5 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_6_x8sub_7 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:sub_32_subo64_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub_zsub1_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub_zsub1_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub0_zsub1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub0_zsub1_zsub2 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_zsub2 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_zsub2_zsub3 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2_zsub3 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub0_zsub2 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_zsub3 }, { // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 1, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:bsub -> FPR8 36, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub -> FPR64 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub0 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub2 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub3 2, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:hsub -> FPR16 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:psub0 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:psub1 70, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub0 -> FPR128 70, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1 -> FPR128 72, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2 -> FPR128_lo 72, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub3 -> FPR128_lo 20, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:ssub -> FPR32 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:sube32 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:sube64 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:subo32 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:subo64 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_0 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_2 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_3 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_4 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_5 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_6 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_7 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubb 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubd0 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubd1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh0 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubq0 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubq1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs0 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub0 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub_hi 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubd1_then_zasubq0 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubd1_then_zasubq1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubd0 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubd1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubq0 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubq1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubd0 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubd1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubq0 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubq1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs0 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub1_then_bsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub1_then_hsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub1_then_ssub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub3_then_bsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub3_then_hsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub3_then_ssub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub2_then_bsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub2_then_hsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub2_then_ssub 1, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_bsub -> FPR8 36, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_dsub -> FPR64 2, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_hsub -> FPR16 20, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_ssub -> FPR32 1, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub3_then_bsub -> FPR8 44, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub3_then_dsub -> FPR64_lo 3, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub3_then_hsub -> FPR16_lo 24, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_bsub -> FPR8 44, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_dsub -> FPR64_lo 3, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_hsub -> FPR16_lo 24, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_7_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_6_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_5_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_4_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_3_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_2_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_1_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:subo64_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_bsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_dsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_hsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_ssub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_zsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_zsub_hi 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_bsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_dsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_hsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_ssub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_zsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_zsub_hi 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_bsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_dsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_hsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_ssub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_zsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_zsub_hi 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub0_dsub1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub0_dsub1_dsub2 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub1_dsub2 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub1_dsub2_dsub3 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub2_dsub3 53, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub_qsub1_then_dsub -> DD 90, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 79, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub -> DDD_with_dsub2_in_FPR64_lo 94, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub0_qsub1 -> QQ 115, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub0_qsub1_qsub2 -> QQQ_with_qsub2_in_FPR128_lo 97, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_qsub2 -> QQ_with_qsub1_in_FPR128_lo 122, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_qsub2_qsub3 -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 101, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2_qsub3 -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 55, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub -> DD_with_dsub1_in_FPR64_lo 81, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 57, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_dsub_qsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_0_x8sub_1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_2_x8sub_3 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_4_x8sub_5 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_6_x8sub_7 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:sub_32_subo64_then_sub_32 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub_zsub1_then_dsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub_zsub1_then_zsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub0_zsub1 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub0_zsub1_zsub2 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_zsub2 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_zsub2_zsub3 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_zsub3 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub0_zsub2 0, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub -> FPR64_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub3 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:hsub -> FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:psub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:psub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub3 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:sube32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:sube64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:subo32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:subo64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_4 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_6 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubb 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubh0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubh1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubs1 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub -> FPR128_lo 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub0 -> ZPR_4b 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub1 -> ZPR_4b 71, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub2 -> ZPR 71, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub3 -> ZPR 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_6_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_4_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_2_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:subo64_then_sub_32 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub3_then_bsub -> FPR8 36, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub3_then_dsub -> FPR64 2, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub3_then_hsub -> FPR16 20, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub3_then_ssub -> FPR32 70, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub3_then_zsub -> FPR128 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub3_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub2_then_bsub -> FPR8 36, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub2_then_dsub -> FPR64 2, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub2_then_hsub -> FPR16 20, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub2_then_ssub -> FPR32 70, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub2_then_zsub -> FPR128 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub2_then_zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub0_dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub0_dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub1_dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub_qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub0_qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub0_qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub1_qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_0_x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_2_x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_4_x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_6_x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:sub_32_subo64_then_sub_32 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 88, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 80, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 157, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 121, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 102, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 123, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub0_zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 99, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo 116, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub1_zsub2_zsub3 -> ZPR3_with_dsub_in_FPR64_lo 95, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub2_zsub3 -> ZPR2 54, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo 77, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo 96, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo 113, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo 53, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub2_then_dsub_zsub3_then_dsub -> DD 94, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub2_then_zsub_zsub3_then_zsub -> QQ 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub0_zsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b:zsub1_zsub3 }, { // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b 1, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:bsub -> FPR8 36, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub -> FPR64 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub3 2, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:hsub -> FPR16 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:psub0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:psub1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub3 20, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:ssub -> FPR32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:sube32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:sube64 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:subo32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:subo64 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_2 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_3 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_4 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_5 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_6 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_7 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubb 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubd0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubd1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubs0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubs1 70, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub -> FPR128 71, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub0 -> ZPR 74, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1 -> ZPR_4b 74, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2 -> ZPR_4b 71, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub3 -> ZPR 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub_hi 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub1_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub1_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub1_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub3_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub3_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub3_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub2_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub2_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub2_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub1_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub1_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub1_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub1_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub3_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub3_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub3_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub2_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub2_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub2_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_6_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_4_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_2_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:subo64_then_sub_32 1, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_zsub_hi 1, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub3_then_bsub -> FPR8 36, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub3_then_dsub -> FPR64 2, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub3_then_hsub -> FPR16 20, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub3_then_ssub -> FPR32 70, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub3_then_zsub -> FPR128 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub3_then_zsub_hi 1, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_zsub_hi 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub0_dsub1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub1_dsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub2_dsub3 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub0_qsub1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub1_qsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub2_qsub3 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_0_x8sub_1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_2_x8sub_3 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_4_x8sub_5 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_6_x8sub_7 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:sub_32_subo64_then_sub_32 55, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub_zsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub_zsub1_then_zsub -> QQ_with_qsub1_in_FPR128_lo 89, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 81, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 158, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 122, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 100, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_4b 124, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 102, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 123, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_zsub2_zsub3 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 99, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2_zsub3 -> ZPR2_with_dsub_in_FPR64_lo 57, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 80, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 121, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 54, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo 96, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub0_zsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_zsub3 }, { // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 1, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:bsub -> FPR8 36, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub -> FPR64 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub0 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub2 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub3 2, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:hsub -> FPR16 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:psub0 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:psub1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub0 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub3 20, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:ssub -> FPR32 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:sube32 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:sube64 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:subo32 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:subo64 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_0 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_2 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_3 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_4 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_5 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_6 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_7 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubb 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubd0 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubd1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh0 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubq0 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubq1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs0 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1 70, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub -> FPR128 71, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub0 -> ZPR 71, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1 -> ZPR 74, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2 -> ZPR_4b 74, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3 -> ZPR_4b 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub_hi 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubd1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubd1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubd0 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubd1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubd0 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubd1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs0 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub1_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub1_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub1_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub3_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub3_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub3_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub2_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub2_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub2_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub3_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub3_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub3_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub3_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_7_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_6_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_5_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_4_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_3_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_2_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_1_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:subo64_then_sub_32 1, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_bsub -> FPR8 36, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_dsub -> FPR64 2, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_hsub -> FPR16 20, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_ssub -> FPR32 70, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_zsub -> FPR128 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_zsub_hi 1, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_bsub -> FPR8 44, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_zsub_hi 1, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_zsub_hi 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub0_dsub1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub1_dsub2 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub2_dsub3 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub0_qsub1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_qsub2 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2_qsub3 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_0_x8sub_1 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_2_x8sub_3 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_4_x8sub_5 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_6_x8sub_7 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:sub_32_subo64_then_sub_32 53, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub_zsub1_then_dsub -> DD 94, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub_zsub1_then_zsub -> QQ 90, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 79, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub2_in_FPR64_lo 159, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 115, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub2_in_FPR128_lo 95, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub0_zsub1 -> ZPR2 120, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPR_4b 100, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPR_4b 124, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 102, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_zsub3 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 55, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub1_in_FPR64_lo 81, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 97, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_qsub1_in_FPR128_lo 122, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub0_zsub2 0, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_zsub3 }, { // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 1, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:bsub -> FPR8 44, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub -> FPR64_lo 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub3 3, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:hsub -> FPR16_lo 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:psub0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:psub1 72, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub0 -> FPR128_lo 72, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub1 -> FPR128_lo 72, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub2 -> FPR128_lo 70, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub3 -> FPR128 24, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:sube32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:sube64 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:subo32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:subo64 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_3 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_4 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_5 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_6 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_7 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubb 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubd0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubd1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubs0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubs1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub3 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub_hi 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubd1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubd1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub1_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub1_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub1_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub3_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub3_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub3_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub2_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub2_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub2_then_ssub 1, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub1_then_bsub -> FPR8 44, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub1_then_dsub -> FPR64_lo 3, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub1_then_hsub -> FPR16_lo 24, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub3_then_bsub -> FPR8 36, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub3_then_dsub -> FPR64 2, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub3_then_hsub -> FPR16 20, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub3_then_ssub -> FPR32 1, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub2_then_bsub -> FPR8 44, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub2_then_dsub -> FPR64_lo 3, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub2_then_hsub -> FPR16_lo 24, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_7_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_6_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_5_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_4_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_3_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_2_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_1_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:subo64_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub_hi 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub3_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub3_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub3_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub3_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub3_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub3_then_zsub_hi 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_zsub_hi 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub0_dsub1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub0_dsub1_dsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub1_dsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub1_dsub2_dsub3 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub2_dsub3 57, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub_qsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 91, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 82, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub0_qsub1 -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub0_qsub1_qsub2 -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 101, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub1_qsub2 -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 121, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub1_qsub2_qsub3 -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 96, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub2_qsub3 -> QQ_with_dsub_in_FPR64_lo 57, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 80, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 54, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:qsub2_then_dsub_qsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_0_x8sub_1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_2_x8sub_3 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_4_x8sub_5 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_6_x8sub_7 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:sub_32_subo64_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub_zsub1_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub_zsub1_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub0_zsub1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub0_zsub1_zsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_zsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_zsub2_zsub3 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2_zsub3 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub0_zsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo:zsub1_zsub3 }, { // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 1, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:bsub -> FPR8 36, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub -> FPR64 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub2 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub3 2, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:hsub -> FPR16 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:psub0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:psub1 70, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub0 -> FPR128 72, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1 -> FPR128_lo 72, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2 -> FPR128_lo 72, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub3 -> FPR128_lo 20, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:ssub -> FPR32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:sube32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:sube64 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:subo32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:subo64 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_2 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_3 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_4 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_5 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_6 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_7 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubb 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubd0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubd1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub_hi 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubd1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubd1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubd0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubd1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubd0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubd1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub1_then_bsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub1_then_hsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub1_then_ssub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub3_then_bsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub3_then_hsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub3_then_ssub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub2_then_bsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub2_then_hsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub2_then_ssub 1, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_bsub -> FPR8 44, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_dsub -> FPR64_lo 3, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_hsub -> FPR16_lo 24, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub3_then_bsub -> FPR8 44, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub3_then_dsub -> FPR64_lo 3, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub3_then_hsub -> FPR16_lo 24, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_bsub -> FPR8 44, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_dsub -> FPR64_lo 3, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_hsub -> FPR16_lo 24, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_7_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_6_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_5_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_4_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_3_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_2_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_1_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:subo64_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_bsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_hsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_ssub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_zsub_hi 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_bsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_hsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_ssub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_zsub_hi 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_bsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_hsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_ssub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_zsub_hi 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub0_dsub1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub0_dsub1_dsub2 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub1_dsub2 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub1_dsub2_dsub3 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub2_dsub3 55, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub_qsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 92, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 81, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 97, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub0_qsub1 -> QQ_with_qsub1_in_FPR128_lo 122, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub0_qsub1_qsub2 -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 101, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_qsub2 -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_qsub2_qsub3 -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 101, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2_qsub3 -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 57, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 57, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_dsub_qsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_0_x8sub_1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_2_x8sub_3 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_4_x8sub_5 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_6_x8sub_7 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:sub_32_subo64_then_sub_32 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub_zsub1_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub_zsub1_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub0_zsub1 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub0_zsub1_zsub2 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_zsub2 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_zsub2_zsub3 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_zsub3 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub0_zsub2 0, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub -> FPR64_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub3 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:hsub -> FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:psub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:psub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub3 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:sube32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:sube64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:subo32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:subo64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_4 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_6 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubb 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubs1 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub -> FPR128_lo 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub0 -> ZPR_4b 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1 -> ZPR_4b 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2 -> ZPR_4b 71, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub3 -> ZPR 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_6_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_4_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_2_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:subo64_then_sub_32 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub3_then_bsub -> FPR8 36, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub3_then_dsub -> FPR64 2, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub3_then_hsub -> FPR16 20, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub3_then_ssub -> FPR32 70, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub3_then_zsub -> FPR128 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub3_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub0_dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub0_dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub1_dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub_qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub0_qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub0_qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub1_qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_0_x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_2_x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_4_x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_6_x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:sub_32_subo64_then_sub_32 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 91, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 163, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 102, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 126, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub0_zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 102, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 123, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_zsub2_zsub3 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b 99, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2_zsub3 -> ZPR2_with_dsub_in_FPR64_lo 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 80, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 121, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 54, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo 96, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub0_zsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b:zsub1_zsub3 }, { // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b 1, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:bsub -> FPR8 36, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub -> FPR64 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub3 2, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:hsub -> FPR16 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:psub0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:psub1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub3 20, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:ssub -> FPR32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:sube32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:sube64 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:subo32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:subo64 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_2 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_3 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_4 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_5 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_6 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_7 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubb 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubd0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubd1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1 70, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub -> FPR128 71, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub0 -> ZPR 74, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1 -> ZPR_4b 74, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2 -> ZPR_4b 74, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3 -> ZPR_4b 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub_hi 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub1_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub1_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub1_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub3_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub3_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub3_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub2_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub2_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub2_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub3_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub3_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub3_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_6_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_4_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_2_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:subo64_then_sub_32 1, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_zsub_hi 1, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_zsub_hi 1, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_zsub_hi 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub0_dsub1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub1_dsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub2_dsub3 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub0_qsub1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_qsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2_qsub3 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_0_x8sub_1 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_2_x8sub_3 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_4_x8sub_5 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_6_x8sub_7 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:sub_32_subo64_then_sub_32 55, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub_zsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub_zsub1_then_zsub -> QQ_with_qsub1_in_FPR128_lo 92, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 81, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 164, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 122, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 100, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_4b 124, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b 102, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 126, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_zsub2_zsub3 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 102, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_zsub3 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 57, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub0_zsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_zsub3 }, { // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 1, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:bsub -> FPR8 44, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub -> FPR64_lo 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub3 3, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:hsub -> FPR16_lo 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:psub0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:psub1 72, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub0 -> FPR128_lo 72, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1 -> FPR128_lo 72, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2 -> FPR128_lo 72, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub3 -> FPR128_lo 24, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:sube32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:sube64 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:subo32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:subo64 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_3 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_4 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_5 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_6 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_7 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubb 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubd0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubd1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub_hi 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubd1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubd1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubd0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubd1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubd0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubd1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubd1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub1_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub1_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub1_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub3_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub3_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub3_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub2_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub2_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub2_then_ssub 1, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_bsub -> FPR8 44, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_dsub -> FPR64_lo 3, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_hsub -> FPR16_lo 24, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub3_then_bsub -> FPR8 44, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub3_then_dsub -> FPR64_lo 3, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub3_then_hsub -> FPR16_lo 24, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 1, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_bsub -> FPR8 44, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_dsub -> FPR64_lo 3, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_hsub -> FPR16_lo 24, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_7_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_6_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_5_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_4_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_3_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_2_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_1_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:subo64_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_zsub_hi 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub3_then_zsub_hi 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_bsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_hsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_ssub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_zsub_hi 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub0_dsub1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub0_dsub1_dsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub1_dsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub1_dsub2_dsub3 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub2_dsub3 57, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub_qsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 93, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 82, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub_qsub1_then_dsub_qsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub0_qsub1 -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub0_qsub1_qsub2 -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 101, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_qsub2 -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_qsub2_qsub3 -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 101, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2_qsub3 -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 57, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 57, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:qsub2_then_dsub_qsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:sub_32_x8sub_1_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_0_x8sub_1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_2_x8sub_3 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_4_x8sub_5 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_6_x8sub_7 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:sub_32_subo64_then_sub_32 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub_zsub1_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub_zsub1_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub0_zsub1 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub0_zsub1_zsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_zsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_zsub2_zsub3 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_zsub3 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_dsub_zsub3_then_dsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub2_then_zsub_zsub3_then_zsub 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub0_zsub2 0, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo:zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub -> FPR64_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub3 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:hsub -> FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:psub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:psub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub3 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:sube32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:sube64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:subo32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:subo64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_4 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_6 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubb 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub -> FPR128_lo 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub0 -> ZPR_4b 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1 -> ZPR_4b 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2 -> ZPR_4b 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3 -> ZPR_4b 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_6_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_4_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_2_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:subo64_then_sub_32 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub3_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub0_dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub0_dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub1_dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub_qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub0_qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub0_qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_0_x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_2_x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_4_x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_6_x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:sub_32_subo64_then_sub_32 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 93, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 167, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 102, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 126, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub0_zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 102, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 126, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_zsub2_zsub3 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 102, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_zsub3 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub0_zsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b:zsub1_zsub3 }, { // ZPR4Mul4 1, // ZPR4Mul4:bsub -> FPR8 36, // ZPR4Mul4:dsub -> FPR64 0, // ZPR4Mul4:dsub0 0, // ZPR4Mul4:dsub1 0, // ZPR4Mul4:dsub2 0, // ZPR4Mul4:dsub3 2, // ZPR4Mul4:hsub -> FPR16 0, // ZPR4Mul4:psub0 0, // ZPR4Mul4:psub1 0, // ZPR4Mul4:qsub0 0, // ZPR4Mul4:qsub1 0, // ZPR4Mul4:qsub2 0, // ZPR4Mul4:qsub3 20, // ZPR4Mul4:ssub -> FPR32 0, // ZPR4Mul4:sub_32 0, // ZPR4Mul4:sube32 0, // ZPR4Mul4:sube64 0, // ZPR4Mul4:subo32 0, // ZPR4Mul4:subo64 0, // ZPR4Mul4:x8sub_0 0, // ZPR4Mul4:x8sub_1 0, // ZPR4Mul4:x8sub_2 0, // ZPR4Mul4:x8sub_3 0, // ZPR4Mul4:x8sub_4 0, // ZPR4Mul4:x8sub_5 0, // ZPR4Mul4:x8sub_6 0, // ZPR4Mul4:x8sub_7 0, // ZPR4Mul4:zasubb 0, // ZPR4Mul4:zasubd0 0, // ZPR4Mul4:zasubd1 0, // ZPR4Mul4:zasubh0 0, // ZPR4Mul4:zasubh1 0, // ZPR4Mul4:zasubq0 0, // ZPR4Mul4:zasubq1 0, // ZPR4Mul4:zasubs0 0, // ZPR4Mul4:zasubs1 70, // ZPR4Mul4:zsub -> FPR128 71, // ZPR4Mul4:zsub0 -> ZPR 71, // ZPR4Mul4:zsub1 -> ZPR 71, // ZPR4Mul4:zsub2 -> ZPR 71, // ZPR4Mul4:zsub3 -> ZPR 0, // ZPR4Mul4:zsub_hi 0, // ZPR4Mul4:zasubd1_then_zasubq0 0, // ZPR4Mul4:zasubd1_then_zasubq1 0, // ZPR4Mul4:zasubs1_then_zasubd0 0, // ZPR4Mul4:zasubs1_then_zasubd1 0, // ZPR4Mul4:zasubs1_then_zasubq0 0, // ZPR4Mul4:zasubs1_then_zasubq1 0, // ZPR4Mul4:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4Mul4:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4Mul4:zasubh1_then_zasubd0 0, // ZPR4Mul4:zasubh1_then_zasubd1 0, // ZPR4Mul4:zasubh1_then_zasubq0 0, // ZPR4Mul4:zasubh1_then_zasubq1 0, // ZPR4Mul4:zasubh1_then_zasubs0 0, // ZPR4Mul4:zasubh1_then_zasubs1 0, // ZPR4Mul4:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4Mul4:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4Mul4:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4Mul4:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4Mul4:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4Mul4:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4Mul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4Mul4:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4Mul4:dsub1_then_bsub 0, // ZPR4Mul4:dsub1_then_hsub 0, // ZPR4Mul4:dsub1_then_ssub 0, // ZPR4Mul4:dsub3_then_bsub 0, // ZPR4Mul4:dsub3_then_hsub 0, // ZPR4Mul4:dsub3_then_ssub 0, // ZPR4Mul4:dsub2_then_bsub 0, // ZPR4Mul4:dsub2_then_hsub 0, // ZPR4Mul4:dsub2_then_ssub 0, // ZPR4Mul4:qsub1_then_bsub 0, // ZPR4Mul4:qsub1_then_dsub 0, // ZPR4Mul4:qsub1_then_hsub 0, // ZPR4Mul4:qsub1_then_ssub 0, // ZPR4Mul4:qsub3_then_bsub 0, // ZPR4Mul4:qsub3_then_dsub 0, // ZPR4Mul4:qsub3_then_hsub 0, // ZPR4Mul4:qsub3_then_ssub 0, // ZPR4Mul4:qsub2_then_bsub 0, // ZPR4Mul4:qsub2_then_dsub 0, // ZPR4Mul4:qsub2_then_hsub 0, // ZPR4Mul4:qsub2_then_ssub 0, // ZPR4Mul4:x8sub_7_then_sub_32 0, // ZPR4Mul4:x8sub_6_then_sub_32 0, // ZPR4Mul4:x8sub_5_then_sub_32 0, // ZPR4Mul4:x8sub_4_then_sub_32 0, // ZPR4Mul4:x8sub_3_then_sub_32 0, // ZPR4Mul4:x8sub_2_then_sub_32 0, // ZPR4Mul4:x8sub_1_then_sub_32 0, // ZPR4Mul4:subo64_then_sub_32 1, // ZPR4Mul4:zsub1_then_bsub -> FPR8 36, // ZPR4Mul4:zsub1_then_dsub -> FPR64 2, // ZPR4Mul4:zsub1_then_hsub -> FPR16 20, // ZPR4Mul4:zsub1_then_ssub -> FPR32 70, // ZPR4Mul4:zsub1_then_zsub -> FPR128 0, // ZPR4Mul4:zsub1_then_zsub_hi 1, // ZPR4Mul4:zsub3_then_bsub -> FPR8 36, // ZPR4Mul4:zsub3_then_dsub -> FPR64 2, // ZPR4Mul4:zsub3_then_hsub -> FPR16 20, // ZPR4Mul4:zsub3_then_ssub -> FPR32 70, // ZPR4Mul4:zsub3_then_zsub -> FPR128 0, // ZPR4Mul4:zsub3_then_zsub_hi 1, // ZPR4Mul4:zsub2_then_bsub -> FPR8 36, // ZPR4Mul4:zsub2_then_dsub -> FPR64 2, // ZPR4Mul4:zsub2_then_hsub -> FPR16 20, // ZPR4Mul4:zsub2_then_ssub -> FPR32 70, // ZPR4Mul4:zsub2_then_zsub -> FPR128 0, // ZPR4Mul4:zsub2_then_zsub_hi 0, // ZPR4Mul4:dsub0_dsub1 0, // ZPR4Mul4:dsub0_dsub1_dsub2 0, // ZPR4Mul4:dsub1_dsub2 0, // ZPR4Mul4:dsub1_dsub2_dsub3 0, // ZPR4Mul4:dsub2_dsub3 0, // ZPR4Mul4:dsub_qsub1_then_dsub 0, // ZPR4Mul4:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4Mul4:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4Mul4:qsub0_qsub1 0, // ZPR4Mul4:qsub0_qsub1_qsub2 0, // ZPR4Mul4:qsub1_qsub2 0, // ZPR4Mul4:qsub1_qsub2_qsub3 0, // ZPR4Mul4:qsub2_qsub3 0, // ZPR4Mul4:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4Mul4:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4Mul4:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4Mul4:sub_32_x8sub_1_then_sub_32 0, // ZPR4Mul4:x8sub_0_x8sub_1 0, // ZPR4Mul4:x8sub_2_x8sub_3 0, // ZPR4Mul4:x8sub_4_x8sub_5 0, // ZPR4Mul4:x8sub_6_x8sub_7 0, // ZPR4Mul4:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4Mul4:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4Mul4:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4Mul4:sub_32_subo64_then_sub_32 53, // ZPR4Mul4:dsub_zsub1_then_dsub -> DD 94, // ZPR4Mul4:zsub_zsub1_then_zsub -> QQ 83, // ZPR4Mul4:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD 76, // ZPR4Mul4:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD 145, // ZPR4Mul4:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ 111, // ZPR4Mul4:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ 98, // ZPR4Mul4:zsub0_zsub1 -> ZPR2Mul2 117, // ZPR4Mul4:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 95, // ZPR4Mul4:zsub1_zsub2 -> ZPR2 119, // ZPR4Mul4:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 98, // ZPR4Mul4:zsub2_zsub3 -> ZPR2Mul2 53, // ZPR4Mul4:zsub1_then_dsub_zsub2_then_dsub -> DD 76, // ZPR4Mul4:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD 94, // ZPR4Mul4:zsub1_then_zsub_zsub2_then_zsub -> QQ 111, // ZPR4Mul4:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ 53, // ZPR4Mul4:zsub2_then_dsub_zsub3_then_dsub -> DD 94, // ZPR4Mul4:zsub2_then_zsub_zsub3_then_zsub -> QQ 0, // ZPR4Mul4:zsub0_zsub2 0, // ZPR4Mul4:zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub -> FPR64_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:hsub -> FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:psub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:psub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sube32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sube64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubb 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub -> FPR128_lo 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0 -> ZPR_4b 71, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1 -> ZPR 71, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2 -> ZPR 71, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3 -> ZPR 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo64_then_sub_32 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_bsub -> FPR8 36, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub -> FPR64 2, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_hsub -> FPR16 20, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_ssub -> FPR32 70, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub -> FPR128 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_bsub -> FPR8 36, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_dsub -> FPR64 2, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_hsub -> FPR16 20, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_ssub -> FPR32 70, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_zsub -> FPR128 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_bsub -> FPR8 36, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_dsub -> FPR64 2, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_hsub -> FPR16 20, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_ssub -> FPR32 70, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub -> FPR128 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0_dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0_dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0_qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0_qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_0_x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32_subo64_then_sub_32 54, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo 96, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo 84, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo 77, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo 147, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo 113, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo 99, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo 127, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 98, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub2 -> ZPR2Mul2 117, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 95, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_zsub3 -> ZPR2 53, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub -> DD 76, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD 94, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub -> QQ 111, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ 53, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_dsub_zsub3_then_dsub -> DD 94, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub_zsub3_then_zsub -> QQ 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub3 }, { // ZPR4_with_zsub0_in_ZPR_3b 1, // ZPR4_with_zsub0_in_ZPR_3b:bsub -> FPR8 44, // ZPR4_with_zsub0_in_ZPR_3b:dsub -> FPR64_lo 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub0 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub1 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub2 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub3 3, // ZPR4_with_zsub0_in_ZPR_3b:hsub -> FPR16_lo 0, // ZPR4_with_zsub0_in_ZPR_3b:psub0 0, // ZPR4_with_zsub0_in_ZPR_3b:psub1 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub0 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub1 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub2 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub3 24, // ZPR4_with_zsub0_in_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4_with_zsub0_in_ZPR_3b:sub_32 0, // ZPR4_with_zsub0_in_ZPR_3b:sube32 0, // ZPR4_with_zsub0_in_ZPR_3b:sube64 0, // ZPR4_with_zsub0_in_ZPR_3b:subo32 0, // ZPR4_with_zsub0_in_ZPR_3b:subo64 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_0 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_1 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_2 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_3 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_4 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_5 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_6 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_7 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubb 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubd0 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubd1 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubh0 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubh1 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubq0 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubq1 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubs0 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubs1 72, // ZPR4_with_zsub0_in_ZPR_3b:zsub -> FPR128_lo 75, // ZPR4_with_zsub0_in_ZPR_3b:zsub0 -> ZPR_3b 74, // ZPR4_with_zsub0_in_ZPR_3b:zsub1 -> ZPR_4b 74, // ZPR4_with_zsub0_in_ZPR_3b:zsub2 -> ZPR_4b 74, // ZPR4_with_zsub0_in_ZPR_3b:zsub3 -> ZPR_4b 0, // ZPR4_with_zsub0_in_ZPR_3b:zsub_hi 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub1_then_bsub 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub1_then_hsub 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub1_then_ssub 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub3_then_bsub 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub3_then_hsub 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub3_then_ssub 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub2_then_bsub 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub2_then_hsub 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub2_then_ssub 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub1_then_bsub 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub1_then_dsub 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub1_then_hsub 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub1_then_ssub 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub3_then_bsub 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub3_then_dsub 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub3_then_hsub 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub3_then_ssub 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub2_then_bsub 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub2_then_dsub 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub2_then_hsub 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub2_then_ssub 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR4_with_zsub0_in_ZPR_3b:subo64_then_sub_32 1, // ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_zsub_hi 1, // ZPR4_with_zsub0_in_ZPR_3b:zsub3_then_bsub -> FPR8 44, // ZPR4_with_zsub0_in_ZPR_3b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub0_in_ZPR_3b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub0_in_ZPR_3b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub0_in_ZPR_3b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub0_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR4_with_zsub0_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_zsub0_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub0_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub0_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub0_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub0_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub0_dsub1 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub1_dsub2 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub2_dsub3 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub0_qsub1 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub1_qsub2 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub2_qsub3 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub0_in_ZPR_3b:sub_32_subo64_then_sub_32 57, // ZPR4_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 93, // ZPR4_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 82, // ZPR4_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 167, // ZPR4_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 125, // ZPR4_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 104, // ZPR4_with_zsub0_in_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_3b 128, // ZPR4_with_zsub0_in_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_3b 102, // ZPR4_with_zsub0_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 126, // ZPR4_with_zsub0_in_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b 102, // ZPR4_with_zsub0_in_ZPR_3b:zsub2_zsub3 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 57, // ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_zsub0_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_zsub0_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_zsub0_in_ZPR_3b:zsub0_zsub2 0, // ZPR4_with_zsub0_in_ZPR_3b:zsub1_zsub3 }, { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 1, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:bsub -> FPR8 44, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub -> FPR64_lo 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3 3, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:hsub -> FPR16_lo 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3 24, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube64 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubb 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1 72, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub -> FPR128_lo 74, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0 -> ZPR_4b 74, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1 -> ZPR_4b 71, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2 -> ZPR 71, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3 -> ZPR 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_hi 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_ssub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_bsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_hsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_ssub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_bsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_hsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_ssub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_bsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_hsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_ssub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64_then_sub_32 1, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_bsub -> FPR8 44, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 1, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_bsub -> FPR8 36, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_dsub -> FPR64 2, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_hsub -> FPR16 20, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_ssub -> FPR32 70, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub -> FPR128 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 1, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_bsub -> FPR8 36, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub -> FPR64 2, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_hsub -> FPR16 20, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_ssub -> FPR32 70, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub -> FPR128 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_dsub3 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_qsub3 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 57, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 88, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo 80, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 157, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo 121, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 103, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 99, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo 127, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 98, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_zsub3 -> ZPR2Mul2 54, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo 77, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo 96, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo 113, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo 53, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub -> DD 94, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub -> QQ 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub3 }, { // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 1, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:bsub -> FPR8 36, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub -> FPR64 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3 2, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:hsub -> FPR16 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3 20, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:ssub -> FPR32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube64 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubb 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1 70, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub -> FPR128 71, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0 -> ZPR 74, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1 -> ZPR_4b 74, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2 -> ZPR_4b 71, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3 -> ZPR 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_hi 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_ssub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_bsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_hsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_ssub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_bsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_hsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_ssub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_bsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_hsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_ssub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64_then_sub_32 1, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_bsub -> FPR8 44, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 1, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_bsub -> FPR8 36, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_dsub -> FPR64 2, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_hsub -> FPR16 20, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_ssub -> FPR32 70, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub -> FPR128 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 1, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_bsub -> FPR8 44, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_dsub3 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_qsub3 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 55, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub -> QQ_with_qsub1_in_FPR128_lo 89, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 81, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 158, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo 122, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 100, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_4b 131, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 103, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 99, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_zsub3 -> ZPR2_with_dsub_in_FPR64_lo 57, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 80, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 121, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 54, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo 96, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub3 }, { // ZPR4_with_zsub1_in_ZPR_3b 1, // ZPR4_with_zsub1_in_ZPR_3b:bsub -> FPR8 36, // ZPR4_with_zsub1_in_ZPR_3b:dsub -> FPR64 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub0 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub1 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub2 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub3 2, // ZPR4_with_zsub1_in_ZPR_3b:hsub -> FPR16 0, // ZPR4_with_zsub1_in_ZPR_3b:psub0 0, // ZPR4_with_zsub1_in_ZPR_3b:psub1 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub0 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub1 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub2 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub3 20, // ZPR4_with_zsub1_in_ZPR_3b:ssub -> FPR32 0, // ZPR4_with_zsub1_in_ZPR_3b:sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b:sube32 0, // ZPR4_with_zsub1_in_ZPR_3b:sube64 0, // ZPR4_with_zsub1_in_ZPR_3b:subo32 0, // ZPR4_with_zsub1_in_ZPR_3b:subo64 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_0 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_1 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_2 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_3 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_4 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_5 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_6 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_7 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubb 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubd0 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubd1 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubh0 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubh1 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubs0 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubs1 70, // ZPR4_with_zsub1_in_ZPR_3b:zsub -> FPR128 71, // ZPR4_with_zsub1_in_ZPR_3b:zsub0 -> ZPR 75, // ZPR4_with_zsub1_in_ZPR_3b:zsub1 -> ZPR_3b 74, // ZPR4_with_zsub1_in_ZPR_3b:zsub2 -> ZPR_4b 74, // ZPR4_with_zsub1_in_ZPR_3b:zsub3 -> ZPR_4b 0, // ZPR4_with_zsub1_in_ZPR_3b:zsub_hi 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub1_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub1_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub1_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub3_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub3_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub3_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub2_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub2_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub2_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub1_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub1_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub1_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub1_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub3_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub3_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub3_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub2_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub2_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub2_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b:subo64_then_sub_32 1, // ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_zsub_hi 1, // ZPR4_with_zsub1_in_ZPR_3b:zsub3_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_3b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_3b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_3b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_3b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR4_with_zsub1_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub0_dsub1 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub1_dsub2 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub2_dsub3 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub0_qsub1 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub1_qsub2 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub2_qsub3 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b:sub_32_subo64_then_sub_32 55, // ZPR4_with_zsub1_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR4_with_zsub1_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_qsub1_in_FPR128_lo 92, // ZPR4_with_zsub1_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 81, // ZPR4_with_zsub1_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 164, // ZPR4_with_zsub1_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 122, // ZPR4_with_zsub1_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 105, // ZPR4_with_zsub1_in_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_3b 130, // ZPR4_with_zsub1_in_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPR_3b 104, // ZPR4_with_zsub1_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_3b 128, // ZPR4_with_zsub1_in_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPR_3b 102, // ZPR4_with_zsub1_in_ZPR_3b:zsub2_zsub3 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 57, // ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_zsub1_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_zsub1_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_3b:zsub0_zsub2 0, // ZPR4_with_zsub1_in_ZPR_3b:zsub1_zsub3 }, { // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 1, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:bsub -> FPR8 36, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub -> FPR64 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3 2, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:hsub -> FPR16 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3 20, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:ssub -> FPR32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube64 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubb 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1 70, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub -> FPR128 71, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0 -> ZPR 71, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1 -> ZPR 74, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2 -> ZPR_4b 74, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3 -> ZPR_4b 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_hi 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_ssub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_bsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_hsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_ssub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_bsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_dsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_hsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_ssub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_bsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_hsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_ssub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64_then_sub_32 1, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_bsub -> FPR8 36, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub -> FPR64 2, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_hsub -> FPR16 20, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_ssub -> FPR32 70, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub -> FPR128 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 1, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_bsub -> FPR8 44, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 1, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_bsub -> FPR8 44, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_dsub3 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_qsub3 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 53, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub -> DD 94, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub -> QQ 90, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 79, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub2_in_FPR64_lo 159, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 115, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub2_in_FPR128_lo 98, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1 -> ZPR2Mul2 133, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 100, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPR_4b 131, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 103, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_zsub3 -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 55, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub1_in_FPR64_lo 81, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 97, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_qsub1_in_FPR128_lo 122, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub2 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub3 }, { // ZPR4_with_zsub2_in_ZPR_3b 1, // ZPR4_with_zsub2_in_ZPR_3b:bsub -> FPR8 36, // ZPR4_with_zsub2_in_ZPR_3b:dsub -> FPR64 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub0 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub1 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub2 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub3 2, // ZPR4_with_zsub2_in_ZPR_3b:hsub -> FPR16 0, // ZPR4_with_zsub2_in_ZPR_3b:psub0 0, // ZPR4_with_zsub2_in_ZPR_3b:psub1 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub0 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub1 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub2 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub3 20, // ZPR4_with_zsub2_in_ZPR_3b:ssub -> FPR32 0, // ZPR4_with_zsub2_in_ZPR_3b:sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b:sube32 0, // ZPR4_with_zsub2_in_ZPR_3b:sube64 0, // ZPR4_with_zsub2_in_ZPR_3b:subo32 0, // ZPR4_with_zsub2_in_ZPR_3b:subo64 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_0 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_1 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_2 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_3 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_4 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_5 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_6 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_7 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubb 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubd0 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubd1 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubh0 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubh1 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubq0 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubq1 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubs0 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubs1 70, // ZPR4_with_zsub2_in_ZPR_3b:zsub -> FPR128 71, // ZPR4_with_zsub2_in_ZPR_3b:zsub0 -> ZPR 71, // ZPR4_with_zsub2_in_ZPR_3b:zsub1 -> ZPR 75, // ZPR4_with_zsub2_in_ZPR_3b:zsub2 -> ZPR_3b 74, // ZPR4_with_zsub2_in_ZPR_3b:zsub3 -> ZPR_4b 0, // ZPR4_with_zsub2_in_ZPR_3b:zsub_hi 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub1_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub1_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub1_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub3_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub3_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub3_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub2_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub2_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub2_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub1_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub1_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub1_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub1_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub3_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub3_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub3_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub3_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub2_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub2_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub2_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub2_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b:subo64_then_sub_32 1, // ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_bsub -> FPR8 36, // ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_dsub -> FPR64 2, // ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_hsub -> FPR16 20, // ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_ssub -> FPR32 70, // ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_zsub -> FPR128 0, // ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_zsub_hi 1, // ZPR4_with_zsub2_in_ZPR_3b:zsub3_then_bsub -> FPR8 44, // ZPR4_with_zsub2_in_ZPR_3b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub2_in_ZPR_3b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub2_in_ZPR_3b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub2_in_ZPR_3b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub2_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub0_dsub1 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub1_dsub2 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub2_dsub3 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub0_qsub1 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub1_qsub2 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub2_qsub3 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b:sub_32_subo64_then_sub_32 53, // ZPR4_with_zsub2_in_ZPR_3b:dsub_zsub1_then_dsub -> DD 94, // ZPR4_with_zsub2_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ 90, // ZPR4_with_zsub2_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 79, // ZPR4_with_zsub2_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub2_in_FPR64_lo 159, // ZPR4_with_zsub2_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 115, // ZPR4_with_zsub2_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub2_in_FPR128_lo 95, // ZPR4_with_zsub2_in_ZPR_3b:zsub0_zsub1 -> ZPR2 132, // ZPR4_with_zsub2_in_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPR_3b 105, // ZPR4_with_zsub2_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPR_3b 130, // ZPR4_with_zsub2_in_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPR_3b 104, // ZPR4_with_zsub2_in_ZPR_3b:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPR_3b 55, // ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub1_in_FPR64_lo 81, // ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 97, // ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_qsub1_in_FPR128_lo 122, // ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_zsub2_in_ZPR_3b:zsub0_zsub2 0, // ZPR4_with_zsub2_in_ZPR_3b:zsub1_zsub3 }, { // ZPR4_with_zsub3_in_ZPR_3b 1, // ZPR4_with_zsub3_in_ZPR_3b:bsub -> FPR8 36, // ZPR4_with_zsub3_in_ZPR_3b:dsub -> FPR64 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub0 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub1 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub2 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub3 2, // ZPR4_with_zsub3_in_ZPR_3b:hsub -> FPR16 0, // ZPR4_with_zsub3_in_ZPR_3b:psub0 0, // ZPR4_with_zsub3_in_ZPR_3b:psub1 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub0 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub1 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub2 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub3 20, // ZPR4_with_zsub3_in_ZPR_3b:ssub -> FPR32 0, // ZPR4_with_zsub3_in_ZPR_3b:sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b:sube32 0, // ZPR4_with_zsub3_in_ZPR_3b:sube64 0, // ZPR4_with_zsub3_in_ZPR_3b:subo32 0, // ZPR4_with_zsub3_in_ZPR_3b:subo64 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_0 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_1 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_2 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_3 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_4 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_5 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_6 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_7 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubb 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubd0 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubd1 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubh0 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubh1 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubq0 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubq1 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubs0 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubs1 70, // ZPR4_with_zsub3_in_ZPR_3b:zsub -> FPR128 71, // ZPR4_with_zsub3_in_ZPR_3b:zsub0 -> ZPR 71, // ZPR4_with_zsub3_in_ZPR_3b:zsub1 -> ZPR 71, // ZPR4_with_zsub3_in_ZPR_3b:zsub2 -> ZPR 75, // ZPR4_with_zsub3_in_ZPR_3b:zsub3 -> ZPR_3b 0, // ZPR4_with_zsub3_in_ZPR_3b:zsub_hi 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub1_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub1_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub1_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub3_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub3_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub3_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub2_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub2_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub2_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub3_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub3_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub3_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub3_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b:subo64_then_sub_32 1, // ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_bsub -> FPR8 36, // ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_dsub -> FPR64 2, // ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_hsub -> FPR16 20, // ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_ssub -> FPR32 70, // ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_zsub -> FPR128 0, // ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_zsub_hi 1, // ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_bsub -> FPR8 44, // ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_bsub -> FPR8 36, // ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_dsub -> FPR64 2, // ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_hsub -> FPR16 20, // ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_ssub -> FPR32 70, // ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_zsub -> FPR128 0, // ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub0_dsub1 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub1_dsub2 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub2_dsub3 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub0_qsub1 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub1_qsub2 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub2_qsub3 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b:sub_32_subo64_then_sub_32 53, // ZPR4_with_zsub3_in_ZPR_3b:dsub_zsub1_then_dsub -> DD 94, // ZPR4_with_zsub3_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ 87, // ZPR4_with_zsub3_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub3_in_FPR64_lo 76, // ZPR4_with_zsub3_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD 150, // ZPR4_with_zsub3_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub3_in_FPR128_lo 111, // ZPR4_with_zsub3_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ 95, // ZPR4_with_zsub3_in_ZPR_3b:zsub0_zsub1 -> ZPR2 112, // ZPR4_with_zsub3_in_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3 95, // ZPR4_with_zsub3_in_ZPR_3b:zsub1_zsub2 -> ZPR2 132, // ZPR4_with_zsub3_in_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPR_3b 105, // ZPR4_with_zsub3_in_ZPR_3b:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPR_3b 53, // ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD 79, // ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub2_in_FPR64_lo 94, // ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ 115, // ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_qsub2_in_FPR128_lo 55, // ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_zsub3_in_ZPR_3b:zsub0_zsub2 0, // ZPR4_with_zsub3_in_ZPR_3b:zsub1_zsub3 }, { // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 1, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:bsub -> FPR8 36, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub -> FPR64 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3 2, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:hsub -> FPR16 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:psub0 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:psub1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3 20, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:ssub -> FPR32 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sube32 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sube64 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo32 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo64 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_0 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_3 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_5 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_7 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubb 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd0 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh0 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubq0 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubq1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs0 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1 70, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub -> FPR128 71, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0 -> ZPR 71, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1 -> ZPR 71, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2 -> ZPR 74, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3 -> ZPR_4b 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_hi 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd0 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd0 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs0 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_7_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_5_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_3_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_1_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo64_then_sub_32 1, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_bsub -> FPR8 36, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub -> FPR64 2, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_hsub -> FPR16 20, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_ssub -> FPR32 70, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub -> FPR128 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_hi 1, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_bsub -> FPR8 44, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_zsub_hi 1, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_bsub -> FPR8 36, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_dsub -> FPR64 2, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_hsub -> FPR16 20, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_ssub -> FPR32 70, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub -> FPR128 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub_hi 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0_dsub1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_dsub2 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_dsub3 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0_qsub1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_qsub2 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_qsub3 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_0_x8sub_1 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_x8sub_3 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_x8sub_5 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_x8sub_7 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32_subo64_then_sub_32 53, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub -> DD 94, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub -> QQ 87, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub3_in_FPR64_lo 76, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD 150, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub3_in_FPR128_lo 111, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ 95, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub1 -> ZPR2 119, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 98, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub2 -> ZPR2Mul2 133, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 100, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPR_4b 53, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub -> DD 79, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub2_in_FPR64_lo 94, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub -> QQ 115, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_qsub2_in_FPR128_lo 55, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub2 0, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub -> FPR64_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:hsub -> FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubb 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub -> FPR128_lo 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0 -> ZPR_4b 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1 -> ZPR_4b 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2 -> ZPR_4b 71, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3 -> ZPR 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64_then_sub_32 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_bsub -> FPR8 36, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_dsub -> FPR64 2, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_hsub -> FPR16 20, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_ssub -> FPR32 70, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub -> FPR128 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 91, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 163, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 102, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 135, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 103, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 129, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 99, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_zsub3 -> ZPR2_with_dsub_in_FPR64_lo 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 80, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 121, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo 54, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo 96, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub -> FPR64_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub3 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:hsub -> FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:psub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:psub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub3 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:sube32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:sube64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:subo32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:subo64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_4 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_6 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubb 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubh0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubh1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubs1 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub -> FPR128_lo 75, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub0 -> ZPR_3b 75, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub1 -> ZPR_3b 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub2 -> ZPR_4b 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub3 -> ZPR_4b 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:subo64_then_sub_32 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub3_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub0_dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub0_qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:sub_32_subo64_then_sub_32 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 93, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 167, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 106, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 134, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 104, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_3b 128, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPR_3b 102, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub2_zsub3 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub0_zsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b:zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub -> FPR64_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:hsub -> FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:psub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sube64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubb 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub -> FPR128_lo 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0 -> ZPR_4b 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1 -> ZPR_4b 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2 -> ZPR_4b 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3 -> ZPR_4b 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:subo64_then_sub_32 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 93, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 167, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 103, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 102, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 135, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 103, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_zsub3 -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub0_zsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo:zsub1_zsub3 }, { // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b 1, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:bsub -> FPR8 36, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub -> FPR64 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub3 2, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:hsub -> FPR16 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:psub0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:psub1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub3 20, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:ssub -> FPR32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:sube32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:sube64 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:subo32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:subo64 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_2 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_3 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_4 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_5 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_6 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_7 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubb 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubd0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubd1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubs0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubs1 70, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub -> FPR128 71, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub0 -> ZPR 75, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1 -> ZPR_3b 75, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2 -> ZPR_3b 74, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub3 -> ZPR_4b 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub_hi 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub1_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub1_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub1_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub3_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub3_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub3_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub2_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub2_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub2_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub1_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub1_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub1_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub1_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub3_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub3_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub3_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub2_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub2_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub2_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:subo64_then_sub_32 1, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_zsub_hi 1, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub3_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub0_dsub1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub1_dsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub2_dsub3 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub0_qsub1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub1_qsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub2_qsub3 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:sub_32_subo64_then_sub_32 55, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_qsub1_in_FPR128_lo 92, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 81, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 164, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 122, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 105, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_3b 136, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 106, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 134, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 104, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPR_3b 57, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub0_zsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_zsub3 }, { // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 1, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:bsub -> FPR8 36, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub -> FPR64 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3 2, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:hsub -> FPR16 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:psub0 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:psub1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3 20, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:ssub -> FPR32 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sube32 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sube64 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo32 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo64 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubb 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd0 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh0 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs0 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1 70, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub -> FPR128 71, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0 -> ZPR 74, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1 -> ZPR_4b 74, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2 -> ZPR_4b 74, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3 -> ZPR_4b 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_hi 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs0 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo64_then_sub_32 1, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_hi 1, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_zsub_hi 1, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub_hi 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_dsub3 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_qsub3 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0_x8sub_1 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_x8sub_3 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_x8sub_5 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_x8sub_7 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_subo64_then_sub_32 55, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub -> QQ_with_qsub1_in_FPR128_lo 92, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 81, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 164, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 122, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 100, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_4b 131, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 103, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 102, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_zsub3 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 57, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub2 0, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub3 }, { // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 1, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:bsub -> FPR8 36, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub -> FPR64 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub0 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub2 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub3 2, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:hsub -> FPR16 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:psub0 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:psub1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub0 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub3 20, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:ssub -> FPR32 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:sube32 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:sube64 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:subo32 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:subo64 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_0 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_2 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_3 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_4 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_5 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_6 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_7 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubb 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubd0 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubd1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh0 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubq0 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubq1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs0 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1 70, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub -> FPR128 71, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub0 -> ZPR 71, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1 -> ZPR 75, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2 -> ZPR_3b 75, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3 -> ZPR_3b 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub_hi 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub1_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub1_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub1_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub3_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub3_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub3_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub2_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub2_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub2_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub3_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub3_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub3_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub3_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_bsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_hsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_ssub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:subo64_then_sub_32 1, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_bsub -> FPR8 36, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_dsub -> FPR64 2, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_hsub -> FPR16 20, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_ssub -> FPR32 70, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_zsub -> FPR128 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_zsub_hi 1, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_bsub -> FPR8 44, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub0_dsub1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub1_dsub2 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub2_dsub3 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub0_qsub1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_qsub2 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2_qsub3 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:sub_32_subo64_then_sub_32 53, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub_zsub1_then_dsub -> DD 94, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ 90, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 79, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub2_in_FPR64_lo 159, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 115, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub2_in_FPR128_lo 95, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub0_zsub1 -> ZPR2 132, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPR_3b 105, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPR_3b 136, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 106, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_zsub3 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 55, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub1_in_FPR64_lo 81, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 97, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_qsub1_in_FPR128_lo 122, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub0_zsub2 0, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub -> FPR64_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub3 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:hsub -> FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:psub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:psub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub3 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:sube32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:sube64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:subo32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:subo64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_4 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_6 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubb 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubs1 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub -> FPR128_lo 75, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub0 -> ZPR_3b 75, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1 -> ZPR_3b 75, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2 -> ZPR_3b 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub3 -> ZPR_4b 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:subo64_then_sub_32 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub3_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub0_dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub0_qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:sub_32_subo64_then_sub_32 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 93, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 167, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 106, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 138, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 106, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 134, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b 104, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPR_3b 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub0_zsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b:zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 1, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub -> FPR64_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3 3, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:hsub -> FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:psub0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:psub1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3 24, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sube32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sube64 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo64 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubb 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1 72, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub -> FPR128_lo 74, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0 -> ZPR_4b 74, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1 -> ZPR_4b 74, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2 -> ZPR_4b 74, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3 -> ZPR_4b 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo64_then_sub_32 1, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0_x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_subo64_then_sub_32 57, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 93, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 167, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 102, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 135, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 103, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 102, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_zsub3 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 57, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub3 }, { // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b 1, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:bsub -> FPR8 36, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub -> FPR64 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub3 2, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:hsub -> FPR16 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:psub0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:psub1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub3 20, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:ssub -> FPR32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:sube32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:sube64 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:subo32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:subo64 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_2 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_3 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_4 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_5 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_6 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_7 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubb 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubd0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubd1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1 70, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub -> FPR128 71, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub0 -> ZPR 75, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1 -> ZPR_3b 75, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2 -> ZPR_3b 75, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3 -> ZPR_3b 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub_hi 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub1_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub1_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub1_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub3_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub3_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub3_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub2_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub2_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub2_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub3_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub3_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub3_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:subo64_then_sub_32 1, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_zsub_hi 1, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub0_dsub1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub1_dsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub2_dsub3 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub0_qsub1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_qsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2_qsub3 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:sub_32_subo64_then_sub_32 55, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_qsub1_in_FPR128_lo 92, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 81, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 164, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 122, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 105, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_3b 136, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b 106, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 138, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 106, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_zsub3 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 57, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub0_zsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub -> FPR64_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub3 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:hsub -> FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:psub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:psub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub3 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:sube32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:sube64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:subo32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:subo64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_4 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_6 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubb 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub -> FPR128_lo 75, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub0 -> ZPR_3b 75, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1 -> ZPR_3b 75, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2 -> ZPR_3b 75, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3 -> ZPR_3b 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:subo64_then_sub_32 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub0_dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub0_qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:sub_32_subo64_then_sub_32 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 93, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 167, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 106, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 138, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 106, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 138, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b 106, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_zsub3 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub0_zsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b:zsub1_zsub3 }, { // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo 1, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:bsub -> FPR8 44, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub -> FPR64_lo 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub0 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub2 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub3 3, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:hsub -> FPR16_lo 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:psub0 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:psub1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub0 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub2 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub3 24, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:sub_32 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:sube32 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:sube64 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:subo32 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:subo64 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_0 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_2 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_3 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_4 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_5 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_6 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_7 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubb 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubd0 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubd1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubh0 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubh1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubq0 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubq1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubs0 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubs1 72, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub -> FPR128_lo 74, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub0 -> ZPR_4b 74, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub1 -> ZPR_4b 74, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub2 -> ZPR_4b 74, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub3 -> ZPR_4b 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub_hi 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub2_then_ssub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub1_then_bsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub1_then_dsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub1_then_hsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub1_then_ssub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub3_then_bsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub3_then_dsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub3_then_hsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub3_then_ssub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub2_then_bsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub2_then_dsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub2_then_hsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub2_then_ssub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:subo64_then_sub_32 1, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub1_then_bsub -> FPR8 44, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub1_then_dsub -> FPR64_lo 3, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub1_then_hsub -> FPR16_lo 24, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub1_then_zsub -> FPR128_lo 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 1, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub3_then_bsub -> FPR8 44, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub3_then_dsub -> FPR64_lo 3, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub3_then_hsub -> FPR16_lo 24, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub3_then_zsub -> FPR128_lo 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 1, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub2_then_bsub -> FPR8 44, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub2_then_dsub -> FPR64_lo 3, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub2_then_hsub -> FPR16_lo 24, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub2_then_zsub -> FPR128_lo 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub2_dsub3 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub0_qsub1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub1_qsub2 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub2_qsub3 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 57, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 93, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 82, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 167, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 125, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 103, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 102, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 135, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 103, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub2_zsub3 -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 57, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub0_zsub2 0, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo:zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 1, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub -> FPR64_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3 3, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:hsub -> FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:psub0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:psub1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3 24, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sube32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sube64 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo64 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubb 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1 72, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub -> FPR128_lo 75, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0 -> ZPR_3b 74, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1 -> ZPR_4b 74, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2 -> ZPR_4b 74, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3 -> ZPR_4b 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo64_then_sub_32 1, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0_dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0_dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0_qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0_qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_0_x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32_subo64_then_sub_32 57, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 93, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 167, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 104, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub1 -> ZPR2_with_zsub0_in_ZPR_3b 139, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 103, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 137, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 102, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_zsub3 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b 57, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub3 }, { // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 1, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:bsub -> FPR8 44, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub -> FPR64_lo 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3 3, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:hsub -> FPR16_lo 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:psub0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:psub1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3 24, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sube32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sube64 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo64 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_3 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_5 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_7 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubb 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1 72, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub -> FPR128_lo 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0 -> ZPR_3b 75, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1 -> ZPR_3b 74, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2 -> ZPR_4b 74, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3 -> ZPR_4b 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_hi 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_bsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_hsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_ssub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_bsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_hsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_ssub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_bsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_hsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_ssub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_bsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_hsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_ssub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_bsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_hsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_ssub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_bsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_hsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_ssub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo64_then_sub_32 1, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_hi 1, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_bsub -> FPR8 44, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_dsub3 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_qsub3 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32_subo64_then_sub_32 57, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 93, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 82, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 167, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 125, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 107, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 104, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub0_in_ZPR_3b 139, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 103, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_zsub3 -> ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 57, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub2 0, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub3 }, { // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 1, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:bsub -> FPR8 36, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub -> FPR64 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3 2, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:hsub -> FPR16 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:psub0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:psub1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3 20, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:ssub -> FPR32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sube32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sube64 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo64 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_3 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_5 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_7 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubb 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1 70, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub -> FPR128 71, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0 -> ZPR 75, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1 -> ZPR_3b 75, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2 -> ZPR_3b 74, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3 -> ZPR_4b 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_hi 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_bsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_hsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_ssub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_bsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_hsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_ssub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_bsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_hsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_ssub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_bsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_hsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_ssub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_bsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_hsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_ssub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_bsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_hsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_ssub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo64_then_sub_32 1, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_hi 1, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_bsub -> FPR8 44, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_dsub3 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_qsub3 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32_subo64_then_sub_32 55, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_qsub1_in_FPR128_lo 92, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 81, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 164, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 122, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 105, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_3b 141, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 107, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 104, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPR_3b 57, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub2 0, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub3 }, { // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 1, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:bsub -> FPR8 36, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub -> FPR64 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3 2, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:hsub -> FPR16 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:psub0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:psub1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3 20, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:ssub -> FPR32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sube32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sube64 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo64 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_3 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_5 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_7 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubb 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubq0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubq1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1 70, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub -> FPR128 71, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0 -> ZPR 71, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1 -> ZPR 75, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2 -> ZPR_3b 75, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3 -> ZPR_3b 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_hi 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_bsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_hsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_ssub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_bsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_hsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_ssub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_bsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_hsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_ssub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_bsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_hsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_ssub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_bsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_dsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_hsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_ssub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_bsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_hsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_ssub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo64_then_sub_32 1, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_bsub -> FPR8 36, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub -> FPR64 2, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_hsub -> FPR16 20, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_ssub -> FPR32 70, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub -> FPR128 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_hi 1, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_bsub -> FPR8 44, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_dsub3 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_qsub3 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32_subo64_then_sub_32 53, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub -> DD 94, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ 90, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 79, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub2_in_FPR64_lo 159, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 115, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub2_in_FPR128_lo 98, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1 -> ZPR2Mul2 142, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 105, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_zsub1_in_ZPR_3b 141, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 107, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_zsub3 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 55, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub1_in_FPR64_lo 81, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 97, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_qsub1_in_FPR128_lo 122, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub2 0, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub3 }, { // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 1, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:bsub -> FPR8 36, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub -> FPR64 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3 2, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:hsub -> FPR16 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:psub0 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:psub1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3 20, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:ssub -> FPR32 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sube32 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sube64 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo32 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo64 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_0 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_3 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_5 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_7 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubb 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd0 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh0 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubq0 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubq1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs0 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1 70, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub -> FPR128 71, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0 -> ZPR 71, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1 -> ZPR 71, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2 -> ZPR 75, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3 -> ZPR_3b 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_hi 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubd1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd0 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd0 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs0 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub3_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub3_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_bsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_hsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_ssub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_7_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_5_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_3_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_1_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:subo64_then_sub_32 1, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_bsub -> FPR8 36, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub -> FPR64 2, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_hsub -> FPR16 20, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_ssub -> FPR32 70, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub -> FPR128 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_hi 1, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_bsub -> FPR8 44, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub3_then_zsub_hi 1, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_bsub -> FPR8 36, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_dsub -> FPR64 2, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_hsub -> FPR16 20, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_ssub -> FPR32 70, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub -> FPR128 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub_hi 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0_dsub1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_dsub2 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub2_dsub3 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0_qsub1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_qsub2 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_qsub3 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_0_x8sub_1 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_x8sub_3 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_x8sub_5 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_x8sub_7 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:sub_32_subo64_then_sub_32 53, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub -> DD 94, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub -> QQ 87, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub3_in_FPR64_lo 76, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD 150, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub3_in_FPR128_lo 111, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ 95, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub1 -> ZPR2 119, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 98, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub2 -> ZPR2Mul2 142, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 105, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_zsub3 -> ZPR2_with_zsub1_in_ZPR_3b 53, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub -> DD 79, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub2_in_FPR64_lo 94, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub -> QQ 115, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_qsub2_in_FPR128_lo 55, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub0_zsub2 0, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2:zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub -> FPR64_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:hsub -> FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:psub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:psub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sube32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sube64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubb 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub -> FPR128_lo 75, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0 -> ZPR_3b 75, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1 -> ZPR_3b 75, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2 -> ZPR_3b 74, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3 -> ZPR_4b 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo64_then_sub_32 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32_subo64_then_sub_32 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 93, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 167, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 106, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 143, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 107, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 140, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 104, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_zsub3 -> ZPR2_with_zsub0_in_ZPR_3b 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub -> FPR64_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:hsub -> FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:psub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:psub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sube32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sube64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo64 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubb 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub -> FPR128_lo 75, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0 -> ZPR_3b 75, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1 -> ZPR_3b 75, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2 -> ZPR_3b 75, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3 -> ZPR_3b 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:subo64_then_sub_32 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:sub_32_subo64_then_sub_32 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 93, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 167, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 107, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 144, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 106, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 143, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 107, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_zsub3 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub0_zsub2 0, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b:zsub1_zsub3 }, { // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 1, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:bsub -> FPR8 36, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub -> FPR64 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3 2, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:hsub -> FPR16 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:psub0 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:psub1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3 20, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:ssub -> FPR32 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sube32 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sube64 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo32 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo64 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubb 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd0 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh0 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs0 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1 70, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub -> FPR128 71, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0 -> ZPR 75, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1 -> ZPR_3b 75, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2 -> ZPR_3b 75, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3 -> ZPR_3b 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_hi 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs0 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_bsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_hsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_ssub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo64_then_sub_32 1, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_hi 1, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_zsub_hi 1, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_bsub -> FPR8 44, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub_hi 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1_dsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2_dsub3 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_dsub3 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1_qsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2_qsub3 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_qsub3 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0_x8sub_1 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_x8sub_3 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_x8sub_5 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_x8sub_7 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_subo64_then_sub_32 55, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub -> DD_with_dsub1_in_FPR64_lo 97, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub -> QQ_with_qsub1_in_FPR128_lo 92, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 81, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 164, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo 122, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo 105, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1 -> ZPR2_with_zsub1_in_ZPR_3b 141, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1_zsub2 -> ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 107, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 144, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 106, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_zsub3 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 57, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub2 0, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub3 }, { // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b 1, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:bsub -> FPR8 44, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub -> FPR64_lo 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub0 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub2 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub3 3, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:hsub -> FPR16_lo 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:psub0 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:psub1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub0 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub2 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub3 24, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:sub_32 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:sube32 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:sube64 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:subo32 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:subo64 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_0 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_2 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_3 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_4 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_5 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_6 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_7 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubb 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubd0 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubd1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubh0 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubh1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubq0 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubq1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubs0 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubs1 72, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub -> FPR128_lo 75, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub0 -> ZPR_3b 75, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub1 -> ZPR_3b 75, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub2 -> ZPR_3b 75, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub3 -> ZPR_3b 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub_hi 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq0 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubd1_then_zasubq1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd0 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq0 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubs1_then_zasubq1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd0 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq0 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubq1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs0 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub1_then_bsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub1_then_hsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub1_then_ssub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub3_then_bsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub3_then_hsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub3_then_ssub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub2_then_bsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub2_then_hsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub2_then_ssub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub1_then_bsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub1_then_dsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub1_then_hsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub1_then_ssub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub3_then_bsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub3_then_dsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub3_then_hsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub3_then_ssub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub2_then_bsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub2_then_dsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub2_then_hsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub2_then_ssub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_7_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_5_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_3_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_1_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:subo64_then_sub_32 1, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_bsub -> FPR8 44, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_dsub -> FPR64_lo 3, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_hsub -> FPR16_lo 24, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_zsub -> FPR128_lo 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_zsub_hi 1, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub3_then_bsub -> FPR8 44, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub3_then_dsub -> FPR64_lo 3, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub3_then_hsub -> FPR16_lo 24, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub3_then_zsub -> FPR128_lo 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub3_then_zsub_hi 1, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub2_then_bsub -> FPR8 44, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub2_then_dsub -> FPR64_lo 3, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub2_then_hsub -> FPR16_lo 24, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub2_then_zsub -> FPR128_lo 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub2_then_zsub_hi 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub0_dsub1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub0_dsub1_dsub2 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub1_dsub2 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub1_dsub2_dsub3 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub2_dsub3 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub0_qsub1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub0_qsub1_qsub2 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub1_qsub2 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub1_qsub2_qsub3 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub2_qsub3 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:sub_32_x8sub_1_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_0_x8sub_1 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_2_x8sub_3 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_4_x8sub_5 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_6_x8sub_7 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:sub_32_subo64_then_sub_32 57, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 93, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 82, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 167, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 125, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 107, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub0_zsub1 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 144, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub0_zsub1_zsub2 -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 106, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub1_zsub2 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 143, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub1_zsub2_zsub3 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 107, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub2_zsub3 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 57, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub0_zsub2 0, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b:zsub1_zsub3 }, { // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 1, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub -> FPR64_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3 3, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:hsub -> FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:psub0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:psub1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3 24, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sube32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sube64 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo64 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubb 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1 72, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub -> FPR128_lo 75, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0 -> ZPR_3b 75, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1 -> ZPR_3b 75, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2 -> ZPR_3b 75, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3 -> ZPR_3b 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub3_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_bsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_hsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_ssub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:subo64_then_sub_32 1, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub3_then_zsub_hi 1, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_bsub -> FPR8 44, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_dsub -> FPR64_lo 3, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_hsub -> FPR16_lo 24, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub -> FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub_hi 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub0_dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub1_dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub2_dsub3 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub0_qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_qsub3 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_x8sub_1_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_0_x8sub_1 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_x8sub_3 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_x8sub_5 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_x8sub_7 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:sub_32_subo64_then_sub_32 57, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 93, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:dsub_zsub1_then_dsub_zsub2_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 167, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub_zsub1_then_zsub_zsub2_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 106, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 143, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub1_zsub2 -> ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 107, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2 -> ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b 144, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub2_zsub3 -> ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo 106, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_zsub3 -> ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b 57, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 82, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub -> DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 125, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub -> QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo 57, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_dsub_zsub3_then_dsub -> DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo 101, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub2_then_zsub_zsub3_then_zsub -> QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub0_zsub2 0, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2:zsub1_zsub3 }, { // GPR64x8Class 0, // GPR64x8Class:bsub 0, // GPR64x8Class:dsub 0, // GPR64x8Class:dsub0 0, // GPR64x8Class:dsub1 0, // GPR64x8Class:dsub2 0, // GPR64x8Class:dsub3 0, // GPR64x8Class:hsub 0, // GPR64x8Class:psub0 0, // GPR64x8Class:psub1 0, // GPR64x8Class:qsub0 0, // GPR64x8Class:qsub1 0, // GPR64x8Class:qsub2 0, // GPR64x8Class:qsub3 0, // GPR64x8Class:ssub 23, // GPR64x8Class:sub_32 -> GPR32common 0, // GPR64x8Class:sube32 0, // GPR64x8Class:sube64 0, // GPR64x8Class:subo32 0, // GPR64x8Class:subo64 39, // GPR64x8Class:x8sub_0 -> GPR64common 39, // GPR64x8Class:x8sub_1 -> GPR64common 39, // GPR64x8Class:x8sub_2 -> GPR64common 39, // GPR64x8Class:x8sub_3 -> GPR64common 39, // GPR64x8Class:x8sub_4 -> GPR64common 39, // GPR64x8Class:x8sub_5 -> GPR64common 39, // GPR64x8Class:x8sub_6 -> GPR64common 39, // GPR64x8Class:x8sub_7 -> GPR64common 0, // GPR64x8Class:zasubb 0, // GPR64x8Class:zasubd0 0, // GPR64x8Class:zasubd1 0, // GPR64x8Class:zasubh0 0, // GPR64x8Class:zasubh1 0, // GPR64x8Class:zasubq0 0, // GPR64x8Class:zasubq1 0, // GPR64x8Class:zasubs0 0, // GPR64x8Class:zasubs1 0, // GPR64x8Class:zsub 0, // GPR64x8Class:zsub0 0, // GPR64x8Class:zsub1 0, // GPR64x8Class:zsub2 0, // GPR64x8Class:zsub3 0, // GPR64x8Class:zsub_hi 0, // GPR64x8Class:zasubd1_then_zasubq0 0, // GPR64x8Class:zasubd1_then_zasubq1 0, // GPR64x8Class:zasubs1_then_zasubd0 0, // GPR64x8Class:zasubs1_then_zasubd1 0, // GPR64x8Class:zasubs1_then_zasubq0 0, // GPR64x8Class:zasubs1_then_zasubq1 0, // GPR64x8Class:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class:zasubh1_then_zasubd0 0, // GPR64x8Class:zasubh1_then_zasubd1 0, // GPR64x8Class:zasubh1_then_zasubq0 0, // GPR64x8Class:zasubh1_then_zasubq1 0, // GPR64x8Class:zasubh1_then_zasubs0 0, // GPR64x8Class:zasubh1_then_zasubs1 0, // GPR64x8Class:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class:dsub1_then_bsub 0, // GPR64x8Class:dsub1_then_hsub 0, // GPR64x8Class:dsub1_then_ssub 0, // GPR64x8Class:dsub3_then_bsub 0, // GPR64x8Class:dsub3_then_hsub 0, // GPR64x8Class:dsub3_then_ssub 0, // GPR64x8Class:dsub2_then_bsub 0, // GPR64x8Class:dsub2_then_hsub 0, // GPR64x8Class:dsub2_then_ssub 0, // GPR64x8Class:qsub1_then_bsub 0, // GPR64x8Class:qsub1_then_dsub 0, // GPR64x8Class:qsub1_then_hsub 0, // GPR64x8Class:qsub1_then_ssub 0, // GPR64x8Class:qsub3_then_bsub 0, // GPR64x8Class:qsub3_then_dsub 0, // GPR64x8Class:qsub3_then_hsub 0, // GPR64x8Class:qsub3_then_ssub 0, // GPR64x8Class:qsub2_then_bsub 0, // GPR64x8Class:qsub2_then_dsub 0, // GPR64x8Class:qsub2_then_hsub 0, // GPR64x8Class:qsub2_then_ssub 23, // GPR64x8Class:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class:subo64_then_sub_32 0, // GPR64x8Class:zsub1_then_bsub 0, // GPR64x8Class:zsub1_then_dsub 0, // GPR64x8Class:zsub1_then_hsub 0, // GPR64x8Class:zsub1_then_ssub 0, // GPR64x8Class:zsub1_then_zsub 0, // GPR64x8Class:zsub1_then_zsub_hi 0, // GPR64x8Class:zsub3_then_bsub 0, // GPR64x8Class:zsub3_then_dsub 0, // GPR64x8Class:zsub3_then_hsub 0, // GPR64x8Class:zsub3_then_ssub 0, // GPR64x8Class:zsub3_then_zsub 0, // GPR64x8Class:zsub3_then_zsub_hi 0, // GPR64x8Class:zsub2_then_bsub 0, // GPR64x8Class:zsub2_then_dsub 0, // GPR64x8Class:zsub2_then_hsub 0, // GPR64x8Class:zsub2_then_ssub 0, // GPR64x8Class:zsub2_then_zsub 0, // GPR64x8Class:zsub2_then_zsub_hi 0, // GPR64x8Class:dsub0_dsub1 0, // GPR64x8Class:dsub0_dsub1_dsub2 0, // GPR64x8Class:dsub1_dsub2 0, // GPR64x8Class:dsub1_dsub2_dsub3 0, // GPR64x8Class:dsub2_dsub3 0, // GPR64x8Class:dsub_qsub1_then_dsub 0, // GPR64x8Class:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class:qsub0_qsub1 0, // GPR64x8Class:qsub0_qsub1_qsub2 0, // GPR64x8Class:qsub1_qsub2 0, // GPR64x8Class:qsub1_qsub2_qsub3 0, // GPR64x8Class:qsub2_qsub3 0, // GPR64x8Class:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 58, // GPR64x8Class:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class:sub_32_subo64_then_sub_32 0, // GPR64x8Class:dsub_zsub1_then_dsub 0, // GPR64x8Class:zsub_zsub1_then_zsub 0, // GPR64x8Class:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class:zsub0_zsub1 0, // GPR64x8Class:zsub0_zsub1_zsub2 0, // GPR64x8Class:zsub1_zsub2 0, // GPR64x8Class:zsub1_zsub2_zsub3 0, // GPR64x8Class:zsub2_zsub3 0, // GPR64x8Class:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class:zsub0_zsub2 0, // GPR64x8Class:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_GPR64noip 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:subo64 41, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_0 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_2 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_3 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_4 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_5 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 60, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_0 -> GPR64common 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1 -> GPR64common 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4 -> GPR64common 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5 -> GPR64common 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 58, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> GPR64common 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> GPR64common 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> GPR64common 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 58, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 39, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64common 39, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common 39, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common 39, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common 39, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common 39, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common 41, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 58, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64 41, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_0 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 60, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 41, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common 41, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 60, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 41, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common 41, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 60, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_tcGPR64 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:psub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:psub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:ssub 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:sube32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:sube64 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:subo32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:subo64 42, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_0 -> tcGPR64 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_1 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_2 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_3 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_4 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_5 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubb 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubs0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubs1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 61, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPR64 58, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> GPR64common 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> GPR64common 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 58, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64common 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 58, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64common 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 58, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:psub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:psub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:ssub 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:sube32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:sube64 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:subo32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:subo64 43, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_0 -> GPR64noip_and_tcGPR64 41, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_1 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_2 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_3 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_4 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_5 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubb 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubh0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubh1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubs0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubs1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 62, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 58, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64 42, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_0 -> tcGPR64 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1 -> GPR64common 41, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 61, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPR64 60, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 42, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> tcGPR64 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common 41, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 61, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPR64 58, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 42, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPR64 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common 41, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 61, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPR64 58, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_1_in_tcGPR64 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:psub0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:psub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:ssub 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:sube32 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:sube64 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:subo32 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:subo64 42, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_0 -> tcGPR64 42, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_1 -> tcGPR64 42, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_2 -> tcGPR64 39, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_3 -> GPR64common 39, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_4 -> GPR64common 39, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_5 -> GPR64common 39, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubb 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubd0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubd1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubs0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubs1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_1_in_tcGPR64:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 63, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPR64 61, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_tcGPR64 58, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_1_in_tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64common 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 58, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_0 -> GPR64noip_and_tcGPR64 41, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 62, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 60, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> GPR64noip_and_tcGPR64 41, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common 41, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 62, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 58, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 43, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64noip_and_tcGPR64 41, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common 39, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common 41, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 62, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 58, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:bsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub0 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub2 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub3 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:hsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:psub0 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:psub1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub0 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub2 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub3 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:ssub 23, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:sube32 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:sube64 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:subo32 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:subo64 43, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_0 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_1 -> GPR64noip_and_tcGPR64 42, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_2 -> tcGPR64 42, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_3 -> tcGPR64 42, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_4 -> tcGPR64 39, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_5 -> GPR64common 39, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubb 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubd0 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubd1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubh0 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubh1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubq0 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubq1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubs0 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubs1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub0 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub2 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub3 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 64, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 63, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_tcGPR64 61, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_tcGPR64 58, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 42, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> tcGPR64 42, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> tcGPR64 42, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> tcGPR64 39, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common 41, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 63, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPR64 61, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_tcGPR64 60, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 42, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPR64 42, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> tcGPR64 42, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> tcGPR64 39, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common 39, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common 39, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common 41, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 63, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPR64 61, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_tcGPR64 58, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 42, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> tcGPR64 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> GPR64common 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPR64 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 42, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPR64 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 61, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPR64 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:psub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:psub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:sube32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:sube64 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:subo32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:subo64 42, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_0 -> tcGPR64 42, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_1 -> tcGPR64 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_2 -> GPR64noip_and_tcGPR64 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_3 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_4 -> GPR64common 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_5 -> GPR64common 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubb 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubh0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubh1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 63, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPR64 62, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 58, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 58, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 42, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPR64 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPR64 58, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // ZPR4Strided 1, // ZPR4Strided:bsub -> FPR8 36, // ZPR4Strided:dsub -> FPR64 0, // ZPR4Strided:dsub0 0, // ZPR4Strided:dsub1 0, // ZPR4Strided:dsub2 0, // ZPR4Strided:dsub3 2, // ZPR4Strided:hsub -> FPR16 0, // ZPR4Strided:psub0 0, // ZPR4Strided:psub1 0, // ZPR4Strided:qsub0 0, // ZPR4Strided:qsub1 0, // ZPR4Strided:qsub2 0, // ZPR4Strided:qsub3 20, // ZPR4Strided:ssub -> FPR32 0, // ZPR4Strided:sub_32 0, // ZPR4Strided:sube32 0, // ZPR4Strided:sube64 0, // ZPR4Strided:subo32 0, // ZPR4Strided:subo64 0, // ZPR4Strided:x8sub_0 0, // ZPR4Strided:x8sub_1 0, // ZPR4Strided:x8sub_2 0, // ZPR4Strided:x8sub_3 0, // ZPR4Strided:x8sub_4 0, // ZPR4Strided:x8sub_5 0, // ZPR4Strided:x8sub_6 0, // ZPR4Strided:x8sub_7 0, // ZPR4Strided:zasubb 0, // ZPR4Strided:zasubd0 0, // ZPR4Strided:zasubd1 0, // ZPR4Strided:zasubh0 0, // ZPR4Strided:zasubh1 0, // ZPR4Strided:zasubq0 0, // ZPR4Strided:zasubq1 0, // ZPR4Strided:zasubs0 0, // ZPR4Strided:zasubs1 70, // ZPR4Strided:zsub -> FPR128 71, // ZPR4Strided:zsub0 -> ZPR 71, // ZPR4Strided:zsub1 -> ZPR 71, // ZPR4Strided:zsub2 -> ZPR 71, // ZPR4Strided:zsub3 -> ZPR 0, // ZPR4Strided:zsub_hi 0, // ZPR4Strided:zasubd1_then_zasubq0 0, // ZPR4Strided:zasubd1_then_zasubq1 0, // ZPR4Strided:zasubs1_then_zasubd0 0, // ZPR4Strided:zasubs1_then_zasubd1 0, // ZPR4Strided:zasubs1_then_zasubq0 0, // ZPR4Strided:zasubs1_then_zasubq1 0, // ZPR4Strided:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4Strided:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4Strided:zasubh1_then_zasubd0 0, // ZPR4Strided:zasubh1_then_zasubd1 0, // ZPR4Strided:zasubh1_then_zasubq0 0, // ZPR4Strided:zasubh1_then_zasubq1 0, // ZPR4Strided:zasubh1_then_zasubs0 0, // ZPR4Strided:zasubh1_then_zasubs1 0, // ZPR4Strided:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4Strided:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4Strided:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4Strided:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4Strided:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4Strided:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4Strided:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4Strided:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4Strided:dsub1_then_bsub 0, // ZPR4Strided:dsub1_then_hsub 0, // ZPR4Strided:dsub1_then_ssub 0, // ZPR4Strided:dsub3_then_bsub 0, // ZPR4Strided:dsub3_then_hsub 0, // ZPR4Strided:dsub3_then_ssub 0, // ZPR4Strided:dsub2_then_bsub 0, // ZPR4Strided:dsub2_then_hsub 0, // ZPR4Strided:dsub2_then_ssub 0, // ZPR4Strided:qsub1_then_bsub 0, // ZPR4Strided:qsub1_then_dsub 0, // ZPR4Strided:qsub1_then_hsub 0, // ZPR4Strided:qsub1_then_ssub 0, // ZPR4Strided:qsub3_then_bsub 0, // ZPR4Strided:qsub3_then_dsub 0, // ZPR4Strided:qsub3_then_hsub 0, // ZPR4Strided:qsub3_then_ssub 0, // ZPR4Strided:qsub2_then_bsub 0, // ZPR4Strided:qsub2_then_dsub 0, // ZPR4Strided:qsub2_then_hsub 0, // ZPR4Strided:qsub2_then_ssub 0, // ZPR4Strided:x8sub_7_then_sub_32 0, // ZPR4Strided:x8sub_6_then_sub_32 0, // ZPR4Strided:x8sub_5_then_sub_32 0, // ZPR4Strided:x8sub_4_then_sub_32 0, // ZPR4Strided:x8sub_3_then_sub_32 0, // ZPR4Strided:x8sub_2_then_sub_32 0, // ZPR4Strided:x8sub_1_then_sub_32 0, // ZPR4Strided:subo64_then_sub_32 1, // ZPR4Strided:zsub1_then_bsub -> FPR8 36, // ZPR4Strided:zsub1_then_dsub -> FPR64 2, // ZPR4Strided:zsub1_then_hsub -> FPR16 20, // ZPR4Strided:zsub1_then_ssub -> FPR32 70, // ZPR4Strided:zsub1_then_zsub -> FPR128 0, // ZPR4Strided:zsub1_then_zsub_hi 1, // ZPR4Strided:zsub3_then_bsub -> FPR8 36, // ZPR4Strided:zsub3_then_dsub -> FPR64 2, // ZPR4Strided:zsub3_then_hsub -> FPR16 20, // ZPR4Strided:zsub3_then_ssub -> FPR32 70, // ZPR4Strided:zsub3_then_zsub -> FPR128 0, // ZPR4Strided:zsub3_then_zsub_hi 1, // ZPR4Strided:zsub2_then_bsub -> FPR8 36, // ZPR4Strided:zsub2_then_dsub -> FPR64 2, // ZPR4Strided:zsub2_then_hsub -> FPR16 20, // ZPR4Strided:zsub2_then_ssub -> FPR32 70, // ZPR4Strided:zsub2_then_zsub -> FPR128 0, // ZPR4Strided:zsub2_then_zsub_hi 0, // ZPR4Strided:dsub0_dsub1 0, // ZPR4Strided:dsub0_dsub1_dsub2 0, // ZPR4Strided:dsub1_dsub2 0, // ZPR4Strided:dsub1_dsub2_dsub3 0, // ZPR4Strided:dsub2_dsub3 0, // ZPR4Strided:dsub_qsub1_then_dsub 0, // ZPR4Strided:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4Strided:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4Strided:qsub0_qsub1 0, // ZPR4Strided:qsub0_qsub1_qsub2 0, // ZPR4Strided:qsub1_qsub2 0, // ZPR4Strided:qsub1_qsub2_qsub3 0, // ZPR4Strided:qsub2_qsub3 0, // ZPR4Strided:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4Strided:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4Strided:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4Strided:sub_32_x8sub_1_then_sub_32 0, // ZPR4Strided:x8sub_0_x8sub_1 0, // ZPR4Strided:x8sub_2_x8sub_3 0, // ZPR4Strided:x8sub_4_x8sub_5 0, // ZPR4Strided:x8sub_6_x8sub_7 0, // ZPR4Strided:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4Strided:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4Strided:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4Strided:sub_32_subo64_then_sub_32 0, // ZPR4Strided:dsub_zsub1_then_dsub 0, // ZPR4Strided:zsub_zsub1_then_zsub 0, // ZPR4Strided:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR4Strided:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // ZPR4Strided:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR4Strided:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // ZPR4Strided:zsub0_zsub1 0, // ZPR4Strided:zsub0_zsub1_zsub2 0, // ZPR4Strided:zsub1_zsub2 0, // ZPR4Strided:zsub1_zsub2_zsub3 0, // ZPR4Strided:zsub2_zsub3 0, // ZPR4Strided:zsub1_then_dsub_zsub2_then_dsub 0, // ZPR4Strided:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR4Strided:zsub1_then_zsub_zsub2_then_zsub 0, // ZPR4Strided:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR4Strided:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR4Strided:zsub2_then_zsub_zsub3_then_zsub 108, // ZPR4Strided:zsub0_zsub2 -> ZPR2Strided 108, // ZPR4Strided:zsub1_zsub3 -> ZPR2Strided }, { // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64noip_and_tcGPR64 42, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> tcGPR64 42, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> tcGPR64 42, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> tcGPR64 39, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common 41, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 64, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 63, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_tcGPR64 61, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_tcGPR64 60, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> GPR64noip_and_tcGPR64 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 62, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64noip_and_tcGPR64 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 62, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64 42, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0 -> tcGPR64 42, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1 -> tcGPR64 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2 -> GPR64noip_and_tcGPR64 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 63, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPR64 62, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 58, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 42, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPR64 42, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> tcGPR64 43, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64noip_and_tcGPR64 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common 39, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 63, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPR64 62, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 58, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:bsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub0 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub2 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub3 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:hsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:psub0 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:psub1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub0 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub2 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub3 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:ssub 23, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:sube32 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:sube64 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:subo32 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:subo64 43, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_0 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_1 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_2 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_3 -> GPR64noip_and_tcGPR64 42, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_4 -> tcGPR64 42, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_5 -> tcGPR64 42, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_6 -> tcGPR64 39, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubb 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubd0 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubd1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubh0 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubh1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubq0 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubq1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubs0 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubs1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub0 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub2 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub3 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub_hi 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 64, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 64, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 63, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_tcGPR64 61, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_tcGPR64 31, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64noip_and_tcGPR64 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 62, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 58, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64common 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 42, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPR64 42, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> tcGPR64 42, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> tcGPR64 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 63, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPR64 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_tcGPR64 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 42, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPR64 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 61, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_tcGPR64 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:psub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:psub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:sube32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:sube64 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:subo32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:subo64 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_0 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_1 -> GPR64noip_and_tcGPR64 42, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_2 -> tcGPR64 42, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_3 -> tcGPR64 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_4 -> GPR64noip_and_tcGPR64 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_5 -> GPR64common_and_GPR64noip 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_6 -> GPR64common 39, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubb 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubh0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubh1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 64, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 63, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_tcGPR64 62, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 58, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64noip_and_tcGPR64 42, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> tcGPR64 42, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> tcGPR64 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64noip_and_tcGPR64 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 64, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 63, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_tcGPR64 62, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> GPR64noip_and_tcGPR64 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 62, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:psub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sube64 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64 42, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0 -> tcGPR64 42, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1 -> tcGPR64 43, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2 -> GPR64noip_and_tcGPR64 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubb 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 63, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_tcGPR64 62, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:bsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub0 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub2 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub3 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:hsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:psub0 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:psub1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub0 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub2 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub3 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:ssub 23, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:sube32 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:sube64 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:subo32 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:subo64 43, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_0 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_1 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_2 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_3 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_4 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_5 -> GPR64noip_and_tcGPR64 42, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_6 -> tcGPR64 42, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_7 -> tcGPR64 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubb 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubd0 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubd1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubh0 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubh1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubq0 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubq1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubs0 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubs1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub0 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub2 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub3 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub_hi 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 64, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 64, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 64, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 63, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_tcGPR64 31, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:psub0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:psub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:ssub 23, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:sube32 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:sube64 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:subo32 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:subo64 43, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_0 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_1 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_2 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_3 -> GPR64noip_and_tcGPR64 42, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_4 -> tcGPR64 42, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_5 -> tcGPR64 43, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_6 -> GPR64noip_and_tcGPR64 41, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubb 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubd0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubd1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubh0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubh1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubs0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubs1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 64, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 64, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 63, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_tcGPR64 62, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 31, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:bsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub0 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub2 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub3 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:hsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:psub0 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:psub1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub0 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub2 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub3 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:ssub 23, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:sube32 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:sube64 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:subo32 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:subo64 43, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_0 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_1 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_2 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_3 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_4 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_5 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_6 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_7 -> GPR64noip_and_tcGPR64 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubb 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubd0 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubd1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubh0 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubh1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubq0 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubq1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubs0 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubs1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub0 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub2 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub3 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub_hi 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 64, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 64, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 64, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 64, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 31, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64:zsub1_zsub3 }, { // GPR64x8Class_with_sub_32_in_GPR32arg 0, // GPR64x8Class_with_sub_32_in_GPR32arg:bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub0 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub3 0, // GPR64x8Class_with_sub_32_in_GPR32arg:hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:psub0 0, // GPR64x8Class_with_sub_32_in_GPR32arg:psub1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub0 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub3 0, // GPR64x8Class_with_sub_32_in_GPR32arg:ssub 25, // GPR64x8Class_with_sub_32_in_GPR32arg:sub_32 -> GPR32arg 0, // GPR64x8Class_with_sub_32_in_GPR32arg:sube32 0, // GPR64x8Class_with_sub_32_in_GPR32arg:sube64 0, // GPR64x8Class_with_sub_32_in_GPR32arg:subo32 0, // GPR64x8Class_with_sub_32_in_GPR32arg:subo64 45, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_0 -> GPR64arg 45, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_1 -> GPR64arg 43, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_2 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_3 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_4 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_5 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_6 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_7 -> GPR64noip_and_tcGPR64 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubb 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubd0 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubd1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh0 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubq0 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubq1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubs0 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubs1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub0 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub3 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub_hi 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubs1_then_zasubd0 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubs1_then_zasubd1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubs1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubs1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubd0 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubd1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubs0 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub1_then_bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub1_then_hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub1_then_ssub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub3_then_bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub3_then_hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub3_then_ssub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub2_then_bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub2_then_hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub2_then_ssub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub1_then_bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub1_then_hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub1_then_ssub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub3_then_bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub3_then_hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub3_then_ssub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub2_then_bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub2_then_hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub2_then_ssub 23, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_2_then_sub_32 -> GPR32common 25, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_1_then_sub_32 -> GPR32arg 0, // GPR64x8Class_with_sub_32_in_GPR32arg:subo64_then_sub_32 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub1_then_bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub1_then_hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub1_then_ssub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub1_then_zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub1_then_zsub_hi 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub3_then_bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub3_then_hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub3_then_ssub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub3_then_zsub_hi 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub2_then_bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub2_then_hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub2_then_ssub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub2_then_zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub2_then_zsub_hi 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub0_dsub1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub1_dsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub2_dsub3 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub0_qsub1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub1_qsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub2_qsub3 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:qsub2_then_dsub_qsub3_then_dsub 32, // GPR64x8Class_with_sub_32_in_GPR32arg:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 65, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sub_32_in_GPR32arg 64, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 64, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 64, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 31, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_sub_32_in_GPR32arg:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_sub_32_in_GPR32arg:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub0_zsub1 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub1_zsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub2_zsub3 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub0_zsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg:zsub1_zsub3 }, { // MPR32 0, // MPR32:bsub 0, // MPR32:dsub 0, // MPR32:dsub0 0, // MPR32:dsub1 0, // MPR32:dsub2 0, // MPR32:dsub3 0, // MPR32:hsub 0, // MPR32:psub0 0, // MPR32:psub1 0, // MPR32:qsub0 0, // MPR32:qsub1 0, // MPR32:qsub2 0, // MPR32:qsub3 0, // MPR32:ssub 0, // MPR32:sub_32 0, // MPR32:sube32 0, // MPR32:sube64 0, // MPR32:subo32 0, // MPR32:subo64 0, // MPR32:x8sub_0 0, // MPR32:x8sub_1 0, // MPR32:x8sub_2 0, // MPR32:x8sub_3 0, // MPR32:x8sub_4 0, // MPR32:x8sub_5 0, // MPR32:x8sub_6 0, // MPR32:x8sub_7 0, // MPR32:zasubb 109, // MPR32:zasubd0 -> MPR64 109, // MPR32:zasubd1 -> MPR64 0, // MPR32:zasubh0 0, // MPR32:zasubh1 73, // MPR32:zasubq0 -> MPR128 73, // MPR32:zasubq1 -> MPR128 0, // MPR32:zasubs0 0, // MPR32:zasubs1 0, // MPR32:zsub 0, // MPR32:zsub0 0, // MPR32:zsub1 0, // MPR32:zsub2 0, // MPR32:zsub3 0, // MPR32:zsub_hi 73, // MPR32:zasubd1_then_zasubq0 -> MPR128 73, // MPR32:zasubd1_then_zasubq1 -> MPR128 0, // MPR32:zasubs1_then_zasubd0 0, // MPR32:zasubs1_then_zasubd1 0, // MPR32:zasubs1_then_zasubq0 0, // MPR32:zasubs1_then_zasubq1 0, // MPR32:zasubs1_then_zasubd1_then_zasubq0 0, // MPR32:zasubs1_then_zasubd1_then_zasubq1 0, // MPR32:zasubh1_then_zasubd0 0, // MPR32:zasubh1_then_zasubd1 0, // MPR32:zasubh1_then_zasubq0 0, // MPR32:zasubh1_then_zasubq1 0, // MPR32:zasubh1_then_zasubs0 0, // MPR32:zasubh1_then_zasubs1 0, // MPR32:zasubh1_then_zasubd1_then_zasubq0 0, // MPR32:zasubh1_then_zasubd1_then_zasubq1 0, // MPR32:zasubh1_then_zasubs1_then_zasubd0 0, // MPR32:zasubh1_then_zasubs1_then_zasubd1 0, // MPR32:zasubh1_then_zasubs1_then_zasubq0 0, // MPR32:zasubh1_then_zasubs1_then_zasubq1 0, // MPR32:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // MPR32:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // MPR32:dsub1_then_bsub 0, // MPR32:dsub1_then_hsub 0, // MPR32:dsub1_then_ssub 0, // MPR32:dsub3_then_bsub 0, // MPR32:dsub3_then_hsub 0, // MPR32:dsub3_then_ssub 0, // MPR32:dsub2_then_bsub 0, // MPR32:dsub2_then_hsub 0, // MPR32:dsub2_then_ssub 0, // MPR32:qsub1_then_bsub 0, // MPR32:qsub1_then_dsub 0, // MPR32:qsub1_then_hsub 0, // MPR32:qsub1_then_ssub 0, // MPR32:qsub3_then_bsub 0, // MPR32:qsub3_then_dsub 0, // MPR32:qsub3_then_hsub 0, // MPR32:qsub3_then_ssub 0, // MPR32:qsub2_then_bsub 0, // MPR32:qsub2_then_dsub 0, // MPR32:qsub2_then_hsub 0, // MPR32:qsub2_then_ssub 0, // MPR32:x8sub_7_then_sub_32 0, // MPR32:x8sub_6_then_sub_32 0, // MPR32:x8sub_5_then_sub_32 0, // MPR32:x8sub_4_then_sub_32 0, // MPR32:x8sub_3_then_sub_32 0, // MPR32:x8sub_2_then_sub_32 0, // MPR32:x8sub_1_then_sub_32 0, // MPR32:subo64_then_sub_32 0, // MPR32:zsub1_then_bsub 0, // MPR32:zsub1_then_dsub 0, // MPR32:zsub1_then_hsub 0, // MPR32:zsub1_then_ssub 0, // MPR32:zsub1_then_zsub 0, // MPR32:zsub1_then_zsub_hi 0, // MPR32:zsub3_then_bsub 0, // MPR32:zsub3_then_dsub 0, // MPR32:zsub3_then_hsub 0, // MPR32:zsub3_then_ssub 0, // MPR32:zsub3_then_zsub 0, // MPR32:zsub3_then_zsub_hi 0, // MPR32:zsub2_then_bsub 0, // MPR32:zsub2_then_dsub 0, // MPR32:zsub2_then_hsub 0, // MPR32:zsub2_then_ssub 0, // MPR32:zsub2_then_zsub 0, // MPR32:zsub2_then_zsub_hi 0, // MPR32:dsub0_dsub1 0, // MPR32:dsub0_dsub1_dsub2 0, // MPR32:dsub1_dsub2 0, // MPR32:dsub1_dsub2_dsub3 0, // MPR32:dsub2_dsub3 0, // MPR32:dsub_qsub1_then_dsub 0, // MPR32:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // MPR32:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // MPR32:qsub0_qsub1 0, // MPR32:qsub0_qsub1_qsub2 0, // MPR32:qsub1_qsub2 0, // MPR32:qsub1_qsub2_qsub3 0, // MPR32:qsub2_qsub3 0, // MPR32:qsub1_then_dsub_qsub2_then_dsub 0, // MPR32:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // MPR32:qsub2_then_dsub_qsub3_then_dsub 0, // MPR32:sub_32_x8sub_1_then_sub_32 0, // MPR32:x8sub_0_x8sub_1 0, // MPR32:x8sub_2_x8sub_3 0, // MPR32:x8sub_4_x8sub_5 0, // MPR32:x8sub_6_x8sub_7 0, // MPR32:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // MPR32:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // MPR32:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // MPR32:sub_32_subo64_then_sub_32 0, // MPR32:dsub_zsub1_then_dsub 0, // MPR32:zsub_zsub1_then_zsub 0, // MPR32:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // MPR32:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // MPR32:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // MPR32:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // MPR32:zsub0_zsub1 0, // MPR32:zsub0_zsub1_zsub2 0, // MPR32:zsub1_zsub2 0, // MPR32:zsub1_zsub2_zsub3 0, // MPR32:zsub2_zsub3 0, // MPR32:zsub1_then_dsub_zsub2_then_dsub 0, // MPR32:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // MPR32:zsub1_then_zsub_zsub2_then_zsub 0, // MPR32:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // MPR32:zsub2_then_dsub_zsub3_then_dsub 0, // MPR32:zsub2_then_zsub_zsub3_then_zsub 0, // MPR32:zsub0_zsub2 0, // MPR32:zsub1_zsub3 }, { // ZPR4Strided_with_dsub_in_FPR64_lo 1, // ZPR4Strided_with_dsub_in_FPR64_lo:bsub -> FPR8 44, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub -> FPR64_lo 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub0 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub2 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub3 3, // ZPR4Strided_with_dsub_in_FPR64_lo:hsub -> FPR16_lo 0, // ZPR4Strided_with_dsub_in_FPR64_lo:psub0 0, // ZPR4Strided_with_dsub_in_FPR64_lo:psub1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub0 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub2 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub3 24, // ZPR4Strided_with_dsub_in_FPR64_lo:ssub -> FPR32_with_hsub_in_FPR16_lo 0, // ZPR4Strided_with_dsub_in_FPR64_lo:sub_32 0, // ZPR4Strided_with_dsub_in_FPR64_lo:sube32 0, // ZPR4Strided_with_dsub_in_FPR64_lo:sube64 0, // ZPR4Strided_with_dsub_in_FPR64_lo:subo32 0, // ZPR4Strided_with_dsub_in_FPR64_lo:subo64 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_0 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_2 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_3 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_4 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_5 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_6 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_7 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubb 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubd0 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubd1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh0 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubq0 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubq1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubs0 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubs1 72, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub -> FPR128_lo 75, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub0 -> ZPR_3b 75, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub1 -> ZPR_3b 74, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub2 -> ZPR_4b 74, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub3 -> ZPR_4b 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub_hi 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubd1_then_zasubq0 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubd1_then_zasubq1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubd0 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubq0 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubq1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubd0 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubq0 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubq1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs0 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq0 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubd1_then_zasubq1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd0 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq0 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubq1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub1_then_bsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub1_then_hsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub1_then_ssub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub3_then_bsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub3_then_hsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub3_then_ssub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub2_then_bsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub2_then_hsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub2_then_ssub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub1_then_bsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub1_then_dsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub1_then_hsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub1_then_ssub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub3_then_bsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub3_then_dsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub3_then_hsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub3_then_ssub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub2_then_bsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub2_then_dsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub2_then_hsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub2_then_ssub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_7_then_sub_32 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_5_then_sub_32 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_3_then_sub_32 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_1_then_sub_32 0, // ZPR4Strided_with_dsub_in_FPR64_lo:subo64_then_sub_32 1, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub1_then_bsub -> FPR8 44, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub1_then_dsub -> FPR64_lo 3, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub1_then_hsub -> FPR16_lo 24, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub1_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub1_then_zsub -> FPR128_lo 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub1_then_zsub_hi 1, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub3_then_bsub -> FPR8 44, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub3_then_dsub -> FPR64_lo 3, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub3_then_hsub -> FPR16_lo 24, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub3_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub3_then_zsub -> FPR128_lo 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub3_then_zsub_hi 1, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub2_then_bsub -> FPR8 44, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub2_then_dsub -> FPR64_lo 3, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub2_then_hsub -> FPR16_lo 24, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub2_then_ssub -> FPR32_with_hsub_in_FPR16_lo 72, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub2_then_zsub -> FPR128_lo 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub2_then_zsub_hi 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub0_dsub1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub0_dsub1_dsub2 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub1_dsub2 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub1_dsub2_dsub3 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub2_dsub3 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub0_qsub1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub0_qsub1_qsub2 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub1_qsub2 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub1_qsub2_qsub3 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub2_qsub3 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:qsub2_then_dsub_qsub3_then_dsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:sub_32_x8sub_1_then_sub_32 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_0_x8sub_1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_2_x8sub_3 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_4_x8sub_5 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_6_x8sub_7 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZPR4Strided_with_dsub_in_FPR64_lo:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZPR4Strided_with_dsub_in_FPR64_lo:sub_32_subo64_then_sub_32 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub0_zsub1 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub0_zsub1_zsub2 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub1_zsub2 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub1_zsub2_zsub3 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub2_zsub3 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub2_then_dsub_zsub3_then_dsub 0, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub2_then_zsub_zsub3_then_zsub 110, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub0_zsub2 -> ZPR2Strided_with_dsub_in_FPR64_lo 110, // ZPR4Strided_with_dsub_in_FPR64_lo:zsub1_zsub3 -> ZPR2Strided_with_dsub_in_FPR64_lo }, { // GPR64x8Class_with_x8sub_2_in_GPR64arg 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:psub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:psub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:ssub 25, // GPR64x8Class_with_x8sub_2_in_GPR64arg:sub_32 -> GPR32arg 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:sube32 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:sube64 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:subo32 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:subo64 45, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_0 -> GPR64arg 45, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_1 -> GPR64arg 45, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_2 -> GPR64arg 45, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_3 -> GPR64arg 43, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_4 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_5 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_6 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_7 -> GPR64noip_and_tcGPR64 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubb 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_4_then_sub_32 -> GPR32common 25, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_3_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_2_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_1_then_sub_32 -> GPR32arg 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:qsub2_then_dsub_qsub3_then_dsub 32, // GPR64x8Class_with_x8sub_2_in_GPR64arg:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 65, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sub_32_in_GPR32arg 65, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sub_32_in_GPR32arg 64, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 64, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 31, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 32, // GPR64x8Class_with_x8sub_2_in_GPR64arg:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg:zsub1_zsub3 }, { // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:psub0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:psub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:ssub 26, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32 -> MatrixIndexGPR32_12_15 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:sube32 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:sube64 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:subo32 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:subo64 47, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_0 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 47, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 42, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2 -> tcGPR64 42, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3 -> tcGPR64 42, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4 -> tcGPR64 39, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5 -> GPR64common 41, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubb 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_hi 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_ssub 23, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32 -> GPR32common 26, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1_then_sub_32 -> MatrixIndexGPR32_12_15 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:subo64_then_sub_32 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_hi 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_zsub_hi 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub_hi 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0_dsub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_dsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_dsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0_qsub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_qsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_qsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_dsub_qsub3_then_dsub 33, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 66, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 63, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_tcGPR64 61, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_tcGPR64 60, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_zsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub3 }, { // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:ssub 27, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 48, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 48, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 43, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 -> GPR64noip_and_tcGPR64 47, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 47, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 42, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 -> tcGPR64 42, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 -> tcGPR64 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_ssub 23, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 -> GPR32common 26, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 -> MatrixIndexGPR32_12_15 26, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 -> MatrixIndexGPR32_12_15 23, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 -> GPR32common 27, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 -> MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_qsub3_then_dsub 34, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 67, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 64, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 66, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 63, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_tcGPR64 31, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 33, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 31, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:psub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:psub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sube32 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sube64 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:subo32 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:subo64 43, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_0 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1 -> GPR64noip_and_tcGPR64 47, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 47, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 42, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4 -> tcGPR64 42, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5 -> tcGPR64 42, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6 -> tcGPR64 39, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7 -> GPR64common 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubb 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32 -> GPR32common 26, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_3_then_sub_32 -> MatrixIndexGPR32_12_15 26, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32 -> MatrixIndexGPR32_12_15 23, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 64, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 66, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 63, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_tcGPR64 61, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_tcGPR64 31, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 33, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub 23, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 43, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 -> GPR64noip_and_tcGPR64 48, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 48, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 43, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 -> GPR64noip_and_tcGPR64 47, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 47, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_ssub 26, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 -> MatrixIndexGPR32_12_15 26, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 -> MatrixIndexGPR32_12_15 23, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 -> GPR32common 27, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 -> MatrixIndexGPR32_8_11 27, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 -> MatrixIndexGPR32_8_11 23, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 64, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 67, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 64, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 66, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 33, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 31, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 34, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub 25, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> GPR32arg 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 45, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 -> GPR64arg 45, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 -> GPR64arg 43, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 -> GPR64noip_and_tcGPR64 48, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 48, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 43, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 -> GPR64noip_and_tcGPR64 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 -> GPR32common 27, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 -> MatrixIndexGPR32_8_11 27, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 -> MatrixIndexGPR32_8_11 23, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 -> GPR32common 25, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 -> GPR32arg 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_qsub3_then_dsub 32, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 65, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sub_32_in_GPR32arg 64, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 67, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 64, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 31, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 34, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 31, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64arg 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:psub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:psub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:ssub 25, // GPR64x8Class_with_x8sub_4_in_GPR64arg:sub_32 -> GPR32arg 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:sube32 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:sube64 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:subo32 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:subo64 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_0 -> GPR64arg 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_1 -> GPR64arg 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_2 -> GPR64arg 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_3 -> GPR64arg 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_4 -> GPR64arg 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_5 -> GPR64arg 43, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_6 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_7 -> GPR64noip_and_tcGPR64 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubb 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_6_then_sub_32 -> GPR32common 25, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_5_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_4_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_3_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_2_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_1_then_sub_32 -> GPR32arg 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:qsub2_then_dsub_qsub3_then_dsub 32, // GPR64x8Class_with_x8sub_4_in_GPR64arg:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 65, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sub_32_in_GPR32arg 65, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sub_32_in_GPR32arg 65, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sub_32_in_GPR32arg 64, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 31, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 32, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 32, // GPR64x8Class_with_x8sub_4_in_GPR64arg:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub 25, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> GPR32arg 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 45, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 -> GPR64arg 45, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 -> GPR64arg 45, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 -> GPR64arg 45, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 -> GPR64arg 43, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 -> GPR64noip_and_tcGPR64 43, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 -> GPR64noip_and_tcGPR64 48, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 48, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_ssub 27, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 -> MatrixIndexGPR32_8_11 27, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 -> MatrixIndexGPR32_8_11 23, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 -> GPR32common 25, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 -> GPR32arg 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_qsub3_then_dsub 32, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 65, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sub_32_in_GPR32arg 65, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sub_32_in_GPR32arg 64, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 -> XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 67, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 34, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 31, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 32, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 }, { // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub 25, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> GPR32arg 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 45, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 -> GPR64arg 45, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 -> GPR64arg 48, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 48, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 48, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 48, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 47, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 47, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_ssub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_ssub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_ssub 26, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 -> MatrixIndexGPR32_12_15 26, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 -> MatrixIndexGPR32_12_15 27, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 -> MatrixIndexGPR32_8_11 27, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 -> MatrixIndexGPR32_8_11 27, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 -> MatrixIndexGPR32_8_11 27, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 -> MatrixIndexGPR32_8_11 25, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 -> GPR32arg 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_ssub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_ssub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_bsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_hsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_ssub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_qsub3_then_dsub 32, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 65, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sub_32_in_GPR32arg 67, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 67, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 66, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 33, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 34, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 34, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 0, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 }, { // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub 27, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 48, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 48, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 48, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 48, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 47, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 47, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 47, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 47, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_ssub 26, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 -> MatrixIndexGPR32_12_15 26, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 -> MatrixIndexGPR32_12_15 26, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 -> MatrixIndexGPR32_12_15 26, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 -> MatrixIndexGPR32_12_15 27, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 -> MatrixIndexGPR32_8_11 27, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 -> MatrixIndexGPR32_8_11 27, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 -> MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_bsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_hsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_ssub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_qsub3_then_dsub 34, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 67, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 67, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 66, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 66, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 33, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 33, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 34, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 0, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_0_in_rtcGPR64 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:bsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub0 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub2 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub3 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:hsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:psub0 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:psub1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub0 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub2 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub3 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:ssub 23, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:sube32 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:sube64 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:subo32 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:subo64 50, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_0 -> rtcGPR64 50, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_1 -> rtcGPR64 43, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_2 -> GPR64noip_and_tcGPR64 41, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_3 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_5 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubb 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubd0 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubd1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubh0 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubh1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubq0 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubq1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubs0 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubs1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub0 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub2 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub3 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 68, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_rtcGPR64 62, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 60, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_0_in_rtcGPR64:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub 25, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> GPR32arg 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 45, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 -> GPR64arg 45, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 -> GPR64arg 45, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 -> GPR64arg 45, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 -> GPR64arg 48, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 48, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 48, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 48, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_ssub 27, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 -> MatrixIndexGPR32_8_11 27, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 -> MatrixIndexGPR32_8_11 27, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 -> MatrixIndexGPR32_8_11 27, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 -> MatrixIndexGPR32_8_11 25, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 -> GPR32arg 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_qsub3_then_dsub 32, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 65, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sub_32_in_GPR32arg 65, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sub_32_in_GPR32arg 67, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 67, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 34, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 34, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 32, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_2_in_rtcGPR64 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:bsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub0 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub2 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub3 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:hsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:psub0 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:psub1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub0 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub2 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub3 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:ssub 26, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:sub_32 -> MatrixIndexGPR32_12_15 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:sube32 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:sube64 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:subo32 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:subo64 47, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_0 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 47, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_1 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 50, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_2 -> rtcGPR64 50, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_3 -> rtcGPR64 43, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_4 -> GPR64noip_and_tcGPR64 41, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_5 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_6 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubb 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubd0 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubd1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubh0 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubh1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubq0 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubq1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubs0 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubs1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub0 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub2 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub3 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_2_then_sub_32 -> GPR32common 26, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_1_then_sub_32 -> MatrixIndexGPR32_12_15 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:qsub2_then_dsub_qsub3_then_dsub 33, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 66, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 68, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_rtcGPR64 62, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 60, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip 31, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_2_in_rtcGPR64:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:psub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:ssub 25, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32 -> GPR32arg 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube32 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sube64 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo32 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0 -> GPR64arg 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1 -> GPR64arg 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2 -> GPR64arg 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3 -> GPR64arg 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4 -> GPR64arg 45, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5 -> GPR64arg 48, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 48, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubb 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_ssub 27, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_7_then_sub_32 -> MatrixIndexGPR32_8_11 27, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32 -> MatrixIndexGPR32_8_11 25, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_5_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_3_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_1_then_sub_32 -> GPR32arg 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:qsub2_then_dsub_qsub3_then_dsub 32, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 65, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sub_32_in_GPR32arg 65, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sub_32_in_GPR32arg 65, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sub_32_in_GPR32arg 67, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 34, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 32, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 32, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_4_in_rtcGPR64 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:bsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub0 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub2 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub3 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:hsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:psub0 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:psub1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub0 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub2 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub3 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:ssub 26, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:sub_32 -> MatrixIndexGPR32_12_15 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:sube32 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:sube64 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:subo32 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:subo64 47, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_0 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 47, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_1 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 47, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_2 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 47, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_3 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 50, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_4 -> rtcGPR64 50, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_5 -> rtcGPR64 43, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_6 -> GPR64noip_and_tcGPR64 41, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_7 -> GPR64common_and_GPR64noip 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubb 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubd0 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubd1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubh0 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubh1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubq0 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubq1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubs0 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubs1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub0 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub2 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub3 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_4_then_sub_32 -> GPR32common 26, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_3_then_sub_32 -> MatrixIndexGPR32_12_15 26, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_2_then_sub_32 -> MatrixIndexGPR32_12_15 26, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_1_then_sub_32 -> MatrixIndexGPR32_12_15 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:qsub2_then_dsub_qsub3_then_dsub 33, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 66, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 66, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 68, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_rtcGPR64 62, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 31, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 33, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_4_in_rtcGPR64:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_6_in_GPR64arg 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub0 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:psub0 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:psub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub0 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:ssub 25, // GPR64x8Class_with_x8sub_6_in_GPR64arg:sub_32 -> GPR32arg 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:sube32 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:sube64 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:subo32 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:subo64 45, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_0 -> GPR64arg 45, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_1 -> GPR64arg 45, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_2 -> GPR64arg 45, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_3 -> GPR64arg 45, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_4 -> GPR64arg 45, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_5 -> GPR64arg 45, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_6 -> GPR64arg 45, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_7 -> GPR64arg 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubb 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubd0 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubd1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh0 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubs0 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubs1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub0 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub2_then_ssub 25, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_7_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_6_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_5_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_4_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_3_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_2_then_sub_32 -> GPR32arg 25, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_1_then_sub_32 -> GPR32arg 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:qsub2_then_dsub_qsub3_then_dsub 32, // GPR64x8Class_with_x8sub_6_in_GPR64arg:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 65, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sub_32_in_GPR32arg 65, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sub_32_in_GPR32arg 65, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sub_32_in_GPR32arg 65, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sub_32_in_GPR32arg 32, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 32, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 32, // GPR64x8Class_with_x8sub_6_in_GPR64arg:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_GPR32arg 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_6_in_GPR64arg:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_6_in_rtcGPR64 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:bsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub0 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub2 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub3 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:hsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:psub0 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:psub1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub0 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub2 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub3 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:ssub 27, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:sub_32 -> MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:sube32 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:sube64 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:subo32 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:subo64 48, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_0 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 48, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_1 -> GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 47, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_2 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 47, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_3 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 47, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_4 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 47, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_5 -> GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 50, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_6 -> rtcGPR64 50, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_7 -> rtcGPR64 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubb 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubd0 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubd1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubh0 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubh1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubq0 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubq1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubs0 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubs1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub0 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub2 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub3 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_6_then_sub_32 -> GPR32common 26, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_5_then_sub_32 -> MatrixIndexGPR32_12_15 26, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_4_then_sub_32 -> MatrixIndexGPR32_12_15 26, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_3_then_sub_32 -> MatrixIndexGPR32_12_15 26, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_2_then_sub_32 -> MatrixIndexGPR32_12_15 27, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_1_then_sub_32 -> MatrixIndexGPR32_8_11 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:qsub2_then_dsub_qsub3_then_dsub 34, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 67, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 66, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 66, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 68, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_6_x8sub_7 -> XSeqPairsClass_with_sube64_in_rtcGPR64 31, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 33, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 33, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_6_in_rtcGPR64:zsub1_zsub3 }, { // GPR64x8Class_with_x8sub_7_in_FIXED_REGS 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:bsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub0 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub2 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub3 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:hsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:psub0 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:psub1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub0 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub2 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub3 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:ssub 23, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:sube32 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:sube64 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:subo32 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:subo64 41, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_0 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_1 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_2 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_3 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_4 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_5 -> GPR64common_and_GPR64noip 41, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_6 -> GPR64common_and_GPR64noip 51, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_7 -> FIXED_REGS_and_GPR64 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubb 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubd0 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubd1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh0 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubq0 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubq1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubs0 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubs1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub0 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub2 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub3 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub_hi 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubd0 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubd1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubq0 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubq1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubs0 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubs1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubd0 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubd1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubq0 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubq1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub1_then_bsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub1_then_hsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub1_then_ssub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub3_then_bsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub3_then_hsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub3_then_ssub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub2_then_bsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub2_then_hsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub2_then_ssub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub1_then_bsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub1_then_hsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub1_then_ssub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub3_then_bsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub3_then_hsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub3_then_ssub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub2_then_bsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub2_then_hsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub2_then_ssub 23, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_7_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_6_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_5_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_4_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_3_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_2_then_sub_32 -> GPR32common 23, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_1_then_sub_32 -> GPR32common 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub1_then_bsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub1_then_hsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub1_then_ssub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub1_then_zsub_hi 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub3_then_bsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub3_then_hsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub3_then_ssub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub3_then_zsub_hi 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub2_then_bsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub2_then_hsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub2_then_ssub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub2_then_zsub_hi 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub0_dsub1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub0_dsub1_dsub2 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub1_dsub2 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub1_dsub2_dsub3 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub2_dsub3 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub_qsub1_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub0_qsub1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub0_qsub1_qsub2 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub1_qsub2 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub1_qsub2_qsub3 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub2_qsub3 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub1_then_dsub_qsub2_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:qsub2_then_dsub_qsub3_then_dsub 31, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:sub_32_x8sub_1_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 60, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_0_x8sub_1 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_2_x8sub_3 -> XSeqPairsClass_with_sube64_in_GPR64noip 60, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_4_x8sub_5 -> XSeqPairsClass_with_sube64_in_GPR64noip 69, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_6_x8sub_7 -> XSeqPairsClass_with_subo64_in_FIXED_REGS 31, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_6_then_sub_32_x8sub_7_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_4_then_sub_32_x8sub_5_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 31, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:x8sub_2_then_sub_32_x8sub_3_then_sub_32 -> WSeqPairsClass_with_subo32_in_GPR32common 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:sub_32_subo64_then_sub_32 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub_zsub1_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub_zsub1_then_zsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub0_zsub1 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub0_zsub1_zsub2 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub1_zsub2 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub1_zsub2_zsub3 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub2_zsub3 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub1_then_dsub_zsub2_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub1_then_zsub_zsub2_then_zsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub2_then_dsub_zsub3_then_dsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub2_then_zsub_zsub3_then_zsub 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub0_zsub2 0, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS:zsub1_zsub3 }, { // ZTR 0, // ZTR:bsub 0, // ZTR:dsub 0, // ZTR:dsub0 0, // ZTR:dsub1 0, // ZTR:dsub2 0, // ZTR:dsub3 0, // ZTR:hsub 0, // ZTR:psub0 0, // ZTR:psub1 0, // ZTR:qsub0 0, // ZTR:qsub1 0, // ZTR:qsub2 0, // ZTR:qsub3 0, // ZTR:ssub 0, // ZTR:sub_32 0, // ZTR:sube32 0, // ZTR:sube64 0, // ZTR:subo32 0, // ZTR:subo64 0, // ZTR:x8sub_0 0, // ZTR:x8sub_1 0, // ZTR:x8sub_2 0, // ZTR:x8sub_3 0, // ZTR:x8sub_4 0, // ZTR:x8sub_5 0, // ZTR:x8sub_6 0, // ZTR:x8sub_7 0, // ZTR:zasubb 0, // ZTR:zasubd0 0, // ZTR:zasubd1 0, // ZTR:zasubh0 0, // ZTR:zasubh1 0, // ZTR:zasubq0 0, // ZTR:zasubq1 0, // ZTR:zasubs0 0, // ZTR:zasubs1 0, // ZTR:zsub 0, // ZTR:zsub0 0, // ZTR:zsub1 0, // ZTR:zsub2 0, // ZTR:zsub3 0, // ZTR:zsub_hi 0, // ZTR:zasubd1_then_zasubq0 0, // ZTR:zasubd1_then_zasubq1 0, // ZTR:zasubs1_then_zasubd0 0, // ZTR:zasubs1_then_zasubd1 0, // ZTR:zasubs1_then_zasubq0 0, // ZTR:zasubs1_then_zasubq1 0, // ZTR:zasubs1_then_zasubd1_then_zasubq0 0, // ZTR:zasubs1_then_zasubd1_then_zasubq1 0, // ZTR:zasubh1_then_zasubd0 0, // ZTR:zasubh1_then_zasubd1 0, // ZTR:zasubh1_then_zasubq0 0, // ZTR:zasubh1_then_zasubq1 0, // ZTR:zasubh1_then_zasubs0 0, // ZTR:zasubh1_then_zasubs1 0, // ZTR:zasubh1_then_zasubd1_then_zasubq0 0, // ZTR:zasubh1_then_zasubd1_then_zasubq1 0, // ZTR:zasubh1_then_zasubs1_then_zasubd0 0, // ZTR:zasubh1_then_zasubs1_then_zasubd1 0, // ZTR:zasubh1_then_zasubs1_then_zasubq0 0, // ZTR:zasubh1_then_zasubs1_then_zasubq1 0, // ZTR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // ZTR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // ZTR:dsub1_then_bsub 0, // ZTR:dsub1_then_hsub 0, // ZTR:dsub1_then_ssub 0, // ZTR:dsub3_then_bsub 0, // ZTR:dsub3_then_hsub 0, // ZTR:dsub3_then_ssub 0, // ZTR:dsub2_then_bsub 0, // ZTR:dsub2_then_hsub 0, // ZTR:dsub2_then_ssub 0, // ZTR:qsub1_then_bsub 0, // ZTR:qsub1_then_dsub 0, // ZTR:qsub1_then_hsub 0, // ZTR:qsub1_then_ssub 0, // ZTR:qsub3_then_bsub 0, // ZTR:qsub3_then_dsub 0, // ZTR:qsub3_then_hsub 0, // ZTR:qsub3_then_ssub 0, // ZTR:qsub2_then_bsub 0, // ZTR:qsub2_then_dsub 0, // ZTR:qsub2_then_hsub 0, // ZTR:qsub2_then_ssub 0, // ZTR:x8sub_7_then_sub_32 0, // ZTR:x8sub_6_then_sub_32 0, // ZTR:x8sub_5_then_sub_32 0, // ZTR:x8sub_4_then_sub_32 0, // ZTR:x8sub_3_then_sub_32 0, // ZTR:x8sub_2_then_sub_32 0, // ZTR:x8sub_1_then_sub_32 0, // ZTR:subo64_then_sub_32 0, // ZTR:zsub1_then_bsub 0, // ZTR:zsub1_then_dsub 0, // ZTR:zsub1_then_hsub 0, // ZTR:zsub1_then_ssub 0, // ZTR:zsub1_then_zsub 0, // ZTR:zsub1_then_zsub_hi 0, // ZTR:zsub3_then_bsub 0, // ZTR:zsub3_then_dsub 0, // ZTR:zsub3_then_hsub 0, // ZTR:zsub3_then_ssub 0, // ZTR:zsub3_then_zsub 0, // ZTR:zsub3_then_zsub_hi 0, // ZTR:zsub2_then_bsub 0, // ZTR:zsub2_then_dsub 0, // ZTR:zsub2_then_hsub 0, // ZTR:zsub2_then_ssub 0, // ZTR:zsub2_then_zsub 0, // ZTR:zsub2_then_zsub_hi 0, // ZTR:dsub0_dsub1 0, // ZTR:dsub0_dsub1_dsub2 0, // ZTR:dsub1_dsub2 0, // ZTR:dsub1_dsub2_dsub3 0, // ZTR:dsub2_dsub3 0, // ZTR:dsub_qsub1_then_dsub 0, // ZTR:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZTR:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // ZTR:qsub0_qsub1 0, // ZTR:qsub0_qsub1_qsub2 0, // ZTR:qsub1_qsub2 0, // ZTR:qsub1_qsub2_qsub3 0, // ZTR:qsub2_qsub3 0, // ZTR:qsub1_then_dsub_qsub2_then_dsub 0, // ZTR:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // ZTR:qsub2_then_dsub_qsub3_then_dsub 0, // ZTR:sub_32_x8sub_1_then_sub_32 0, // ZTR:x8sub_0_x8sub_1 0, // ZTR:x8sub_2_x8sub_3 0, // ZTR:x8sub_4_x8sub_5 0, // ZTR:x8sub_6_x8sub_7 0, // ZTR:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // ZTR:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // ZTR:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // ZTR:sub_32_subo64_then_sub_32 0, // ZTR:dsub_zsub1_then_dsub 0, // ZTR:zsub_zsub1_then_zsub 0, // ZTR:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZTR:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // ZTR:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZTR:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // ZTR:zsub0_zsub1 0, // ZTR:zsub0_zsub1_zsub2 0, // ZTR:zsub1_zsub2 0, // ZTR:zsub1_zsub2_zsub3 0, // ZTR:zsub2_zsub3 0, // ZTR:zsub1_then_dsub_zsub2_then_dsub 0, // ZTR:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // ZTR:zsub1_then_zsub_zsub2_then_zsub 0, // ZTR:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // ZTR:zsub2_then_dsub_zsub3_then_dsub 0, // ZTR:zsub2_then_zsub_zsub3_then_zsub 0, // ZTR:zsub0_zsub2 0, // ZTR:zsub1_zsub3 }, { // MPR16 0, // MPR16:bsub 0, // MPR16:dsub 0, // MPR16:dsub0 0, // MPR16:dsub1 0, // MPR16:dsub2 0, // MPR16:dsub3 0, // MPR16:hsub 0, // MPR16:psub0 0, // MPR16:psub1 0, // MPR16:qsub0 0, // MPR16:qsub1 0, // MPR16:qsub2 0, // MPR16:qsub3 0, // MPR16:ssub 0, // MPR16:sub_32 0, // MPR16:sube32 0, // MPR16:sube64 0, // MPR16:subo32 0, // MPR16:subo64 0, // MPR16:x8sub_0 0, // MPR16:x8sub_1 0, // MPR16:x8sub_2 0, // MPR16:x8sub_3 0, // MPR16:x8sub_4 0, // MPR16:x8sub_5 0, // MPR16:x8sub_6 0, // MPR16:x8sub_7 0, // MPR16:zasubb 109, // MPR16:zasubd0 -> MPR64 109, // MPR16:zasubd1 -> MPR64 0, // MPR16:zasubh0 0, // MPR16:zasubh1 73, // MPR16:zasubq0 -> MPR128 73, // MPR16:zasubq1 -> MPR128 250, // MPR16:zasubs0 -> MPR32 250, // MPR16:zasubs1 -> MPR32 0, // MPR16:zsub 0, // MPR16:zsub0 0, // MPR16:zsub1 0, // MPR16:zsub2 0, // MPR16:zsub3 0, // MPR16:zsub_hi 73, // MPR16:zasubd1_then_zasubq0 -> MPR128 73, // MPR16:zasubd1_then_zasubq1 -> MPR128 109, // MPR16:zasubs1_then_zasubd0 -> MPR64 109, // MPR16:zasubs1_then_zasubd1 -> MPR64 73, // MPR16:zasubs1_then_zasubq0 -> MPR128 73, // MPR16:zasubs1_then_zasubq1 -> MPR128 73, // MPR16:zasubs1_then_zasubd1_then_zasubq0 -> MPR128 73, // MPR16:zasubs1_then_zasubd1_then_zasubq1 -> MPR128 0, // MPR16:zasubh1_then_zasubd0 0, // MPR16:zasubh1_then_zasubd1 0, // MPR16:zasubh1_then_zasubq0 0, // MPR16:zasubh1_then_zasubq1 0, // MPR16:zasubh1_then_zasubs0 0, // MPR16:zasubh1_then_zasubs1 0, // MPR16:zasubh1_then_zasubd1_then_zasubq0 0, // MPR16:zasubh1_then_zasubd1_then_zasubq1 0, // MPR16:zasubh1_then_zasubs1_then_zasubd0 0, // MPR16:zasubh1_then_zasubs1_then_zasubd1 0, // MPR16:zasubh1_then_zasubs1_then_zasubq0 0, // MPR16:zasubh1_then_zasubs1_then_zasubq1 0, // MPR16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 0, // MPR16:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 0, // MPR16:dsub1_then_bsub 0, // MPR16:dsub1_then_hsub 0, // MPR16:dsub1_then_ssub 0, // MPR16:dsub3_then_bsub 0, // MPR16:dsub3_then_hsub 0, // MPR16:dsub3_then_ssub 0, // MPR16:dsub2_then_bsub 0, // MPR16:dsub2_then_hsub 0, // MPR16:dsub2_then_ssub 0, // MPR16:qsub1_then_bsub 0, // MPR16:qsub1_then_dsub 0, // MPR16:qsub1_then_hsub 0, // MPR16:qsub1_then_ssub 0, // MPR16:qsub3_then_bsub 0, // MPR16:qsub3_then_dsub 0, // MPR16:qsub3_then_hsub 0, // MPR16:qsub3_then_ssub 0, // MPR16:qsub2_then_bsub 0, // MPR16:qsub2_then_dsub 0, // MPR16:qsub2_then_hsub 0, // MPR16:qsub2_then_ssub 0, // MPR16:x8sub_7_then_sub_32 0, // MPR16:x8sub_6_then_sub_32 0, // MPR16:x8sub_5_then_sub_32 0, // MPR16:x8sub_4_then_sub_32 0, // MPR16:x8sub_3_then_sub_32 0, // MPR16:x8sub_2_then_sub_32 0, // MPR16:x8sub_1_then_sub_32 0, // MPR16:subo64_then_sub_32 0, // MPR16:zsub1_then_bsub 0, // MPR16:zsub1_then_dsub 0, // MPR16:zsub1_then_hsub 0, // MPR16:zsub1_then_ssub 0, // MPR16:zsub1_then_zsub 0, // MPR16:zsub1_then_zsub_hi 0, // MPR16:zsub3_then_bsub 0, // MPR16:zsub3_then_dsub 0, // MPR16:zsub3_then_hsub 0, // MPR16:zsub3_then_ssub 0, // MPR16:zsub3_then_zsub 0, // MPR16:zsub3_then_zsub_hi 0, // MPR16:zsub2_then_bsub 0, // MPR16:zsub2_then_dsub 0, // MPR16:zsub2_then_hsub 0, // MPR16:zsub2_then_ssub 0, // MPR16:zsub2_then_zsub 0, // MPR16:zsub2_then_zsub_hi 0, // MPR16:dsub0_dsub1 0, // MPR16:dsub0_dsub1_dsub2 0, // MPR16:dsub1_dsub2 0, // MPR16:dsub1_dsub2_dsub3 0, // MPR16:dsub2_dsub3 0, // MPR16:dsub_qsub1_then_dsub 0, // MPR16:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // MPR16:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // MPR16:qsub0_qsub1 0, // MPR16:qsub0_qsub1_qsub2 0, // MPR16:qsub1_qsub2 0, // MPR16:qsub1_qsub2_qsub3 0, // MPR16:qsub2_qsub3 0, // MPR16:qsub1_then_dsub_qsub2_then_dsub 0, // MPR16:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // MPR16:qsub2_then_dsub_qsub3_then_dsub 0, // MPR16:sub_32_x8sub_1_then_sub_32 0, // MPR16:x8sub_0_x8sub_1 0, // MPR16:x8sub_2_x8sub_3 0, // MPR16:x8sub_4_x8sub_5 0, // MPR16:x8sub_6_x8sub_7 0, // MPR16:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // MPR16:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // MPR16:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // MPR16:sub_32_subo64_then_sub_32 0, // MPR16:dsub_zsub1_then_dsub 0, // MPR16:zsub_zsub1_then_zsub 0, // MPR16:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // MPR16:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // MPR16:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // MPR16:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // MPR16:zsub0_zsub1 0, // MPR16:zsub0_zsub1_zsub2 0, // MPR16:zsub1_zsub2 0, // MPR16:zsub1_zsub2_zsub3 0, // MPR16:zsub2_zsub3 0, // MPR16:zsub1_then_dsub_zsub2_then_dsub 0, // MPR16:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // MPR16:zsub1_then_zsub_zsub2_then_zsub 0, // MPR16:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // MPR16:zsub2_then_dsub_zsub3_then_dsub 0, // MPR16:zsub2_then_zsub_zsub3_then_zsub 0, // MPR16:zsub0_zsub2 0, // MPR16:zsub1_zsub3 }, { // MPR 0, // MPR:bsub 0, // MPR:dsub 0, // MPR:dsub0 0, // MPR:dsub1 0, // MPR:dsub2 0, // MPR:dsub3 0, // MPR:hsub 0, // MPR:psub0 0, // MPR:psub1 0, // MPR:qsub0 0, // MPR:qsub1 0, // MPR:qsub2 0, // MPR:qsub3 0, // MPR:ssub 0, // MPR:sub_32 0, // MPR:sube32 0, // MPR:sube64 0, // MPR:subo32 0, // MPR:subo64 0, // MPR:x8sub_0 0, // MPR:x8sub_1 0, // MPR:x8sub_2 0, // MPR:x8sub_3 0, // MPR:x8sub_4 0, // MPR:x8sub_5 0, // MPR:x8sub_6 0, // MPR:x8sub_7 273, // MPR:zasubb -> MPR8 109, // MPR:zasubd0 -> MPR64 109, // MPR:zasubd1 -> MPR64 271, // MPR:zasubh0 -> MPR16 271, // MPR:zasubh1 -> MPR16 73, // MPR:zasubq0 -> MPR128 73, // MPR:zasubq1 -> MPR128 250, // MPR:zasubs0 -> MPR32 250, // MPR:zasubs1 -> MPR32 0, // MPR:zsub 0, // MPR:zsub0 0, // MPR:zsub1 0, // MPR:zsub2 0, // MPR:zsub3 0, // MPR:zsub_hi 73, // MPR:zasubd1_then_zasubq0 -> MPR128 73, // MPR:zasubd1_then_zasubq1 -> MPR128 109, // MPR:zasubs1_then_zasubd0 -> MPR64 109, // MPR:zasubs1_then_zasubd1 -> MPR64 73, // MPR:zasubs1_then_zasubq0 -> MPR128 73, // MPR:zasubs1_then_zasubq1 -> MPR128 73, // MPR:zasubs1_then_zasubd1_then_zasubq0 -> MPR128 73, // MPR:zasubs1_then_zasubd1_then_zasubq1 -> MPR128 109, // MPR:zasubh1_then_zasubd0 -> MPR64 109, // MPR:zasubh1_then_zasubd1 -> MPR64 73, // MPR:zasubh1_then_zasubq0 -> MPR128 73, // MPR:zasubh1_then_zasubq1 -> MPR128 250, // MPR:zasubh1_then_zasubs0 -> MPR32 250, // MPR:zasubh1_then_zasubs1 -> MPR32 73, // MPR:zasubh1_then_zasubd1_then_zasubq0 -> MPR128 73, // MPR:zasubh1_then_zasubd1_then_zasubq1 -> MPR128 109, // MPR:zasubh1_then_zasubs1_then_zasubd0 -> MPR64 109, // MPR:zasubh1_then_zasubs1_then_zasubd1 -> MPR64 73, // MPR:zasubh1_then_zasubs1_then_zasubq0 -> MPR128 73, // MPR:zasubh1_then_zasubs1_then_zasubq1 -> MPR128 73, // MPR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 -> MPR128 73, // MPR:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 -> MPR128 0, // MPR:dsub1_then_bsub 0, // MPR:dsub1_then_hsub 0, // MPR:dsub1_then_ssub 0, // MPR:dsub3_then_bsub 0, // MPR:dsub3_then_hsub 0, // MPR:dsub3_then_ssub 0, // MPR:dsub2_then_bsub 0, // MPR:dsub2_then_hsub 0, // MPR:dsub2_then_ssub 0, // MPR:qsub1_then_bsub 0, // MPR:qsub1_then_dsub 0, // MPR:qsub1_then_hsub 0, // MPR:qsub1_then_ssub 0, // MPR:qsub3_then_bsub 0, // MPR:qsub3_then_dsub 0, // MPR:qsub3_then_hsub 0, // MPR:qsub3_then_ssub 0, // MPR:qsub2_then_bsub 0, // MPR:qsub2_then_dsub 0, // MPR:qsub2_then_hsub 0, // MPR:qsub2_then_ssub 0, // MPR:x8sub_7_then_sub_32 0, // MPR:x8sub_6_then_sub_32 0, // MPR:x8sub_5_then_sub_32 0, // MPR:x8sub_4_then_sub_32 0, // MPR:x8sub_3_then_sub_32 0, // MPR:x8sub_2_then_sub_32 0, // MPR:x8sub_1_then_sub_32 0, // MPR:subo64_then_sub_32 0, // MPR:zsub1_then_bsub 0, // MPR:zsub1_then_dsub 0, // MPR:zsub1_then_hsub 0, // MPR:zsub1_then_ssub 0, // MPR:zsub1_then_zsub 0, // MPR:zsub1_then_zsub_hi 0, // MPR:zsub3_then_bsub 0, // MPR:zsub3_then_dsub 0, // MPR:zsub3_then_hsub 0, // MPR:zsub3_then_ssub 0, // MPR:zsub3_then_zsub 0, // MPR:zsub3_then_zsub_hi 0, // MPR:zsub2_then_bsub 0, // MPR:zsub2_then_dsub 0, // MPR:zsub2_then_hsub 0, // MPR:zsub2_then_ssub 0, // MPR:zsub2_then_zsub 0, // MPR:zsub2_then_zsub_hi 0, // MPR:dsub0_dsub1 0, // MPR:dsub0_dsub1_dsub2 0, // MPR:dsub1_dsub2 0, // MPR:dsub1_dsub2_dsub3 0, // MPR:dsub2_dsub3 0, // MPR:dsub_qsub1_then_dsub 0, // MPR:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // MPR:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // MPR:qsub0_qsub1 0, // MPR:qsub0_qsub1_qsub2 0, // MPR:qsub1_qsub2 0, // MPR:qsub1_qsub2_qsub3 0, // MPR:qsub2_qsub3 0, // MPR:qsub1_then_dsub_qsub2_then_dsub 0, // MPR:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // MPR:qsub2_then_dsub_qsub3_then_dsub 0, // MPR:sub_32_x8sub_1_then_sub_32 0, // MPR:x8sub_0_x8sub_1 0, // MPR:x8sub_2_x8sub_3 0, // MPR:x8sub_4_x8sub_5 0, // MPR:x8sub_6_x8sub_7 0, // MPR:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // MPR:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // MPR:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // MPR:sub_32_subo64_then_sub_32 0, // MPR:dsub_zsub1_then_dsub 0, // MPR:zsub_zsub1_then_zsub 0, // MPR:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // MPR:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // MPR:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // MPR:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // MPR:zsub0_zsub1 0, // MPR:zsub0_zsub1_zsub2 0, // MPR:zsub1_zsub2 0, // MPR:zsub1_zsub2_zsub3 0, // MPR:zsub2_zsub3 0, // MPR:zsub1_then_dsub_zsub2_then_dsub 0, // MPR:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // MPR:zsub1_then_zsub_zsub2_then_zsub 0, // MPR:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // MPR:zsub2_then_dsub_zsub3_then_dsub 0, // MPR:zsub2_then_zsub_zsub3_then_zsub 0, // MPR:zsub0_zsub2 0, // MPR:zsub1_zsub3 }, { // MPR8 0, // MPR8:bsub 0, // MPR8:dsub 0, // MPR8:dsub0 0, // MPR8:dsub1 0, // MPR8:dsub2 0, // MPR8:dsub3 0, // MPR8:hsub 0, // MPR8:psub0 0, // MPR8:psub1 0, // MPR8:qsub0 0, // MPR8:qsub1 0, // MPR8:qsub2 0, // MPR8:qsub3 0, // MPR8:ssub 0, // MPR8:sub_32 0, // MPR8:sube32 0, // MPR8:sube64 0, // MPR8:subo32 0, // MPR8:subo64 0, // MPR8:x8sub_0 0, // MPR8:x8sub_1 0, // MPR8:x8sub_2 0, // MPR8:x8sub_3 0, // MPR8:x8sub_4 0, // MPR8:x8sub_5 0, // MPR8:x8sub_6 0, // MPR8:x8sub_7 0, // MPR8:zasubb 109, // MPR8:zasubd0 -> MPR64 109, // MPR8:zasubd1 -> MPR64 271, // MPR8:zasubh0 -> MPR16 271, // MPR8:zasubh1 -> MPR16 73, // MPR8:zasubq0 -> MPR128 73, // MPR8:zasubq1 -> MPR128 250, // MPR8:zasubs0 -> MPR32 250, // MPR8:zasubs1 -> MPR32 0, // MPR8:zsub 0, // MPR8:zsub0 0, // MPR8:zsub1 0, // MPR8:zsub2 0, // MPR8:zsub3 0, // MPR8:zsub_hi 73, // MPR8:zasubd1_then_zasubq0 -> MPR128 73, // MPR8:zasubd1_then_zasubq1 -> MPR128 109, // MPR8:zasubs1_then_zasubd0 -> MPR64 109, // MPR8:zasubs1_then_zasubd1 -> MPR64 73, // MPR8:zasubs1_then_zasubq0 -> MPR128 73, // MPR8:zasubs1_then_zasubq1 -> MPR128 73, // MPR8:zasubs1_then_zasubd1_then_zasubq0 -> MPR128 73, // MPR8:zasubs1_then_zasubd1_then_zasubq1 -> MPR128 109, // MPR8:zasubh1_then_zasubd0 -> MPR64 109, // MPR8:zasubh1_then_zasubd1 -> MPR64 73, // MPR8:zasubh1_then_zasubq0 -> MPR128 73, // MPR8:zasubh1_then_zasubq1 -> MPR128 250, // MPR8:zasubh1_then_zasubs0 -> MPR32 250, // MPR8:zasubh1_then_zasubs1 -> MPR32 73, // MPR8:zasubh1_then_zasubd1_then_zasubq0 -> MPR128 73, // MPR8:zasubh1_then_zasubd1_then_zasubq1 -> MPR128 109, // MPR8:zasubh1_then_zasubs1_then_zasubd0 -> MPR64 109, // MPR8:zasubh1_then_zasubs1_then_zasubd1 -> MPR64 73, // MPR8:zasubh1_then_zasubs1_then_zasubq0 -> MPR128 73, // MPR8:zasubh1_then_zasubs1_then_zasubq1 -> MPR128 73, // MPR8:zasubh1_then_zasubs1_then_zasubd1_then_zasubq0 -> MPR128 73, // MPR8:zasubh1_then_zasubs1_then_zasubd1_then_zasubq1 -> MPR128 0, // MPR8:dsub1_then_bsub 0, // MPR8:dsub1_then_hsub 0, // MPR8:dsub1_then_ssub 0, // MPR8:dsub3_then_bsub 0, // MPR8:dsub3_then_hsub 0, // MPR8:dsub3_then_ssub 0, // MPR8:dsub2_then_bsub 0, // MPR8:dsub2_then_hsub 0, // MPR8:dsub2_then_ssub 0, // MPR8:qsub1_then_bsub 0, // MPR8:qsub1_then_dsub 0, // MPR8:qsub1_then_hsub 0, // MPR8:qsub1_then_ssub 0, // MPR8:qsub3_then_bsub 0, // MPR8:qsub3_then_dsub 0, // MPR8:qsub3_then_hsub 0, // MPR8:qsub3_then_ssub 0, // MPR8:qsub2_then_bsub 0, // MPR8:qsub2_then_dsub 0, // MPR8:qsub2_then_hsub 0, // MPR8:qsub2_then_ssub 0, // MPR8:x8sub_7_then_sub_32 0, // MPR8:x8sub_6_then_sub_32 0, // MPR8:x8sub_5_then_sub_32 0, // MPR8:x8sub_4_then_sub_32 0, // MPR8:x8sub_3_then_sub_32 0, // MPR8:x8sub_2_then_sub_32 0, // MPR8:x8sub_1_then_sub_32 0, // MPR8:subo64_then_sub_32 0, // MPR8:zsub1_then_bsub 0, // MPR8:zsub1_then_dsub 0, // MPR8:zsub1_then_hsub 0, // MPR8:zsub1_then_ssub 0, // MPR8:zsub1_then_zsub 0, // MPR8:zsub1_then_zsub_hi 0, // MPR8:zsub3_then_bsub 0, // MPR8:zsub3_then_dsub 0, // MPR8:zsub3_then_hsub 0, // MPR8:zsub3_then_ssub 0, // MPR8:zsub3_then_zsub 0, // MPR8:zsub3_then_zsub_hi 0, // MPR8:zsub2_then_bsub 0, // MPR8:zsub2_then_dsub 0, // MPR8:zsub2_then_hsub 0, // MPR8:zsub2_then_ssub 0, // MPR8:zsub2_then_zsub 0, // MPR8:zsub2_then_zsub_hi 0, // MPR8:dsub0_dsub1 0, // MPR8:dsub0_dsub1_dsub2 0, // MPR8:dsub1_dsub2 0, // MPR8:dsub1_dsub2_dsub3 0, // MPR8:dsub2_dsub3 0, // MPR8:dsub_qsub1_then_dsub 0, // MPR8:dsub_qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // MPR8:dsub_qsub1_then_dsub_qsub2_then_dsub 0, // MPR8:qsub0_qsub1 0, // MPR8:qsub0_qsub1_qsub2 0, // MPR8:qsub1_qsub2 0, // MPR8:qsub1_qsub2_qsub3 0, // MPR8:qsub2_qsub3 0, // MPR8:qsub1_then_dsub_qsub2_then_dsub 0, // MPR8:qsub1_then_dsub_qsub2_then_dsub_qsub3_then_dsub 0, // MPR8:qsub2_then_dsub_qsub3_then_dsub 0, // MPR8:sub_32_x8sub_1_then_sub_32 0, // MPR8:x8sub_0_x8sub_1 0, // MPR8:x8sub_2_x8sub_3 0, // MPR8:x8sub_4_x8sub_5 0, // MPR8:x8sub_6_x8sub_7 0, // MPR8:x8sub_6_then_sub_32_x8sub_7_then_sub_32 0, // MPR8:x8sub_4_then_sub_32_x8sub_5_then_sub_32 0, // MPR8:x8sub_2_then_sub_32_x8sub_3_then_sub_32 0, // MPR8:sub_32_subo64_then_sub_32 0, // MPR8:dsub_zsub1_then_dsub 0, // MPR8:zsub_zsub1_then_zsub 0, // MPR8:dsub_zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // MPR8:dsub_zsub1_then_dsub_zsub2_then_dsub 0, // MPR8:zsub_zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // MPR8:zsub_zsub1_then_zsub_zsub2_then_zsub 0, // MPR8:zsub0_zsub1 0, // MPR8:zsub0_zsub1_zsub2 0, // MPR8:zsub1_zsub2 0, // MPR8:zsub1_zsub2_zsub3 0, // MPR8:zsub2_zsub3 0, // MPR8:zsub1_then_dsub_zsub2_then_dsub 0, // MPR8:zsub1_then_dsub_zsub2_then_dsub_zsub3_then_dsub 0, // MPR8:zsub1_then_zsub_zsub2_then_zsub 0, // MPR8:zsub1_then_zsub_zsub2_then_zsub_zsub3_then_zsub 0, // MPR8:zsub2_then_dsub_zsub3_then_dsub 0, // MPR8:zsub2_then_zsub_zsub3_then_zsub 0, // MPR8:zsub0_zsub2 0, // MPR8:zsub1_zsub3 }, }; assert(RC && "Missing regclass"); if (!Idx) return RC; --Idx; assert(Idx < 155 && "Bad subreg"); unsigned TV = Table[RC->getID()][Idx]; return TV ? getRegClass(TV - 1) : nullptr; } /// Get the weight in units of pressure for this register class. const RegClassWeight &AArch64GenRegisterInfo:: getRegClassWeight(const TargetRegisterClass *RC) const { static const RegClassWeight RCWeightTable[] = { {1, 32}, // FPR8 {1, 32}, // FPR16 {1, 16}, // FPR16_lo {1, 16}, // PPR {1, 8}, // PPR_3b {1, 8}, // PPR_p8to15 {2, 16}, // PPR2 {2, 16}, // PPR2Mul2 {2, 9}, // PPR2_with_psub0_in_PPR_3b {2, 9}, // PPR2_with_psub0_in_PPR_p8to15 {2, 9}, // PPR2_with_psub1_in_PPR_3b {2, 9}, // PPR2_with_psub1_in_PPR_p8to15 {2, 8}, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_3b {2, 8}, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_p8to15 {2, 8}, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_3b {2, 8}, // PPR2Mul2_and_PPR2_with_psub0_in_PPR_p8to15 {2, 2}, // PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15 {2, 2}, // PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b {1, 33}, // GPR32all {1, 32}, // FPR32 {1, 32}, // GPR32 {1, 32}, // GPR32sp {1, 31}, // GPR32common {1, 16}, // FPR32_with_hsub_in_FPR16_lo {1, 8}, // GPR32arg {1, 4}, // MatrixIndexGPR32_12_15 {1, 4}, // MatrixIndexGPR32_8_11 {0, 0}, // CCR {1, 1}, // GPR32sponly {2, 32}, // WSeqPairsClass {2, 30}, // WSeqPairsClass_with_subo32_in_GPR32common {2, 8}, // WSeqPairsClass_with_sube32_in_GPR32arg {2, 4}, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_12_15 {2, 4}, // WSeqPairsClass_with_sube32_in_MatrixIndexGPR32_8_11 {1, 33}, // GPR64all {1, 32}, // FPR64 {1, 32}, // GPR64 {1, 32}, // GPR64sp {1, 31}, // GPR64common {1, 29}, // GPR64noip {1, 28}, // GPR64common_and_GPR64noip {1, 19}, // tcGPR64 {1, 17}, // GPR64noip_and_tcGPR64 {1, 16}, // FPR64_lo {1, 8}, // GPR64arg {1, 4}, // FIXED_REGS {1, 4}, // GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 {1, 4}, // GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 {1, 2}, // FIXED_REGS_with_sub_32 {1, 2}, // rtcGPR64 {1, 1}, // FIXED_REGS_and_GPR64 {1, 1}, // GPR64sponly {2, 32}, // DD {2, 17}, // DD_with_dsub0_in_FPR64_lo {2, 17}, // DD_with_dsub1_in_FPR64_lo {2, 32}, // XSeqPairsClass {2, 16}, // DD_with_dsub0_in_FPR64_lo_and_DD_with_dsub1_in_FPR64_lo {2, 30}, // XSeqPairsClass_with_subo64_in_GPR64common {2, 30}, // XSeqPairsClass_with_subo64_in_GPR64noip {2, 28}, // XSeqPairsClass_with_sube64_in_GPR64noip {2, 20}, // XSeqPairsClass_with_sube64_in_tcGPR64 {2, 18}, // XSeqPairsClass_with_sube64_in_GPR64noip_and_tcGPR64 {2, 18}, // XSeqPairsClass_with_subo64_in_tcGPR64 {2, 16}, // XSeqPairsClass_with_subo64_in_GPR64noip_and_tcGPR64 {2, 8}, // XSeqPairsClass_with_sub_32_in_GPR32arg {2, 4}, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_12_15 {2, 4}, // XSeqPairsClass_with_sub_32_in_MatrixIndexGPR32_8_11 {2, 2}, // XSeqPairsClass_with_sube64_in_rtcGPR64 {2, 2}, // XSeqPairsClass_with_subo64_in_FIXED_REGS {1, 32}, // FPR128 {2, 64}, // ZPR {1, 16}, // FPR128_lo {0, 0}, // MPR128 {2, 32}, // ZPR_4b {2, 16}, // ZPR_3b {3, 32}, // DDD {3, 18}, // DDD_with_dsub0_in_FPR64_lo {3, 18}, // DDD_with_dsub1_in_FPR64_lo {3, 18}, // DDD_with_dsub2_in_FPR64_lo {3, 17}, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub1_in_FPR64_lo {3, 17}, // DDD_with_dsub1_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo {3, 16}, // DDD_with_dsub0_in_FPR64_lo_and_DDD_with_dsub2_in_FPR64_lo {4, 32}, // DDDD {4, 19}, // DDDD_with_dsub0_in_FPR64_lo {4, 19}, // DDDD_with_dsub1_in_FPR64_lo {4, 19}, // DDDD_with_dsub2_in_FPR64_lo {4, 19}, // DDDD_with_dsub3_in_FPR64_lo {4, 18}, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub1_in_FPR64_lo {4, 18}, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo {4, 18}, // DDDD_with_dsub2_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo {4, 17}, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub2_in_FPR64_lo {4, 17}, // DDDD_with_dsub1_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo {4, 16}, // DDDD_with_dsub0_in_FPR64_lo_and_DDDD_with_dsub3_in_FPR64_lo {2, 32}, // QQ {4, 64}, // ZPR2 {2, 17}, // QQ_with_dsub_in_FPR64_lo {2, 17}, // QQ_with_qsub1_in_FPR128_lo {4, 64}, // ZPR2Mul2 {4, 34}, // ZPR2_with_dsub_in_FPR64_lo {4, 34}, // ZPR2_with_zsub1_in_ZPR_4b {2, 16}, // QQ_with_dsub_in_FPR64_lo_and_QQ_with_qsub1_in_FPR128_lo {4, 32}, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_4b {4, 32}, // ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo {4, 18}, // ZPR2_with_zsub0_in_ZPR_3b {4, 18}, // ZPR2_with_zsub1_in_ZPR_3b {4, 16}, // ZPR2_with_dsub_in_FPR64_lo_and_ZPR2_with_zsub1_in_ZPR_3b {4, 16}, // ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b {4, 64}, // ZPR2Strided {0, 0}, // MPR64 {4, 32}, // ZPR2Strided_with_dsub_in_FPR64_lo {3, 32}, // QQQ {6, 64}, // ZPR3 {3, 18}, // QQQ_with_dsub_in_FPR64_lo {3, 18}, // QQQ_with_qsub1_in_FPR128_lo {3, 18}, // QQQ_with_qsub2_in_FPR128_lo {6, 36}, // ZPR3_with_dsub_in_FPR64_lo {6, 64}, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 {6, 36}, // ZPR3_with_zsub1_in_ZPR_4b {6, 64}, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 {6, 36}, // ZPR3_with_zsub2_in_ZPR_4b {3, 17}, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub1_in_FPR128_lo {3, 17}, // QQQ_with_qsub1_in_FPR128_lo_and_QQQ_with_qsub2_in_FPR128_lo {6, 34}, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_4b {6, 34}, // ZPR3_with_zsub1_in_ZPR_4b_and_ZPR3_with_zsub2_in_ZPR_4b {3, 16}, // QQQ_with_dsub_in_FPR64_lo_and_QQQ_with_qsub2_in_FPR128_lo {6, 32}, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_4b {6, 34}, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 {6, 20}, // ZPR3_with_zsub0_in_ZPR_3b {6, 34}, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo {6, 20}, // ZPR3_with_zsub1_in_ZPR_3b {6, 34}, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo {6, 20}, // ZPR3_with_zsub2_in_ZPR_3b {6, 34}, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 {6, 18}, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_in_ZPR_3b {6, 30}, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo {6, 18}, // ZPR3_with_zsub1_in_ZPR_3b_and_ZPR3_with_zsub2_in_ZPR_3b {6, 30}, // ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo {6, 16}, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub2_in_ZPR_3b {6, 18}, // ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 {6, 18}, // ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b {6, 18}, // ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b {6, 18}, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 {6, 14}, // ZPR3_with_dsub_in_FPR64_lo_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b {6, 14}, // ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo {4, 32}, // QQQQ {8, 64}, // ZPR4 {4, 19}, // QQQQ_with_dsub_in_FPR64_lo {4, 19}, // QQQQ_with_qsub1_in_FPR128_lo {4, 19}, // QQQQ_with_qsub2_in_FPR128_lo {4, 19}, // QQQQ_with_qsub3_in_FPR128_lo {8, 38}, // ZPR4_with_dsub_in_FPR64_lo {8, 64}, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2 {8, 64}, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 {8, 38}, // ZPR4_with_zsub1_in_ZPR_4b {8, 38}, // ZPR4_with_zsub2_in_ZPR_4b {8, 38}, // ZPR4_with_zsub3_in_ZPR_4b {4, 18}, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub1_in_FPR128_lo {4, 18}, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub2_in_FPR128_lo {4, 18}, // QQQQ_with_qsub2_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo {8, 36}, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_4b {8, 36}, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub2_in_ZPR_4b {8, 36}, // ZPR4_with_zsub2_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b {4, 17}, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub2_in_FPR128_lo {4, 17}, // QQQQ_with_qsub1_in_FPR128_lo_and_QQQQ_with_qsub3_in_FPR128_lo {8, 34}, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_4b {8, 34}, // ZPR4_with_zsub1_in_ZPR_4b_and_ZPR4_with_zsub3_in_ZPR_4b {4, 16}, // QQQQ_with_dsub_in_FPR64_lo_and_QQQQ_with_qsub3_in_FPR128_lo {8, 32}, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_4b {8, 64}, // ZPR4Mul4 {8, 36}, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 {8, 22}, // ZPR4_with_zsub0_in_ZPR_3b {8, 36}, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo {8, 36}, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo {8, 22}, // ZPR4_with_zsub1_in_ZPR_3b {8, 36}, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo {8, 22}, // ZPR4_with_zsub2_in_ZPR_3b {8, 22}, // ZPR4_with_zsub3_in_ZPR_3b {8, 36}, // ZPR4_with_zsub3_in_ZPR_4b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 {8, 32}, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo {8, 20}, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_in_ZPR_3b {8, 32}, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_dsub_in_FPR64_lo {8, 20}, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub2_in_ZPR_3b {8, 32}, // ZPR4_with_zsub1_in_ZPR_4b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 {8, 20}, // ZPR4_with_zsub2_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b {8, 18}, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub2_in_ZPR_3b {8, 28}, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_4b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 {8, 18}, // ZPR4_with_zsub1_in_ZPR_3b_and_ZPR4_with_zsub3_in_ZPR_3b {8, 16}, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub3_in_ZPR_3b {8, 32}, // ZPR4Mul4_and_ZPR4_with_dsub_in_FPR64_lo {8, 20}, // ZPR4_with_dsub_in_FPR64_lo_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub0_in_ZPR_3b_and_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 {8, 20}, // ZPR4_with_zsub0_zsub1_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b {8, 20}, // ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b {8, 20}, // ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b {8, 20}, // ZPR4_with_zsub3_in_ZPR_3b_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2 {8, 16}, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub0_zsub1_zsub2_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b {8, 16}, // ZPR4_with_dsub_in_FPR64_lo_and_ZPR4_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub1_zsub2_in_ZPR2Mul2_and_ZPR2_with_zsub0_in_ZPR_3b {8, 16}, // ZPR4_with_zsub1_in_ZPR_3b_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 {8, 16}, // ZPR4Mul4_and_ZPR4_with_zsub0_in_ZPR_3b {8, 12}, // ZPR4_with_dsub_in_FPR64_lo_with_zsub1_zsub2_zsub3_in_ZPR3_with_zsub2_in_ZPR_3b_and_ZPR3_with_zsub0_zsub1_in_ZPR2Mul2 {8, 30}, // GPR64x8Class {8, 30}, // GPR64x8Class_with_x8sub_0_in_GPR64noip {8, 30}, // GPR64x8Class_with_x8sub_2_in_GPR64noip {8, 30}, // GPR64x8Class_with_x8sub_4_in_GPR64noip {8, 30}, // GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 30}, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip {8, 30}, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip {8, 30}, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 26}, // GPR64x8Class_with_x8sub_0_in_tcGPR64 {8, 30}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip {8, 30}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 30}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 26}, // GPR64x8Class_with_x8sub_0_in_GPR64noip_and_tcGPR64 {8, 26}, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_2_in_GPR64noip {8, 26}, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip {8, 26}, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 24}, // GPR64x8Class_with_x8sub_1_in_tcGPR64 {8, 30}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip {8, 30}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 30}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 30}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 26}, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip {8, 26}, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip {8, 26}, // GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 22}, // GPR64x8Class_with_x8sub_1_in_GPR64noip_and_tcGPR64 {8, 24}, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip {8, 24}, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 26}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip {8, 26}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 24}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_tcGPR64 {8, 26}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 28}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 64}, // ZPR4Strided {8, 22}, // GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 26}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_4_in_GPR64noip {8, 26}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 24}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_4_in_GPR64noip {8, 24}, // GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 20}, // GPR64x8Class_with_x8sub_3_in_GPR64noip_and_tcGPR64 {8, 26}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 24}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 26}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 22}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_tcGPR64 {8, 22}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 24}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_0_in_tcGPR64_and_GPR64x8Class_with_x8sub_0_in_GPR64noip_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 24}, // GPR64x8Class_with_x8sub_4_in_GPR64noip_and_GPR64x8Class_with_x8sub_2_in_GPR64noip_and_GPR64x8Class_with_x8sub_1_in_tcGPR64_and_GPR64x8Class_with_x8sub_6_in_GPR64noip {8, 18}, // GPR64x8Class_with_x8sub_5_in_GPR64noip_and_tcGPR64 {8, 20}, // GPR64x8Class_with_x8sub_6_in_GPR64noip_and_tcGPR64 {8, 16}, // GPR64x8Class_with_x8sub_7_in_GPR64noip_and_tcGPR64 {8, 14}, // GPR64x8Class_with_sub_32_in_GPR32arg {0, 0}, // MPR32 {8, 32}, // ZPR4Strided_with_dsub_in_FPR64_lo {8, 12}, // GPR64x8Class_with_x8sub_2_in_GPR64arg {8, 10}, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_12_15 {8, 10}, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11 {8, 10}, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_12_15 {8, 10}, // GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 {8, 10}, // GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 {8, 10}, // GPR64x8Class_with_x8sub_4_in_GPR64arg {8, 10}, // GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 {8, 8}, // GPR64x8Class_with_sub_32_in_GPR32arg_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 {8, 8}, // GPR64x8Class_with_sub_32_in_MatrixIndexGPR32_8_11_and_GPR64x8Class_with_x8sub_2_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 {8, 8}, // GPR64x8Class_with_x8sub_0_in_rtcGPR64 {8, 8}, // GPR64x8Class_with_x8sub_2_in_GPR64arg_and_GPR64x8Class_with_x8sub_4_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 {8, 8}, // GPR64x8Class_with_x8sub_2_in_rtcGPR64 {8, 8}, // GPR64x8Class_with_x8sub_4_in_GPR64arg_and_GPR64x8Class_with_x8sub_6_in_GPR64_with_sub_32_in_MatrixIndexGPR32_8_11 {8, 8}, // GPR64x8Class_with_x8sub_4_in_rtcGPR64 {8, 8}, // GPR64x8Class_with_x8sub_6_in_GPR64arg {8, 8}, // GPR64x8Class_with_x8sub_6_in_rtcGPR64 {8, 8}, // GPR64x8Class_with_x8sub_7_in_FIXED_REGS {1, 1}, // ZTR {0, 0}, // MPR16 {0, 0}, // MPR {0, 0}, // MPR8 }; return RCWeightTable[RC->getID()]; } /// Get the weight in units of pressure for this register unit. unsigned AArch64GenRegisterInfo:: getRegUnitWeight(unsigned RegUnit) const { assert(RegUnit < 134 && "invalid register unit"); // All register units have unit weight. return 1; } // Get the number of dimensions of register pressure. unsigned AArch64GenRegisterInfo::getNumRegPressureSets() const { return 45; } // Get the name of this register unit pressure set. const char *AArch64GenRegisterInfo:: getRegPressureSetName(unsigned Idx) const { static const char *PressureNameTable[] = { "ZTR", "PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15", "PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b", "rtcGPR64", "XSeqPairsClass_with_subo64_in_FIXED_REGS", "MatrixIndexGPR32_12_15", "MatrixIndexGPR32_8_11", "FIXED_REGS", "GPR64x8Class_with_x8sub_0_in_rtcGPR64", "GPR64x8Class_with_x8sub_7_in_FIXED_REGS", "PPR_3b", "PPR_p8to15", "FIXED_REGS_with_GPR64x8Class_with_x8sub_7_in_FIXED_REGS", "GPR64x8Class_with_x8sub_0_in_rtcGPR64_with_GPR64x8Class_with_x8sub_7_in_FIXED_REGS", "PPR", "GPR64x8Class_with_x8sub_6_in_rtcGPR64_with_GPR64x8Class_with_x8sub_0_in_rtcGPR64", "GPR64x8Class_with_x8sub_6_in_rtcGPR64", "FPR16_lo", "GPR64x8Class_with_x8sub_0_in_tcGPR64", "ZPR_3b", "FPR16_lo_with_ZPR_3b", "DD_with_dsub1_in_FPR64_lo_with_ZPR_3b", "DDD_with_dsub2_in_FPR64_lo_with_ZPR_3b", "DDD_with_dsub2_in_FPR64_lo_with_ZPR4_with_zsub1_in_ZPR_3b", "DDDD_with_dsub3_in_FPR64_lo_with_ZPR_3b", "DDDD_with_dsub3_in_FPR64_lo_with_ZPR4_with_zsub1_in_ZPR_3b", "DDDD_with_dsub3_in_FPR64_lo_with_ZPR4_with_zsub2_in_ZPR_3b", "GPR64x8Class_with_x8sub_0_in_tcGPR64_with_GPR64x8Class_with_x8sub_7_in_FIXED_REGS", "FPR16_lo_with_ZPR4_with_zsub1_in_ZPR_3b", "FPR8", "FPR16_lo_with_ZPR4_with_zsub2_in_ZPR_3b", "FPR16_lo_with_ZPR4_with_zsub3_in_ZPR_3b", "GPR32", "ZPR4_with_zsub3_in_ZPR_4b", "ZPR_4b", "FPR8_with_ZPR_3b", "FPR8_with_ZPR4_with_zsub1_in_ZPR_3b", "FPR8_with_ZPR4_with_zsub2_in_ZPR_3b", "FPR8_with_ZPR4_with_zsub3_in_ZPR_3b", "ZPR4_with_zsub2_in_ZPR_4b", "FPR8_with_ZPR_4b", "FPR8_with_ZPR4_with_zsub1_in_ZPR_4b", "FPR8_with_ZPR4_with_zsub2_in_ZPR_4b", "FPR8_with_ZPR4_with_zsub3_in_ZPR_4b", "ZPR", }; return PressureNameTable[Idx]; } // Get the register unit pressure limit for this dimension. // This limit must be adjusted dynamically for reserved registers. unsigned AArch64GenRegisterInfo:: getRegPressureSetLimit(const MachineFunction &MF, unsigned Idx) const { static const uint8_t PressureLimitTable[] = { 1, // 0: ZTR 2, // 1: PPR2_with_psub0_in_PPR_3b_and_PPR2_with_psub1_in_PPR_p8to15 2, // 2: PPR2_with_psub0_in_PPR_p8to15_and_PPR2_with_psub1_in_PPR_3b 2, // 3: rtcGPR64 2, // 4: XSeqPairsClass_with_subo64_in_FIXED_REGS 4, // 5: MatrixIndexGPR32_12_15 4, // 6: MatrixIndexGPR32_8_11 5, // 7: FIXED_REGS 8, // 8: GPR64x8Class_with_x8sub_0_in_rtcGPR64 8, // 9: GPR64x8Class_with_x8sub_7_in_FIXED_REGS 10, // 10: PPR_3b 10, // 11: PPR_p8to15 11, // 12: FIXED_REGS_with_GPR64x8Class_with_x8sub_7_in_FIXED_REGS 14, // 13: GPR64x8Class_with_x8sub_0_in_rtcGPR64_with_GPR64x8Class_with_x8sub_7_in_FIXED_REGS 16, // 14: PPR 16, // 15: GPR64x8Class_with_x8sub_6_in_rtcGPR64_with_GPR64x8Class_with_x8sub_0_in_rtcGPR64 18, // 16: GPR64x8Class_with_x8sub_6_in_rtcGPR64 22, // 17: FPR16_lo 26, // 18: GPR64x8Class_with_x8sub_0_in_tcGPR64 28, // 19: ZPR_3b 30, // 20: FPR16_lo_with_ZPR_3b 30, // 21: DD_with_dsub1_in_FPR64_lo_with_ZPR_3b 30, // 22: DDD_with_dsub2_in_FPR64_lo_with_ZPR_3b 30, // 23: DDD_with_dsub2_in_FPR64_lo_with_ZPR4_with_zsub1_in_ZPR_3b 30, // 24: DDDD_with_dsub3_in_FPR64_lo_with_ZPR_3b 30, // 25: DDDD_with_dsub3_in_FPR64_lo_with_ZPR4_with_zsub1_in_ZPR_3b 30, // 26: DDDD_with_dsub3_in_FPR64_lo_with_ZPR4_with_zsub2_in_ZPR_3b 30, // 27: GPR64x8Class_with_x8sub_0_in_tcGPR64_with_GPR64x8Class_with_x8sub_7_in_FIXED_REGS 31, // 28: FPR16_lo_with_ZPR4_with_zsub1_in_ZPR_3b 32, // 29: FPR8 32, // 30: FPR16_lo_with_ZPR4_with_zsub2_in_ZPR_3b 33, // 31: FPR16_lo_with_ZPR4_with_zsub3_in_ZPR_3b 35, // 32: GPR32 41, // 33: ZPR4_with_zsub3_in_ZPR_4b 41, // 34: ZPR_4b 43, // 35: FPR8_with_ZPR_3b 43, // 36: FPR8_with_ZPR4_with_zsub1_in_ZPR_3b 43, // 37: FPR8_with_ZPR4_with_zsub2_in_ZPR_3b 43, // 38: FPR8_with_ZPR4_with_zsub3_in_ZPR_3b 44, // 39: ZPR4_with_zsub2_in_ZPR_4b 51, // 40: FPR8_with_ZPR_4b 51, // 41: FPR8_with_ZPR4_with_zsub1_in_ZPR_4b 51, // 42: FPR8_with_ZPR4_with_zsub2_in_ZPR_4b 51, // 43: FPR8_with_ZPR4_with_zsub3_in_ZPR_4b 64, // 44: ZPR }; return PressureLimitTable[Idx]; } /// Table of pressure sets per register class or unit. static const int RCSetsTable[] = { /* 0 */ 0, -1, /* 2 */ 10, 14, -1, /* 5 */ 1, 10, 11, 14, -1, /* 10 */ 2, 10, 11, 14, -1, /* 15 */ 7, 12, 32, -1, /* 19 */ 4, 7, 9, 12, 13, 27, 32, -1, /* 27 */ 9, 12, 13, 18, 27, 32, -1, /* 34 */ 8, 13, 15, 18, 27, 32, -1, /* 41 */ 8, 9, 12, 13, 15, 18, 27, 32, -1, /* 50 */ 5, 15, 16, 18, 27, 32, -1, /* 57 */ 6, 15, 16, 18, 27, 32, -1, /* 64 */ 3, 8, 13, 15, 16, 18, 27, 32, -1, /* 73 */ 34, 39, 40, 44, -1, /* 78 */ 39, 41, 44, -1, /* 82 */ 34, 39, 40, 41, 44, -1, /* 88 */ 39, 42, 44, -1, /* 92 */ 39, 41, 42, 44, -1, /* 97 */ 34, 39, 40, 41, 42, 44, -1, /* 104 */ 33, 39, 43, 44, -1, /* 109 */ 19, 31, 33, 38, 39, 43, 44, -1, /* 117 */ 33, 39, 42, 43, 44, -1, /* 123 */ 19, 26, 30, 33, 37, 39, 42, 43, 44, -1, /* 133 */ 19, 26, 30, 31, 33, 37, 38, 39, 42, 43, 44, -1, /* 145 */ 33, 39, 41, 42, 43, 44, -1, /* 152 */ 19, 23, 25, 28, 33, 36, 39, 41, 42, 43, 44, -1, /* 164 */ 19, 23, 25, 26, 28, 30, 33, 36, 37, 39, 41, 42, 43, 44, -1, /* 179 */ 19, 23, 25, 26, 28, 30, 31, 33, 36, 37, 38, 39, 41, 42, 43, 44, -1, /* 196 */ 29, 35, 36, 37, 38, 40, 41, 42, 43, 44, -1, /* 207 */ 33, 34, 39, 40, 41, 42, 43, 44, -1, /* 216 */ 19, 20, 21, 22, 24, 33, 34, 35, 39, 40, 41, 42, 43, 44, -1, /* 231 */ 19, 20, 21, 22, 23, 24, 25, 28, 33, 34, 35, 36, 39, 40, 41, 42, 43, 44, -1, /* 250 */ 19, 20, 21, 22, 23, 24, 25, 26, 28, 30, 33, 34, 35, 36, 37, 39, 40, 41, 42, 43, 44, -1, /* 272 */ 17, 24, 25, 26, 29, 31, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, -1, /* 291 */ 17, 19, 24, 25, 26, 29, 31, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, -1, /* 311 */ 19, 20, 21, 22, 23, 24, 25, 26, 28, 30, 31, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, -1, /* 335 */ 17, 22, 23, 29, 30, 31, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, -1, /* 354 */ 17, 22, 23, 24, 25, 26, 29, 30, 31, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, -1, /* 376 */ 17, 19, 22, 23, 24, 25, 26, 29, 30, 31, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, -1, /* 399 */ 17, 20, 28, 29, 30, 31, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, -1, /* 418 */ 17, 21, 28, 29, 30, 31, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, -1, /* 437 */ 17, 20, 21, 28, 29, 30, 31, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, -1, /* 457 */ 17, 21, 22, 23, 28, 29, 30, 31, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, -1, /* 478 */ 17, 20, 21, 22, 23, 28, 29, 30, 31, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, -1, /* 500 */ 17, 21, 22, 23, 24, 25, 26, 28, 29, 30, 31, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, -1, /* 524 */ 17, 19, 21, 22, 23, 24, 25, 26, 28, 29, 30, 31, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, -1, /* 549 */ 17, 20, 21, 22, 23, 24, 25, 26, 28, 29, 30, 31, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, -1, /* 574 */ 17, 19, 20, 21, 22, 23, 24, 25, 26, 28, 29, 30, 31, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, -1, }; /// Get the dimensions of register pressure impacted by this register class. /// Returns a -1 terminated array of pressure set IDs const int *AArch64GenRegisterInfo:: getRegClassPressureSets(const TargetRegisterClass *RC) const { static const uint16_t RCSetStartTable[] = { 196,196,549,3,2,7,3,3,2,7,2,7,2,7,2,7,5,10,17,196,17,17,17,549,30,50,57,1,15,17,24,30,50,57,17,196,17,17,17,17,24,30,30,549,30,15,50,57,15,64,19,15,196,478,500,17,549,24,17,24,30,30,30,30,30,50,57,64,19,196,76,549,1,207,311,196,437,457,354,478,500,549,196,399,418,335,272,437,457,354,478,500,549,196,76,478,500,76,97,145,549,207,207,250,179,311,311,76,1,207,196,76,437,457,354,82,76,92,76,117,478,500,97,145,549,207,82,231,97,164,145,133,117,250,207,179,207,311,231,250,179,133,311,311,196,76,399,418,335,272,73,76,76,78,88,104,437,457,354,82,92,117,478,500,97,145,549,207,76,73,216,82,92,152,117,123,109,104,97,231,207,164,145,133,250,207,179,311,207,216,231,164,133,109,250,311,179,311,311,24,24,24,24,24,24,24,24,30,24,24,24,30,30,30,30,30,24,24,24,24,30,30,30,30,30,30,30,30,30,30,24,76,30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,30,1,207,30,51,51,51,52,52,30,30,52,51,34,52,51,30,51,30,51,21,0,1,1,1,}; return &RCSetsTable[RCSetStartTable[RC->getID()]]; } /// Get the dimensions of register pressure impacted by this register unit. /// Returns a -1 terminated array of pressure set IDs const int *AArch64GenRegisterInfo:: getRegUnitPressureSets(unsigned RegUnit) const { assert(RegUnit < 134 && "invalid register unit"); static const uint16_t RUSetStartTable[] = { 15,19,1,17,1,15,15,17,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,574,574,574,574,574,574,574,574,574,574,574,549,549,549,549,549,478,437,399,196,196,196,196,196,196,196,196,196,196,291,376,524,10,2,2,2,2,2,2,5,5,7,7,7,7,7,7,10,30,30,30,30,52,52,52,52,57,57,57,57,50,50,50,50,64,64,65,65,65,65,41,41,27,27,21,21,19,311,311,311,311,311,311,311,311,250,231,216,207,207,207,207,207,97,82,73,76,76,76,76,76,76,76,76,76,76,109,133,179,0,}; return &RCSetsTable[RUSetStartTable[RegUnit]]; } extern const MCRegisterDesc AArch64RegDesc[]; extern const MCPhysReg AArch64RegDiffLists[]; extern const LaneBitmask AArch64LaneMaskLists[]; extern const char AArch64RegStrings[]; extern const char AArch64RegClassStrings[]; extern const MCPhysReg AArch64RegUnitRoots[][2]; extern const uint16_t AArch64SubRegIdxLists[]; extern const MCRegisterInfo::SubRegCoveredBits AArch64SubRegIdxRanges[]; extern const uint16_t AArch64RegEncodingTable[]; // AArch64 Dwarf<->LLVM register mappings. extern const MCRegisterInfo::DwarfLLVMRegPair AArch64DwarfFlavour0Dwarf2L[]; extern const unsigned AArch64DwarfFlavour0Dwarf2LSize; extern const MCRegisterInfo::DwarfLLVMRegPair AArch64EHFlavour0Dwarf2L[]; extern const unsigned AArch64EHFlavour0Dwarf2LSize; extern const MCRegisterInfo::DwarfLLVMRegPair AArch64DwarfFlavour0L2Dwarf[]; extern const unsigned AArch64DwarfFlavour0L2DwarfSize; extern const MCRegisterInfo::DwarfLLVMRegPair AArch64EHFlavour0L2Dwarf[]; extern const unsigned AArch64EHFlavour0L2DwarfSize; AArch64GenRegisterInfo:: AArch64GenRegisterInfo(unsigned RA, unsigned DwarfFlavour, unsigned EHFlavour, unsigned PC, unsigned HwMode) : TargetRegisterInfo(&AArch64RegInfoDesc, RegisterClasses, RegisterClasses+273, SubRegIndexNameTable, SubRegIndexLaneMaskTable, LaneBitmask(0xFFFFFFFFFF800036), RegClassInfos, HwMode) { InitMCRegisterInfo(AArch64RegDesc, 716, RA, PC, AArch64MCRegisterClasses, 273, AArch64RegUnitRoots, 134, AArch64RegDiffLists, AArch64LaneMaskLists, AArch64RegStrings, AArch64RegClassStrings, AArch64SubRegIdxLists, 156, AArch64SubRegIdxRanges, AArch64RegEncodingTable); switch (DwarfFlavour) { default: llvm_unreachable("Unknown DWARF flavour"); case 0: mapDwarfRegsToLLVMRegs(AArch64DwarfFlavour0Dwarf2L, AArch64DwarfFlavour0Dwarf2LSize, false); break; } switch (EHFlavour) { default: llvm_unreachable("Unknown DWARF flavour"); case 0: mapDwarfRegsToLLVMRegs(AArch64EHFlavour0Dwarf2L, AArch64EHFlavour0Dwarf2LSize, true); break; } switch (DwarfFlavour) { default: llvm_unreachable("Unknown DWARF flavour"); case 0: mapLLVMRegsToDwarfRegs(AArch64DwarfFlavour0L2Dwarf, AArch64DwarfFlavour0L2DwarfSize, false); break; } switch (EHFlavour) { default: llvm_unreachable("Unknown DWARF flavour"); case 0: mapLLVMRegsToDwarfRegs(AArch64EHFlavour0L2Dwarf, AArch64EHFlavour0L2DwarfSize, true); break; } } static const MCPhysReg CSR_AArch64_AAPCS_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, 0 }; static const uint32_t CSR_AArch64_AAPCS_RegMask[] = { 0x0ff00614, 0x0ff00000, 0x0ff00000, 0x00000000, 0x00000000, 0x00000ff0, 0x07ff8000, 0x00ffc000, 0x00000000, 0x00000000, 0x00000000, 0x0000007f, 0x0000001f, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x80080100, 0x000f002f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_AArch64_AAPCS_SCS_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X18, 0 }; static const uint32_t CSR_AArch64_AAPCS_SCS_RegMask[] = { 0x0ff00614, 0x0ff00000, 0x0ff00000, 0x00000000, 0x00000000, 0x00000ff0, 0x07ffc000, 0x00ffe000, 0x00000000, 0x00000000, 0x00000000, 0x0000007f, 0x0000001f, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0xc00c0100, 0x000f802f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_AArch64_AAPCS_SwiftError_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, 0 }; static const uint32_t CSR_AArch64_AAPCS_SwiftError_RegMask[] = { 0x0ff00614, 0x0ff00000, 0x0ff00000, 0x00000000, 0x00000000, 0x00000ff0, 0x07fd8000, 0x00fec000, 0x00000000, 0x00000000, 0x00000000, 0x0000007f, 0x0000001f, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x00000100, 0x000e002f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_AArch64_AAPCS_SwiftError_SCS_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X18, 0 }; static const uint32_t CSR_AArch64_AAPCS_SwiftError_SCS_RegMask[] = { 0x0ff00614, 0x0ff00000, 0x0ff00000, 0x00000000, 0x00000000, 0x00000ff0, 0x07fdc000, 0x00fee000, 0x00000000, 0x00000000, 0x00000000, 0x0000007f, 0x0000001f, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x40000100, 0x000e802f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_AArch64_AAPCS_SwiftTail_SaveList[] = { AArch64::X19, AArch64::X21, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, 0 }; static const uint32_t CSR_AArch64_AAPCS_SwiftTail_RegMask[] = { 0x0ff00614, 0x0ff00000, 0x0ff00000, 0x00000000, 0x00000000, 0x00000ff0, 0x07fa8000, 0x00fd4000, 0x00000000, 0x00000000, 0x00000000, 0x0000007f, 0x0000001f, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000c002e, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_AArch64_AAPCS_ThisReturn_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X0, 0 }; static const uint32_t CSR_AArch64_AAPCS_ThisReturn_RegMask[] = { 0x0ff00614, 0x0ff00000, 0x0ff00000, 0x00000000, 0x00000000, 0x10000ff0, 0x0fff8000, 0x00ffc000, 0x00000000, 0x00000000, 0x00000000, 0x0000007f, 0x0000001f, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x80080100, 0x000f002f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_AArch64_AAPCS_X18_SaveList[] = { AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, 0 }; static const uint32_t CSR_AArch64_AAPCS_X18_RegMask[] = { 0x0ff00614, 0x0ff00000, 0x0ff00000, 0x00000000, 0x00000000, 0x00000ff0, 0x07ffc000, 0x00ffe000, 0x00000000, 0x00000000, 0x00000000, 0x0000007f, 0x0000001f, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0xc00c0100, 0x000f802f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_AArch64_AAVPCS_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, 0 }; static const uint32_t CSR_AArch64_AAVPCS_RegMask[] = { 0xfff00614, 0xfff0000f, 0xfff0000f, 0x0000000f, 0x000ffff0, 0x000ffff0, 0x07ff8000, 0x00ffc000, 0x00000000, 0x00000000, 0x00000000, 0x00007fff, 0x00001fff, 0x00003fff, 0x7fff0000, 0x1fff0000, 0x3fff0000, 0x80080100, 0x000f002f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_AArch64_AAVPCS_SCS_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::X18, 0 }; static const uint32_t CSR_AArch64_AAVPCS_SCS_RegMask[] = { 0xfff00614, 0xfff0000f, 0xfff0000f, 0x0000000f, 0x000ffff0, 0x000ffff0, 0x07ffc000, 0x00ffe000, 0x00000000, 0x00000000, 0x00000000, 0x00007fff, 0x00001fff, 0x00003fff, 0x7fff0000, 0x1fff0000, 0x3fff0000, 0xc00c0100, 0x000f802f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_AArch64_AllRegs_SaveList[] = { AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WSP, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::SP, AArch64::B0, AArch64::B1, AArch64::B2, AArch64::B3, AArch64::B4, AArch64::B5, AArch64::B6, AArch64::B7, AArch64::B8, AArch64::B9, AArch64::B10, AArch64::B11, AArch64::B12, AArch64::B13, AArch64::B14, AArch64::B15, AArch64::B16, AArch64::B17, AArch64::B18, AArch64::B19, AArch64::B20, AArch64::B21, AArch64::B22, AArch64::B23, AArch64::B24, AArch64::B25, AArch64::B26, AArch64::B27, AArch64::B28, AArch64::B29, AArch64::B30, AArch64::B31, AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7, AArch64::H8, AArch64::H9, AArch64::H10, AArch64::H11, AArch64::H12, AArch64::H13, AArch64::H14, AArch64::H15, AArch64::H16, AArch64::H17, AArch64::H18, AArch64::H19, AArch64::H20, AArch64::H21, AArch64::H22, AArch64::H23, AArch64::H24, AArch64::H25, AArch64::H26, AArch64::H27, AArch64::H28, AArch64::H29, AArch64::H30, AArch64::H31, AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7, AArch64::S8, AArch64::S9, AArch64::S10, AArch64::S11, AArch64::S12, AArch64::S13, AArch64::S14, AArch64::S15, AArch64::S16, AArch64::S17, AArch64::S18, AArch64::S19, AArch64::S20, AArch64::S21, AArch64::S22, AArch64::S23, AArch64::S24, AArch64::S25, AArch64::S26, AArch64::S27, AArch64::S28, AArch64::S29, AArch64::S30, AArch64::S31, AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::D16, AArch64::D17, AArch64::D18, AArch64::D19, AArch64::D20, AArch64::D21, AArch64::D22, AArch64::D23, AArch64::D24, AArch64::D25, AArch64::D26, AArch64::D27, AArch64::D28, AArch64::D29, AArch64::D30, AArch64::D31, AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, 0 }; static const uint32_t CSR_AArch64_AllRegs_RegMask[] = { 0xfffff754, 0xffffffff, 0xffffffff, 0xf0000fff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00ffffff, 0x00000000, 0x00000000, 0xff000000, 0xffffffff, 0xffffffff, 0x00ffffff, 0xffffff00, 0xffffffff, 0xffffffff, 0xffefffff, 0x000fffef, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_AArch64_AllRegs_SCS_SaveList[] = { AArch64::W0, AArch64::W1, AArch64::W2, AArch64::W3, AArch64::W4, AArch64::W5, AArch64::W6, AArch64::W7, AArch64::W8, AArch64::W9, AArch64::W10, AArch64::W11, AArch64::W12, AArch64::W13, AArch64::W14, AArch64::W15, AArch64::W16, AArch64::W17, AArch64::W18, AArch64::W19, AArch64::W20, AArch64::W21, AArch64::W22, AArch64::W23, AArch64::W24, AArch64::W25, AArch64::W26, AArch64::W27, AArch64::W28, AArch64::W29, AArch64::W30, AArch64::WSP, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::SP, AArch64::B0, AArch64::B1, AArch64::B2, AArch64::B3, AArch64::B4, AArch64::B5, AArch64::B6, AArch64::B7, AArch64::B8, AArch64::B9, AArch64::B10, AArch64::B11, AArch64::B12, AArch64::B13, AArch64::B14, AArch64::B15, AArch64::B16, AArch64::B17, AArch64::B18, AArch64::B19, AArch64::B20, AArch64::B21, AArch64::B22, AArch64::B23, AArch64::B24, AArch64::B25, AArch64::B26, AArch64::B27, AArch64::B28, AArch64::B29, AArch64::B30, AArch64::B31, AArch64::H0, AArch64::H1, AArch64::H2, AArch64::H3, AArch64::H4, AArch64::H5, AArch64::H6, AArch64::H7, AArch64::H8, AArch64::H9, AArch64::H10, AArch64::H11, AArch64::H12, AArch64::H13, AArch64::H14, AArch64::H15, AArch64::H16, AArch64::H17, AArch64::H18, AArch64::H19, AArch64::H20, AArch64::H21, AArch64::H22, AArch64::H23, AArch64::H24, AArch64::H25, AArch64::H26, AArch64::H27, AArch64::H28, AArch64::H29, AArch64::H30, AArch64::H31, AArch64::S0, AArch64::S1, AArch64::S2, AArch64::S3, AArch64::S4, AArch64::S5, AArch64::S6, AArch64::S7, AArch64::S8, AArch64::S9, AArch64::S10, AArch64::S11, AArch64::S12, AArch64::S13, AArch64::S14, AArch64::S15, AArch64::S16, AArch64::S17, AArch64::S18, AArch64::S19, AArch64::S20, AArch64::S21, AArch64::S22, AArch64::S23, AArch64::S24, AArch64::S25, AArch64::S26, AArch64::S27, AArch64::S28, AArch64::S29, AArch64::S30, AArch64::S31, AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::D16, AArch64::D17, AArch64::D18, AArch64::D19, AArch64::D20, AArch64::D21, AArch64::D22, AArch64::D23, AArch64::D24, AArch64::D25, AArch64::D26, AArch64::D27, AArch64::D28, AArch64::D29, AArch64::D30, AArch64::D31, AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, 0 }; static const uint32_t CSR_AArch64_AllRegs_SCS_RegMask[] = { 0xfffff754, 0xffffffff, 0xffffffff, 0xf0000fff, 0xffffffff, 0xffffffff, 0xffffffff, 0x00ffffff, 0x00000000, 0x00000000, 0xff000000, 0xffffffff, 0xffffffff, 0x00ffffff, 0xffffff00, 0xffffffff, 0xffffffff, 0xffefffff, 0x000fffef, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_AArch64_NoRegs_SaveList[] = { 0 }; static const uint32_t CSR_AArch64_NoRegs_RegMask[] = { 0x00000600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_AArch64_NoRegs_SCS_SaveList[] = { AArch64::X18, 0 }; static const uint32_t CSR_AArch64_NoRegs_SCS_RegMask[] = { 0x00000600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00004000, 0x00002000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_AArch64_RT_MostRegs_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, 0 }; static const uint32_t CSR_AArch64_RT_MostRegs_RegMask[] = { 0x0ff00614, 0x0ff00000, 0x0ff00000, 0x00000000, 0x00000000, 0x00000ff0, 0x07ff8fe0, 0x00ffc7f0, 0x00000000, 0x00000000, 0x00000000, 0x0000007f, 0x0000001f, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x9c080100, 0x000f382f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_AArch64_RT_MostRegs_SCS_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X18, 0 }; static const uint32_t CSR_AArch64_RT_MostRegs_SCS_RegMask[] = { 0x0ff00614, 0x0ff00000, 0x0ff00000, 0x00000000, 0x00000000, 0x00000ff0, 0x07ffcfe0, 0x00ffe7f0, 0x00000000, 0x00000000, 0x00000000, 0x0000007f, 0x0000001f, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0xdc0c0100, 0x000fb82f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X0_SaveList[] = { AArch64::Z0, AArch64::Z1, AArch64::Z2, AArch64::Z3, AArch64::Z4, AArch64::Z5, AArch64::Z6, AArch64::Z7, AArch64::Z8, AArch64::Z9, AArch64::Z10, AArch64::Z11, AArch64::Z12, AArch64::Z13, AArch64::Z14, AArch64::Z15, AArch64::Z16, AArch64::Z17, AArch64::Z18, AArch64::Z19, AArch64::Z20, AArch64::Z21, AArch64::Z22, AArch64::Z23, AArch64::Z24, AArch64::Z25, AArch64::Z26, AArch64::Z27, AArch64::Z28, AArch64::Z29, AArch64::Z30, AArch64::Z31, AArch64::P0, AArch64::P1, AArch64::P2, AArch64::P3, AArch64::P4, AArch64::P5, AArch64::P6, AArch64::P7, AArch64::P8, AArch64::P9, AArch64::P10, AArch64::P11, AArch64::P12, AArch64::P13, AArch64::P14, AArch64::P15, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, 0 }; static const uint32_t CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X0_RegMask[] = { 0xfffff614, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffff83ff, 0xffffc1ff, 0x00ffffff, 0xff000000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x8fe81fff, 0xffff1fef, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000fff, }; static const MCPhysReg CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X2_SaveList[] = { AArch64::Z0, AArch64::Z1, AArch64::Z2, AArch64::Z3, AArch64::Z4, AArch64::Z5, AArch64::Z6, AArch64::Z7, AArch64::Z8, AArch64::Z9, AArch64::Z10, AArch64::Z11, AArch64::Z12, AArch64::Z13, AArch64::Z14, AArch64::Z15, AArch64::Z16, AArch64::Z17, AArch64::Z18, AArch64::Z19, AArch64::Z20, AArch64::Z21, AArch64::Z22, AArch64::Z23, AArch64::Z24, AArch64::Z25, AArch64::Z26, AArch64::Z27, AArch64::Z28, AArch64::Z29, AArch64::Z30, AArch64::Z31, AArch64::P0, AArch64::P1, AArch64::P2, AArch64::P3, AArch64::P4, AArch64::P5, AArch64::P6, AArch64::P7, AArch64::P8, AArch64::P9, AArch64::P10, AArch64::P11, AArch64::P12, AArch64::P13, AArch64::P14, AArch64::P15, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, 0 }; static const uint32_t CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X2_RegMask[] = { 0xfffff614, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xcfffffff, 0xe7ff8fff, 0xffffc7ff, 0x00ffffff, 0xff000000, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x9fc83dff, 0xffff3faf, 0xffffffff, 0xffffffff, 0xffffffff, 0x00000fff, }; static const MCPhysReg CSR_AArch64_SMStartStop_SaveList[] = { AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, 0 }; static const uint32_t CSR_AArch64_SMStartStop_RegMask[] = { 0x00000614, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xf0000000, 0xffffffff, 0x00ffffff, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0xffefff00, 0x000fffef, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_AArch64_SVE_AAPCS_SaveList[] = { AArch64::Z8, AArch64::Z9, AArch64::Z10, AArch64::Z11, AArch64::Z12, AArch64::Z13, AArch64::Z14, AArch64::Z15, AArch64::Z16, AArch64::Z17, AArch64::Z18, AArch64::Z19, AArch64::Z20, AArch64::Z21, AArch64::Z22, AArch64::Z23, AArch64::P4, AArch64::P5, AArch64::P6, AArch64::P7, AArch64::P8, AArch64::P9, AArch64::P10, AArch64::P11, AArch64::P12, AArch64::P13, AArch64::P14, AArch64::P15, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, 0 }; static const uint32_t CSR_AArch64_SVE_AAPCS_RegMask[] = { 0xfff00614, 0xfff0000f, 0xfff0000f, 0x0fff000f, 0x000ffff0, 0x000ffff0, 0x07ff8000, 0x00ffc000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00007fff, 0x00001fff, 0xf0003fff, 0x7fff007f, 0x1fff0000, 0x3fff0000, 0x80080100, 0xf00f002f, 0xf00007ff, 0xf00001ff, 0x000003ff, 0x00000000, }; static const MCPhysReg CSR_AArch64_SVE_AAPCS_SCS_SaveList[] = { AArch64::Z8, AArch64::Z9, AArch64::Z10, AArch64::Z11, AArch64::Z12, AArch64::Z13, AArch64::Z14, AArch64::Z15, AArch64::Z16, AArch64::Z17, AArch64::Z18, AArch64::Z19, AArch64::Z20, AArch64::Z21, AArch64::Z22, AArch64::Z23, AArch64::P4, AArch64::P5, AArch64::P6, AArch64::P7, AArch64::P8, AArch64::P9, AArch64::P10, AArch64::P11, AArch64::P12, AArch64::P13, AArch64::P14, AArch64::P15, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::LR, AArch64::FP, AArch64::X18, 0 }; static const uint32_t CSR_AArch64_SVE_AAPCS_SCS_RegMask[] = { 0xfff00614, 0xfff0000f, 0xfff0000f, 0x0fff000f, 0x000ffff0, 0x000ffff0, 0x07ffc000, 0x00ffe000, 0x0000ffff, 0x00000000, 0x0000ffff, 0x00007fff, 0x00001fff, 0xf0003fff, 0x7fff007f, 0x1fff0000, 0x3fff0000, 0xc00c0100, 0xf00f802f, 0xf00007ff, 0xf00001ff, 0x000003ff, 0x00000000, }; static const MCPhysReg CSR_AArch64_StackProbe_Windows_SaveList[] = { AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::SP, AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, 0 }; static const uint32_t CSR_AArch64_StackProbe_Windows_RegMask[] = { 0xfffff744, 0xffffffff, 0xffffffff, 0xf0000fff, 0xffffffff, 0xffffffff, 0xfbffcfff, 0x00ffe7ff, 0x00000000, 0x00000000, 0xff000000, 0xffffffff, 0xffffffff, 0x00ffffff, 0xffffff00, 0xffffffff, 0xffffffff, 0xdfec3fff, 0x000fbfef, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_AArch64_TLS_ELF_SaveList[] = { AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X16, AArch64::X17, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, 0 }; static const uint32_t CSR_AArch64_TLS_ELF_RegMask[] = { 0xfffff604, 0xffffffff, 0xffffffff, 0xf0000fff, 0xffffffff, 0xefffffff, 0xf3ffffff, 0x00ffffff, 0x00000000, 0x00000000, 0xff000000, 0xffffffff, 0xffffffff, 0x00ffffff, 0xffffff00, 0xffffffff, 0xffffffff, 0xffcffdff, 0x000fffaf, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_Darwin_AArch64_AAPCS_SaveList[] = { AArch64::LR, AArch64::FP, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, 0 }; static const uint32_t CSR_Darwin_AArch64_AAPCS_RegMask[] = { 0x0ff00614, 0x0ff00000, 0x0ff00000, 0x00000000, 0x00000000, 0x00000ff0, 0x07ff8000, 0x00ffc000, 0x00000000, 0x00000000, 0x00000000, 0x0000007f, 0x0000001f, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x80080100, 0x000f002f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_Darwin_AArch64_AAPCS_SwiftError_SaveList[] = { AArch64::LR, AArch64::FP, AArch64::X19, AArch64::X20, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, 0 }; static const uint32_t CSR_Darwin_AArch64_AAPCS_SwiftError_RegMask[] = { 0x0ff00614, 0x0ff00000, 0x0ff00000, 0x00000000, 0x00000000, 0x00000ff0, 0x07fd8000, 0x00fec000, 0x00000000, 0x00000000, 0x00000000, 0x0000007f, 0x0000001f, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x00000100, 0x000e002f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_Darwin_AArch64_AAPCS_SwiftTail_SaveList[] = { AArch64::LR, AArch64::FP, AArch64::X19, AArch64::X21, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, 0 }; static const uint32_t CSR_Darwin_AArch64_AAPCS_SwiftTail_RegMask[] = { 0x0ff00614, 0x0ff00000, 0x0ff00000, 0x00000000, 0x00000000, 0x00000ff0, 0x07fa8000, 0x00fd4000, 0x00000000, 0x00000000, 0x00000000, 0x0000007f, 0x0000001f, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x000c002e, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_Darwin_AArch64_AAPCS_ThisReturn_SaveList[] = { AArch64::LR, AArch64::FP, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X0, 0 }; static const uint32_t CSR_Darwin_AArch64_AAPCS_ThisReturn_RegMask[] = { 0x0ff00614, 0x0ff00000, 0x0ff00000, 0x00000000, 0x00000000, 0x10000ff0, 0x0fff8000, 0x00ffc000, 0x00000000, 0x00000000, 0x00000000, 0x0000007f, 0x0000001f, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x80080100, 0x000f002f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_Darwin_AArch64_AAPCS_Win64_SaveList[] = { AArch64::LR, AArch64::FP, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X18, 0 }; static const uint32_t CSR_Darwin_AArch64_AAPCS_Win64_RegMask[] = { 0x0ff00614, 0x0ff00000, 0x0ff00000, 0x00000000, 0x00000000, 0x00000ff0, 0x07ffc000, 0x00ffe000, 0x00000000, 0x00000000, 0x00000000, 0x0000007f, 0x0000001f, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0xc00c0100, 0x000f802f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_Darwin_AArch64_AAVPCS_SaveList[] = { AArch64::LR, AArch64::FP, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, 0 }; static const uint32_t CSR_Darwin_AArch64_AAVPCS_RegMask[] = { 0xfff00614, 0xfff0000f, 0xfff0000f, 0x0000000f, 0x000ffff0, 0x000ffff0, 0x07ff8000, 0x00ffc000, 0x00000000, 0x00000000, 0x00000000, 0x00007fff, 0x00001fff, 0x00003fff, 0x7fff0000, 0x1fff0000, 0x3fff0000, 0x80080100, 0x000f002f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_Darwin_AArch64_CXX_TLS_SaveList[] = { AArch64::LR, AArch64::FP, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7, AArch64::D16, AArch64::D17, AArch64::D18, AArch64::D19, AArch64::D20, AArch64::D21, AArch64::D22, AArch64::D23, AArch64::D24, AArch64::D25, AArch64::D26, AArch64::D27, AArch64::D28, AArch64::D29, AArch64::D30, AArch64::D31, 0 }; static const uint32_t CSR_Darwin_AArch64_CXX_TLS_RegMask[] = { 0xfffff614, 0xffffffff, 0xffffffff, 0x00000fff, 0xf0000000, 0xefffffff, 0xf7ff87df, 0x00ffc3ef, 0x00000000, 0x00000000, 0xff000000, 0xffffffff, 0xffffffff, 0x00ffffff, 0x00000000, 0x00000000, 0x00000000, 0x8dc80100, 0x000f1baf, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_Darwin_AArch64_CXX_TLS_PE_SaveList[] = { AArch64::LR, AArch64::FP, 0 }; static const uint32_t CSR_Darwin_AArch64_CXX_TLS_PE_RegMask[] = { 0x00000614, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x06000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_Darwin_AArch64_CXX_TLS_ViaCopy_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::D0, AArch64::D1, AArch64::D2, AArch64::D3, AArch64::D4, AArch64::D5, AArch64::D6, AArch64::D7, AArch64::D16, AArch64::D17, AArch64::D18, AArch64::D19, AArch64::D20, AArch64::D21, AArch64::D22, AArch64::D23, AArch64::D24, AArch64::D25, AArch64::D26, AArch64::D27, AArch64::D28, AArch64::D29, AArch64::D30, AArch64::D31, 0 }; static const uint32_t CSR_Darwin_AArch64_CXX_TLS_ViaCopy_RegMask[] = { 0xfffff600, 0xffffffff, 0xffffffff, 0x00000fff, 0xf0000000, 0xefffffff, 0xf1ff87df, 0x00ffc3ef, 0x00000000, 0x00000000, 0xff000000, 0xffffffff, 0xffffffff, 0x00ffffff, 0x00000000, 0x00000000, 0x00000000, 0x8dc80000, 0x000f1b87, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_Darwin_AArch64_RT_MostRegs_SaveList[] = { AArch64::LR, AArch64::FP, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, 0 }; static const uint32_t CSR_Darwin_AArch64_RT_MostRegs_RegMask[] = { 0x0ff00614, 0x0ff00000, 0x0ff00000, 0x00000000, 0x00000000, 0x00000ff0, 0x07ff8fe0, 0x00ffc7f0, 0x00000000, 0x00000000, 0x00000000, 0x0000007f, 0x0000001f, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x9c080100, 0x000f382f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_Darwin_AArch64_TLS_SaveList[] = { AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::X9, AArch64::X10, AArch64::X11, AArch64::X12, AArch64::X13, AArch64::X14, AArch64::X15, AArch64::X18, AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, AArch64::Q8, AArch64::Q9, AArch64::Q10, AArch64::Q11, AArch64::Q12, AArch64::Q13, AArch64::Q14, AArch64::Q15, AArch64::Q16, AArch64::Q17, AArch64::Q18, AArch64::Q19, AArch64::Q20, AArch64::Q21, AArch64::Q22, AArch64::Q23, AArch64::Q24, AArch64::Q25, AArch64::Q26, AArch64::Q27, AArch64::Q28, AArch64::Q29, AArch64::Q30, AArch64::Q31, 0 }; static const uint32_t CSR_Darwin_AArch64_TLS_RegMask[] = { 0xfffff604, 0xffffffff, 0xffffffff, 0xf0000fff, 0xffffffff, 0xefffffff, 0xf3ffcfff, 0x00ffe7ff, 0x00000000, 0x00000000, 0xff000000, 0xffffffff, 0xffffffff, 0x00ffffff, 0xffffff00, 0xffffffff, 0xffffffff, 0xdfcc3dff, 0x000fbfaf, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_Win_AArch64_AAPCS_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, 0 }; static const uint32_t CSR_Win_AArch64_AAPCS_RegMask[] = { 0x0ff00614, 0x0ff00000, 0x0ff00000, 0x00000000, 0x00000000, 0x00000ff0, 0x07ff8000, 0x00ffc000, 0x00000000, 0x00000000, 0x00000000, 0x0000007f, 0x0000001f, 0x0000003f, 0x00000000, 0x00000000, 0x00000000, 0x80080100, 0x000f002f, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; static const MCPhysReg CSR_Win_AArch64_CFGuard_Check_SaveList[] = { AArch64::X19, AArch64::X20, AArch64::X21, AArch64::X22, AArch64::X23, AArch64::X24, AArch64::X25, AArch64::X26, AArch64::X27, AArch64::X28, AArch64::FP, AArch64::LR, AArch64::D8, AArch64::D9, AArch64::D10, AArch64::D11, AArch64::D12, AArch64::D13, AArch64::D14, AArch64::D15, AArch64::X0, AArch64::X1, AArch64::X2, AArch64::X3, AArch64::X4, AArch64::X5, AArch64::X6, AArch64::X7, AArch64::X8, AArch64::Q0, AArch64::Q1, AArch64::Q2, AArch64::Q3, AArch64::Q4, AArch64::Q5, AArch64::Q6, AArch64::Q7, 0 }; static const uint32_t CSR_Win_AArch64_CFGuard_Check_RegMask[] = { 0x0ffff614, 0x0ffff000, 0x0ffff000, 0xf0000000, 0xf000000f, 0xf0000fff, 0xffff801f, 0x00ffc00f, 0x00000000, 0x00000000, 0xff000000, 0xff00007f, 0xff00001f, 0x0000003f, 0x00007f00, 0x00001f00, 0x00003f00, 0x81e80300, 0x000f03ef, 0x00000000, 0x00000000, 0x00000000, 0x00000000, }; ArrayRef AArch64GenRegisterInfo::getRegMasks() const { static const uint32_t *const Masks[] = { CSR_AArch64_AAPCS_RegMask, CSR_AArch64_AAPCS_SCS_RegMask, CSR_AArch64_AAPCS_SwiftError_RegMask, CSR_AArch64_AAPCS_SwiftError_SCS_RegMask, CSR_AArch64_AAPCS_SwiftTail_RegMask, CSR_AArch64_AAPCS_ThisReturn_RegMask, CSR_AArch64_AAPCS_X18_RegMask, CSR_AArch64_AAVPCS_RegMask, CSR_AArch64_AAVPCS_SCS_RegMask, CSR_AArch64_AllRegs_RegMask, CSR_AArch64_AllRegs_SCS_RegMask, CSR_AArch64_NoRegs_RegMask, CSR_AArch64_NoRegs_SCS_RegMask, CSR_AArch64_RT_MostRegs_RegMask, CSR_AArch64_RT_MostRegs_SCS_RegMask, CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X0_RegMask, CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X2_RegMask, CSR_AArch64_SMStartStop_RegMask, CSR_AArch64_SVE_AAPCS_RegMask, CSR_AArch64_SVE_AAPCS_SCS_RegMask, CSR_AArch64_StackProbe_Windows_RegMask, CSR_AArch64_TLS_ELF_RegMask, CSR_Darwin_AArch64_AAPCS_RegMask, CSR_Darwin_AArch64_AAPCS_SwiftError_RegMask, CSR_Darwin_AArch64_AAPCS_SwiftTail_RegMask, CSR_Darwin_AArch64_AAPCS_ThisReturn_RegMask, CSR_Darwin_AArch64_AAPCS_Win64_RegMask, CSR_Darwin_AArch64_AAVPCS_RegMask, CSR_Darwin_AArch64_CXX_TLS_RegMask, CSR_Darwin_AArch64_CXX_TLS_PE_RegMask, CSR_Darwin_AArch64_CXX_TLS_ViaCopy_RegMask, CSR_Darwin_AArch64_RT_MostRegs_RegMask, CSR_Darwin_AArch64_TLS_RegMask, CSR_Win_AArch64_AAPCS_RegMask, CSR_Win_AArch64_CFGuard_Check_RegMask, }; return ArrayRef(Masks); } bool AArch64GenRegisterInfo:: isGeneralPurposeRegister(const MachineFunction &MF, MCRegister PhysReg) const { return AArch64::GPR64RegClass.contains(PhysReg) || AArch64::GPR32RegClass.contains(PhysReg) || false; } bool AArch64GenRegisterInfo:: isFixedRegister(const MachineFunction &MF, MCRegister PhysReg) const { return AArch64::CCRRegClass.contains(PhysReg) || AArch64::FIXED_REGSRegClass.contains(PhysReg) || false; } bool AArch64GenRegisterInfo:: isArgumentRegister(const MachineFunction &MF, MCRegister PhysReg) const { return false; } bool AArch64GenRegisterInfo:: isConstantPhysReg(MCRegister PhysReg) const { return PhysReg == AArch64::WZR || PhysReg == AArch64::XZR || false; } ArrayRef AArch64GenRegisterInfo::getRegMaskNames() const { static const char *Names[] = { "CSR_AArch64_AAPCS", "CSR_AArch64_AAPCS_SCS", "CSR_AArch64_AAPCS_SwiftError", "CSR_AArch64_AAPCS_SwiftError_SCS", "CSR_AArch64_AAPCS_SwiftTail", "CSR_AArch64_AAPCS_ThisReturn", "CSR_AArch64_AAPCS_X18", "CSR_AArch64_AAVPCS", "CSR_AArch64_AAVPCS_SCS", "CSR_AArch64_AllRegs", "CSR_AArch64_AllRegs_SCS", "CSR_AArch64_NoRegs", "CSR_AArch64_NoRegs_SCS", "CSR_AArch64_RT_MostRegs", "CSR_AArch64_RT_MostRegs_SCS", "CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X0", "CSR_AArch64_SME_ABI_Support_Routines_PreserveMost_From_X2", "CSR_AArch64_SMStartStop", "CSR_AArch64_SVE_AAPCS", "CSR_AArch64_SVE_AAPCS_SCS", "CSR_AArch64_StackProbe_Windows", "CSR_AArch64_TLS_ELF", "CSR_Darwin_AArch64_AAPCS", "CSR_Darwin_AArch64_AAPCS_SwiftError", "CSR_Darwin_AArch64_AAPCS_SwiftTail", "CSR_Darwin_AArch64_AAPCS_ThisReturn", "CSR_Darwin_AArch64_AAPCS_Win64", "CSR_Darwin_AArch64_AAVPCS", "CSR_Darwin_AArch64_CXX_TLS", "CSR_Darwin_AArch64_CXX_TLS_PE", "CSR_Darwin_AArch64_CXX_TLS_ViaCopy", "CSR_Darwin_AArch64_RT_MostRegs", "CSR_Darwin_AArch64_TLS", "CSR_Win_AArch64_AAPCS", "CSR_Win_AArch64_CFGuard_Check", }; return ArrayRef(Names); } const AArch64FrameLowering * AArch64GenRegisterInfo::getFrameLowering(const MachineFunction &MF) { return static_cast( MF.getSubtarget().getFrameLowering()); } } // end namespace llvm #endif // GET_REGINFO_TARGET_DESC