/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* Target Instruction Enum Values and Descriptors *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_INSTRINFO_ENUM #undef GET_INSTRINFO_ENUM namespace llvm { namespace RISCV { enum { PHI = 0, INLINEASM = 1, INLINEASM_BR = 2, CFI_INSTRUCTION = 3, EH_LABEL = 4, GC_LABEL = 5, ANNOTATION_LABEL = 6, KILL = 7, EXTRACT_SUBREG = 8, INSERT_SUBREG = 9, IMPLICIT_DEF = 10, SUBREG_TO_REG = 11, COPY_TO_REGCLASS = 12, DBG_VALUE = 13, DBG_VALUE_LIST = 14, DBG_INSTR_REF = 15, DBG_PHI = 16, DBG_LABEL = 17, REG_SEQUENCE = 18, COPY = 19, BUNDLE = 20, LIFETIME_START = 21, LIFETIME_END = 22, PSEUDO_PROBE = 23, ARITH_FENCE = 24, STACKMAP = 25, FENTRY_CALL = 26, PATCHPOINT = 27, LOAD_STACK_GUARD = 28, PREALLOCATED_SETUP = 29, PREALLOCATED_ARG = 30, STATEPOINT = 31, LOCAL_ESCAPE = 32, FAULTING_OP = 33, PATCHABLE_OP = 34, PATCHABLE_FUNCTION_ENTER = 35, PATCHABLE_RET = 36, PATCHABLE_FUNCTION_EXIT = 37, PATCHABLE_TAIL_CALL = 38, PATCHABLE_EVENT_CALL = 39, PATCHABLE_TYPED_EVENT_CALL = 40, ICALL_BRANCH_FUNNEL = 41, MEMBARRIER = 42, G_ASSERT_SEXT = 43, G_ASSERT_ZEXT = 44, G_ASSERT_ALIGN = 45, G_ADD = 46, G_SUB = 47, G_MUL = 48, G_SDIV = 49, G_UDIV = 50, G_SREM = 51, G_UREM = 52, G_SDIVREM = 53, G_UDIVREM = 54, G_AND = 55, G_OR = 56, G_XOR = 57, G_IMPLICIT_DEF = 58, G_PHI = 59, G_FRAME_INDEX = 60, G_GLOBAL_VALUE = 61, G_EXTRACT = 62, G_UNMERGE_VALUES = 63, G_INSERT = 64, G_MERGE_VALUES = 65, G_BUILD_VECTOR = 66, G_BUILD_VECTOR_TRUNC = 67, G_CONCAT_VECTORS = 68, G_PTRTOINT = 69, G_INTTOPTR = 70, G_BITCAST = 71, G_FREEZE = 72, G_INTRINSIC_FPTRUNC_ROUND = 73, G_INTRINSIC_TRUNC = 74, G_INTRINSIC_ROUND = 75, G_INTRINSIC_LRINT = 76, G_INTRINSIC_ROUNDEVEN = 77, G_READCYCLECOUNTER = 78, G_LOAD = 79, G_SEXTLOAD = 80, G_ZEXTLOAD = 81, G_INDEXED_LOAD = 82, G_INDEXED_SEXTLOAD = 83, G_INDEXED_ZEXTLOAD = 84, G_STORE = 85, G_INDEXED_STORE = 86, G_ATOMIC_CMPXCHG_WITH_SUCCESS = 87, G_ATOMIC_CMPXCHG = 88, G_ATOMICRMW_XCHG = 89, G_ATOMICRMW_ADD = 90, G_ATOMICRMW_SUB = 91, G_ATOMICRMW_AND = 92, G_ATOMICRMW_NAND = 93, G_ATOMICRMW_OR = 94, G_ATOMICRMW_XOR = 95, G_ATOMICRMW_MAX = 96, G_ATOMICRMW_MIN = 97, G_ATOMICRMW_UMAX = 98, G_ATOMICRMW_UMIN = 99, G_ATOMICRMW_FADD = 100, G_ATOMICRMW_FSUB = 101, G_ATOMICRMW_FMAX = 102, G_ATOMICRMW_FMIN = 103, G_ATOMICRMW_UINC_WRAP = 104, G_ATOMICRMW_UDEC_WRAP = 105, G_FENCE = 106, G_BRCOND = 107, G_BRINDIRECT = 108, G_INVOKE_REGION_START = 109, G_INTRINSIC = 110, G_INTRINSIC_W_SIDE_EFFECTS = 111, G_ANYEXT = 112, G_TRUNC = 113, G_CONSTANT = 114, G_FCONSTANT = 115, G_VASTART = 116, G_VAARG = 117, G_SEXT = 118, G_SEXT_INREG = 119, G_ZEXT = 120, G_SHL = 121, G_LSHR = 122, G_ASHR = 123, G_FSHL = 124, G_FSHR = 125, G_ROTR = 126, G_ROTL = 127, G_ICMP = 128, G_FCMP = 129, G_SELECT = 130, G_UADDO = 131, G_UADDE = 132, G_USUBO = 133, G_USUBE = 134, G_SADDO = 135, G_SADDE = 136, G_SSUBO = 137, G_SSUBE = 138, G_UMULO = 139, G_SMULO = 140, G_UMULH = 141, G_SMULH = 142, G_UADDSAT = 143, G_SADDSAT = 144, G_USUBSAT = 145, G_SSUBSAT = 146, G_USHLSAT = 147, G_SSHLSAT = 148, G_SMULFIX = 149, G_UMULFIX = 150, G_SMULFIXSAT = 151, G_UMULFIXSAT = 152, G_SDIVFIX = 153, G_UDIVFIX = 154, G_SDIVFIXSAT = 155, G_UDIVFIXSAT = 156, G_FADD = 157, G_FSUB = 158, G_FMUL = 159, G_FMA = 160, G_FMAD = 161, G_FDIV = 162, G_FREM = 163, G_FPOW = 164, G_FPOWI = 165, G_FEXP = 166, G_FEXP2 = 167, G_FLOG = 168, G_FLOG2 = 169, G_FLOG10 = 170, G_FNEG = 171, G_FPEXT = 172, G_FPTRUNC = 173, G_FPTOSI = 174, G_FPTOUI = 175, G_SITOFP = 176, G_UITOFP = 177, G_FABS = 178, G_FCOPYSIGN = 179, G_IS_FPCLASS = 180, G_FCANONICALIZE = 181, G_FMINNUM = 182, G_FMAXNUM = 183, G_FMINNUM_IEEE = 184, G_FMAXNUM_IEEE = 185, G_FMINIMUM = 186, G_FMAXIMUM = 187, G_PTR_ADD = 188, G_PTRMASK = 189, G_SMIN = 190, G_SMAX = 191, G_UMIN = 192, G_UMAX = 193, G_ABS = 194, G_LROUND = 195, G_LLROUND = 196, G_BR = 197, G_BRJT = 198, G_INSERT_VECTOR_ELT = 199, G_EXTRACT_VECTOR_ELT = 200, G_SHUFFLE_VECTOR = 201, G_CTTZ = 202, G_CTTZ_ZERO_UNDEF = 203, G_CTLZ = 204, G_CTLZ_ZERO_UNDEF = 205, G_CTPOP = 206, G_BSWAP = 207, G_BITREVERSE = 208, G_FCEIL = 209, G_FCOS = 210, G_FSIN = 211, G_FSQRT = 212, G_FFLOOR = 213, G_FRINT = 214, G_FNEARBYINT = 215, G_ADDRSPACE_CAST = 216, G_BLOCK_ADDR = 217, G_JUMP_TABLE = 218, G_DYN_STACKALLOC = 219, G_STRICT_FADD = 220, G_STRICT_FSUB = 221, G_STRICT_FMUL = 222, G_STRICT_FDIV = 223, G_STRICT_FREM = 224, G_STRICT_FMA = 225, G_STRICT_FSQRT = 226, G_READ_REGISTER = 227, G_WRITE_REGISTER = 228, G_MEMCPY = 229, G_MEMCPY_INLINE = 230, G_MEMMOVE = 231, G_MEMSET = 232, G_BZERO = 233, G_VECREDUCE_SEQ_FADD = 234, G_VECREDUCE_SEQ_FMUL = 235, G_VECREDUCE_FADD = 236, G_VECREDUCE_FMUL = 237, G_VECREDUCE_FMAX = 238, G_VECREDUCE_FMIN = 239, G_VECREDUCE_ADD = 240, G_VECREDUCE_MUL = 241, G_VECREDUCE_AND = 242, G_VECREDUCE_OR = 243, G_VECREDUCE_XOR = 244, G_VECREDUCE_SMAX = 245, G_VECREDUCE_SMIN = 246, G_VECREDUCE_UMAX = 247, G_VECREDUCE_UMIN = 248, G_SBFX = 249, G_UBFX = 250, ADJCALLSTACKDOWN = 251, ADJCALLSTACKUP = 252, BuildPairF64Pseudo = 253, HWASAN_CHECK_MEMACCESS_SHORTGRANULES = 254, PseudoAddTPRel = 255, PseudoAtomicLoadNand32 = 256, PseudoAtomicLoadNand64 = 257, PseudoBR = 258, PseudoBRIND = 259, PseudoCALL = 260, PseudoCALLIndirect = 261, PseudoCALLReg = 262, PseudoCCADD = 263, PseudoCCADDW = 264, PseudoCCAND = 265, PseudoCCMOVGPR = 266, PseudoCCOR = 267, PseudoCCSUB = 268, PseudoCCSUBW = 269, PseudoCCXOR = 270, PseudoCmpXchg32 = 271, PseudoCmpXchg64 = 272, PseudoFLD = 273, PseudoFLH = 274, PseudoFLW = 275, PseudoFROUND_D = 276, PseudoFROUND_H = 277, PseudoFROUND_S = 278, PseudoFSD = 279, PseudoFSH = 280, PseudoFSW = 281, PseudoJump = 282, PseudoLA = 283, PseudoLA_TLS_GD = 284, PseudoLA_TLS_IE = 285, PseudoLB = 286, PseudoLBU = 287, PseudoLD = 288, PseudoLH = 289, PseudoLHU = 290, PseudoLI = 291, PseudoLLA = 292, PseudoLW = 293, PseudoLWU = 294, PseudoMaskedAtomicLoadAdd32 = 295, PseudoMaskedAtomicLoadMax32 = 296, PseudoMaskedAtomicLoadMin32 = 297, PseudoMaskedAtomicLoadNand32 = 298, PseudoMaskedAtomicLoadSub32 = 299, PseudoMaskedAtomicLoadUMax32 = 300, PseudoMaskedAtomicLoadUMin32 = 301, PseudoMaskedAtomicSwap32 = 302, PseudoMaskedCmpXchg32 = 303, PseudoQuietFLE_D = 304, PseudoQuietFLE_H = 305, PseudoQuietFLE_S = 306, PseudoQuietFLT_D = 307, PseudoQuietFLT_H = 308, PseudoQuietFLT_S = 309, PseudoRET = 310, PseudoReadVL = 311, PseudoReadVLENB = 312, PseudoSB = 313, PseudoSD = 314, PseudoSEXT_B = 315, PseudoSEXT_H = 316, PseudoSH = 317, PseudoSW = 318, PseudoTAIL = 319, PseudoTAILIndirect = 320, PseudoTHVdotVMAQASU_VV_M1 = 321, PseudoTHVdotVMAQASU_VV_M1_MASK = 322, PseudoTHVdotVMAQASU_VV_M2 = 323, PseudoTHVdotVMAQASU_VV_M2_MASK = 324, PseudoTHVdotVMAQASU_VV_M4 = 325, PseudoTHVdotVMAQASU_VV_M4_MASK = 326, PseudoTHVdotVMAQASU_VV_M8 = 327, PseudoTHVdotVMAQASU_VV_M8_MASK = 328, PseudoTHVdotVMAQASU_VV_MF2 = 329, PseudoTHVdotVMAQASU_VV_MF2_MASK = 330, PseudoTHVdotVMAQASU_VX_M1 = 331, PseudoTHVdotVMAQASU_VX_M1_MASK = 332, PseudoTHVdotVMAQASU_VX_M2 = 333, PseudoTHVdotVMAQASU_VX_M2_MASK = 334, PseudoTHVdotVMAQASU_VX_M4 = 335, PseudoTHVdotVMAQASU_VX_M4_MASK = 336, PseudoTHVdotVMAQASU_VX_M8 = 337, PseudoTHVdotVMAQASU_VX_M8_MASK = 338, PseudoTHVdotVMAQASU_VX_MF2 = 339, PseudoTHVdotVMAQASU_VX_MF2_MASK = 340, PseudoTHVdotVMAQAUS_VX_M1 = 341, PseudoTHVdotVMAQAUS_VX_M1_MASK = 342, PseudoTHVdotVMAQAUS_VX_M2 = 343, PseudoTHVdotVMAQAUS_VX_M2_MASK = 344, PseudoTHVdotVMAQAUS_VX_M4 = 345, PseudoTHVdotVMAQAUS_VX_M4_MASK = 346, PseudoTHVdotVMAQAUS_VX_M8 = 347, PseudoTHVdotVMAQAUS_VX_M8_MASK = 348, PseudoTHVdotVMAQAUS_VX_MF2 = 349, PseudoTHVdotVMAQAUS_VX_MF2_MASK = 350, PseudoTHVdotVMAQAU_VV_M1 = 351, PseudoTHVdotVMAQAU_VV_M1_MASK = 352, PseudoTHVdotVMAQAU_VV_M2 = 353, PseudoTHVdotVMAQAU_VV_M2_MASK = 354, PseudoTHVdotVMAQAU_VV_M4 = 355, PseudoTHVdotVMAQAU_VV_M4_MASK = 356, PseudoTHVdotVMAQAU_VV_M8 = 357, PseudoTHVdotVMAQAU_VV_M8_MASK = 358, PseudoTHVdotVMAQAU_VV_MF2 = 359, PseudoTHVdotVMAQAU_VV_MF2_MASK = 360, PseudoTHVdotVMAQAU_VX_M1 = 361, PseudoTHVdotVMAQAU_VX_M1_MASK = 362, PseudoTHVdotVMAQAU_VX_M2 = 363, PseudoTHVdotVMAQAU_VX_M2_MASK = 364, PseudoTHVdotVMAQAU_VX_M4 = 365, PseudoTHVdotVMAQAU_VX_M4_MASK = 366, PseudoTHVdotVMAQAU_VX_M8 = 367, PseudoTHVdotVMAQAU_VX_M8_MASK = 368, PseudoTHVdotVMAQAU_VX_MF2 = 369, PseudoTHVdotVMAQAU_VX_MF2_MASK = 370, PseudoTHVdotVMAQA_VV_M1 = 371, PseudoTHVdotVMAQA_VV_M1_MASK = 372, PseudoTHVdotVMAQA_VV_M2 = 373, PseudoTHVdotVMAQA_VV_M2_MASK = 374, PseudoTHVdotVMAQA_VV_M4 = 375, PseudoTHVdotVMAQA_VV_M4_MASK = 376, PseudoTHVdotVMAQA_VV_M8 = 377, PseudoTHVdotVMAQA_VV_M8_MASK = 378, PseudoTHVdotVMAQA_VV_MF2 = 379, PseudoTHVdotVMAQA_VV_MF2_MASK = 380, PseudoTHVdotVMAQA_VX_M1 = 381, PseudoTHVdotVMAQA_VX_M1_MASK = 382, PseudoTHVdotVMAQA_VX_M2 = 383, PseudoTHVdotVMAQA_VX_M2_MASK = 384, PseudoTHVdotVMAQA_VX_M4 = 385, PseudoTHVdotVMAQA_VX_M4_MASK = 386, PseudoTHVdotVMAQA_VX_M8 = 387, PseudoTHVdotVMAQA_VX_M8_MASK = 388, PseudoTHVdotVMAQA_VX_MF2 = 389, PseudoTHVdotVMAQA_VX_MF2_MASK = 390, PseudoVAADDU_VV_M1 = 391, PseudoVAADDU_VV_M1_MASK = 392, PseudoVAADDU_VV_M1_TU = 393, PseudoVAADDU_VV_M2 = 394, PseudoVAADDU_VV_M2_MASK = 395, PseudoVAADDU_VV_M2_TU = 396, PseudoVAADDU_VV_M4 = 397, PseudoVAADDU_VV_M4_MASK = 398, PseudoVAADDU_VV_M4_TU = 399, PseudoVAADDU_VV_M8 = 400, PseudoVAADDU_VV_M8_MASK = 401, PseudoVAADDU_VV_M8_TU = 402, PseudoVAADDU_VV_MF2 = 403, PseudoVAADDU_VV_MF2_MASK = 404, PseudoVAADDU_VV_MF2_TU = 405, PseudoVAADDU_VV_MF4 = 406, PseudoVAADDU_VV_MF4_MASK = 407, PseudoVAADDU_VV_MF4_TU = 408, PseudoVAADDU_VV_MF8 = 409, PseudoVAADDU_VV_MF8_MASK = 410, PseudoVAADDU_VV_MF8_TU = 411, PseudoVAADDU_VX_M1 = 412, PseudoVAADDU_VX_M1_MASK = 413, PseudoVAADDU_VX_M1_TU = 414, PseudoVAADDU_VX_M2 = 415, PseudoVAADDU_VX_M2_MASK = 416, PseudoVAADDU_VX_M2_TU = 417, PseudoVAADDU_VX_M4 = 418, PseudoVAADDU_VX_M4_MASK = 419, PseudoVAADDU_VX_M4_TU = 420, PseudoVAADDU_VX_M8 = 421, PseudoVAADDU_VX_M8_MASK = 422, PseudoVAADDU_VX_M8_TU = 423, PseudoVAADDU_VX_MF2 = 424, PseudoVAADDU_VX_MF2_MASK = 425, PseudoVAADDU_VX_MF2_TU = 426, PseudoVAADDU_VX_MF4 = 427, PseudoVAADDU_VX_MF4_MASK = 428, PseudoVAADDU_VX_MF4_TU = 429, PseudoVAADDU_VX_MF8 = 430, PseudoVAADDU_VX_MF8_MASK = 431, PseudoVAADDU_VX_MF8_TU = 432, PseudoVAADD_VV_M1 = 433, PseudoVAADD_VV_M1_MASK = 434, PseudoVAADD_VV_M1_TU = 435, PseudoVAADD_VV_M2 = 436, PseudoVAADD_VV_M2_MASK = 437, PseudoVAADD_VV_M2_TU = 438, PseudoVAADD_VV_M4 = 439, PseudoVAADD_VV_M4_MASK = 440, PseudoVAADD_VV_M4_TU = 441, PseudoVAADD_VV_M8 = 442, PseudoVAADD_VV_M8_MASK = 443, PseudoVAADD_VV_M8_TU = 444, PseudoVAADD_VV_MF2 = 445, PseudoVAADD_VV_MF2_MASK = 446, PseudoVAADD_VV_MF2_TU = 447, PseudoVAADD_VV_MF4 = 448, PseudoVAADD_VV_MF4_MASK = 449, PseudoVAADD_VV_MF4_TU = 450, PseudoVAADD_VV_MF8 = 451, PseudoVAADD_VV_MF8_MASK = 452, PseudoVAADD_VV_MF8_TU = 453, PseudoVAADD_VX_M1 = 454, PseudoVAADD_VX_M1_MASK = 455, PseudoVAADD_VX_M1_TU = 456, PseudoVAADD_VX_M2 = 457, PseudoVAADD_VX_M2_MASK = 458, PseudoVAADD_VX_M2_TU = 459, PseudoVAADD_VX_M4 = 460, PseudoVAADD_VX_M4_MASK = 461, PseudoVAADD_VX_M4_TU = 462, PseudoVAADD_VX_M8 = 463, PseudoVAADD_VX_M8_MASK = 464, PseudoVAADD_VX_M8_TU = 465, PseudoVAADD_VX_MF2 = 466, PseudoVAADD_VX_MF2_MASK = 467, PseudoVAADD_VX_MF2_TU = 468, PseudoVAADD_VX_MF4 = 469, PseudoVAADD_VX_MF4_MASK = 470, PseudoVAADD_VX_MF4_TU = 471, PseudoVAADD_VX_MF8 = 472, PseudoVAADD_VX_MF8_MASK = 473, PseudoVAADD_VX_MF8_TU = 474, PseudoVADC_VIM_M1 = 475, PseudoVADC_VIM_M1_TU = 476, PseudoVADC_VIM_M2 = 477, PseudoVADC_VIM_M2_TU = 478, PseudoVADC_VIM_M4 = 479, PseudoVADC_VIM_M4_TU = 480, PseudoVADC_VIM_M8 = 481, PseudoVADC_VIM_M8_TU = 482, PseudoVADC_VIM_MF2 = 483, PseudoVADC_VIM_MF2_TU = 484, PseudoVADC_VIM_MF4 = 485, PseudoVADC_VIM_MF4_TU = 486, PseudoVADC_VIM_MF8 = 487, PseudoVADC_VIM_MF8_TU = 488, PseudoVADC_VVM_M1 = 489, PseudoVADC_VVM_M1_TU = 490, PseudoVADC_VVM_M2 = 491, PseudoVADC_VVM_M2_TU = 492, PseudoVADC_VVM_M4 = 493, PseudoVADC_VVM_M4_TU = 494, PseudoVADC_VVM_M8 = 495, PseudoVADC_VVM_M8_TU = 496, PseudoVADC_VVM_MF2 = 497, PseudoVADC_VVM_MF2_TU = 498, PseudoVADC_VVM_MF4 = 499, PseudoVADC_VVM_MF4_TU = 500, PseudoVADC_VVM_MF8 = 501, PseudoVADC_VVM_MF8_TU = 502, PseudoVADC_VXM_M1 = 503, PseudoVADC_VXM_M1_TU = 504, PseudoVADC_VXM_M2 = 505, PseudoVADC_VXM_M2_TU = 506, PseudoVADC_VXM_M4 = 507, PseudoVADC_VXM_M4_TU = 508, PseudoVADC_VXM_M8 = 509, PseudoVADC_VXM_M8_TU = 510, PseudoVADC_VXM_MF2 = 511, PseudoVADC_VXM_MF2_TU = 512, PseudoVADC_VXM_MF4 = 513, PseudoVADC_VXM_MF4_TU = 514, PseudoVADC_VXM_MF8 = 515, PseudoVADC_VXM_MF8_TU = 516, PseudoVADD_VI_M1 = 517, PseudoVADD_VI_M1_MASK = 518, PseudoVADD_VI_M1_TU = 519, PseudoVADD_VI_M2 = 520, PseudoVADD_VI_M2_MASK = 521, PseudoVADD_VI_M2_TU = 522, PseudoVADD_VI_M4 = 523, PseudoVADD_VI_M4_MASK = 524, PseudoVADD_VI_M4_TU = 525, PseudoVADD_VI_M8 = 526, PseudoVADD_VI_M8_MASK = 527, PseudoVADD_VI_M8_TU = 528, PseudoVADD_VI_MF2 = 529, PseudoVADD_VI_MF2_MASK = 530, PseudoVADD_VI_MF2_TU = 531, PseudoVADD_VI_MF4 = 532, PseudoVADD_VI_MF4_MASK = 533, PseudoVADD_VI_MF4_TU = 534, PseudoVADD_VI_MF8 = 535, PseudoVADD_VI_MF8_MASK = 536, PseudoVADD_VI_MF8_TU = 537, PseudoVADD_VV_M1 = 538, PseudoVADD_VV_M1_MASK = 539, PseudoVADD_VV_M1_TU = 540, PseudoVADD_VV_M2 = 541, PseudoVADD_VV_M2_MASK = 542, PseudoVADD_VV_M2_TU = 543, PseudoVADD_VV_M4 = 544, PseudoVADD_VV_M4_MASK = 545, PseudoVADD_VV_M4_TU = 546, PseudoVADD_VV_M8 = 547, PseudoVADD_VV_M8_MASK = 548, PseudoVADD_VV_M8_TU = 549, PseudoVADD_VV_MF2 = 550, PseudoVADD_VV_MF2_MASK = 551, PseudoVADD_VV_MF2_TU = 552, PseudoVADD_VV_MF4 = 553, PseudoVADD_VV_MF4_MASK = 554, PseudoVADD_VV_MF4_TU = 555, PseudoVADD_VV_MF8 = 556, PseudoVADD_VV_MF8_MASK = 557, PseudoVADD_VV_MF8_TU = 558, PseudoVADD_VX_M1 = 559, PseudoVADD_VX_M1_MASK = 560, PseudoVADD_VX_M1_TU = 561, PseudoVADD_VX_M2 = 562, PseudoVADD_VX_M2_MASK = 563, PseudoVADD_VX_M2_TU = 564, PseudoVADD_VX_M4 = 565, PseudoVADD_VX_M4_MASK = 566, PseudoVADD_VX_M4_TU = 567, PseudoVADD_VX_M8 = 568, PseudoVADD_VX_M8_MASK = 569, PseudoVADD_VX_M8_TU = 570, PseudoVADD_VX_MF2 = 571, PseudoVADD_VX_MF2_MASK = 572, PseudoVADD_VX_MF2_TU = 573, PseudoVADD_VX_MF4 = 574, PseudoVADD_VX_MF4_MASK = 575, PseudoVADD_VX_MF4_TU = 576, PseudoVADD_VX_MF8 = 577, PseudoVADD_VX_MF8_MASK = 578, PseudoVADD_VX_MF8_TU = 579, PseudoVAND_VI_M1 = 580, PseudoVAND_VI_M1_MASK = 581, PseudoVAND_VI_M1_TU = 582, PseudoVAND_VI_M2 = 583, PseudoVAND_VI_M2_MASK = 584, PseudoVAND_VI_M2_TU = 585, PseudoVAND_VI_M4 = 586, PseudoVAND_VI_M4_MASK = 587, PseudoVAND_VI_M4_TU = 588, PseudoVAND_VI_M8 = 589, PseudoVAND_VI_M8_MASK = 590, PseudoVAND_VI_M8_TU = 591, PseudoVAND_VI_MF2 = 592, PseudoVAND_VI_MF2_MASK = 593, PseudoVAND_VI_MF2_TU = 594, PseudoVAND_VI_MF4 = 595, PseudoVAND_VI_MF4_MASK = 596, PseudoVAND_VI_MF4_TU = 597, PseudoVAND_VI_MF8 = 598, PseudoVAND_VI_MF8_MASK = 599, PseudoVAND_VI_MF8_TU = 600, PseudoVAND_VV_M1 = 601, PseudoVAND_VV_M1_MASK = 602, PseudoVAND_VV_M1_TU = 603, PseudoVAND_VV_M2 = 604, PseudoVAND_VV_M2_MASK = 605, PseudoVAND_VV_M2_TU = 606, PseudoVAND_VV_M4 = 607, PseudoVAND_VV_M4_MASK = 608, PseudoVAND_VV_M4_TU = 609, PseudoVAND_VV_M8 = 610, PseudoVAND_VV_M8_MASK = 611, PseudoVAND_VV_M8_TU = 612, PseudoVAND_VV_MF2 = 613, PseudoVAND_VV_MF2_MASK = 614, PseudoVAND_VV_MF2_TU = 615, PseudoVAND_VV_MF4 = 616, PseudoVAND_VV_MF4_MASK = 617, PseudoVAND_VV_MF4_TU = 618, PseudoVAND_VV_MF8 = 619, PseudoVAND_VV_MF8_MASK = 620, PseudoVAND_VV_MF8_TU = 621, PseudoVAND_VX_M1 = 622, PseudoVAND_VX_M1_MASK = 623, PseudoVAND_VX_M1_TU = 624, PseudoVAND_VX_M2 = 625, PseudoVAND_VX_M2_MASK = 626, PseudoVAND_VX_M2_TU = 627, PseudoVAND_VX_M4 = 628, PseudoVAND_VX_M4_MASK = 629, PseudoVAND_VX_M4_TU = 630, PseudoVAND_VX_M8 = 631, PseudoVAND_VX_M8_MASK = 632, PseudoVAND_VX_M8_TU = 633, PseudoVAND_VX_MF2 = 634, PseudoVAND_VX_MF2_MASK = 635, PseudoVAND_VX_MF2_TU = 636, PseudoVAND_VX_MF4 = 637, PseudoVAND_VX_MF4_MASK = 638, PseudoVAND_VX_MF4_TU = 639, PseudoVAND_VX_MF8 = 640, PseudoVAND_VX_MF8_MASK = 641, PseudoVAND_VX_MF8_TU = 642, PseudoVASUBU_VV_M1 = 643, PseudoVASUBU_VV_M1_MASK = 644, PseudoVASUBU_VV_M1_TU = 645, PseudoVASUBU_VV_M2 = 646, PseudoVASUBU_VV_M2_MASK = 647, PseudoVASUBU_VV_M2_TU = 648, PseudoVASUBU_VV_M4 = 649, PseudoVASUBU_VV_M4_MASK = 650, PseudoVASUBU_VV_M4_TU = 651, PseudoVASUBU_VV_M8 = 652, PseudoVASUBU_VV_M8_MASK = 653, PseudoVASUBU_VV_M8_TU = 654, PseudoVASUBU_VV_MF2 = 655, PseudoVASUBU_VV_MF2_MASK = 656, PseudoVASUBU_VV_MF2_TU = 657, PseudoVASUBU_VV_MF4 = 658, PseudoVASUBU_VV_MF4_MASK = 659, PseudoVASUBU_VV_MF4_TU = 660, PseudoVASUBU_VV_MF8 = 661, PseudoVASUBU_VV_MF8_MASK = 662, PseudoVASUBU_VV_MF8_TU = 663, PseudoVASUBU_VX_M1 = 664, PseudoVASUBU_VX_M1_MASK = 665, PseudoVASUBU_VX_M1_TU = 666, PseudoVASUBU_VX_M2 = 667, PseudoVASUBU_VX_M2_MASK = 668, PseudoVASUBU_VX_M2_TU = 669, PseudoVASUBU_VX_M4 = 670, PseudoVASUBU_VX_M4_MASK = 671, PseudoVASUBU_VX_M4_TU = 672, PseudoVASUBU_VX_M8 = 673, PseudoVASUBU_VX_M8_MASK = 674, PseudoVASUBU_VX_M8_TU = 675, PseudoVASUBU_VX_MF2 = 676, PseudoVASUBU_VX_MF2_MASK = 677, PseudoVASUBU_VX_MF2_TU = 678, PseudoVASUBU_VX_MF4 = 679, PseudoVASUBU_VX_MF4_MASK = 680, PseudoVASUBU_VX_MF4_TU = 681, PseudoVASUBU_VX_MF8 = 682, PseudoVASUBU_VX_MF8_MASK = 683, PseudoVASUBU_VX_MF8_TU = 684, PseudoVASUB_VV_M1 = 685, PseudoVASUB_VV_M1_MASK = 686, PseudoVASUB_VV_M1_TU = 687, PseudoVASUB_VV_M2 = 688, PseudoVASUB_VV_M2_MASK = 689, PseudoVASUB_VV_M2_TU = 690, PseudoVASUB_VV_M4 = 691, PseudoVASUB_VV_M4_MASK = 692, PseudoVASUB_VV_M4_TU = 693, PseudoVASUB_VV_M8 = 694, PseudoVASUB_VV_M8_MASK = 695, PseudoVASUB_VV_M8_TU = 696, PseudoVASUB_VV_MF2 = 697, PseudoVASUB_VV_MF2_MASK = 698, PseudoVASUB_VV_MF2_TU = 699, PseudoVASUB_VV_MF4 = 700, PseudoVASUB_VV_MF4_MASK = 701, PseudoVASUB_VV_MF4_TU = 702, PseudoVASUB_VV_MF8 = 703, PseudoVASUB_VV_MF8_MASK = 704, PseudoVASUB_VV_MF8_TU = 705, PseudoVASUB_VX_M1 = 706, PseudoVASUB_VX_M1_MASK = 707, PseudoVASUB_VX_M1_TU = 708, PseudoVASUB_VX_M2 = 709, PseudoVASUB_VX_M2_MASK = 710, PseudoVASUB_VX_M2_TU = 711, PseudoVASUB_VX_M4 = 712, PseudoVASUB_VX_M4_MASK = 713, PseudoVASUB_VX_M4_TU = 714, PseudoVASUB_VX_M8 = 715, PseudoVASUB_VX_M8_MASK = 716, PseudoVASUB_VX_M8_TU = 717, PseudoVASUB_VX_MF2 = 718, PseudoVASUB_VX_MF2_MASK = 719, PseudoVASUB_VX_MF2_TU = 720, PseudoVASUB_VX_MF4 = 721, PseudoVASUB_VX_MF4_MASK = 722, PseudoVASUB_VX_MF4_TU = 723, PseudoVASUB_VX_MF8 = 724, PseudoVASUB_VX_MF8_MASK = 725, PseudoVASUB_VX_MF8_TU = 726, PseudoVCOMPRESS_VM_M1 = 727, PseudoVCOMPRESS_VM_M2 = 728, PseudoVCOMPRESS_VM_M4 = 729, PseudoVCOMPRESS_VM_M8 = 730, PseudoVCOMPRESS_VM_MF2 = 731, PseudoVCOMPRESS_VM_MF4 = 732, PseudoVCOMPRESS_VM_MF8 = 733, PseudoVCPOP_M_B1 = 734, PseudoVCPOP_M_B16 = 735, PseudoVCPOP_M_B16_MASK = 736, PseudoVCPOP_M_B1_MASK = 737, PseudoVCPOP_M_B2 = 738, PseudoVCPOP_M_B2_MASK = 739, PseudoVCPOP_M_B32 = 740, PseudoVCPOP_M_B32_MASK = 741, PseudoVCPOP_M_B4 = 742, PseudoVCPOP_M_B4_MASK = 743, PseudoVCPOP_M_B64 = 744, PseudoVCPOP_M_B64_MASK = 745, PseudoVCPOP_M_B8 = 746, PseudoVCPOP_M_B8_MASK = 747, PseudoVDIVU_VV_M1 = 748, PseudoVDIVU_VV_M1_MASK = 749, PseudoVDIVU_VV_M1_TU = 750, PseudoVDIVU_VV_M2 = 751, PseudoVDIVU_VV_M2_MASK = 752, PseudoVDIVU_VV_M2_TU = 753, PseudoVDIVU_VV_M4 = 754, PseudoVDIVU_VV_M4_MASK = 755, PseudoVDIVU_VV_M4_TU = 756, PseudoVDIVU_VV_M8 = 757, PseudoVDIVU_VV_M8_MASK = 758, PseudoVDIVU_VV_M8_TU = 759, PseudoVDIVU_VV_MF2 = 760, PseudoVDIVU_VV_MF2_MASK = 761, PseudoVDIVU_VV_MF2_TU = 762, PseudoVDIVU_VV_MF4 = 763, PseudoVDIVU_VV_MF4_MASK = 764, PseudoVDIVU_VV_MF4_TU = 765, PseudoVDIVU_VV_MF8 = 766, PseudoVDIVU_VV_MF8_MASK = 767, PseudoVDIVU_VV_MF8_TU = 768, PseudoVDIVU_VX_M1 = 769, PseudoVDIVU_VX_M1_MASK = 770, PseudoVDIVU_VX_M1_TU = 771, PseudoVDIVU_VX_M2 = 772, PseudoVDIVU_VX_M2_MASK = 773, PseudoVDIVU_VX_M2_TU = 774, PseudoVDIVU_VX_M4 = 775, PseudoVDIVU_VX_M4_MASK = 776, PseudoVDIVU_VX_M4_TU = 777, PseudoVDIVU_VX_M8 = 778, PseudoVDIVU_VX_M8_MASK = 779, PseudoVDIVU_VX_M8_TU = 780, PseudoVDIVU_VX_MF2 = 781, PseudoVDIVU_VX_MF2_MASK = 782, PseudoVDIVU_VX_MF2_TU = 783, PseudoVDIVU_VX_MF4 = 784, PseudoVDIVU_VX_MF4_MASK = 785, PseudoVDIVU_VX_MF4_TU = 786, PseudoVDIVU_VX_MF8 = 787, PseudoVDIVU_VX_MF8_MASK = 788, PseudoVDIVU_VX_MF8_TU = 789, PseudoVDIV_VV_M1 = 790, PseudoVDIV_VV_M1_MASK = 791, PseudoVDIV_VV_M1_TU = 792, PseudoVDIV_VV_M2 = 793, PseudoVDIV_VV_M2_MASK = 794, PseudoVDIV_VV_M2_TU = 795, PseudoVDIV_VV_M4 = 796, PseudoVDIV_VV_M4_MASK = 797, PseudoVDIV_VV_M4_TU = 798, PseudoVDIV_VV_M8 = 799, PseudoVDIV_VV_M8_MASK = 800, PseudoVDIV_VV_M8_TU = 801, PseudoVDIV_VV_MF2 = 802, PseudoVDIV_VV_MF2_MASK = 803, PseudoVDIV_VV_MF2_TU = 804, PseudoVDIV_VV_MF4 = 805, PseudoVDIV_VV_MF4_MASK = 806, PseudoVDIV_VV_MF4_TU = 807, PseudoVDIV_VV_MF8 = 808, PseudoVDIV_VV_MF8_MASK = 809, PseudoVDIV_VV_MF8_TU = 810, PseudoVDIV_VX_M1 = 811, PseudoVDIV_VX_M1_MASK = 812, PseudoVDIV_VX_M1_TU = 813, PseudoVDIV_VX_M2 = 814, PseudoVDIV_VX_M2_MASK = 815, PseudoVDIV_VX_M2_TU = 816, PseudoVDIV_VX_M4 = 817, PseudoVDIV_VX_M4_MASK = 818, PseudoVDIV_VX_M4_TU = 819, PseudoVDIV_VX_M8 = 820, PseudoVDIV_VX_M8_MASK = 821, PseudoVDIV_VX_M8_TU = 822, PseudoVDIV_VX_MF2 = 823, PseudoVDIV_VX_MF2_MASK = 824, PseudoVDIV_VX_MF2_TU = 825, PseudoVDIV_VX_MF4 = 826, PseudoVDIV_VX_MF4_MASK = 827, PseudoVDIV_VX_MF4_TU = 828, PseudoVDIV_VX_MF8 = 829, PseudoVDIV_VX_MF8_MASK = 830, PseudoVDIV_VX_MF8_TU = 831, PseudoVFADD_VF16_M1 = 832, PseudoVFADD_VF16_M1_MASK = 833, PseudoVFADD_VF16_M1_TU = 834, PseudoVFADD_VF16_M2 = 835, PseudoVFADD_VF16_M2_MASK = 836, PseudoVFADD_VF16_M2_TU = 837, PseudoVFADD_VF16_M4 = 838, PseudoVFADD_VF16_M4_MASK = 839, PseudoVFADD_VF16_M4_TU = 840, PseudoVFADD_VF16_M8 = 841, PseudoVFADD_VF16_M8_MASK = 842, PseudoVFADD_VF16_M8_TU = 843, PseudoVFADD_VF16_MF2 = 844, PseudoVFADD_VF16_MF2_MASK = 845, PseudoVFADD_VF16_MF2_TU = 846, PseudoVFADD_VF16_MF4 = 847, PseudoVFADD_VF16_MF4_MASK = 848, PseudoVFADD_VF16_MF4_TU = 849, PseudoVFADD_VF32_M1 = 850, PseudoVFADD_VF32_M1_MASK = 851, PseudoVFADD_VF32_M1_TU = 852, PseudoVFADD_VF32_M2 = 853, PseudoVFADD_VF32_M2_MASK = 854, PseudoVFADD_VF32_M2_TU = 855, PseudoVFADD_VF32_M4 = 856, PseudoVFADD_VF32_M4_MASK = 857, PseudoVFADD_VF32_M4_TU = 858, PseudoVFADD_VF32_M8 = 859, PseudoVFADD_VF32_M8_MASK = 860, PseudoVFADD_VF32_M8_TU = 861, PseudoVFADD_VF32_MF2 = 862, PseudoVFADD_VF32_MF2_MASK = 863, PseudoVFADD_VF32_MF2_TU = 864, PseudoVFADD_VF64_M1 = 865, PseudoVFADD_VF64_M1_MASK = 866, PseudoVFADD_VF64_M1_TU = 867, PseudoVFADD_VF64_M2 = 868, PseudoVFADD_VF64_M2_MASK = 869, PseudoVFADD_VF64_M2_TU = 870, PseudoVFADD_VF64_M4 = 871, PseudoVFADD_VF64_M4_MASK = 872, PseudoVFADD_VF64_M4_TU = 873, PseudoVFADD_VF64_M8 = 874, PseudoVFADD_VF64_M8_MASK = 875, PseudoVFADD_VF64_M8_TU = 876, PseudoVFADD_VV_M1 = 877, PseudoVFADD_VV_M1_MASK = 878, PseudoVFADD_VV_M1_TU = 879, PseudoVFADD_VV_M2 = 880, PseudoVFADD_VV_M2_MASK = 881, PseudoVFADD_VV_M2_TU = 882, PseudoVFADD_VV_M4 = 883, PseudoVFADD_VV_M4_MASK = 884, PseudoVFADD_VV_M4_TU = 885, PseudoVFADD_VV_M8 = 886, PseudoVFADD_VV_M8_MASK = 887, PseudoVFADD_VV_M8_TU = 888, PseudoVFADD_VV_MF2 = 889, PseudoVFADD_VV_MF2_MASK = 890, PseudoVFADD_VV_MF2_TU = 891, PseudoVFADD_VV_MF4 = 892, PseudoVFADD_VV_MF4_MASK = 893, PseudoVFADD_VV_MF4_TU = 894, PseudoVFCLASS_V_M1 = 895, PseudoVFCLASS_V_M1_MASK = 896, PseudoVFCLASS_V_M1_TU = 897, PseudoVFCLASS_V_M2 = 898, PseudoVFCLASS_V_M2_MASK = 899, PseudoVFCLASS_V_M2_TU = 900, PseudoVFCLASS_V_M4 = 901, PseudoVFCLASS_V_M4_MASK = 902, PseudoVFCLASS_V_M4_TU = 903, PseudoVFCLASS_V_M8 = 904, PseudoVFCLASS_V_M8_MASK = 905, PseudoVFCLASS_V_M8_TU = 906, PseudoVFCLASS_V_MF2 = 907, PseudoVFCLASS_V_MF2_MASK = 908, PseudoVFCLASS_V_MF2_TU = 909, PseudoVFCLASS_V_MF4 = 910, PseudoVFCLASS_V_MF4_MASK = 911, PseudoVFCLASS_V_MF4_TU = 912, PseudoVFCVT_F_XU_V_M1 = 913, PseudoVFCVT_F_XU_V_M1_MASK = 914, PseudoVFCVT_F_XU_V_M1_TU = 915, PseudoVFCVT_F_XU_V_M2 = 916, PseudoVFCVT_F_XU_V_M2_MASK = 917, PseudoVFCVT_F_XU_V_M2_TU = 918, PseudoVFCVT_F_XU_V_M4 = 919, PseudoVFCVT_F_XU_V_M4_MASK = 920, PseudoVFCVT_F_XU_V_M4_TU = 921, PseudoVFCVT_F_XU_V_M8 = 922, PseudoVFCVT_F_XU_V_M8_MASK = 923, PseudoVFCVT_F_XU_V_M8_TU = 924, PseudoVFCVT_F_XU_V_MF2 = 925, PseudoVFCVT_F_XU_V_MF2_MASK = 926, PseudoVFCVT_F_XU_V_MF2_TU = 927, PseudoVFCVT_F_XU_V_MF4 = 928, PseudoVFCVT_F_XU_V_MF4_MASK = 929, PseudoVFCVT_F_XU_V_MF4_TU = 930, PseudoVFCVT_F_X_V_M1 = 931, PseudoVFCVT_F_X_V_M1_MASK = 932, PseudoVFCVT_F_X_V_M1_TU = 933, PseudoVFCVT_F_X_V_M2 = 934, PseudoVFCVT_F_X_V_M2_MASK = 935, PseudoVFCVT_F_X_V_M2_TU = 936, PseudoVFCVT_F_X_V_M4 = 937, PseudoVFCVT_F_X_V_M4_MASK = 938, PseudoVFCVT_F_X_V_M4_TU = 939, PseudoVFCVT_F_X_V_M8 = 940, PseudoVFCVT_F_X_V_M8_MASK = 941, PseudoVFCVT_F_X_V_M8_TU = 942, PseudoVFCVT_F_X_V_MF2 = 943, PseudoVFCVT_F_X_V_MF2_MASK = 944, PseudoVFCVT_F_X_V_MF2_TU = 945, PseudoVFCVT_F_X_V_MF4 = 946, PseudoVFCVT_F_X_V_MF4_MASK = 947, PseudoVFCVT_F_X_V_MF4_TU = 948, PseudoVFCVT_RM_F_XU_V_M1_MASK = 949, PseudoVFCVT_RM_F_XU_V_M2_MASK = 950, PseudoVFCVT_RM_F_XU_V_M4_MASK = 951, PseudoVFCVT_RM_F_XU_V_M8_MASK = 952, PseudoVFCVT_RM_F_XU_V_MF2_MASK = 953, PseudoVFCVT_RM_F_XU_V_MF4_MASK = 954, PseudoVFCVT_RM_F_X_V_M1_MASK = 955, PseudoVFCVT_RM_F_X_V_M2_MASK = 956, PseudoVFCVT_RM_F_X_V_M4_MASK = 957, PseudoVFCVT_RM_F_X_V_M8_MASK = 958, PseudoVFCVT_RM_F_X_V_MF2_MASK = 959, PseudoVFCVT_RM_F_X_V_MF4_MASK = 960, PseudoVFCVT_RM_XU_F_V_M1_MASK = 961, PseudoVFCVT_RM_XU_F_V_M2_MASK = 962, PseudoVFCVT_RM_XU_F_V_M4_MASK = 963, PseudoVFCVT_RM_XU_F_V_M8_MASK = 964, PseudoVFCVT_RM_XU_F_V_MF2_MASK = 965, PseudoVFCVT_RM_XU_F_V_MF4_MASK = 966, PseudoVFCVT_RM_X_F_V_M1_MASK = 967, PseudoVFCVT_RM_X_F_V_M2_MASK = 968, PseudoVFCVT_RM_X_F_V_M4_MASK = 969, PseudoVFCVT_RM_X_F_V_M8_MASK = 970, PseudoVFCVT_RM_X_F_V_MF2_MASK = 971, PseudoVFCVT_RM_X_F_V_MF4_MASK = 972, PseudoVFCVT_RTZ_XU_F_V_M1 = 973, PseudoVFCVT_RTZ_XU_F_V_M1_MASK = 974, PseudoVFCVT_RTZ_XU_F_V_M1_TU = 975, PseudoVFCVT_RTZ_XU_F_V_M2 = 976, PseudoVFCVT_RTZ_XU_F_V_M2_MASK = 977, PseudoVFCVT_RTZ_XU_F_V_M2_TU = 978, PseudoVFCVT_RTZ_XU_F_V_M4 = 979, PseudoVFCVT_RTZ_XU_F_V_M4_MASK = 980, PseudoVFCVT_RTZ_XU_F_V_M4_TU = 981, PseudoVFCVT_RTZ_XU_F_V_M8 = 982, PseudoVFCVT_RTZ_XU_F_V_M8_MASK = 983, PseudoVFCVT_RTZ_XU_F_V_M8_TU = 984, PseudoVFCVT_RTZ_XU_F_V_MF2 = 985, PseudoVFCVT_RTZ_XU_F_V_MF2_MASK = 986, PseudoVFCVT_RTZ_XU_F_V_MF2_TU = 987, PseudoVFCVT_RTZ_XU_F_V_MF4 = 988, PseudoVFCVT_RTZ_XU_F_V_MF4_MASK = 989, PseudoVFCVT_RTZ_XU_F_V_MF4_TU = 990, PseudoVFCVT_RTZ_X_F_V_M1 = 991, PseudoVFCVT_RTZ_X_F_V_M1_MASK = 992, PseudoVFCVT_RTZ_X_F_V_M1_TU = 993, PseudoVFCVT_RTZ_X_F_V_M2 = 994, PseudoVFCVT_RTZ_X_F_V_M2_MASK = 995, PseudoVFCVT_RTZ_X_F_V_M2_TU = 996, PseudoVFCVT_RTZ_X_F_V_M4 = 997, PseudoVFCVT_RTZ_X_F_V_M4_MASK = 998, PseudoVFCVT_RTZ_X_F_V_M4_TU = 999, PseudoVFCVT_RTZ_X_F_V_M8 = 1000, PseudoVFCVT_RTZ_X_F_V_M8_MASK = 1001, PseudoVFCVT_RTZ_X_F_V_M8_TU = 1002, PseudoVFCVT_RTZ_X_F_V_MF2 = 1003, PseudoVFCVT_RTZ_X_F_V_MF2_MASK = 1004, PseudoVFCVT_RTZ_X_F_V_MF2_TU = 1005, PseudoVFCVT_RTZ_X_F_V_MF4 = 1006, PseudoVFCVT_RTZ_X_F_V_MF4_MASK = 1007, PseudoVFCVT_RTZ_X_F_V_MF4_TU = 1008, PseudoVFCVT_XU_F_V_M1 = 1009, PseudoVFCVT_XU_F_V_M1_MASK = 1010, PseudoVFCVT_XU_F_V_M1_TU = 1011, PseudoVFCVT_XU_F_V_M2 = 1012, PseudoVFCVT_XU_F_V_M2_MASK = 1013, PseudoVFCVT_XU_F_V_M2_TU = 1014, PseudoVFCVT_XU_F_V_M4 = 1015, PseudoVFCVT_XU_F_V_M4_MASK = 1016, PseudoVFCVT_XU_F_V_M4_TU = 1017, PseudoVFCVT_XU_F_V_M8 = 1018, PseudoVFCVT_XU_F_V_M8_MASK = 1019, PseudoVFCVT_XU_F_V_M8_TU = 1020, PseudoVFCVT_XU_F_V_MF2 = 1021, PseudoVFCVT_XU_F_V_MF2_MASK = 1022, PseudoVFCVT_XU_F_V_MF2_TU = 1023, PseudoVFCVT_XU_F_V_MF4 = 1024, PseudoVFCVT_XU_F_V_MF4_MASK = 1025, PseudoVFCVT_XU_F_V_MF4_TU = 1026, PseudoVFCVT_X_F_V_M1 = 1027, PseudoVFCVT_X_F_V_M1_MASK = 1028, PseudoVFCVT_X_F_V_M1_TU = 1029, PseudoVFCVT_X_F_V_M2 = 1030, PseudoVFCVT_X_F_V_M2_MASK = 1031, PseudoVFCVT_X_F_V_M2_TU = 1032, PseudoVFCVT_X_F_V_M4 = 1033, PseudoVFCVT_X_F_V_M4_MASK = 1034, PseudoVFCVT_X_F_V_M4_TU = 1035, PseudoVFCVT_X_F_V_M8 = 1036, PseudoVFCVT_X_F_V_M8_MASK = 1037, PseudoVFCVT_X_F_V_M8_TU = 1038, PseudoVFCVT_X_F_V_MF2 = 1039, PseudoVFCVT_X_F_V_MF2_MASK = 1040, PseudoVFCVT_X_F_V_MF2_TU = 1041, PseudoVFCVT_X_F_V_MF4 = 1042, PseudoVFCVT_X_F_V_MF4_MASK = 1043, PseudoVFCVT_X_F_V_MF4_TU = 1044, PseudoVFDIV_VF16_M1 = 1045, PseudoVFDIV_VF16_M1_MASK = 1046, PseudoVFDIV_VF16_M1_TU = 1047, PseudoVFDIV_VF16_M2 = 1048, PseudoVFDIV_VF16_M2_MASK = 1049, PseudoVFDIV_VF16_M2_TU = 1050, PseudoVFDIV_VF16_M4 = 1051, PseudoVFDIV_VF16_M4_MASK = 1052, PseudoVFDIV_VF16_M4_TU = 1053, PseudoVFDIV_VF16_M8 = 1054, PseudoVFDIV_VF16_M8_MASK = 1055, PseudoVFDIV_VF16_M8_TU = 1056, PseudoVFDIV_VF16_MF2 = 1057, PseudoVFDIV_VF16_MF2_MASK = 1058, PseudoVFDIV_VF16_MF2_TU = 1059, PseudoVFDIV_VF16_MF4 = 1060, PseudoVFDIV_VF16_MF4_MASK = 1061, PseudoVFDIV_VF16_MF4_TU = 1062, PseudoVFDIV_VF32_M1 = 1063, PseudoVFDIV_VF32_M1_MASK = 1064, PseudoVFDIV_VF32_M1_TU = 1065, PseudoVFDIV_VF32_M2 = 1066, PseudoVFDIV_VF32_M2_MASK = 1067, PseudoVFDIV_VF32_M2_TU = 1068, PseudoVFDIV_VF32_M4 = 1069, PseudoVFDIV_VF32_M4_MASK = 1070, PseudoVFDIV_VF32_M4_TU = 1071, PseudoVFDIV_VF32_M8 = 1072, PseudoVFDIV_VF32_M8_MASK = 1073, PseudoVFDIV_VF32_M8_TU = 1074, PseudoVFDIV_VF32_MF2 = 1075, PseudoVFDIV_VF32_MF2_MASK = 1076, PseudoVFDIV_VF32_MF2_TU = 1077, PseudoVFDIV_VF64_M1 = 1078, PseudoVFDIV_VF64_M1_MASK = 1079, PseudoVFDIV_VF64_M1_TU = 1080, PseudoVFDIV_VF64_M2 = 1081, PseudoVFDIV_VF64_M2_MASK = 1082, PseudoVFDIV_VF64_M2_TU = 1083, PseudoVFDIV_VF64_M4 = 1084, PseudoVFDIV_VF64_M4_MASK = 1085, PseudoVFDIV_VF64_M4_TU = 1086, PseudoVFDIV_VF64_M8 = 1087, PseudoVFDIV_VF64_M8_MASK = 1088, PseudoVFDIV_VF64_M8_TU = 1089, PseudoVFDIV_VV_M1 = 1090, PseudoVFDIV_VV_M1_MASK = 1091, PseudoVFDIV_VV_M1_TU = 1092, PseudoVFDIV_VV_M2 = 1093, PseudoVFDIV_VV_M2_MASK = 1094, PseudoVFDIV_VV_M2_TU = 1095, PseudoVFDIV_VV_M4 = 1096, PseudoVFDIV_VV_M4_MASK = 1097, PseudoVFDIV_VV_M4_TU = 1098, PseudoVFDIV_VV_M8 = 1099, PseudoVFDIV_VV_M8_MASK = 1100, PseudoVFDIV_VV_M8_TU = 1101, PseudoVFDIV_VV_MF2 = 1102, PseudoVFDIV_VV_MF2_MASK = 1103, PseudoVFDIV_VV_MF2_TU = 1104, PseudoVFDIV_VV_MF4 = 1105, PseudoVFDIV_VV_MF4_MASK = 1106, PseudoVFDIV_VV_MF4_TU = 1107, PseudoVFIRST_M_B1 = 1108, PseudoVFIRST_M_B16 = 1109, PseudoVFIRST_M_B16_MASK = 1110, PseudoVFIRST_M_B1_MASK = 1111, PseudoVFIRST_M_B2 = 1112, PseudoVFIRST_M_B2_MASK = 1113, PseudoVFIRST_M_B32 = 1114, PseudoVFIRST_M_B32_MASK = 1115, PseudoVFIRST_M_B4 = 1116, PseudoVFIRST_M_B4_MASK = 1117, PseudoVFIRST_M_B64 = 1118, PseudoVFIRST_M_B64_MASK = 1119, PseudoVFIRST_M_B8 = 1120, PseudoVFIRST_M_B8_MASK = 1121, PseudoVFMACC_VF16_M1 = 1122, PseudoVFMACC_VF16_M1_MASK = 1123, PseudoVFMACC_VF16_M2 = 1124, PseudoVFMACC_VF16_M2_MASK = 1125, PseudoVFMACC_VF16_M4 = 1126, PseudoVFMACC_VF16_M4_MASK = 1127, PseudoVFMACC_VF16_M8 = 1128, PseudoVFMACC_VF16_M8_MASK = 1129, PseudoVFMACC_VF16_MF2 = 1130, PseudoVFMACC_VF16_MF2_MASK = 1131, PseudoVFMACC_VF16_MF4 = 1132, PseudoVFMACC_VF16_MF4_MASK = 1133, PseudoVFMACC_VF32_M1 = 1134, PseudoVFMACC_VF32_M1_MASK = 1135, PseudoVFMACC_VF32_M2 = 1136, PseudoVFMACC_VF32_M2_MASK = 1137, PseudoVFMACC_VF32_M4 = 1138, PseudoVFMACC_VF32_M4_MASK = 1139, PseudoVFMACC_VF32_M8 = 1140, PseudoVFMACC_VF32_M8_MASK = 1141, PseudoVFMACC_VF32_MF2 = 1142, PseudoVFMACC_VF32_MF2_MASK = 1143, PseudoVFMACC_VF64_M1 = 1144, PseudoVFMACC_VF64_M1_MASK = 1145, PseudoVFMACC_VF64_M2 = 1146, PseudoVFMACC_VF64_M2_MASK = 1147, PseudoVFMACC_VF64_M4 = 1148, PseudoVFMACC_VF64_M4_MASK = 1149, PseudoVFMACC_VF64_M8 = 1150, PseudoVFMACC_VF64_M8_MASK = 1151, PseudoVFMACC_VV_M1 = 1152, PseudoVFMACC_VV_M1_MASK = 1153, PseudoVFMACC_VV_M2 = 1154, PseudoVFMACC_VV_M2_MASK = 1155, PseudoVFMACC_VV_M4 = 1156, PseudoVFMACC_VV_M4_MASK = 1157, PseudoVFMACC_VV_M8 = 1158, PseudoVFMACC_VV_M8_MASK = 1159, PseudoVFMACC_VV_MF2 = 1160, PseudoVFMACC_VV_MF2_MASK = 1161, PseudoVFMACC_VV_MF4 = 1162, PseudoVFMACC_VV_MF4_MASK = 1163, PseudoVFMADD_VF16_M1 = 1164, PseudoVFMADD_VF16_M1_MASK = 1165, PseudoVFMADD_VF16_M2 = 1166, PseudoVFMADD_VF16_M2_MASK = 1167, PseudoVFMADD_VF16_M4 = 1168, PseudoVFMADD_VF16_M4_MASK = 1169, PseudoVFMADD_VF16_M8 = 1170, PseudoVFMADD_VF16_M8_MASK = 1171, PseudoVFMADD_VF16_MF2 = 1172, PseudoVFMADD_VF16_MF2_MASK = 1173, PseudoVFMADD_VF16_MF4 = 1174, PseudoVFMADD_VF16_MF4_MASK = 1175, PseudoVFMADD_VF32_M1 = 1176, PseudoVFMADD_VF32_M1_MASK = 1177, PseudoVFMADD_VF32_M2 = 1178, PseudoVFMADD_VF32_M2_MASK = 1179, PseudoVFMADD_VF32_M4 = 1180, PseudoVFMADD_VF32_M4_MASK = 1181, PseudoVFMADD_VF32_M8 = 1182, PseudoVFMADD_VF32_M8_MASK = 1183, PseudoVFMADD_VF32_MF2 = 1184, PseudoVFMADD_VF32_MF2_MASK = 1185, PseudoVFMADD_VF64_M1 = 1186, PseudoVFMADD_VF64_M1_MASK = 1187, PseudoVFMADD_VF64_M2 = 1188, PseudoVFMADD_VF64_M2_MASK = 1189, PseudoVFMADD_VF64_M4 = 1190, PseudoVFMADD_VF64_M4_MASK = 1191, PseudoVFMADD_VF64_M8 = 1192, PseudoVFMADD_VF64_M8_MASK = 1193, PseudoVFMADD_VV_M1 = 1194, PseudoVFMADD_VV_M1_MASK = 1195, PseudoVFMADD_VV_M2 = 1196, PseudoVFMADD_VV_M2_MASK = 1197, PseudoVFMADD_VV_M4 = 1198, PseudoVFMADD_VV_M4_MASK = 1199, PseudoVFMADD_VV_M8 = 1200, PseudoVFMADD_VV_M8_MASK = 1201, PseudoVFMADD_VV_MF2 = 1202, PseudoVFMADD_VV_MF2_MASK = 1203, PseudoVFMADD_VV_MF4 = 1204, PseudoVFMADD_VV_MF4_MASK = 1205, PseudoVFMAX_VF16_M1 = 1206, PseudoVFMAX_VF16_M1_MASK = 1207, PseudoVFMAX_VF16_M1_TU = 1208, PseudoVFMAX_VF16_M2 = 1209, PseudoVFMAX_VF16_M2_MASK = 1210, PseudoVFMAX_VF16_M2_TU = 1211, PseudoVFMAX_VF16_M4 = 1212, PseudoVFMAX_VF16_M4_MASK = 1213, PseudoVFMAX_VF16_M4_TU = 1214, PseudoVFMAX_VF16_M8 = 1215, PseudoVFMAX_VF16_M8_MASK = 1216, PseudoVFMAX_VF16_M8_TU = 1217, PseudoVFMAX_VF16_MF2 = 1218, PseudoVFMAX_VF16_MF2_MASK = 1219, PseudoVFMAX_VF16_MF2_TU = 1220, PseudoVFMAX_VF16_MF4 = 1221, PseudoVFMAX_VF16_MF4_MASK = 1222, PseudoVFMAX_VF16_MF4_TU = 1223, PseudoVFMAX_VF32_M1 = 1224, PseudoVFMAX_VF32_M1_MASK = 1225, PseudoVFMAX_VF32_M1_TU = 1226, PseudoVFMAX_VF32_M2 = 1227, PseudoVFMAX_VF32_M2_MASK = 1228, PseudoVFMAX_VF32_M2_TU = 1229, PseudoVFMAX_VF32_M4 = 1230, PseudoVFMAX_VF32_M4_MASK = 1231, PseudoVFMAX_VF32_M4_TU = 1232, PseudoVFMAX_VF32_M8 = 1233, PseudoVFMAX_VF32_M8_MASK = 1234, PseudoVFMAX_VF32_M8_TU = 1235, PseudoVFMAX_VF32_MF2 = 1236, PseudoVFMAX_VF32_MF2_MASK = 1237, PseudoVFMAX_VF32_MF2_TU = 1238, PseudoVFMAX_VF64_M1 = 1239, PseudoVFMAX_VF64_M1_MASK = 1240, PseudoVFMAX_VF64_M1_TU = 1241, PseudoVFMAX_VF64_M2 = 1242, PseudoVFMAX_VF64_M2_MASK = 1243, PseudoVFMAX_VF64_M2_TU = 1244, PseudoVFMAX_VF64_M4 = 1245, PseudoVFMAX_VF64_M4_MASK = 1246, PseudoVFMAX_VF64_M4_TU = 1247, PseudoVFMAX_VF64_M8 = 1248, PseudoVFMAX_VF64_M8_MASK = 1249, PseudoVFMAX_VF64_M8_TU = 1250, PseudoVFMAX_VV_M1 = 1251, PseudoVFMAX_VV_M1_MASK = 1252, PseudoVFMAX_VV_M1_TU = 1253, PseudoVFMAX_VV_M2 = 1254, PseudoVFMAX_VV_M2_MASK = 1255, PseudoVFMAX_VV_M2_TU = 1256, PseudoVFMAX_VV_M4 = 1257, PseudoVFMAX_VV_M4_MASK = 1258, PseudoVFMAX_VV_M4_TU = 1259, PseudoVFMAX_VV_M8 = 1260, PseudoVFMAX_VV_M8_MASK = 1261, PseudoVFMAX_VV_M8_TU = 1262, PseudoVFMAX_VV_MF2 = 1263, PseudoVFMAX_VV_MF2_MASK = 1264, PseudoVFMAX_VV_MF2_TU = 1265, PseudoVFMAX_VV_MF4 = 1266, PseudoVFMAX_VV_MF4_MASK = 1267, PseudoVFMAX_VV_MF4_TU = 1268, PseudoVFMERGE_VF16M_M1 = 1269, PseudoVFMERGE_VF16M_M1_TU = 1270, PseudoVFMERGE_VF16M_M2 = 1271, PseudoVFMERGE_VF16M_M2_TU = 1272, PseudoVFMERGE_VF16M_M4 = 1273, PseudoVFMERGE_VF16M_M4_TU = 1274, PseudoVFMERGE_VF16M_M8 = 1275, PseudoVFMERGE_VF16M_M8_TU = 1276, PseudoVFMERGE_VF16M_MF2 = 1277, PseudoVFMERGE_VF16M_MF2_TU = 1278, PseudoVFMERGE_VF16M_MF4 = 1279, PseudoVFMERGE_VF16M_MF4_TU = 1280, PseudoVFMERGE_VF32M_M1 = 1281, PseudoVFMERGE_VF32M_M1_TU = 1282, PseudoVFMERGE_VF32M_M2 = 1283, PseudoVFMERGE_VF32M_M2_TU = 1284, PseudoVFMERGE_VF32M_M4 = 1285, PseudoVFMERGE_VF32M_M4_TU = 1286, PseudoVFMERGE_VF32M_M8 = 1287, PseudoVFMERGE_VF32M_M8_TU = 1288, PseudoVFMERGE_VF32M_MF2 = 1289, PseudoVFMERGE_VF32M_MF2_TU = 1290, PseudoVFMERGE_VF64M_M1 = 1291, PseudoVFMERGE_VF64M_M1_TU = 1292, PseudoVFMERGE_VF64M_M2 = 1293, PseudoVFMERGE_VF64M_M2_TU = 1294, PseudoVFMERGE_VF64M_M4 = 1295, PseudoVFMERGE_VF64M_M4_TU = 1296, PseudoVFMERGE_VF64M_M8 = 1297, PseudoVFMERGE_VF64M_M8_TU = 1298, PseudoVFMIN_VF16_M1 = 1299, PseudoVFMIN_VF16_M1_MASK = 1300, PseudoVFMIN_VF16_M1_TU = 1301, PseudoVFMIN_VF16_M2 = 1302, PseudoVFMIN_VF16_M2_MASK = 1303, PseudoVFMIN_VF16_M2_TU = 1304, PseudoVFMIN_VF16_M4 = 1305, PseudoVFMIN_VF16_M4_MASK = 1306, PseudoVFMIN_VF16_M4_TU = 1307, PseudoVFMIN_VF16_M8 = 1308, PseudoVFMIN_VF16_M8_MASK = 1309, PseudoVFMIN_VF16_M8_TU = 1310, PseudoVFMIN_VF16_MF2 = 1311, PseudoVFMIN_VF16_MF2_MASK = 1312, PseudoVFMIN_VF16_MF2_TU = 1313, PseudoVFMIN_VF16_MF4 = 1314, PseudoVFMIN_VF16_MF4_MASK = 1315, PseudoVFMIN_VF16_MF4_TU = 1316, PseudoVFMIN_VF32_M1 = 1317, PseudoVFMIN_VF32_M1_MASK = 1318, PseudoVFMIN_VF32_M1_TU = 1319, PseudoVFMIN_VF32_M2 = 1320, PseudoVFMIN_VF32_M2_MASK = 1321, PseudoVFMIN_VF32_M2_TU = 1322, PseudoVFMIN_VF32_M4 = 1323, PseudoVFMIN_VF32_M4_MASK = 1324, PseudoVFMIN_VF32_M4_TU = 1325, PseudoVFMIN_VF32_M8 = 1326, PseudoVFMIN_VF32_M8_MASK = 1327, PseudoVFMIN_VF32_M8_TU = 1328, PseudoVFMIN_VF32_MF2 = 1329, PseudoVFMIN_VF32_MF2_MASK = 1330, PseudoVFMIN_VF32_MF2_TU = 1331, PseudoVFMIN_VF64_M1 = 1332, PseudoVFMIN_VF64_M1_MASK = 1333, PseudoVFMIN_VF64_M1_TU = 1334, PseudoVFMIN_VF64_M2 = 1335, PseudoVFMIN_VF64_M2_MASK = 1336, PseudoVFMIN_VF64_M2_TU = 1337, PseudoVFMIN_VF64_M4 = 1338, PseudoVFMIN_VF64_M4_MASK = 1339, PseudoVFMIN_VF64_M4_TU = 1340, PseudoVFMIN_VF64_M8 = 1341, PseudoVFMIN_VF64_M8_MASK = 1342, PseudoVFMIN_VF64_M8_TU = 1343, PseudoVFMIN_VV_M1 = 1344, PseudoVFMIN_VV_M1_MASK = 1345, PseudoVFMIN_VV_M1_TU = 1346, PseudoVFMIN_VV_M2 = 1347, PseudoVFMIN_VV_M2_MASK = 1348, PseudoVFMIN_VV_M2_TU = 1349, PseudoVFMIN_VV_M4 = 1350, PseudoVFMIN_VV_M4_MASK = 1351, PseudoVFMIN_VV_M4_TU = 1352, PseudoVFMIN_VV_M8 = 1353, PseudoVFMIN_VV_M8_MASK = 1354, PseudoVFMIN_VV_M8_TU = 1355, PseudoVFMIN_VV_MF2 = 1356, PseudoVFMIN_VV_MF2_MASK = 1357, PseudoVFMIN_VV_MF2_TU = 1358, PseudoVFMIN_VV_MF4 = 1359, PseudoVFMIN_VV_MF4_MASK = 1360, PseudoVFMIN_VV_MF4_TU = 1361, PseudoVFMSAC_VF16_M1 = 1362, PseudoVFMSAC_VF16_M1_MASK = 1363, PseudoVFMSAC_VF16_M2 = 1364, PseudoVFMSAC_VF16_M2_MASK = 1365, PseudoVFMSAC_VF16_M4 = 1366, PseudoVFMSAC_VF16_M4_MASK = 1367, PseudoVFMSAC_VF16_M8 = 1368, PseudoVFMSAC_VF16_M8_MASK = 1369, PseudoVFMSAC_VF16_MF2 = 1370, PseudoVFMSAC_VF16_MF2_MASK = 1371, PseudoVFMSAC_VF16_MF4 = 1372, PseudoVFMSAC_VF16_MF4_MASK = 1373, PseudoVFMSAC_VF32_M1 = 1374, PseudoVFMSAC_VF32_M1_MASK = 1375, PseudoVFMSAC_VF32_M2 = 1376, PseudoVFMSAC_VF32_M2_MASK = 1377, PseudoVFMSAC_VF32_M4 = 1378, PseudoVFMSAC_VF32_M4_MASK = 1379, PseudoVFMSAC_VF32_M8 = 1380, PseudoVFMSAC_VF32_M8_MASK = 1381, PseudoVFMSAC_VF32_MF2 = 1382, PseudoVFMSAC_VF32_MF2_MASK = 1383, PseudoVFMSAC_VF64_M1 = 1384, PseudoVFMSAC_VF64_M1_MASK = 1385, PseudoVFMSAC_VF64_M2 = 1386, PseudoVFMSAC_VF64_M2_MASK = 1387, PseudoVFMSAC_VF64_M4 = 1388, PseudoVFMSAC_VF64_M4_MASK = 1389, PseudoVFMSAC_VF64_M8 = 1390, PseudoVFMSAC_VF64_M8_MASK = 1391, PseudoVFMSAC_VV_M1 = 1392, PseudoVFMSAC_VV_M1_MASK = 1393, PseudoVFMSAC_VV_M2 = 1394, PseudoVFMSAC_VV_M2_MASK = 1395, PseudoVFMSAC_VV_M4 = 1396, PseudoVFMSAC_VV_M4_MASK = 1397, PseudoVFMSAC_VV_M8 = 1398, PseudoVFMSAC_VV_M8_MASK = 1399, PseudoVFMSAC_VV_MF2 = 1400, PseudoVFMSAC_VV_MF2_MASK = 1401, PseudoVFMSAC_VV_MF4 = 1402, PseudoVFMSAC_VV_MF4_MASK = 1403, PseudoVFMSUB_VF16_M1 = 1404, PseudoVFMSUB_VF16_M1_MASK = 1405, PseudoVFMSUB_VF16_M2 = 1406, PseudoVFMSUB_VF16_M2_MASK = 1407, PseudoVFMSUB_VF16_M4 = 1408, PseudoVFMSUB_VF16_M4_MASK = 1409, PseudoVFMSUB_VF16_M8 = 1410, PseudoVFMSUB_VF16_M8_MASK = 1411, PseudoVFMSUB_VF16_MF2 = 1412, PseudoVFMSUB_VF16_MF2_MASK = 1413, PseudoVFMSUB_VF16_MF4 = 1414, PseudoVFMSUB_VF16_MF4_MASK = 1415, PseudoVFMSUB_VF32_M1 = 1416, PseudoVFMSUB_VF32_M1_MASK = 1417, PseudoVFMSUB_VF32_M2 = 1418, PseudoVFMSUB_VF32_M2_MASK = 1419, PseudoVFMSUB_VF32_M4 = 1420, PseudoVFMSUB_VF32_M4_MASK = 1421, PseudoVFMSUB_VF32_M8 = 1422, PseudoVFMSUB_VF32_M8_MASK = 1423, PseudoVFMSUB_VF32_MF2 = 1424, PseudoVFMSUB_VF32_MF2_MASK = 1425, PseudoVFMSUB_VF64_M1 = 1426, PseudoVFMSUB_VF64_M1_MASK = 1427, PseudoVFMSUB_VF64_M2 = 1428, PseudoVFMSUB_VF64_M2_MASK = 1429, PseudoVFMSUB_VF64_M4 = 1430, PseudoVFMSUB_VF64_M4_MASK = 1431, PseudoVFMSUB_VF64_M8 = 1432, PseudoVFMSUB_VF64_M8_MASK = 1433, PseudoVFMSUB_VV_M1 = 1434, PseudoVFMSUB_VV_M1_MASK = 1435, PseudoVFMSUB_VV_M2 = 1436, PseudoVFMSUB_VV_M2_MASK = 1437, PseudoVFMSUB_VV_M4 = 1438, PseudoVFMSUB_VV_M4_MASK = 1439, PseudoVFMSUB_VV_M8 = 1440, PseudoVFMSUB_VV_M8_MASK = 1441, PseudoVFMSUB_VV_MF2 = 1442, PseudoVFMSUB_VV_MF2_MASK = 1443, PseudoVFMSUB_VV_MF4 = 1444, PseudoVFMSUB_VV_MF4_MASK = 1445, PseudoVFMUL_VF16_M1 = 1446, PseudoVFMUL_VF16_M1_MASK = 1447, PseudoVFMUL_VF16_M1_TU = 1448, PseudoVFMUL_VF16_M2 = 1449, PseudoVFMUL_VF16_M2_MASK = 1450, PseudoVFMUL_VF16_M2_TU = 1451, PseudoVFMUL_VF16_M4 = 1452, PseudoVFMUL_VF16_M4_MASK = 1453, PseudoVFMUL_VF16_M4_TU = 1454, PseudoVFMUL_VF16_M8 = 1455, PseudoVFMUL_VF16_M8_MASK = 1456, PseudoVFMUL_VF16_M8_TU = 1457, PseudoVFMUL_VF16_MF2 = 1458, PseudoVFMUL_VF16_MF2_MASK = 1459, PseudoVFMUL_VF16_MF2_TU = 1460, PseudoVFMUL_VF16_MF4 = 1461, PseudoVFMUL_VF16_MF4_MASK = 1462, PseudoVFMUL_VF16_MF4_TU = 1463, PseudoVFMUL_VF32_M1 = 1464, PseudoVFMUL_VF32_M1_MASK = 1465, PseudoVFMUL_VF32_M1_TU = 1466, PseudoVFMUL_VF32_M2 = 1467, PseudoVFMUL_VF32_M2_MASK = 1468, PseudoVFMUL_VF32_M2_TU = 1469, PseudoVFMUL_VF32_M4 = 1470, PseudoVFMUL_VF32_M4_MASK = 1471, PseudoVFMUL_VF32_M4_TU = 1472, PseudoVFMUL_VF32_M8 = 1473, PseudoVFMUL_VF32_M8_MASK = 1474, PseudoVFMUL_VF32_M8_TU = 1475, PseudoVFMUL_VF32_MF2 = 1476, PseudoVFMUL_VF32_MF2_MASK = 1477, PseudoVFMUL_VF32_MF2_TU = 1478, PseudoVFMUL_VF64_M1 = 1479, PseudoVFMUL_VF64_M1_MASK = 1480, PseudoVFMUL_VF64_M1_TU = 1481, PseudoVFMUL_VF64_M2 = 1482, PseudoVFMUL_VF64_M2_MASK = 1483, PseudoVFMUL_VF64_M2_TU = 1484, PseudoVFMUL_VF64_M4 = 1485, PseudoVFMUL_VF64_M4_MASK = 1486, PseudoVFMUL_VF64_M4_TU = 1487, PseudoVFMUL_VF64_M8 = 1488, PseudoVFMUL_VF64_M8_MASK = 1489, PseudoVFMUL_VF64_M8_TU = 1490, PseudoVFMUL_VV_M1 = 1491, PseudoVFMUL_VV_M1_MASK = 1492, PseudoVFMUL_VV_M1_TU = 1493, PseudoVFMUL_VV_M2 = 1494, PseudoVFMUL_VV_M2_MASK = 1495, PseudoVFMUL_VV_M2_TU = 1496, PseudoVFMUL_VV_M4 = 1497, PseudoVFMUL_VV_M4_MASK = 1498, PseudoVFMUL_VV_M4_TU = 1499, PseudoVFMUL_VV_M8 = 1500, PseudoVFMUL_VV_M8_MASK = 1501, PseudoVFMUL_VV_M8_TU = 1502, PseudoVFMUL_VV_MF2 = 1503, PseudoVFMUL_VV_MF2_MASK = 1504, PseudoVFMUL_VV_MF2_TU = 1505, PseudoVFMUL_VV_MF4 = 1506, PseudoVFMUL_VV_MF4_MASK = 1507, PseudoVFMUL_VV_MF4_TU = 1508, PseudoVFMV_F16_S_M1 = 1509, PseudoVFMV_F16_S_M2 = 1510, PseudoVFMV_F16_S_M4 = 1511, PseudoVFMV_F16_S_M8 = 1512, PseudoVFMV_F16_S_MF2 = 1513, PseudoVFMV_F16_S_MF4 = 1514, PseudoVFMV_F32_S_M1 = 1515, PseudoVFMV_F32_S_M2 = 1516, PseudoVFMV_F32_S_M4 = 1517, PseudoVFMV_F32_S_M8 = 1518, PseudoVFMV_F32_S_MF2 = 1519, PseudoVFMV_F64_S_M1 = 1520, PseudoVFMV_F64_S_M2 = 1521, PseudoVFMV_F64_S_M4 = 1522, PseudoVFMV_F64_S_M8 = 1523, PseudoVFMV_S_F16_M1 = 1524, PseudoVFMV_S_F16_M2 = 1525, PseudoVFMV_S_F16_M4 = 1526, PseudoVFMV_S_F16_M8 = 1527, PseudoVFMV_S_F16_MF2 = 1528, PseudoVFMV_S_F16_MF4 = 1529, PseudoVFMV_S_F32_M1 = 1530, PseudoVFMV_S_F32_M2 = 1531, PseudoVFMV_S_F32_M4 = 1532, PseudoVFMV_S_F32_M8 = 1533, PseudoVFMV_S_F32_MF2 = 1534, PseudoVFMV_S_F64_M1 = 1535, PseudoVFMV_S_F64_M2 = 1536, PseudoVFMV_S_F64_M4 = 1537, PseudoVFMV_S_F64_M8 = 1538, PseudoVFMV_V_F16_M1 = 1539, PseudoVFMV_V_F16_M1_TU = 1540, PseudoVFMV_V_F16_M2 = 1541, PseudoVFMV_V_F16_M2_TU = 1542, PseudoVFMV_V_F16_M4 = 1543, PseudoVFMV_V_F16_M4_TU = 1544, PseudoVFMV_V_F16_M8 = 1545, PseudoVFMV_V_F16_M8_TU = 1546, PseudoVFMV_V_F16_MF2 = 1547, PseudoVFMV_V_F16_MF2_TU = 1548, PseudoVFMV_V_F16_MF4 = 1549, PseudoVFMV_V_F16_MF4_TU = 1550, PseudoVFMV_V_F32_M1 = 1551, PseudoVFMV_V_F32_M1_TU = 1552, PseudoVFMV_V_F32_M2 = 1553, PseudoVFMV_V_F32_M2_TU = 1554, PseudoVFMV_V_F32_M4 = 1555, PseudoVFMV_V_F32_M4_TU = 1556, PseudoVFMV_V_F32_M8 = 1557, PseudoVFMV_V_F32_M8_TU = 1558, PseudoVFMV_V_F32_MF2 = 1559, PseudoVFMV_V_F32_MF2_TU = 1560, PseudoVFMV_V_F64_M1 = 1561, PseudoVFMV_V_F64_M1_TU = 1562, PseudoVFMV_V_F64_M2 = 1563, PseudoVFMV_V_F64_M2_TU = 1564, PseudoVFMV_V_F64_M4 = 1565, PseudoVFMV_V_F64_M4_TU = 1566, PseudoVFMV_V_F64_M8 = 1567, PseudoVFMV_V_F64_M8_TU = 1568, PseudoVFNCVT_F_F_W_M1 = 1569, PseudoVFNCVT_F_F_W_M1_MASK = 1570, PseudoVFNCVT_F_F_W_M1_TU = 1571, PseudoVFNCVT_F_F_W_M2 = 1572, PseudoVFNCVT_F_F_W_M2_MASK = 1573, PseudoVFNCVT_F_F_W_M2_TU = 1574, PseudoVFNCVT_F_F_W_M4 = 1575, PseudoVFNCVT_F_F_W_M4_MASK = 1576, PseudoVFNCVT_F_F_W_M4_TU = 1577, PseudoVFNCVT_F_F_W_MF2 = 1578, PseudoVFNCVT_F_F_W_MF2_MASK = 1579, PseudoVFNCVT_F_F_W_MF2_TU = 1580, PseudoVFNCVT_F_F_W_MF4 = 1581, PseudoVFNCVT_F_F_W_MF4_MASK = 1582, PseudoVFNCVT_F_F_W_MF4_TU = 1583, PseudoVFNCVT_F_XU_W_M1 = 1584, PseudoVFNCVT_F_XU_W_M1_MASK = 1585, PseudoVFNCVT_F_XU_W_M1_TU = 1586, PseudoVFNCVT_F_XU_W_M2 = 1587, PseudoVFNCVT_F_XU_W_M2_MASK = 1588, PseudoVFNCVT_F_XU_W_M2_TU = 1589, PseudoVFNCVT_F_XU_W_M4 = 1590, PseudoVFNCVT_F_XU_W_M4_MASK = 1591, PseudoVFNCVT_F_XU_W_M4_TU = 1592, PseudoVFNCVT_F_XU_W_MF2 = 1593, PseudoVFNCVT_F_XU_W_MF2_MASK = 1594, PseudoVFNCVT_F_XU_W_MF2_TU = 1595, PseudoVFNCVT_F_XU_W_MF4 = 1596, PseudoVFNCVT_F_XU_W_MF4_MASK = 1597, PseudoVFNCVT_F_XU_W_MF4_TU = 1598, PseudoVFNCVT_F_X_W_M1 = 1599, PseudoVFNCVT_F_X_W_M1_MASK = 1600, PseudoVFNCVT_F_X_W_M1_TU = 1601, PseudoVFNCVT_F_X_W_M2 = 1602, PseudoVFNCVT_F_X_W_M2_MASK = 1603, PseudoVFNCVT_F_X_W_M2_TU = 1604, PseudoVFNCVT_F_X_W_M4 = 1605, PseudoVFNCVT_F_X_W_M4_MASK = 1606, PseudoVFNCVT_F_X_W_M4_TU = 1607, PseudoVFNCVT_F_X_W_MF2 = 1608, PseudoVFNCVT_F_X_W_MF2_MASK = 1609, PseudoVFNCVT_F_X_W_MF2_TU = 1610, PseudoVFNCVT_F_X_W_MF4 = 1611, PseudoVFNCVT_F_X_W_MF4_MASK = 1612, PseudoVFNCVT_F_X_W_MF4_TU = 1613, PseudoVFNCVT_RM_F_XU_W_M1_MASK = 1614, PseudoVFNCVT_RM_F_XU_W_M2_MASK = 1615, PseudoVFNCVT_RM_F_XU_W_M4_MASK = 1616, PseudoVFNCVT_RM_F_XU_W_MF2_MASK = 1617, PseudoVFNCVT_RM_F_XU_W_MF4_MASK = 1618, PseudoVFNCVT_RM_F_X_W_M1_MASK = 1619, PseudoVFNCVT_RM_F_X_W_M2_MASK = 1620, PseudoVFNCVT_RM_F_X_W_M4_MASK = 1621, PseudoVFNCVT_RM_F_X_W_MF2_MASK = 1622, PseudoVFNCVT_RM_F_X_W_MF4_MASK = 1623, PseudoVFNCVT_RM_XU_F_W_M1_MASK = 1624, PseudoVFNCVT_RM_XU_F_W_M2_MASK = 1625, PseudoVFNCVT_RM_XU_F_W_M4_MASK = 1626, PseudoVFNCVT_RM_XU_F_W_MF2_MASK = 1627, PseudoVFNCVT_RM_XU_F_W_MF4_MASK = 1628, PseudoVFNCVT_RM_XU_F_W_MF8_MASK = 1629, PseudoVFNCVT_RM_X_F_W_M1_MASK = 1630, PseudoVFNCVT_RM_X_F_W_M2_MASK = 1631, PseudoVFNCVT_RM_X_F_W_M4_MASK = 1632, PseudoVFNCVT_RM_X_F_W_MF2_MASK = 1633, PseudoVFNCVT_RM_X_F_W_MF4_MASK = 1634, PseudoVFNCVT_RM_X_F_W_MF8_MASK = 1635, PseudoVFNCVT_ROD_F_F_W_M1 = 1636, PseudoVFNCVT_ROD_F_F_W_M1_MASK = 1637, PseudoVFNCVT_ROD_F_F_W_M1_TU = 1638, PseudoVFNCVT_ROD_F_F_W_M2 = 1639, PseudoVFNCVT_ROD_F_F_W_M2_MASK = 1640, PseudoVFNCVT_ROD_F_F_W_M2_TU = 1641, PseudoVFNCVT_ROD_F_F_W_M4 = 1642, PseudoVFNCVT_ROD_F_F_W_M4_MASK = 1643, PseudoVFNCVT_ROD_F_F_W_M4_TU = 1644, PseudoVFNCVT_ROD_F_F_W_MF2 = 1645, PseudoVFNCVT_ROD_F_F_W_MF2_MASK = 1646, PseudoVFNCVT_ROD_F_F_W_MF2_TU = 1647, PseudoVFNCVT_ROD_F_F_W_MF4 = 1648, PseudoVFNCVT_ROD_F_F_W_MF4_MASK = 1649, PseudoVFNCVT_ROD_F_F_W_MF4_TU = 1650, PseudoVFNCVT_RTZ_XU_F_W_M1 = 1651, PseudoVFNCVT_RTZ_XU_F_W_M1_MASK = 1652, PseudoVFNCVT_RTZ_XU_F_W_M1_TU = 1653, PseudoVFNCVT_RTZ_XU_F_W_M2 = 1654, PseudoVFNCVT_RTZ_XU_F_W_M2_MASK = 1655, PseudoVFNCVT_RTZ_XU_F_W_M2_TU = 1656, PseudoVFNCVT_RTZ_XU_F_W_M4 = 1657, PseudoVFNCVT_RTZ_XU_F_W_M4_MASK = 1658, PseudoVFNCVT_RTZ_XU_F_W_M4_TU = 1659, PseudoVFNCVT_RTZ_XU_F_W_MF2 = 1660, PseudoVFNCVT_RTZ_XU_F_W_MF2_MASK = 1661, PseudoVFNCVT_RTZ_XU_F_W_MF2_TU = 1662, PseudoVFNCVT_RTZ_XU_F_W_MF4 = 1663, PseudoVFNCVT_RTZ_XU_F_W_MF4_MASK = 1664, PseudoVFNCVT_RTZ_XU_F_W_MF4_TU = 1665, PseudoVFNCVT_RTZ_XU_F_W_MF8 = 1666, PseudoVFNCVT_RTZ_XU_F_W_MF8_MASK = 1667, PseudoVFNCVT_RTZ_XU_F_W_MF8_TU = 1668, PseudoVFNCVT_RTZ_X_F_W_M1 = 1669, PseudoVFNCVT_RTZ_X_F_W_M1_MASK = 1670, PseudoVFNCVT_RTZ_X_F_W_M1_TU = 1671, PseudoVFNCVT_RTZ_X_F_W_M2 = 1672, PseudoVFNCVT_RTZ_X_F_W_M2_MASK = 1673, PseudoVFNCVT_RTZ_X_F_W_M2_TU = 1674, PseudoVFNCVT_RTZ_X_F_W_M4 = 1675, PseudoVFNCVT_RTZ_X_F_W_M4_MASK = 1676, PseudoVFNCVT_RTZ_X_F_W_M4_TU = 1677, PseudoVFNCVT_RTZ_X_F_W_MF2 = 1678, PseudoVFNCVT_RTZ_X_F_W_MF2_MASK = 1679, PseudoVFNCVT_RTZ_X_F_W_MF2_TU = 1680, PseudoVFNCVT_RTZ_X_F_W_MF4 = 1681, PseudoVFNCVT_RTZ_X_F_W_MF4_MASK = 1682, PseudoVFNCVT_RTZ_X_F_W_MF4_TU = 1683, PseudoVFNCVT_RTZ_X_F_W_MF8 = 1684, PseudoVFNCVT_RTZ_X_F_W_MF8_MASK = 1685, PseudoVFNCVT_RTZ_X_F_W_MF8_TU = 1686, PseudoVFNCVT_XU_F_W_M1 = 1687, PseudoVFNCVT_XU_F_W_M1_MASK = 1688, PseudoVFNCVT_XU_F_W_M1_TU = 1689, PseudoVFNCVT_XU_F_W_M2 = 1690, PseudoVFNCVT_XU_F_W_M2_MASK = 1691, PseudoVFNCVT_XU_F_W_M2_TU = 1692, PseudoVFNCVT_XU_F_W_M4 = 1693, PseudoVFNCVT_XU_F_W_M4_MASK = 1694, PseudoVFNCVT_XU_F_W_M4_TU = 1695, PseudoVFNCVT_XU_F_W_MF2 = 1696, PseudoVFNCVT_XU_F_W_MF2_MASK = 1697, PseudoVFNCVT_XU_F_W_MF2_TU = 1698, PseudoVFNCVT_XU_F_W_MF4 = 1699, PseudoVFNCVT_XU_F_W_MF4_MASK = 1700, PseudoVFNCVT_XU_F_W_MF4_TU = 1701, PseudoVFNCVT_XU_F_W_MF8 = 1702, PseudoVFNCVT_XU_F_W_MF8_MASK = 1703, PseudoVFNCVT_XU_F_W_MF8_TU = 1704, PseudoVFNCVT_X_F_W_M1 = 1705, PseudoVFNCVT_X_F_W_M1_MASK = 1706, PseudoVFNCVT_X_F_W_M1_TU = 1707, PseudoVFNCVT_X_F_W_M2 = 1708, PseudoVFNCVT_X_F_W_M2_MASK = 1709, PseudoVFNCVT_X_F_W_M2_TU = 1710, PseudoVFNCVT_X_F_W_M4 = 1711, PseudoVFNCVT_X_F_W_M4_MASK = 1712, PseudoVFNCVT_X_F_W_M4_TU = 1713, PseudoVFNCVT_X_F_W_MF2 = 1714, PseudoVFNCVT_X_F_W_MF2_MASK = 1715, PseudoVFNCVT_X_F_W_MF2_TU = 1716, PseudoVFNCVT_X_F_W_MF4 = 1717, PseudoVFNCVT_X_F_W_MF4_MASK = 1718, PseudoVFNCVT_X_F_W_MF4_TU = 1719, PseudoVFNCVT_X_F_W_MF8 = 1720, PseudoVFNCVT_X_F_W_MF8_MASK = 1721, PseudoVFNCVT_X_F_W_MF8_TU = 1722, PseudoVFNMACC_VF16_M1 = 1723, PseudoVFNMACC_VF16_M1_MASK = 1724, PseudoVFNMACC_VF16_M2 = 1725, PseudoVFNMACC_VF16_M2_MASK = 1726, PseudoVFNMACC_VF16_M4 = 1727, PseudoVFNMACC_VF16_M4_MASK = 1728, PseudoVFNMACC_VF16_M8 = 1729, PseudoVFNMACC_VF16_M8_MASK = 1730, PseudoVFNMACC_VF16_MF2 = 1731, PseudoVFNMACC_VF16_MF2_MASK = 1732, PseudoVFNMACC_VF16_MF4 = 1733, PseudoVFNMACC_VF16_MF4_MASK = 1734, PseudoVFNMACC_VF32_M1 = 1735, PseudoVFNMACC_VF32_M1_MASK = 1736, PseudoVFNMACC_VF32_M2 = 1737, PseudoVFNMACC_VF32_M2_MASK = 1738, PseudoVFNMACC_VF32_M4 = 1739, PseudoVFNMACC_VF32_M4_MASK = 1740, PseudoVFNMACC_VF32_M8 = 1741, PseudoVFNMACC_VF32_M8_MASK = 1742, PseudoVFNMACC_VF32_MF2 = 1743, PseudoVFNMACC_VF32_MF2_MASK = 1744, PseudoVFNMACC_VF64_M1 = 1745, PseudoVFNMACC_VF64_M1_MASK = 1746, PseudoVFNMACC_VF64_M2 = 1747, PseudoVFNMACC_VF64_M2_MASK = 1748, PseudoVFNMACC_VF64_M4 = 1749, PseudoVFNMACC_VF64_M4_MASK = 1750, PseudoVFNMACC_VF64_M8 = 1751, PseudoVFNMACC_VF64_M8_MASK = 1752, PseudoVFNMACC_VV_M1 = 1753, PseudoVFNMACC_VV_M1_MASK = 1754, PseudoVFNMACC_VV_M2 = 1755, PseudoVFNMACC_VV_M2_MASK = 1756, PseudoVFNMACC_VV_M4 = 1757, PseudoVFNMACC_VV_M4_MASK = 1758, PseudoVFNMACC_VV_M8 = 1759, PseudoVFNMACC_VV_M8_MASK = 1760, PseudoVFNMACC_VV_MF2 = 1761, PseudoVFNMACC_VV_MF2_MASK = 1762, PseudoVFNMACC_VV_MF4 = 1763, PseudoVFNMACC_VV_MF4_MASK = 1764, PseudoVFNMADD_VF16_M1 = 1765, PseudoVFNMADD_VF16_M1_MASK = 1766, PseudoVFNMADD_VF16_M2 = 1767, PseudoVFNMADD_VF16_M2_MASK = 1768, PseudoVFNMADD_VF16_M4 = 1769, PseudoVFNMADD_VF16_M4_MASK = 1770, PseudoVFNMADD_VF16_M8 = 1771, PseudoVFNMADD_VF16_M8_MASK = 1772, PseudoVFNMADD_VF16_MF2 = 1773, PseudoVFNMADD_VF16_MF2_MASK = 1774, PseudoVFNMADD_VF16_MF4 = 1775, PseudoVFNMADD_VF16_MF4_MASK = 1776, PseudoVFNMADD_VF32_M1 = 1777, PseudoVFNMADD_VF32_M1_MASK = 1778, PseudoVFNMADD_VF32_M2 = 1779, PseudoVFNMADD_VF32_M2_MASK = 1780, PseudoVFNMADD_VF32_M4 = 1781, PseudoVFNMADD_VF32_M4_MASK = 1782, PseudoVFNMADD_VF32_M8 = 1783, PseudoVFNMADD_VF32_M8_MASK = 1784, PseudoVFNMADD_VF32_MF2 = 1785, PseudoVFNMADD_VF32_MF2_MASK = 1786, PseudoVFNMADD_VF64_M1 = 1787, PseudoVFNMADD_VF64_M1_MASK = 1788, PseudoVFNMADD_VF64_M2 = 1789, PseudoVFNMADD_VF64_M2_MASK = 1790, PseudoVFNMADD_VF64_M4 = 1791, PseudoVFNMADD_VF64_M4_MASK = 1792, PseudoVFNMADD_VF64_M8 = 1793, PseudoVFNMADD_VF64_M8_MASK = 1794, PseudoVFNMADD_VV_M1 = 1795, PseudoVFNMADD_VV_M1_MASK = 1796, PseudoVFNMADD_VV_M2 = 1797, PseudoVFNMADD_VV_M2_MASK = 1798, PseudoVFNMADD_VV_M4 = 1799, PseudoVFNMADD_VV_M4_MASK = 1800, PseudoVFNMADD_VV_M8 = 1801, PseudoVFNMADD_VV_M8_MASK = 1802, PseudoVFNMADD_VV_MF2 = 1803, PseudoVFNMADD_VV_MF2_MASK = 1804, PseudoVFNMADD_VV_MF4 = 1805, PseudoVFNMADD_VV_MF4_MASK = 1806, PseudoVFNMSAC_VF16_M1 = 1807, PseudoVFNMSAC_VF16_M1_MASK = 1808, PseudoVFNMSAC_VF16_M2 = 1809, PseudoVFNMSAC_VF16_M2_MASK = 1810, PseudoVFNMSAC_VF16_M4 = 1811, PseudoVFNMSAC_VF16_M4_MASK = 1812, PseudoVFNMSAC_VF16_M8 = 1813, PseudoVFNMSAC_VF16_M8_MASK = 1814, PseudoVFNMSAC_VF16_MF2 = 1815, PseudoVFNMSAC_VF16_MF2_MASK = 1816, PseudoVFNMSAC_VF16_MF4 = 1817, PseudoVFNMSAC_VF16_MF4_MASK = 1818, PseudoVFNMSAC_VF32_M1 = 1819, PseudoVFNMSAC_VF32_M1_MASK = 1820, PseudoVFNMSAC_VF32_M2 = 1821, PseudoVFNMSAC_VF32_M2_MASK = 1822, PseudoVFNMSAC_VF32_M4 = 1823, PseudoVFNMSAC_VF32_M4_MASK = 1824, PseudoVFNMSAC_VF32_M8 = 1825, PseudoVFNMSAC_VF32_M8_MASK = 1826, PseudoVFNMSAC_VF32_MF2 = 1827, PseudoVFNMSAC_VF32_MF2_MASK = 1828, PseudoVFNMSAC_VF64_M1 = 1829, PseudoVFNMSAC_VF64_M1_MASK = 1830, PseudoVFNMSAC_VF64_M2 = 1831, PseudoVFNMSAC_VF64_M2_MASK = 1832, PseudoVFNMSAC_VF64_M4 = 1833, PseudoVFNMSAC_VF64_M4_MASK = 1834, PseudoVFNMSAC_VF64_M8 = 1835, PseudoVFNMSAC_VF64_M8_MASK = 1836, PseudoVFNMSAC_VV_M1 = 1837, PseudoVFNMSAC_VV_M1_MASK = 1838, PseudoVFNMSAC_VV_M2 = 1839, PseudoVFNMSAC_VV_M2_MASK = 1840, PseudoVFNMSAC_VV_M4 = 1841, PseudoVFNMSAC_VV_M4_MASK = 1842, PseudoVFNMSAC_VV_M8 = 1843, PseudoVFNMSAC_VV_M8_MASK = 1844, PseudoVFNMSAC_VV_MF2 = 1845, PseudoVFNMSAC_VV_MF2_MASK = 1846, PseudoVFNMSAC_VV_MF4 = 1847, PseudoVFNMSAC_VV_MF4_MASK = 1848, PseudoVFNMSUB_VF16_M1 = 1849, PseudoVFNMSUB_VF16_M1_MASK = 1850, PseudoVFNMSUB_VF16_M2 = 1851, PseudoVFNMSUB_VF16_M2_MASK = 1852, PseudoVFNMSUB_VF16_M4 = 1853, PseudoVFNMSUB_VF16_M4_MASK = 1854, PseudoVFNMSUB_VF16_M8 = 1855, PseudoVFNMSUB_VF16_M8_MASK = 1856, PseudoVFNMSUB_VF16_MF2 = 1857, PseudoVFNMSUB_VF16_MF2_MASK = 1858, PseudoVFNMSUB_VF16_MF4 = 1859, PseudoVFNMSUB_VF16_MF4_MASK = 1860, PseudoVFNMSUB_VF32_M1 = 1861, PseudoVFNMSUB_VF32_M1_MASK = 1862, PseudoVFNMSUB_VF32_M2 = 1863, PseudoVFNMSUB_VF32_M2_MASK = 1864, PseudoVFNMSUB_VF32_M4 = 1865, PseudoVFNMSUB_VF32_M4_MASK = 1866, PseudoVFNMSUB_VF32_M8 = 1867, PseudoVFNMSUB_VF32_M8_MASK = 1868, PseudoVFNMSUB_VF32_MF2 = 1869, PseudoVFNMSUB_VF32_MF2_MASK = 1870, PseudoVFNMSUB_VF64_M1 = 1871, PseudoVFNMSUB_VF64_M1_MASK = 1872, PseudoVFNMSUB_VF64_M2 = 1873, PseudoVFNMSUB_VF64_M2_MASK = 1874, PseudoVFNMSUB_VF64_M4 = 1875, PseudoVFNMSUB_VF64_M4_MASK = 1876, PseudoVFNMSUB_VF64_M8 = 1877, PseudoVFNMSUB_VF64_M8_MASK = 1878, PseudoVFNMSUB_VV_M1 = 1879, PseudoVFNMSUB_VV_M1_MASK = 1880, PseudoVFNMSUB_VV_M2 = 1881, PseudoVFNMSUB_VV_M2_MASK = 1882, PseudoVFNMSUB_VV_M4 = 1883, PseudoVFNMSUB_VV_M4_MASK = 1884, PseudoVFNMSUB_VV_M8 = 1885, PseudoVFNMSUB_VV_M8_MASK = 1886, PseudoVFNMSUB_VV_MF2 = 1887, PseudoVFNMSUB_VV_MF2_MASK = 1888, PseudoVFNMSUB_VV_MF4 = 1889, PseudoVFNMSUB_VV_MF4_MASK = 1890, PseudoVFRDIV_VF16_M1 = 1891, PseudoVFRDIV_VF16_M1_MASK = 1892, PseudoVFRDIV_VF16_M1_TU = 1893, PseudoVFRDIV_VF16_M2 = 1894, PseudoVFRDIV_VF16_M2_MASK = 1895, PseudoVFRDIV_VF16_M2_TU = 1896, PseudoVFRDIV_VF16_M4 = 1897, PseudoVFRDIV_VF16_M4_MASK = 1898, PseudoVFRDIV_VF16_M4_TU = 1899, PseudoVFRDIV_VF16_M8 = 1900, PseudoVFRDIV_VF16_M8_MASK = 1901, PseudoVFRDIV_VF16_M8_TU = 1902, PseudoVFRDIV_VF16_MF2 = 1903, PseudoVFRDIV_VF16_MF2_MASK = 1904, PseudoVFRDIV_VF16_MF2_TU = 1905, PseudoVFRDIV_VF16_MF4 = 1906, PseudoVFRDIV_VF16_MF4_MASK = 1907, PseudoVFRDIV_VF16_MF4_TU = 1908, PseudoVFRDIV_VF32_M1 = 1909, PseudoVFRDIV_VF32_M1_MASK = 1910, PseudoVFRDIV_VF32_M1_TU = 1911, PseudoVFRDIV_VF32_M2 = 1912, PseudoVFRDIV_VF32_M2_MASK = 1913, PseudoVFRDIV_VF32_M2_TU = 1914, PseudoVFRDIV_VF32_M4 = 1915, PseudoVFRDIV_VF32_M4_MASK = 1916, PseudoVFRDIV_VF32_M4_TU = 1917, PseudoVFRDIV_VF32_M8 = 1918, PseudoVFRDIV_VF32_M8_MASK = 1919, PseudoVFRDIV_VF32_M8_TU = 1920, PseudoVFRDIV_VF32_MF2 = 1921, PseudoVFRDIV_VF32_MF2_MASK = 1922, PseudoVFRDIV_VF32_MF2_TU = 1923, PseudoVFRDIV_VF64_M1 = 1924, PseudoVFRDIV_VF64_M1_MASK = 1925, PseudoVFRDIV_VF64_M1_TU = 1926, PseudoVFRDIV_VF64_M2 = 1927, PseudoVFRDIV_VF64_M2_MASK = 1928, PseudoVFRDIV_VF64_M2_TU = 1929, PseudoVFRDIV_VF64_M4 = 1930, PseudoVFRDIV_VF64_M4_MASK = 1931, PseudoVFRDIV_VF64_M4_TU = 1932, PseudoVFRDIV_VF64_M8 = 1933, PseudoVFRDIV_VF64_M8_MASK = 1934, PseudoVFRDIV_VF64_M8_TU = 1935, PseudoVFREC7_V_M1 = 1936, PseudoVFREC7_V_M1_MASK = 1937, PseudoVFREC7_V_M1_TU = 1938, PseudoVFREC7_V_M2 = 1939, PseudoVFREC7_V_M2_MASK = 1940, PseudoVFREC7_V_M2_TU = 1941, PseudoVFREC7_V_M4 = 1942, PseudoVFREC7_V_M4_MASK = 1943, PseudoVFREC7_V_M4_TU = 1944, PseudoVFREC7_V_M8 = 1945, PseudoVFREC7_V_M8_MASK = 1946, PseudoVFREC7_V_M8_TU = 1947, PseudoVFREC7_V_MF2 = 1948, PseudoVFREC7_V_MF2_MASK = 1949, PseudoVFREC7_V_MF2_TU = 1950, PseudoVFREC7_V_MF4 = 1951, PseudoVFREC7_V_MF4_MASK = 1952, PseudoVFREC7_V_MF4_TU = 1953, PseudoVFREDMAX_VS_M1 = 1954, PseudoVFREDMAX_VS_M1_MASK = 1955, PseudoVFREDMAX_VS_M2 = 1956, PseudoVFREDMAX_VS_M2_MASK = 1957, PseudoVFREDMAX_VS_M4 = 1958, PseudoVFREDMAX_VS_M4_MASK = 1959, PseudoVFREDMAX_VS_M8 = 1960, PseudoVFREDMAX_VS_M8_MASK = 1961, PseudoVFREDMAX_VS_MF2 = 1962, PseudoVFREDMAX_VS_MF2_MASK = 1963, PseudoVFREDMAX_VS_MF4 = 1964, PseudoVFREDMAX_VS_MF4_MASK = 1965, PseudoVFREDMIN_VS_M1 = 1966, PseudoVFREDMIN_VS_M1_MASK = 1967, PseudoVFREDMIN_VS_M2 = 1968, PseudoVFREDMIN_VS_M2_MASK = 1969, PseudoVFREDMIN_VS_M4 = 1970, PseudoVFREDMIN_VS_M4_MASK = 1971, PseudoVFREDMIN_VS_M8 = 1972, PseudoVFREDMIN_VS_M8_MASK = 1973, PseudoVFREDMIN_VS_MF2 = 1974, PseudoVFREDMIN_VS_MF2_MASK = 1975, PseudoVFREDMIN_VS_MF4 = 1976, PseudoVFREDMIN_VS_MF4_MASK = 1977, PseudoVFREDOSUM_VS_M1 = 1978, PseudoVFREDOSUM_VS_M1_MASK = 1979, PseudoVFREDOSUM_VS_M2 = 1980, PseudoVFREDOSUM_VS_M2_MASK = 1981, PseudoVFREDOSUM_VS_M4 = 1982, PseudoVFREDOSUM_VS_M4_MASK = 1983, PseudoVFREDOSUM_VS_M8 = 1984, PseudoVFREDOSUM_VS_M8_MASK = 1985, PseudoVFREDOSUM_VS_MF2 = 1986, PseudoVFREDOSUM_VS_MF2_MASK = 1987, PseudoVFREDOSUM_VS_MF4 = 1988, PseudoVFREDOSUM_VS_MF4_MASK = 1989, PseudoVFREDUSUM_VS_M1 = 1990, PseudoVFREDUSUM_VS_M1_MASK = 1991, PseudoVFREDUSUM_VS_M2 = 1992, PseudoVFREDUSUM_VS_M2_MASK = 1993, PseudoVFREDUSUM_VS_M4 = 1994, PseudoVFREDUSUM_VS_M4_MASK = 1995, PseudoVFREDUSUM_VS_M8 = 1996, PseudoVFREDUSUM_VS_M8_MASK = 1997, PseudoVFREDUSUM_VS_MF2 = 1998, PseudoVFREDUSUM_VS_MF2_MASK = 1999, PseudoVFREDUSUM_VS_MF4 = 2000, PseudoVFREDUSUM_VS_MF4_MASK = 2001, PseudoVFROUND_NOEXCEPT_V_M1_MASK = 2002, PseudoVFROUND_NOEXCEPT_V_M2_MASK = 2003, PseudoVFROUND_NOEXCEPT_V_M4_MASK = 2004, PseudoVFROUND_NOEXCEPT_V_M8_MASK = 2005, PseudoVFROUND_NOEXCEPT_V_MF2_MASK = 2006, PseudoVFROUND_NOEXCEPT_V_MF4_MASK = 2007, PseudoVFRSQRT7_V_M1 = 2008, PseudoVFRSQRT7_V_M1_MASK = 2009, PseudoVFRSQRT7_V_M1_TU = 2010, PseudoVFRSQRT7_V_M2 = 2011, PseudoVFRSQRT7_V_M2_MASK = 2012, PseudoVFRSQRT7_V_M2_TU = 2013, PseudoVFRSQRT7_V_M4 = 2014, PseudoVFRSQRT7_V_M4_MASK = 2015, PseudoVFRSQRT7_V_M4_TU = 2016, PseudoVFRSQRT7_V_M8 = 2017, PseudoVFRSQRT7_V_M8_MASK = 2018, PseudoVFRSQRT7_V_M8_TU = 2019, PseudoVFRSQRT7_V_MF2 = 2020, PseudoVFRSQRT7_V_MF2_MASK = 2021, PseudoVFRSQRT7_V_MF2_TU = 2022, PseudoVFRSQRT7_V_MF4 = 2023, PseudoVFRSQRT7_V_MF4_MASK = 2024, PseudoVFRSQRT7_V_MF4_TU = 2025, PseudoVFRSUB_VF16_M1 = 2026, PseudoVFRSUB_VF16_M1_MASK = 2027, PseudoVFRSUB_VF16_M1_TU = 2028, PseudoVFRSUB_VF16_M2 = 2029, PseudoVFRSUB_VF16_M2_MASK = 2030, PseudoVFRSUB_VF16_M2_TU = 2031, PseudoVFRSUB_VF16_M4 = 2032, PseudoVFRSUB_VF16_M4_MASK = 2033, PseudoVFRSUB_VF16_M4_TU = 2034, PseudoVFRSUB_VF16_M8 = 2035, PseudoVFRSUB_VF16_M8_MASK = 2036, PseudoVFRSUB_VF16_M8_TU = 2037, PseudoVFRSUB_VF16_MF2 = 2038, PseudoVFRSUB_VF16_MF2_MASK = 2039, PseudoVFRSUB_VF16_MF2_TU = 2040, PseudoVFRSUB_VF16_MF4 = 2041, PseudoVFRSUB_VF16_MF4_MASK = 2042, PseudoVFRSUB_VF16_MF4_TU = 2043, PseudoVFRSUB_VF32_M1 = 2044, PseudoVFRSUB_VF32_M1_MASK = 2045, PseudoVFRSUB_VF32_M1_TU = 2046, PseudoVFRSUB_VF32_M2 = 2047, PseudoVFRSUB_VF32_M2_MASK = 2048, PseudoVFRSUB_VF32_M2_TU = 2049, PseudoVFRSUB_VF32_M4 = 2050, PseudoVFRSUB_VF32_M4_MASK = 2051, PseudoVFRSUB_VF32_M4_TU = 2052, PseudoVFRSUB_VF32_M8 = 2053, PseudoVFRSUB_VF32_M8_MASK = 2054, PseudoVFRSUB_VF32_M8_TU = 2055, PseudoVFRSUB_VF32_MF2 = 2056, PseudoVFRSUB_VF32_MF2_MASK = 2057, PseudoVFRSUB_VF32_MF2_TU = 2058, PseudoVFRSUB_VF64_M1 = 2059, PseudoVFRSUB_VF64_M1_MASK = 2060, PseudoVFRSUB_VF64_M1_TU = 2061, PseudoVFRSUB_VF64_M2 = 2062, PseudoVFRSUB_VF64_M2_MASK = 2063, PseudoVFRSUB_VF64_M2_TU = 2064, PseudoVFRSUB_VF64_M4 = 2065, PseudoVFRSUB_VF64_M4_MASK = 2066, PseudoVFRSUB_VF64_M4_TU = 2067, PseudoVFRSUB_VF64_M8 = 2068, PseudoVFRSUB_VF64_M8_MASK = 2069, PseudoVFRSUB_VF64_M8_TU = 2070, PseudoVFSGNJN_VF16_M1 = 2071, PseudoVFSGNJN_VF16_M1_MASK = 2072, PseudoVFSGNJN_VF16_M1_TU = 2073, PseudoVFSGNJN_VF16_M2 = 2074, PseudoVFSGNJN_VF16_M2_MASK = 2075, PseudoVFSGNJN_VF16_M2_TU = 2076, PseudoVFSGNJN_VF16_M4 = 2077, PseudoVFSGNJN_VF16_M4_MASK = 2078, PseudoVFSGNJN_VF16_M4_TU = 2079, PseudoVFSGNJN_VF16_M8 = 2080, PseudoVFSGNJN_VF16_M8_MASK = 2081, PseudoVFSGNJN_VF16_M8_TU = 2082, PseudoVFSGNJN_VF16_MF2 = 2083, PseudoVFSGNJN_VF16_MF2_MASK = 2084, PseudoVFSGNJN_VF16_MF2_TU = 2085, PseudoVFSGNJN_VF16_MF4 = 2086, PseudoVFSGNJN_VF16_MF4_MASK = 2087, PseudoVFSGNJN_VF16_MF4_TU = 2088, PseudoVFSGNJN_VF32_M1 = 2089, PseudoVFSGNJN_VF32_M1_MASK = 2090, PseudoVFSGNJN_VF32_M1_TU = 2091, PseudoVFSGNJN_VF32_M2 = 2092, PseudoVFSGNJN_VF32_M2_MASK = 2093, PseudoVFSGNJN_VF32_M2_TU = 2094, PseudoVFSGNJN_VF32_M4 = 2095, PseudoVFSGNJN_VF32_M4_MASK = 2096, PseudoVFSGNJN_VF32_M4_TU = 2097, PseudoVFSGNJN_VF32_M8 = 2098, PseudoVFSGNJN_VF32_M8_MASK = 2099, PseudoVFSGNJN_VF32_M8_TU = 2100, PseudoVFSGNJN_VF32_MF2 = 2101, PseudoVFSGNJN_VF32_MF2_MASK = 2102, PseudoVFSGNJN_VF32_MF2_TU = 2103, PseudoVFSGNJN_VF64_M1 = 2104, PseudoVFSGNJN_VF64_M1_MASK = 2105, PseudoVFSGNJN_VF64_M1_TU = 2106, PseudoVFSGNJN_VF64_M2 = 2107, PseudoVFSGNJN_VF64_M2_MASK = 2108, PseudoVFSGNJN_VF64_M2_TU = 2109, PseudoVFSGNJN_VF64_M4 = 2110, PseudoVFSGNJN_VF64_M4_MASK = 2111, PseudoVFSGNJN_VF64_M4_TU = 2112, PseudoVFSGNJN_VF64_M8 = 2113, PseudoVFSGNJN_VF64_M8_MASK = 2114, PseudoVFSGNJN_VF64_M8_TU = 2115, PseudoVFSGNJN_VV_M1 = 2116, PseudoVFSGNJN_VV_M1_MASK = 2117, PseudoVFSGNJN_VV_M1_TU = 2118, PseudoVFSGNJN_VV_M2 = 2119, PseudoVFSGNJN_VV_M2_MASK = 2120, PseudoVFSGNJN_VV_M2_TU = 2121, PseudoVFSGNJN_VV_M4 = 2122, PseudoVFSGNJN_VV_M4_MASK = 2123, PseudoVFSGNJN_VV_M4_TU = 2124, PseudoVFSGNJN_VV_M8 = 2125, PseudoVFSGNJN_VV_M8_MASK = 2126, PseudoVFSGNJN_VV_M8_TU = 2127, PseudoVFSGNJN_VV_MF2 = 2128, PseudoVFSGNJN_VV_MF2_MASK = 2129, PseudoVFSGNJN_VV_MF2_TU = 2130, PseudoVFSGNJN_VV_MF4 = 2131, PseudoVFSGNJN_VV_MF4_MASK = 2132, PseudoVFSGNJN_VV_MF4_TU = 2133, PseudoVFSGNJX_VF16_M1 = 2134, PseudoVFSGNJX_VF16_M1_MASK = 2135, PseudoVFSGNJX_VF16_M1_TU = 2136, PseudoVFSGNJX_VF16_M2 = 2137, PseudoVFSGNJX_VF16_M2_MASK = 2138, PseudoVFSGNJX_VF16_M2_TU = 2139, PseudoVFSGNJX_VF16_M4 = 2140, PseudoVFSGNJX_VF16_M4_MASK = 2141, PseudoVFSGNJX_VF16_M4_TU = 2142, PseudoVFSGNJX_VF16_M8 = 2143, PseudoVFSGNJX_VF16_M8_MASK = 2144, PseudoVFSGNJX_VF16_M8_TU = 2145, PseudoVFSGNJX_VF16_MF2 = 2146, PseudoVFSGNJX_VF16_MF2_MASK = 2147, PseudoVFSGNJX_VF16_MF2_TU = 2148, PseudoVFSGNJX_VF16_MF4 = 2149, PseudoVFSGNJX_VF16_MF4_MASK = 2150, PseudoVFSGNJX_VF16_MF4_TU = 2151, PseudoVFSGNJX_VF32_M1 = 2152, PseudoVFSGNJX_VF32_M1_MASK = 2153, PseudoVFSGNJX_VF32_M1_TU = 2154, PseudoVFSGNJX_VF32_M2 = 2155, PseudoVFSGNJX_VF32_M2_MASK = 2156, PseudoVFSGNJX_VF32_M2_TU = 2157, PseudoVFSGNJX_VF32_M4 = 2158, PseudoVFSGNJX_VF32_M4_MASK = 2159, PseudoVFSGNJX_VF32_M4_TU = 2160, PseudoVFSGNJX_VF32_M8 = 2161, PseudoVFSGNJX_VF32_M8_MASK = 2162, PseudoVFSGNJX_VF32_M8_TU = 2163, PseudoVFSGNJX_VF32_MF2 = 2164, PseudoVFSGNJX_VF32_MF2_MASK = 2165, PseudoVFSGNJX_VF32_MF2_TU = 2166, PseudoVFSGNJX_VF64_M1 = 2167, PseudoVFSGNJX_VF64_M1_MASK = 2168, PseudoVFSGNJX_VF64_M1_TU = 2169, PseudoVFSGNJX_VF64_M2 = 2170, PseudoVFSGNJX_VF64_M2_MASK = 2171, PseudoVFSGNJX_VF64_M2_TU = 2172, PseudoVFSGNJX_VF64_M4 = 2173, PseudoVFSGNJX_VF64_M4_MASK = 2174, PseudoVFSGNJX_VF64_M4_TU = 2175, PseudoVFSGNJX_VF64_M8 = 2176, PseudoVFSGNJX_VF64_M8_MASK = 2177, PseudoVFSGNJX_VF64_M8_TU = 2178, PseudoVFSGNJX_VV_M1 = 2179, PseudoVFSGNJX_VV_M1_MASK = 2180, PseudoVFSGNJX_VV_M1_TU = 2181, PseudoVFSGNJX_VV_M2 = 2182, PseudoVFSGNJX_VV_M2_MASK = 2183, PseudoVFSGNJX_VV_M2_TU = 2184, PseudoVFSGNJX_VV_M4 = 2185, PseudoVFSGNJX_VV_M4_MASK = 2186, PseudoVFSGNJX_VV_M4_TU = 2187, PseudoVFSGNJX_VV_M8 = 2188, PseudoVFSGNJX_VV_M8_MASK = 2189, PseudoVFSGNJX_VV_M8_TU = 2190, PseudoVFSGNJX_VV_MF2 = 2191, PseudoVFSGNJX_VV_MF2_MASK = 2192, PseudoVFSGNJX_VV_MF2_TU = 2193, PseudoVFSGNJX_VV_MF4 = 2194, PseudoVFSGNJX_VV_MF4_MASK = 2195, PseudoVFSGNJX_VV_MF4_TU = 2196, PseudoVFSGNJ_VF16_M1 = 2197, PseudoVFSGNJ_VF16_M1_MASK = 2198, PseudoVFSGNJ_VF16_M1_TU = 2199, PseudoVFSGNJ_VF16_M2 = 2200, PseudoVFSGNJ_VF16_M2_MASK = 2201, PseudoVFSGNJ_VF16_M2_TU = 2202, PseudoVFSGNJ_VF16_M4 = 2203, PseudoVFSGNJ_VF16_M4_MASK = 2204, PseudoVFSGNJ_VF16_M4_TU = 2205, PseudoVFSGNJ_VF16_M8 = 2206, PseudoVFSGNJ_VF16_M8_MASK = 2207, PseudoVFSGNJ_VF16_M8_TU = 2208, PseudoVFSGNJ_VF16_MF2 = 2209, PseudoVFSGNJ_VF16_MF2_MASK = 2210, PseudoVFSGNJ_VF16_MF2_TU = 2211, PseudoVFSGNJ_VF16_MF4 = 2212, PseudoVFSGNJ_VF16_MF4_MASK = 2213, PseudoVFSGNJ_VF16_MF4_TU = 2214, PseudoVFSGNJ_VF32_M1 = 2215, PseudoVFSGNJ_VF32_M1_MASK = 2216, PseudoVFSGNJ_VF32_M1_TU = 2217, PseudoVFSGNJ_VF32_M2 = 2218, PseudoVFSGNJ_VF32_M2_MASK = 2219, PseudoVFSGNJ_VF32_M2_TU = 2220, PseudoVFSGNJ_VF32_M4 = 2221, PseudoVFSGNJ_VF32_M4_MASK = 2222, PseudoVFSGNJ_VF32_M4_TU = 2223, PseudoVFSGNJ_VF32_M8 = 2224, PseudoVFSGNJ_VF32_M8_MASK = 2225, PseudoVFSGNJ_VF32_M8_TU = 2226, PseudoVFSGNJ_VF32_MF2 = 2227, PseudoVFSGNJ_VF32_MF2_MASK = 2228, PseudoVFSGNJ_VF32_MF2_TU = 2229, PseudoVFSGNJ_VF64_M1 = 2230, PseudoVFSGNJ_VF64_M1_MASK = 2231, PseudoVFSGNJ_VF64_M1_TU = 2232, PseudoVFSGNJ_VF64_M2 = 2233, PseudoVFSGNJ_VF64_M2_MASK = 2234, PseudoVFSGNJ_VF64_M2_TU = 2235, PseudoVFSGNJ_VF64_M4 = 2236, PseudoVFSGNJ_VF64_M4_MASK = 2237, PseudoVFSGNJ_VF64_M4_TU = 2238, PseudoVFSGNJ_VF64_M8 = 2239, PseudoVFSGNJ_VF64_M8_MASK = 2240, PseudoVFSGNJ_VF64_M8_TU = 2241, PseudoVFSGNJ_VV_M1 = 2242, PseudoVFSGNJ_VV_M1_MASK = 2243, PseudoVFSGNJ_VV_M1_TU = 2244, PseudoVFSGNJ_VV_M2 = 2245, PseudoVFSGNJ_VV_M2_MASK = 2246, PseudoVFSGNJ_VV_M2_TU = 2247, PseudoVFSGNJ_VV_M4 = 2248, PseudoVFSGNJ_VV_M4_MASK = 2249, PseudoVFSGNJ_VV_M4_TU = 2250, PseudoVFSGNJ_VV_M8 = 2251, PseudoVFSGNJ_VV_M8_MASK = 2252, PseudoVFSGNJ_VV_M8_TU = 2253, PseudoVFSGNJ_VV_MF2 = 2254, PseudoVFSGNJ_VV_MF2_MASK = 2255, PseudoVFSGNJ_VV_MF2_TU = 2256, PseudoVFSGNJ_VV_MF4 = 2257, PseudoVFSGNJ_VV_MF4_MASK = 2258, PseudoVFSGNJ_VV_MF4_TU = 2259, PseudoVFSLIDE1DOWN_VF16_M1 = 2260, PseudoVFSLIDE1DOWN_VF16_M1_MASK = 2261, PseudoVFSLIDE1DOWN_VF16_M1_TU = 2262, PseudoVFSLIDE1DOWN_VF16_M2 = 2263, PseudoVFSLIDE1DOWN_VF16_M2_MASK = 2264, PseudoVFSLIDE1DOWN_VF16_M2_TU = 2265, PseudoVFSLIDE1DOWN_VF16_M4 = 2266, PseudoVFSLIDE1DOWN_VF16_M4_MASK = 2267, PseudoVFSLIDE1DOWN_VF16_M4_TU = 2268, PseudoVFSLIDE1DOWN_VF16_M8 = 2269, PseudoVFSLIDE1DOWN_VF16_M8_MASK = 2270, PseudoVFSLIDE1DOWN_VF16_M8_TU = 2271, PseudoVFSLIDE1DOWN_VF16_MF2 = 2272, PseudoVFSLIDE1DOWN_VF16_MF2_MASK = 2273, PseudoVFSLIDE1DOWN_VF16_MF2_TU = 2274, PseudoVFSLIDE1DOWN_VF16_MF4 = 2275, PseudoVFSLIDE1DOWN_VF16_MF4_MASK = 2276, PseudoVFSLIDE1DOWN_VF16_MF4_TU = 2277, PseudoVFSLIDE1DOWN_VF32_M1 = 2278, PseudoVFSLIDE1DOWN_VF32_M1_MASK = 2279, PseudoVFSLIDE1DOWN_VF32_M1_TU = 2280, PseudoVFSLIDE1DOWN_VF32_M2 = 2281, PseudoVFSLIDE1DOWN_VF32_M2_MASK = 2282, PseudoVFSLIDE1DOWN_VF32_M2_TU = 2283, PseudoVFSLIDE1DOWN_VF32_M4 = 2284, PseudoVFSLIDE1DOWN_VF32_M4_MASK = 2285, PseudoVFSLIDE1DOWN_VF32_M4_TU = 2286, PseudoVFSLIDE1DOWN_VF32_M8 = 2287, PseudoVFSLIDE1DOWN_VF32_M8_MASK = 2288, PseudoVFSLIDE1DOWN_VF32_M8_TU = 2289, PseudoVFSLIDE1DOWN_VF32_MF2 = 2290, PseudoVFSLIDE1DOWN_VF32_MF2_MASK = 2291, PseudoVFSLIDE1DOWN_VF32_MF2_TU = 2292, PseudoVFSLIDE1DOWN_VF64_M1 = 2293, PseudoVFSLIDE1DOWN_VF64_M1_MASK = 2294, PseudoVFSLIDE1DOWN_VF64_M1_TU = 2295, PseudoVFSLIDE1DOWN_VF64_M2 = 2296, PseudoVFSLIDE1DOWN_VF64_M2_MASK = 2297, PseudoVFSLIDE1DOWN_VF64_M2_TU = 2298, PseudoVFSLIDE1DOWN_VF64_M4 = 2299, PseudoVFSLIDE1DOWN_VF64_M4_MASK = 2300, PseudoVFSLIDE1DOWN_VF64_M4_TU = 2301, PseudoVFSLIDE1DOWN_VF64_M8 = 2302, PseudoVFSLIDE1DOWN_VF64_M8_MASK = 2303, PseudoVFSLIDE1DOWN_VF64_M8_TU = 2304, PseudoVFSLIDE1UP_VF16_M1 = 2305, PseudoVFSLIDE1UP_VF16_M1_MASK = 2306, PseudoVFSLIDE1UP_VF16_M1_TU = 2307, PseudoVFSLIDE1UP_VF16_M2 = 2308, PseudoVFSLIDE1UP_VF16_M2_MASK = 2309, PseudoVFSLIDE1UP_VF16_M2_TU = 2310, PseudoVFSLIDE1UP_VF16_M4 = 2311, PseudoVFSLIDE1UP_VF16_M4_MASK = 2312, PseudoVFSLIDE1UP_VF16_M4_TU = 2313, PseudoVFSLIDE1UP_VF16_M8 = 2314, PseudoVFSLIDE1UP_VF16_M8_MASK = 2315, PseudoVFSLIDE1UP_VF16_M8_TU = 2316, PseudoVFSLIDE1UP_VF16_MF2 = 2317, PseudoVFSLIDE1UP_VF16_MF2_MASK = 2318, PseudoVFSLIDE1UP_VF16_MF2_TU = 2319, PseudoVFSLIDE1UP_VF16_MF4 = 2320, PseudoVFSLIDE1UP_VF16_MF4_MASK = 2321, PseudoVFSLIDE1UP_VF16_MF4_TU = 2322, PseudoVFSLIDE1UP_VF32_M1 = 2323, PseudoVFSLIDE1UP_VF32_M1_MASK = 2324, PseudoVFSLIDE1UP_VF32_M1_TU = 2325, PseudoVFSLIDE1UP_VF32_M2 = 2326, PseudoVFSLIDE1UP_VF32_M2_MASK = 2327, PseudoVFSLIDE1UP_VF32_M2_TU = 2328, PseudoVFSLIDE1UP_VF32_M4 = 2329, PseudoVFSLIDE1UP_VF32_M4_MASK = 2330, PseudoVFSLIDE1UP_VF32_M4_TU = 2331, PseudoVFSLIDE1UP_VF32_M8 = 2332, PseudoVFSLIDE1UP_VF32_M8_MASK = 2333, PseudoVFSLIDE1UP_VF32_M8_TU = 2334, PseudoVFSLIDE1UP_VF32_MF2 = 2335, PseudoVFSLIDE1UP_VF32_MF2_MASK = 2336, PseudoVFSLIDE1UP_VF32_MF2_TU = 2337, PseudoVFSLIDE1UP_VF64_M1 = 2338, PseudoVFSLIDE1UP_VF64_M1_MASK = 2339, PseudoVFSLIDE1UP_VF64_M1_TU = 2340, PseudoVFSLIDE1UP_VF64_M2 = 2341, PseudoVFSLIDE1UP_VF64_M2_MASK = 2342, PseudoVFSLIDE1UP_VF64_M2_TU = 2343, PseudoVFSLIDE1UP_VF64_M4 = 2344, PseudoVFSLIDE1UP_VF64_M4_MASK = 2345, PseudoVFSLIDE1UP_VF64_M4_TU = 2346, PseudoVFSLIDE1UP_VF64_M8 = 2347, PseudoVFSLIDE1UP_VF64_M8_MASK = 2348, PseudoVFSLIDE1UP_VF64_M8_TU = 2349, PseudoVFSQRT_V_M1 = 2350, PseudoVFSQRT_V_M1_MASK = 2351, PseudoVFSQRT_V_M1_TU = 2352, PseudoVFSQRT_V_M2 = 2353, PseudoVFSQRT_V_M2_MASK = 2354, PseudoVFSQRT_V_M2_TU = 2355, PseudoVFSQRT_V_M4 = 2356, PseudoVFSQRT_V_M4_MASK = 2357, PseudoVFSQRT_V_M4_TU = 2358, PseudoVFSQRT_V_M8 = 2359, PseudoVFSQRT_V_M8_MASK = 2360, PseudoVFSQRT_V_M8_TU = 2361, PseudoVFSQRT_V_MF2 = 2362, PseudoVFSQRT_V_MF2_MASK = 2363, PseudoVFSQRT_V_MF2_TU = 2364, PseudoVFSQRT_V_MF4 = 2365, PseudoVFSQRT_V_MF4_MASK = 2366, PseudoVFSQRT_V_MF4_TU = 2367, PseudoVFSUB_VF16_M1 = 2368, PseudoVFSUB_VF16_M1_MASK = 2369, PseudoVFSUB_VF16_M1_TU = 2370, PseudoVFSUB_VF16_M2 = 2371, PseudoVFSUB_VF16_M2_MASK = 2372, PseudoVFSUB_VF16_M2_TU = 2373, PseudoVFSUB_VF16_M4 = 2374, PseudoVFSUB_VF16_M4_MASK = 2375, PseudoVFSUB_VF16_M4_TU = 2376, PseudoVFSUB_VF16_M8 = 2377, PseudoVFSUB_VF16_M8_MASK = 2378, PseudoVFSUB_VF16_M8_TU = 2379, PseudoVFSUB_VF16_MF2 = 2380, PseudoVFSUB_VF16_MF2_MASK = 2381, PseudoVFSUB_VF16_MF2_TU = 2382, PseudoVFSUB_VF16_MF4 = 2383, PseudoVFSUB_VF16_MF4_MASK = 2384, PseudoVFSUB_VF16_MF4_TU = 2385, PseudoVFSUB_VF32_M1 = 2386, PseudoVFSUB_VF32_M1_MASK = 2387, PseudoVFSUB_VF32_M1_TU = 2388, PseudoVFSUB_VF32_M2 = 2389, PseudoVFSUB_VF32_M2_MASK = 2390, PseudoVFSUB_VF32_M2_TU = 2391, PseudoVFSUB_VF32_M4 = 2392, PseudoVFSUB_VF32_M4_MASK = 2393, PseudoVFSUB_VF32_M4_TU = 2394, PseudoVFSUB_VF32_M8 = 2395, PseudoVFSUB_VF32_M8_MASK = 2396, PseudoVFSUB_VF32_M8_TU = 2397, PseudoVFSUB_VF32_MF2 = 2398, PseudoVFSUB_VF32_MF2_MASK = 2399, PseudoVFSUB_VF32_MF2_TU = 2400, PseudoVFSUB_VF64_M1 = 2401, PseudoVFSUB_VF64_M1_MASK = 2402, PseudoVFSUB_VF64_M1_TU = 2403, PseudoVFSUB_VF64_M2 = 2404, PseudoVFSUB_VF64_M2_MASK = 2405, PseudoVFSUB_VF64_M2_TU = 2406, PseudoVFSUB_VF64_M4 = 2407, PseudoVFSUB_VF64_M4_MASK = 2408, PseudoVFSUB_VF64_M4_TU = 2409, PseudoVFSUB_VF64_M8 = 2410, PseudoVFSUB_VF64_M8_MASK = 2411, PseudoVFSUB_VF64_M8_TU = 2412, PseudoVFSUB_VV_M1 = 2413, PseudoVFSUB_VV_M1_MASK = 2414, PseudoVFSUB_VV_M1_TU = 2415, PseudoVFSUB_VV_M2 = 2416, PseudoVFSUB_VV_M2_MASK = 2417, PseudoVFSUB_VV_M2_TU = 2418, PseudoVFSUB_VV_M4 = 2419, PseudoVFSUB_VV_M4_MASK = 2420, PseudoVFSUB_VV_M4_TU = 2421, PseudoVFSUB_VV_M8 = 2422, PseudoVFSUB_VV_M8_MASK = 2423, PseudoVFSUB_VV_M8_TU = 2424, PseudoVFSUB_VV_MF2 = 2425, PseudoVFSUB_VV_MF2_MASK = 2426, PseudoVFSUB_VV_MF2_TU = 2427, PseudoVFSUB_VV_MF4 = 2428, PseudoVFSUB_VV_MF4_MASK = 2429, PseudoVFSUB_VV_MF4_TU = 2430, PseudoVFWADD_VF16_M1 = 2431, PseudoVFWADD_VF16_M1_MASK = 2432, PseudoVFWADD_VF16_M1_TU = 2433, PseudoVFWADD_VF16_M2 = 2434, PseudoVFWADD_VF16_M2_MASK = 2435, PseudoVFWADD_VF16_M2_TU = 2436, PseudoVFWADD_VF16_M4 = 2437, PseudoVFWADD_VF16_M4_MASK = 2438, PseudoVFWADD_VF16_M4_TU = 2439, PseudoVFWADD_VF16_MF2 = 2440, PseudoVFWADD_VF16_MF2_MASK = 2441, PseudoVFWADD_VF16_MF2_TU = 2442, PseudoVFWADD_VF16_MF4 = 2443, PseudoVFWADD_VF16_MF4_MASK = 2444, PseudoVFWADD_VF16_MF4_TU = 2445, PseudoVFWADD_VF32_M1 = 2446, PseudoVFWADD_VF32_M1_MASK = 2447, PseudoVFWADD_VF32_M1_TU = 2448, PseudoVFWADD_VF32_M2 = 2449, PseudoVFWADD_VF32_M2_MASK = 2450, PseudoVFWADD_VF32_M2_TU = 2451, PseudoVFWADD_VF32_M4 = 2452, PseudoVFWADD_VF32_M4_MASK = 2453, PseudoVFWADD_VF32_M4_TU = 2454, PseudoVFWADD_VF32_MF2 = 2455, PseudoVFWADD_VF32_MF2_MASK = 2456, PseudoVFWADD_VF32_MF2_TU = 2457, PseudoVFWADD_VV_M1 = 2458, PseudoVFWADD_VV_M1_MASK = 2459, PseudoVFWADD_VV_M1_TU = 2460, PseudoVFWADD_VV_M2 = 2461, PseudoVFWADD_VV_M2_MASK = 2462, PseudoVFWADD_VV_M2_TU = 2463, PseudoVFWADD_VV_M4 = 2464, PseudoVFWADD_VV_M4_MASK = 2465, PseudoVFWADD_VV_M4_TU = 2466, PseudoVFWADD_VV_MF2 = 2467, PseudoVFWADD_VV_MF2_MASK = 2468, PseudoVFWADD_VV_MF2_TU = 2469, PseudoVFWADD_VV_MF4 = 2470, PseudoVFWADD_VV_MF4_MASK = 2471, PseudoVFWADD_VV_MF4_TU = 2472, PseudoVFWADD_WF16_M1 = 2473, PseudoVFWADD_WF16_M1_MASK = 2474, PseudoVFWADD_WF16_M1_TU = 2475, PseudoVFWADD_WF16_M2 = 2476, PseudoVFWADD_WF16_M2_MASK = 2477, PseudoVFWADD_WF16_M2_TU = 2478, PseudoVFWADD_WF16_M4 = 2479, PseudoVFWADD_WF16_M4_MASK = 2480, PseudoVFWADD_WF16_M4_TU = 2481, PseudoVFWADD_WF16_MF2 = 2482, PseudoVFWADD_WF16_MF2_MASK = 2483, PseudoVFWADD_WF16_MF2_TU = 2484, PseudoVFWADD_WF16_MF4 = 2485, PseudoVFWADD_WF16_MF4_MASK = 2486, PseudoVFWADD_WF16_MF4_TU = 2487, PseudoVFWADD_WF32_M1 = 2488, PseudoVFWADD_WF32_M1_MASK = 2489, PseudoVFWADD_WF32_M1_TU = 2490, PseudoVFWADD_WF32_M2 = 2491, PseudoVFWADD_WF32_M2_MASK = 2492, PseudoVFWADD_WF32_M2_TU = 2493, PseudoVFWADD_WF32_M4 = 2494, PseudoVFWADD_WF32_M4_MASK = 2495, PseudoVFWADD_WF32_M4_TU = 2496, PseudoVFWADD_WF32_MF2 = 2497, PseudoVFWADD_WF32_MF2_MASK = 2498, PseudoVFWADD_WF32_MF2_TU = 2499, PseudoVFWADD_WV_M1 = 2500, PseudoVFWADD_WV_M1_MASK = 2501, PseudoVFWADD_WV_M1_MASK_TIED = 2502, PseudoVFWADD_WV_M1_TIED = 2503, PseudoVFWADD_WV_M1_TU = 2504, PseudoVFWADD_WV_M2 = 2505, PseudoVFWADD_WV_M2_MASK = 2506, PseudoVFWADD_WV_M2_MASK_TIED = 2507, PseudoVFWADD_WV_M2_TIED = 2508, PseudoVFWADD_WV_M2_TU = 2509, PseudoVFWADD_WV_M4 = 2510, PseudoVFWADD_WV_M4_MASK = 2511, PseudoVFWADD_WV_M4_MASK_TIED = 2512, PseudoVFWADD_WV_M4_TIED = 2513, PseudoVFWADD_WV_M4_TU = 2514, PseudoVFWADD_WV_MF2 = 2515, PseudoVFWADD_WV_MF2_MASK = 2516, PseudoVFWADD_WV_MF2_MASK_TIED = 2517, PseudoVFWADD_WV_MF2_TIED = 2518, PseudoVFWADD_WV_MF2_TU = 2519, PseudoVFWADD_WV_MF4 = 2520, PseudoVFWADD_WV_MF4_MASK = 2521, PseudoVFWADD_WV_MF4_MASK_TIED = 2522, PseudoVFWADD_WV_MF4_TIED = 2523, PseudoVFWADD_WV_MF4_TU = 2524, PseudoVFWCVT_F_F_V_M1 = 2525, PseudoVFWCVT_F_F_V_M1_MASK = 2526, PseudoVFWCVT_F_F_V_M1_TU = 2527, PseudoVFWCVT_F_F_V_M2 = 2528, PseudoVFWCVT_F_F_V_M2_MASK = 2529, PseudoVFWCVT_F_F_V_M2_TU = 2530, PseudoVFWCVT_F_F_V_M4 = 2531, PseudoVFWCVT_F_F_V_M4_MASK = 2532, PseudoVFWCVT_F_F_V_M4_TU = 2533, PseudoVFWCVT_F_F_V_MF2 = 2534, PseudoVFWCVT_F_F_V_MF2_MASK = 2535, PseudoVFWCVT_F_F_V_MF2_TU = 2536, PseudoVFWCVT_F_F_V_MF4 = 2537, PseudoVFWCVT_F_F_V_MF4_MASK = 2538, PseudoVFWCVT_F_F_V_MF4_TU = 2539, PseudoVFWCVT_F_XU_V_M1 = 2540, PseudoVFWCVT_F_XU_V_M1_MASK = 2541, PseudoVFWCVT_F_XU_V_M1_TU = 2542, PseudoVFWCVT_F_XU_V_M2 = 2543, PseudoVFWCVT_F_XU_V_M2_MASK = 2544, PseudoVFWCVT_F_XU_V_M2_TU = 2545, PseudoVFWCVT_F_XU_V_M4 = 2546, PseudoVFWCVT_F_XU_V_M4_MASK = 2547, PseudoVFWCVT_F_XU_V_M4_TU = 2548, PseudoVFWCVT_F_XU_V_MF2 = 2549, PseudoVFWCVT_F_XU_V_MF2_MASK = 2550, PseudoVFWCVT_F_XU_V_MF2_TU = 2551, PseudoVFWCVT_F_XU_V_MF4 = 2552, PseudoVFWCVT_F_XU_V_MF4_MASK = 2553, PseudoVFWCVT_F_XU_V_MF4_TU = 2554, PseudoVFWCVT_F_XU_V_MF8 = 2555, PseudoVFWCVT_F_XU_V_MF8_MASK = 2556, PseudoVFWCVT_F_XU_V_MF8_TU = 2557, PseudoVFWCVT_F_X_V_M1 = 2558, PseudoVFWCVT_F_X_V_M1_MASK = 2559, PseudoVFWCVT_F_X_V_M1_TU = 2560, PseudoVFWCVT_F_X_V_M2 = 2561, PseudoVFWCVT_F_X_V_M2_MASK = 2562, PseudoVFWCVT_F_X_V_M2_TU = 2563, PseudoVFWCVT_F_X_V_M4 = 2564, PseudoVFWCVT_F_X_V_M4_MASK = 2565, PseudoVFWCVT_F_X_V_M4_TU = 2566, PseudoVFWCVT_F_X_V_MF2 = 2567, PseudoVFWCVT_F_X_V_MF2_MASK = 2568, PseudoVFWCVT_F_X_V_MF2_TU = 2569, PseudoVFWCVT_F_X_V_MF4 = 2570, PseudoVFWCVT_F_X_V_MF4_MASK = 2571, PseudoVFWCVT_F_X_V_MF4_TU = 2572, PseudoVFWCVT_F_X_V_MF8 = 2573, PseudoVFWCVT_F_X_V_MF8_MASK = 2574, PseudoVFWCVT_F_X_V_MF8_TU = 2575, PseudoVFWCVT_RM_F_XU_V_M1_MASK = 2576, PseudoVFWCVT_RM_F_XU_V_M2_MASK = 2577, PseudoVFWCVT_RM_F_XU_V_M4_MASK = 2578, PseudoVFWCVT_RM_F_XU_V_MF2_MASK = 2579, PseudoVFWCVT_RM_F_XU_V_MF4_MASK = 2580, PseudoVFWCVT_RM_F_XU_V_MF8_MASK = 2581, PseudoVFWCVT_RM_F_X_V_M1_MASK = 2582, PseudoVFWCVT_RM_F_X_V_M2_MASK = 2583, PseudoVFWCVT_RM_F_X_V_M4_MASK = 2584, PseudoVFWCVT_RM_F_X_V_MF2_MASK = 2585, PseudoVFWCVT_RM_F_X_V_MF4_MASK = 2586, PseudoVFWCVT_RM_F_X_V_MF8_MASK = 2587, PseudoVFWCVT_RM_XU_F_V_M1_MASK = 2588, PseudoVFWCVT_RM_XU_F_V_M2_MASK = 2589, PseudoVFWCVT_RM_XU_F_V_M4_MASK = 2590, PseudoVFWCVT_RM_XU_F_V_MF2_MASK = 2591, PseudoVFWCVT_RM_XU_F_V_MF4_MASK = 2592, PseudoVFWCVT_RM_X_F_V_M1_MASK = 2593, PseudoVFWCVT_RM_X_F_V_M2_MASK = 2594, PseudoVFWCVT_RM_X_F_V_M4_MASK = 2595, PseudoVFWCVT_RM_X_F_V_MF2_MASK = 2596, PseudoVFWCVT_RM_X_F_V_MF4_MASK = 2597, PseudoVFWCVT_RTZ_XU_F_V_M1 = 2598, PseudoVFWCVT_RTZ_XU_F_V_M1_MASK = 2599, PseudoVFWCVT_RTZ_XU_F_V_M1_TU = 2600, PseudoVFWCVT_RTZ_XU_F_V_M2 = 2601, PseudoVFWCVT_RTZ_XU_F_V_M2_MASK = 2602, PseudoVFWCVT_RTZ_XU_F_V_M2_TU = 2603, PseudoVFWCVT_RTZ_XU_F_V_M4 = 2604, PseudoVFWCVT_RTZ_XU_F_V_M4_MASK = 2605, PseudoVFWCVT_RTZ_XU_F_V_M4_TU = 2606, PseudoVFWCVT_RTZ_XU_F_V_MF2 = 2607, PseudoVFWCVT_RTZ_XU_F_V_MF2_MASK = 2608, PseudoVFWCVT_RTZ_XU_F_V_MF2_TU = 2609, PseudoVFWCVT_RTZ_XU_F_V_MF4 = 2610, PseudoVFWCVT_RTZ_XU_F_V_MF4_MASK = 2611, PseudoVFWCVT_RTZ_XU_F_V_MF4_TU = 2612, PseudoVFWCVT_RTZ_X_F_V_M1 = 2613, PseudoVFWCVT_RTZ_X_F_V_M1_MASK = 2614, PseudoVFWCVT_RTZ_X_F_V_M1_TU = 2615, PseudoVFWCVT_RTZ_X_F_V_M2 = 2616, PseudoVFWCVT_RTZ_X_F_V_M2_MASK = 2617, PseudoVFWCVT_RTZ_X_F_V_M2_TU = 2618, PseudoVFWCVT_RTZ_X_F_V_M4 = 2619, PseudoVFWCVT_RTZ_X_F_V_M4_MASK = 2620, PseudoVFWCVT_RTZ_X_F_V_M4_TU = 2621, PseudoVFWCVT_RTZ_X_F_V_MF2 = 2622, PseudoVFWCVT_RTZ_X_F_V_MF2_MASK = 2623, PseudoVFWCVT_RTZ_X_F_V_MF2_TU = 2624, PseudoVFWCVT_RTZ_X_F_V_MF4 = 2625, PseudoVFWCVT_RTZ_X_F_V_MF4_MASK = 2626, PseudoVFWCVT_RTZ_X_F_V_MF4_TU = 2627, PseudoVFWCVT_XU_F_V_M1 = 2628, PseudoVFWCVT_XU_F_V_M1_MASK = 2629, PseudoVFWCVT_XU_F_V_M1_TU = 2630, PseudoVFWCVT_XU_F_V_M2 = 2631, PseudoVFWCVT_XU_F_V_M2_MASK = 2632, PseudoVFWCVT_XU_F_V_M2_TU = 2633, PseudoVFWCVT_XU_F_V_M4 = 2634, PseudoVFWCVT_XU_F_V_M4_MASK = 2635, PseudoVFWCVT_XU_F_V_M4_TU = 2636, PseudoVFWCVT_XU_F_V_MF2 = 2637, PseudoVFWCVT_XU_F_V_MF2_MASK = 2638, PseudoVFWCVT_XU_F_V_MF2_TU = 2639, PseudoVFWCVT_XU_F_V_MF4 = 2640, PseudoVFWCVT_XU_F_V_MF4_MASK = 2641, PseudoVFWCVT_XU_F_V_MF4_TU = 2642, PseudoVFWCVT_X_F_V_M1 = 2643, PseudoVFWCVT_X_F_V_M1_MASK = 2644, PseudoVFWCVT_X_F_V_M1_TU = 2645, PseudoVFWCVT_X_F_V_M2 = 2646, PseudoVFWCVT_X_F_V_M2_MASK = 2647, PseudoVFWCVT_X_F_V_M2_TU = 2648, PseudoVFWCVT_X_F_V_M4 = 2649, PseudoVFWCVT_X_F_V_M4_MASK = 2650, PseudoVFWCVT_X_F_V_M4_TU = 2651, PseudoVFWCVT_X_F_V_MF2 = 2652, PseudoVFWCVT_X_F_V_MF2_MASK = 2653, PseudoVFWCVT_X_F_V_MF2_TU = 2654, PseudoVFWCVT_X_F_V_MF4 = 2655, PseudoVFWCVT_X_F_V_MF4_MASK = 2656, PseudoVFWCVT_X_F_V_MF4_TU = 2657, PseudoVFWMACC_VF16_M1 = 2658, PseudoVFWMACC_VF16_M1_MASK = 2659, PseudoVFWMACC_VF16_M2 = 2660, PseudoVFWMACC_VF16_M2_MASK = 2661, PseudoVFWMACC_VF16_M4 = 2662, PseudoVFWMACC_VF16_M4_MASK = 2663, PseudoVFWMACC_VF16_MF2 = 2664, PseudoVFWMACC_VF16_MF2_MASK = 2665, PseudoVFWMACC_VF16_MF4 = 2666, PseudoVFWMACC_VF16_MF4_MASK = 2667, PseudoVFWMACC_VF32_M1 = 2668, PseudoVFWMACC_VF32_M1_MASK = 2669, PseudoVFWMACC_VF32_M2 = 2670, PseudoVFWMACC_VF32_M2_MASK = 2671, PseudoVFWMACC_VF32_M4 = 2672, PseudoVFWMACC_VF32_M4_MASK = 2673, PseudoVFWMACC_VF32_MF2 = 2674, PseudoVFWMACC_VF32_MF2_MASK = 2675, PseudoVFWMACC_VV_M1 = 2676, PseudoVFWMACC_VV_M1_MASK = 2677, PseudoVFWMACC_VV_M2 = 2678, PseudoVFWMACC_VV_M2_MASK = 2679, PseudoVFWMACC_VV_M4 = 2680, PseudoVFWMACC_VV_M4_MASK = 2681, PseudoVFWMACC_VV_MF2 = 2682, PseudoVFWMACC_VV_MF2_MASK = 2683, PseudoVFWMACC_VV_MF4 = 2684, PseudoVFWMACC_VV_MF4_MASK = 2685, PseudoVFWMSAC_VF16_M1 = 2686, PseudoVFWMSAC_VF16_M1_MASK = 2687, PseudoVFWMSAC_VF16_M2 = 2688, PseudoVFWMSAC_VF16_M2_MASK = 2689, PseudoVFWMSAC_VF16_M4 = 2690, PseudoVFWMSAC_VF16_M4_MASK = 2691, PseudoVFWMSAC_VF16_MF2 = 2692, PseudoVFWMSAC_VF16_MF2_MASK = 2693, PseudoVFWMSAC_VF16_MF4 = 2694, PseudoVFWMSAC_VF16_MF4_MASK = 2695, PseudoVFWMSAC_VF32_M1 = 2696, PseudoVFWMSAC_VF32_M1_MASK = 2697, PseudoVFWMSAC_VF32_M2 = 2698, PseudoVFWMSAC_VF32_M2_MASK = 2699, PseudoVFWMSAC_VF32_M4 = 2700, PseudoVFWMSAC_VF32_M4_MASK = 2701, PseudoVFWMSAC_VF32_MF2 = 2702, PseudoVFWMSAC_VF32_MF2_MASK = 2703, PseudoVFWMSAC_VV_M1 = 2704, PseudoVFWMSAC_VV_M1_MASK = 2705, PseudoVFWMSAC_VV_M2 = 2706, PseudoVFWMSAC_VV_M2_MASK = 2707, PseudoVFWMSAC_VV_M4 = 2708, PseudoVFWMSAC_VV_M4_MASK = 2709, PseudoVFWMSAC_VV_MF2 = 2710, PseudoVFWMSAC_VV_MF2_MASK = 2711, PseudoVFWMSAC_VV_MF4 = 2712, PseudoVFWMSAC_VV_MF4_MASK = 2713, PseudoVFWMUL_VF16_M1 = 2714, PseudoVFWMUL_VF16_M1_MASK = 2715, PseudoVFWMUL_VF16_M1_TU = 2716, PseudoVFWMUL_VF16_M2 = 2717, PseudoVFWMUL_VF16_M2_MASK = 2718, PseudoVFWMUL_VF16_M2_TU = 2719, PseudoVFWMUL_VF16_M4 = 2720, PseudoVFWMUL_VF16_M4_MASK = 2721, PseudoVFWMUL_VF16_M4_TU = 2722, PseudoVFWMUL_VF16_MF2 = 2723, PseudoVFWMUL_VF16_MF2_MASK = 2724, PseudoVFWMUL_VF16_MF2_TU = 2725, PseudoVFWMUL_VF16_MF4 = 2726, PseudoVFWMUL_VF16_MF4_MASK = 2727, PseudoVFWMUL_VF16_MF4_TU = 2728, PseudoVFWMUL_VF32_M1 = 2729, PseudoVFWMUL_VF32_M1_MASK = 2730, PseudoVFWMUL_VF32_M1_TU = 2731, PseudoVFWMUL_VF32_M2 = 2732, PseudoVFWMUL_VF32_M2_MASK = 2733, PseudoVFWMUL_VF32_M2_TU = 2734, PseudoVFWMUL_VF32_M4 = 2735, PseudoVFWMUL_VF32_M4_MASK = 2736, PseudoVFWMUL_VF32_M4_TU = 2737, PseudoVFWMUL_VF32_MF2 = 2738, PseudoVFWMUL_VF32_MF2_MASK = 2739, PseudoVFWMUL_VF32_MF2_TU = 2740, PseudoVFWMUL_VV_M1 = 2741, PseudoVFWMUL_VV_M1_MASK = 2742, PseudoVFWMUL_VV_M1_TU = 2743, PseudoVFWMUL_VV_M2 = 2744, PseudoVFWMUL_VV_M2_MASK = 2745, PseudoVFWMUL_VV_M2_TU = 2746, PseudoVFWMUL_VV_M4 = 2747, PseudoVFWMUL_VV_M4_MASK = 2748, PseudoVFWMUL_VV_M4_TU = 2749, PseudoVFWMUL_VV_MF2 = 2750, PseudoVFWMUL_VV_MF2_MASK = 2751, PseudoVFWMUL_VV_MF2_TU = 2752, PseudoVFWMUL_VV_MF4 = 2753, PseudoVFWMUL_VV_MF4_MASK = 2754, PseudoVFWMUL_VV_MF4_TU = 2755, PseudoVFWNMACC_VF16_M1 = 2756, PseudoVFWNMACC_VF16_M1_MASK = 2757, PseudoVFWNMACC_VF16_M2 = 2758, PseudoVFWNMACC_VF16_M2_MASK = 2759, PseudoVFWNMACC_VF16_M4 = 2760, PseudoVFWNMACC_VF16_M4_MASK = 2761, PseudoVFWNMACC_VF16_MF2 = 2762, PseudoVFWNMACC_VF16_MF2_MASK = 2763, PseudoVFWNMACC_VF16_MF4 = 2764, PseudoVFWNMACC_VF16_MF4_MASK = 2765, PseudoVFWNMACC_VF32_M1 = 2766, PseudoVFWNMACC_VF32_M1_MASK = 2767, PseudoVFWNMACC_VF32_M2 = 2768, PseudoVFWNMACC_VF32_M2_MASK = 2769, PseudoVFWNMACC_VF32_M4 = 2770, PseudoVFWNMACC_VF32_M4_MASK = 2771, PseudoVFWNMACC_VF32_MF2 = 2772, PseudoVFWNMACC_VF32_MF2_MASK = 2773, PseudoVFWNMACC_VV_M1 = 2774, PseudoVFWNMACC_VV_M1_MASK = 2775, PseudoVFWNMACC_VV_M2 = 2776, PseudoVFWNMACC_VV_M2_MASK = 2777, PseudoVFWNMACC_VV_M4 = 2778, PseudoVFWNMACC_VV_M4_MASK = 2779, PseudoVFWNMACC_VV_MF2 = 2780, PseudoVFWNMACC_VV_MF2_MASK = 2781, PseudoVFWNMACC_VV_MF4 = 2782, PseudoVFWNMACC_VV_MF4_MASK = 2783, PseudoVFWNMSAC_VF16_M1 = 2784, PseudoVFWNMSAC_VF16_M1_MASK = 2785, PseudoVFWNMSAC_VF16_M2 = 2786, PseudoVFWNMSAC_VF16_M2_MASK = 2787, PseudoVFWNMSAC_VF16_M4 = 2788, PseudoVFWNMSAC_VF16_M4_MASK = 2789, PseudoVFWNMSAC_VF16_MF2 = 2790, PseudoVFWNMSAC_VF16_MF2_MASK = 2791, PseudoVFWNMSAC_VF16_MF4 = 2792, PseudoVFWNMSAC_VF16_MF4_MASK = 2793, PseudoVFWNMSAC_VF32_M1 = 2794, PseudoVFWNMSAC_VF32_M1_MASK = 2795, PseudoVFWNMSAC_VF32_M2 = 2796, PseudoVFWNMSAC_VF32_M2_MASK = 2797, PseudoVFWNMSAC_VF32_M4 = 2798, PseudoVFWNMSAC_VF32_M4_MASK = 2799, PseudoVFWNMSAC_VF32_MF2 = 2800, PseudoVFWNMSAC_VF32_MF2_MASK = 2801, PseudoVFWNMSAC_VV_M1 = 2802, PseudoVFWNMSAC_VV_M1_MASK = 2803, PseudoVFWNMSAC_VV_M2 = 2804, PseudoVFWNMSAC_VV_M2_MASK = 2805, PseudoVFWNMSAC_VV_M4 = 2806, PseudoVFWNMSAC_VV_M4_MASK = 2807, PseudoVFWNMSAC_VV_MF2 = 2808, PseudoVFWNMSAC_VV_MF2_MASK = 2809, PseudoVFWNMSAC_VV_MF4 = 2810, PseudoVFWNMSAC_VV_MF4_MASK = 2811, PseudoVFWREDOSUM_VS_M1 = 2812, PseudoVFWREDOSUM_VS_M1_MASK = 2813, PseudoVFWREDOSUM_VS_M2 = 2814, PseudoVFWREDOSUM_VS_M2_MASK = 2815, PseudoVFWREDOSUM_VS_M4 = 2816, PseudoVFWREDOSUM_VS_M4_MASK = 2817, PseudoVFWREDOSUM_VS_M8 = 2818, PseudoVFWREDOSUM_VS_M8_MASK = 2819, PseudoVFWREDOSUM_VS_MF2 = 2820, PseudoVFWREDOSUM_VS_MF2_MASK = 2821, PseudoVFWREDOSUM_VS_MF4 = 2822, PseudoVFWREDOSUM_VS_MF4_MASK = 2823, PseudoVFWREDUSUM_VS_M1 = 2824, PseudoVFWREDUSUM_VS_M1_MASK = 2825, PseudoVFWREDUSUM_VS_M2 = 2826, PseudoVFWREDUSUM_VS_M2_MASK = 2827, PseudoVFWREDUSUM_VS_M4 = 2828, PseudoVFWREDUSUM_VS_M4_MASK = 2829, PseudoVFWREDUSUM_VS_M8 = 2830, PseudoVFWREDUSUM_VS_M8_MASK = 2831, PseudoVFWREDUSUM_VS_MF2 = 2832, PseudoVFWREDUSUM_VS_MF2_MASK = 2833, PseudoVFWREDUSUM_VS_MF4 = 2834, PseudoVFWREDUSUM_VS_MF4_MASK = 2835, PseudoVFWSUB_VF16_M1 = 2836, PseudoVFWSUB_VF16_M1_MASK = 2837, PseudoVFWSUB_VF16_M1_TU = 2838, PseudoVFWSUB_VF16_M2 = 2839, PseudoVFWSUB_VF16_M2_MASK = 2840, PseudoVFWSUB_VF16_M2_TU = 2841, PseudoVFWSUB_VF16_M4 = 2842, PseudoVFWSUB_VF16_M4_MASK = 2843, PseudoVFWSUB_VF16_M4_TU = 2844, PseudoVFWSUB_VF16_MF2 = 2845, PseudoVFWSUB_VF16_MF2_MASK = 2846, PseudoVFWSUB_VF16_MF2_TU = 2847, PseudoVFWSUB_VF16_MF4 = 2848, PseudoVFWSUB_VF16_MF4_MASK = 2849, PseudoVFWSUB_VF16_MF4_TU = 2850, PseudoVFWSUB_VF32_M1 = 2851, PseudoVFWSUB_VF32_M1_MASK = 2852, PseudoVFWSUB_VF32_M1_TU = 2853, PseudoVFWSUB_VF32_M2 = 2854, PseudoVFWSUB_VF32_M2_MASK = 2855, PseudoVFWSUB_VF32_M2_TU = 2856, PseudoVFWSUB_VF32_M4 = 2857, PseudoVFWSUB_VF32_M4_MASK = 2858, PseudoVFWSUB_VF32_M4_TU = 2859, PseudoVFWSUB_VF32_MF2 = 2860, PseudoVFWSUB_VF32_MF2_MASK = 2861, PseudoVFWSUB_VF32_MF2_TU = 2862, PseudoVFWSUB_VV_M1 = 2863, PseudoVFWSUB_VV_M1_MASK = 2864, PseudoVFWSUB_VV_M1_TU = 2865, PseudoVFWSUB_VV_M2 = 2866, PseudoVFWSUB_VV_M2_MASK = 2867, PseudoVFWSUB_VV_M2_TU = 2868, PseudoVFWSUB_VV_M4 = 2869, PseudoVFWSUB_VV_M4_MASK = 2870, PseudoVFWSUB_VV_M4_TU = 2871, PseudoVFWSUB_VV_MF2 = 2872, PseudoVFWSUB_VV_MF2_MASK = 2873, PseudoVFWSUB_VV_MF2_TU = 2874, PseudoVFWSUB_VV_MF4 = 2875, PseudoVFWSUB_VV_MF4_MASK = 2876, PseudoVFWSUB_VV_MF4_TU = 2877, PseudoVFWSUB_WF16_M1 = 2878, PseudoVFWSUB_WF16_M1_MASK = 2879, PseudoVFWSUB_WF16_M1_TU = 2880, PseudoVFWSUB_WF16_M2 = 2881, PseudoVFWSUB_WF16_M2_MASK = 2882, PseudoVFWSUB_WF16_M2_TU = 2883, PseudoVFWSUB_WF16_M4 = 2884, PseudoVFWSUB_WF16_M4_MASK = 2885, PseudoVFWSUB_WF16_M4_TU = 2886, PseudoVFWSUB_WF16_MF2 = 2887, PseudoVFWSUB_WF16_MF2_MASK = 2888, PseudoVFWSUB_WF16_MF2_TU = 2889, PseudoVFWSUB_WF16_MF4 = 2890, PseudoVFWSUB_WF16_MF4_MASK = 2891, PseudoVFWSUB_WF16_MF4_TU = 2892, PseudoVFWSUB_WF32_M1 = 2893, PseudoVFWSUB_WF32_M1_MASK = 2894, PseudoVFWSUB_WF32_M1_TU = 2895, PseudoVFWSUB_WF32_M2 = 2896, PseudoVFWSUB_WF32_M2_MASK = 2897, PseudoVFWSUB_WF32_M2_TU = 2898, PseudoVFWSUB_WF32_M4 = 2899, PseudoVFWSUB_WF32_M4_MASK = 2900, PseudoVFWSUB_WF32_M4_TU = 2901, PseudoVFWSUB_WF32_MF2 = 2902, PseudoVFWSUB_WF32_MF2_MASK = 2903, PseudoVFWSUB_WF32_MF2_TU = 2904, PseudoVFWSUB_WV_M1 = 2905, PseudoVFWSUB_WV_M1_MASK = 2906, PseudoVFWSUB_WV_M1_MASK_TIED = 2907, PseudoVFWSUB_WV_M1_TIED = 2908, PseudoVFWSUB_WV_M1_TU = 2909, PseudoVFWSUB_WV_M2 = 2910, PseudoVFWSUB_WV_M2_MASK = 2911, PseudoVFWSUB_WV_M2_MASK_TIED = 2912, PseudoVFWSUB_WV_M2_TIED = 2913, PseudoVFWSUB_WV_M2_TU = 2914, PseudoVFWSUB_WV_M4 = 2915, PseudoVFWSUB_WV_M4_MASK = 2916, PseudoVFWSUB_WV_M4_MASK_TIED = 2917, PseudoVFWSUB_WV_M4_TIED = 2918, PseudoVFWSUB_WV_M4_TU = 2919, PseudoVFWSUB_WV_MF2 = 2920, PseudoVFWSUB_WV_MF2_MASK = 2921, PseudoVFWSUB_WV_MF2_MASK_TIED = 2922, PseudoVFWSUB_WV_MF2_TIED = 2923, PseudoVFWSUB_WV_MF2_TU = 2924, PseudoVFWSUB_WV_MF4 = 2925, PseudoVFWSUB_WV_MF4_MASK = 2926, PseudoVFWSUB_WV_MF4_MASK_TIED = 2927, PseudoVFWSUB_WV_MF4_TIED = 2928, PseudoVFWSUB_WV_MF4_TU = 2929, PseudoVID_V_M1 = 2930, PseudoVID_V_M1_MASK = 2931, PseudoVID_V_M1_TU = 2932, PseudoVID_V_M2 = 2933, PseudoVID_V_M2_MASK = 2934, PseudoVID_V_M2_TU = 2935, PseudoVID_V_M4 = 2936, PseudoVID_V_M4_MASK = 2937, PseudoVID_V_M4_TU = 2938, PseudoVID_V_M8 = 2939, PseudoVID_V_M8_MASK = 2940, PseudoVID_V_M8_TU = 2941, PseudoVID_V_MF2 = 2942, PseudoVID_V_MF2_MASK = 2943, PseudoVID_V_MF2_TU = 2944, PseudoVID_V_MF4 = 2945, PseudoVID_V_MF4_MASK = 2946, PseudoVID_V_MF4_TU = 2947, PseudoVID_V_MF8 = 2948, PseudoVID_V_MF8_MASK = 2949, PseudoVID_V_MF8_TU = 2950, PseudoVIOTA_M_M1 = 2951, PseudoVIOTA_M_M1_MASK = 2952, PseudoVIOTA_M_M1_TU = 2953, PseudoVIOTA_M_M2 = 2954, PseudoVIOTA_M_M2_MASK = 2955, PseudoVIOTA_M_M2_TU = 2956, PseudoVIOTA_M_M4 = 2957, PseudoVIOTA_M_M4_MASK = 2958, PseudoVIOTA_M_M4_TU = 2959, PseudoVIOTA_M_M8 = 2960, PseudoVIOTA_M_M8_MASK = 2961, PseudoVIOTA_M_M8_TU = 2962, PseudoVIOTA_M_MF2 = 2963, PseudoVIOTA_M_MF2_MASK = 2964, PseudoVIOTA_M_MF2_TU = 2965, PseudoVIOTA_M_MF4 = 2966, PseudoVIOTA_M_MF4_MASK = 2967, PseudoVIOTA_M_MF4_TU = 2968, PseudoVIOTA_M_MF8 = 2969, PseudoVIOTA_M_MF8_MASK = 2970, PseudoVIOTA_M_MF8_TU = 2971, PseudoVLE16FF_V_M1 = 2972, PseudoVLE16FF_V_M1_MASK = 2973, PseudoVLE16FF_V_M1_TU = 2974, PseudoVLE16FF_V_M2 = 2975, PseudoVLE16FF_V_M2_MASK = 2976, PseudoVLE16FF_V_M2_TU = 2977, PseudoVLE16FF_V_M4 = 2978, PseudoVLE16FF_V_M4_MASK = 2979, PseudoVLE16FF_V_M4_TU = 2980, PseudoVLE16FF_V_M8 = 2981, PseudoVLE16FF_V_M8_MASK = 2982, PseudoVLE16FF_V_M8_TU = 2983, PseudoVLE16FF_V_MF2 = 2984, PseudoVLE16FF_V_MF2_MASK = 2985, PseudoVLE16FF_V_MF2_TU = 2986, PseudoVLE16FF_V_MF4 = 2987, PseudoVLE16FF_V_MF4_MASK = 2988, PseudoVLE16FF_V_MF4_TU = 2989, PseudoVLE16_V_M1 = 2990, PseudoVLE16_V_M1_MASK = 2991, PseudoVLE16_V_M1_TU = 2992, PseudoVLE16_V_M2 = 2993, PseudoVLE16_V_M2_MASK = 2994, PseudoVLE16_V_M2_TU = 2995, PseudoVLE16_V_M4 = 2996, PseudoVLE16_V_M4_MASK = 2997, PseudoVLE16_V_M4_TU = 2998, PseudoVLE16_V_M8 = 2999, PseudoVLE16_V_M8_MASK = 3000, PseudoVLE16_V_M8_TU = 3001, PseudoVLE16_V_MF2 = 3002, PseudoVLE16_V_MF2_MASK = 3003, PseudoVLE16_V_MF2_TU = 3004, PseudoVLE16_V_MF4 = 3005, PseudoVLE16_V_MF4_MASK = 3006, PseudoVLE16_V_MF4_TU = 3007, PseudoVLE32FF_V_M1 = 3008, PseudoVLE32FF_V_M1_MASK = 3009, PseudoVLE32FF_V_M1_TU = 3010, PseudoVLE32FF_V_M2 = 3011, PseudoVLE32FF_V_M2_MASK = 3012, PseudoVLE32FF_V_M2_TU = 3013, PseudoVLE32FF_V_M4 = 3014, PseudoVLE32FF_V_M4_MASK = 3015, PseudoVLE32FF_V_M4_TU = 3016, PseudoVLE32FF_V_M8 = 3017, PseudoVLE32FF_V_M8_MASK = 3018, PseudoVLE32FF_V_M8_TU = 3019, PseudoVLE32FF_V_MF2 = 3020, PseudoVLE32FF_V_MF2_MASK = 3021, PseudoVLE32FF_V_MF2_TU = 3022, PseudoVLE32_V_M1 = 3023, PseudoVLE32_V_M1_MASK = 3024, PseudoVLE32_V_M1_TU = 3025, PseudoVLE32_V_M2 = 3026, PseudoVLE32_V_M2_MASK = 3027, PseudoVLE32_V_M2_TU = 3028, PseudoVLE32_V_M4 = 3029, PseudoVLE32_V_M4_MASK = 3030, PseudoVLE32_V_M4_TU = 3031, PseudoVLE32_V_M8 = 3032, PseudoVLE32_V_M8_MASK = 3033, PseudoVLE32_V_M8_TU = 3034, PseudoVLE32_V_MF2 = 3035, PseudoVLE32_V_MF2_MASK = 3036, PseudoVLE32_V_MF2_TU = 3037, PseudoVLE64FF_V_M1 = 3038, PseudoVLE64FF_V_M1_MASK = 3039, PseudoVLE64FF_V_M1_TU = 3040, PseudoVLE64FF_V_M2 = 3041, PseudoVLE64FF_V_M2_MASK = 3042, PseudoVLE64FF_V_M2_TU = 3043, PseudoVLE64FF_V_M4 = 3044, PseudoVLE64FF_V_M4_MASK = 3045, PseudoVLE64FF_V_M4_TU = 3046, PseudoVLE64FF_V_M8 = 3047, PseudoVLE64FF_V_M8_MASK = 3048, PseudoVLE64FF_V_M8_TU = 3049, PseudoVLE64_V_M1 = 3050, PseudoVLE64_V_M1_MASK = 3051, PseudoVLE64_V_M1_TU = 3052, PseudoVLE64_V_M2 = 3053, PseudoVLE64_V_M2_MASK = 3054, PseudoVLE64_V_M2_TU = 3055, PseudoVLE64_V_M4 = 3056, PseudoVLE64_V_M4_MASK = 3057, PseudoVLE64_V_M4_TU = 3058, PseudoVLE64_V_M8 = 3059, PseudoVLE64_V_M8_MASK = 3060, PseudoVLE64_V_M8_TU = 3061, PseudoVLE8FF_V_M1 = 3062, PseudoVLE8FF_V_M1_MASK = 3063, PseudoVLE8FF_V_M1_TU = 3064, PseudoVLE8FF_V_M2 = 3065, PseudoVLE8FF_V_M2_MASK = 3066, PseudoVLE8FF_V_M2_TU = 3067, PseudoVLE8FF_V_M4 = 3068, PseudoVLE8FF_V_M4_MASK = 3069, PseudoVLE8FF_V_M4_TU = 3070, PseudoVLE8FF_V_M8 = 3071, PseudoVLE8FF_V_M8_MASK = 3072, PseudoVLE8FF_V_M8_TU = 3073, PseudoVLE8FF_V_MF2 = 3074, PseudoVLE8FF_V_MF2_MASK = 3075, PseudoVLE8FF_V_MF2_TU = 3076, PseudoVLE8FF_V_MF4 = 3077, PseudoVLE8FF_V_MF4_MASK = 3078, PseudoVLE8FF_V_MF4_TU = 3079, PseudoVLE8FF_V_MF8 = 3080, PseudoVLE8FF_V_MF8_MASK = 3081, PseudoVLE8FF_V_MF8_TU = 3082, PseudoVLE8_V_M1 = 3083, PseudoVLE8_V_M1_MASK = 3084, PseudoVLE8_V_M1_TU = 3085, PseudoVLE8_V_M2 = 3086, PseudoVLE8_V_M2_MASK = 3087, PseudoVLE8_V_M2_TU = 3088, PseudoVLE8_V_M4 = 3089, PseudoVLE8_V_M4_MASK = 3090, PseudoVLE8_V_M4_TU = 3091, PseudoVLE8_V_M8 = 3092, PseudoVLE8_V_M8_MASK = 3093, PseudoVLE8_V_M8_TU = 3094, PseudoVLE8_V_MF2 = 3095, PseudoVLE8_V_MF2_MASK = 3096, PseudoVLE8_V_MF2_TU = 3097, PseudoVLE8_V_MF4 = 3098, PseudoVLE8_V_MF4_MASK = 3099, PseudoVLE8_V_MF4_TU = 3100, PseudoVLE8_V_MF8 = 3101, PseudoVLE8_V_MF8_MASK = 3102, PseudoVLE8_V_MF8_TU = 3103, PseudoVLM_V_B1 = 3104, PseudoVLM_V_B16 = 3105, PseudoVLM_V_B2 = 3106, PseudoVLM_V_B32 = 3107, PseudoVLM_V_B4 = 3108, PseudoVLM_V_B64 = 3109, PseudoVLM_V_B8 = 3110, PseudoVLOXEI16_V_M1_M1 = 3111, PseudoVLOXEI16_V_M1_M1_MASK = 3112, PseudoVLOXEI16_V_M1_M1_TU = 3113, PseudoVLOXEI16_V_M1_M2 = 3114, PseudoVLOXEI16_V_M1_M2_MASK = 3115, PseudoVLOXEI16_V_M1_M2_TU = 3116, PseudoVLOXEI16_V_M1_M4 = 3117, PseudoVLOXEI16_V_M1_M4_MASK = 3118, PseudoVLOXEI16_V_M1_M4_TU = 3119, PseudoVLOXEI16_V_M1_MF2 = 3120, PseudoVLOXEI16_V_M1_MF2_MASK = 3121, PseudoVLOXEI16_V_M1_MF2_TU = 3122, PseudoVLOXEI16_V_M2_M1 = 3123, PseudoVLOXEI16_V_M2_M1_MASK = 3124, PseudoVLOXEI16_V_M2_M1_TU = 3125, PseudoVLOXEI16_V_M2_M2 = 3126, PseudoVLOXEI16_V_M2_M2_MASK = 3127, PseudoVLOXEI16_V_M2_M2_TU = 3128, PseudoVLOXEI16_V_M2_M4 = 3129, PseudoVLOXEI16_V_M2_M4_MASK = 3130, PseudoVLOXEI16_V_M2_M4_TU = 3131, PseudoVLOXEI16_V_M2_M8 = 3132, PseudoVLOXEI16_V_M2_M8_MASK = 3133, PseudoVLOXEI16_V_M2_M8_TU = 3134, PseudoVLOXEI16_V_M4_M2 = 3135, PseudoVLOXEI16_V_M4_M2_MASK = 3136, PseudoVLOXEI16_V_M4_M2_TU = 3137, PseudoVLOXEI16_V_M4_M4 = 3138, PseudoVLOXEI16_V_M4_M4_MASK = 3139, PseudoVLOXEI16_V_M4_M4_TU = 3140, PseudoVLOXEI16_V_M4_M8 = 3141, PseudoVLOXEI16_V_M4_M8_MASK = 3142, PseudoVLOXEI16_V_M4_M8_TU = 3143, PseudoVLOXEI16_V_M8_M4 = 3144, PseudoVLOXEI16_V_M8_M4_MASK = 3145, PseudoVLOXEI16_V_M8_M4_TU = 3146, PseudoVLOXEI16_V_M8_M8 = 3147, PseudoVLOXEI16_V_M8_M8_MASK = 3148, PseudoVLOXEI16_V_M8_M8_TU = 3149, PseudoVLOXEI16_V_MF2_M1 = 3150, PseudoVLOXEI16_V_MF2_M1_MASK = 3151, PseudoVLOXEI16_V_MF2_M1_TU = 3152, PseudoVLOXEI16_V_MF2_M2 = 3153, PseudoVLOXEI16_V_MF2_M2_MASK = 3154, PseudoVLOXEI16_V_MF2_M2_TU = 3155, PseudoVLOXEI16_V_MF2_MF2 = 3156, PseudoVLOXEI16_V_MF2_MF2_MASK = 3157, PseudoVLOXEI16_V_MF2_MF2_TU = 3158, PseudoVLOXEI16_V_MF2_MF4 = 3159, PseudoVLOXEI16_V_MF2_MF4_MASK = 3160, PseudoVLOXEI16_V_MF2_MF4_TU = 3161, PseudoVLOXEI16_V_MF4_M1 = 3162, PseudoVLOXEI16_V_MF4_M1_MASK = 3163, PseudoVLOXEI16_V_MF4_M1_TU = 3164, PseudoVLOXEI16_V_MF4_MF2 = 3165, PseudoVLOXEI16_V_MF4_MF2_MASK = 3166, PseudoVLOXEI16_V_MF4_MF2_TU = 3167, PseudoVLOXEI16_V_MF4_MF4 = 3168, PseudoVLOXEI16_V_MF4_MF4_MASK = 3169, PseudoVLOXEI16_V_MF4_MF4_TU = 3170, PseudoVLOXEI16_V_MF4_MF8 = 3171, PseudoVLOXEI16_V_MF4_MF8_MASK = 3172, PseudoVLOXEI16_V_MF4_MF8_TU = 3173, PseudoVLOXEI32_V_M1_M1 = 3174, PseudoVLOXEI32_V_M1_M1_MASK = 3175, PseudoVLOXEI32_V_M1_M1_TU = 3176, PseudoVLOXEI32_V_M1_M2 = 3177, PseudoVLOXEI32_V_M1_M2_MASK = 3178, PseudoVLOXEI32_V_M1_M2_TU = 3179, PseudoVLOXEI32_V_M1_MF2 = 3180, PseudoVLOXEI32_V_M1_MF2_MASK = 3181, PseudoVLOXEI32_V_M1_MF2_TU = 3182, PseudoVLOXEI32_V_M1_MF4 = 3183, PseudoVLOXEI32_V_M1_MF4_MASK = 3184, PseudoVLOXEI32_V_M1_MF4_TU = 3185, PseudoVLOXEI32_V_M2_M1 = 3186, PseudoVLOXEI32_V_M2_M1_MASK = 3187, PseudoVLOXEI32_V_M2_M1_TU = 3188, PseudoVLOXEI32_V_M2_M2 = 3189, PseudoVLOXEI32_V_M2_M2_MASK = 3190, PseudoVLOXEI32_V_M2_M2_TU = 3191, PseudoVLOXEI32_V_M2_M4 = 3192, PseudoVLOXEI32_V_M2_M4_MASK = 3193, PseudoVLOXEI32_V_M2_M4_TU = 3194, PseudoVLOXEI32_V_M2_MF2 = 3195, PseudoVLOXEI32_V_M2_MF2_MASK = 3196, PseudoVLOXEI32_V_M2_MF2_TU = 3197, PseudoVLOXEI32_V_M4_M1 = 3198, PseudoVLOXEI32_V_M4_M1_MASK = 3199, PseudoVLOXEI32_V_M4_M1_TU = 3200, PseudoVLOXEI32_V_M4_M2 = 3201, PseudoVLOXEI32_V_M4_M2_MASK = 3202, PseudoVLOXEI32_V_M4_M2_TU = 3203, PseudoVLOXEI32_V_M4_M4 = 3204, PseudoVLOXEI32_V_M4_M4_MASK = 3205, PseudoVLOXEI32_V_M4_M4_TU = 3206, PseudoVLOXEI32_V_M4_M8 = 3207, PseudoVLOXEI32_V_M4_M8_MASK = 3208, PseudoVLOXEI32_V_M4_M8_TU = 3209, PseudoVLOXEI32_V_M8_M2 = 3210, PseudoVLOXEI32_V_M8_M2_MASK = 3211, PseudoVLOXEI32_V_M8_M2_TU = 3212, PseudoVLOXEI32_V_M8_M4 = 3213, PseudoVLOXEI32_V_M8_M4_MASK = 3214, PseudoVLOXEI32_V_M8_M4_TU = 3215, PseudoVLOXEI32_V_M8_M8 = 3216, PseudoVLOXEI32_V_M8_M8_MASK = 3217, PseudoVLOXEI32_V_M8_M8_TU = 3218, PseudoVLOXEI32_V_MF2_M1 = 3219, PseudoVLOXEI32_V_MF2_M1_MASK = 3220, PseudoVLOXEI32_V_MF2_M1_TU = 3221, PseudoVLOXEI32_V_MF2_MF2 = 3222, PseudoVLOXEI32_V_MF2_MF2_MASK = 3223, PseudoVLOXEI32_V_MF2_MF2_TU = 3224, PseudoVLOXEI32_V_MF2_MF4 = 3225, PseudoVLOXEI32_V_MF2_MF4_MASK = 3226, PseudoVLOXEI32_V_MF2_MF4_TU = 3227, PseudoVLOXEI32_V_MF2_MF8 = 3228, PseudoVLOXEI32_V_MF2_MF8_MASK = 3229, PseudoVLOXEI32_V_MF2_MF8_TU = 3230, PseudoVLOXEI64_V_M1_M1 = 3231, PseudoVLOXEI64_V_M1_M1_MASK = 3232, PseudoVLOXEI64_V_M1_M1_TU = 3233, PseudoVLOXEI64_V_M1_MF2 = 3234, PseudoVLOXEI64_V_M1_MF2_MASK = 3235, PseudoVLOXEI64_V_M1_MF2_TU = 3236, PseudoVLOXEI64_V_M1_MF4 = 3237, PseudoVLOXEI64_V_M1_MF4_MASK = 3238, PseudoVLOXEI64_V_M1_MF4_TU = 3239, PseudoVLOXEI64_V_M1_MF8 = 3240, PseudoVLOXEI64_V_M1_MF8_MASK = 3241, PseudoVLOXEI64_V_M1_MF8_TU = 3242, PseudoVLOXEI64_V_M2_M1 = 3243, PseudoVLOXEI64_V_M2_M1_MASK = 3244, PseudoVLOXEI64_V_M2_M1_TU = 3245, PseudoVLOXEI64_V_M2_M2 = 3246, PseudoVLOXEI64_V_M2_M2_MASK = 3247, PseudoVLOXEI64_V_M2_M2_TU = 3248, PseudoVLOXEI64_V_M2_MF2 = 3249, PseudoVLOXEI64_V_M2_MF2_MASK = 3250, PseudoVLOXEI64_V_M2_MF2_TU = 3251, PseudoVLOXEI64_V_M2_MF4 = 3252, PseudoVLOXEI64_V_M2_MF4_MASK = 3253, PseudoVLOXEI64_V_M2_MF4_TU = 3254, PseudoVLOXEI64_V_M4_M1 = 3255, PseudoVLOXEI64_V_M4_M1_MASK = 3256, PseudoVLOXEI64_V_M4_M1_TU = 3257, PseudoVLOXEI64_V_M4_M2 = 3258, PseudoVLOXEI64_V_M4_M2_MASK = 3259, PseudoVLOXEI64_V_M4_M2_TU = 3260, PseudoVLOXEI64_V_M4_M4 = 3261, PseudoVLOXEI64_V_M4_M4_MASK = 3262, PseudoVLOXEI64_V_M4_M4_TU = 3263, PseudoVLOXEI64_V_M4_MF2 = 3264, PseudoVLOXEI64_V_M4_MF2_MASK = 3265, PseudoVLOXEI64_V_M4_MF2_TU = 3266, PseudoVLOXEI64_V_M8_M1 = 3267, PseudoVLOXEI64_V_M8_M1_MASK = 3268, PseudoVLOXEI64_V_M8_M1_TU = 3269, PseudoVLOXEI64_V_M8_M2 = 3270, PseudoVLOXEI64_V_M8_M2_MASK = 3271, PseudoVLOXEI64_V_M8_M2_TU = 3272, PseudoVLOXEI64_V_M8_M4 = 3273, PseudoVLOXEI64_V_M8_M4_MASK = 3274, PseudoVLOXEI64_V_M8_M4_TU = 3275, PseudoVLOXEI64_V_M8_M8 = 3276, PseudoVLOXEI64_V_M8_M8_MASK = 3277, PseudoVLOXEI64_V_M8_M8_TU = 3278, PseudoVLOXEI8_V_M1_M1 = 3279, PseudoVLOXEI8_V_M1_M1_MASK = 3280, PseudoVLOXEI8_V_M1_M1_TU = 3281, PseudoVLOXEI8_V_M1_M2 = 3282, PseudoVLOXEI8_V_M1_M2_MASK = 3283, PseudoVLOXEI8_V_M1_M2_TU = 3284, PseudoVLOXEI8_V_M1_M4 = 3285, PseudoVLOXEI8_V_M1_M4_MASK = 3286, PseudoVLOXEI8_V_M1_M4_TU = 3287, PseudoVLOXEI8_V_M1_M8 = 3288, PseudoVLOXEI8_V_M1_M8_MASK = 3289, PseudoVLOXEI8_V_M1_M8_TU = 3290, PseudoVLOXEI8_V_M2_M2 = 3291, PseudoVLOXEI8_V_M2_M2_MASK = 3292, PseudoVLOXEI8_V_M2_M2_TU = 3293, PseudoVLOXEI8_V_M2_M4 = 3294, PseudoVLOXEI8_V_M2_M4_MASK = 3295, PseudoVLOXEI8_V_M2_M4_TU = 3296, PseudoVLOXEI8_V_M2_M8 = 3297, PseudoVLOXEI8_V_M2_M8_MASK = 3298, PseudoVLOXEI8_V_M2_M8_TU = 3299, PseudoVLOXEI8_V_M4_M4 = 3300, PseudoVLOXEI8_V_M4_M4_MASK = 3301, PseudoVLOXEI8_V_M4_M4_TU = 3302, PseudoVLOXEI8_V_M4_M8 = 3303, PseudoVLOXEI8_V_M4_M8_MASK = 3304, PseudoVLOXEI8_V_M4_M8_TU = 3305, PseudoVLOXEI8_V_M8_M8 = 3306, PseudoVLOXEI8_V_M8_M8_MASK = 3307, PseudoVLOXEI8_V_M8_M8_TU = 3308, PseudoVLOXEI8_V_MF2_M1 = 3309, PseudoVLOXEI8_V_MF2_M1_MASK = 3310, PseudoVLOXEI8_V_MF2_M1_TU = 3311, PseudoVLOXEI8_V_MF2_M2 = 3312, PseudoVLOXEI8_V_MF2_M2_MASK = 3313, PseudoVLOXEI8_V_MF2_M2_TU = 3314, PseudoVLOXEI8_V_MF2_M4 = 3315, PseudoVLOXEI8_V_MF2_M4_MASK = 3316, PseudoVLOXEI8_V_MF2_M4_TU = 3317, PseudoVLOXEI8_V_MF2_MF2 = 3318, PseudoVLOXEI8_V_MF2_MF2_MASK = 3319, PseudoVLOXEI8_V_MF2_MF2_TU = 3320, PseudoVLOXEI8_V_MF4_M1 = 3321, PseudoVLOXEI8_V_MF4_M1_MASK = 3322, PseudoVLOXEI8_V_MF4_M1_TU = 3323, PseudoVLOXEI8_V_MF4_M2 = 3324, PseudoVLOXEI8_V_MF4_M2_MASK = 3325, PseudoVLOXEI8_V_MF4_M2_TU = 3326, PseudoVLOXEI8_V_MF4_MF2 = 3327, PseudoVLOXEI8_V_MF4_MF2_MASK = 3328, PseudoVLOXEI8_V_MF4_MF2_TU = 3329, PseudoVLOXEI8_V_MF4_MF4 = 3330, PseudoVLOXEI8_V_MF4_MF4_MASK = 3331, PseudoVLOXEI8_V_MF4_MF4_TU = 3332, PseudoVLOXEI8_V_MF8_M1 = 3333, PseudoVLOXEI8_V_MF8_M1_MASK = 3334, PseudoVLOXEI8_V_MF8_M1_TU = 3335, PseudoVLOXEI8_V_MF8_MF2 = 3336, PseudoVLOXEI8_V_MF8_MF2_MASK = 3337, PseudoVLOXEI8_V_MF8_MF2_TU = 3338, PseudoVLOXEI8_V_MF8_MF4 = 3339, PseudoVLOXEI8_V_MF8_MF4_MASK = 3340, PseudoVLOXEI8_V_MF8_MF4_TU = 3341, PseudoVLOXEI8_V_MF8_MF8 = 3342, PseudoVLOXEI8_V_MF8_MF8_MASK = 3343, PseudoVLOXEI8_V_MF8_MF8_TU = 3344, PseudoVLOXSEG2EI16_V_M1_M1 = 3345, PseudoVLOXSEG2EI16_V_M1_M1_MASK = 3346, PseudoVLOXSEG2EI16_V_M1_M1_TU = 3347, PseudoVLOXSEG2EI16_V_M1_M2 = 3348, PseudoVLOXSEG2EI16_V_M1_M2_MASK = 3349, PseudoVLOXSEG2EI16_V_M1_M2_TU = 3350, PseudoVLOXSEG2EI16_V_M1_M4 = 3351, PseudoVLOXSEG2EI16_V_M1_M4_MASK = 3352, PseudoVLOXSEG2EI16_V_M1_M4_TU = 3353, PseudoVLOXSEG2EI16_V_M1_MF2 = 3354, PseudoVLOXSEG2EI16_V_M1_MF2_MASK = 3355, PseudoVLOXSEG2EI16_V_M1_MF2_TU = 3356, PseudoVLOXSEG2EI16_V_M2_M1 = 3357, PseudoVLOXSEG2EI16_V_M2_M1_MASK = 3358, PseudoVLOXSEG2EI16_V_M2_M1_TU = 3359, PseudoVLOXSEG2EI16_V_M2_M2 = 3360, PseudoVLOXSEG2EI16_V_M2_M2_MASK = 3361, PseudoVLOXSEG2EI16_V_M2_M2_TU = 3362, PseudoVLOXSEG2EI16_V_M2_M4 = 3363, PseudoVLOXSEG2EI16_V_M2_M4_MASK = 3364, PseudoVLOXSEG2EI16_V_M2_M4_TU = 3365, PseudoVLOXSEG2EI16_V_M4_M2 = 3366, PseudoVLOXSEG2EI16_V_M4_M2_MASK = 3367, PseudoVLOXSEG2EI16_V_M4_M2_TU = 3368, PseudoVLOXSEG2EI16_V_M4_M4 = 3369, PseudoVLOXSEG2EI16_V_M4_M4_MASK = 3370, PseudoVLOXSEG2EI16_V_M4_M4_TU = 3371, PseudoVLOXSEG2EI16_V_M8_M4 = 3372, PseudoVLOXSEG2EI16_V_M8_M4_MASK = 3373, PseudoVLOXSEG2EI16_V_M8_M4_TU = 3374, PseudoVLOXSEG2EI16_V_MF2_M1 = 3375, PseudoVLOXSEG2EI16_V_MF2_M1_MASK = 3376, PseudoVLOXSEG2EI16_V_MF2_M1_TU = 3377, PseudoVLOXSEG2EI16_V_MF2_M2 = 3378, PseudoVLOXSEG2EI16_V_MF2_M2_MASK = 3379, PseudoVLOXSEG2EI16_V_MF2_M2_TU = 3380, PseudoVLOXSEG2EI16_V_MF2_MF2 = 3381, PseudoVLOXSEG2EI16_V_MF2_MF2_MASK = 3382, PseudoVLOXSEG2EI16_V_MF2_MF2_TU = 3383, PseudoVLOXSEG2EI16_V_MF2_MF4 = 3384, PseudoVLOXSEG2EI16_V_MF2_MF4_MASK = 3385, PseudoVLOXSEG2EI16_V_MF2_MF4_TU = 3386, PseudoVLOXSEG2EI16_V_MF4_M1 = 3387, PseudoVLOXSEG2EI16_V_MF4_M1_MASK = 3388, PseudoVLOXSEG2EI16_V_MF4_M1_TU = 3389, PseudoVLOXSEG2EI16_V_MF4_MF2 = 3390, PseudoVLOXSEG2EI16_V_MF4_MF2_MASK = 3391, PseudoVLOXSEG2EI16_V_MF4_MF2_TU = 3392, PseudoVLOXSEG2EI16_V_MF4_MF4 = 3393, PseudoVLOXSEG2EI16_V_MF4_MF4_MASK = 3394, PseudoVLOXSEG2EI16_V_MF4_MF4_TU = 3395, PseudoVLOXSEG2EI16_V_MF4_MF8 = 3396, PseudoVLOXSEG2EI16_V_MF4_MF8_MASK = 3397, PseudoVLOXSEG2EI16_V_MF4_MF8_TU = 3398, PseudoVLOXSEG2EI32_V_M1_M1 = 3399, PseudoVLOXSEG2EI32_V_M1_M1_MASK = 3400, PseudoVLOXSEG2EI32_V_M1_M1_TU = 3401, PseudoVLOXSEG2EI32_V_M1_M2 = 3402, PseudoVLOXSEG2EI32_V_M1_M2_MASK = 3403, PseudoVLOXSEG2EI32_V_M1_M2_TU = 3404, PseudoVLOXSEG2EI32_V_M1_MF2 = 3405, PseudoVLOXSEG2EI32_V_M1_MF2_MASK = 3406, PseudoVLOXSEG2EI32_V_M1_MF2_TU = 3407, PseudoVLOXSEG2EI32_V_M1_MF4 = 3408, PseudoVLOXSEG2EI32_V_M1_MF4_MASK = 3409, PseudoVLOXSEG2EI32_V_M1_MF4_TU = 3410, PseudoVLOXSEG2EI32_V_M2_M1 = 3411, PseudoVLOXSEG2EI32_V_M2_M1_MASK = 3412, PseudoVLOXSEG2EI32_V_M2_M1_TU = 3413, PseudoVLOXSEG2EI32_V_M2_M2 = 3414, PseudoVLOXSEG2EI32_V_M2_M2_MASK = 3415, PseudoVLOXSEG2EI32_V_M2_M2_TU = 3416, PseudoVLOXSEG2EI32_V_M2_M4 = 3417, PseudoVLOXSEG2EI32_V_M2_M4_MASK = 3418, PseudoVLOXSEG2EI32_V_M2_M4_TU = 3419, PseudoVLOXSEG2EI32_V_M2_MF2 = 3420, PseudoVLOXSEG2EI32_V_M2_MF2_MASK = 3421, PseudoVLOXSEG2EI32_V_M2_MF2_TU = 3422, PseudoVLOXSEG2EI32_V_M4_M1 = 3423, PseudoVLOXSEG2EI32_V_M4_M1_MASK = 3424, PseudoVLOXSEG2EI32_V_M4_M1_TU = 3425, PseudoVLOXSEG2EI32_V_M4_M2 = 3426, PseudoVLOXSEG2EI32_V_M4_M2_MASK = 3427, PseudoVLOXSEG2EI32_V_M4_M2_TU = 3428, PseudoVLOXSEG2EI32_V_M4_M4 = 3429, PseudoVLOXSEG2EI32_V_M4_M4_MASK = 3430, PseudoVLOXSEG2EI32_V_M4_M4_TU = 3431, PseudoVLOXSEG2EI32_V_M8_M2 = 3432, PseudoVLOXSEG2EI32_V_M8_M2_MASK = 3433, PseudoVLOXSEG2EI32_V_M8_M2_TU = 3434, PseudoVLOXSEG2EI32_V_M8_M4 = 3435, PseudoVLOXSEG2EI32_V_M8_M4_MASK = 3436, PseudoVLOXSEG2EI32_V_M8_M4_TU = 3437, PseudoVLOXSEG2EI32_V_MF2_M1 = 3438, PseudoVLOXSEG2EI32_V_MF2_M1_MASK = 3439, PseudoVLOXSEG2EI32_V_MF2_M1_TU = 3440, PseudoVLOXSEG2EI32_V_MF2_MF2 = 3441, PseudoVLOXSEG2EI32_V_MF2_MF2_MASK = 3442, PseudoVLOXSEG2EI32_V_MF2_MF2_TU = 3443, PseudoVLOXSEG2EI32_V_MF2_MF4 = 3444, PseudoVLOXSEG2EI32_V_MF2_MF4_MASK = 3445, PseudoVLOXSEG2EI32_V_MF2_MF4_TU = 3446, PseudoVLOXSEG2EI32_V_MF2_MF8 = 3447, PseudoVLOXSEG2EI32_V_MF2_MF8_MASK = 3448, PseudoVLOXSEG2EI32_V_MF2_MF8_TU = 3449, PseudoVLOXSEG2EI64_V_M1_M1 = 3450, PseudoVLOXSEG2EI64_V_M1_M1_MASK = 3451, PseudoVLOXSEG2EI64_V_M1_M1_TU = 3452, PseudoVLOXSEG2EI64_V_M1_MF2 = 3453, PseudoVLOXSEG2EI64_V_M1_MF2_MASK = 3454, PseudoVLOXSEG2EI64_V_M1_MF2_TU = 3455, PseudoVLOXSEG2EI64_V_M1_MF4 = 3456, PseudoVLOXSEG2EI64_V_M1_MF4_MASK = 3457, PseudoVLOXSEG2EI64_V_M1_MF4_TU = 3458, PseudoVLOXSEG2EI64_V_M1_MF8 = 3459, PseudoVLOXSEG2EI64_V_M1_MF8_MASK = 3460, PseudoVLOXSEG2EI64_V_M1_MF8_TU = 3461, PseudoVLOXSEG2EI64_V_M2_M1 = 3462, PseudoVLOXSEG2EI64_V_M2_M1_MASK = 3463, PseudoVLOXSEG2EI64_V_M2_M1_TU = 3464, PseudoVLOXSEG2EI64_V_M2_M2 = 3465, PseudoVLOXSEG2EI64_V_M2_M2_MASK = 3466, PseudoVLOXSEG2EI64_V_M2_M2_TU = 3467, PseudoVLOXSEG2EI64_V_M2_MF2 = 3468, PseudoVLOXSEG2EI64_V_M2_MF2_MASK = 3469, PseudoVLOXSEG2EI64_V_M2_MF2_TU = 3470, PseudoVLOXSEG2EI64_V_M2_MF4 = 3471, PseudoVLOXSEG2EI64_V_M2_MF4_MASK = 3472, PseudoVLOXSEG2EI64_V_M2_MF4_TU = 3473, PseudoVLOXSEG2EI64_V_M4_M1 = 3474, PseudoVLOXSEG2EI64_V_M4_M1_MASK = 3475, PseudoVLOXSEG2EI64_V_M4_M1_TU = 3476, PseudoVLOXSEG2EI64_V_M4_M2 = 3477, PseudoVLOXSEG2EI64_V_M4_M2_MASK = 3478, PseudoVLOXSEG2EI64_V_M4_M2_TU = 3479, PseudoVLOXSEG2EI64_V_M4_M4 = 3480, PseudoVLOXSEG2EI64_V_M4_M4_MASK = 3481, PseudoVLOXSEG2EI64_V_M4_M4_TU = 3482, PseudoVLOXSEG2EI64_V_M4_MF2 = 3483, PseudoVLOXSEG2EI64_V_M4_MF2_MASK = 3484, PseudoVLOXSEG2EI64_V_M4_MF2_TU = 3485, PseudoVLOXSEG2EI64_V_M8_M1 = 3486, PseudoVLOXSEG2EI64_V_M8_M1_MASK = 3487, PseudoVLOXSEG2EI64_V_M8_M1_TU = 3488, PseudoVLOXSEG2EI64_V_M8_M2 = 3489, PseudoVLOXSEG2EI64_V_M8_M2_MASK = 3490, PseudoVLOXSEG2EI64_V_M8_M2_TU = 3491, PseudoVLOXSEG2EI64_V_M8_M4 = 3492, PseudoVLOXSEG2EI64_V_M8_M4_MASK = 3493, PseudoVLOXSEG2EI64_V_M8_M4_TU = 3494, PseudoVLOXSEG2EI8_V_M1_M1 = 3495, PseudoVLOXSEG2EI8_V_M1_M1_MASK = 3496, PseudoVLOXSEG2EI8_V_M1_M1_TU = 3497, PseudoVLOXSEG2EI8_V_M1_M2 = 3498, PseudoVLOXSEG2EI8_V_M1_M2_MASK = 3499, PseudoVLOXSEG2EI8_V_M1_M2_TU = 3500, PseudoVLOXSEG2EI8_V_M1_M4 = 3501, PseudoVLOXSEG2EI8_V_M1_M4_MASK = 3502, PseudoVLOXSEG2EI8_V_M1_M4_TU = 3503, PseudoVLOXSEG2EI8_V_M2_M2 = 3504, PseudoVLOXSEG2EI8_V_M2_M2_MASK = 3505, PseudoVLOXSEG2EI8_V_M2_M2_TU = 3506, PseudoVLOXSEG2EI8_V_M2_M4 = 3507, PseudoVLOXSEG2EI8_V_M2_M4_MASK = 3508, PseudoVLOXSEG2EI8_V_M2_M4_TU = 3509, PseudoVLOXSEG2EI8_V_M4_M4 = 3510, PseudoVLOXSEG2EI8_V_M4_M4_MASK = 3511, PseudoVLOXSEG2EI8_V_M4_M4_TU = 3512, PseudoVLOXSEG2EI8_V_MF2_M1 = 3513, PseudoVLOXSEG2EI8_V_MF2_M1_MASK = 3514, PseudoVLOXSEG2EI8_V_MF2_M1_TU = 3515, PseudoVLOXSEG2EI8_V_MF2_M2 = 3516, PseudoVLOXSEG2EI8_V_MF2_M2_MASK = 3517, PseudoVLOXSEG2EI8_V_MF2_M2_TU = 3518, PseudoVLOXSEG2EI8_V_MF2_M4 = 3519, PseudoVLOXSEG2EI8_V_MF2_M4_MASK = 3520, PseudoVLOXSEG2EI8_V_MF2_M4_TU = 3521, PseudoVLOXSEG2EI8_V_MF2_MF2 = 3522, PseudoVLOXSEG2EI8_V_MF2_MF2_MASK = 3523, PseudoVLOXSEG2EI8_V_MF2_MF2_TU = 3524, PseudoVLOXSEG2EI8_V_MF4_M1 = 3525, PseudoVLOXSEG2EI8_V_MF4_M1_MASK = 3526, PseudoVLOXSEG2EI8_V_MF4_M1_TU = 3527, PseudoVLOXSEG2EI8_V_MF4_M2 = 3528, PseudoVLOXSEG2EI8_V_MF4_M2_MASK = 3529, PseudoVLOXSEG2EI8_V_MF4_M2_TU = 3530, PseudoVLOXSEG2EI8_V_MF4_MF2 = 3531, PseudoVLOXSEG2EI8_V_MF4_MF2_MASK = 3532, PseudoVLOXSEG2EI8_V_MF4_MF2_TU = 3533, PseudoVLOXSEG2EI8_V_MF4_MF4 = 3534, PseudoVLOXSEG2EI8_V_MF4_MF4_MASK = 3535, PseudoVLOXSEG2EI8_V_MF4_MF4_TU = 3536, PseudoVLOXSEG2EI8_V_MF8_M1 = 3537, PseudoVLOXSEG2EI8_V_MF8_M1_MASK = 3538, PseudoVLOXSEG2EI8_V_MF8_M1_TU = 3539, PseudoVLOXSEG2EI8_V_MF8_MF2 = 3540, PseudoVLOXSEG2EI8_V_MF8_MF2_MASK = 3541, PseudoVLOXSEG2EI8_V_MF8_MF2_TU = 3542, PseudoVLOXSEG2EI8_V_MF8_MF4 = 3543, PseudoVLOXSEG2EI8_V_MF8_MF4_MASK = 3544, PseudoVLOXSEG2EI8_V_MF8_MF4_TU = 3545, PseudoVLOXSEG2EI8_V_MF8_MF8 = 3546, PseudoVLOXSEG2EI8_V_MF8_MF8_MASK = 3547, PseudoVLOXSEG2EI8_V_MF8_MF8_TU = 3548, PseudoVLOXSEG3EI16_V_M1_M1 = 3549, PseudoVLOXSEG3EI16_V_M1_M1_MASK = 3550, PseudoVLOXSEG3EI16_V_M1_M1_TU = 3551, PseudoVLOXSEG3EI16_V_M1_M2 = 3552, PseudoVLOXSEG3EI16_V_M1_M2_MASK = 3553, PseudoVLOXSEG3EI16_V_M1_M2_TU = 3554, PseudoVLOXSEG3EI16_V_M1_MF2 = 3555, PseudoVLOXSEG3EI16_V_M1_MF2_MASK = 3556, PseudoVLOXSEG3EI16_V_M1_MF2_TU = 3557, PseudoVLOXSEG3EI16_V_M2_M1 = 3558, PseudoVLOXSEG3EI16_V_M2_M1_MASK = 3559, PseudoVLOXSEG3EI16_V_M2_M1_TU = 3560, PseudoVLOXSEG3EI16_V_M2_M2 = 3561, PseudoVLOXSEG3EI16_V_M2_M2_MASK = 3562, PseudoVLOXSEG3EI16_V_M2_M2_TU = 3563, PseudoVLOXSEG3EI16_V_M4_M2 = 3564, PseudoVLOXSEG3EI16_V_M4_M2_MASK = 3565, PseudoVLOXSEG3EI16_V_M4_M2_TU = 3566, PseudoVLOXSEG3EI16_V_MF2_M1 = 3567, PseudoVLOXSEG3EI16_V_MF2_M1_MASK = 3568, PseudoVLOXSEG3EI16_V_MF2_M1_TU = 3569, PseudoVLOXSEG3EI16_V_MF2_M2 = 3570, PseudoVLOXSEG3EI16_V_MF2_M2_MASK = 3571, PseudoVLOXSEG3EI16_V_MF2_M2_TU = 3572, PseudoVLOXSEG3EI16_V_MF2_MF2 = 3573, PseudoVLOXSEG3EI16_V_MF2_MF2_MASK = 3574, PseudoVLOXSEG3EI16_V_MF2_MF2_TU = 3575, PseudoVLOXSEG3EI16_V_MF2_MF4 = 3576, PseudoVLOXSEG3EI16_V_MF2_MF4_MASK = 3577, PseudoVLOXSEG3EI16_V_MF2_MF4_TU = 3578, PseudoVLOXSEG3EI16_V_MF4_M1 = 3579, PseudoVLOXSEG3EI16_V_MF4_M1_MASK = 3580, PseudoVLOXSEG3EI16_V_MF4_M1_TU = 3581, PseudoVLOXSEG3EI16_V_MF4_MF2 = 3582, PseudoVLOXSEG3EI16_V_MF4_MF2_MASK = 3583, PseudoVLOXSEG3EI16_V_MF4_MF2_TU = 3584, PseudoVLOXSEG3EI16_V_MF4_MF4 = 3585, PseudoVLOXSEG3EI16_V_MF4_MF4_MASK = 3586, PseudoVLOXSEG3EI16_V_MF4_MF4_TU = 3587, PseudoVLOXSEG3EI16_V_MF4_MF8 = 3588, PseudoVLOXSEG3EI16_V_MF4_MF8_MASK = 3589, PseudoVLOXSEG3EI16_V_MF4_MF8_TU = 3590, PseudoVLOXSEG3EI32_V_M1_M1 = 3591, PseudoVLOXSEG3EI32_V_M1_M1_MASK = 3592, PseudoVLOXSEG3EI32_V_M1_M1_TU = 3593, PseudoVLOXSEG3EI32_V_M1_M2 = 3594, PseudoVLOXSEG3EI32_V_M1_M2_MASK = 3595, PseudoVLOXSEG3EI32_V_M1_M2_TU = 3596, PseudoVLOXSEG3EI32_V_M1_MF2 = 3597, PseudoVLOXSEG3EI32_V_M1_MF2_MASK = 3598, PseudoVLOXSEG3EI32_V_M1_MF2_TU = 3599, PseudoVLOXSEG3EI32_V_M1_MF4 = 3600, PseudoVLOXSEG3EI32_V_M1_MF4_MASK = 3601, PseudoVLOXSEG3EI32_V_M1_MF4_TU = 3602, PseudoVLOXSEG3EI32_V_M2_M1 = 3603, PseudoVLOXSEG3EI32_V_M2_M1_MASK = 3604, PseudoVLOXSEG3EI32_V_M2_M1_TU = 3605, PseudoVLOXSEG3EI32_V_M2_M2 = 3606, PseudoVLOXSEG3EI32_V_M2_M2_MASK = 3607, PseudoVLOXSEG3EI32_V_M2_M2_TU = 3608, PseudoVLOXSEG3EI32_V_M2_MF2 = 3609, PseudoVLOXSEG3EI32_V_M2_MF2_MASK = 3610, PseudoVLOXSEG3EI32_V_M2_MF2_TU = 3611, PseudoVLOXSEG3EI32_V_M4_M1 = 3612, PseudoVLOXSEG3EI32_V_M4_M1_MASK = 3613, PseudoVLOXSEG3EI32_V_M4_M1_TU = 3614, PseudoVLOXSEG3EI32_V_M4_M2 = 3615, PseudoVLOXSEG3EI32_V_M4_M2_MASK = 3616, PseudoVLOXSEG3EI32_V_M4_M2_TU = 3617, PseudoVLOXSEG3EI32_V_M8_M2 = 3618, PseudoVLOXSEG3EI32_V_M8_M2_MASK = 3619, PseudoVLOXSEG3EI32_V_M8_M2_TU = 3620, PseudoVLOXSEG3EI32_V_MF2_M1 = 3621, PseudoVLOXSEG3EI32_V_MF2_M1_MASK = 3622, PseudoVLOXSEG3EI32_V_MF2_M1_TU = 3623, PseudoVLOXSEG3EI32_V_MF2_MF2 = 3624, PseudoVLOXSEG3EI32_V_MF2_MF2_MASK = 3625, PseudoVLOXSEG3EI32_V_MF2_MF2_TU = 3626, PseudoVLOXSEG3EI32_V_MF2_MF4 = 3627, PseudoVLOXSEG3EI32_V_MF2_MF4_MASK = 3628, PseudoVLOXSEG3EI32_V_MF2_MF4_TU = 3629, PseudoVLOXSEG3EI32_V_MF2_MF8 = 3630, PseudoVLOXSEG3EI32_V_MF2_MF8_MASK = 3631, PseudoVLOXSEG3EI32_V_MF2_MF8_TU = 3632, PseudoVLOXSEG3EI64_V_M1_M1 = 3633, PseudoVLOXSEG3EI64_V_M1_M1_MASK = 3634, PseudoVLOXSEG3EI64_V_M1_M1_TU = 3635, PseudoVLOXSEG3EI64_V_M1_MF2 = 3636, PseudoVLOXSEG3EI64_V_M1_MF2_MASK = 3637, PseudoVLOXSEG3EI64_V_M1_MF2_TU = 3638, PseudoVLOXSEG3EI64_V_M1_MF4 = 3639, PseudoVLOXSEG3EI64_V_M1_MF4_MASK = 3640, PseudoVLOXSEG3EI64_V_M1_MF4_TU = 3641, PseudoVLOXSEG3EI64_V_M1_MF8 = 3642, PseudoVLOXSEG3EI64_V_M1_MF8_MASK = 3643, PseudoVLOXSEG3EI64_V_M1_MF8_TU = 3644, PseudoVLOXSEG3EI64_V_M2_M1 = 3645, PseudoVLOXSEG3EI64_V_M2_M1_MASK = 3646, PseudoVLOXSEG3EI64_V_M2_M1_TU = 3647, PseudoVLOXSEG3EI64_V_M2_M2 = 3648, PseudoVLOXSEG3EI64_V_M2_M2_MASK = 3649, PseudoVLOXSEG3EI64_V_M2_M2_TU = 3650, PseudoVLOXSEG3EI64_V_M2_MF2 = 3651, PseudoVLOXSEG3EI64_V_M2_MF2_MASK = 3652, PseudoVLOXSEG3EI64_V_M2_MF2_TU = 3653, PseudoVLOXSEG3EI64_V_M2_MF4 = 3654, PseudoVLOXSEG3EI64_V_M2_MF4_MASK = 3655, PseudoVLOXSEG3EI64_V_M2_MF4_TU = 3656, PseudoVLOXSEG3EI64_V_M4_M1 = 3657, PseudoVLOXSEG3EI64_V_M4_M1_MASK = 3658, PseudoVLOXSEG3EI64_V_M4_M1_TU = 3659, PseudoVLOXSEG3EI64_V_M4_M2 = 3660, PseudoVLOXSEG3EI64_V_M4_M2_MASK = 3661, PseudoVLOXSEG3EI64_V_M4_M2_TU = 3662, PseudoVLOXSEG3EI64_V_M4_MF2 = 3663, PseudoVLOXSEG3EI64_V_M4_MF2_MASK = 3664, PseudoVLOXSEG3EI64_V_M4_MF2_TU = 3665, PseudoVLOXSEG3EI64_V_M8_M1 = 3666, PseudoVLOXSEG3EI64_V_M8_M1_MASK = 3667, PseudoVLOXSEG3EI64_V_M8_M1_TU = 3668, PseudoVLOXSEG3EI64_V_M8_M2 = 3669, PseudoVLOXSEG3EI64_V_M8_M2_MASK = 3670, PseudoVLOXSEG3EI64_V_M8_M2_TU = 3671, PseudoVLOXSEG3EI8_V_M1_M1 = 3672, PseudoVLOXSEG3EI8_V_M1_M1_MASK = 3673, PseudoVLOXSEG3EI8_V_M1_M1_TU = 3674, PseudoVLOXSEG3EI8_V_M1_M2 = 3675, PseudoVLOXSEG3EI8_V_M1_M2_MASK = 3676, PseudoVLOXSEG3EI8_V_M1_M2_TU = 3677, PseudoVLOXSEG3EI8_V_M2_M2 = 3678, PseudoVLOXSEG3EI8_V_M2_M2_MASK = 3679, PseudoVLOXSEG3EI8_V_M2_M2_TU = 3680, PseudoVLOXSEG3EI8_V_MF2_M1 = 3681, PseudoVLOXSEG3EI8_V_MF2_M1_MASK = 3682, PseudoVLOXSEG3EI8_V_MF2_M1_TU = 3683, PseudoVLOXSEG3EI8_V_MF2_M2 = 3684, PseudoVLOXSEG3EI8_V_MF2_M2_MASK = 3685, PseudoVLOXSEG3EI8_V_MF2_M2_TU = 3686, PseudoVLOXSEG3EI8_V_MF2_MF2 = 3687, PseudoVLOXSEG3EI8_V_MF2_MF2_MASK = 3688, PseudoVLOXSEG3EI8_V_MF2_MF2_TU = 3689, PseudoVLOXSEG3EI8_V_MF4_M1 = 3690, PseudoVLOXSEG3EI8_V_MF4_M1_MASK = 3691, PseudoVLOXSEG3EI8_V_MF4_M1_TU = 3692, PseudoVLOXSEG3EI8_V_MF4_M2 = 3693, PseudoVLOXSEG3EI8_V_MF4_M2_MASK = 3694, PseudoVLOXSEG3EI8_V_MF4_M2_TU = 3695, PseudoVLOXSEG3EI8_V_MF4_MF2 = 3696, PseudoVLOXSEG3EI8_V_MF4_MF2_MASK = 3697, PseudoVLOXSEG3EI8_V_MF4_MF2_TU = 3698, PseudoVLOXSEG3EI8_V_MF4_MF4 = 3699, PseudoVLOXSEG3EI8_V_MF4_MF4_MASK = 3700, PseudoVLOXSEG3EI8_V_MF4_MF4_TU = 3701, PseudoVLOXSEG3EI8_V_MF8_M1 = 3702, PseudoVLOXSEG3EI8_V_MF8_M1_MASK = 3703, PseudoVLOXSEG3EI8_V_MF8_M1_TU = 3704, PseudoVLOXSEG3EI8_V_MF8_MF2 = 3705, PseudoVLOXSEG3EI8_V_MF8_MF2_MASK = 3706, PseudoVLOXSEG3EI8_V_MF8_MF2_TU = 3707, PseudoVLOXSEG3EI8_V_MF8_MF4 = 3708, PseudoVLOXSEG3EI8_V_MF8_MF4_MASK = 3709, PseudoVLOXSEG3EI8_V_MF8_MF4_TU = 3710, PseudoVLOXSEG3EI8_V_MF8_MF8 = 3711, PseudoVLOXSEG3EI8_V_MF8_MF8_MASK = 3712, PseudoVLOXSEG3EI8_V_MF8_MF8_TU = 3713, PseudoVLOXSEG4EI16_V_M1_M1 = 3714, PseudoVLOXSEG4EI16_V_M1_M1_MASK = 3715, PseudoVLOXSEG4EI16_V_M1_M1_TU = 3716, PseudoVLOXSEG4EI16_V_M1_M2 = 3717, PseudoVLOXSEG4EI16_V_M1_M2_MASK = 3718, PseudoVLOXSEG4EI16_V_M1_M2_TU = 3719, PseudoVLOXSEG4EI16_V_M1_MF2 = 3720, PseudoVLOXSEG4EI16_V_M1_MF2_MASK = 3721, PseudoVLOXSEG4EI16_V_M1_MF2_TU = 3722, PseudoVLOXSEG4EI16_V_M2_M1 = 3723, PseudoVLOXSEG4EI16_V_M2_M1_MASK = 3724, PseudoVLOXSEG4EI16_V_M2_M1_TU = 3725, PseudoVLOXSEG4EI16_V_M2_M2 = 3726, PseudoVLOXSEG4EI16_V_M2_M2_MASK = 3727, PseudoVLOXSEG4EI16_V_M2_M2_TU = 3728, PseudoVLOXSEG4EI16_V_M4_M2 = 3729, PseudoVLOXSEG4EI16_V_M4_M2_MASK = 3730, PseudoVLOXSEG4EI16_V_M4_M2_TU = 3731, PseudoVLOXSEG4EI16_V_MF2_M1 = 3732, PseudoVLOXSEG4EI16_V_MF2_M1_MASK = 3733, PseudoVLOXSEG4EI16_V_MF2_M1_TU = 3734, PseudoVLOXSEG4EI16_V_MF2_M2 = 3735, PseudoVLOXSEG4EI16_V_MF2_M2_MASK = 3736, PseudoVLOXSEG4EI16_V_MF2_M2_TU = 3737, PseudoVLOXSEG4EI16_V_MF2_MF2 = 3738, PseudoVLOXSEG4EI16_V_MF2_MF2_MASK = 3739, PseudoVLOXSEG4EI16_V_MF2_MF2_TU = 3740, PseudoVLOXSEG4EI16_V_MF2_MF4 = 3741, PseudoVLOXSEG4EI16_V_MF2_MF4_MASK = 3742, PseudoVLOXSEG4EI16_V_MF2_MF4_TU = 3743, PseudoVLOXSEG4EI16_V_MF4_M1 = 3744, PseudoVLOXSEG4EI16_V_MF4_M1_MASK = 3745, PseudoVLOXSEG4EI16_V_MF4_M1_TU = 3746, PseudoVLOXSEG4EI16_V_MF4_MF2 = 3747, PseudoVLOXSEG4EI16_V_MF4_MF2_MASK = 3748, PseudoVLOXSEG4EI16_V_MF4_MF2_TU = 3749, PseudoVLOXSEG4EI16_V_MF4_MF4 = 3750, PseudoVLOXSEG4EI16_V_MF4_MF4_MASK = 3751, PseudoVLOXSEG4EI16_V_MF4_MF4_TU = 3752, PseudoVLOXSEG4EI16_V_MF4_MF8 = 3753, PseudoVLOXSEG4EI16_V_MF4_MF8_MASK = 3754, PseudoVLOXSEG4EI16_V_MF4_MF8_TU = 3755, PseudoVLOXSEG4EI32_V_M1_M1 = 3756, PseudoVLOXSEG4EI32_V_M1_M1_MASK = 3757, PseudoVLOXSEG4EI32_V_M1_M1_TU = 3758, PseudoVLOXSEG4EI32_V_M1_M2 = 3759, PseudoVLOXSEG4EI32_V_M1_M2_MASK = 3760, PseudoVLOXSEG4EI32_V_M1_M2_TU = 3761, PseudoVLOXSEG4EI32_V_M1_MF2 = 3762, PseudoVLOXSEG4EI32_V_M1_MF2_MASK = 3763, PseudoVLOXSEG4EI32_V_M1_MF2_TU = 3764, PseudoVLOXSEG4EI32_V_M1_MF4 = 3765, PseudoVLOXSEG4EI32_V_M1_MF4_MASK = 3766, PseudoVLOXSEG4EI32_V_M1_MF4_TU = 3767, PseudoVLOXSEG4EI32_V_M2_M1 = 3768, PseudoVLOXSEG4EI32_V_M2_M1_MASK = 3769, PseudoVLOXSEG4EI32_V_M2_M1_TU = 3770, PseudoVLOXSEG4EI32_V_M2_M2 = 3771, PseudoVLOXSEG4EI32_V_M2_M2_MASK = 3772, PseudoVLOXSEG4EI32_V_M2_M2_TU = 3773, PseudoVLOXSEG4EI32_V_M2_MF2 = 3774, PseudoVLOXSEG4EI32_V_M2_MF2_MASK = 3775, PseudoVLOXSEG4EI32_V_M2_MF2_TU = 3776, PseudoVLOXSEG4EI32_V_M4_M1 = 3777, PseudoVLOXSEG4EI32_V_M4_M1_MASK = 3778, PseudoVLOXSEG4EI32_V_M4_M1_TU = 3779, PseudoVLOXSEG4EI32_V_M4_M2 = 3780, PseudoVLOXSEG4EI32_V_M4_M2_MASK = 3781, PseudoVLOXSEG4EI32_V_M4_M2_TU = 3782, PseudoVLOXSEG4EI32_V_M8_M2 = 3783, PseudoVLOXSEG4EI32_V_M8_M2_MASK = 3784, PseudoVLOXSEG4EI32_V_M8_M2_TU = 3785, PseudoVLOXSEG4EI32_V_MF2_M1 = 3786, PseudoVLOXSEG4EI32_V_MF2_M1_MASK = 3787, PseudoVLOXSEG4EI32_V_MF2_M1_TU = 3788, PseudoVLOXSEG4EI32_V_MF2_MF2 = 3789, PseudoVLOXSEG4EI32_V_MF2_MF2_MASK = 3790, PseudoVLOXSEG4EI32_V_MF2_MF2_TU = 3791, PseudoVLOXSEG4EI32_V_MF2_MF4 = 3792, PseudoVLOXSEG4EI32_V_MF2_MF4_MASK = 3793, PseudoVLOXSEG4EI32_V_MF2_MF4_TU = 3794, PseudoVLOXSEG4EI32_V_MF2_MF8 = 3795, PseudoVLOXSEG4EI32_V_MF2_MF8_MASK = 3796, PseudoVLOXSEG4EI32_V_MF2_MF8_TU = 3797, PseudoVLOXSEG4EI64_V_M1_M1 = 3798, PseudoVLOXSEG4EI64_V_M1_M1_MASK = 3799, PseudoVLOXSEG4EI64_V_M1_M1_TU = 3800, PseudoVLOXSEG4EI64_V_M1_MF2 = 3801, PseudoVLOXSEG4EI64_V_M1_MF2_MASK = 3802, PseudoVLOXSEG4EI64_V_M1_MF2_TU = 3803, PseudoVLOXSEG4EI64_V_M1_MF4 = 3804, PseudoVLOXSEG4EI64_V_M1_MF4_MASK = 3805, PseudoVLOXSEG4EI64_V_M1_MF4_TU = 3806, PseudoVLOXSEG4EI64_V_M1_MF8 = 3807, PseudoVLOXSEG4EI64_V_M1_MF8_MASK = 3808, PseudoVLOXSEG4EI64_V_M1_MF8_TU = 3809, PseudoVLOXSEG4EI64_V_M2_M1 = 3810, PseudoVLOXSEG4EI64_V_M2_M1_MASK = 3811, PseudoVLOXSEG4EI64_V_M2_M1_TU = 3812, PseudoVLOXSEG4EI64_V_M2_M2 = 3813, PseudoVLOXSEG4EI64_V_M2_M2_MASK = 3814, PseudoVLOXSEG4EI64_V_M2_M2_TU = 3815, PseudoVLOXSEG4EI64_V_M2_MF2 = 3816, PseudoVLOXSEG4EI64_V_M2_MF2_MASK = 3817, PseudoVLOXSEG4EI64_V_M2_MF2_TU = 3818, PseudoVLOXSEG4EI64_V_M2_MF4 = 3819, PseudoVLOXSEG4EI64_V_M2_MF4_MASK = 3820, PseudoVLOXSEG4EI64_V_M2_MF4_TU = 3821, PseudoVLOXSEG4EI64_V_M4_M1 = 3822, PseudoVLOXSEG4EI64_V_M4_M1_MASK = 3823, PseudoVLOXSEG4EI64_V_M4_M1_TU = 3824, PseudoVLOXSEG4EI64_V_M4_M2 = 3825, PseudoVLOXSEG4EI64_V_M4_M2_MASK = 3826, PseudoVLOXSEG4EI64_V_M4_M2_TU = 3827, PseudoVLOXSEG4EI64_V_M4_MF2 = 3828, PseudoVLOXSEG4EI64_V_M4_MF2_MASK = 3829, PseudoVLOXSEG4EI64_V_M4_MF2_TU = 3830, PseudoVLOXSEG4EI64_V_M8_M1 = 3831, PseudoVLOXSEG4EI64_V_M8_M1_MASK = 3832, PseudoVLOXSEG4EI64_V_M8_M1_TU = 3833, PseudoVLOXSEG4EI64_V_M8_M2 = 3834, PseudoVLOXSEG4EI64_V_M8_M2_MASK = 3835, PseudoVLOXSEG4EI64_V_M8_M2_TU = 3836, PseudoVLOXSEG4EI8_V_M1_M1 = 3837, PseudoVLOXSEG4EI8_V_M1_M1_MASK = 3838, PseudoVLOXSEG4EI8_V_M1_M1_TU = 3839, PseudoVLOXSEG4EI8_V_M1_M2 = 3840, PseudoVLOXSEG4EI8_V_M1_M2_MASK = 3841, PseudoVLOXSEG4EI8_V_M1_M2_TU = 3842, PseudoVLOXSEG4EI8_V_M2_M2 = 3843, PseudoVLOXSEG4EI8_V_M2_M2_MASK = 3844, PseudoVLOXSEG4EI8_V_M2_M2_TU = 3845, PseudoVLOXSEG4EI8_V_MF2_M1 = 3846, PseudoVLOXSEG4EI8_V_MF2_M1_MASK = 3847, PseudoVLOXSEG4EI8_V_MF2_M1_TU = 3848, PseudoVLOXSEG4EI8_V_MF2_M2 = 3849, PseudoVLOXSEG4EI8_V_MF2_M2_MASK = 3850, PseudoVLOXSEG4EI8_V_MF2_M2_TU = 3851, PseudoVLOXSEG4EI8_V_MF2_MF2 = 3852, PseudoVLOXSEG4EI8_V_MF2_MF2_MASK = 3853, PseudoVLOXSEG4EI8_V_MF2_MF2_TU = 3854, PseudoVLOXSEG4EI8_V_MF4_M1 = 3855, PseudoVLOXSEG4EI8_V_MF4_M1_MASK = 3856, PseudoVLOXSEG4EI8_V_MF4_M1_TU = 3857, PseudoVLOXSEG4EI8_V_MF4_M2 = 3858, PseudoVLOXSEG4EI8_V_MF4_M2_MASK = 3859, PseudoVLOXSEG4EI8_V_MF4_M2_TU = 3860, PseudoVLOXSEG4EI8_V_MF4_MF2 = 3861, PseudoVLOXSEG4EI8_V_MF4_MF2_MASK = 3862, PseudoVLOXSEG4EI8_V_MF4_MF2_TU = 3863, PseudoVLOXSEG4EI8_V_MF4_MF4 = 3864, PseudoVLOXSEG4EI8_V_MF4_MF4_MASK = 3865, PseudoVLOXSEG4EI8_V_MF4_MF4_TU = 3866, PseudoVLOXSEG4EI8_V_MF8_M1 = 3867, PseudoVLOXSEG4EI8_V_MF8_M1_MASK = 3868, PseudoVLOXSEG4EI8_V_MF8_M1_TU = 3869, PseudoVLOXSEG4EI8_V_MF8_MF2 = 3870, PseudoVLOXSEG4EI8_V_MF8_MF2_MASK = 3871, PseudoVLOXSEG4EI8_V_MF8_MF2_TU = 3872, PseudoVLOXSEG4EI8_V_MF8_MF4 = 3873, PseudoVLOXSEG4EI8_V_MF8_MF4_MASK = 3874, PseudoVLOXSEG4EI8_V_MF8_MF4_TU = 3875, PseudoVLOXSEG4EI8_V_MF8_MF8 = 3876, PseudoVLOXSEG4EI8_V_MF8_MF8_MASK = 3877, PseudoVLOXSEG4EI8_V_MF8_MF8_TU = 3878, PseudoVLOXSEG5EI16_V_M1_M1 = 3879, PseudoVLOXSEG5EI16_V_M1_M1_MASK = 3880, PseudoVLOXSEG5EI16_V_M1_M1_TU = 3881, PseudoVLOXSEG5EI16_V_M1_MF2 = 3882, PseudoVLOXSEG5EI16_V_M1_MF2_MASK = 3883, PseudoVLOXSEG5EI16_V_M1_MF2_TU = 3884, PseudoVLOXSEG5EI16_V_M2_M1 = 3885, PseudoVLOXSEG5EI16_V_M2_M1_MASK = 3886, PseudoVLOXSEG5EI16_V_M2_M1_TU = 3887, PseudoVLOXSEG5EI16_V_MF2_M1 = 3888, PseudoVLOXSEG5EI16_V_MF2_M1_MASK = 3889, PseudoVLOXSEG5EI16_V_MF2_M1_TU = 3890, PseudoVLOXSEG5EI16_V_MF2_MF2 = 3891, PseudoVLOXSEG5EI16_V_MF2_MF2_MASK = 3892, PseudoVLOXSEG5EI16_V_MF2_MF2_TU = 3893, PseudoVLOXSEG5EI16_V_MF2_MF4 = 3894, PseudoVLOXSEG5EI16_V_MF2_MF4_MASK = 3895, PseudoVLOXSEG5EI16_V_MF2_MF4_TU = 3896, PseudoVLOXSEG5EI16_V_MF4_M1 = 3897, PseudoVLOXSEG5EI16_V_MF4_M1_MASK = 3898, PseudoVLOXSEG5EI16_V_MF4_M1_TU = 3899, PseudoVLOXSEG5EI16_V_MF4_MF2 = 3900, PseudoVLOXSEG5EI16_V_MF4_MF2_MASK = 3901, PseudoVLOXSEG5EI16_V_MF4_MF2_TU = 3902, PseudoVLOXSEG5EI16_V_MF4_MF4 = 3903, PseudoVLOXSEG5EI16_V_MF4_MF4_MASK = 3904, PseudoVLOXSEG5EI16_V_MF4_MF4_TU = 3905, PseudoVLOXSEG5EI16_V_MF4_MF8 = 3906, PseudoVLOXSEG5EI16_V_MF4_MF8_MASK = 3907, PseudoVLOXSEG5EI16_V_MF4_MF8_TU = 3908, PseudoVLOXSEG5EI32_V_M1_M1 = 3909, PseudoVLOXSEG5EI32_V_M1_M1_MASK = 3910, PseudoVLOXSEG5EI32_V_M1_M1_TU = 3911, PseudoVLOXSEG5EI32_V_M1_MF2 = 3912, PseudoVLOXSEG5EI32_V_M1_MF2_MASK = 3913, PseudoVLOXSEG5EI32_V_M1_MF2_TU = 3914, PseudoVLOXSEG5EI32_V_M1_MF4 = 3915, PseudoVLOXSEG5EI32_V_M1_MF4_MASK = 3916, PseudoVLOXSEG5EI32_V_M1_MF4_TU = 3917, PseudoVLOXSEG5EI32_V_M2_M1 = 3918, PseudoVLOXSEG5EI32_V_M2_M1_MASK = 3919, PseudoVLOXSEG5EI32_V_M2_M1_TU = 3920, PseudoVLOXSEG5EI32_V_M2_MF2 = 3921, PseudoVLOXSEG5EI32_V_M2_MF2_MASK = 3922, PseudoVLOXSEG5EI32_V_M2_MF2_TU = 3923, PseudoVLOXSEG5EI32_V_M4_M1 = 3924, PseudoVLOXSEG5EI32_V_M4_M1_MASK = 3925, PseudoVLOXSEG5EI32_V_M4_M1_TU = 3926, PseudoVLOXSEG5EI32_V_MF2_M1 = 3927, PseudoVLOXSEG5EI32_V_MF2_M1_MASK = 3928, PseudoVLOXSEG5EI32_V_MF2_M1_TU = 3929, PseudoVLOXSEG5EI32_V_MF2_MF2 = 3930, PseudoVLOXSEG5EI32_V_MF2_MF2_MASK = 3931, PseudoVLOXSEG5EI32_V_MF2_MF2_TU = 3932, PseudoVLOXSEG5EI32_V_MF2_MF4 = 3933, PseudoVLOXSEG5EI32_V_MF2_MF4_MASK = 3934, PseudoVLOXSEG5EI32_V_MF2_MF4_TU = 3935, PseudoVLOXSEG5EI32_V_MF2_MF8 = 3936, PseudoVLOXSEG5EI32_V_MF2_MF8_MASK = 3937, PseudoVLOXSEG5EI32_V_MF2_MF8_TU = 3938, PseudoVLOXSEG5EI64_V_M1_M1 = 3939, PseudoVLOXSEG5EI64_V_M1_M1_MASK = 3940, PseudoVLOXSEG5EI64_V_M1_M1_TU = 3941, PseudoVLOXSEG5EI64_V_M1_MF2 = 3942, PseudoVLOXSEG5EI64_V_M1_MF2_MASK = 3943, PseudoVLOXSEG5EI64_V_M1_MF2_TU = 3944, PseudoVLOXSEG5EI64_V_M1_MF4 = 3945, PseudoVLOXSEG5EI64_V_M1_MF4_MASK = 3946, PseudoVLOXSEG5EI64_V_M1_MF4_TU = 3947, PseudoVLOXSEG5EI64_V_M1_MF8 = 3948, PseudoVLOXSEG5EI64_V_M1_MF8_MASK = 3949, PseudoVLOXSEG5EI64_V_M1_MF8_TU = 3950, PseudoVLOXSEG5EI64_V_M2_M1 = 3951, PseudoVLOXSEG5EI64_V_M2_M1_MASK = 3952, PseudoVLOXSEG5EI64_V_M2_M1_TU = 3953, PseudoVLOXSEG5EI64_V_M2_MF2 = 3954, PseudoVLOXSEG5EI64_V_M2_MF2_MASK = 3955, PseudoVLOXSEG5EI64_V_M2_MF2_TU = 3956, PseudoVLOXSEG5EI64_V_M2_MF4 = 3957, PseudoVLOXSEG5EI64_V_M2_MF4_MASK = 3958, PseudoVLOXSEG5EI64_V_M2_MF4_TU = 3959, PseudoVLOXSEG5EI64_V_M4_M1 = 3960, PseudoVLOXSEG5EI64_V_M4_M1_MASK = 3961, PseudoVLOXSEG5EI64_V_M4_M1_TU = 3962, PseudoVLOXSEG5EI64_V_M4_MF2 = 3963, PseudoVLOXSEG5EI64_V_M4_MF2_MASK = 3964, PseudoVLOXSEG5EI64_V_M4_MF2_TU = 3965, PseudoVLOXSEG5EI64_V_M8_M1 = 3966, PseudoVLOXSEG5EI64_V_M8_M1_MASK = 3967, PseudoVLOXSEG5EI64_V_M8_M1_TU = 3968, PseudoVLOXSEG5EI8_V_M1_M1 = 3969, PseudoVLOXSEG5EI8_V_M1_M1_MASK = 3970, PseudoVLOXSEG5EI8_V_M1_M1_TU = 3971, PseudoVLOXSEG5EI8_V_MF2_M1 = 3972, PseudoVLOXSEG5EI8_V_MF2_M1_MASK = 3973, PseudoVLOXSEG5EI8_V_MF2_M1_TU = 3974, PseudoVLOXSEG5EI8_V_MF2_MF2 = 3975, PseudoVLOXSEG5EI8_V_MF2_MF2_MASK = 3976, PseudoVLOXSEG5EI8_V_MF2_MF2_TU = 3977, PseudoVLOXSEG5EI8_V_MF4_M1 = 3978, PseudoVLOXSEG5EI8_V_MF4_M1_MASK = 3979, PseudoVLOXSEG5EI8_V_MF4_M1_TU = 3980, PseudoVLOXSEG5EI8_V_MF4_MF2 = 3981, PseudoVLOXSEG5EI8_V_MF4_MF2_MASK = 3982, PseudoVLOXSEG5EI8_V_MF4_MF2_TU = 3983, PseudoVLOXSEG5EI8_V_MF4_MF4 = 3984, PseudoVLOXSEG5EI8_V_MF4_MF4_MASK = 3985, PseudoVLOXSEG5EI8_V_MF4_MF4_TU = 3986, PseudoVLOXSEG5EI8_V_MF8_M1 = 3987, PseudoVLOXSEG5EI8_V_MF8_M1_MASK = 3988, PseudoVLOXSEG5EI8_V_MF8_M1_TU = 3989, PseudoVLOXSEG5EI8_V_MF8_MF2 = 3990, PseudoVLOXSEG5EI8_V_MF8_MF2_MASK = 3991, PseudoVLOXSEG5EI8_V_MF8_MF2_TU = 3992, PseudoVLOXSEG5EI8_V_MF8_MF4 = 3993, PseudoVLOXSEG5EI8_V_MF8_MF4_MASK = 3994, PseudoVLOXSEG5EI8_V_MF8_MF4_TU = 3995, PseudoVLOXSEG5EI8_V_MF8_MF8 = 3996, PseudoVLOXSEG5EI8_V_MF8_MF8_MASK = 3997, PseudoVLOXSEG5EI8_V_MF8_MF8_TU = 3998, PseudoVLOXSEG6EI16_V_M1_M1 = 3999, PseudoVLOXSEG6EI16_V_M1_M1_MASK = 4000, PseudoVLOXSEG6EI16_V_M1_M1_TU = 4001, PseudoVLOXSEG6EI16_V_M1_MF2 = 4002, PseudoVLOXSEG6EI16_V_M1_MF2_MASK = 4003, PseudoVLOXSEG6EI16_V_M1_MF2_TU = 4004, PseudoVLOXSEG6EI16_V_M2_M1 = 4005, PseudoVLOXSEG6EI16_V_M2_M1_MASK = 4006, PseudoVLOXSEG6EI16_V_M2_M1_TU = 4007, PseudoVLOXSEG6EI16_V_MF2_M1 = 4008, PseudoVLOXSEG6EI16_V_MF2_M1_MASK = 4009, PseudoVLOXSEG6EI16_V_MF2_M1_TU = 4010, PseudoVLOXSEG6EI16_V_MF2_MF2 = 4011, PseudoVLOXSEG6EI16_V_MF2_MF2_MASK = 4012, PseudoVLOXSEG6EI16_V_MF2_MF2_TU = 4013, PseudoVLOXSEG6EI16_V_MF2_MF4 = 4014, PseudoVLOXSEG6EI16_V_MF2_MF4_MASK = 4015, PseudoVLOXSEG6EI16_V_MF2_MF4_TU = 4016, PseudoVLOXSEG6EI16_V_MF4_M1 = 4017, PseudoVLOXSEG6EI16_V_MF4_M1_MASK = 4018, PseudoVLOXSEG6EI16_V_MF4_M1_TU = 4019, PseudoVLOXSEG6EI16_V_MF4_MF2 = 4020, PseudoVLOXSEG6EI16_V_MF4_MF2_MASK = 4021, PseudoVLOXSEG6EI16_V_MF4_MF2_TU = 4022, PseudoVLOXSEG6EI16_V_MF4_MF4 = 4023, PseudoVLOXSEG6EI16_V_MF4_MF4_MASK = 4024, PseudoVLOXSEG6EI16_V_MF4_MF4_TU = 4025, PseudoVLOXSEG6EI16_V_MF4_MF8 = 4026, PseudoVLOXSEG6EI16_V_MF4_MF8_MASK = 4027, PseudoVLOXSEG6EI16_V_MF4_MF8_TU = 4028, PseudoVLOXSEG6EI32_V_M1_M1 = 4029, PseudoVLOXSEG6EI32_V_M1_M1_MASK = 4030, PseudoVLOXSEG6EI32_V_M1_M1_TU = 4031, PseudoVLOXSEG6EI32_V_M1_MF2 = 4032, PseudoVLOXSEG6EI32_V_M1_MF2_MASK = 4033, PseudoVLOXSEG6EI32_V_M1_MF2_TU = 4034, PseudoVLOXSEG6EI32_V_M1_MF4 = 4035, PseudoVLOXSEG6EI32_V_M1_MF4_MASK = 4036, PseudoVLOXSEG6EI32_V_M1_MF4_TU = 4037, PseudoVLOXSEG6EI32_V_M2_M1 = 4038, PseudoVLOXSEG6EI32_V_M2_M1_MASK = 4039, PseudoVLOXSEG6EI32_V_M2_M1_TU = 4040, PseudoVLOXSEG6EI32_V_M2_MF2 = 4041, PseudoVLOXSEG6EI32_V_M2_MF2_MASK = 4042, PseudoVLOXSEG6EI32_V_M2_MF2_TU = 4043, PseudoVLOXSEG6EI32_V_M4_M1 = 4044, PseudoVLOXSEG6EI32_V_M4_M1_MASK = 4045, PseudoVLOXSEG6EI32_V_M4_M1_TU = 4046, PseudoVLOXSEG6EI32_V_MF2_M1 = 4047, PseudoVLOXSEG6EI32_V_MF2_M1_MASK = 4048, PseudoVLOXSEG6EI32_V_MF2_M1_TU = 4049, PseudoVLOXSEG6EI32_V_MF2_MF2 = 4050, PseudoVLOXSEG6EI32_V_MF2_MF2_MASK = 4051, PseudoVLOXSEG6EI32_V_MF2_MF2_TU = 4052, PseudoVLOXSEG6EI32_V_MF2_MF4 = 4053, PseudoVLOXSEG6EI32_V_MF2_MF4_MASK = 4054, PseudoVLOXSEG6EI32_V_MF2_MF4_TU = 4055, PseudoVLOXSEG6EI32_V_MF2_MF8 = 4056, PseudoVLOXSEG6EI32_V_MF2_MF8_MASK = 4057, PseudoVLOXSEG6EI32_V_MF2_MF8_TU = 4058, PseudoVLOXSEG6EI64_V_M1_M1 = 4059, PseudoVLOXSEG6EI64_V_M1_M1_MASK = 4060, PseudoVLOXSEG6EI64_V_M1_M1_TU = 4061, PseudoVLOXSEG6EI64_V_M1_MF2 = 4062, PseudoVLOXSEG6EI64_V_M1_MF2_MASK = 4063, PseudoVLOXSEG6EI64_V_M1_MF2_TU = 4064, PseudoVLOXSEG6EI64_V_M1_MF4 = 4065, PseudoVLOXSEG6EI64_V_M1_MF4_MASK = 4066, PseudoVLOXSEG6EI64_V_M1_MF4_TU = 4067, PseudoVLOXSEG6EI64_V_M1_MF8 = 4068, PseudoVLOXSEG6EI64_V_M1_MF8_MASK = 4069, PseudoVLOXSEG6EI64_V_M1_MF8_TU = 4070, PseudoVLOXSEG6EI64_V_M2_M1 = 4071, PseudoVLOXSEG6EI64_V_M2_M1_MASK = 4072, PseudoVLOXSEG6EI64_V_M2_M1_TU = 4073, PseudoVLOXSEG6EI64_V_M2_MF2 = 4074, PseudoVLOXSEG6EI64_V_M2_MF2_MASK = 4075, PseudoVLOXSEG6EI64_V_M2_MF2_TU = 4076, PseudoVLOXSEG6EI64_V_M2_MF4 = 4077, PseudoVLOXSEG6EI64_V_M2_MF4_MASK = 4078, PseudoVLOXSEG6EI64_V_M2_MF4_TU = 4079, PseudoVLOXSEG6EI64_V_M4_M1 = 4080, PseudoVLOXSEG6EI64_V_M4_M1_MASK = 4081, PseudoVLOXSEG6EI64_V_M4_M1_TU = 4082, PseudoVLOXSEG6EI64_V_M4_MF2 = 4083, PseudoVLOXSEG6EI64_V_M4_MF2_MASK = 4084, PseudoVLOXSEG6EI64_V_M4_MF2_TU = 4085, PseudoVLOXSEG6EI64_V_M8_M1 = 4086, PseudoVLOXSEG6EI64_V_M8_M1_MASK = 4087, PseudoVLOXSEG6EI64_V_M8_M1_TU = 4088, PseudoVLOXSEG6EI8_V_M1_M1 = 4089, PseudoVLOXSEG6EI8_V_M1_M1_MASK = 4090, PseudoVLOXSEG6EI8_V_M1_M1_TU = 4091, PseudoVLOXSEG6EI8_V_MF2_M1 = 4092, PseudoVLOXSEG6EI8_V_MF2_M1_MASK = 4093, PseudoVLOXSEG6EI8_V_MF2_M1_TU = 4094, PseudoVLOXSEG6EI8_V_MF2_MF2 = 4095, PseudoVLOXSEG6EI8_V_MF2_MF2_MASK = 4096, PseudoVLOXSEG6EI8_V_MF2_MF2_TU = 4097, PseudoVLOXSEG6EI8_V_MF4_M1 = 4098, PseudoVLOXSEG6EI8_V_MF4_M1_MASK = 4099, PseudoVLOXSEG6EI8_V_MF4_M1_TU = 4100, PseudoVLOXSEG6EI8_V_MF4_MF2 = 4101, PseudoVLOXSEG6EI8_V_MF4_MF2_MASK = 4102, PseudoVLOXSEG6EI8_V_MF4_MF2_TU = 4103, PseudoVLOXSEG6EI8_V_MF4_MF4 = 4104, PseudoVLOXSEG6EI8_V_MF4_MF4_MASK = 4105, PseudoVLOXSEG6EI8_V_MF4_MF4_TU = 4106, PseudoVLOXSEG6EI8_V_MF8_M1 = 4107, PseudoVLOXSEG6EI8_V_MF8_M1_MASK = 4108, PseudoVLOXSEG6EI8_V_MF8_M1_TU = 4109, PseudoVLOXSEG6EI8_V_MF8_MF2 = 4110, PseudoVLOXSEG6EI8_V_MF8_MF2_MASK = 4111, PseudoVLOXSEG6EI8_V_MF8_MF2_TU = 4112, PseudoVLOXSEG6EI8_V_MF8_MF4 = 4113, PseudoVLOXSEG6EI8_V_MF8_MF4_MASK = 4114, PseudoVLOXSEG6EI8_V_MF8_MF4_TU = 4115, PseudoVLOXSEG6EI8_V_MF8_MF8 = 4116, PseudoVLOXSEG6EI8_V_MF8_MF8_MASK = 4117, PseudoVLOXSEG6EI8_V_MF8_MF8_TU = 4118, PseudoVLOXSEG7EI16_V_M1_M1 = 4119, PseudoVLOXSEG7EI16_V_M1_M1_MASK = 4120, PseudoVLOXSEG7EI16_V_M1_M1_TU = 4121, PseudoVLOXSEG7EI16_V_M1_MF2 = 4122, PseudoVLOXSEG7EI16_V_M1_MF2_MASK = 4123, PseudoVLOXSEG7EI16_V_M1_MF2_TU = 4124, PseudoVLOXSEG7EI16_V_M2_M1 = 4125, PseudoVLOXSEG7EI16_V_M2_M1_MASK = 4126, PseudoVLOXSEG7EI16_V_M2_M1_TU = 4127, PseudoVLOXSEG7EI16_V_MF2_M1 = 4128, PseudoVLOXSEG7EI16_V_MF2_M1_MASK = 4129, PseudoVLOXSEG7EI16_V_MF2_M1_TU = 4130, PseudoVLOXSEG7EI16_V_MF2_MF2 = 4131, PseudoVLOXSEG7EI16_V_MF2_MF2_MASK = 4132, PseudoVLOXSEG7EI16_V_MF2_MF2_TU = 4133, PseudoVLOXSEG7EI16_V_MF2_MF4 = 4134, PseudoVLOXSEG7EI16_V_MF2_MF4_MASK = 4135, PseudoVLOXSEG7EI16_V_MF2_MF4_TU = 4136, PseudoVLOXSEG7EI16_V_MF4_M1 = 4137, PseudoVLOXSEG7EI16_V_MF4_M1_MASK = 4138, PseudoVLOXSEG7EI16_V_MF4_M1_TU = 4139, PseudoVLOXSEG7EI16_V_MF4_MF2 = 4140, PseudoVLOXSEG7EI16_V_MF4_MF2_MASK = 4141, PseudoVLOXSEG7EI16_V_MF4_MF2_TU = 4142, PseudoVLOXSEG7EI16_V_MF4_MF4 = 4143, PseudoVLOXSEG7EI16_V_MF4_MF4_MASK = 4144, PseudoVLOXSEG7EI16_V_MF4_MF4_TU = 4145, PseudoVLOXSEG7EI16_V_MF4_MF8 = 4146, PseudoVLOXSEG7EI16_V_MF4_MF8_MASK = 4147, PseudoVLOXSEG7EI16_V_MF4_MF8_TU = 4148, PseudoVLOXSEG7EI32_V_M1_M1 = 4149, PseudoVLOXSEG7EI32_V_M1_M1_MASK = 4150, PseudoVLOXSEG7EI32_V_M1_M1_TU = 4151, PseudoVLOXSEG7EI32_V_M1_MF2 = 4152, PseudoVLOXSEG7EI32_V_M1_MF2_MASK = 4153, PseudoVLOXSEG7EI32_V_M1_MF2_TU = 4154, PseudoVLOXSEG7EI32_V_M1_MF4 = 4155, PseudoVLOXSEG7EI32_V_M1_MF4_MASK = 4156, PseudoVLOXSEG7EI32_V_M1_MF4_TU = 4157, PseudoVLOXSEG7EI32_V_M2_M1 = 4158, PseudoVLOXSEG7EI32_V_M2_M1_MASK = 4159, PseudoVLOXSEG7EI32_V_M2_M1_TU = 4160, PseudoVLOXSEG7EI32_V_M2_MF2 = 4161, PseudoVLOXSEG7EI32_V_M2_MF2_MASK = 4162, PseudoVLOXSEG7EI32_V_M2_MF2_TU = 4163, PseudoVLOXSEG7EI32_V_M4_M1 = 4164, PseudoVLOXSEG7EI32_V_M4_M1_MASK = 4165, PseudoVLOXSEG7EI32_V_M4_M1_TU = 4166, PseudoVLOXSEG7EI32_V_MF2_M1 = 4167, PseudoVLOXSEG7EI32_V_MF2_M1_MASK = 4168, PseudoVLOXSEG7EI32_V_MF2_M1_TU = 4169, PseudoVLOXSEG7EI32_V_MF2_MF2 = 4170, PseudoVLOXSEG7EI32_V_MF2_MF2_MASK = 4171, PseudoVLOXSEG7EI32_V_MF2_MF2_TU = 4172, PseudoVLOXSEG7EI32_V_MF2_MF4 = 4173, PseudoVLOXSEG7EI32_V_MF2_MF4_MASK = 4174, PseudoVLOXSEG7EI32_V_MF2_MF4_TU = 4175, PseudoVLOXSEG7EI32_V_MF2_MF8 = 4176, PseudoVLOXSEG7EI32_V_MF2_MF8_MASK = 4177, PseudoVLOXSEG7EI32_V_MF2_MF8_TU = 4178, PseudoVLOXSEG7EI64_V_M1_M1 = 4179, PseudoVLOXSEG7EI64_V_M1_M1_MASK = 4180, PseudoVLOXSEG7EI64_V_M1_M1_TU = 4181, PseudoVLOXSEG7EI64_V_M1_MF2 = 4182, PseudoVLOXSEG7EI64_V_M1_MF2_MASK = 4183, PseudoVLOXSEG7EI64_V_M1_MF2_TU = 4184, PseudoVLOXSEG7EI64_V_M1_MF4 = 4185, PseudoVLOXSEG7EI64_V_M1_MF4_MASK = 4186, PseudoVLOXSEG7EI64_V_M1_MF4_TU = 4187, PseudoVLOXSEG7EI64_V_M1_MF8 = 4188, PseudoVLOXSEG7EI64_V_M1_MF8_MASK = 4189, PseudoVLOXSEG7EI64_V_M1_MF8_TU = 4190, PseudoVLOXSEG7EI64_V_M2_M1 = 4191, PseudoVLOXSEG7EI64_V_M2_M1_MASK = 4192, PseudoVLOXSEG7EI64_V_M2_M1_TU = 4193, PseudoVLOXSEG7EI64_V_M2_MF2 = 4194, PseudoVLOXSEG7EI64_V_M2_MF2_MASK = 4195, PseudoVLOXSEG7EI64_V_M2_MF2_TU = 4196, PseudoVLOXSEG7EI64_V_M2_MF4 = 4197, PseudoVLOXSEG7EI64_V_M2_MF4_MASK = 4198, PseudoVLOXSEG7EI64_V_M2_MF4_TU = 4199, PseudoVLOXSEG7EI64_V_M4_M1 = 4200, PseudoVLOXSEG7EI64_V_M4_M1_MASK = 4201, PseudoVLOXSEG7EI64_V_M4_M1_TU = 4202, PseudoVLOXSEG7EI64_V_M4_MF2 = 4203, PseudoVLOXSEG7EI64_V_M4_MF2_MASK = 4204, PseudoVLOXSEG7EI64_V_M4_MF2_TU = 4205, PseudoVLOXSEG7EI64_V_M8_M1 = 4206, PseudoVLOXSEG7EI64_V_M8_M1_MASK = 4207, PseudoVLOXSEG7EI64_V_M8_M1_TU = 4208, PseudoVLOXSEG7EI8_V_M1_M1 = 4209, PseudoVLOXSEG7EI8_V_M1_M1_MASK = 4210, PseudoVLOXSEG7EI8_V_M1_M1_TU = 4211, PseudoVLOXSEG7EI8_V_MF2_M1 = 4212, PseudoVLOXSEG7EI8_V_MF2_M1_MASK = 4213, PseudoVLOXSEG7EI8_V_MF2_M1_TU = 4214, PseudoVLOXSEG7EI8_V_MF2_MF2 = 4215, PseudoVLOXSEG7EI8_V_MF2_MF2_MASK = 4216, PseudoVLOXSEG7EI8_V_MF2_MF2_TU = 4217, PseudoVLOXSEG7EI8_V_MF4_M1 = 4218, PseudoVLOXSEG7EI8_V_MF4_M1_MASK = 4219, PseudoVLOXSEG7EI8_V_MF4_M1_TU = 4220, PseudoVLOXSEG7EI8_V_MF4_MF2 = 4221, PseudoVLOXSEG7EI8_V_MF4_MF2_MASK = 4222, PseudoVLOXSEG7EI8_V_MF4_MF2_TU = 4223, PseudoVLOXSEG7EI8_V_MF4_MF4 = 4224, PseudoVLOXSEG7EI8_V_MF4_MF4_MASK = 4225, PseudoVLOXSEG7EI8_V_MF4_MF4_TU = 4226, PseudoVLOXSEG7EI8_V_MF8_M1 = 4227, PseudoVLOXSEG7EI8_V_MF8_M1_MASK = 4228, PseudoVLOXSEG7EI8_V_MF8_M1_TU = 4229, PseudoVLOXSEG7EI8_V_MF8_MF2 = 4230, PseudoVLOXSEG7EI8_V_MF8_MF2_MASK = 4231, PseudoVLOXSEG7EI8_V_MF8_MF2_TU = 4232, PseudoVLOXSEG7EI8_V_MF8_MF4 = 4233, PseudoVLOXSEG7EI8_V_MF8_MF4_MASK = 4234, PseudoVLOXSEG7EI8_V_MF8_MF4_TU = 4235, PseudoVLOXSEG7EI8_V_MF8_MF8 = 4236, PseudoVLOXSEG7EI8_V_MF8_MF8_MASK = 4237, PseudoVLOXSEG7EI8_V_MF8_MF8_TU = 4238, PseudoVLOXSEG8EI16_V_M1_M1 = 4239, PseudoVLOXSEG8EI16_V_M1_M1_MASK = 4240, PseudoVLOXSEG8EI16_V_M1_M1_TU = 4241, PseudoVLOXSEG8EI16_V_M1_MF2 = 4242, PseudoVLOXSEG8EI16_V_M1_MF2_MASK = 4243, PseudoVLOXSEG8EI16_V_M1_MF2_TU = 4244, PseudoVLOXSEG8EI16_V_M2_M1 = 4245, PseudoVLOXSEG8EI16_V_M2_M1_MASK = 4246, PseudoVLOXSEG8EI16_V_M2_M1_TU = 4247, PseudoVLOXSEG8EI16_V_MF2_M1 = 4248, PseudoVLOXSEG8EI16_V_MF2_M1_MASK = 4249, PseudoVLOXSEG8EI16_V_MF2_M1_TU = 4250, PseudoVLOXSEG8EI16_V_MF2_MF2 = 4251, PseudoVLOXSEG8EI16_V_MF2_MF2_MASK = 4252, PseudoVLOXSEG8EI16_V_MF2_MF2_TU = 4253, PseudoVLOXSEG8EI16_V_MF2_MF4 = 4254, PseudoVLOXSEG8EI16_V_MF2_MF4_MASK = 4255, PseudoVLOXSEG8EI16_V_MF2_MF4_TU = 4256, PseudoVLOXSEG8EI16_V_MF4_M1 = 4257, PseudoVLOXSEG8EI16_V_MF4_M1_MASK = 4258, PseudoVLOXSEG8EI16_V_MF4_M1_TU = 4259, PseudoVLOXSEG8EI16_V_MF4_MF2 = 4260, PseudoVLOXSEG8EI16_V_MF4_MF2_MASK = 4261, PseudoVLOXSEG8EI16_V_MF4_MF2_TU = 4262, PseudoVLOXSEG8EI16_V_MF4_MF4 = 4263, PseudoVLOXSEG8EI16_V_MF4_MF4_MASK = 4264, PseudoVLOXSEG8EI16_V_MF4_MF4_TU = 4265, PseudoVLOXSEG8EI16_V_MF4_MF8 = 4266, PseudoVLOXSEG8EI16_V_MF4_MF8_MASK = 4267, PseudoVLOXSEG8EI16_V_MF4_MF8_TU = 4268, PseudoVLOXSEG8EI32_V_M1_M1 = 4269, PseudoVLOXSEG8EI32_V_M1_M1_MASK = 4270, PseudoVLOXSEG8EI32_V_M1_M1_TU = 4271, PseudoVLOXSEG8EI32_V_M1_MF2 = 4272, PseudoVLOXSEG8EI32_V_M1_MF2_MASK = 4273, PseudoVLOXSEG8EI32_V_M1_MF2_TU = 4274, PseudoVLOXSEG8EI32_V_M1_MF4 = 4275, PseudoVLOXSEG8EI32_V_M1_MF4_MASK = 4276, PseudoVLOXSEG8EI32_V_M1_MF4_TU = 4277, PseudoVLOXSEG8EI32_V_M2_M1 = 4278, PseudoVLOXSEG8EI32_V_M2_M1_MASK = 4279, PseudoVLOXSEG8EI32_V_M2_M1_TU = 4280, PseudoVLOXSEG8EI32_V_M2_MF2 = 4281, PseudoVLOXSEG8EI32_V_M2_MF2_MASK = 4282, PseudoVLOXSEG8EI32_V_M2_MF2_TU = 4283, PseudoVLOXSEG8EI32_V_M4_M1 = 4284, PseudoVLOXSEG8EI32_V_M4_M1_MASK = 4285, PseudoVLOXSEG8EI32_V_M4_M1_TU = 4286, PseudoVLOXSEG8EI32_V_MF2_M1 = 4287, PseudoVLOXSEG8EI32_V_MF2_M1_MASK = 4288, PseudoVLOXSEG8EI32_V_MF2_M1_TU = 4289, PseudoVLOXSEG8EI32_V_MF2_MF2 = 4290, PseudoVLOXSEG8EI32_V_MF2_MF2_MASK = 4291, PseudoVLOXSEG8EI32_V_MF2_MF2_TU = 4292, PseudoVLOXSEG8EI32_V_MF2_MF4 = 4293, PseudoVLOXSEG8EI32_V_MF2_MF4_MASK = 4294, PseudoVLOXSEG8EI32_V_MF2_MF4_TU = 4295, PseudoVLOXSEG8EI32_V_MF2_MF8 = 4296, PseudoVLOXSEG8EI32_V_MF2_MF8_MASK = 4297, PseudoVLOXSEG8EI32_V_MF2_MF8_TU = 4298, PseudoVLOXSEG8EI64_V_M1_M1 = 4299, PseudoVLOXSEG8EI64_V_M1_M1_MASK = 4300, PseudoVLOXSEG8EI64_V_M1_M1_TU = 4301, PseudoVLOXSEG8EI64_V_M1_MF2 = 4302, PseudoVLOXSEG8EI64_V_M1_MF2_MASK = 4303, PseudoVLOXSEG8EI64_V_M1_MF2_TU = 4304, PseudoVLOXSEG8EI64_V_M1_MF4 = 4305, PseudoVLOXSEG8EI64_V_M1_MF4_MASK = 4306, PseudoVLOXSEG8EI64_V_M1_MF4_TU = 4307, PseudoVLOXSEG8EI64_V_M1_MF8 = 4308, PseudoVLOXSEG8EI64_V_M1_MF8_MASK = 4309, PseudoVLOXSEG8EI64_V_M1_MF8_TU = 4310, PseudoVLOXSEG8EI64_V_M2_M1 = 4311, PseudoVLOXSEG8EI64_V_M2_M1_MASK = 4312, PseudoVLOXSEG8EI64_V_M2_M1_TU = 4313, PseudoVLOXSEG8EI64_V_M2_MF2 = 4314, PseudoVLOXSEG8EI64_V_M2_MF2_MASK = 4315, PseudoVLOXSEG8EI64_V_M2_MF2_TU = 4316, PseudoVLOXSEG8EI64_V_M2_MF4 = 4317, PseudoVLOXSEG8EI64_V_M2_MF4_MASK = 4318, PseudoVLOXSEG8EI64_V_M2_MF4_TU = 4319, PseudoVLOXSEG8EI64_V_M4_M1 = 4320, PseudoVLOXSEG8EI64_V_M4_M1_MASK = 4321, PseudoVLOXSEG8EI64_V_M4_M1_TU = 4322, PseudoVLOXSEG8EI64_V_M4_MF2 = 4323, PseudoVLOXSEG8EI64_V_M4_MF2_MASK = 4324, PseudoVLOXSEG8EI64_V_M4_MF2_TU = 4325, PseudoVLOXSEG8EI64_V_M8_M1 = 4326, PseudoVLOXSEG8EI64_V_M8_M1_MASK = 4327, PseudoVLOXSEG8EI64_V_M8_M1_TU = 4328, PseudoVLOXSEG8EI8_V_M1_M1 = 4329, PseudoVLOXSEG8EI8_V_M1_M1_MASK = 4330, PseudoVLOXSEG8EI8_V_M1_M1_TU = 4331, PseudoVLOXSEG8EI8_V_MF2_M1 = 4332, PseudoVLOXSEG8EI8_V_MF2_M1_MASK = 4333, PseudoVLOXSEG8EI8_V_MF2_M1_TU = 4334, PseudoVLOXSEG8EI8_V_MF2_MF2 = 4335, PseudoVLOXSEG8EI8_V_MF2_MF2_MASK = 4336, PseudoVLOXSEG8EI8_V_MF2_MF2_TU = 4337, PseudoVLOXSEG8EI8_V_MF4_M1 = 4338, PseudoVLOXSEG8EI8_V_MF4_M1_MASK = 4339, PseudoVLOXSEG8EI8_V_MF4_M1_TU = 4340, PseudoVLOXSEG8EI8_V_MF4_MF2 = 4341, PseudoVLOXSEG8EI8_V_MF4_MF2_MASK = 4342, PseudoVLOXSEG8EI8_V_MF4_MF2_TU = 4343, PseudoVLOXSEG8EI8_V_MF4_MF4 = 4344, PseudoVLOXSEG8EI8_V_MF4_MF4_MASK = 4345, PseudoVLOXSEG8EI8_V_MF4_MF4_TU = 4346, PseudoVLOXSEG8EI8_V_MF8_M1 = 4347, PseudoVLOXSEG8EI8_V_MF8_M1_MASK = 4348, PseudoVLOXSEG8EI8_V_MF8_M1_TU = 4349, PseudoVLOXSEG8EI8_V_MF8_MF2 = 4350, PseudoVLOXSEG8EI8_V_MF8_MF2_MASK = 4351, PseudoVLOXSEG8EI8_V_MF8_MF2_TU = 4352, PseudoVLOXSEG8EI8_V_MF8_MF4 = 4353, PseudoVLOXSEG8EI8_V_MF8_MF4_MASK = 4354, PseudoVLOXSEG8EI8_V_MF8_MF4_TU = 4355, PseudoVLOXSEG8EI8_V_MF8_MF8 = 4356, PseudoVLOXSEG8EI8_V_MF8_MF8_MASK = 4357, PseudoVLOXSEG8EI8_V_MF8_MF8_TU = 4358, PseudoVLSE16_V_M1 = 4359, PseudoVLSE16_V_M1_MASK = 4360, PseudoVLSE16_V_M1_TU = 4361, PseudoVLSE16_V_M2 = 4362, PseudoVLSE16_V_M2_MASK = 4363, PseudoVLSE16_V_M2_TU = 4364, PseudoVLSE16_V_M4 = 4365, PseudoVLSE16_V_M4_MASK = 4366, PseudoVLSE16_V_M4_TU = 4367, PseudoVLSE16_V_M8 = 4368, PseudoVLSE16_V_M8_MASK = 4369, PseudoVLSE16_V_M8_TU = 4370, PseudoVLSE16_V_MF2 = 4371, PseudoVLSE16_V_MF2_MASK = 4372, PseudoVLSE16_V_MF2_TU = 4373, PseudoVLSE16_V_MF4 = 4374, PseudoVLSE16_V_MF4_MASK = 4375, PseudoVLSE16_V_MF4_TU = 4376, PseudoVLSE32_V_M1 = 4377, PseudoVLSE32_V_M1_MASK = 4378, PseudoVLSE32_V_M1_TU = 4379, PseudoVLSE32_V_M2 = 4380, PseudoVLSE32_V_M2_MASK = 4381, PseudoVLSE32_V_M2_TU = 4382, PseudoVLSE32_V_M4 = 4383, PseudoVLSE32_V_M4_MASK = 4384, PseudoVLSE32_V_M4_TU = 4385, PseudoVLSE32_V_M8 = 4386, PseudoVLSE32_V_M8_MASK = 4387, PseudoVLSE32_V_M8_TU = 4388, PseudoVLSE32_V_MF2 = 4389, PseudoVLSE32_V_MF2_MASK = 4390, PseudoVLSE32_V_MF2_TU = 4391, PseudoVLSE64_V_M1 = 4392, PseudoVLSE64_V_M1_MASK = 4393, PseudoVLSE64_V_M1_TU = 4394, PseudoVLSE64_V_M2 = 4395, PseudoVLSE64_V_M2_MASK = 4396, PseudoVLSE64_V_M2_TU = 4397, PseudoVLSE64_V_M4 = 4398, PseudoVLSE64_V_M4_MASK = 4399, PseudoVLSE64_V_M4_TU = 4400, PseudoVLSE64_V_M8 = 4401, PseudoVLSE64_V_M8_MASK = 4402, PseudoVLSE64_V_M8_TU = 4403, PseudoVLSE8_V_M1 = 4404, PseudoVLSE8_V_M1_MASK = 4405, PseudoVLSE8_V_M1_TU = 4406, PseudoVLSE8_V_M2 = 4407, PseudoVLSE8_V_M2_MASK = 4408, PseudoVLSE8_V_M2_TU = 4409, PseudoVLSE8_V_M4 = 4410, PseudoVLSE8_V_M4_MASK = 4411, PseudoVLSE8_V_M4_TU = 4412, PseudoVLSE8_V_M8 = 4413, PseudoVLSE8_V_M8_MASK = 4414, PseudoVLSE8_V_M8_TU = 4415, PseudoVLSE8_V_MF2 = 4416, PseudoVLSE8_V_MF2_MASK = 4417, PseudoVLSE8_V_MF2_TU = 4418, PseudoVLSE8_V_MF4 = 4419, PseudoVLSE8_V_MF4_MASK = 4420, PseudoVLSE8_V_MF4_TU = 4421, PseudoVLSE8_V_MF8 = 4422, PseudoVLSE8_V_MF8_MASK = 4423, PseudoVLSE8_V_MF8_TU = 4424, PseudoVLSEG2E16FF_V_M1 = 4425, PseudoVLSEG2E16FF_V_M1_MASK = 4426, PseudoVLSEG2E16FF_V_M1_TU = 4427, PseudoVLSEG2E16FF_V_M2 = 4428, PseudoVLSEG2E16FF_V_M2_MASK = 4429, PseudoVLSEG2E16FF_V_M2_TU = 4430, PseudoVLSEG2E16FF_V_M4 = 4431, PseudoVLSEG2E16FF_V_M4_MASK = 4432, PseudoVLSEG2E16FF_V_M4_TU = 4433, PseudoVLSEG2E16FF_V_MF2 = 4434, PseudoVLSEG2E16FF_V_MF2_MASK = 4435, PseudoVLSEG2E16FF_V_MF2_TU = 4436, PseudoVLSEG2E16FF_V_MF4 = 4437, PseudoVLSEG2E16FF_V_MF4_MASK = 4438, PseudoVLSEG2E16FF_V_MF4_TU = 4439, PseudoVLSEG2E16_V_M1 = 4440, PseudoVLSEG2E16_V_M1_MASK = 4441, PseudoVLSEG2E16_V_M1_TU = 4442, PseudoVLSEG2E16_V_M2 = 4443, PseudoVLSEG2E16_V_M2_MASK = 4444, PseudoVLSEG2E16_V_M2_TU = 4445, PseudoVLSEG2E16_V_M4 = 4446, PseudoVLSEG2E16_V_M4_MASK = 4447, PseudoVLSEG2E16_V_M4_TU = 4448, PseudoVLSEG2E16_V_MF2 = 4449, PseudoVLSEG2E16_V_MF2_MASK = 4450, PseudoVLSEG2E16_V_MF2_TU = 4451, PseudoVLSEG2E16_V_MF4 = 4452, PseudoVLSEG2E16_V_MF4_MASK = 4453, PseudoVLSEG2E16_V_MF4_TU = 4454, PseudoVLSEG2E32FF_V_M1 = 4455, PseudoVLSEG2E32FF_V_M1_MASK = 4456, PseudoVLSEG2E32FF_V_M1_TU = 4457, PseudoVLSEG2E32FF_V_M2 = 4458, PseudoVLSEG2E32FF_V_M2_MASK = 4459, PseudoVLSEG2E32FF_V_M2_TU = 4460, PseudoVLSEG2E32FF_V_M4 = 4461, PseudoVLSEG2E32FF_V_M4_MASK = 4462, PseudoVLSEG2E32FF_V_M4_TU = 4463, PseudoVLSEG2E32FF_V_MF2 = 4464, PseudoVLSEG2E32FF_V_MF2_MASK = 4465, PseudoVLSEG2E32FF_V_MF2_TU = 4466, PseudoVLSEG2E32_V_M1 = 4467, PseudoVLSEG2E32_V_M1_MASK = 4468, PseudoVLSEG2E32_V_M1_TU = 4469, PseudoVLSEG2E32_V_M2 = 4470, PseudoVLSEG2E32_V_M2_MASK = 4471, PseudoVLSEG2E32_V_M2_TU = 4472, PseudoVLSEG2E32_V_M4 = 4473, PseudoVLSEG2E32_V_M4_MASK = 4474, PseudoVLSEG2E32_V_M4_TU = 4475, PseudoVLSEG2E32_V_MF2 = 4476, PseudoVLSEG2E32_V_MF2_MASK = 4477, PseudoVLSEG2E32_V_MF2_TU = 4478, PseudoVLSEG2E64FF_V_M1 = 4479, PseudoVLSEG2E64FF_V_M1_MASK = 4480, PseudoVLSEG2E64FF_V_M1_TU = 4481, PseudoVLSEG2E64FF_V_M2 = 4482, PseudoVLSEG2E64FF_V_M2_MASK = 4483, PseudoVLSEG2E64FF_V_M2_TU = 4484, PseudoVLSEG2E64FF_V_M4 = 4485, PseudoVLSEG2E64FF_V_M4_MASK = 4486, PseudoVLSEG2E64FF_V_M4_TU = 4487, PseudoVLSEG2E64_V_M1 = 4488, PseudoVLSEG2E64_V_M1_MASK = 4489, PseudoVLSEG2E64_V_M1_TU = 4490, PseudoVLSEG2E64_V_M2 = 4491, PseudoVLSEG2E64_V_M2_MASK = 4492, PseudoVLSEG2E64_V_M2_TU = 4493, PseudoVLSEG2E64_V_M4 = 4494, PseudoVLSEG2E64_V_M4_MASK = 4495, PseudoVLSEG2E64_V_M4_TU = 4496, PseudoVLSEG2E8FF_V_M1 = 4497, PseudoVLSEG2E8FF_V_M1_MASK = 4498, PseudoVLSEG2E8FF_V_M1_TU = 4499, PseudoVLSEG2E8FF_V_M2 = 4500, PseudoVLSEG2E8FF_V_M2_MASK = 4501, PseudoVLSEG2E8FF_V_M2_TU = 4502, PseudoVLSEG2E8FF_V_M4 = 4503, PseudoVLSEG2E8FF_V_M4_MASK = 4504, PseudoVLSEG2E8FF_V_M4_TU = 4505, PseudoVLSEG2E8FF_V_MF2 = 4506, PseudoVLSEG2E8FF_V_MF2_MASK = 4507, PseudoVLSEG2E8FF_V_MF2_TU = 4508, PseudoVLSEG2E8FF_V_MF4 = 4509, PseudoVLSEG2E8FF_V_MF4_MASK = 4510, PseudoVLSEG2E8FF_V_MF4_TU = 4511, PseudoVLSEG2E8FF_V_MF8 = 4512, PseudoVLSEG2E8FF_V_MF8_MASK = 4513, PseudoVLSEG2E8FF_V_MF8_TU = 4514, PseudoVLSEG2E8_V_M1 = 4515, PseudoVLSEG2E8_V_M1_MASK = 4516, PseudoVLSEG2E8_V_M1_TU = 4517, PseudoVLSEG2E8_V_M2 = 4518, PseudoVLSEG2E8_V_M2_MASK = 4519, PseudoVLSEG2E8_V_M2_TU = 4520, PseudoVLSEG2E8_V_M4 = 4521, PseudoVLSEG2E8_V_M4_MASK = 4522, PseudoVLSEG2E8_V_M4_TU = 4523, PseudoVLSEG2E8_V_MF2 = 4524, PseudoVLSEG2E8_V_MF2_MASK = 4525, PseudoVLSEG2E8_V_MF2_TU = 4526, PseudoVLSEG2E8_V_MF4 = 4527, PseudoVLSEG2E8_V_MF4_MASK = 4528, PseudoVLSEG2E8_V_MF4_TU = 4529, PseudoVLSEG2E8_V_MF8 = 4530, PseudoVLSEG2E8_V_MF8_MASK = 4531, PseudoVLSEG2E8_V_MF8_TU = 4532, PseudoVLSEG3E16FF_V_M1 = 4533, PseudoVLSEG3E16FF_V_M1_MASK = 4534, PseudoVLSEG3E16FF_V_M1_TU = 4535, PseudoVLSEG3E16FF_V_M2 = 4536, PseudoVLSEG3E16FF_V_M2_MASK = 4537, PseudoVLSEG3E16FF_V_M2_TU = 4538, PseudoVLSEG3E16FF_V_MF2 = 4539, PseudoVLSEG3E16FF_V_MF2_MASK = 4540, PseudoVLSEG3E16FF_V_MF2_TU = 4541, PseudoVLSEG3E16FF_V_MF4 = 4542, PseudoVLSEG3E16FF_V_MF4_MASK = 4543, PseudoVLSEG3E16FF_V_MF4_TU = 4544, PseudoVLSEG3E16_V_M1 = 4545, PseudoVLSEG3E16_V_M1_MASK = 4546, PseudoVLSEG3E16_V_M1_TU = 4547, PseudoVLSEG3E16_V_M2 = 4548, PseudoVLSEG3E16_V_M2_MASK = 4549, PseudoVLSEG3E16_V_M2_TU = 4550, PseudoVLSEG3E16_V_MF2 = 4551, PseudoVLSEG3E16_V_MF2_MASK = 4552, PseudoVLSEG3E16_V_MF2_TU = 4553, PseudoVLSEG3E16_V_MF4 = 4554, PseudoVLSEG3E16_V_MF4_MASK = 4555, PseudoVLSEG3E16_V_MF4_TU = 4556, PseudoVLSEG3E32FF_V_M1 = 4557, PseudoVLSEG3E32FF_V_M1_MASK = 4558, PseudoVLSEG3E32FF_V_M1_TU = 4559, PseudoVLSEG3E32FF_V_M2 = 4560, PseudoVLSEG3E32FF_V_M2_MASK = 4561, PseudoVLSEG3E32FF_V_M2_TU = 4562, PseudoVLSEG3E32FF_V_MF2 = 4563, PseudoVLSEG3E32FF_V_MF2_MASK = 4564, PseudoVLSEG3E32FF_V_MF2_TU = 4565, PseudoVLSEG3E32_V_M1 = 4566, PseudoVLSEG3E32_V_M1_MASK = 4567, PseudoVLSEG3E32_V_M1_TU = 4568, PseudoVLSEG3E32_V_M2 = 4569, PseudoVLSEG3E32_V_M2_MASK = 4570, PseudoVLSEG3E32_V_M2_TU = 4571, PseudoVLSEG3E32_V_MF2 = 4572, PseudoVLSEG3E32_V_MF2_MASK = 4573, PseudoVLSEG3E32_V_MF2_TU = 4574, PseudoVLSEG3E64FF_V_M1 = 4575, PseudoVLSEG3E64FF_V_M1_MASK = 4576, PseudoVLSEG3E64FF_V_M1_TU = 4577, PseudoVLSEG3E64FF_V_M2 = 4578, PseudoVLSEG3E64FF_V_M2_MASK = 4579, PseudoVLSEG3E64FF_V_M2_TU = 4580, PseudoVLSEG3E64_V_M1 = 4581, PseudoVLSEG3E64_V_M1_MASK = 4582, PseudoVLSEG3E64_V_M1_TU = 4583, PseudoVLSEG3E64_V_M2 = 4584, PseudoVLSEG3E64_V_M2_MASK = 4585, PseudoVLSEG3E64_V_M2_TU = 4586, PseudoVLSEG3E8FF_V_M1 = 4587, PseudoVLSEG3E8FF_V_M1_MASK = 4588, PseudoVLSEG3E8FF_V_M1_TU = 4589, PseudoVLSEG3E8FF_V_M2 = 4590, PseudoVLSEG3E8FF_V_M2_MASK = 4591, PseudoVLSEG3E8FF_V_M2_TU = 4592, PseudoVLSEG3E8FF_V_MF2 = 4593, PseudoVLSEG3E8FF_V_MF2_MASK = 4594, PseudoVLSEG3E8FF_V_MF2_TU = 4595, PseudoVLSEG3E8FF_V_MF4 = 4596, PseudoVLSEG3E8FF_V_MF4_MASK = 4597, PseudoVLSEG3E8FF_V_MF4_TU = 4598, PseudoVLSEG3E8FF_V_MF8 = 4599, PseudoVLSEG3E8FF_V_MF8_MASK = 4600, PseudoVLSEG3E8FF_V_MF8_TU = 4601, PseudoVLSEG3E8_V_M1 = 4602, PseudoVLSEG3E8_V_M1_MASK = 4603, PseudoVLSEG3E8_V_M1_TU = 4604, PseudoVLSEG3E8_V_M2 = 4605, PseudoVLSEG3E8_V_M2_MASK = 4606, PseudoVLSEG3E8_V_M2_TU = 4607, PseudoVLSEG3E8_V_MF2 = 4608, PseudoVLSEG3E8_V_MF2_MASK = 4609, PseudoVLSEG3E8_V_MF2_TU = 4610, PseudoVLSEG3E8_V_MF4 = 4611, PseudoVLSEG3E8_V_MF4_MASK = 4612, PseudoVLSEG3E8_V_MF4_TU = 4613, PseudoVLSEG3E8_V_MF8 = 4614, PseudoVLSEG3E8_V_MF8_MASK = 4615, PseudoVLSEG3E8_V_MF8_TU = 4616, PseudoVLSEG4E16FF_V_M1 = 4617, PseudoVLSEG4E16FF_V_M1_MASK = 4618, PseudoVLSEG4E16FF_V_M1_TU = 4619, PseudoVLSEG4E16FF_V_M2 = 4620, PseudoVLSEG4E16FF_V_M2_MASK = 4621, PseudoVLSEG4E16FF_V_M2_TU = 4622, PseudoVLSEG4E16FF_V_MF2 = 4623, PseudoVLSEG4E16FF_V_MF2_MASK = 4624, PseudoVLSEG4E16FF_V_MF2_TU = 4625, PseudoVLSEG4E16FF_V_MF4 = 4626, PseudoVLSEG4E16FF_V_MF4_MASK = 4627, PseudoVLSEG4E16FF_V_MF4_TU = 4628, PseudoVLSEG4E16_V_M1 = 4629, PseudoVLSEG4E16_V_M1_MASK = 4630, PseudoVLSEG4E16_V_M1_TU = 4631, PseudoVLSEG4E16_V_M2 = 4632, PseudoVLSEG4E16_V_M2_MASK = 4633, PseudoVLSEG4E16_V_M2_TU = 4634, PseudoVLSEG4E16_V_MF2 = 4635, PseudoVLSEG4E16_V_MF2_MASK = 4636, PseudoVLSEG4E16_V_MF2_TU = 4637, PseudoVLSEG4E16_V_MF4 = 4638, PseudoVLSEG4E16_V_MF4_MASK = 4639, PseudoVLSEG4E16_V_MF4_TU = 4640, PseudoVLSEG4E32FF_V_M1 = 4641, PseudoVLSEG4E32FF_V_M1_MASK = 4642, PseudoVLSEG4E32FF_V_M1_TU = 4643, PseudoVLSEG4E32FF_V_M2 = 4644, PseudoVLSEG4E32FF_V_M2_MASK = 4645, PseudoVLSEG4E32FF_V_M2_TU = 4646, PseudoVLSEG4E32FF_V_MF2 = 4647, PseudoVLSEG4E32FF_V_MF2_MASK = 4648, PseudoVLSEG4E32FF_V_MF2_TU = 4649, PseudoVLSEG4E32_V_M1 = 4650, PseudoVLSEG4E32_V_M1_MASK = 4651, PseudoVLSEG4E32_V_M1_TU = 4652, PseudoVLSEG4E32_V_M2 = 4653, PseudoVLSEG4E32_V_M2_MASK = 4654, PseudoVLSEG4E32_V_M2_TU = 4655, PseudoVLSEG4E32_V_MF2 = 4656, PseudoVLSEG4E32_V_MF2_MASK = 4657, PseudoVLSEG4E32_V_MF2_TU = 4658, PseudoVLSEG4E64FF_V_M1 = 4659, PseudoVLSEG4E64FF_V_M1_MASK = 4660, PseudoVLSEG4E64FF_V_M1_TU = 4661, PseudoVLSEG4E64FF_V_M2 = 4662, PseudoVLSEG4E64FF_V_M2_MASK = 4663, PseudoVLSEG4E64FF_V_M2_TU = 4664, PseudoVLSEG4E64_V_M1 = 4665, PseudoVLSEG4E64_V_M1_MASK = 4666, PseudoVLSEG4E64_V_M1_TU = 4667, PseudoVLSEG4E64_V_M2 = 4668, PseudoVLSEG4E64_V_M2_MASK = 4669, PseudoVLSEG4E64_V_M2_TU = 4670, PseudoVLSEG4E8FF_V_M1 = 4671, PseudoVLSEG4E8FF_V_M1_MASK = 4672, PseudoVLSEG4E8FF_V_M1_TU = 4673, PseudoVLSEG4E8FF_V_M2 = 4674, PseudoVLSEG4E8FF_V_M2_MASK = 4675, PseudoVLSEG4E8FF_V_M2_TU = 4676, PseudoVLSEG4E8FF_V_MF2 = 4677, PseudoVLSEG4E8FF_V_MF2_MASK = 4678, PseudoVLSEG4E8FF_V_MF2_TU = 4679, PseudoVLSEG4E8FF_V_MF4 = 4680, PseudoVLSEG4E8FF_V_MF4_MASK = 4681, PseudoVLSEG4E8FF_V_MF4_TU = 4682, PseudoVLSEG4E8FF_V_MF8 = 4683, PseudoVLSEG4E8FF_V_MF8_MASK = 4684, PseudoVLSEG4E8FF_V_MF8_TU = 4685, PseudoVLSEG4E8_V_M1 = 4686, PseudoVLSEG4E8_V_M1_MASK = 4687, PseudoVLSEG4E8_V_M1_TU = 4688, PseudoVLSEG4E8_V_M2 = 4689, PseudoVLSEG4E8_V_M2_MASK = 4690, PseudoVLSEG4E8_V_M2_TU = 4691, PseudoVLSEG4E8_V_MF2 = 4692, PseudoVLSEG4E8_V_MF2_MASK = 4693, PseudoVLSEG4E8_V_MF2_TU = 4694, PseudoVLSEG4E8_V_MF4 = 4695, PseudoVLSEG4E8_V_MF4_MASK = 4696, PseudoVLSEG4E8_V_MF4_TU = 4697, PseudoVLSEG4E8_V_MF8 = 4698, PseudoVLSEG4E8_V_MF8_MASK = 4699, PseudoVLSEG4E8_V_MF8_TU = 4700, PseudoVLSEG5E16FF_V_M1 = 4701, PseudoVLSEG5E16FF_V_M1_MASK = 4702, PseudoVLSEG5E16FF_V_M1_TU = 4703, PseudoVLSEG5E16FF_V_MF2 = 4704, PseudoVLSEG5E16FF_V_MF2_MASK = 4705, PseudoVLSEG5E16FF_V_MF2_TU = 4706, PseudoVLSEG5E16FF_V_MF4 = 4707, PseudoVLSEG5E16FF_V_MF4_MASK = 4708, PseudoVLSEG5E16FF_V_MF4_TU = 4709, PseudoVLSEG5E16_V_M1 = 4710, PseudoVLSEG5E16_V_M1_MASK = 4711, PseudoVLSEG5E16_V_M1_TU = 4712, PseudoVLSEG5E16_V_MF2 = 4713, PseudoVLSEG5E16_V_MF2_MASK = 4714, PseudoVLSEG5E16_V_MF2_TU = 4715, PseudoVLSEG5E16_V_MF4 = 4716, PseudoVLSEG5E16_V_MF4_MASK = 4717, PseudoVLSEG5E16_V_MF4_TU = 4718, PseudoVLSEG5E32FF_V_M1 = 4719, PseudoVLSEG5E32FF_V_M1_MASK = 4720, PseudoVLSEG5E32FF_V_M1_TU = 4721, PseudoVLSEG5E32FF_V_MF2 = 4722, PseudoVLSEG5E32FF_V_MF2_MASK = 4723, PseudoVLSEG5E32FF_V_MF2_TU = 4724, PseudoVLSEG5E32_V_M1 = 4725, PseudoVLSEG5E32_V_M1_MASK = 4726, PseudoVLSEG5E32_V_M1_TU = 4727, PseudoVLSEG5E32_V_MF2 = 4728, PseudoVLSEG5E32_V_MF2_MASK = 4729, PseudoVLSEG5E32_V_MF2_TU = 4730, PseudoVLSEG5E64FF_V_M1 = 4731, PseudoVLSEG5E64FF_V_M1_MASK = 4732, PseudoVLSEG5E64FF_V_M1_TU = 4733, PseudoVLSEG5E64_V_M1 = 4734, PseudoVLSEG5E64_V_M1_MASK = 4735, PseudoVLSEG5E64_V_M1_TU = 4736, PseudoVLSEG5E8FF_V_M1 = 4737, PseudoVLSEG5E8FF_V_M1_MASK = 4738, PseudoVLSEG5E8FF_V_M1_TU = 4739, PseudoVLSEG5E8FF_V_MF2 = 4740, PseudoVLSEG5E8FF_V_MF2_MASK = 4741, PseudoVLSEG5E8FF_V_MF2_TU = 4742, PseudoVLSEG5E8FF_V_MF4 = 4743, PseudoVLSEG5E8FF_V_MF4_MASK = 4744, PseudoVLSEG5E8FF_V_MF4_TU = 4745, PseudoVLSEG5E8FF_V_MF8 = 4746, PseudoVLSEG5E8FF_V_MF8_MASK = 4747, PseudoVLSEG5E8FF_V_MF8_TU = 4748, PseudoVLSEG5E8_V_M1 = 4749, PseudoVLSEG5E8_V_M1_MASK = 4750, PseudoVLSEG5E8_V_M1_TU = 4751, PseudoVLSEG5E8_V_MF2 = 4752, PseudoVLSEG5E8_V_MF2_MASK = 4753, PseudoVLSEG5E8_V_MF2_TU = 4754, PseudoVLSEG5E8_V_MF4 = 4755, PseudoVLSEG5E8_V_MF4_MASK = 4756, PseudoVLSEG5E8_V_MF4_TU = 4757, PseudoVLSEG5E8_V_MF8 = 4758, PseudoVLSEG5E8_V_MF8_MASK = 4759, PseudoVLSEG5E8_V_MF8_TU = 4760, PseudoVLSEG6E16FF_V_M1 = 4761, PseudoVLSEG6E16FF_V_M1_MASK = 4762, PseudoVLSEG6E16FF_V_M1_TU = 4763, PseudoVLSEG6E16FF_V_MF2 = 4764, PseudoVLSEG6E16FF_V_MF2_MASK = 4765, PseudoVLSEG6E16FF_V_MF2_TU = 4766, PseudoVLSEG6E16FF_V_MF4 = 4767, PseudoVLSEG6E16FF_V_MF4_MASK = 4768, PseudoVLSEG6E16FF_V_MF4_TU = 4769, PseudoVLSEG6E16_V_M1 = 4770, PseudoVLSEG6E16_V_M1_MASK = 4771, PseudoVLSEG6E16_V_M1_TU = 4772, PseudoVLSEG6E16_V_MF2 = 4773, PseudoVLSEG6E16_V_MF2_MASK = 4774, PseudoVLSEG6E16_V_MF2_TU = 4775, PseudoVLSEG6E16_V_MF4 = 4776, PseudoVLSEG6E16_V_MF4_MASK = 4777, PseudoVLSEG6E16_V_MF4_TU = 4778, PseudoVLSEG6E32FF_V_M1 = 4779, PseudoVLSEG6E32FF_V_M1_MASK = 4780, PseudoVLSEG6E32FF_V_M1_TU = 4781, PseudoVLSEG6E32FF_V_MF2 = 4782, PseudoVLSEG6E32FF_V_MF2_MASK = 4783, PseudoVLSEG6E32FF_V_MF2_TU = 4784, PseudoVLSEG6E32_V_M1 = 4785, PseudoVLSEG6E32_V_M1_MASK = 4786, PseudoVLSEG6E32_V_M1_TU = 4787, PseudoVLSEG6E32_V_MF2 = 4788, PseudoVLSEG6E32_V_MF2_MASK = 4789, PseudoVLSEG6E32_V_MF2_TU = 4790, PseudoVLSEG6E64FF_V_M1 = 4791, PseudoVLSEG6E64FF_V_M1_MASK = 4792, PseudoVLSEG6E64FF_V_M1_TU = 4793, PseudoVLSEG6E64_V_M1 = 4794, PseudoVLSEG6E64_V_M1_MASK = 4795, PseudoVLSEG6E64_V_M1_TU = 4796, PseudoVLSEG6E8FF_V_M1 = 4797, PseudoVLSEG6E8FF_V_M1_MASK = 4798, PseudoVLSEG6E8FF_V_M1_TU = 4799, PseudoVLSEG6E8FF_V_MF2 = 4800, PseudoVLSEG6E8FF_V_MF2_MASK = 4801, PseudoVLSEG6E8FF_V_MF2_TU = 4802, PseudoVLSEG6E8FF_V_MF4 = 4803, PseudoVLSEG6E8FF_V_MF4_MASK = 4804, PseudoVLSEG6E8FF_V_MF4_TU = 4805, PseudoVLSEG6E8FF_V_MF8 = 4806, PseudoVLSEG6E8FF_V_MF8_MASK = 4807, PseudoVLSEG6E8FF_V_MF8_TU = 4808, PseudoVLSEG6E8_V_M1 = 4809, PseudoVLSEG6E8_V_M1_MASK = 4810, PseudoVLSEG6E8_V_M1_TU = 4811, PseudoVLSEG6E8_V_MF2 = 4812, PseudoVLSEG6E8_V_MF2_MASK = 4813, PseudoVLSEG6E8_V_MF2_TU = 4814, PseudoVLSEG6E8_V_MF4 = 4815, PseudoVLSEG6E8_V_MF4_MASK = 4816, PseudoVLSEG6E8_V_MF4_TU = 4817, PseudoVLSEG6E8_V_MF8 = 4818, PseudoVLSEG6E8_V_MF8_MASK = 4819, PseudoVLSEG6E8_V_MF8_TU = 4820, PseudoVLSEG7E16FF_V_M1 = 4821, PseudoVLSEG7E16FF_V_M1_MASK = 4822, PseudoVLSEG7E16FF_V_M1_TU = 4823, PseudoVLSEG7E16FF_V_MF2 = 4824, PseudoVLSEG7E16FF_V_MF2_MASK = 4825, PseudoVLSEG7E16FF_V_MF2_TU = 4826, PseudoVLSEG7E16FF_V_MF4 = 4827, PseudoVLSEG7E16FF_V_MF4_MASK = 4828, PseudoVLSEG7E16FF_V_MF4_TU = 4829, PseudoVLSEG7E16_V_M1 = 4830, PseudoVLSEG7E16_V_M1_MASK = 4831, PseudoVLSEG7E16_V_M1_TU = 4832, PseudoVLSEG7E16_V_MF2 = 4833, PseudoVLSEG7E16_V_MF2_MASK = 4834, PseudoVLSEG7E16_V_MF2_TU = 4835, PseudoVLSEG7E16_V_MF4 = 4836, PseudoVLSEG7E16_V_MF4_MASK = 4837, PseudoVLSEG7E16_V_MF4_TU = 4838, PseudoVLSEG7E32FF_V_M1 = 4839, PseudoVLSEG7E32FF_V_M1_MASK = 4840, PseudoVLSEG7E32FF_V_M1_TU = 4841, PseudoVLSEG7E32FF_V_MF2 = 4842, PseudoVLSEG7E32FF_V_MF2_MASK = 4843, PseudoVLSEG7E32FF_V_MF2_TU = 4844, PseudoVLSEG7E32_V_M1 = 4845, PseudoVLSEG7E32_V_M1_MASK = 4846, PseudoVLSEG7E32_V_M1_TU = 4847, PseudoVLSEG7E32_V_MF2 = 4848, PseudoVLSEG7E32_V_MF2_MASK = 4849, PseudoVLSEG7E32_V_MF2_TU = 4850, PseudoVLSEG7E64FF_V_M1 = 4851, PseudoVLSEG7E64FF_V_M1_MASK = 4852, PseudoVLSEG7E64FF_V_M1_TU = 4853, PseudoVLSEG7E64_V_M1 = 4854, PseudoVLSEG7E64_V_M1_MASK = 4855, PseudoVLSEG7E64_V_M1_TU = 4856, PseudoVLSEG7E8FF_V_M1 = 4857, PseudoVLSEG7E8FF_V_M1_MASK = 4858, PseudoVLSEG7E8FF_V_M1_TU = 4859, PseudoVLSEG7E8FF_V_MF2 = 4860, PseudoVLSEG7E8FF_V_MF2_MASK = 4861, PseudoVLSEG7E8FF_V_MF2_TU = 4862, PseudoVLSEG7E8FF_V_MF4 = 4863, PseudoVLSEG7E8FF_V_MF4_MASK = 4864, PseudoVLSEG7E8FF_V_MF4_TU = 4865, PseudoVLSEG7E8FF_V_MF8 = 4866, PseudoVLSEG7E8FF_V_MF8_MASK = 4867, PseudoVLSEG7E8FF_V_MF8_TU = 4868, PseudoVLSEG7E8_V_M1 = 4869, PseudoVLSEG7E8_V_M1_MASK = 4870, PseudoVLSEG7E8_V_M1_TU = 4871, PseudoVLSEG7E8_V_MF2 = 4872, PseudoVLSEG7E8_V_MF2_MASK = 4873, PseudoVLSEG7E8_V_MF2_TU = 4874, PseudoVLSEG7E8_V_MF4 = 4875, PseudoVLSEG7E8_V_MF4_MASK = 4876, PseudoVLSEG7E8_V_MF4_TU = 4877, PseudoVLSEG7E8_V_MF8 = 4878, PseudoVLSEG7E8_V_MF8_MASK = 4879, PseudoVLSEG7E8_V_MF8_TU = 4880, PseudoVLSEG8E16FF_V_M1 = 4881, PseudoVLSEG8E16FF_V_M1_MASK = 4882, PseudoVLSEG8E16FF_V_M1_TU = 4883, PseudoVLSEG8E16FF_V_MF2 = 4884, PseudoVLSEG8E16FF_V_MF2_MASK = 4885, PseudoVLSEG8E16FF_V_MF2_TU = 4886, PseudoVLSEG8E16FF_V_MF4 = 4887, PseudoVLSEG8E16FF_V_MF4_MASK = 4888, PseudoVLSEG8E16FF_V_MF4_TU = 4889, PseudoVLSEG8E16_V_M1 = 4890, PseudoVLSEG8E16_V_M1_MASK = 4891, PseudoVLSEG8E16_V_M1_TU = 4892, PseudoVLSEG8E16_V_MF2 = 4893, PseudoVLSEG8E16_V_MF2_MASK = 4894, PseudoVLSEG8E16_V_MF2_TU = 4895, PseudoVLSEG8E16_V_MF4 = 4896, PseudoVLSEG8E16_V_MF4_MASK = 4897, PseudoVLSEG8E16_V_MF4_TU = 4898, PseudoVLSEG8E32FF_V_M1 = 4899, PseudoVLSEG8E32FF_V_M1_MASK = 4900, PseudoVLSEG8E32FF_V_M1_TU = 4901, PseudoVLSEG8E32FF_V_MF2 = 4902, PseudoVLSEG8E32FF_V_MF2_MASK = 4903, PseudoVLSEG8E32FF_V_MF2_TU = 4904, PseudoVLSEG8E32_V_M1 = 4905, PseudoVLSEG8E32_V_M1_MASK = 4906, PseudoVLSEG8E32_V_M1_TU = 4907, PseudoVLSEG8E32_V_MF2 = 4908, PseudoVLSEG8E32_V_MF2_MASK = 4909, PseudoVLSEG8E32_V_MF2_TU = 4910, PseudoVLSEG8E64FF_V_M1 = 4911, PseudoVLSEG8E64FF_V_M1_MASK = 4912, PseudoVLSEG8E64FF_V_M1_TU = 4913, PseudoVLSEG8E64_V_M1 = 4914, PseudoVLSEG8E64_V_M1_MASK = 4915, PseudoVLSEG8E64_V_M1_TU = 4916, PseudoVLSEG8E8FF_V_M1 = 4917, PseudoVLSEG8E8FF_V_M1_MASK = 4918, PseudoVLSEG8E8FF_V_M1_TU = 4919, PseudoVLSEG8E8FF_V_MF2 = 4920, PseudoVLSEG8E8FF_V_MF2_MASK = 4921, PseudoVLSEG8E8FF_V_MF2_TU = 4922, PseudoVLSEG8E8FF_V_MF4 = 4923, PseudoVLSEG8E8FF_V_MF4_MASK = 4924, PseudoVLSEG8E8FF_V_MF4_TU = 4925, PseudoVLSEG8E8FF_V_MF8 = 4926, PseudoVLSEG8E8FF_V_MF8_MASK = 4927, PseudoVLSEG8E8FF_V_MF8_TU = 4928, PseudoVLSEG8E8_V_M1 = 4929, PseudoVLSEG8E8_V_M1_MASK = 4930, PseudoVLSEG8E8_V_M1_TU = 4931, PseudoVLSEG8E8_V_MF2 = 4932, PseudoVLSEG8E8_V_MF2_MASK = 4933, PseudoVLSEG8E8_V_MF2_TU = 4934, PseudoVLSEG8E8_V_MF4 = 4935, PseudoVLSEG8E8_V_MF4_MASK = 4936, PseudoVLSEG8E8_V_MF4_TU = 4937, PseudoVLSEG8E8_V_MF8 = 4938, PseudoVLSEG8E8_V_MF8_MASK = 4939, PseudoVLSEG8E8_V_MF8_TU = 4940, PseudoVLSSEG2E16_V_M1 = 4941, PseudoVLSSEG2E16_V_M1_MASK = 4942, PseudoVLSSEG2E16_V_M1_TU = 4943, PseudoVLSSEG2E16_V_M2 = 4944, PseudoVLSSEG2E16_V_M2_MASK = 4945, PseudoVLSSEG2E16_V_M2_TU = 4946, PseudoVLSSEG2E16_V_M4 = 4947, PseudoVLSSEG2E16_V_M4_MASK = 4948, PseudoVLSSEG2E16_V_M4_TU = 4949, PseudoVLSSEG2E16_V_MF2 = 4950, PseudoVLSSEG2E16_V_MF2_MASK = 4951, PseudoVLSSEG2E16_V_MF2_TU = 4952, PseudoVLSSEG2E16_V_MF4 = 4953, PseudoVLSSEG2E16_V_MF4_MASK = 4954, PseudoVLSSEG2E16_V_MF4_TU = 4955, PseudoVLSSEG2E32_V_M1 = 4956, PseudoVLSSEG2E32_V_M1_MASK = 4957, PseudoVLSSEG2E32_V_M1_TU = 4958, PseudoVLSSEG2E32_V_M2 = 4959, PseudoVLSSEG2E32_V_M2_MASK = 4960, PseudoVLSSEG2E32_V_M2_TU = 4961, PseudoVLSSEG2E32_V_M4 = 4962, PseudoVLSSEG2E32_V_M4_MASK = 4963, PseudoVLSSEG2E32_V_M4_TU = 4964, PseudoVLSSEG2E32_V_MF2 = 4965, PseudoVLSSEG2E32_V_MF2_MASK = 4966, PseudoVLSSEG2E32_V_MF2_TU = 4967, PseudoVLSSEG2E64_V_M1 = 4968, PseudoVLSSEG2E64_V_M1_MASK = 4969, PseudoVLSSEG2E64_V_M1_TU = 4970, PseudoVLSSEG2E64_V_M2 = 4971, PseudoVLSSEG2E64_V_M2_MASK = 4972, PseudoVLSSEG2E64_V_M2_TU = 4973, PseudoVLSSEG2E64_V_M4 = 4974, PseudoVLSSEG2E64_V_M4_MASK = 4975, PseudoVLSSEG2E64_V_M4_TU = 4976, PseudoVLSSEG2E8_V_M1 = 4977, PseudoVLSSEG2E8_V_M1_MASK = 4978, PseudoVLSSEG2E8_V_M1_TU = 4979, PseudoVLSSEG2E8_V_M2 = 4980, PseudoVLSSEG2E8_V_M2_MASK = 4981, PseudoVLSSEG2E8_V_M2_TU = 4982, PseudoVLSSEG2E8_V_M4 = 4983, PseudoVLSSEG2E8_V_M4_MASK = 4984, PseudoVLSSEG2E8_V_M4_TU = 4985, PseudoVLSSEG2E8_V_MF2 = 4986, PseudoVLSSEG2E8_V_MF2_MASK = 4987, PseudoVLSSEG2E8_V_MF2_TU = 4988, PseudoVLSSEG2E8_V_MF4 = 4989, PseudoVLSSEG2E8_V_MF4_MASK = 4990, PseudoVLSSEG2E8_V_MF4_TU = 4991, PseudoVLSSEG2E8_V_MF8 = 4992, PseudoVLSSEG2E8_V_MF8_MASK = 4993, PseudoVLSSEG2E8_V_MF8_TU = 4994, PseudoVLSSEG3E16_V_M1 = 4995, PseudoVLSSEG3E16_V_M1_MASK = 4996, PseudoVLSSEG3E16_V_M1_TU = 4997, PseudoVLSSEG3E16_V_M2 = 4998, PseudoVLSSEG3E16_V_M2_MASK = 4999, PseudoVLSSEG3E16_V_M2_TU = 5000, PseudoVLSSEG3E16_V_MF2 = 5001, PseudoVLSSEG3E16_V_MF2_MASK = 5002, PseudoVLSSEG3E16_V_MF2_TU = 5003, PseudoVLSSEG3E16_V_MF4 = 5004, PseudoVLSSEG3E16_V_MF4_MASK = 5005, PseudoVLSSEG3E16_V_MF4_TU = 5006, PseudoVLSSEG3E32_V_M1 = 5007, PseudoVLSSEG3E32_V_M1_MASK = 5008, PseudoVLSSEG3E32_V_M1_TU = 5009, PseudoVLSSEG3E32_V_M2 = 5010, PseudoVLSSEG3E32_V_M2_MASK = 5011, PseudoVLSSEG3E32_V_M2_TU = 5012, PseudoVLSSEG3E32_V_MF2 = 5013, PseudoVLSSEG3E32_V_MF2_MASK = 5014, PseudoVLSSEG3E32_V_MF2_TU = 5015, PseudoVLSSEG3E64_V_M1 = 5016, PseudoVLSSEG3E64_V_M1_MASK = 5017, PseudoVLSSEG3E64_V_M1_TU = 5018, PseudoVLSSEG3E64_V_M2 = 5019, PseudoVLSSEG3E64_V_M2_MASK = 5020, PseudoVLSSEG3E64_V_M2_TU = 5021, PseudoVLSSEG3E8_V_M1 = 5022, PseudoVLSSEG3E8_V_M1_MASK = 5023, PseudoVLSSEG3E8_V_M1_TU = 5024, PseudoVLSSEG3E8_V_M2 = 5025, PseudoVLSSEG3E8_V_M2_MASK = 5026, PseudoVLSSEG3E8_V_M2_TU = 5027, PseudoVLSSEG3E8_V_MF2 = 5028, PseudoVLSSEG3E8_V_MF2_MASK = 5029, PseudoVLSSEG3E8_V_MF2_TU = 5030, PseudoVLSSEG3E8_V_MF4 = 5031, PseudoVLSSEG3E8_V_MF4_MASK = 5032, PseudoVLSSEG3E8_V_MF4_TU = 5033, PseudoVLSSEG3E8_V_MF8 = 5034, PseudoVLSSEG3E8_V_MF8_MASK = 5035, PseudoVLSSEG3E8_V_MF8_TU = 5036, PseudoVLSSEG4E16_V_M1 = 5037, PseudoVLSSEG4E16_V_M1_MASK = 5038, PseudoVLSSEG4E16_V_M1_TU = 5039, PseudoVLSSEG4E16_V_M2 = 5040, PseudoVLSSEG4E16_V_M2_MASK = 5041, PseudoVLSSEG4E16_V_M2_TU = 5042, PseudoVLSSEG4E16_V_MF2 = 5043, PseudoVLSSEG4E16_V_MF2_MASK = 5044, PseudoVLSSEG4E16_V_MF2_TU = 5045, PseudoVLSSEG4E16_V_MF4 = 5046, PseudoVLSSEG4E16_V_MF4_MASK = 5047, PseudoVLSSEG4E16_V_MF4_TU = 5048, PseudoVLSSEG4E32_V_M1 = 5049, PseudoVLSSEG4E32_V_M1_MASK = 5050, PseudoVLSSEG4E32_V_M1_TU = 5051, PseudoVLSSEG4E32_V_M2 = 5052, PseudoVLSSEG4E32_V_M2_MASK = 5053, PseudoVLSSEG4E32_V_M2_TU = 5054, PseudoVLSSEG4E32_V_MF2 = 5055, PseudoVLSSEG4E32_V_MF2_MASK = 5056, PseudoVLSSEG4E32_V_MF2_TU = 5057, PseudoVLSSEG4E64_V_M1 = 5058, PseudoVLSSEG4E64_V_M1_MASK = 5059, PseudoVLSSEG4E64_V_M1_TU = 5060, PseudoVLSSEG4E64_V_M2 = 5061, PseudoVLSSEG4E64_V_M2_MASK = 5062, PseudoVLSSEG4E64_V_M2_TU = 5063, PseudoVLSSEG4E8_V_M1 = 5064, PseudoVLSSEG4E8_V_M1_MASK = 5065, PseudoVLSSEG4E8_V_M1_TU = 5066, PseudoVLSSEG4E8_V_M2 = 5067, PseudoVLSSEG4E8_V_M2_MASK = 5068, PseudoVLSSEG4E8_V_M2_TU = 5069, PseudoVLSSEG4E8_V_MF2 = 5070, PseudoVLSSEG4E8_V_MF2_MASK = 5071, PseudoVLSSEG4E8_V_MF2_TU = 5072, PseudoVLSSEG4E8_V_MF4 = 5073, PseudoVLSSEG4E8_V_MF4_MASK = 5074, PseudoVLSSEG4E8_V_MF4_TU = 5075, PseudoVLSSEG4E8_V_MF8 = 5076, PseudoVLSSEG4E8_V_MF8_MASK = 5077, PseudoVLSSEG4E8_V_MF8_TU = 5078, PseudoVLSSEG5E16_V_M1 = 5079, PseudoVLSSEG5E16_V_M1_MASK = 5080, PseudoVLSSEG5E16_V_M1_TU = 5081, PseudoVLSSEG5E16_V_MF2 = 5082, PseudoVLSSEG5E16_V_MF2_MASK = 5083, PseudoVLSSEG5E16_V_MF2_TU = 5084, PseudoVLSSEG5E16_V_MF4 = 5085, PseudoVLSSEG5E16_V_MF4_MASK = 5086, PseudoVLSSEG5E16_V_MF4_TU = 5087, PseudoVLSSEG5E32_V_M1 = 5088, PseudoVLSSEG5E32_V_M1_MASK = 5089, PseudoVLSSEG5E32_V_M1_TU = 5090, PseudoVLSSEG5E32_V_MF2 = 5091, PseudoVLSSEG5E32_V_MF2_MASK = 5092, PseudoVLSSEG5E32_V_MF2_TU = 5093, PseudoVLSSEG5E64_V_M1 = 5094, PseudoVLSSEG5E64_V_M1_MASK = 5095, PseudoVLSSEG5E64_V_M1_TU = 5096, PseudoVLSSEG5E8_V_M1 = 5097, PseudoVLSSEG5E8_V_M1_MASK = 5098, PseudoVLSSEG5E8_V_M1_TU = 5099, PseudoVLSSEG5E8_V_MF2 = 5100, PseudoVLSSEG5E8_V_MF2_MASK = 5101, PseudoVLSSEG5E8_V_MF2_TU = 5102, PseudoVLSSEG5E8_V_MF4 = 5103, PseudoVLSSEG5E8_V_MF4_MASK = 5104, PseudoVLSSEG5E8_V_MF4_TU = 5105, PseudoVLSSEG5E8_V_MF8 = 5106, PseudoVLSSEG5E8_V_MF8_MASK = 5107, PseudoVLSSEG5E8_V_MF8_TU = 5108, PseudoVLSSEG6E16_V_M1 = 5109, PseudoVLSSEG6E16_V_M1_MASK = 5110, PseudoVLSSEG6E16_V_M1_TU = 5111, PseudoVLSSEG6E16_V_MF2 = 5112, PseudoVLSSEG6E16_V_MF2_MASK = 5113, PseudoVLSSEG6E16_V_MF2_TU = 5114, PseudoVLSSEG6E16_V_MF4 = 5115, PseudoVLSSEG6E16_V_MF4_MASK = 5116, PseudoVLSSEG6E16_V_MF4_TU = 5117, PseudoVLSSEG6E32_V_M1 = 5118, PseudoVLSSEG6E32_V_M1_MASK = 5119, PseudoVLSSEG6E32_V_M1_TU = 5120, PseudoVLSSEG6E32_V_MF2 = 5121, PseudoVLSSEG6E32_V_MF2_MASK = 5122, PseudoVLSSEG6E32_V_MF2_TU = 5123, PseudoVLSSEG6E64_V_M1 = 5124, PseudoVLSSEG6E64_V_M1_MASK = 5125, PseudoVLSSEG6E64_V_M1_TU = 5126, PseudoVLSSEG6E8_V_M1 = 5127, PseudoVLSSEG6E8_V_M1_MASK = 5128, PseudoVLSSEG6E8_V_M1_TU = 5129, PseudoVLSSEG6E8_V_MF2 = 5130, PseudoVLSSEG6E8_V_MF2_MASK = 5131, PseudoVLSSEG6E8_V_MF2_TU = 5132, PseudoVLSSEG6E8_V_MF4 = 5133, PseudoVLSSEG6E8_V_MF4_MASK = 5134, PseudoVLSSEG6E8_V_MF4_TU = 5135, PseudoVLSSEG6E8_V_MF8 = 5136, PseudoVLSSEG6E8_V_MF8_MASK = 5137, PseudoVLSSEG6E8_V_MF8_TU = 5138, PseudoVLSSEG7E16_V_M1 = 5139, PseudoVLSSEG7E16_V_M1_MASK = 5140, PseudoVLSSEG7E16_V_M1_TU = 5141, PseudoVLSSEG7E16_V_MF2 = 5142, PseudoVLSSEG7E16_V_MF2_MASK = 5143, PseudoVLSSEG7E16_V_MF2_TU = 5144, PseudoVLSSEG7E16_V_MF4 = 5145, PseudoVLSSEG7E16_V_MF4_MASK = 5146, PseudoVLSSEG7E16_V_MF4_TU = 5147, PseudoVLSSEG7E32_V_M1 = 5148, PseudoVLSSEG7E32_V_M1_MASK = 5149, PseudoVLSSEG7E32_V_M1_TU = 5150, PseudoVLSSEG7E32_V_MF2 = 5151, PseudoVLSSEG7E32_V_MF2_MASK = 5152, PseudoVLSSEG7E32_V_MF2_TU = 5153, PseudoVLSSEG7E64_V_M1 = 5154, PseudoVLSSEG7E64_V_M1_MASK = 5155, PseudoVLSSEG7E64_V_M1_TU = 5156, PseudoVLSSEG7E8_V_M1 = 5157, PseudoVLSSEG7E8_V_M1_MASK = 5158, PseudoVLSSEG7E8_V_M1_TU = 5159, PseudoVLSSEG7E8_V_MF2 = 5160, PseudoVLSSEG7E8_V_MF2_MASK = 5161, PseudoVLSSEG7E8_V_MF2_TU = 5162, PseudoVLSSEG7E8_V_MF4 = 5163, PseudoVLSSEG7E8_V_MF4_MASK = 5164, PseudoVLSSEG7E8_V_MF4_TU = 5165, PseudoVLSSEG7E8_V_MF8 = 5166, PseudoVLSSEG7E8_V_MF8_MASK = 5167, PseudoVLSSEG7E8_V_MF8_TU = 5168, PseudoVLSSEG8E16_V_M1 = 5169, PseudoVLSSEG8E16_V_M1_MASK = 5170, PseudoVLSSEG8E16_V_M1_TU = 5171, PseudoVLSSEG8E16_V_MF2 = 5172, PseudoVLSSEG8E16_V_MF2_MASK = 5173, PseudoVLSSEG8E16_V_MF2_TU = 5174, PseudoVLSSEG8E16_V_MF4 = 5175, PseudoVLSSEG8E16_V_MF4_MASK = 5176, PseudoVLSSEG8E16_V_MF4_TU = 5177, PseudoVLSSEG8E32_V_M1 = 5178, PseudoVLSSEG8E32_V_M1_MASK = 5179, PseudoVLSSEG8E32_V_M1_TU = 5180, PseudoVLSSEG8E32_V_MF2 = 5181, PseudoVLSSEG8E32_V_MF2_MASK = 5182, PseudoVLSSEG8E32_V_MF2_TU = 5183, PseudoVLSSEG8E64_V_M1 = 5184, PseudoVLSSEG8E64_V_M1_MASK = 5185, PseudoVLSSEG8E64_V_M1_TU = 5186, PseudoVLSSEG8E8_V_M1 = 5187, PseudoVLSSEG8E8_V_M1_MASK = 5188, PseudoVLSSEG8E8_V_M1_TU = 5189, PseudoVLSSEG8E8_V_MF2 = 5190, PseudoVLSSEG8E8_V_MF2_MASK = 5191, PseudoVLSSEG8E8_V_MF2_TU = 5192, PseudoVLSSEG8E8_V_MF4 = 5193, PseudoVLSSEG8E8_V_MF4_MASK = 5194, PseudoVLSSEG8E8_V_MF4_TU = 5195, PseudoVLSSEG8E8_V_MF8 = 5196, PseudoVLSSEG8E8_V_MF8_MASK = 5197, PseudoVLSSEG8E8_V_MF8_TU = 5198, PseudoVLUXEI16_V_M1_M1 = 5199, PseudoVLUXEI16_V_M1_M1_MASK = 5200, PseudoVLUXEI16_V_M1_M1_TU = 5201, PseudoVLUXEI16_V_M1_M2 = 5202, PseudoVLUXEI16_V_M1_M2_MASK = 5203, PseudoVLUXEI16_V_M1_M2_TU = 5204, PseudoVLUXEI16_V_M1_M4 = 5205, PseudoVLUXEI16_V_M1_M4_MASK = 5206, PseudoVLUXEI16_V_M1_M4_TU = 5207, PseudoVLUXEI16_V_M1_MF2 = 5208, PseudoVLUXEI16_V_M1_MF2_MASK = 5209, PseudoVLUXEI16_V_M1_MF2_TU = 5210, PseudoVLUXEI16_V_M2_M1 = 5211, PseudoVLUXEI16_V_M2_M1_MASK = 5212, PseudoVLUXEI16_V_M2_M1_TU = 5213, PseudoVLUXEI16_V_M2_M2 = 5214, PseudoVLUXEI16_V_M2_M2_MASK = 5215, PseudoVLUXEI16_V_M2_M2_TU = 5216, PseudoVLUXEI16_V_M2_M4 = 5217, PseudoVLUXEI16_V_M2_M4_MASK = 5218, PseudoVLUXEI16_V_M2_M4_TU = 5219, PseudoVLUXEI16_V_M2_M8 = 5220, PseudoVLUXEI16_V_M2_M8_MASK = 5221, PseudoVLUXEI16_V_M2_M8_TU = 5222, PseudoVLUXEI16_V_M4_M2 = 5223, PseudoVLUXEI16_V_M4_M2_MASK = 5224, PseudoVLUXEI16_V_M4_M2_TU = 5225, PseudoVLUXEI16_V_M4_M4 = 5226, PseudoVLUXEI16_V_M4_M4_MASK = 5227, PseudoVLUXEI16_V_M4_M4_TU = 5228, PseudoVLUXEI16_V_M4_M8 = 5229, PseudoVLUXEI16_V_M4_M8_MASK = 5230, PseudoVLUXEI16_V_M4_M8_TU = 5231, PseudoVLUXEI16_V_M8_M4 = 5232, PseudoVLUXEI16_V_M8_M4_MASK = 5233, PseudoVLUXEI16_V_M8_M4_TU = 5234, PseudoVLUXEI16_V_M8_M8 = 5235, PseudoVLUXEI16_V_M8_M8_MASK = 5236, PseudoVLUXEI16_V_M8_M8_TU = 5237, PseudoVLUXEI16_V_MF2_M1 = 5238, PseudoVLUXEI16_V_MF2_M1_MASK = 5239, PseudoVLUXEI16_V_MF2_M1_TU = 5240, PseudoVLUXEI16_V_MF2_M2 = 5241, PseudoVLUXEI16_V_MF2_M2_MASK = 5242, PseudoVLUXEI16_V_MF2_M2_TU = 5243, PseudoVLUXEI16_V_MF2_MF2 = 5244, PseudoVLUXEI16_V_MF2_MF2_MASK = 5245, PseudoVLUXEI16_V_MF2_MF2_TU = 5246, PseudoVLUXEI16_V_MF2_MF4 = 5247, PseudoVLUXEI16_V_MF2_MF4_MASK = 5248, PseudoVLUXEI16_V_MF2_MF4_TU = 5249, PseudoVLUXEI16_V_MF4_M1 = 5250, PseudoVLUXEI16_V_MF4_M1_MASK = 5251, PseudoVLUXEI16_V_MF4_M1_TU = 5252, PseudoVLUXEI16_V_MF4_MF2 = 5253, PseudoVLUXEI16_V_MF4_MF2_MASK = 5254, PseudoVLUXEI16_V_MF4_MF2_TU = 5255, PseudoVLUXEI16_V_MF4_MF4 = 5256, PseudoVLUXEI16_V_MF4_MF4_MASK = 5257, PseudoVLUXEI16_V_MF4_MF4_TU = 5258, PseudoVLUXEI16_V_MF4_MF8 = 5259, PseudoVLUXEI16_V_MF4_MF8_MASK = 5260, PseudoVLUXEI16_V_MF4_MF8_TU = 5261, PseudoVLUXEI32_V_M1_M1 = 5262, PseudoVLUXEI32_V_M1_M1_MASK = 5263, PseudoVLUXEI32_V_M1_M1_TU = 5264, PseudoVLUXEI32_V_M1_M2 = 5265, PseudoVLUXEI32_V_M1_M2_MASK = 5266, PseudoVLUXEI32_V_M1_M2_TU = 5267, PseudoVLUXEI32_V_M1_MF2 = 5268, PseudoVLUXEI32_V_M1_MF2_MASK = 5269, PseudoVLUXEI32_V_M1_MF2_TU = 5270, PseudoVLUXEI32_V_M1_MF4 = 5271, PseudoVLUXEI32_V_M1_MF4_MASK = 5272, PseudoVLUXEI32_V_M1_MF4_TU = 5273, PseudoVLUXEI32_V_M2_M1 = 5274, PseudoVLUXEI32_V_M2_M1_MASK = 5275, PseudoVLUXEI32_V_M2_M1_TU = 5276, PseudoVLUXEI32_V_M2_M2 = 5277, PseudoVLUXEI32_V_M2_M2_MASK = 5278, PseudoVLUXEI32_V_M2_M2_TU = 5279, PseudoVLUXEI32_V_M2_M4 = 5280, PseudoVLUXEI32_V_M2_M4_MASK = 5281, PseudoVLUXEI32_V_M2_M4_TU = 5282, PseudoVLUXEI32_V_M2_MF2 = 5283, PseudoVLUXEI32_V_M2_MF2_MASK = 5284, PseudoVLUXEI32_V_M2_MF2_TU = 5285, PseudoVLUXEI32_V_M4_M1 = 5286, PseudoVLUXEI32_V_M4_M1_MASK = 5287, PseudoVLUXEI32_V_M4_M1_TU = 5288, PseudoVLUXEI32_V_M4_M2 = 5289, PseudoVLUXEI32_V_M4_M2_MASK = 5290, PseudoVLUXEI32_V_M4_M2_TU = 5291, PseudoVLUXEI32_V_M4_M4 = 5292, PseudoVLUXEI32_V_M4_M4_MASK = 5293, PseudoVLUXEI32_V_M4_M4_TU = 5294, PseudoVLUXEI32_V_M4_M8 = 5295, PseudoVLUXEI32_V_M4_M8_MASK = 5296, PseudoVLUXEI32_V_M4_M8_TU = 5297, PseudoVLUXEI32_V_M8_M2 = 5298, PseudoVLUXEI32_V_M8_M2_MASK = 5299, PseudoVLUXEI32_V_M8_M2_TU = 5300, PseudoVLUXEI32_V_M8_M4 = 5301, PseudoVLUXEI32_V_M8_M4_MASK = 5302, PseudoVLUXEI32_V_M8_M4_TU = 5303, PseudoVLUXEI32_V_M8_M8 = 5304, PseudoVLUXEI32_V_M8_M8_MASK = 5305, PseudoVLUXEI32_V_M8_M8_TU = 5306, PseudoVLUXEI32_V_MF2_M1 = 5307, PseudoVLUXEI32_V_MF2_M1_MASK = 5308, PseudoVLUXEI32_V_MF2_M1_TU = 5309, PseudoVLUXEI32_V_MF2_MF2 = 5310, PseudoVLUXEI32_V_MF2_MF2_MASK = 5311, PseudoVLUXEI32_V_MF2_MF2_TU = 5312, PseudoVLUXEI32_V_MF2_MF4 = 5313, PseudoVLUXEI32_V_MF2_MF4_MASK = 5314, PseudoVLUXEI32_V_MF2_MF4_TU = 5315, PseudoVLUXEI32_V_MF2_MF8 = 5316, PseudoVLUXEI32_V_MF2_MF8_MASK = 5317, PseudoVLUXEI32_V_MF2_MF8_TU = 5318, PseudoVLUXEI64_V_M1_M1 = 5319, PseudoVLUXEI64_V_M1_M1_MASK = 5320, PseudoVLUXEI64_V_M1_M1_TU = 5321, PseudoVLUXEI64_V_M1_MF2 = 5322, PseudoVLUXEI64_V_M1_MF2_MASK = 5323, PseudoVLUXEI64_V_M1_MF2_TU = 5324, PseudoVLUXEI64_V_M1_MF4 = 5325, PseudoVLUXEI64_V_M1_MF4_MASK = 5326, PseudoVLUXEI64_V_M1_MF4_TU = 5327, PseudoVLUXEI64_V_M1_MF8 = 5328, PseudoVLUXEI64_V_M1_MF8_MASK = 5329, PseudoVLUXEI64_V_M1_MF8_TU = 5330, PseudoVLUXEI64_V_M2_M1 = 5331, PseudoVLUXEI64_V_M2_M1_MASK = 5332, PseudoVLUXEI64_V_M2_M1_TU = 5333, PseudoVLUXEI64_V_M2_M2 = 5334, PseudoVLUXEI64_V_M2_M2_MASK = 5335, PseudoVLUXEI64_V_M2_M2_TU = 5336, PseudoVLUXEI64_V_M2_MF2 = 5337, PseudoVLUXEI64_V_M2_MF2_MASK = 5338, PseudoVLUXEI64_V_M2_MF2_TU = 5339, PseudoVLUXEI64_V_M2_MF4 = 5340, PseudoVLUXEI64_V_M2_MF4_MASK = 5341, PseudoVLUXEI64_V_M2_MF4_TU = 5342, PseudoVLUXEI64_V_M4_M1 = 5343, PseudoVLUXEI64_V_M4_M1_MASK = 5344, PseudoVLUXEI64_V_M4_M1_TU = 5345, PseudoVLUXEI64_V_M4_M2 = 5346, PseudoVLUXEI64_V_M4_M2_MASK = 5347, PseudoVLUXEI64_V_M4_M2_TU = 5348, PseudoVLUXEI64_V_M4_M4 = 5349, PseudoVLUXEI64_V_M4_M4_MASK = 5350, PseudoVLUXEI64_V_M4_M4_TU = 5351, PseudoVLUXEI64_V_M4_MF2 = 5352, PseudoVLUXEI64_V_M4_MF2_MASK = 5353, PseudoVLUXEI64_V_M4_MF2_TU = 5354, PseudoVLUXEI64_V_M8_M1 = 5355, PseudoVLUXEI64_V_M8_M1_MASK = 5356, PseudoVLUXEI64_V_M8_M1_TU = 5357, PseudoVLUXEI64_V_M8_M2 = 5358, PseudoVLUXEI64_V_M8_M2_MASK = 5359, PseudoVLUXEI64_V_M8_M2_TU = 5360, PseudoVLUXEI64_V_M8_M4 = 5361, PseudoVLUXEI64_V_M8_M4_MASK = 5362, PseudoVLUXEI64_V_M8_M4_TU = 5363, PseudoVLUXEI64_V_M8_M8 = 5364, PseudoVLUXEI64_V_M8_M8_MASK = 5365, PseudoVLUXEI64_V_M8_M8_TU = 5366, PseudoVLUXEI8_V_M1_M1 = 5367, PseudoVLUXEI8_V_M1_M1_MASK = 5368, PseudoVLUXEI8_V_M1_M1_TU = 5369, PseudoVLUXEI8_V_M1_M2 = 5370, PseudoVLUXEI8_V_M1_M2_MASK = 5371, PseudoVLUXEI8_V_M1_M2_TU = 5372, PseudoVLUXEI8_V_M1_M4 = 5373, PseudoVLUXEI8_V_M1_M4_MASK = 5374, PseudoVLUXEI8_V_M1_M4_TU = 5375, PseudoVLUXEI8_V_M1_M8 = 5376, PseudoVLUXEI8_V_M1_M8_MASK = 5377, PseudoVLUXEI8_V_M1_M8_TU = 5378, PseudoVLUXEI8_V_M2_M2 = 5379, PseudoVLUXEI8_V_M2_M2_MASK = 5380, PseudoVLUXEI8_V_M2_M2_TU = 5381, PseudoVLUXEI8_V_M2_M4 = 5382, PseudoVLUXEI8_V_M2_M4_MASK = 5383, PseudoVLUXEI8_V_M2_M4_TU = 5384, PseudoVLUXEI8_V_M2_M8 = 5385, PseudoVLUXEI8_V_M2_M8_MASK = 5386, PseudoVLUXEI8_V_M2_M8_TU = 5387, PseudoVLUXEI8_V_M4_M4 = 5388, PseudoVLUXEI8_V_M4_M4_MASK = 5389, PseudoVLUXEI8_V_M4_M4_TU = 5390, PseudoVLUXEI8_V_M4_M8 = 5391, PseudoVLUXEI8_V_M4_M8_MASK = 5392, PseudoVLUXEI8_V_M4_M8_TU = 5393, PseudoVLUXEI8_V_M8_M8 = 5394, PseudoVLUXEI8_V_M8_M8_MASK = 5395, PseudoVLUXEI8_V_M8_M8_TU = 5396, PseudoVLUXEI8_V_MF2_M1 = 5397, PseudoVLUXEI8_V_MF2_M1_MASK = 5398, PseudoVLUXEI8_V_MF2_M1_TU = 5399, PseudoVLUXEI8_V_MF2_M2 = 5400, PseudoVLUXEI8_V_MF2_M2_MASK = 5401, PseudoVLUXEI8_V_MF2_M2_TU = 5402, PseudoVLUXEI8_V_MF2_M4 = 5403, PseudoVLUXEI8_V_MF2_M4_MASK = 5404, PseudoVLUXEI8_V_MF2_M4_TU = 5405, PseudoVLUXEI8_V_MF2_MF2 = 5406, PseudoVLUXEI8_V_MF2_MF2_MASK = 5407, PseudoVLUXEI8_V_MF2_MF2_TU = 5408, PseudoVLUXEI8_V_MF4_M1 = 5409, PseudoVLUXEI8_V_MF4_M1_MASK = 5410, PseudoVLUXEI8_V_MF4_M1_TU = 5411, PseudoVLUXEI8_V_MF4_M2 = 5412, PseudoVLUXEI8_V_MF4_M2_MASK = 5413, PseudoVLUXEI8_V_MF4_M2_TU = 5414, PseudoVLUXEI8_V_MF4_MF2 = 5415, PseudoVLUXEI8_V_MF4_MF2_MASK = 5416, PseudoVLUXEI8_V_MF4_MF2_TU = 5417, PseudoVLUXEI8_V_MF4_MF4 = 5418, PseudoVLUXEI8_V_MF4_MF4_MASK = 5419, PseudoVLUXEI8_V_MF4_MF4_TU = 5420, PseudoVLUXEI8_V_MF8_M1 = 5421, PseudoVLUXEI8_V_MF8_M1_MASK = 5422, PseudoVLUXEI8_V_MF8_M1_TU = 5423, PseudoVLUXEI8_V_MF8_MF2 = 5424, PseudoVLUXEI8_V_MF8_MF2_MASK = 5425, PseudoVLUXEI8_V_MF8_MF2_TU = 5426, PseudoVLUXEI8_V_MF8_MF4 = 5427, PseudoVLUXEI8_V_MF8_MF4_MASK = 5428, PseudoVLUXEI8_V_MF8_MF4_TU = 5429, PseudoVLUXEI8_V_MF8_MF8 = 5430, PseudoVLUXEI8_V_MF8_MF8_MASK = 5431, PseudoVLUXEI8_V_MF8_MF8_TU = 5432, PseudoVLUXSEG2EI16_V_M1_M1 = 5433, PseudoVLUXSEG2EI16_V_M1_M1_MASK = 5434, PseudoVLUXSEG2EI16_V_M1_M1_TU = 5435, PseudoVLUXSEG2EI16_V_M1_M2 = 5436, PseudoVLUXSEG2EI16_V_M1_M2_MASK = 5437, PseudoVLUXSEG2EI16_V_M1_M2_TU = 5438, PseudoVLUXSEG2EI16_V_M1_M4 = 5439, PseudoVLUXSEG2EI16_V_M1_M4_MASK = 5440, PseudoVLUXSEG2EI16_V_M1_M4_TU = 5441, PseudoVLUXSEG2EI16_V_M1_MF2 = 5442, PseudoVLUXSEG2EI16_V_M1_MF2_MASK = 5443, PseudoVLUXSEG2EI16_V_M1_MF2_TU = 5444, PseudoVLUXSEG2EI16_V_M2_M1 = 5445, PseudoVLUXSEG2EI16_V_M2_M1_MASK = 5446, PseudoVLUXSEG2EI16_V_M2_M1_TU = 5447, PseudoVLUXSEG2EI16_V_M2_M2 = 5448, PseudoVLUXSEG2EI16_V_M2_M2_MASK = 5449, PseudoVLUXSEG2EI16_V_M2_M2_TU = 5450, PseudoVLUXSEG2EI16_V_M2_M4 = 5451, PseudoVLUXSEG2EI16_V_M2_M4_MASK = 5452, PseudoVLUXSEG2EI16_V_M2_M4_TU = 5453, PseudoVLUXSEG2EI16_V_M4_M2 = 5454, PseudoVLUXSEG2EI16_V_M4_M2_MASK = 5455, PseudoVLUXSEG2EI16_V_M4_M2_TU = 5456, PseudoVLUXSEG2EI16_V_M4_M4 = 5457, PseudoVLUXSEG2EI16_V_M4_M4_MASK = 5458, PseudoVLUXSEG2EI16_V_M4_M4_TU = 5459, PseudoVLUXSEG2EI16_V_M8_M4 = 5460, PseudoVLUXSEG2EI16_V_M8_M4_MASK = 5461, PseudoVLUXSEG2EI16_V_M8_M4_TU = 5462, PseudoVLUXSEG2EI16_V_MF2_M1 = 5463, PseudoVLUXSEG2EI16_V_MF2_M1_MASK = 5464, PseudoVLUXSEG2EI16_V_MF2_M1_TU = 5465, PseudoVLUXSEG2EI16_V_MF2_M2 = 5466, PseudoVLUXSEG2EI16_V_MF2_M2_MASK = 5467, PseudoVLUXSEG2EI16_V_MF2_M2_TU = 5468, PseudoVLUXSEG2EI16_V_MF2_MF2 = 5469, PseudoVLUXSEG2EI16_V_MF2_MF2_MASK = 5470, PseudoVLUXSEG2EI16_V_MF2_MF2_TU = 5471, PseudoVLUXSEG2EI16_V_MF2_MF4 = 5472, PseudoVLUXSEG2EI16_V_MF2_MF4_MASK = 5473, PseudoVLUXSEG2EI16_V_MF2_MF4_TU = 5474, PseudoVLUXSEG2EI16_V_MF4_M1 = 5475, PseudoVLUXSEG2EI16_V_MF4_M1_MASK = 5476, PseudoVLUXSEG2EI16_V_MF4_M1_TU = 5477, PseudoVLUXSEG2EI16_V_MF4_MF2 = 5478, PseudoVLUXSEG2EI16_V_MF4_MF2_MASK = 5479, PseudoVLUXSEG2EI16_V_MF4_MF2_TU = 5480, PseudoVLUXSEG2EI16_V_MF4_MF4 = 5481, PseudoVLUXSEG2EI16_V_MF4_MF4_MASK = 5482, PseudoVLUXSEG2EI16_V_MF4_MF4_TU = 5483, PseudoVLUXSEG2EI16_V_MF4_MF8 = 5484, PseudoVLUXSEG2EI16_V_MF4_MF8_MASK = 5485, PseudoVLUXSEG2EI16_V_MF4_MF8_TU = 5486, PseudoVLUXSEG2EI32_V_M1_M1 = 5487, PseudoVLUXSEG2EI32_V_M1_M1_MASK = 5488, PseudoVLUXSEG2EI32_V_M1_M1_TU = 5489, PseudoVLUXSEG2EI32_V_M1_M2 = 5490, PseudoVLUXSEG2EI32_V_M1_M2_MASK = 5491, PseudoVLUXSEG2EI32_V_M1_M2_TU = 5492, PseudoVLUXSEG2EI32_V_M1_MF2 = 5493, PseudoVLUXSEG2EI32_V_M1_MF2_MASK = 5494, PseudoVLUXSEG2EI32_V_M1_MF2_TU = 5495, PseudoVLUXSEG2EI32_V_M1_MF4 = 5496, PseudoVLUXSEG2EI32_V_M1_MF4_MASK = 5497, PseudoVLUXSEG2EI32_V_M1_MF4_TU = 5498, PseudoVLUXSEG2EI32_V_M2_M1 = 5499, PseudoVLUXSEG2EI32_V_M2_M1_MASK = 5500, PseudoVLUXSEG2EI32_V_M2_M1_TU = 5501, PseudoVLUXSEG2EI32_V_M2_M2 = 5502, PseudoVLUXSEG2EI32_V_M2_M2_MASK = 5503, PseudoVLUXSEG2EI32_V_M2_M2_TU = 5504, PseudoVLUXSEG2EI32_V_M2_M4 = 5505, PseudoVLUXSEG2EI32_V_M2_M4_MASK = 5506, PseudoVLUXSEG2EI32_V_M2_M4_TU = 5507, PseudoVLUXSEG2EI32_V_M2_MF2 = 5508, PseudoVLUXSEG2EI32_V_M2_MF2_MASK = 5509, PseudoVLUXSEG2EI32_V_M2_MF2_TU = 5510, PseudoVLUXSEG2EI32_V_M4_M1 = 5511, PseudoVLUXSEG2EI32_V_M4_M1_MASK = 5512, PseudoVLUXSEG2EI32_V_M4_M1_TU = 5513, PseudoVLUXSEG2EI32_V_M4_M2 = 5514, PseudoVLUXSEG2EI32_V_M4_M2_MASK = 5515, PseudoVLUXSEG2EI32_V_M4_M2_TU = 5516, PseudoVLUXSEG2EI32_V_M4_M4 = 5517, PseudoVLUXSEG2EI32_V_M4_M4_MASK = 5518, PseudoVLUXSEG2EI32_V_M4_M4_TU = 5519, PseudoVLUXSEG2EI32_V_M8_M2 = 5520, PseudoVLUXSEG2EI32_V_M8_M2_MASK = 5521, PseudoVLUXSEG2EI32_V_M8_M2_TU = 5522, PseudoVLUXSEG2EI32_V_M8_M4 = 5523, PseudoVLUXSEG2EI32_V_M8_M4_MASK = 5524, PseudoVLUXSEG2EI32_V_M8_M4_TU = 5525, PseudoVLUXSEG2EI32_V_MF2_M1 = 5526, PseudoVLUXSEG2EI32_V_MF2_M1_MASK = 5527, PseudoVLUXSEG2EI32_V_MF2_M1_TU = 5528, PseudoVLUXSEG2EI32_V_MF2_MF2 = 5529, PseudoVLUXSEG2EI32_V_MF2_MF2_MASK = 5530, PseudoVLUXSEG2EI32_V_MF2_MF2_TU = 5531, PseudoVLUXSEG2EI32_V_MF2_MF4 = 5532, PseudoVLUXSEG2EI32_V_MF2_MF4_MASK = 5533, PseudoVLUXSEG2EI32_V_MF2_MF4_TU = 5534, PseudoVLUXSEG2EI32_V_MF2_MF8 = 5535, PseudoVLUXSEG2EI32_V_MF2_MF8_MASK = 5536, PseudoVLUXSEG2EI32_V_MF2_MF8_TU = 5537, PseudoVLUXSEG2EI64_V_M1_M1 = 5538, PseudoVLUXSEG2EI64_V_M1_M1_MASK = 5539, PseudoVLUXSEG2EI64_V_M1_M1_TU = 5540, PseudoVLUXSEG2EI64_V_M1_MF2 = 5541, PseudoVLUXSEG2EI64_V_M1_MF2_MASK = 5542, PseudoVLUXSEG2EI64_V_M1_MF2_TU = 5543, PseudoVLUXSEG2EI64_V_M1_MF4 = 5544, PseudoVLUXSEG2EI64_V_M1_MF4_MASK = 5545, PseudoVLUXSEG2EI64_V_M1_MF4_TU = 5546, PseudoVLUXSEG2EI64_V_M1_MF8 = 5547, PseudoVLUXSEG2EI64_V_M1_MF8_MASK = 5548, PseudoVLUXSEG2EI64_V_M1_MF8_TU = 5549, PseudoVLUXSEG2EI64_V_M2_M1 = 5550, PseudoVLUXSEG2EI64_V_M2_M1_MASK = 5551, PseudoVLUXSEG2EI64_V_M2_M1_TU = 5552, PseudoVLUXSEG2EI64_V_M2_M2 = 5553, PseudoVLUXSEG2EI64_V_M2_M2_MASK = 5554, PseudoVLUXSEG2EI64_V_M2_M2_TU = 5555, PseudoVLUXSEG2EI64_V_M2_MF2 = 5556, PseudoVLUXSEG2EI64_V_M2_MF2_MASK = 5557, PseudoVLUXSEG2EI64_V_M2_MF2_TU = 5558, PseudoVLUXSEG2EI64_V_M2_MF4 = 5559, PseudoVLUXSEG2EI64_V_M2_MF4_MASK = 5560, PseudoVLUXSEG2EI64_V_M2_MF4_TU = 5561, PseudoVLUXSEG2EI64_V_M4_M1 = 5562, PseudoVLUXSEG2EI64_V_M4_M1_MASK = 5563, PseudoVLUXSEG2EI64_V_M4_M1_TU = 5564, PseudoVLUXSEG2EI64_V_M4_M2 = 5565, PseudoVLUXSEG2EI64_V_M4_M2_MASK = 5566, PseudoVLUXSEG2EI64_V_M4_M2_TU = 5567, PseudoVLUXSEG2EI64_V_M4_M4 = 5568, PseudoVLUXSEG2EI64_V_M4_M4_MASK = 5569, PseudoVLUXSEG2EI64_V_M4_M4_TU = 5570, PseudoVLUXSEG2EI64_V_M4_MF2 = 5571, PseudoVLUXSEG2EI64_V_M4_MF2_MASK = 5572, PseudoVLUXSEG2EI64_V_M4_MF2_TU = 5573, PseudoVLUXSEG2EI64_V_M8_M1 = 5574, PseudoVLUXSEG2EI64_V_M8_M1_MASK = 5575, PseudoVLUXSEG2EI64_V_M8_M1_TU = 5576, PseudoVLUXSEG2EI64_V_M8_M2 = 5577, PseudoVLUXSEG2EI64_V_M8_M2_MASK = 5578, PseudoVLUXSEG2EI64_V_M8_M2_TU = 5579, PseudoVLUXSEG2EI64_V_M8_M4 = 5580, PseudoVLUXSEG2EI64_V_M8_M4_MASK = 5581, PseudoVLUXSEG2EI64_V_M8_M4_TU = 5582, PseudoVLUXSEG2EI8_V_M1_M1 = 5583, PseudoVLUXSEG2EI8_V_M1_M1_MASK = 5584, PseudoVLUXSEG2EI8_V_M1_M1_TU = 5585, PseudoVLUXSEG2EI8_V_M1_M2 = 5586, PseudoVLUXSEG2EI8_V_M1_M2_MASK = 5587, PseudoVLUXSEG2EI8_V_M1_M2_TU = 5588, PseudoVLUXSEG2EI8_V_M1_M4 = 5589, PseudoVLUXSEG2EI8_V_M1_M4_MASK = 5590, PseudoVLUXSEG2EI8_V_M1_M4_TU = 5591, PseudoVLUXSEG2EI8_V_M2_M2 = 5592, PseudoVLUXSEG2EI8_V_M2_M2_MASK = 5593, PseudoVLUXSEG2EI8_V_M2_M2_TU = 5594, PseudoVLUXSEG2EI8_V_M2_M4 = 5595, PseudoVLUXSEG2EI8_V_M2_M4_MASK = 5596, PseudoVLUXSEG2EI8_V_M2_M4_TU = 5597, PseudoVLUXSEG2EI8_V_M4_M4 = 5598, PseudoVLUXSEG2EI8_V_M4_M4_MASK = 5599, PseudoVLUXSEG2EI8_V_M4_M4_TU = 5600, PseudoVLUXSEG2EI8_V_MF2_M1 = 5601, PseudoVLUXSEG2EI8_V_MF2_M1_MASK = 5602, PseudoVLUXSEG2EI8_V_MF2_M1_TU = 5603, PseudoVLUXSEG2EI8_V_MF2_M2 = 5604, PseudoVLUXSEG2EI8_V_MF2_M2_MASK = 5605, PseudoVLUXSEG2EI8_V_MF2_M2_TU = 5606, PseudoVLUXSEG2EI8_V_MF2_M4 = 5607, PseudoVLUXSEG2EI8_V_MF2_M4_MASK = 5608, PseudoVLUXSEG2EI8_V_MF2_M4_TU = 5609, PseudoVLUXSEG2EI8_V_MF2_MF2 = 5610, PseudoVLUXSEG2EI8_V_MF2_MF2_MASK = 5611, PseudoVLUXSEG2EI8_V_MF2_MF2_TU = 5612, PseudoVLUXSEG2EI8_V_MF4_M1 = 5613, PseudoVLUXSEG2EI8_V_MF4_M1_MASK = 5614, PseudoVLUXSEG2EI8_V_MF4_M1_TU = 5615, PseudoVLUXSEG2EI8_V_MF4_M2 = 5616, PseudoVLUXSEG2EI8_V_MF4_M2_MASK = 5617, PseudoVLUXSEG2EI8_V_MF4_M2_TU = 5618, PseudoVLUXSEG2EI8_V_MF4_MF2 = 5619, PseudoVLUXSEG2EI8_V_MF4_MF2_MASK = 5620, PseudoVLUXSEG2EI8_V_MF4_MF2_TU = 5621, PseudoVLUXSEG2EI8_V_MF4_MF4 = 5622, PseudoVLUXSEG2EI8_V_MF4_MF4_MASK = 5623, PseudoVLUXSEG2EI8_V_MF4_MF4_TU = 5624, PseudoVLUXSEG2EI8_V_MF8_M1 = 5625, PseudoVLUXSEG2EI8_V_MF8_M1_MASK = 5626, PseudoVLUXSEG2EI8_V_MF8_M1_TU = 5627, PseudoVLUXSEG2EI8_V_MF8_MF2 = 5628, PseudoVLUXSEG2EI8_V_MF8_MF2_MASK = 5629, PseudoVLUXSEG2EI8_V_MF8_MF2_TU = 5630, PseudoVLUXSEG2EI8_V_MF8_MF4 = 5631, PseudoVLUXSEG2EI8_V_MF8_MF4_MASK = 5632, PseudoVLUXSEG2EI8_V_MF8_MF4_TU = 5633, PseudoVLUXSEG2EI8_V_MF8_MF8 = 5634, PseudoVLUXSEG2EI8_V_MF8_MF8_MASK = 5635, PseudoVLUXSEG2EI8_V_MF8_MF8_TU = 5636, PseudoVLUXSEG3EI16_V_M1_M1 = 5637, PseudoVLUXSEG3EI16_V_M1_M1_MASK = 5638, PseudoVLUXSEG3EI16_V_M1_M1_TU = 5639, PseudoVLUXSEG3EI16_V_M1_M2 = 5640, PseudoVLUXSEG3EI16_V_M1_M2_MASK = 5641, PseudoVLUXSEG3EI16_V_M1_M2_TU = 5642, PseudoVLUXSEG3EI16_V_M1_MF2 = 5643, PseudoVLUXSEG3EI16_V_M1_MF2_MASK = 5644, PseudoVLUXSEG3EI16_V_M1_MF2_TU = 5645, PseudoVLUXSEG3EI16_V_M2_M1 = 5646, PseudoVLUXSEG3EI16_V_M2_M1_MASK = 5647, PseudoVLUXSEG3EI16_V_M2_M1_TU = 5648, PseudoVLUXSEG3EI16_V_M2_M2 = 5649, PseudoVLUXSEG3EI16_V_M2_M2_MASK = 5650, PseudoVLUXSEG3EI16_V_M2_M2_TU = 5651, PseudoVLUXSEG3EI16_V_M4_M2 = 5652, PseudoVLUXSEG3EI16_V_M4_M2_MASK = 5653, PseudoVLUXSEG3EI16_V_M4_M2_TU = 5654, PseudoVLUXSEG3EI16_V_MF2_M1 = 5655, PseudoVLUXSEG3EI16_V_MF2_M1_MASK = 5656, PseudoVLUXSEG3EI16_V_MF2_M1_TU = 5657, PseudoVLUXSEG3EI16_V_MF2_M2 = 5658, PseudoVLUXSEG3EI16_V_MF2_M2_MASK = 5659, PseudoVLUXSEG3EI16_V_MF2_M2_TU = 5660, PseudoVLUXSEG3EI16_V_MF2_MF2 = 5661, PseudoVLUXSEG3EI16_V_MF2_MF2_MASK = 5662, PseudoVLUXSEG3EI16_V_MF2_MF2_TU = 5663, PseudoVLUXSEG3EI16_V_MF2_MF4 = 5664, PseudoVLUXSEG3EI16_V_MF2_MF4_MASK = 5665, PseudoVLUXSEG3EI16_V_MF2_MF4_TU = 5666, PseudoVLUXSEG3EI16_V_MF4_M1 = 5667, PseudoVLUXSEG3EI16_V_MF4_M1_MASK = 5668, PseudoVLUXSEG3EI16_V_MF4_M1_TU = 5669, PseudoVLUXSEG3EI16_V_MF4_MF2 = 5670, PseudoVLUXSEG3EI16_V_MF4_MF2_MASK = 5671, PseudoVLUXSEG3EI16_V_MF4_MF2_TU = 5672, PseudoVLUXSEG3EI16_V_MF4_MF4 = 5673, PseudoVLUXSEG3EI16_V_MF4_MF4_MASK = 5674, PseudoVLUXSEG3EI16_V_MF4_MF4_TU = 5675, PseudoVLUXSEG3EI16_V_MF4_MF8 = 5676, PseudoVLUXSEG3EI16_V_MF4_MF8_MASK = 5677, PseudoVLUXSEG3EI16_V_MF4_MF8_TU = 5678, PseudoVLUXSEG3EI32_V_M1_M1 = 5679, PseudoVLUXSEG3EI32_V_M1_M1_MASK = 5680, PseudoVLUXSEG3EI32_V_M1_M1_TU = 5681, PseudoVLUXSEG3EI32_V_M1_M2 = 5682, PseudoVLUXSEG3EI32_V_M1_M2_MASK = 5683, PseudoVLUXSEG3EI32_V_M1_M2_TU = 5684, PseudoVLUXSEG3EI32_V_M1_MF2 = 5685, PseudoVLUXSEG3EI32_V_M1_MF2_MASK = 5686, PseudoVLUXSEG3EI32_V_M1_MF2_TU = 5687, PseudoVLUXSEG3EI32_V_M1_MF4 = 5688, PseudoVLUXSEG3EI32_V_M1_MF4_MASK = 5689, PseudoVLUXSEG3EI32_V_M1_MF4_TU = 5690, PseudoVLUXSEG3EI32_V_M2_M1 = 5691, PseudoVLUXSEG3EI32_V_M2_M1_MASK = 5692, PseudoVLUXSEG3EI32_V_M2_M1_TU = 5693, PseudoVLUXSEG3EI32_V_M2_M2 = 5694, PseudoVLUXSEG3EI32_V_M2_M2_MASK = 5695, PseudoVLUXSEG3EI32_V_M2_M2_TU = 5696, PseudoVLUXSEG3EI32_V_M2_MF2 = 5697, PseudoVLUXSEG3EI32_V_M2_MF2_MASK = 5698, PseudoVLUXSEG3EI32_V_M2_MF2_TU = 5699, PseudoVLUXSEG3EI32_V_M4_M1 = 5700, PseudoVLUXSEG3EI32_V_M4_M1_MASK = 5701, PseudoVLUXSEG3EI32_V_M4_M1_TU = 5702, PseudoVLUXSEG3EI32_V_M4_M2 = 5703, PseudoVLUXSEG3EI32_V_M4_M2_MASK = 5704, PseudoVLUXSEG3EI32_V_M4_M2_TU = 5705, PseudoVLUXSEG3EI32_V_M8_M2 = 5706, PseudoVLUXSEG3EI32_V_M8_M2_MASK = 5707, PseudoVLUXSEG3EI32_V_M8_M2_TU = 5708, PseudoVLUXSEG3EI32_V_MF2_M1 = 5709, PseudoVLUXSEG3EI32_V_MF2_M1_MASK = 5710, PseudoVLUXSEG3EI32_V_MF2_M1_TU = 5711, PseudoVLUXSEG3EI32_V_MF2_MF2 = 5712, PseudoVLUXSEG3EI32_V_MF2_MF2_MASK = 5713, PseudoVLUXSEG3EI32_V_MF2_MF2_TU = 5714, PseudoVLUXSEG3EI32_V_MF2_MF4 = 5715, PseudoVLUXSEG3EI32_V_MF2_MF4_MASK = 5716, PseudoVLUXSEG3EI32_V_MF2_MF4_TU = 5717, PseudoVLUXSEG3EI32_V_MF2_MF8 = 5718, PseudoVLUXSEG3EI32_V_MF2_MF8_MASK = 5719, PseudoVLUXSEG3EI32_V_MF2_MF8_TU = 5720, PseudoVLUXSEG3EI64_V_M1_M1 = 5721, PseudoVLUXSEG3EI64_V_M1_M1_MASK = 5722, PseudoVLUXSEG3EI64_V_M1_M1_TU = 5723, PseudoVLUXSEG3EI64_V_M1_MF2 = 5724, PseudoVLUXSEG3EI64_V_M1_MF2_MASK = 5725, PseudoVLUXSEG3EI64_V_M1_MF2_TU = 5726, PseudoVLUXSEG3EI64_V_M1_MF4 = 5727, PseudoVLUXSEG3EI64_V_M1_MF4_MASK = 5728, PseudoVLUXSEG3EI64_V_M1_MF4_TU = 5729, PseudoVLUXSEG3EI64_V_M1_MF8 = 5730, PseudoVLUXSEG3EI64_V_M1_MF8_MASK = 5731, PseudoVLUXSEG3EI64_V_M1_MF8_TU = 5732, PseudoVLUXSEG3EI64_V_M2_M1 = 5733, PseudoVLUXSEG3EI64_V_M2_M1_MASK = 5734, PseudoVLUXSEG3EI64_V_M2_M1_TU = 5735, PseudoVLUXSEG3EI64_V_M2_M2 = 5736, PseudoVLUXSEG3EI64_V_M2_M2_MASK = 5737, PseudoVLUXSEG3EI64_V_M2_M2_TU = 5738, PseudoVLUXSEG3EI64_V_M2_MF2 = 5739, PseudoVLUXSEG3EI64_V_M2_MF2_MASK = 5740, PseudoVLUXSEG3EI64_V_M2_MF2_TU = 5741, PseudoVLUXSEG3EI64_V_M2_MF4 = 5742, PseudoVLUXSEG3EI64_V_M2_MF4_MASK = 5743, PseudoVLUXSEG3EI64_V_M2_MF4_TU = 5744, PseudoVLUXSEG3EI64_V_M4_M1 = 5745, PseudoVLUXSEG3EI64_V_M4_M1_MASK = 5746, PseudoVLUXSEG3EI64_V_M4_M1_TU = 5747, PseudoVLUXSEG3EI64_V_M4_M2 = 5748, PseudoVLUXSEG3EI64_V_M4_M2_MASK = 5749, PseudoVLUXSEG3EI64_V_M4_M2_TU = 5750, PseudoVLUXSEG3EI64_V_M4_MF2 = 5751, PseudoVLUXSEG3EI64_V_M4_MF2_MASK = 5752, PseudoVLUXSEG3EI64_V_M4_MF2_TU = 5753, PseudoVLUXSEG3EI64_V_M8_M1 = 5754, PseudoVLUXSEG3EI64_V_M8_M1_MASK = 5755, PseudoVLUXSEG3EI64_V_M8_M1_TU = 5756, PseudoVLUXSEG3EI64_V_M8_M2 = 5757, PseudoVLUXSEG3EI64_V_M8_M2_MASK = 5758, PseudoVLUXSEG3EI64_V_M8_M2_TU = 5759, PseudoVLUXSEG3EI8_V_M1_M1 = 5760, PseudoVLUXSEG3EI8_V_M1_M1_MASK = 5761, PseudoVLUXSEG3EI8_V_M1_M1_TU = 5762, PseudoVLUXSEG3EI8_V_M1_M2 = 5763, PseudoVLUXSEG3EI8_V_M1_M2_MASK = 5764, PseudoVLUXSEG3EI8_V_M1_M2_TU = 5765, PseudoVLUXSEG3EI8_V_M2_M2 = 5766, PseudoVLUXSEG3EI8_V_M2_M2_MASK = 5767, PseudoVLUXSEG3EI8_V_M2_M2_TU = 5768, PseudoVLUXSEG3EI8_V_MF2_M1 = 5769, PseudoVLUXSEG3EI8_V_MF2_M1_MASK = 5770, PseudoVLUXSEG3EI8_V_MF2_M1_TU = 5771, PseudoVLUXSEG3EI8_V_MF2_M2 = 5772, PseudoVLUXSEG3EI8_V_MF2_M2_MASK = 5773, PseudoVLUXSEG3EI8_V_MF2_M2_TU = 5774, PseudoVLUXSEG3EI8_V_MF2_MF2 = 5775, PseudoVLUXSEG3EI8_V_MF2_MF2_MASK = 5776, PseudoVLUXSEG3EI8_V_MF2_MF2_TU = 5777, PseudoVLUXSEG3EI8_V_MF4_M1 = 5778, PseudoVLUXSEG3EI8_V_MF4_M1_MASK = 5779, PseudoVLUXSEG3EI8_V_MF4_M1_TU = 5780, PseudoVLUXSEG3EI8_V_MF4_M2 = 5781, PseudoVLUXSEG3EI8_V_MF4_M2_MASK = 5782, PseudoVLUXSEG3EI8_V_MF4_M2_TU = 5783, PseudoVLUXSEG3EI8_V_MF4_MF2 = 5784, PseudoVLUXSEG3EI8_V_MF4_MF2_MASK = 5785, PseudoVLUXSEG3EI8_V_MF4_MF2_TU = 5786, PseudoVLUXSEG3EI8_V_MF4_MF4 = 5787, PseudoVLUXSEG3EI8_V_MF4_MF4_MASK = 5788, PseudoVLUXSEG3EI8_V_MF4_MF4_TU = 5789, PseudoVLUXSEG3EI8_V_MF8_M1 = 5790, PseudoVLUXSEG3EI8_V_MF8_M1_MASK = 5791, PseudoVLUXSEG3EI8_V_MF8_M1_TU = 5792, PseudoVLUXSEG3EI8_V_MF8_MF2 = 5793, PseudoVLUXSEG3EI8_V_MF8_MF2_MASK = 5794, PseudoVLUXSEG3EI8_V_MF8_MF2_TU = 5795, PseudoVLUXSEG3EI8_V_MF8_MF4 = 5796, PseudoVLUXSEG3EI8_V_MF8_MF4_MASK = 5797, PseudoVLUXSEG3EI8_V_MF8_MF4_TU = 5798, PseudoVLUXSEG3EI8_V_MF8_MF8 = 5799, PseudoVLUXSEG3EI8_V_MF8_MF8_MASK = 5800, PseudoVLUXSEG3EI8_V_MF8_MF8_TU = 5801, PseudoVLUXSEG4EI16_V_M1_M1 = 5802, PseudoVLUXSEG4EI16_V_M1_M1_MASK = 5803, PseudoVLUXSEG4EI16_V_M1_M1_TU = 5804, PseudoVLUXSEG4EI16_V_M1_M2 = 5805, PseudoVLUXSEG4EI16_V_M1_M2_MASK = 5806, PseudoVLUXSEG4EI16_V_M1_M2_TU = 5807, PseudoVLUXSEG4EI16_V_M1_MF2 = 5808, PseudoVLUXSEG4EI16_V_M1_MF2_MASK = 5809, PseudoVLUXSEG4EI16_V_M1_MF2_TU = 5810, PseudoVLUXSEG4EI16_V_M2_M1 = 5811, PseudoVLUXSEG4EI16_V_M2_M1_MASK = 5812, PseudoVLUXSEG4EI16_V_M2_M1_TU = 5813, PseudoVLUXSEG4EI16_V_M2_M2 = 5814, PseudoVLUXSEG4EI16_V_M2_M2_MASK = 5815, PseudoVLUXSEG4EI16_V_M2_M2_TU = 5816, PseudoVLUXSEG4EI16_V_M4_M2 = 5817, PseudoVLUXSEG4EI16_V_M4_M2_MASK = 5818, PseudoVLUXSEG4EI16_V_M4_M2_TU = 5819, PseudoVLUXSEG4EI16_V_MF2_M1 = 5820, PseudoVLUXSEG4EI16_V_MF2_M1_MASK = 5821, PseudoVLUXSEG4EI16_V_MF2_M1_TU = 5822, PseudoVLUXSEG4EI16_V_MF2_M2 = 5823, PseudoVLUXSEG4EI16_V_MF2_M2_MASK = 5824, PseudoVLUXSEG4EI16_V_MF2_M2_TU = 5825, PseudoVLUXSEG4EI16_V_MF2_MF2 = 5826, PseudoVLUXSEG4EI16_V_MF2_MF2_MASK = 5827, PseudoVLUXSEG4EI16_V_MF2_MF2_TU = 5828, PseudoVLUXSEG4EI16_V_MF2_MF4 = 5829, PseudoVLUXSEG4EI16_V_MF2_MF4_MASK = 5830, PseudoVLUXSEG4EI16_V_MF2_MF4_TU = 5831, PseudoVLUXSEG4EI16_V_MF4_M1 = 5832, PseudoVLUXSEG4EI16_V_MF4_M1_MASK = 5833, PseudoVLUXSEG4EI16_V_MF4_M1_TU = 5834, PseudoVLUXSEG4EI16_V_MF4_MF2 = 5835, PseudoVLUXSEG4EI16_V_MF4_MF2_MASK = 5836, PseudoVLUXSEG4EI16_V_MF4_MF2_TU = 5837, PseudoVLUXSEG4EI16_V_MF4_MF4 = 5838, PseudoVLUXSEG4EI16_V_MF4_MF4_MASK = 5839, PseudoVLUXSEG4EI16_V_MF4_MF4_TU = 5840, PseudoVLUXSEG4EI16_V_MF4_MF8 = 5841, PseudoVLUXSEG4EI16_V_MF4_MF8_MASK = 5842, PseudoVLUXSEG4EI16_V_MF4_MF8_TU = 5843, PseudoVLUXSEG4EI32_V_M1_M1 = 5844, PseudoVLUXSEG4EI32_V_M1_M1_MASK = 5845, PseudoVLUXSEG4EI32_V_M1_M1_TU = 5846, PseudoVLUXSEG4EI32_V_M1_M2 = 5847, PseudoVLUXSEG4EI32_V_M1_M2_MASK = 5848, PseudoVLUXSEG4EI32_V_M1_M2_TU = 5849, PseudoVLUXSEG4EI32_V_M1_MF2 = 5850, PseudoVLUXSEG4EI32_V_M1_MF2_MASK = 5851, PseudoVLUXSEG4EI32_V_M1_MF2_TU = 5852, PseudoVLUXSEG4EI32_V_M1_MF4 = 5853, PseudoVLUXSEG4EI32_V_M1_MF4_MASK = 5854, PseudoVLUXSEG4EI32_V_M1_MF4_TU = 5855, PseudoVLUXSEG4EI32_V_M2_M1 = 5856, PseudoVLUXSEG4EI32_V_M2_M1_MASK = 5857, PseudoVLUXSEG4EI32_V_M2_M1_TU = 5858, PseudoVLUXSEG4EI32_V_M2_M2 = 5859, PseudoVLUXSEG4EI32_V_M2_M2_MASK = 5860, PseudoVLUXSEG4EI32_V_M2_M2_TU = 5861, PseudoVLUXSEG4EI32_V_M2_MF2 = 5862, PseudoVLUXSEG4EI32_V_M2_MF2_MASK = 5863, PseudoVLUXSEG4EI32_V_M2_MF2_TU = 5864, PseudoVLUXSEG4EI32_V_M4_M1 = 5865, PseudoVLUXSEG4EI32_V_M4_M1_MASK = 5866, PseudoVLUXSEG4EI32_V_M4_M1_TU = 5867, PseudoVLUXSEG4EI32_V_M4_M2 = 5868, PseudoVLUXSEG4EI32_V_M4_M2_MASK = 5869, PseudoVLUXSEG4EI32_V_M4_M2_TU = 5870, PseudoVLUXSEG4EI32_V_M8_M2 = 5871, PseudoVLUXSEG4EI32_V_M8_M2_MASK = 5872, PseudoVLUXSEG4EI32_V_M8_M2_TU = 5873, PseudoVLUXSEG4EI32_V_MF2_M1 = 5874, PseudoVLUXSEG4EI32_V_MF2_M1_MASK = 5875, PseudoVLUXSEG4EI32_V_MF2_M1_TU = 5876, PseudoVLUXSEG4EI32_V_MF2_MF2 = 5877, PseudoVLUXSEG4EI32_V_MF2_MF2_MASK = 5878, PseudoVLUXSEG4EI32_V_MF2_MF2_TU = 5879, PseudoVLUXSEG4EI32_V_MF2_MF4 = 5880, PseudoVLUXSEG4EI32_V_MF2_MF4_MASK = 5881, PseudoVLUXSEG4EI32_V_MF2_MF4_TU = 5882, PseudoVLUXSEG4EI32_V_MF2_MF8 = 5883, PseudoVLUXSEG4EI32_V_MF2_MF8_MASK = 5884, PseudoVLUXSEG4EI32_V_MF2_MF8_TU = 5885, PseudoVLUXSEG4EI64_V_M1_M1 = 5886, PseudoVLUXSEG4EI64_V_M1_M1_MASK = 5887, PseudoVLUXSEG4EI64_V_M1_M1_TU = 5888, PseudoVLUXSEG4EI64_V_M1_MF2 = 5889, PseudoVLUXSEG4EI64_V_M1_MF2_MASK = 5890, PseudoVLUXSEG4EI64_V_M1_MF2_TU = 5891, PseudoVLUXSEG4EI64_V_M1_MF4 = 5892, PseudoVLUXSEG4EI64_V_M1_MF4_MASK = 5893, PseudoVLUXSEG4EI64_V_M1_MF4_TU = 5894, PseudoVLUXSEG4EI64_V_M1_MF8 = 5895, PseudoVLUXSEG4EI64_V_M1_MF8_MASK = 5896, PseudoVLUXSEG4EI64_V_M1_MF8_TU = 5897, PseudoVLUXSEG4EI64_V_M2_M1 = 5898, PseudoVLUXSEG4EI64_V_M2_M1_MASK = 5899, PseudoVLUXSEG4EI64_V_M2_M1_TU = 5900, PseudoVLUXSEG4EI64_V_M2_M2 = 5901, PseudoVLUXSEG4EI64_V_M2_M2_MASK = 5902, PseudoVLUXSEG4EI64_V_M2_M2_TU = 5903, PseudoVLUXSEG4EI64_V_M2_MF2 = 5904, PseudoVLUXSEG4EI64_V_M2_MF2_MASK = 5905, PseudoVLUXSEG4EI64_V_M2_MF2_TU = 5906, PseudoVLUXSEG4EI64_V_M2_MF4 = 5907, PseudoVLUXSEG4EI64_V_M2_MF4_MASK = 5908, PseudoVLUXSEG4EI64_V_M2_MF4_TU = 5909, PseudoVLUXSEG4EI64_V_M4_M1 = 5910, PseudoVLUXSEG4EI64_V_M4_M1_MASK = 5911, PseudoVLUXSEG4EI64_V_M4_M1_TU = 5912, PseudoVLUXSEG4EI64_V_M4_M2 = 5913, PseudoVLUXSEG4EI64_V_M4_M2_MASK = 5914, PseudoVLUXSEG4EI64_V_M4_M2_TU = 5915, PseudoVLUXSEG4EI64_V_M4_MF2 = 5916, PseudoVLUXSEG4EI64_V_M4_MF2_MASK = 5917, PseudoVLUXSEG4EI64_V_M4_MF2_TU = 5918, PseudoVLUXSEG4EI64_V_M8_M1 = 5919, PseudoVLUXSEG4EI64_V_M8_M1_MASK = 5920, PseudoVLUXSEG4EI64_V_M8_M1_TU = 5921, PseudoVLUXSEG4EI64_V_M8_M2 = 5922, PseudoVLUXSEG4EI64_V_M8_M2_MASK = 5923, PseudoVLUXSEG4EI64_V_M8_M2_TU = 5924, PseudoVLUXSEG4EI8_V_M1_M1 = 5925, PseudoVLUXSEG4EI8_V_M1_M1_MASK = 5926, PseudoVLUXSEG4EI8_V_M1_M1_TU = 5927, PseudoVLUXSEG4EI8_V_M1_M2 = 5928, PseudoVLUXSEG4EI8_V_M1_M2_MASK = 5929, PseudoVLUXSEG4EI8_V_M1_M2_TU = 5930, PseudoVLUXSEG4EI8_V_M2_M2 = 5931, PseudoVLUXSEG4EI8_V_M2_M2_MASK = 5932, PseudoVLUXSEG4EI8_V_M2_M2_TU = 5933, PseudoVLUXSEG4EI8_V_MF2_M1 = 5934, PseudoVLUXSEG4EI8_V_MF2_M1_MASK = 5935, PseudoVLUXSEG4EI8_V_MF2_M1_TU = 5936, PseudoVLUXSEG4EI8_V_MF2_M2 = 5937, PseudoVLUXSEG4EI8_V_MF2_M2_MASK = 5938, PseudoVLUXSEG4EI8_V_MF2_M2_TU = 5939, PseudoVLUXSEG4EI8_V_MF2_MF2 = 5940, PseudoVLUXSEG4EI8_V_MF2_MF2_MASK = 5941, PseudoVLUXSEG4EI8_V_MF2_MF2_TU = 5942, PseudoVLUXSEG4EI8_V_MF4_M1 = 5943, PseudoVLUXSEG4EI8_V_MF4_M1_MASK = 5944, PseudoVLUXSEG4EI8_V_MF4_M1_TU = 5945, PseudoVLUXSEG4EI8_V_MF4_M2 = 5946, PseudoVLUXSEG4EI8_V_MF4_M2_MASK = 5947, PseudoVLUXSEG4EI8_V_MF4_M2_TU = 5948, PseudoVLUXSEG4EI8_V_MF4_MF2 = 5949, PseudoVLUXSEG4EI8_V_MF4_MF2_MASK = 5950, PseudoVLUXSEG4EI8_V_MF4_MF2_TU = 5951, PseudoVLUXSEG4EI8_V_MF4_MF4 = 5952, PseudoVLUXSEG4EI8_V_MF4_MF4_MASK = 5953, PseudoVLUXSEG4EI8_V_MF4_MF4_TU = 5954, PseudoVLUXSEG4EI8_V_MF8_M1 = 5955, PseudoVLUXSEG4EI8_V_MF8_M1_MASK = 5956, PseudoVLUXSEG4EI8_V_MF8_M1_TU = 5957, PseudoVLUXSEG4EI8_V_MF8_MF2 = 5958, PseudoVLUXSEG4EI8_V_MF8_MF2_MASK = 5959, PseudoVLUXSEG4EI8_V_MF8_MF2_TU = 5960, PseudoVLUXSEG4EI8_V_MF8_MF4 = 5961, PseudoVLUXSEG4EI8_V_MF8_MF4_MASK = 5962, PseudoVLUXSEG4EI8_V_MF8_MF4_TU = 5963, PseudoVLUXSEG4EI8_V_MF8_MF8 = 5964, PseudoVLUXSEG4EI8_V_MF8_MF8_MASK = 5965, PseudoVLUXSEG4EI8_V_MF8_MF8_TU = 5966, PseudoVLUXSEG5EI16_V_M1_M1 = 5967, PseudoVLUXSEG5EI16_V_M1_M1_MASK = 5968, PseudoVLUXSEG5EI16_V_M1_M1_TU = 5969, PseudoVLUXSEG5EI16_V_M1_MF2 = 5970, PseudoVLUXSEG5EI16_V_M1_MF2_MASK = 5971, PseudoVLUXSEG5EI16_V_M1_MF2_TU = 5972, PseudoVLUXSEG5EI16_V_M2_M1 = 5973, PseudoVLUXSEG5EI16_V_M2_M1_MASK = 5974, PseudoVLUXSEG5EI16_V_M2_M1_TU = 5975, PseudoVLUXSEG5EI16_V_MF2_M1 = 5976, PseudoVLUXSEG5EI16_V_MF2_M1_MASK = 5977, PseudoVLUXSEG5EI16_V_MF2_M1_TU = 5978, PseudoVLUXSEG5EI16_V_MF2_MF2 = 5979, PseudoVLUXSEG5EI16_V_MF2_MF2_MASK = 5980, PseudoVLUXSEG5EI16_V_MF2_MF2_TU = 5981, PseudoVLUXSEG5EI16_V_MF2_MF4 = 5982, PseudoVLUXSEG5EI16_V_MF2_MF4_MASK = 5983, PseudoVLUXSEG5EI16_V_MF2_MF4_TU = 5984, PseudoVLUXSEG5EI16_V_MF4_M1 = 5985, PseudoVLUXSEG5EI16_V_MF4_M1_MASK = 5986, PseudoVLUXSEG5EI16_V_MF4_M1_TU = 5987, PseudoVLUXSEG5EI16_V_MF4_MF2 = 5988, PseudoVLUXSEG5EI16_V_MF4_MF2_MASK = 5989, PseudoVLUXSEG5EI16_V_MF4_MF2_TU = 5990, PseudoVLUXSEG5EI16_V_MF4_MF4 = 5991, PseudoVLUXSEG5EI16_V_MF4_MF4_MASK = 5992, PseudoVLUXSEG5EI16_V_MF4_MF4_TU = 5993, PseudoVLUXSEG5EI16_V_MF4_MF8 = 5994, PseudoVLUXSEG5EI16_V_MF4_MF8_MASK = 5995, PseudoVLUXSEG5EI16_V_MF4_MF8_TU = 5996, PseudoVLUXSEG5EI32_V_M1_M1 = 5997, PseudoVLUXSEG5EI32_V_M1_M1_MASK = 5998, PseudoVLUXSEG5EI32_V_M1_M1_TU = 5999, PseudoVLUXSEG5EI32_V_M1_MF2 = 6000, PseudoVLUXSEG5EI32_V_M1_MF2_MASK = 6001, PseudoVLUXSEG5EI32_V_M1_MF2_TU = 6002, PseudoVLUXSEG5EI32_V_M1_MF4 = 6003, PseudoVLUXSEG5EI32_V_M1_MF4_MASK = 6004, PseudoVLUXSEG5EI32_V_M1_MF4_TU = 6005, PseudoVLUXSEG5EI32_V_M2_M1 = 6006, PseudoVLUXSEG5EI32_V_M2_M1_MASK = 6007, PseudoVLUXSEG5EI32_V_M2_M1_TU = 6008, PseudoVLUXSEG5EI32_V_M2_MF2 = 6009, PseudoVLUXSEG5EI32_V_M2_MF2_MASK = 6010, PseudoVLUXSEG5EI32_V_M2_MF2_TU = 6011, PseudoVLUXSEG5EI32_V_M4_M1 = 6012, PseudoVLUXSEG5EI32_V_M4_M1_MASK = 6013, PseudoVLUXSEG5EI32_V_M4_M1_TU = 6014, PseudoVLUXSEG5EI32_V_MF2_M1 = 6015, PseudoVLUXSEG5EI32_V_MF2_M1_MASK = 6016, PseudoVLUXSEG5EI32_V_MF2_M1_TU = 6017, PseudoVLUXSEG5EI32_V_MF2_MF2 = 6018, PseudoVLUXSEG5EI32_V_MF2_MF2_MASK = 6019, PseudoVLUXSEG5EI32_V_MF2_MF2_TU = 6020, PseudoVLUXSEG5EI32_V_MF2_MF4 = 6021, PseudoVLUXSEG5EI32_V_MF2_MF4_MASK = 6022, PseudoVLUXSEG5EI32_V_MF2_MF4_TU = 6023, PseudoVLUXSEG5EI32_V_MF2_MF8 = 6024, PseudoVLUXSEG5EI32_V_MF2_MF8_MASK = 6025, PseudoVLUXSEG5EI32_V_MF2_MF8_TU = 6026, PseudoVLUXSEG5EI64_V_M1_M1 = 6027, PseudoVLUXSEG5EI64_V_M1_M1_MASK = 6028, PseudoVLUXSEG5EI64_V_M1_M1_TU = 6029, PseudoVLUXSEG5EI64_V_M1_MF2 = 6030, PseudoVLUXSEG5EI64_V_M1_MF2_MASK = 6031, PseudoVLUXSEG5EI64_V_M1_MF2_TU = 6032, PseudoVLUXSEG5EI64_V_M1_MF4 = 6033, PseudoVLUXSEG5EI64_V_M1_MF4_MASK = 6034, PseudoVLUXSEG5EI64_V_M1_MF4_TU = 6035, PseudoVLUXSEG5EI64_V_M1_MF8 = 6036, PseudoVLUXSEG5EI64_V_M1_MF8_MASK = 6037, PseudoVLUXSEG5EI64_V_M1_MF8_TU = 6038, PseudoVLUXSEG5EI64_V_M2_M1 = 6039, PseudoVLUXSEG5EI64_V_M2_M1_MASK = 6040, PseudoVLUXSEG5EI64_V_M2_M1_TU = 6041, PseudoVLUXSEG5EI64_V_M2_MF2 = 6042, PseudoVLUXSEG5EI64_V_M2_MF2_MASK = 6043, PseudoVLUXSEG5EI64_V_M2_MF2_TU = 6044, PseudoVLUXSEG5EI64_V_M2_MF4 = 6045, PseudoVLUXSEG5EI64_V_M2_MF4_MASK = 6046, PseudoVLUXSEG5EI64_V_M2_MF4_TU = 6047, PseudoVLUXSEG5EI64_V_M4_M1 = 6048, PseudoVLUXSEG5EI64_V_M4_M1_MASK = 6049, PseudoVLUXSEG5EI64_V_M4_M1_TU = 6050, PseudoVLUXSEG5EI64_V_M4_MF2 = 6051, PseudoVLUXSEG5EI64_V_M4_MF2_MASK = 6052, PseudoVLUXSEG5EI64_V_M4_MF2_TU = 6053, PseudoVLUXSEG5EI64_V_M8_M1 = 6054, PseudoVLUXSEG5EI64_V_M8_M1_MASK = 6055, PseudoVLUXSEG5EI64_V_M8_M1_TU = 6056, PseudoVLUXSEG5EI8_V_M1_M1 = 6057, PseudoVLUXSEG5EI8_V_M1_M1_MASK = 6058, PseudoVLUXSEG5EI8_V_M1_M1_TU = 6059, PseudoVLUXSEG5EI8_V_MF2_M1 = 6060, PseudoVLUXSEG5EI8_V_MF2_M1_MASK = 6061, PseudoVLUXSEG5EI8_V_MF2_M1_TU = 6062, PseudoVLUXSEG5EI8_V_MF2_MF2 = 6063, PseudoVLUXSEG5EI8_V_MF2_MF2_MASK = 6064, PseudoVLUXSEG5EI8_V_MF2_MF2_TU = 6065, PseudoVLUXSEG5EI8_V_MF4_M1 = 6066, PseudoVLUXSEG5EI8_V_MF4_M1_MASK = 6067, PseudoVLUXSEG5EI8_V_MF4_M1_TU = 6068, PseudoVLUXSEG5EI8_V_MF4_MF2 = 6069, PseudoVLUXSEG5EI8_V_MF4_MF2_MASK = 6070, PseudoVLUXSEG5EI8_V_MF4_MF2_TU = 6071, PseudoVLUXSEG5EI8_V_MF4_MF4 = 6072, PseudoVLUXSEG5EI8_V_MF4_MF4_MASK = 6073, PseudoVLUXSEG5EI8_V_MF4_MF4_TU = 6074, PseudoVLUXSEG5EI8_V_MF8_M1 = 6075, PseudoVLUXSEG5EI8_V_MF8_M1_MASK = 6076, PseudoVLUXSEG5EI8_V_MF8_M1_TU = 6077, PseudoVLUXSEG5EI8_V_MF8_MF2 = 6078, PseudoVLUXSEG5EI8_V_MF8_MF2_MASK = 6079, PseudoVLUXSEG5EI8_V_MF8_MF2_TU = 6080, PseudoVLUXSEG5EI8_V_MF8_MF4 = 6081, PseudoVLUXSEG5EI8_V_MF8_MF4_MASK = 6082, PseudoVLUXSEG5EI8_V_MF8_MF4_TU = 6083, PseudoVLUXSEG5EI8_V_MF8_MF8 = 6084, PseudoVLUXSEG5EI8_V_MF8_MF8_MASK = 6085, PseudoVLUXSEG5EI8_V_MF8_MF8_TU = 6086, PseudoVLUXSEG6EI16_V_M1_M1 = 6087, PseudoVLUXSEG6EI16_V_M1_M1_MASK = 6088, PseudoVLUXSEG6EI16_V_M1_M1_TU = 6089, PseudoVLUXSEG6EI16_V_M1_MF2 = 6090, PseudoVLUXSEG6EI16_V_M1_MF2_MASK = 6091, PseudoVLUXSEG6EI16_V_M1_MF2_TU = 6092, PseudoVLUXSEG6EI16_V_M2_M1 = 6093, PseudoVLUXSEG6EI16_V_M2_M1_MASK = 6094, PseudoVLUXSEG6EI16_V_M2_M1_TU = 6095, PseudoVLUXSEG6EI16_V_MF2_M1 = 6096, PseudoVLUXSEG6EI16_V_MF2_M1_MASK = 6097, PseudoVLUXSEG6EI16_V_MF2_M1_TU = 6098, PseudoVLUXSEG6EI16_V_MF2_MF2 = 6099, PseudoVLUXSEG6EI16_V_MF2_MF2_MASK = 6100, PseudoVLUXSEG6EI16_V_MF2_MF2_TU = 6101, PseudoVLUXSEG6EI16_V_MF2_MF4 = 6102, PseudoVLUXSEG6EI16_V_MF2_MF4_MASK = 6103, PseudoVLUXSEG6EI16_V_MF2_MF4_TU = 6104, PseudoVLUXSEG6EI16_V_MF4_M1 = 6105, PseudoVLUXSEG6EI16_V_MF4_M1_MASK = 6106, PseudoVLUXSEG6EI16_V_MF4_M1_TU = 6107, PseudoVLUXSEG6EI16_V_MF4_MF2 = 6108, PseudoVLUXSEG6EI16_V_MF4_MF2_MASK = 6109, PseudoVLUXSEG6EI16_V_MF4_MF2_TU = 6110, PseudoVLUXSEG6EI16_V_MF4_MF4 = 6111, PseudoVLUXSEG6EI16_V_MF4_MF4_MASK = 6112, PseudoVLUXSEG6EI16_V_MF4_MF4_TU = 6113, PseudoVLUXSEG6EI16_V_MF4_MF8 = 6114, PseudoVLUXSEG6EI16_V_MF4_MF8_MASK = 6115, PseudoVLUXSEG6EI16_V_MF4_MF8_TU = 6116, PseudoVLUXSEG6EI32_V_M1_M1 = 6117, PseudoVLUXSEG6EI32_V_M1_M1_MASK = 6118, PseudoVLUXSEG6EI32_V_M1_M1_TU = 6119, PseudoVLUXSEG6EI32_V_M1_MF2 = 6120, PseudoVLUXSEG6EI32_V_M1_MF2_MASK = 6121, PseudoVLUXSEG6EI32_V_M1_MF2_TU = 6122, PseudoVLUXSEG6EI32_V_M1_MF4 = 6123, PseudoVLUXSEG6EI32_V_M1_MF4_MASK = 6124, PseudoVLUXSEG6EI32_V_M1_MF4_TU = 6125, PseudoVLUXSEG6EI32_V_M2_M1 = 6126, PseudoVLUXSEG6EI32_V_M2_M1_MASK = 6127, PseudoVLUXSEG6EI32_V_M2_M1_TU = 6128, PseudoVLUXSEG6EI32_V_M2_MF2 = 6129, PseudoVLUXSEG6EI32_V_M2_MF2_MASK = 6130, PseudoVLUXSEG6EI32_V_M2_MF2_TU = 6131, PseudoVLUXSEG6EI32_V_M4_M1 = 6132, PseudoVLUXSEG6EI32_V_M4_M1_MASK = 6133, PseudoVLUXSEG6EI32_V_M4_M1_TU = 6134, PseudoVLUXSEG6EI32_V_MF2_M1 = 6135, PseudoVLUXSEG6EI32_V_MF2_M1_MASK = 6136, PseudoVLUXSEG6EI32_V_MF2_M1_TU = 6137, PseudoVLUXSEG6EI32_V_MF2_MF2 = 6138, PseudoVLUXSEG6EI32_V_MF2_MF2_MASK = 6139, PseudoVLUXSEG6EI32_V_MF2_MF2_TU = 6140, PseudoVLUXSEG6EI32_V_MF2_MF4 = 6141, PseudoVLUXSEG6EI32_V_MF2_MF4_MASK = 6142, PseudoVLUXSEG6EI32_V_MF2_MF4_TU = 6143, PseudoVLUXSEG6EI32_V_MF2_MF8 = 6144, PseudoVLUXSEG6EI32_V_MF2_MF8_MASK = 6145, PseudoVLUXSEG6EI32_V_MF2_MF8_TU = 6146, PseudoVLUXSEG6EI64_V_M1_M1 = 6147, PseudoVLUXSEG6EI64_V_M1_M1_MASK = 6148, PseudoVLUXSEG6EI64_V_M1_M1_TU = 6149, PseudoVLUXSEG6EI64_V_M1_MF2 = 6150, PseudoVLUXSEG6EI64_V_M1_MF2_MASK = 6151, PseudoVLUXSEG6EI64_V_M1_MF2_TU = 6152, PseudoVLUXSEG6EI64_V_M1_MF4 = 6153, PseudoVLUXSEG6EI64_V_M1_MF4_MASK = 6154, PseudoVLUXSEG6EI64_V_M1_MF4_TU = 6155, PseudoVLUXSEG6EI64_V_M1_MF8 = 6156, PseudoVLUXSEG6EI64_V_M1_MF8_MASK = 6157, PseudoVLUXSEG6EI64_V_M1_MF8_TU = 6158, PseudoVLUXSEG6EI64_V_M2_M1 = 6159, PseudoVLUXSEG6EI64_V_M2_M1_MASK = 6160, PseudoVLUXSEG6EI64_V_M2_M1_TU = 6161, PseudoVLUXSEG6EI64_V_M2_MF2 = 6162, PseudoVLUXSEG6EI64_V_M2_MF2_MASK = 6163, PseudoVLUXSEG6EI64_V_M2_MF2_TU = 6164, PseudoVLUXSEG6EI64_V_M2_MF4 = 6165, PseudoVLUXSEG6EI64_V_M2_MF4_MASK = 6166, PseudoVLUXSEG6EI64_V_M2_MF4_TU = 6167, PseudoVLUXSEG6EI64_V_M4_M1 = 6168, PseudoVLUXSEG6EI64_V_M4_M1_MASK = 6169, PseudoVLUXSEG6EI64_V_M4_M1_TU = 6170, PseudoVLUXSEG6EI64_V_M4_MF2 = 6171, PseudoVLUXSEG6EI64_V_M4_MF2_MASK = 6172, PseudoVLUXSEG6EI64_V_M4_MF2_TU = 6173, PseudoVLUXSEG6EI64_V_M8_M1 = 6174, PseudoVLUXSEG6EI64_V_M8_M1_MASK = 6175, PseudoVLUXSEG6EI64_V_M8_M1_TU = 6176, PseudoVLUXSEG6EI8_V_M1_M1 = 6177, PseudoVLUXSEG6EI8_V_M1_M1_MASK = 6178, PseudoVLUXSEG6EI8_V_M1_M1_TU = 6179, PseudoVLUXSEG6EI8_V_MF2_M1 = 6180, PseudoVLUXSEG6EI8_V_MF2_M1_MASK = 6181, PseudoVLUXSEG6EI8_V_MF2_M1_TU = 6182, PseudoVLUXSEG6EI8_V_MF2_MF2 = 6183, PseudoVLUXSEG6EI8_V_MF2_MF2_MASK = 6184, PseudoVLUXSEG6EI8_V_MF2_MF2_TU = 6185, PseudoVLUXSEG6EI8_V_MF4_M1 = 6186, PseudoVLUXSEG6EI8_V_MF4_M1_MASK = 6187, PseudoVLUXSEG6EI8_V_MF4_M1_TU = 6188, PseudoVLUXSEG6EI8_V_MF4_MF2 = 6189, PseudoVLUXSEG6EI8_V_MF4_MF2_MASK = 6190, PseudoVLUXSEG6EI8_V_MF4_MF2_TU = 6191, PseudoVLUXSEG6EI8_V_MF4_MF4 = 6192, PseudoVLUXSEG6EI8_V_MF4_MF4_MASK = 6193, PseudoVLUXSEG6EI8_V_MF4_MF4_TU = 6194, PseudoVLUXSEG6EI8_V_MF8_M1 = 6195, PseudoVLUXSEG6EI8_V_MF8_M1_MASK = 6196, PseudoVLUXSEG6EI8_V_MF8_M1_TU = 6197, PseudoVLUXSEG6EI8_V_MF8_MF2 = 6198, PseudoVLUXSEG6EI8_V_MF8_MF2_MASK = 6199, PseudoVLUXSEG6EI8_V_MF8_MF2_TU = 6200, PseudoVLUXSEG6EI8_V_MF8_MF4 = 6201, PseudoVLUXSEG6EI8_V_MF8_MF4_MASK = 6202, PseudoVLUXSEG6EI8_V_MF8_MF4_TU = 6203, PseudoVLUXSEG6EI8_V_MF8_MF8 = 6204, PseudoVLUXSEG6EI8_V_MF8_MF8_MASK = 6205, PseudoVLUXSEG6EI8_V_MF8_MF8_TU = 6206, PseudoVLUXSEG7EI16_V_M1_M1 = 6207, PseudoVLUXSEG7EI16_V_M1_M1_MASK = 6208, PseudoVLUXSEG7EI16_V_M1_M1_TU = 6209, PseudoVLUXSEG7EI16_V_M1_MF2 = 6210, PseudoVLUXSEG7EI16_V_M1_MF2_MASK = 6211, PseudoVLUXSEG7EI16_V_M1_MF2_TU = 6212, PseudoVLUXSEG7EI16_V_M2_M1 = 6213, PseudoVLUXSEG7EI16_V_M2_M1_MASK = 6214, PseudoVLUXSEG7EI16_V_M2_M1_TU = 6215, PseudoVLUXSEG7EI16_V_MF2_M1 = 6216, PseudoVLUXSEG7EI16_V_MF2_M1_MASK = 6217, PseudoVLUXSEG7EI16_V_MF2_M1_TU = 6218, PseudoVLUXSEG7EI16_V_MF2_MF2 = 6219, PseudoVLUXSEG7EI16_V_MF2_MF2_MASK = 6220, PseudoVLUXSEG7EI16_V_MF2_MF2_TU = 6221, PseudoVLUXSEG7EI16_V_MF2_MF4 = 6222, PseudoVLUXSEG7EI16_V_MF2_MF4_MASK = 6223, PseudoVLUXSEG7EI16_V_MF2_MF4_TU = 6224, PseudoVLUXSEG7EI16_V_MF4_M1 = 6225, PseudoVLUXSEG7EI16_V_MF4_M1_MASK = 6226, PseudoVLUXSEG7EI16_V_MF4_M1_TU = 6227, PseudoVLUXSEG7EI16_V_MF4_MF2 = 6228, PseudoVLUXSEG7EI16_V_MF4_MF2_MASK = 6229, PseudoVLUXSEG7EI16_V_MF4_MF2_TU = 6230, PseudoVLUXSEG7EI16_V_MF4_MF4 = 6231, PseudoVLUXSEG7EI16_V_MF4_MF4_MASK = 6232, PseudoVLUXSEG7EI16_V_MF4_MF4_TU = 6233, PseudoVLUXSEG7EI16_V_MF4_MF8 = 6234, PseudoVLUXSEG7EI16_V_MF4_MF8_MASK = 6235, PseudoVLUXSEG7EI16_V_MF4_MF8_TU = 6236, PseudoVLUXSEG7EI32_V_M1_M1 = 6237, PseudoVLUXSEG7EI32_V_M1_M1_MASK = 6238, PseudoVLUXSEG7EI32_V_M1_M1_TU = 6239, PseudoVLUXSEG7EI32_V_M1_MF2 = 6240, PseudoVLUXSEG7EI32_V_M1_MF2_MASK = 6241, PseudoVLUXSEG7EI32_V_M1_MF2_TU = 6242, PseudoVLUXSEG7EI32_V_M1_MF4 = 6243, PseudoVLUXSEG7EI32_V_M1_MF4_MASK = 6244, PseudoVLUXSEG7EI32_V_M1_MF4_TU = 6245, PseudoVLUXSEG7EI32_V_M2_M1 = 6246, PseudoVLUXSEG7EI32_V_M2_M1_MASK = 6247, PseudoVLUXSEG7EI32_V_M2_M1_TU = 6248, PseudoVLUXSEG7EI32_V_M2_MF2 = 6249, PseudoVLUXSEG7EI32_V_M2_MF2_MASK = 6250, PseudoVLUXSEG7EI32_V_M2_MF2_TU = 6251, PseudoVLUXSEG7EI32_V_M4_M1 = 6252, PseudoVLUXSEG7EI32_V_M4_M1_MASK = 6253, PseudoVLUXSEG7EI32_V_M4_M1_TU = 6254, PseudoVLUXSEG7EI32_V_MF2_M1 = 6255, PseudoVLUXSEG7EI32_V_MF2_M1_MASK = 6256, PseudoVLUXSEG7EI32_V_MF2_M1_TU = 6257, PseudoVLUXSEG7EI32_V_MF2_MF2 = 6258, PseudoVLUXSEG7EI32_V_MF2_MF2_MASK = 6259, PseudoVLUXSEG7EI32_V_MF2_MF2_TU = 6260, PseudoVLUXSEG7EI32_V_MF2_MF4 = 6261, PseudoVLUXSEG7EI32_V_MF2_MF4_MASK = 6262, PseudoVLUXSEG7EI32_V_MF2_MF4_TU = 6263, PseudoVLUXSEG7EI32_V_MF2_MF8 = 6264, PseudoVLUXSEG7EI32_V_MF2_MF8_MASK = 6265, PseudoVLUXSEG7EI32_V_MF2_MF8_TU = 6266, PseudoVLUXSEG7EI64_V_M1_M1 = 6267, PseudoVLUXSEG7EI64_V_M1_M1_MASK = 6268, PseudoVLUXSEG7EI64_V_M1_M1_TU = 6269, PseudoVLUXSEG7EI64_V_M1_MF2 = 6270, PseudoVLUXSEG7EI64_V_M1_MF2_MASK = 6271, PseudoVLUXSEG7EI64_V_M1_MF2_TU = 6272, PseudoVLUXSEG7EI64_V_M1_MF4 = 6273, PseudoVLUXSEG7EI64_V_M1_MF4_MASK = 6274, PseudoVLUXSEG7EI64_V_M1_MF4_TU = 6275, PseudoVLUXSEG7EI64_V_M1_MF8 = 6276, PseudoVLUXSEG7EI64_V_M1_MF8_MASK = 6277, PseudoVLUXSEG7EI64_V_M1_MF8_TU = 6278, PseudoVLUXSEG7EI64_V_M2_M1 = 6279, PseudoVLUXSEG7EI64_V_M2_M1_MASK = 6280, PseudoVLUXSEG7EI64_V_M2_M1_TU = 6281, PseudoVLUXSEG7EI64_V_M2_MF2 = 6282, PseudoVLUXSEG7EI64_V_M2_MF2_MASK = 6283, PseudoVLUXSEG7EI64_V_M2_MF2_TU = 6284, PseudoVLUXSEG7EI64_V_M2_MF4 = 6285, PseudoVLUXSEG7EI64_V_M2_MF4_MASK = 6286, PseudoVLUXSEG7EI64_V_M2_MF4_TU = 6287, PseudoVLUXSEG7EI64_V_M4_M1 = 6288, PseudoVLUXSEG7EI64_V_M4_M1_MASK = 6289, PseudoVLUXSEG7EI64_V_M4_M1_TU = 6290, PseudoVLUXSEG7EI64_V_M4_MF2 = 6291, PseudoVLUXSEG7EI64_V_M4_MF2_MASK = 6292, PseudoVLUXSEG7EI64_V_M4_MF2_TU = 6293, PseudoVLUXSEG7EI64_V_M8_M1 = 6294, PseudoVLUXSEG7EI64_V_M8_M1_MASK = 6295, PseudoVLUXSEG7EI64_V_M8_M1_TU = 6296, PseudoVLUXSEG7EI8_V_M1_M1 = 6297, PseudoVLUXSEG7EI8_V_M1_M1_MASK = 6298, PseudoVLUXSEG7EI8_V_M1_M1_TU = 6299, PseudoVLUXSEG7EI8_V_MF2_M1 = 6300, PseudoVLUXSEG7EI8_V_MF2_M1_MASK = 6301, PseudoVLUXSEG7EI8_V_MF2_M1_TU = 6302, PseudoVLUXSEG7EI8_V_MF2_MF2 = 6303, PseudoVLUXSEG7EI8_V_MF2_MF2_MASK = 6304, PseudoVLUXSEG7EI8_V_MF2_MF2_TU = 6305, PseudoVLUXSEG7EI8_V_MF4_M1 = 6306, PseudoVLUXSEG7EI8_V_MF4_M1_MASK = 6307, PseudoVLUXSEG7EI8_V_MF4_M1_TU = 6308, PseudoVLUXSEG7EI8_V_MF4_MF2 = 6309, PseudoVLUXSEG7EI8_V_MF4_MF2_MASK = 6310, PseudoVLUXSEG7EI8_V_MF4_MF2_TU = 6311, PseudoVLUXSEG7EI8_V_MF4_MF4 = 6312, PseudoVLUXSEG7EI8_V_MF4_MF4_MASK = 6313, PseudoVLUXSEG7EI8_V_MF4_MF4_TU = 6314, PseudoVLUXSEG7EI8_V_MF8_M1 = 6315, PseudoVLUXSEG7EI8_V_MF8_M1_MASK = 6316, PseudoVLUXSEG7EI8_V_MF8_M1_TU = 6317, PseudoVLUXSEG7EI8_V_MF8_MF2 = 6318, PseudoVLUXSEG7EI8_V_MF8_MF2_MASK = 6319, PseudoVLUXSEG7EI8_V_MF8_MF2_TU = 6320, PseudoVLUXSEG7EI8_V_MF8_MF4 = 6321, PseudoVLUXSEG7EI8_V_MF8_MF4_MASK = 6322, PseudoVLUXSEG7EI8_V_MF8_MF4_TU = 6323, PseudoVLUXSEG7EI8_V_MF8_MF8 = 6324, PseudoVLUXSEG7EI8_V_MF8_MF8_MASK = 6325, PseudoVLUXSEG7EI8_V_MF8_MF8_TU = 6326, PseudoVLUXSEG8EI16_V_M1_M1 = 6327, PseudoVLUXSEG8EI16_V_M1_M1_MASK = 6328, PseudoVLUXSEG8EI16_V_M1_M1_TU = 6329, PseudoVLUXSEG8EI16_V_M1_MF2 = 6330, PseudoVLUXSEG8EI16_V_M1_MF2_MASK = 6331, PseudoVLUXSEG8EI16_V_M1_MF2_TU = 6332, PseudoVLUXSEG8EI16_V_M2_M1 = 6333, PseudoVLUXSEG8EI16_V_M2_M1_MASK = 6334, PseudoVLUXSEG8EI16_V_M2_M1_TU = 6335, PseudoVLUXSEG8EI16_V_MF2_M1 = 6336, PseudoVLUXSEG8EI16_V_MF2_M1_MASK = 6337, PseudoVLUXSEG8EI16_V_MF2_M1_TU = 6338, PseudoVLUXSEG8EI16_V_MF2_MF2 = 6339, PseudoVLUXSEG8EI16_V_MF2_MF2_MASK = 6340, PseudoVLUXSEG8EI16_V_MF2_MF2_TU = 6341, PseudoVLUXSEG8EI16_V_MF2_MF4 = 6342, PseudoVLUXSEG8EI16_V_MF2_MF4_MASK = 6343, PseudoVLUXSEG8EI16_V_MF2_MF4_TU = 6344, PseudoVLUXSEG8EI16_V_MF4_M1 = 6345, PseudoVLUXSEG8EI16_V_MF4_M1_MASK = 6346, PseudoVLUXSEG8EI16_V_MF4_M1_TU = 6347, PseudoVLUXSEG8EI16_V_MF4_MF2 = 6348, PseudoVLUXSEG8EI16_V_MF4_MF2_MASK = 6349, PseudoVLUXSEG8EI16_V_MF4_MF2_TU = 6350, PseudoVLUXSEG8EI16_V_MF4_MF4 = 6351, PseudoVLUXSEG8EI16_V_MF4_MF4_MASK = 6352, PseudoVLUXSEG8EI16_V_MF4_MF4_TU = 6353, PseudoVLUXSEG8EI16_V_MF4_MF8 = 6354, PseudoVLUXSEG8EI16_V_MF4_MF8_MASK = 6355, PseudoVLUXSEG8EI16_V_MF4_MF8_TU = 6356, PseudoVLUXSEG8EI32_V_M1_M1 = 6357, PseudoVLUXSEG8EI32_V_M1_M1_MASK = 6358, PseudoVLUXSEG8EI32_V_M1_M1_TU = 6359, PseudoVLUXSEG8EI32_V_M1_MF2 = 6360, PseudoVLUXSEG8EI32_V_M1_MF2_MASK = 6361, PseudoVLUXSEG8EI32_V_M1_MF2_TU = 6362, PseudoVLUXSEG8EI32_V_M1_MF4 = 6363, PseudoVLUXSEG8EI32_V_M1_MF4_MASK = 6364, PseudoVLUXSEG8EI32_V_M1_MF4_TU = 6365, PseudoVLUXSEG8EI32_V_M2_M1 = 6366, PseudoVLUXSEG8EI32_V_M2_M1_MASK = 6367, PseudoVLUXSEG8EI32_V_M2_M1_TU = 6368, PseudoVLUXSEG8EI32_V_M2_MF2 = 6369, PseudoVLUXSEG8EI32_V_M2_MF2_MASK = 6370, PseudoVLUXSEG8EI32_V_M2_MF2_TU = 6371, PseudoVLUXSEG8EI32_V_M4_M1 = 6372, PseudoVLUXSEG8EI32_V_M4_M1_MASK = 6373, PseudoVLUXSEG8EI32_V_M4_M1_TU = 6374, PseudoVLUXSEG8EI32_V_MF2_M1 = 6375, PseudoVLUXSEG8EI32_V_MF2_M1_MASK = 6376, PseudoVLUXSEG8EI32_V_MF2_M1_TU = 6377, PseudoVLUXSEG8EI32_V_MF2_MF2 = 6378, PseudoVLUXSEG8EI32_V_MF2_MF2_MASK = 6379, PseudoVLUXSEG8EI32_V_MF2_MF2_TU = 6380, PseudoVLUXSEG8EI32_V_MF2_MF4 = 6381, PseudoVLUXSEG8EI32_V_MF2_MF4_MASK = 6382, PseudoVLUXSEG8EI32_V_MF2_MF4_TU = 6383, PseudoVLUXSEG8EI32_V_MF2_MF8 = 6384, PseudoVLUXSEG8EI32_V_MF2_MF8_MASK = 6385, PseudoVLUXSEG8EI32_V_MF2_MF8_TU = 6386, PseudoVLUXSEG8EI64_V_M1_M1 = 6387, PseudoVLUXSEG8EI64_V_M1_M1_MASK = 6388, PseudoVLUXSEG8EI64_V_M1_M1_TU = 6389, PseudoVLUXSEG8EI64_V_M1_MF2 = 6390, PseudoVLUXSEG8EI64_V_M1_MF2_MASK = 6391, PseudoVLUXSEG8EI64_V_M1_MF2_TU = 6392, PseudoVLUXSEG8EI64_V_M1_MF4 = 6393, PseudoVLUXSEG8EI64_V_M1_MF4_MASK = 6394, PseudoVLUXSEG8EI64_V_M1_MF4_TU = 6395, PseudoVLUXSEG8EI64_V_M1_MF8 = 6396, PseudoVLUXSEG8EI64_V_M1_MF8_MASK = 6397, PseudoVLUXSEG8EI64_V_M1_MF8_TU = 6398, PseudoVLUXSEG8EI64_V_M2_M1 = 6399, PseudoVLUXSEG8EI64_V_M2_M1_MASK = 6400, PseudoVLUXSEG8EI64_V_M2_M1_TU = 6401, PseudoVLUXSEG8EI64_V_M2_MF2 = 6402, PseudoVLUXSEG8EI64_V_M2_MF2_MASK = 6403, PseudoVLUXSEG8EI64_V_M2_MF2_TU = 6404, PseudoVLUXSEG8EI64_V_M2_MF4 = 6405, PseudoVLUXSEG8EI64_V_M2_MF4_MASK = 6406, PseudoVLUXSEG8EI64_V_M2_MF4_TU = 6407, PseudoVLUXSEG8EI64_V_M4_M1 = 6408, PseudoVLUXSEG8EI64_V_M4_M1_MASK = 6409, PseudoVLUXSEG8EI64_V_M4_M1_TU = 6410, PseudoVLUXSEG8EI64_V_M4_MF2 = 6411, PseudoVLUXSEG8EI64_V_M4_MF2_MASK = 6412, PseudoVLUXSEG8EI64_V_M4_MF2_TU = 6413, PseudoVLUXSEG8EI64_V_M8_M1 = 6414, PseudoVLUXSEG8EI64_V_M8_M1_MASK = 6415, PseudoVLUXSEG8EI64_V_M8_M1_TU = 6416, PseudoVLUXSEG8EI8_V_M1_M1 = 6417, PseudoVLUXSEG8EI8_V_M1_M1_MASK = 6418, PseudoVLUXSEG8EI8_V_M1_M1_TU = 6419, PseudoVLUXSEG8EI8_V_MF2_M1 = 6420, PseudoVLUXSEG8EI8_V_MF2_M1_MASK = 6421, PseudoVLUXSEG8EI8_V_MF2_M1_TU = 6422, PseudoVLUXSEG8EI8_V_MF2_MF2 = 6423, PseudoVLUXSEG8EI8_V_MF2_MF2_MASK = 6424, PseudoVLUXSEG8EI8_V_MF2_MF2_TU = 6425, PseudoVLUXSEG8EI8_V_MF4_M1 = 6426, PseudoVLUXSEG8EI8_V_MF4_M1_MASK = 6427, PseudoVLUXSEG8EI8_V_MF4_M1_TU = 6428, PseudoVLUXSEG8EI8_V_MF4_MF2 = 6429, PseudoVLUXSEG8EI8_V_MF4_MF2_MASK = 6430, PseudoVLUXSEG8EI8_V_MF4_MF2_TU = 6431, PseudoVLUXSEG8EI8_V_MF4_MF4 = 6432, PseudoVLUXSEG8EI8_V_MF4_MF4_MASK = 6433, PseudoVLUXSEG8EI8_V_MF4_MF4_TU = 6434, PseudoVLUXSEG8EI8_V_MF8_M1 = 6435, PseudoVLUXSEG8EI8_V_MF8_M1_MASK = 6436, PseudoVLUXSEG8EI8_V_MF8_M1_TU = 6437, PseudoVLUXSEG8EI8_V_MF8_MF2 = 6438, PseudoVLUXSEG8EI8_V_MF8_MF2_MASK = 6439, PseudoVLUXSEG8EI8_V_MF8_MF2_TU = 6440, PseudoVLUXSEG8EI8_V_MF8_MF4 = 6441, PseudoVLUXSEG8EI8_V_MF8_MF4_MASK = 6442, PseudoVLUXSEG8EI8_V_MF8_MF4_TU = 6443, PseudoVLUXSEG8EI8_V_MF8_MF8 = 6444, PseudoVLUXSEG8EI8_V_MF8_MF8_MASK = 6445, PseudoVLUXSEG8EI8_V_MF8_MF8_TU = 6446, PseudoVMACC_VV_M1 = 6447, PseudoVMACC_VV_M1_MASK = 6448, PseudoVMACC_VV_M2 = 6449, PseudoVMACC_VV_M2_MASK = 6450, PseudoVMACC_VV_M4 = 6451, PseudoVMACC_VV_M4_MASK = 6452, PseudoVMACC_VV_M8 = 6453, PseudoVMACC_VV_M8_MASK = 6454, PseudoVMACC_VV_MF2 = 6455, PseudoVMACC_VV_MF2_MASK = 6456, PseudoVMACC_VV_MF4 = 6457, PseudoVMACC_VV_MF4_MASK = 6458, PseudoVMACC_VV_MF8 = 6459, PseudoVMACC_VV_MF8_MASK = 6460, PseudoVMACC_VX_M1 = 6461, PseudoVMACC_VX_M1_MASK = 6462, PseudoVMACC_VX_M2 = 6463, PseudoVMACC_VX_M2_MASK = 6464, PseudoVMACC_VX_M4 = 6465, PseudoVMACC_VX_M4_MASK = 6466, PseudoVMACC_VX_M8 = 6467, PseudoVMACC_VX_M8_MASK = 6468, PseudoVMACC_VX_MF2 = 6469, PseudoVMACC_VX_MF2_MASK = 6470, PseudoVMACC_VX_MF4 = 6471, PseudoVMACC_VX_MF4_MASK = 6472, PseudoVMACC_VX_MF8 = 6473, PseudoVMACC_VX_MF8_MASK = 6474, PseudoVMADC_VIM_M1 = 6475, PseudoVMADC_VIM_M2 = 6476, PseudoVMADC_VIM_M4 = 6477, PseudoVMADC_VIM_M8 = 6478, PseudoVMADC_VIM_MF2 = 6479, PseudoVMADC_VIM_MF4 = 6480, PseudoVMADC_VIM_MF8 = 6481, PseudoVMADC_VI_M1 = 6482, PseudoVMADC_VI_M2 = 6483, PseudoVMADC_VI_M4 = 6484, PseudoVMADC_VI_M8 = 6485, PseudoVMADC_VI_MF2 = 6486, PseudoVMADC_VI_MF4 = 6487, PseudoVMADC_VI_MF8 = 6488, PseudoVMADC_VVM_M1 = 6489, PseudoVMADC_VVM_M2 = 6490, PseudoVMADC_VVM_M4 = 6491, PseudoVMADC_VVM_M8 = 6492, PseudoVMADC_VVM_MF2 = 6493, PseudoVMADC_VVM_MF4 = 6494, PseudoVMADC_VVM_MF8 = 6495, PseudoVMADC_VV_M1 = 6496, PseudoVMADC_VV_M2 = 6497, PseudoVMADC_VV_M4 = 6498, PseudoVMADC_VV_M8 = 6499, PseudoVMADC_VV_MF2 = 6500, PseudoVMADC_VV_MF4 = 6501, PseudoVMADC_VV_MF8 = 6502, PseudoVMADC_VXM_M1 = 6503, PseudoVMADC_VXM_M2 = 6504, PseudoVMADC_VXM_M4 = 6505, PseudoVMADC_VXM_M8 = 6506, PseudoVMADC_VXM_MF2 = 6507, PseudoVMADC_VXM_MF4 = 6508, PseudoVMADC_VXM_MF8 = 6509, PseudoVMADC_VX_M1 = 6510, PseudoVMADC_VX_M2 = 6511, PseudoVMADC_VX_M4 = 6512, PseudoVMADC_VX_M8 = 6513, PseudoVMADC_VX_MF2 = 6514, PseudoVMADC_VX_MF4 = 6515, PseudoVMADC_VX_MF8 = 6516, PseudoVMADD_VV_M1 = 6517, PseudoVMADD_VV_M1_MASK = 6518, PseudoVMADD_VV_M2 = 6519, PseudoVMADD_VV_M2_MASK = 6520, PseudoVMADD_VV_M4 = 6521, PseudoVMADD_VV_M4_MASK = 6522, PseudoVMADD_VV_M8 = 6523, PseudoVMADD_VV_M8_MASK = 6524, PseudoVMADD_VV_MF2 = 6525, PseudoVMADD_VV_MF2_MASK = 6526, PseudoVMADD_VV_MF4 = 6527, PseudoVMADD_VV_MF4_MASK = 6528, PseudoVMADD_VV_MF8 = 6529, PseudoVMADD_VV_MF8_MASK = 6530, PseudoVMADD_VX_M1 = 6531, PseudoVMADD_VX_M1_MASK = 6532, PseudoVMADD_VX_M2 = 6533, PseudoVMADD_VX_M2_MASK = 6534, PseudoVMADD_VX_M4 = 6535, PseudoVMADD_VX_M4_MASK = 6536, PseudoVMADD_VX_M8 = 6537, PseudoVMADD_VX_M8_MASK = 6538, PseudoVMADD_VX_MF2 = 6539, PseudoVMADD_VX_MF2_MASK = 6540, PseudoVMADD_VX_MF4 = 6541, PseudoVMADD_VX_MF4_MASK = 6542, PseudoVMADD_VX_MF8 = 6543, PseudoVMADD_VX_MF8_MASK = 6544, PseudoVMANDN_MM_M1 = 6545, PseudoVMANDN_MM_M2 = 6546, PseudoVMANDN_MM_M4 = 6547, PseudoVMANDN_MM_M8 = 6548, PseudoVMANDN_MM_MF2 = 6549, PseudoVMANDN_MM_MF4 = 6550, PseudoVMANDN_MM_MF8 = 6551, PseudoVMAND_MM_M1 = 6552, PseudoVMAND_MM_M2 = 6553, PseudoVMAND_MM_M4 = 6554, PseudoVMAND_MM_M8 = 6555, PseudoVMAND_MM_MF2 = 6556, PseudoVMAND_MM_MF4 = 6557, PseudoVMAND_MM_MF8 = 6558, PseudoVMAXU_VV_M1 = 6559, PseudoVMAXU_VV_M1_MASK = 6560, PseudoVMAXU_VV_M1_TU = 6561, PseudoVMAXU_VV_M2 = 6562, PseudoVMAXU_VV_M2_MASK = 6563, PseudoVMAXU_VV_M2_TU = 6564, PseudoVMAXU_VV_M4 = 6565, PseudoVMAXU_VV_M4_MASK = 6566, PseudoVMAXU_VV_M4_TU = 6567, PseudoVMAXU_VV_M8 = 6568, PseudoVMAXU_VV_M8_MASK = 6569, PseudoVMAXU_VV_M8_TU = 6570, PseudoVMAXU_VV_MF2 = 6571, PseudoVMAXU_VV_MF2_MASK = 6572, PseudoVMAXU_VV_MF2_TU = 6573, PseudoVMAXU_VV_MF4 = 6574, PseudoVMAXU_VV_MF4_MASK = 6575, PseudoVMAXU_VV_MF4_TU = 6576, PseudoVMAXU_VV_MF8 = 6577, PseudoVMAXU_VV_MF8_MASK = 6578, PseudoVMAXU_VV_MF8_TU = 6579, PseudoVMAXU_VX_M1 = 6580, PseudoVMAXU_VX_M1_MASK = 6581, PseudoVMAXU_VX_M1_TU = 6582, PseudoVMAXU_VX_M2 = 6583, PseudoVMAXU_VX_M2_MASK = 6584, PseudoVMAXU_VX_M2_TU = 6585, PseudoVMAXU_VX_M4 = 6586, PseudoVMAXU_VX_M4_MASK = 6587, PseudoVMAXU_VX_M4_TU = 6588, PseudoVMAXU_VX_M8 = 6589, PseudoVMAXU_VX_M8_MASK = 6590, PseudoVMAXU_VX_M8_TU = 6591, PseudoVMAXU_VX_MF2 = 6592, PseudoVMAXU_VX_MF2_MASK = 6593, PseudoVMAXU_VX_MF2_TU = 6594, PseudoVMAXU_VX_MF4 = 6595, PseudoVMAXU_VX_MF4_MASK = 6596, PseudoVMAXU_VX_MF4_TU = 6597, PseudoVMAXU_VX_MF8 = 6598, PseudoVMAXU_VX_MF8_MASK = 6599, PseudoVMAXU_VX_MF8_TU = 6600, PseudoVMAX_VV_M1 = 6601, PseudoVMAX_VV_M1_MASK = 6602, PseudoVMAX_VV_M1_TU = 6603, PseudoVMAX_VV_M2 = 6604, PseudoVMAX_VV_M2_MASK = 6605, PseudoVMAX_VV_M2_TU = 6606, PseudoVMAX_VV_M4 = 6607, PseudoVMAX_VV_M4_MASK = 6608, PseudoVMAX_VV_M4_TU = 6609, PseudoVMAX_VV_M8 = 6610, PseudoVMAX_VV_M8_MASK = 6611, PseudoVMAX_VV_M8_TU = 6612, PseudoVMAX_VV_MF2 = 6613, PseudoVMAX_VV_MF2_MASK = 6614, PseudoVMAX_VV_MF2_TU = 6615, PseudoVMAX_VV_MF4 = 6616, PseudoVMAX_VV_MF4_MASK = 6617, PseudoVMAX_VV_MF4_TU = 6618, PseudoVMAX_VV_MF8 = 6619, PseudoVMAX_VV_MF8_MASK = 6620, PseudoVMAX_VV_MF8_TU = 6621, PseudoVMAX_VX_M1 = 6622, PseudoVMAX_VX_M1_MASK = 6623, PseudoVMAX_VX_M1_TU = 6624, PseudoVMAX_VX_M2 = 6625, PseudoVMAX_VX_M2_MASK = 6626, PseudoVMAX_VX_M2_TU = 6627, PseudoVMAX_VX_M4 = 6628, PseudoVMAX_VX_M4_MASK = 6629, PseudoVMAX_VX_M4_TU = 6630, PseudoVMAX_VX_M8 = 6631, PseudoVMAX_VX_M8_MASK = 6632, PseudoVMAX_VX_M8_TU = 6633, PseudoVMAX_VX_MF2 = 6634, PseudoVMAX_VX_MF2_MASK = 6635, PseudoVMAX_VX_MF2_TU = 6636, PseudoVMAX_VX_MF4 = 6637, PseudoVMAX_VX_MF4_MASK = 6638, PseudoVMAX_VX_MF4_TU = 6639, PseudoVMAX_VX_MF8 = 6640, PseudoVMAX_VX_MF8_MASK = 6641, PseudoVMAX_VX_MF8_TU = 6642, PseudoVMCLR_M_B1 = 6643, PseudoVMCLR_M_B16 = 6644, PseudoVMCLR_M_B2 = 6645, PseudoVMCLR_M_B32 = 6646, PseudoVMCLR_M_B4 = 6647, PseudoVMCLR_M_B64 = 6648, PseudoVMCLR_M_B8 = 6649, PseudoVMERGE_VIM_M1 = 6650, PseudoVMERGE_VIM_M1_TU = 6651, PseudoVMERGE_VIM_M2 = 6652, PseudoVMERGE_VIM_M2_TU = 6653, PseudoVMERGE_VIM_M4 = 6654, PseudoVMERGE_VIM_M4_TU = 6655, PseudoVMERGE_VIM_M8 = 6656, PseudoVMERGE_VIM_M8_TU = 6657, PseudoVMERGE_VIM_MF2 = 6658, PseudoVMERGE_VIM_MF2_TU = 6659, PseudoVMERGE_VIM_MF4 = 6660, PseudoVMERGE_VIM_MF4_TU = 6661, PseudoVMERGE_VIM_MF8 = 6662, PseudoVMERGE_VIM_MF8_TU = 6663, PseudoVMERGE_VVM_M1 = 6664, PseudoVMERGE_VVM_M1_TU = 6665, PseudoVMERGE_VVM_M2 = 6666, PseudoVMERGE_VVM_M2_TU = 6667, PseudoVMERGE_VVM_M4 = 6668, PseudoVMERGE_VVM_M4_TU = 6669, PseudoVMERGE_VVM_M8 = 6670, PseudoVMERGE_VVM_M8_TU = 6671, PseudoVMERGE_VVM_MF2 = 6672, PseudoVMERGE_VVM_MF2_TU = 6673, PseudoVMERGE_VVM_MF4 = 6674, PseudoVMERGE_VVM_MF4_TU = 6675, PseudoVMERGE_VVM_MF8 = 6676, PseudoVMERGE_VVM_MF8_TU = 6677, PseudoVMERGE_VXM_M1 = 6678, PseudoVMERGE_VXM_M1_TU = 6679, PseudoVMERGE_VXM_M2 = 6680, PseudoVMERGE_VXM_M2_TU = 6681, PseudoVMERGE_VXM_M4 = 6682, PseudoVMERGE_VXM_M4_TU = 6683, PseudoVMERGE_VXM_M8 = 6684, PseudoVMERGE_VXM_M8_TU = 6685, PseudoVMERGE_VXM_MF2 = 6686, PseudoVMERGE_VXM_MF2_TU = 6687, PseudoVMERGE_VXM_MF4 = 6688, PseudoVMERGE_VXM_MF4_TU = 6689, PseudoVMERGE_VXM_MF8 = 6690, PseudoVMERGE_VXM_MF8_TU = 6691, PseudoVMFEQ_VF16_M1 = 6692, PseudoVMFEQ_VF16_M1_MASK = 6693, PseudoVMFEQ_VF16_M2 = 6694, PseudoVMFEQ_VF16_M2_MASK = 6695, PseudoVMFEQ_VF16_M4 = 6696, PseudoVMFEQ_VF16_M4_MASK = 6697, PseudoVMFEQ_VF16_M8 = 6698, PseudoVMFEQ_VF16_M8_MASK = 6699, PseudoVMFEQ_VF16_MF2 = 6700, PseudoVMFEQ_VF16_MF2_MASK = 6701, PseudoVMFEQ_VF16_MF4 = 6702, PseudoVMFEQ_VF16_MF4_MASK = 6703, PseudoVMFEQ_VF32_M1 = 6704, PseudoVMFEQ_VF32_M1_MASK = 6705, PseudoVMFEQ_VF32_M2 = 6706, PseudoVMFEQ_VF32_M2_MASK = 6707, PseudoVMFEQ_VF32_M4 = 6708, PseudoVMFEQ_VF32_M4_MASK = 6709, PseudoVMFEQ_VF32_M8 = 6710, PseudoVMFEQ_VF32_M8_MASK = 6711, PseudoVMFEQ_VF32_MF2 = 6712, PseudoVMFEQ_VF32_MF2_MASK = 6713, PseudoVMFEQ_VF64_M1 = 6714, PseudoVMFEQ_VF64_M1_MASK = 6715, PseudoVMFEQ_VF64_M2 = 6716, PseudoVMFEQ_VF64_M2_MASK = 6717, PseudoVMFEQ_VF64_M4 = 6718, PseudoVMFEQ_VF64_M4_MASK = 6719, PseudoVMFEQ_VF64_M8 = 6720, PseudoVMFEQ_VF64_M8_MASK = 6721, PseudoVMFEQ_VV_M1 = 6722, PseudoVMFEQ_VV_M1_MASK = 6723, PseudoVMFEQ_VV_M2 = 6724, PseudoVMFEQ_VV_M2_MASK = 6725, PseudoVMFEQ_VV_M4 = 6726, PseudoVMFEQ_VV_M4_MASK = 6727, PseudoVMFEQ_VV_M8 = 6728, PseudoVMFEQ_VV_M8_MASK = 6729, PseudoVMFEQ_VV_MF2 = 6730, PseudoVMFEQ_VV_MF2_MASK = 6731, PseudoVMFEQ_VV_MF4 = 6732, PseudoVMFEQ_VV_MF4_MASK = 6733, PseudoVMFGE_VF16_M1 = 6734, PseudoVMFGE_VF16_M1_MASK = 6735, PseudoVMFGE_VF16_M2 = 6736, PseudoVMFGE_VF16_M2_MASK = 6737, PseudoVMFGE_VF16_M4 = 6738, PseudoVMFGE_VF16_M4_MASK = 6739, PseudoVMFGE_VF16_M8 = 6740, PseudoVMFGE_VF16_M8_MASK = 6741, PseudoVMFGE_VF16_MF2 = 6742, PseudoVMFGE_VF16_MF2_MASK = 6743, PseudoVMFGE_VF16_MF4 = 6744, PseudoVMFGE_VF16_MF4_MASK = 6745, PseudoVMFGE_VF32_M1 = 6746, PseudoVMFGE_VF32_M1_MASK = 6747, PseudoVMFGE_VF32_M2 = 6748, PseudoVMFGE_VF32_M2_MASK = 6749, PseudoVMFGE_VF32_M4 = 6750, PseudoVMFGE_VF32_M4_MASK = 6751, PseudoVMFGE_VF32_M8 = 6752, PseudoVMFGE_VF32_M8_MASK = 6753, PseudoVMFGE_VF32_MF2 = 6754, PseudoVMFGE_VF32_MF2_MASK = 6755, PseudoVMFGE_VF64_M1 = 6756, PseudoVMFGE_VF64_M1_MASK = 6757, PseudoVMFGE_VF64_M2 = 6758, PseudoVMFGE_VF64_M2_MASK = 6759, PseudoVMFGE_VF64_M4 = 6760, PseudoVMFGE_VF64_M4_MASK = 6761, PseudoVMFGE_VF64_M8 = 6762, PseudoVMFGE_VF64_M8_MASK = 6763, PseudoVMFGT_VF16_M1 = 6764, PseudoVMFGT_VF16_M1_MASK = 6765, PseudoVMFGT_VF16_M2 = 6766, PseudoVMFGT_VF16_M2_MASK = 6767, PseudoVMFGT_VF16_M4 = 6768, PseudoVMFGT_VF16_M4_MASK = 6769, PseudoVMFGT_VF16_M8 = 6770, PseudoVMFGT_VF16_M8_MASK = 6771, PseudoVMFGT_VF16_MF2 = 6772, PseudoVMFGT_VF16_MF2_MASK = 6773, PseudoVMFGT_VF16_MF4 = 6774, PseudoVMFGT_VF16_MF4_MASK = 6775, PseudoVMFGT_VF32_M1 = 6776, PseudoVMFGT_VF32_M1_MASK = 6777, PseudoVMFGT_VF32_M2 = 6778, PseudoVMFGT_VF32_M2_MASK = 6779, PseudoVMFGT_VF32_M4 = 6780, PseudoVMFGT_VF32_M4_MASK = 6781, PseudoVMFGT_VF32_M8 = 6782, PseudoVMFGT_VF32_M8_MASK = 6783, PseudoVMFGT_VF32_MF2 = 6784, PseudoVMFGT_VF32_MF2_MASK = 6785, PseudoVMFGT_VF64_M1 = 6786, PseudoVMFGT_VF64_M1_MASK = 6787, PseudoVMFGT_VF64_M2 = 6788, PseudoVMFGT_VF64_M2_MASK = 6789, PseudoVMFGT_VF64_M4 = 6790, PseudoVMFGT_VF64_M4_MASK = 6791, PseudoVMFGT_VF64_M8 = 6792, PseudoVMFGT_VF64_M8_MASK = 6793, PseudoVMFLE_VF16_M1 = 6794, PseudoVMFLE_VF16_M1_MASK = 6795, PseudoVMFLE_VF16_M2 = 6796, PseudoVMFLE_VF16_M2_MASK = 6797, PseudoVMFLE_VF16_M4 = 6798, PseudoVMFLE_VF16_M4_MASK = 6799, PseudoVMFLE_VF16_M8 = 6800, PseudoVMFLE_VF16_M8_MASK = 6801, PseudoVMFLE_VF16_MF2 = 6802, PseudoVMFLE_VF16_MF2_MASK = 6803, PseudoVMFLE_VF16_MF4 = 6804, PseudoVMFLE_VF16_MF4_MASK = 6805, PseudoVMFLE_VF32_M1 = 6806, PseudoVMFLE_VF32_M1_MASK = 6807, PseudoVMFLE_VF32_M2 = 6808, PseudoVMFLE_VF32_M2_MASK = 6809, PseudoVMFLE_VF32_M4 = 6810, PseudoVMFLE_VF32_M4_MASK = 6811, PseudoVMFLE_VF32_M8 = 6812, PseudoVMFLE_VF32_M8_MASK = 6813, PseudoVMFLE_VF32_MF2 = 6814, PseudoVMFLE_VF32_MF2_MASK = 6815, PseudoVMFLE_VF64_M1 = 6816, PseudoVMFLE_VF64_M1_MASK = 6817, PseudoVMFLE_VF64_M2 = 6818, PseudoVMFLE_VF64_M2_MASK = 6819, PseudoVMFLE_VF64_M4 = 6820, PseudoVMFLE_VF64_M4_MASK = 6821, PseudoVMFLE_VF64_M8 = 6822, PseudoVMFLE_VF64_M8_MASK = 6823, PseudoVMFLE_VV_M1 = 6824, PseudoVMFLE_VV_M1_MASK = 6825, PseudoVMFLE_VV_M2 = 6826, PseudoVMFLE_VV_M2_MASK = 6827, PseudoVMFLE_VV_M4 = 6828, PseudoVMFLE_VV_M4_MASK = 6829, PseudoVMFLE_VV_M8 = 6830, PseudoVMFLE_VV_M8_MASK = 6831, PseudoVMFLE_VV_MF2 = 6832, PseudoVMFLE_VV_MF2_MASK = 6833, PseudoVMFLE_VV_MF4 = 6834, PseudoVMFLE_VV_MF4_MASK = 6835, PseudoVMFLT_VF16_M1 = 6836, PseudoVMFLT_VF16_M1_MASK = 6837, PseudoVMFLT_VF16_M2 = 6838, PseudoVMFLT_VF16_M2_MASK = 6839, PseudoVMFLT_VF16_M4 = 6840, PseudoVMFLT_VF16_M4_MASK = 6841, PseudoVMFLT_VF16_M8 = 6842, PseudoVMFLT_VF16_M8_MASK = 6843, PseudoVMFLT_VF16_MF2 = 6844, PseudoVMFLT_VF16_MF2_MASK = 6845, PseudoVMFLT_VF16_MF4 = 6846, PseudoVMFLT_VF16_MF4_MASK = 6847, PseudoVMFLT_VF32_M1 = 6848, PseudoVMFLT_VF32_M1_MASK = 6849, PseudoVMFLT_VF32_M2 = 6850, PseudoVMFLT_VF32_M2_MASK = 6851, PseudoVMFLT_VF32_M4 = 6852, PseudoVMFLT_VF32_M4_MASK = 6853, PseudoVMFLT_VF32_M8 = 6854, PseudoVMFLT_VF32_M8_MASK = 6855, PseudoVMFLT_VF32_MF2 = 6856, PseudoVMFLT_VF32_MF2_MASK = 6857, PseudoVMFLT_VF64_M1 = 6858, PseudoVMFLT_VF64_M1_MASK = 6859, PseudoVMFLT_VF64_M2 = 6860, PseudoVMFLT_VF64_M2_MASK = 6861, PseudoVMFLT_VF64_M4 = 6862, PseudoVMFLT_VF64_M4_MASK = 6863, PseudoVMFLT_VF64_M8 = 6864, PseudoVMFLT_VF64_M8_MASK = 6865, PseudoVMFLT_VV_M1 = 6866, PseudoVMFLT_VV_M1_MASK = 6867, PseudoVMFLT_VV_M2 = 6868, PseudoVMFLT_VV_M2_MASK = 6869, PseudoVMFLT_VV_M4 = 6870, PseudoVMFLT_VV_M4_MASK = 6871, PseudoVMFLT_VV_M8 = 6872, PseudoVMFLT_VV_M8_MASK = 6873, PseudoVMFLT_VV_MF2 = 6874, PseudoVMFLT_VV_MF2_MASK = 6875, PseudoVMFLT_VV_MF4 = 6876, PseudoVMFLT_VV_MF4_MASK = 6877, PseudoVMFNE_VF16_M1 = 6878, PseudoVMFNE_VF16_M1_MASK = 6879, PseudoVMFNE_VF16_M2 = 6880, PseudoVMFNE_VF16_M2_MASK = 6881, PseudoVMFNE_VF16_M4 = 6882, PseudoVMFNE_VF16_M4_MASK = 6883, PseudoVMFNE_VF16_M8 = 6884, PseudoVMFNE_VF16_M8_MASK = 6885, PseudoVMFNE_VF16_MF2 = 6886, PseudoVMFNE_VF16_MF2_MASK = 6887, PseudoVMFNE_VF16_MF4 = 6888, PseudoVMFNE_VF16_MF4_MASK = 6889, PseudoVMFNE_VF32_M1 = 6890, PseudoVMFNE_VF32_M1_MASK = 6891, PseudoVMFNE_VF32_M2 = 6892, PseudoVMFNE_VF32_M2_MASK = 6893, PseudoVMFNE_VF32_M4 = 6894, PseudoVMFNE_VF32_M4_MASK = 6895, PseudoVMFNE_VF32_M8 = 6896, PseudoVMFNE_VF32_M8_MASK = 6897, PseudoVMFNE_VF32_MF2 = 6898, PseudoVMFNE_VF32_MF2_MASK = 6899, PseudoVMFNE_VF64_M1 = 6900, PseudoVMFNE_VF64_M1_MASK = 6901, PseudoVMFNE_VF64_M2 = 6902, PseudoVMFNE_VF64_M2_MASK = 6903, PseudoVMFNE_VF64_M4 = 6904, PseudoVMFNE_VF64_M4_MASK = 6905, PseudoVMFNE_VF64_M8 = 6906, PseudoVMFNE_VF64_M8_MASK = 6907, PseudoVMFNE_VV_M1 = 6908, PseudoVMFNE_VV_M1_MASK = 6909, PseudoVMFNE_VV_M2 = 6910, PseudoVMFNE_VV_M2_MASK = 6911, PseudoVMFNE_VV_M4 = 6912, PseudoVMFNE_VV_M4_MASK = 6913, PseudoVMFNE_VV_M8 = 6914, PseudoVMFNE_VV_M8_MASK = 6915, PseudoVMFNE_VV_MF2 = 6916, PseudoVMFNE_VV_MF2_MASK = 6917, PseudoVMFNE_VV_MF4 = 6918, PseudoVMFNE_VV_MF4_MASK = 6919, PseudoVMINU_VV_M1 = 6920, PseudoVMINU_VV_M1_MASK = 6921, PseudoVMINU_VV_M1_TU = 6922, PseudoVMINU_VV_M2 = 6923, PseudoVMINU_VV_M2_MASK = 6924, PseudoVMINU_VV_M2_TU = 6925, PseudoVMINU_VV_M4 = 6926, PseudoVMINU_VV_M4_MASK = 6927, PseudoVMINU_VV_M4_TU = 6928, PseudoVMINU_VV_M8 = 6929, PseudoVMINU_VV_M8_MASK = 6930, PseudoVMINU_VV_M8_TU = 6931, PseudoVMINU_VV_MF2 = 6932, PseudoVMINU_VV_MF2_MASK = 6933, PseudoVMINU_VV_MF2_TU = 6934, PseudoVMINU_VV_MF4 = 6935, PseudoVMINU_VV_MF4_MASK = 6936, PseudoVMINU_VV_MF4_TU = 6937, PseudoVMINU_VV_MF8 = 6938, PseudoVMINU_VV_MF8_MASK = 6939, PseudoVMINU_VV_MF8_TU = 6940, PseudoVMINU_VX_M1 = 6941, PseudoVMINU_VX_M1_MASK = 6942, PseudoVMINU_VX_M1_TU = 6943, PseudoVMINU_VX_M2 = 6944, PseudoVMINU_VX_M2_MASK = 6945, PseudoVMINU_VX_M2_TU = 6946, PseudoVMINU_VX_M4 = 6947, PseudoVMINU_VX_M4_MASK = 6948, PseudoVMINU_VX_M4_TU = 6949, PseudoVMINU_VX_M8 = 6950, PseudoVMINU_VX_M8_MASK = 6951, PseudoVMINU_VX_M8_TU = 6952, PseudoVMINU_VX_MF2 = 6953, PseudoVMINU_VX_MF2_MASK = 6954, PseudoVMINU_VX_MF2_TU = 6955, PseudoVMINU_VX_MF4 = 6956, PseudoVMINU_VX_MF4_MASK = 6957, PseudoVMINU_VX_MF4_TU = 6958, PseudoVMINU_VX_MF8 = 6959, PseudoVMINU_VX_MF8_MASK = 6960, PseudoVMINU_VX_MF8_TU = 6961, PseudoVMIN_VV_M1 = 6962, PseudoVMIN_VV_M1_MASK = 6963, PseudoVMIN_VV_M1_TU = 6964, PseudoVMIN_VV_M2 = 6965, PseudoVMIN_VV_M2_MASK = 6966, PseudoVMIN_VV_M2_TU = 6967, PseudoVMIN_VV_M4 = 6968, PseudoVMIN_VV_M4_MASK = 6969, PseudoVMIN_VV_M4_TU = 6970, PseudoVMIN_VV_M8 = 6971, PseudoVMIN_VV_M8_MASK = 6972, PseudoVMIN_VV_M8_TU = 6973, PseudoVMIN_VV_MF2 = 6974, PseudoVMIN_VV_MF2_MASK = 6975, PseudoVMIN_VV_MF2_TU = 6976, PseudoVMIN_VV_MF4 = 6977, PseudoVMIN_VV_MF4_MASK = 6978, PseudoVMIN_VV_MF4_TU = 6979, PseudoVMIN_VV_MF8 = 6980, PseudoVMIN_VV_MF8_MASK = 6981, PseudoVMIN_VV_MF8_TU = 6982, PseudoVMIN_VX_M1 = 6983, PseudoVMIN_VX_M1_MASK = 6984, PseudoVMIN_VX_M1_TU = 6985, PseudoVMIN_VX_M2 = 6986, PseudoVMIN_VX_M2_MASK = 6987, PseudoVMIN_VX_M2_TU = 6988, PseudoVMIN_VX_M4 = 6989, PseudoVMIN_VX_M4_MASK = 6990, PseudoVMIN_VX_M4_TU = 6991, PseudoVMIN_VX_M8 = 6992, PseudoVMIN_VX_M8_MASK = 6993, PseudoVMIN_VX_M8_TU = 6994, PseudoVMIN_VX_MF2 = 6995, PseudoVMIN_VX_MF2_MASK = 6996, PseudoVMIN_VX_MF2_TU = 6997, PseudoVMIN_VX_MF4 = 6998, PseudoVMIN_VX_MF4_MASK = 6999, PseudoVMIN_VX_MF4_TU = 7000, PseudoVMIN_VX_MF8 = 7001, PseudoVMIN_VX_MF8_MASK = 7002, PseudoVMIN_VX_MF8_TU = 7003, PseudoVMNAND_MM_M1 = 7004, PseudoVMNAND_MM_M2 = 7005, PseudoVMNAND_MM_M4 = 7006, PseudoVMNAND_MM_M8 = 7007, PseudoVMNAND_MM_MF2 = 7008, PseudoVMNAND_MM_MF4 = 7009, PseudoVMNAND_MM_MF8 = 7010, PseudoVMNOR_MM_M1 = 7011, PseudoVMNOR_MM_M2 = 7012, PseudoVMNOR_MM_M4 = 7013, PseudoVMNOR_MM_M8 = 7014, PseudoVMNOR_MM_MF2 = 7015, PseudoVMNOR_MM_MF4 = 7016, PseudoVMNOR_MM_MF8 = 7017, PseudoVMORN_MM_M1 = 7018, PseudoVMORN_MM_M2 = 7019, PseudoVMORN_MM_M4 = 7020, PseudoVMORN_MM_M8 = 7021, PseudoVMORN_MM_MF2 = 7022, PseudoVMORN_MM_MF4 = 7023, PseudoVMORN_MM_MF8 = 7024, PseudoVMOR_MM_M1 = 7025, PseudoVMOR_MM_M2 = 7026, PseudoVMOR_MM_M4 = 7027, PseudoVMOR_MM_M8 = 7028, PseudoVMOR_MM_MF2 = 7029, PseudoVMOR_MM_MF4 = 7030, PseudoVMOR_MM_MF8 = 7031, PseudoVMSBC_VVM_M1 = 7032, PseudoVMSBC_VVM_M2 = 7033, PseudoVMSBC_VVM_M4 = 7034, PseudoVMSBC_VVM_M8 = 7035, PseudoVMSBC_VVM_MF2 = 7036, PseudoVMSBC_VVM_MF4 = 7037, PseudoVMSBC_VVM_MF8 = 7038, PseudoVMSBC_VV_M1 = 7039, PseudoVMSBC_VV_M2 = 7040, PseudoVMSBC_VV_M4 = 7041, PseudoVMSBC_VV_M8 = 7042, PseudoVMSBC_VV_MF2 = 7043, PseudoVMSBC_VV_MF4 = 7044, PseudoVMSBC_VV_MF8 = 7045, PseudoVMSBC_VXM_M1 = 7046, PseudoVMSBC_VXM_M2 = 7047, PseudoVMSBC_VXM_M4 = 7048, PseudoVMSBC_VXM_M8 = 7049, PseudoVMSBC_VXM_MF2 = 7050, PseudoVMSBC_VXM_MF4 = 7051, PseudoVMSBC_VXM_MF8 = 7052, PseudoVMSBC_VX_M1 = 7053, PseudoVMSBC_VX_M2 = 7054, PseudoVMSBC_VX_M4 = 7055, PseudoVMSBC_VX_M8 = 7056, PseudoVMSBC_VX_MF2 = 7057, PseudoVMSBC_VX_MF4 = 7058, PseudoVMSBC_VX_MF8 = 7059, PseudoVMSBF_M_B1 = 7060, PseudoVMSBF_M_B16 = 7061, PseudoVMSBF_M_B16_MASK = 7062, PseudoVMSBF_M_B1_MASK = 7063, PseudoVMSBF_M_B2 = 7064, PseudoVMSBF_M_B2_MASK = 7065, PseudoVMSBF_M_B32 = 7066, PseudoVMSBF_M_B32_MASK = 7067, PseudoVMSBF_M_B4 = 7068, PseudoVMSBF_M_B4_MASK = 7069, PseudoVMSBF_M_B64 = 7070, PseudoVMSBF_M_B64_MASK = 7071, PseudoVMSBF_M_B8 = 7072, PseudoVMSBF_M_B8_MASK = 7073, PseudoVMSEQ_VI_M1 = 7074, PseudoVMSEQ_VI_M1_MASK = 7075, PseudoVMSEQ_VI_M2 = 7076, PseudoVMSEQ_VI_M2_MASK = 7077, PseudoVMSEQ_VI_M4 = 7078, PseudoVMSEQ_VI_M4_MASK = 7079, PseudoVMSEQ_VI_M8 = 7080, PseudoVMSEQ_VI_M8_MASK = 7081, PseudoVMSEQ_VI_MF2 = 7082, PseudoVMSEQ_VI_MF2_MASK = 7083, PseudoVMSEQ_VI_MF4 = 7084, PseudoVMSEQ_VI_MF4_MASK = 7085, PseudoVMSEQ_VI_MF8 = 7086, PseudoVMSEQ_VI_MF8_MASK = 7087, PseudoVMSEQ_VV_M1 = 7088, PseudoVMSEQ_VV_M1_MASK = 7089, PseudoVMSEQ_VV_M2 = 7090, PseudoVMSEQ_VV_M2_MASK = 7091, PseudoVMSEQ_VV_M4 = 7092, PseudoVMSEQ_VV_M4_MASK = 7093, PseudoVMSEQ_VV_M8 = 7094, PseudoVMSEQ_VV_M8_MASK = 7095, PseudoVMSEQ_VV_MF2 = 7096, PseudoVMSEQ_VV_MF2_MASK = 7097, PseudoVMSEQ_VV_MF4 = 7098, PseudoVMSEQ_VV_MF4_MASK = 7099, PseudoVMSEQ_VV_MF8 = 7100, PseudoVMSEQ_VV_MF8_MASK = 7101, PseudoVMSEQ_VX_M1 = 7102, PseudoVMSEQ_VX_M1_MASK = 7103, PseudoVMSEQ_VX_M2 = 7104, PseudoVMSEQ_VX_M2_MASK = 7105, PseudoVMSEQ_VX_M4 = 7106, PseudoVMSEQ_VX_M4_MASK = 7107, PseudoVMSEQ_VX_M8 = 7108, PseudoVMSEQ_VX_M8_MASK = 7109, PseudoVMSEQ_VX_MF2 = 7110, PseudoVMSEQ_VX_MF2_MASK = 7111, PseudoVMSEQ_VX_MF4 = 7112, PseudoVMSEQ_VX_MF4_MASK = 7113, PseudoVMSEQ_VX_MF8 = 7114, PseudoVMSEQ_VX_MF8_MASK = 7115, PseudoVMSET_M_B1 = 7116, PseudoVMSET_M_B16 = 7117, PseudoVMSET_M_B2 = 7118, PseudoVMSET_M_B32 = 7119, PseudoVMSET_M_B4 = 7120, PseudoVMSET_M_B64 = 7121, PseudoVMSET_M_B8 = 7122, PseudoVMSGEU_VI = 7123, PseudoVMSGEU_VX = 7124, PseudoVMSGEU_VX_M = 7125, PseudoVMSGEU_VX_M_T = 7126, PseudoVMSGE_VI = 7127, PseudoVMSGE_VX = 7128, PseudoVMSGE_VX_M = 7129, PseudoVMSGE_VX_M_T = 7130, PseudoVMSGTU_VI_M1 = 7131, PseudoVMSGTU_VI_M1_MASK = 7132, PseudoVMSGTU_VI_M2 = 7133, PseudoVMSGTU_VI_M2_MASK = 7134, PseudoVMSGTU_VI_M4 = 7135, PseudoVMSGTU_VI_M4_MASK = 7136, PseudoVMSGTU_VI_M8 = 7137, PseudoVMSGTU_VI_M8_MASK = 7138, PseudoVMSGTU_VI_MF2 = 7139, PseudoVMSGTU_VI_MF2_MASK = 7140, PseudoVMSGTU_VI_MF4 = 7141, PseudoVMSGTU_VI_MF4_MASK = 7142, PseudoVMSGTU_VI_MF8 = 7143, PseudoVMSGTU_VI_MF8_MASK = 7144, PseudoVMSGTU_VX_M1 = 7145, PseudoVMSGTU_VX_M1_MASK = 7146, PseudoVMSGTU_VX_M2 = 7147, PseudoVMSGTU_VX_M2_MASK = 7148, PseudoVMSGTU_VX_M4 = 7149, PseudoVMSGTU_VX_M4_MASK = 7150, PseudoVMSGTU_VX_M8 = 7151, PseudoVMSGTU_VX_M8_MASK = 7152, PseudoVMSGTU_VX_MF2 = 7153, PseudoVMSGTU_VX_MF2_MASK = 7154, PseudoVMSGTU_VX_MF4 = 7155, PseudoVMSGTU_VX_MF4_MASK = 7156, PseudoVMSGTU_VX_MF8 = 7157, PseudoVMSGTU_VX_MF8_MASK = 7158, PseudoVMSGT_VI_M1 = 7159, PseudoVMSGT_VI_M1_MASK = 7160, PseudoVMSGT_VI_M2 = 7161, PseudoVMSGT_VI_M2_MASK = 7162, PseudoVMSGT_VI_M4 = 7163, PseudoVMSGT_VI_M4_MASK = 7164, PseudoVMSGT_VI_M8 = 7165, PseudoVMSGT_VI_M8_MASK = 7166, PseudoVMSGT_VI_MF2 = 7167, PseudoVMSGT_VI_MF2_MASK = 7168, PseudoVMSGT_VI_MF4 = 7169, PseudoVMSGT_VI_MF4_MASK = 7170, PseudoVMSGT_VI_MF8 = 7171, PseudoVMSGT_VI_MF8_MASK = 7172, PseudoVMSGT_VX_M1 = 7173, PseudoVMSGT_VX_M1_MASK = 7174, PseudoVMSGT_VX_M2 = 7175, PseudoVMSGT_VX_M2_MASK = 7176, PseudoVMSGT_VX_M4 = 7177, PseudoVMSGT_VX_M4_MASK = 7178, PseudoVMSGT_VX_M8 = 7179, PseudoVMSGT_VX_M8_MASK = 7180, PseudoVMSGT_VX_MF2 = 7181, PseudoVMSGT_VX_MF2_MASK = 7182, PseudoVMSGT_VX_MF4 = 7183, PseudoVMSGT_VX_MF4_MASK = 7184, PseudoVMSGT_VX_MF8 = 7185, PseudoVMSGT_VX_MF8_MASK = 7186, PseudoVMSIF_M_B1 = 7187, PseudoVMSIF_M_B16 = 7188, PseudoVMSIF_M_B16_MASK = 7189, PseudoVMSIF_M_B1_MASK = 7190, PseudoVMSIF_M_B2 = 7191, PseudoVMSIF_M_B2_MASK = 7192, PseudoVMSIF_M_B32 = 7193, PseudoVMSIF_M_B32_MASK = 7194, PseudoVMSIF_M_B4 = 7195, PseudoVMSIF_M_B4_MASK = 7196, PseudoVMSIF_M_B64 = 7197, PseudoVMSIF_M_B64_MASK = 7198, PseudoVMSIF_M_B8 = 7199, PseudoVMSIF_M_B8_MASK = 7200, PseudoVMSLEU_VI_M1 = 7201, PseudoVMSLEU_VI_M1_MASK = 7202, PseudoVMSLEU_VI_M2 = 7203, PseudoVMSLEU_VI_M2_MASK = 7204, PseudoVMSLEU_VI_M4 = 7205, PseudoVMSLEU_VI_M4_MASK = 7206, PseudoVMSLEU_VI_M8 = 7207, PseudoVMSLEU_VI_M8_MASK = 7208, PseudoVMSLEU_VI_MF2 = 7209, PseudoVMSLEU_VI_MF2_MASK = 7210, PseudoVMSLEU_VI_MF4 = 7211, PseudoVMSLEU_VI_MF4_MASK = 7212, PseudoVMSLEU_VI_MF8 = 7213, PseudoVMSLEU_VI_MF8_MASK = 7214, PseudoVMSLEU_VV_M1 = 7215, PseudoVMSLEU_VV_M1_MASK = 7216, PseudoVMSLEU_VV_M2 = 7217, PseudoVMSLEU_VV_M2_MASK = 7218, PseudoVMSLEU_VV_M4 = 7219, PseudoVMSLEU_VV_M4_MASK = 7220, PseudoVMSLEU_VV_M8 = 7221, PseudoVMSLEU_VV_M8_MASK = 7222, PseudoVMSLEU_VV_MF2 = 7223, PseudoVMSLEU_VV_MF2_MASK = 7224, PseudoVMSLEU_VV_MF4 = 7225, PseudoVMSLEU_VV_MF4_MASK = 7226, PseudoVMSLEU_VV_MF8 = 7227, PseudoVMSLEU_VV_MF8_MASK = 7228, PseudoVMSLEU_VX_M1 = 7229, PseudoVMSLEU_VX_M1_MASK = 7230, PseudoVMSLEU_VX_M2 = 7231, PseudoVMSLEU_VX_M2_MASK = 7232, PseudoVMSLEU_VX_M4 = 7233, PseudoVMSLEU_VX_M4_MASK = 7234, PseudoVMSLEU_VX_M8 = 7235, PseudoVMSLEU_VX_M8_MASK = 7236, PseudoVMSLEU_VX_MF2 = 7237, PseudoVMSLEU_VX_MF2_MASK = 7238, PseudoVMSLEU_VX_MF4 = 7239, PseudoVMSLEU_VX_MF4_MASK = 7240, PseudoVMSLEU_VX_MF8 = 7241, PseudoVMSLEU_VX_MF8_MASK = 7242, PseudoVMSLE_VI_M1 = 7243, PseudoVMSLE_VI_M1_MASK = 7244, PseudoVMSLE_VI_M2 = 7245, PseudoVMSLE_VI_M2_MASK = 7246, PseudoVMSLE_VI_M4 = 7247, PseudoVMSLE_VI_M4_MASK = 7248, PseudoVMSLE_VI_M8 = 7249, PseudoVMSLE_VI_M8_MASK = 7250, PseudoVMSLE_VI_MF2 = 7251, PseudoVMSLE_VI_MF2_MASK = 7252, PseudoVMSLE_VI_MF4 = 7253, PseudoVMSLE_VI_MF4_MASK = 7254, PseudoVMSLE_VI_MF8 = 7255, PseudoVMSLE_VI_MF8_MASK = 7256, PseudoVMSLE_VV_M1 = 7257, PseudoVMSLE_VV_M1_MASK = 7258, PseudoVMSLE_VV_M2 = 7259, PseudoVMSLE_VV_M2_MASK = 7260, PseudoVMSLE_VV_M4 = 7261, PseudoVMSLE_VV_M4_MASK = 7262, PseudoVMSLE_VV_M8 = 7263, PseudoVMSLE_VV_M8_MASK = 7264, PseudoVMSLE_VV_MF2 = 7265, PseudoVMSLE_VV_MF2_MASK = 7266, PseudoVMSLE_VV_MF4 = 7267, PseudoVMSLE_VV_MF4_MASK = 7268, PseudoVMSLE_VV_MF8 = 7269, PseudoVMSLE_VV_MF8_MASK = 7270, PseudoVMSLE_VX_M1 = 7271, PseudoVMSLE_VX_M1_MASK = 7272, PseudoVMSLE_VX_M2 = 7273, PseudoVMSLE_VX_M2_MASK = 7274, PseudoVMSLE_VX_M4 = 7275, PseudoVMSLE_VX_M4_MASK = 7276, PseudoVMSLE_VX_M8 = 7277, PseudoVMSLE_VX_M8_MASK = 7278, PseudoVMSLE_VX_MF2 = 7279, PseudoVMSLE_VX_MF2_MASK = 7280, PseudoVMSLE_VX_MF4 = 7281, PseudoVMSLE_VX_MF4_MASK = 7282, PseudoVMSLE_VX_MF8 = 7283, PseudoVMSLE_VX_MF8_MASK = 7284, PseudoVMSLTU_VI = 7285, PseudoVMSLTU_VV_M1 = 7286, PseudoVMSLTU_VV_M1_MASK = 7287, PseudoVMSLTU_VV_M2 = 7288, PseudoVMSLTU_VV_M2_MASK = 7289, PseudoVMSLTU_VV_M4 = 7290, PseudoVMSLTU_VV_M4_MASK = 7291, PseudoVMSLTU_VV_M8 = 7292, PseudoVMSLTU_VV_M8_MASK = 7293, PseudoVMSLTU_VV_MF2 = 7294, PseudoVMSLTU_VV_MF2_MASK = 7295, PseudoVMSLTU_VV_MF4 = 7296, PseudoVMSLTU_VV_MF4_MASK = 7297, PseudoVMSLTU_VV_MF8 = 7298, PseudoVMSLTU_VV_MF8_MASK = 7299, PseudoVMSLTU_VX_M1 = 7300, PseudoVMSLTU_VX_M1_MASK = 7301, PseudoVMSLTU_VX_M2 = 7302, PseudoVMSLTU_VX_M2_MASK = 7303, PseudoVMSLTU_VX_M4 = 7304, PseudoVMSLTU_VX_M4_MASK = 7305, PseudoVMSLTU_VX_M8 = 7306, PseudoVMSLTU_VX_M8_MASK = 7307, PseudoVMSLTU_VX_MF2 = 7308, PseudoVMSLTU_VX_MF2_MASK = 7309, PseudoVMSLTU_VX_MF4 = 7310, PseudoVMSLTU_VX_MF4_MASK = 7311, PseudoVMSLTU_VX_MF8 = 7312, PseudoVMSLTU_VX_MF8_MASK = 7313, PseudoVMSLT_VI = 7314, PseudoVMSLT_VV_M1 = 7315, PseudoVMSLT_VV_M1_MASK = 7316, PseudoVMSLT_VV_M2 = 7317, PseudoVMSLT_VV_M2_MASK = 7318, PseudoVMSLT_VV_M4 = 7319, PseudoVMSLT_VV_M4_MASK = 7320, PseudoVMSLT_VV_M8 = 7321, PseudoVMSLT_VV_M8_MASK = 7322, PseudoVMSLT_VV_MF2 = 7323, PseudoVMSLT_VV_MF2_MASK = 7324, PseudoVMSLT_VV_MF4 = 7325, PseudoVMSLT_VV_MF4_MASK = 7326, PseudoVMSLT_VV_MF8 = 7327, PseudoVMSLT_VV_MF8_MASK = 7328, PseudoVMSLT_VX_M1 = 7329, PseudoVMSLT_VX_M1_MASK = 7330, PseudoVMSLT_VX_M2 = 7331, PseudoVMSLT_VX_M2_MASK = 7332, PseudoVMSLT_VX_M4 = 7333, PseudoVMSLT_VX_M4_MASK = 7334, PseudoVMSLT_VX_M8 = 7335, PseudoVMSLT_VX_M8_MASK = 7336, PseudoVMSLT_VX_MF2 = 7337, PseudoVMSLT_VX_MF2_MASK = 7338, PseudoVMSLT_VX_MF4 = 7339, PseudoVMSLT_VX_MF4_MASK = 7340, PseudoVMSLT_VX_MF8 = 7341, PseudoVMSLT_VX_MF8_MASK = 7342, PseudoVMSNE_VI_M1 = 7343, PseudoVMSNE_VI_M1_MASK = 7344, PseudoVMSNE_VI_M2 = 7345, PseudoVMSNE_VI_M2_MASK = 7346, PseudoVMSNE_VI_M4 = 7347, PseudoVMSNE_VI_M4_MASK = 7348, PseudoVMSNE_VI_M8 = 7349, PseudoVMSNE_VI_M8_MASK = 7350, PseudoVMSNE_VI_MF2 = 7351, PseudoVMSNE_VI_MF2_MASK = 7352, PseudoVMSNE_VI_MF4 = 7353, PseudoVMSNE_VI_MF4_MASK = 7354, PseudoVMSNE_VI_MF8 = 7355, PseudoVMSNE_VI_MF8_MASK = 7356, PseudoVMSNE_VV_M1 = 7357, PseudoVMSNE_VV_M1_MASK = 7358, PseudoVMSNE_VV_M2 = 7359, PseudoVMSNE_VV_M2_MASK = 7360, PseudoVMSNE_VV_M4 = 7361, PseudoVMSNE_VV_M4_MASK = 7362, PseudoVMSNE_VV_M8 = 7363, PseudoVMSNE_VV_M8_MASK = 7364, PseudoVMSNE_VV_MF2 = 7365, PseudoVMSNE_VV_MF2_MASK = 7366, PseudoVMSNE_VV_MF4 = 7367, PseudoVMSNE_VV_MF4_MASK = 7368, PseudoVMSNE_VV_MF8 = 7369, PseudoVMSNE_VV_MF8_MASK = 7370, PseudoVMSNE_VX_M1 = 7371, PseudoVMSNE_VX_M1_MASK = 7372, PseudoVMSNE_VX_M2 = 7373, PseudoVMSNE_VX_M2_MASK = 7374, PseudoVMSNE_VX_M4 = 7375, PseudoVMSNE_VX_M4_MASK = 7376, PseudoVMSNE_VX_M8 = 7377, PseudoVMSNE_VX_M8_MASK = 7378, PseudoVMSNE_VX_MF2 = 7379, PseudoVMSNE_VX_MF2_MASK = 7380, PseudoVMSNE_VX_MF4 = 7381, PseudoVMSNE_VX_MF4_MASK = 7382, PseudoVMSNE_VX_MF8 = 7383, PseudoVMSNE_VX_MF8_MASK = 7384, PseudoVMSOF_M_B1 = 7385, PseudoVMSOF_M_B16 = 7386, PseudoVMSOF_M_B16_MASK = 7387, PseudoVMSOF_M_B1_MASK = 7388, PseudoVMSOF_M_B2 = 7389, PseudoVMSOF_M_B2_MASK = 7390, PseudoVMSOF_M_B32 = 7391, PseudoVMSOF_M_B32_MASK = 7392, PseudoVMSOF_M_B4 = 7393, PseudoVMSOF_M_B4_MASK = 7394, PseudoVMSOF_M_B64 = 7395, PseudoVMSOF_M_B64_MASK = 7396, PseudoVMSOF_M_B8 = 7397, PseudoVMSOF_M_B8_MASK = 7398, PseudoVMULHSU_VV_M1 = 7399, PseudoVMULHSU_VV_M1_MASK = 7400, PseudoVMULHSU_VV_M1_TU = 7401, PseudoVMULHSU_VV_M2 = 7402, PseudoVMULHSU_VV_M2_MASK = 7403, PseudoVMULHSU_VV_M2_TU = 7404, PseudoVMULHSU_VV_M4 = 7405, PseudoVMULHSU_VV_M4_MASK = 7406, PseudoVMULHSU_VV_M4_TU = 7407, PseudoVMULHSU_VV_M8 = 7408, PseudoVMULHSU_VV_M8_MASK = 7409, PseudoVMULHSU_VV_M8_TU = 7410, PseudoVMULHSU_VV_MF2 = 7411, PseudoVMULHSU_VV_MF2_MASK = 7412, PseudoVMULHSU_VV_MF2_TU = 7413, PseudoVMULHSU_VV_MF4 = 7414, PseudoVMULHSU_VV_MF4_MASK = 7415, PseudoVMULHSU_VV_MF4_TU = 7416, PseudoVMULHSU_VV_MF8 = 7417, PseudoVMULHSU_VV_MF8_MASK = 7418, PseudoVMULHSU_VV_MF8_TU = 7419, PseudoVMULHSU_VX_M1 = 7420, PseudoVMULHSU_VX_M1_MASK = 7421, PseudoVMULHSU_VX_M1_TU = 7422, PseudoVMULHSU_VX_M2 = 7423, PseudoVMULHSU_VX_M2_MASK = 7424, PseudoVMULHSU_VX_M2_TU = 7425, PseudoVMULHSU_VX_M4 = 7426, PseudoVMULHSU_VX_M4_MASK = 7427, PseudoVMULHSU_VX_M4_TU = 7428, PseudoVMULHSU_VX_M8 = 7429, PseudoVMULHSU_VX_M8_MASK = 7430, PseudoVMULHSU_VX_M8_TU = 7431, PseudoVMULHSU_VX_MF2 = 7432, PseudoVMULHSU_VX_MF2_MASK = 7433, PseudoVMULHSU_VX_MF2_TU = 7434, PseudoVMULHSU_VX_MF4 = 7435, PseudoVMULHSU_VX_MF4_MASK = 7436, PseudoVMULHSU_VX_MF4_TU = 7437, PseudoVMULHSU_VX_MF8 = 7438, PseudoVMULHSU_VX_MF8_MASK = 7439, PseudoVMULHSU_VX_MF8_TU = 7440, PseudoVMULHU_VV_M1 = 7441, PseudoVMULHU_VV_M1_MASK = 7442, PseudoVMULHU_VV_M1_TU = 7443, PseudoVMULHU_VV_M2 = 7444, PseudoVMULHU_VV_M2_MASK = 7445, PseudoVMULHU_VV_M2_TU = 7446, PseudoVMULHU_VV_M4 = 7447, PseudoVMULHU_VV_M4_MASK = 7448, PseudoVMULHU_VV_M4_TU = 7449, PseudoVMULHU_VV_M8 = 7450, PseudoVMULHU_VV_M8_MASK = 7451, PseudoVMULHU_VV_M8_TU = 7452, PseudoVMULHU_VV_MF2 = 7453, PseudoVMULHU_VV_MF2_MASK = 7454, PseudoVMULHU_VV_MF2_TU = 7455, PseudoVMULHU_VV_MF4 = 7456, PseudoVMULHU_VV_MF4_MASK = 7457, PseudoVMULHU_VV_MF4_TU = 7458, PseudoVMULHU_VV_MF8 = 7459, PseudoVMULHU_VV_MF8_MASK = 7460, PseudoVMULHU_VV_MF8_TU = 7461, PseudoVMULHU_VX_M1 = 7462, PseudoVMULHU_VX_M1_MASK = 7463, PseudoVMULHU_VX_M1_TU = 7464, PseudoVMULHU_VX_M2 = 7465, PseudoVMULHU_VX_M2_MASK = 7466, PseudoVMULHU_VX_M2_TU = 7467, PseudoVMULHU_VX_M4 = 7468, PseudoVMULHU_VX_M4_MASK = 7469, PseudoVMULHU_VX_M4_TU = 7470, PseudoVMULHU_VX_M8 = 7471, PseudoVMULHU_VX_M8_MASK = 7472, PseudoVMULHU_VX_M8_TU = 7473, PseudoVMULHU_VX_MF2 = 7474, PseudoVMULHU_VX_MF2_MASK = 7475, PseudoVMULHU_VX_MF2_TU = 7476, PseudoVMULHU_VX_MF4 = 7477, PseudoVMULHU_VX_MF4_MASK = 7478, PseudoVMULHU_VX_MF4_TU = 7479, PseudoVMULHU_VX_MF8 = 7480, PseudoVMULHU_VX_MF8_MASK = 7481, PseudoVMULHU_VX_MF8_TU = 7482, PseudoVMULH_VV_M1 = 7483, PseudoVMULH_VV_M1_MASK = 7484, PseudoVMULH_VV_M1_TU = 7485, PseudoVMULH_VV_M2 = 7486, PseudoVMULH_VV_M2_MASK = 7487, PseudoVMULH_VV_M2_TU = 7488, PseudoVMULH_VV_M4 = 7489, PseudoVMULH_VV_M4_MASK = 7490, PseudoVMULH_VV_M4_TU = 7491, PseudoVMULH_VV_M8 = 7492, PseudoVMULH_VV_M8_MASK = 7493, PseudoVMULH_VV_M8_TU = 7494, PseudoVMULH_VV_MF2 = 7495, PseudoVMULH_VV_MF2_MASK = 7496, PseudoVMULH_VV_MF2_TU = 7497, PseudoVMULH_VV_MF4 = 7498, PseudoVMULH_VV_MF4_MASK = 7499, PseudoVMULH_VV_MF4_TU = 7500, PseudoVMULH_VV_MF8 = 7501, PseudoVMULH_VV_MF8_MASK = 7502, PseudoVMULH_VV_MF8_TU = 7503, PseudoVMULH_VX_M1 = 7504, PseudoVMULH_VX_M1_MASK = 7505, PseudoVMULH_VX_M1_TU = 7506, PseudoVMULH_VX_M2 = 7507, PseudoVMULH_VX_M2_MASK = 7508, PseudoVMULH_VX_M2_TU = 7509, PseudoVMULH_VX_M4 = 7510, PseudoVMULH_VX_M4_MASK = 7511, PseudoVMULH_VX_M4_TU = 7512, PseudoVMULH_VX_M8 = 7513, PseudoVMULH_VX_M8_MASK = 7514, PseudoVMULH_VX_M8_TU = 7515, PseudoVMULH_VX_MF2 = 7516, PseudoVMULH_VX_MF2_MASK = 7517, PseudoVMULH_VX_MF2_TU = 7518, PseudoVMULH_VX_MF4 = 7519, PseudoVMULH_VX_MF4_MASK = 7520, PseudoVMULH_VX_MF4_TU = 7521, PseudoVMULH_VX_MF8 = 7522, PseudoVMULH_VX_MF8_MASK = 7523, PseudoVMULH_VX_MF8_TU = 7524, PseudoVMUL_VV_M1 = 7525, PseudoVMUL_VV_M1_MASK = 7526, PseudoVMUL_VV_M1_TU = 7527, PseudoVMUL_VV_M2 = 7528, PseudoVMUL_VV_M2_MASK = 7529, PseudoVMUL_VV_M2_TU = 7530, PseudoVMUL_VV_M4 = 7531, PseudoVMUL_VV_M4_MASK = 7532, PseudoVMUL_VV_M4_TU = 7533, PseudoVMUL_VV_M8 = 7534, PseudoVMUL_VV_M8_MASK = 7535, PseudoVMUL_VV_M8_TU = 7536, PseudoVMUL_VV_MF2 = 7537, PseudoVMUL_VV_MF2_MASK = 7538, PseudoVMUL_VV_MF2_TU = 7539, PseudoVMUL_VV_MF4 = 7540, PseudoVMUL_VV_MF4_MASK = 7541, PseudoVMUL_VV_MF4_TU = 7542, PseudoVMUL_VV_MF8 = 7543, PseudoVMUL_VV_MF8_MASK = 7544, PseudoVMUL_VV_MF8_TU = 7545, PseudoVMUL_VX_M1 = 7546, PseudoVMUL_VX_M1_MASK = 7547, PseudoVMUL_VX_M1_TU = 7548, PseudoVMUL_VX_M2 = 7549, PseudoVMUL_VX_M2_MASK = 7550, PseudoVMUL_VX_M2_TU = 7551, PseudoVMUL_VX_M4 = 7552, PseudoVMUL_VX_M4_MASK = 7553, PseudoVMUL_VX_M4_TU = 7554, PseudoVMUL_VX_M8 = 7555, PseudoVMUL_VX_M8_MASK = 7556, PseudoVMUL_VX_M8_TU = 7557, PseudoVMUL_VX_MF2 = 7558, PseudoVMUL_VX_MF2_MASK = 7559, PseudoVMUL_VX_MF2_TU = 7560, PseudoVMUL_VX_MF4 = 7561, PseudoVMUL_VX_MF4_MASK = 7562, PseudoVMUL_VX_MF4_TU = 7563, PseudoVMUL_VX_MF8 = 7564, PseudoVMUL_VX_MF8_MASK = 7565, PseudoVMUL_VX_MF8_TU = 7566, PseudoVMV_S_X_M1 = 7567, PseudoVMV_S_X_M2 = 7568, PseudoVMV_S_X_M4 = 7569, PseudoVMV_S_X_M8 = 7570, PseudoVMV_S_X_MF2 = 7571, PseudoVMV_S_X_MF4 = 7572, PseudoVMV_S_X_MF8 = 7573, PseudoVMV_V_I_M1 = 7574, PseudoVMV_V_I_M1_TU = 7575, PseudoVMV_V_I_M2 = 7576, PseudoVMV_V_I_M2_TU = 7577, PseudoVMV_V_I_M4 = 7578, PseudoVMV_V_I_M4_TU = 7579, PseudoVMV_V_I_M8 = 7580, PseudoVMV_V_I_M8_TU = 7581, PseudoVMV_V_I_MF2 = 7582, PseudoVMV_V_I_MF2_TU = 7583, PseudoVMV_V_I_MF4 = 7584, PseudoVMV_V_I_MF4_TU = 7585, PseudoVMV_V_I_MF8 = 7586, PseudoVMV_V_I_MF8_TU = 7587, PseudoVMV_V_V_M1 = 7588, PseudoVMV_V_V_M1_TU = 7589, PseudoVMV_V_V_M2 = 7590, PseudoVMV_V_V_M2_TU = 7591, PseudoVMV_V_V_M4 = 7592, PseudoVMV_V_V_M4_TU = 7593, PseudoVMV_V_V_M8 = 7594, PseudoVMV_V_V_M8_TU = 7595, PseudoVMV_V_V_MF2 = 7596, PseudoVMV_V_V_MF2_TU = 7597, PseudoVMV_V_V_MF4 = 7598, PseudoVMV_V_V_MF4_TU = 7599, PseudoVMV_V_V_MF8 = 7600, PseudoVMV_V_V_MF8_TU = 7601, PseudoVMV_V_X_M1 = 7602, PseudoVMV_V_X_M1_TU = 7603, PseudoVMV_V_X_M2 = 7604, PseudoVMV_V_X_M2_TU = 7605, PseudoVMV_V_X_M4 = 7606, PseudoVMV_V_X_M4_TU = 7607, PseudoVMV_V_X_M8 = 7608, PseudoVMV_V_X_M8_TU = 7609, PseudoVMV_V_X_MF2 = 7610, PseudoVMV_V_X_MF2_TU = 7611, PseudoVMV_V_X_MF4 = 7612, PseudoVMV_V_X_MF4_TU = 7613, PseudoVMV_V_X_MF8 = 7614, PseudoVMV_V_X_MF8_TU = 7615, PseudoVMV_X_S_M1 = 7616, PseudoVMV_X_S_M2 = 7617, PseudoVMV_X_S_M4 = 7618, PseudoVMV_X_S_M8 = 7619, PseudoVMV_X_S_MF2 = 7620, PseudoVMV_X_S_MF4 = 7621, PseudoVMV_X_S_MF8 = 7622, PseudoVMXNOR_MM_M1 = 7623, PseudoVMXNOR_MM_M2 = 7624, PseudoVMXNOR_MM_M4 = 7625, PseudoVMXNOR_MM_M8 = 7626, PseudoVMXNOR_MM_MF2 = 7627, PseudoVMXNOR_MM_MF4 = 7628, PseudoVMXNOR_MM_MF8 = 7629, PseudoVMXOR_MM_M1 = 7630, PseudoVMXOR_MM_M2 = 7631, PseudoVMXOR_MM_M4 = 7632, PseudoVMXOR_MM_M8 = 7633, PseudoVMXOR_MM_MF2 = 7634, PseudoVMXOR_MM_MF4 = 7635, PseudoVMXOR_MM_MF8 = 7636, PseudoVNCLIPU_WI_M1 = 7637, PseudoVNCLIPU_WI_M1_MASK = 7638, PseudoVNCLIPU_WI_M1_TU = 7639, PseudoVNCLIPU_WI_M2 = 7640, PseudoVNCLIPU_WI_M2_MASK = 7641, PseudoVNCLIPU_WI_M2_TU = 7642, PseudoVNCLIPU_WI_M4 = 7643, PseudoVNCLIPU_WI_M4_MASK = 7644, PseudoVNCLIPU_WI_M4_TU = 7645, PseudoVNCLIPU_WI_MF2 = 7646, PseudoVNCLIPU_WI_MF2_MASK = 7647, PseudoVNCLIPU_WI_MF2_TU = 7648, PseudoVNCLIPU_WI_MF4 = 7649, PseudoVNCLIPU_WI_MF4_MASK = 7650, PseudoVNCLIPU_WI_MF4_TU = 7651, PseudoVNCLIPU_WI_MF8 = 7652, PseudoVNCLIPU_WI_MF8_MASK = 7653, PseudoVNCLIPU_WI_MF8_TU = 7654, PseudoVNCLIPU_WV_M1 = 7655, PseudoVNCLIPU_WV_M1_MASK = 7656, PseudoVNCLIPU_WV_M1_TU = 7657, PseudoVNCLIPU_WV_M2 = 7658, PseudoVNCLIPU_WV_M2_MASK = 7659, PseudoVNCLIPU_WV_M2_TU = 7660, PseudoVNCLIPU_WV_M4 = 7661, PseudoVNCLIPU_WV_M4_MASK = 7662, PseudoVNCLIPU_WV_M4_TU = 7663, PseudoVNCLIPU_WV_MF2 = 7664, PseudoVNCLIPU_WV_MF2_MASK = 7665, PseudoVNCLIPU_WV_MF2_TU = 7666, PseudoVNCLIPU_WV_MF4 = 7667, PseudoVNCLIPU_WV_MF4_MASK = 7668, PseudoVNCLIPU_WV_MF4_TU = 7669, PseudoVNCLIPU_WV_MF8 = 7670, PseudoVNCLIPU_WV_MF8_MASK = 7671, PseudoVNCLIPU_WV_MF8_TU = 7672, PseudoVNCLIPU_WX_M1 = 7673, PseudoVNCLIPU_WX_M1_MASK = 7674, PseudoVNCLIPU_WX_M1_TU = 7675, PseudoVNCLIPU_WX_M2 = 7676, PseudoVNCLIPU_WX_M2_MASK = 7677, PseudoVNCLIPU_WX_M2_TU = 7678, PseudoVNCLIPU_WX_M4 = 7679, PseudoVNCLIPU_WX_M4_MASK = 7680, PseudoVNCLIPU_WX_M4_TU = 7681, PseudoVNCLIPU_WX_MF2 = 7682, PseudoVNCLIPU_WX_MF2_MASK = 7683, PseudoVNCLIPU_WX_MF2_TU = 7684, PseudoVNCLIPU_WX_MF4 = 7685, PseudoVNCLIPU_WX_MF4_MASK = 7686, PseudoVNCLIPU_WX_MF4_TU = 7687, PseudoVNCLIPU_WX_MF8 = 7688, PseudoVNCLIPU_WX_MF8_MASK = 7689, PseudoVNCLIPU_WX_MF8_TU = 7690, PseudoVNCLIP_WI_M1 = 7691, PseudoVNCLIP_WI_M1_MASK = 7692, PseudoVNCLIP_WI_M1_TU = 7693, PseudoVNCLIP_WI_M2 = 7694, PseudoVNCLIP_WI_M2_MASK = 7695, PseudoVNCLIP_WI_M2_TU = 7696, PseudoVNCLIP_WI_M4 = 7697, PseudoVNCLIP_WI_M4_MASK = 7698, PseudoVNCLIP_WI_M4_TU = 7699, PseudoVNCLIP_WI_MF2 = 7700, PseudoVNCLIP_WI_MF2_MASK = 7701, PseudoVNCLIP_WI_MF2_TU = 7702, PseudoVNCLIP_WI_MF4 = 7703, PseudoVNCLIP_WI_MF4_MASK = 7704, PseudoVNCLIP_WI_MF4_TU = 7705, PseudoVNCLIP_WI_MF8 = 7706, PseudoVNCLIP_WI_MF8_MASK = 7707, PseudoVNCLIP_WI_MF8_TU = 7708, PseudoVNCLIP_WV_M1 = 7709, PseudoVNCLIP_WV_M1_MASK = 7710, PseudoVNCLIP_WV_M1_TU = 7711, PseudoVNCLIP_WV_M2 = 7712, PseudoVNCLIP_WV_M2_MASK = 7713, PseudoVNCLIP_WV_M2_TU = 7714, PseudoVNCLIP_WV_M4 = 7715, PseudoVNCLIP_WV_M4_MASK = 7716, PseudoVNCLIP_WV_M4_TU = 7717, PseudoVNCLIP_WV_MF2 = 7718, PseudoVNCLIP_WV_MF2_MASK = 7719, PseudoVNCLIP_WV_MF2_TU = 7720, PseudoVNCLIP_WV_MF4 = 7721, PseudoVNCLIP_WV_MF4_MASK = 7722, PseudoVNCLIP_WV_MF4_TU = 7723, PseudoVNCLIP_WV_MF8 = 7724, PseudoVNCLIP_WV_MF8_MASK = 7725, PseudoVNCLIP_WV_MF8_TU = 7726, PseudoVNCLIP_WX_M1 = 7727, PseudoVNCLIP_WX_M1_MASK = 7728, PseudoVNCLIP_WX_M1_TU = 7729, PseudoVNCLIP_WX_M2 = 7730, PseudoVNCLIP_WX_M2_MASK = 7731, PseudoVNCLIP_WX_M2_TU = 7732, PseudoVNCLIP_WX_M4 = 7733, PseudoVNCLIP_WX_M4_MASK = 7734, PseudoVNCLIP_WX_M4_TU = 7735, PseudoVNCLIP_WX_MF2 = 7736, PseudoVNCLIP_WX_MF2_MASK = 7737, PseudoVNCLIP_WX_MF2_TU = 7738, PseudoVNCLIP_WX_MF4 = 7739, PseudoVNCLIP_WX_MF4_MASK = 7740, PseudoVNCLIP_WX_MF4_TU = 7741, PseudoVNCLIP_WX_MF8 = 7742, PseudoVNCLIP_WX_MF8_MASK = 7743, PseudoVNCLIP_WX_MF8_TU = 7744, PseudoVNMSAC_VV_M1 = 7745, PseudoVNMSAC_VV_M1_MASK = 7746, PseudoVNMSAC_VV_M2 = 7747, PseudoVNMSAC_VV_M2_MASK = 7748, PseudoVNMSAC_VV_M4 = 7749, PseudoVNMSAC_VV_M4_MASK = 7750, PseudoVNMSAC_VV_M8 = 7751, PseudoVNMSAC_VV_M8_MASK = 7752, PseudoVNMSAC_VV_MF2 = 7753, PseudoVNMSAC_VV_MF2_MASK = 7754, PseudoVNMSAC_VV_MF4 = 7755, PseudoVNMSAC_VV_MF4_MASK = 7756, PseudoVNMSAC_VV_MF8 = 7757, PseudoVNMSAC_VV_MF8_MASK = 7758, PseudoVNMSAC_VX_M1 = 7759, PseudoVNMSAC_VX_M1_MASK = 7760, PseudoVNMSAC_VX_M2 = 7761, PseudoVNMSAC_VX_M2_MASK = 7762, PseudoVNMSAC_VX_M4 = 7763, PseudoVNMSAC_VX_M4_MASK = 7764, PseudoVNMSAC_VX_M8 = 7765, PseudoVNMSAC_VX_M8_MASK = 7766, PseudoVNMSAC_VX_MF2 = 7767, PseudoVNMSAC_VX_MF2_MASK = 7768, PseudoVNMSAC_VX_MF4 = 7769, PseudoVNMSAC_VX_MF4_MASK = 7770, PseudoVNMSAC_VX_MF8 = 7771, PseudoVNMSAC_VX_MF8_MASK = 7772, PseudoVNMSUB_VV_M1 = 7773, PseudoVNMSUB_VV_M1_MASK = 7774, PseudoVNMSUB_VV_M2 = 7775, PseudoVNMSUB_VV_M2_MASK = 7776, PseudoVNMSUB_VV_M4 = 7777, PseudoVNMSUB_VV_M4_MASK = 7778, PseudoVNMSUB_VV_M8 = 7779, PseudoVNMSUB_VV_M8_MASK = 7780, PseudoVNMSUB_VV_MF2 = 7781, PseudoVNMSUB_VV_MF2_MASK = 7782, PseudoVNMSUB_VV_MF4 = 7783, PseudoVNMSUB_VV_MF4_MASK = 7784, PseudoVNMSUB_VV_MF8 = 7785, PseudoVNMSUB_VV_MF8_MASK = 7786, PseudoVNMSUB_VX_M1 = 7787, PseudoVNMSUB_VX_M1_MASK = 7788, PseudoVNMSUB_VX_M2 = 7789, PseudoVNMSUB_VX_M2_MASK = 7790, PseudoVNMSUB_VX_M4 = 7791, PseudoVNMSUB_VX_M4_MASK = 7792, PseudoVNMSUB_VX_M8 = 7793, PseudoVNMSUB_VX_M8_MASK = 7794, PseudoVNMSUB_VX_MF2 = 7795, PseudoVNMSUB_VX_MF2_MASK = 7796, PseudoVNMSUB_VX_MF4 = 7797, PseudoVNMSUB_VX_MF4_MASK = 7798, PseudoVNMSUB_VX_MF8 = 7799, PseudoVNMSUB_VX_MF8_MASK = 7800, PseudoVNSRA_WI_M1 = 7801, PseudoVNSRA_WI_M1_MASK = 7802, PseudoVNSRA_WI_M1_TU = 7803, PseudoVNSRA_WI_M2 = 7804, PseudoVNSRA_WI_M2_MASK = 7805, PseudoVNSRA_WI_M2_TU = 7806, PseudoVNSRA_WI_M4 = 7807, PseudoVNSRA_WI_M4_MASK = 7808, PseudoVNSRA_WI_M4_TU = 7809, PseudoVNSRA_WI_MF2 = 7810, PseudoVNSRA_WI_MF2_MASK = 7811, PseudoVNSRA_WI_MF2_TU = 7812, PseudoVNSRA_WI_MF4 = 7813, PseudoVNSRA_WI_MF4_MASK = 7814, PseudoVNSRA_WI_MF4_TU = 7815, PseudoVNSRA_WI_MF8 = 7816, PseudoVNSRA_WI_MF8_MASK = 7817, PseudoVNSRA_WI_MF8_TU = 7818, PseudoVNSRA_WV_M1 = 7819, PseudoVNSRA_WV_M1_MASK = 7820, PseudoVNSRA_WV_M1_TU = 7821, PseudoVNSRA_WV_M2 = 7822, PseudoVNSRA_WV_M2_MASK = 7823, PseudoVNSRA_WV_M2_TU = 7824, PseudoVNSRA_WV_M4 = 7825, PseudoVNSRA_WV_M4_MASK = 7826, PseudoVNSRA_WV_M4_TU = 7827, PseudoVNSRA_WV_MF2 = 7828, PseudoVNSRA_WV_MF2_MASK = 7829, PseudoVNSRA_WV_MF2_TU = 7830, PseudoVNSRA_WV_MF4 = 7831, PseudoVNSRA_WV_MF4_MASK = 7832, PseudoVNSRA_WV_MF4_TU = 7833, PseudoVNSRA_WV_MF8 = 7834, PseudoVNSRA_WV_MF8_MASK = 7835, PseudoVNSRA_WV_MF8_TU = 7836, PseudoVNSRA_WX_M1 = 7837, PseudoVNSRA_WX_M1_MASK = 7838, PseudoVNSRA_WX_M1_TU = 7839, PseudoVNSRA_WX_M2 = 7840, PseudoVNSRA_WX_M2_MASK = 7841, PseudoVNSRA_WX_M2_TU = 7842, PseudoVNSRA_WX_M4 = 7843, PseudoVNSRA_WX_M4_MASK = 7844, PseudoVNSRA_WX_M4_TU = 7845, PseudoVNSRA_WX_MF2 = 7846, PseudoVNSRA_WX_MF2_MASK = 7847, PseudoVNSRA_WX_MF2_TU = 7848, PseudoVNSRA_WX_MF4 = 7849, PseudoVNSRA_WX_MF4_MASK = 7850, PseudoVNSRA_WX_MF4_TU = 7851, PseudoVNSRA_WX_MF8 = 7852, PseudoVNSRA_WX_MF8_MASK = 7853, PseudoVNSRA_WX_MF8_TU = 7854, PseudoVNSRL_WI_M1 = 7855, PseudoVNSRL_WI_M1_MASK = 7856, PseudoVNSRL_WI_M1_TU = 7857, PseudoVNSRL_WI_M2 = 7858, PseudoVNSRL_WI_M2_MASK = 7859, PseudoVNSRL_WI_M2_TU = 7860, PseudoVNSRL_WI_M4 = 7861, PseudoVNSRL_WI_M4_MASK = 7862, PseudoVNSRL_WI_M4_TU = 7863, PseudoVNSRL_WI_MF2 = 7864, PseudoVNSRL_WI_MF2_MASK = 7865, PseudoVNSRL_WI_MF2_TU = 7866, PseudoVNSRL_WI_MF4 = 7867, PseudoVNSRL_WI_MF4_MASK = 7868, PseudoVNSRL_WI_MF4_TU = 7869, PseudoVNSRL_WI_MF8 = 7870, PseudoVNSRL_WI_MF8_MASK = 7871, PseudoVNSRL_WI_MF8_TU = 7872, PseudoVNSRL_WV_M1 = 7873, PseudoVNSRL_WV_M1_MASK = 7874, PseudoVNSRL_WV_M1_TU = 7875, PseudoVNSRL_WV_M2 = 7876, PseudoVNSRL_WV_M2_MASK = 7877, PseudoVNSRL_WV_M2_TU = 7878, PseudoVNSRL_WV_M4 = 7879, PseudoVNSRL_WV_M4_MASK = 7880, PseudoVNSRL_WV_M4_TU = 7881, PseudoVNSRL_WV_MF2 = 7882, PseudoVNSRL_WV_MF2_MASK = 7883, PseudoVNSRL_WV_MF2_TU = 7884, PseudoVNSRL_WV_MF4 = 7885, PseudoVNSRL_WV_MF4_MASK = 7886, PseudoVNSRL_WV_MF4_TU = 7887, PseudoVNSRL_WV_MF8 = 7888, PseudoVNSRL_WV_MF8_MASK = 7889, PseudoVNSRL_WV_MF8_TU = 7890, PseudoVNSRL_WX_M1 = 7891, PseudoVNSRL_WX_M1_MASK = 7892, PseudoVNSRL_WX_M1_TU = 7893, PseudoVNSRL_WX_M2 = 7894, PseudoVNSRL_WX_M2_MASK = 7895, PseudoVNSRL_WX_M2_TU = 7896, PseudoVNSRL_WX_M4 = 7897, PseudoVNSRL_WX_M4_MASK = 7898, PseudoVNSRL_WX_M4_TU = 7899, PseudoVNSRL_WX_MF2 = 7900, PseudoVNSRL_WX_MF2_MASK = 7901, PseudoVNSRL_WX_MF2_TU = 7902, PseudoVNSRL_WX_MF4 = 7903, PseudoVNSRL_WX_MF4_MASK = 7904, PseudoVNSRL_WX_MF4_TU = 7905, PseudoVNSRL_WX_MF8 = 7906, PseudoVNSRL_WX_MF8_MASK = 7907, PseudoVNSRL_WX_MF8_TU = 7908, PseudoVOR_VI_M1 = 7909, PseudoVOR_VI_M1_MASK = 7910, PseudoVOR_VI_M1_TU = 7911, PseudoVOR_VI_M2 = 7912, PseudoVOR_VI_M2_MASK = 7913, PseudoVOR_VI_M2_TU = 7914, PseudoVOR_VI_M4 = 7915, PseudoVOR_VI_M4_MASK = 7916, PseudoVOR_VI_M4_TU = 7917, PseudoVOR_VI_M8 = 7918, PseudoVOR_VI_M8_MASK = 7919, PseudoVOR_VI_M8_TU = 7920, PseudoVOR_VI_MF2 = 7921, PseudoVOR_VI_MF2_MASK = 7922, PseudoVOR_VI_MF2_TU = 7923, PseudoVOR_VI_MF4 = 7924, PseudoVOR_VI_MF4_MASK = 7925, PseudoVOR_VI_MF4_TU = 7926, PseudoVOR_VI_MF8 = 7927, PseudoVOR_VI_MF8_MASK = 7928, PseudoVOR_VI_MF8_TU = 7929, PseudoVOR_VV_M1 = 7930, PseudoVOR_VV_M1_MASK = 7931, PseudoVOR_VV_M1_TU = 7932, PseudoVOR_VV_M2 = 7933, PseudoVOR_VV_M2_MASK = 7934, PseudoVOR_VV_M2_TU = 7935, PseudoVOR_VV_M4 = 7936, PseudoVOR_VV_M4_MASK = 7937, PseudoVOR_VV_M4_TU = 7938, PseudoVOR_VV_M8 = 7939, PseudoVOR_VV_M8_MASK = 7940, PseudoVOR_VV_M8_TU = 7941, PseudoVOR_VV_MF2 = 7942, PseudoVOR_VV_MF2_MASK = 7943, PseudoVOR_VV_MF2_TU = 7944, PseudoVOR_VV_MF4 = 7945, PseudoVOR_VV_MF4_MASK = 7946, PseudoVOR_VV_MF4_TU = 7947, PseudoVOR_VV_MF8 = 7948, PseudoVOR_VV_MF8_MASK = 7949, PseudoVOR_VV_MF8_TU = 7950, PseudoVOR_VX_M1 = 7951, PseudoVOR_VX_M1_MASK = 7952, PseudoVOR_VX_M1_TU = 7953, PseudoVOR_VX_M2 = 7954, PseudoVOR_VX_M2_MASK = 7955, PseudoVOR_VX_M2_TU = 7956, PseudoVOR_VX_M4 = 7957, PseudoVOR_VX_M4_MASK = 7958, PseudoVOR_VX_M4_TU = 7959, PseudoVOR_VX_M8 = 7960, PseudoVOR_VX_M8_MASK = 7961, PseudoVOR_VX_M8_TU = 7962, PseudoVOR_VX_MF2 = 7963, PseudoVOR_VX_MF2_MASK = 7964, PseudoVOR_VX_MF2_TU = 7965, PseudoVOR_VX_MF4 = 7966, PseudoVOR_VX_MF4_MASK = 7967, PseudoVOR_VX_MF4_TU = 7968, PseudoVOR_VX_MF8 = 7969, PseudoVOR_VX_MF8_MASK = 7970, PseudoVOR_VX_MF8_TU = 7971, PseudoVREDAND_VS_M1 = 7972, PseudoVREDAND_VS_M1_MASK = 7973, PseudoVREDAND_VS_M2 = 7974, PseudoVREDAND_VS_M2_MASK = 7975, PseudoVREDAND_VS_M4 = 7976, PseudoVREDAND_VS_M4_MASK = 7977, PseudoVREDAND_VS_M8 = 7978, PseudoVREDAND_VS_M8_MASK = 7979, PseudoVREDAND_VS_MF2 = 7980, PseudoVREDAND_VS_MF2_MASK = 7981, PseudoVREDAND_VS_MF4 = 7982, PseudoVREDAND_VS_MF4_MASK = 7983, PseudoVREDAND_VS_MF8 = 7984, PseudoVREDAND_VS_MF8_MASK = 7985, PseudoVREDMAXU_VS_M1 = 7986, PseudoVREDMAXU_VS_M1_MASK = 7987, PseudoVREDMAXU_VS_M2 = 7988, PseudoVREDMAXU_VS_M2_MASK = 7989, PseudoVREDMAXU_VS_M4 = 7990, PseudoVREDMAXU_VS_M4_MASK = 7991, PseudoVREDMAXU_VS_M8 = 7992, PseudoVREDMAXU_VS_M8_MASK = 7993, PseudoVREDMAXU_VS_MF2 = 7994, PseudoVREDMAXU_VS_MF2_MASK = 7995, PseudoVREDMAXU_VS_MF4 = 7996, PseudoVREDMAXU_VS_MF4_MASK = 7997, PseudoVREDMAXU_VS_MF8 = 7998, PseudoVREDMAXU_VS_MF8_MASK = 7999, PseudoVREDMAX_VS_M1 = 8000, PseudoVREDMAX_VS_M1_MASK = 8001, PseudoVREDMAX_VS_M2 = 8002, PseudoVREDMAX_VS_M2_MASK = 8003, PseudoVREDMAX_VS_M4 = 8004, PseudoVREDMAX_VS_M4_MASK = 8005, PseudoVREDMAX_VS_M8 = 8006, PseudoVREDMAX_VS_M8_MASK = 8007, PseudoVREDMAX_VS_MF2 = 8008, PseudoVREDMAX_VS_MF2_MASK = 8009, PseudoVREDMAX_VS_MF4 = 8010, PseudoVREDMAX_VS_MF4_MASK = 8011, PseudoVREDMAX_VS_MF8 = 8012, PseudoVREDMAX_VS_MF8_MASK = 8013, PseudoVREDMINU_VS_M1 = 8014, PseudoVREDMINU_VS_M1_MASK = 8015, PseudoVREDMINU_VS_M2 = 8016, PseudoVREDMINU_VS_M2_MASK = 8017, PseudoVREDMINU_VS_M4 = 8018, PseudoVREDMINU_VS_M4_MASK = 8019, PseudoVREDMINU_VS_M8 = 8020, PseudoVREDMINU_VS_M8_MASK = 8021, PseudoVREDMINU_VS_MF2 = 8022, PseudoVREDMINU_VS_MF2_MASK = 8023, PseudoVREDMINU_VS_MF4 = 8024, PseudoVREDMINU_VS_MF4_MASK = 8025, PseudoVREDMINU_VS_MF8 = 8026, PseudoVREDMINU_VS_MF8_MASK = 8027, PseudoVREDMIN_VS_M1 = 8028, PseudoVREDMIN_VS_M1_MASK = 8029, PseudoVREDMIN_VS_M2 = 8030, PseudoVREDMIN_VS_M2_MASK = 8031, PseudoVREDMIN_VS_M4 = 8032, PseudoVREDMIN_VS_M4_MASK = 8033, PseudoVREDMIN_VS_M8 = 8034, PseudoVREDMIN_VS_M8_MASK = 8035, PseudoVREDMIN_VS_MF2 = 8036, PseudoVREDMIN_VS_MF2_MASK = 8037, PseudoVREDMIN_VS_MF4 = 8038, PseudoVREDMIN_VS_MF4_MASK = 8039, PseudoVREDMIN_VS_MF8 = 8040, PseudoVREDMIN_VS_MF8_MASK = 8041, PseudoVREDOR_VS_M1 = 8042, PseudoVREDOR_VS_M1_MASK = 8043, PseudoVREDOR_VS_M2 = 8044, PseudoVREDOR_VS_M2_MASK = 8045, PseudoVREDOR_VS_M4 = 8046, PseudoVREDOR_VS_M4_MASK = 8047, PseudoVREDOR_VS_M8 = 8048, PseudoVREDOR_VS_M8_MASK = 8049, PseudoVREDOR_VS_MF2 = 8050, PseudoVREDOR_VS_MF2_MASK = 8051, PseudoVREDOR_VS_MF4 = 8052, PseudoVREDOR_VS_MF4_MASK = 8053, PseudoVREDOR_VS_MF8 = 8054, PseudoVREDOR_VS_MF8_MASK = 8055, PseudoVREDSUM_VS_M1 = 8056, PseudoVREDSUM_VS_M1_MASK = 8057, PseudoVREDSUM_VS_M2 = 8058, PseudoVREDSUM_VS_M2_MASK = 8059, PseudoVREDSUM_VS_M4 = 8060, PseudoVREDSUM_VS_M4_MASK = 8061, PseudoVREDSUM_VS_M8 = 8062, PseudoVREDSUM_VS_M8_MASK = 8063, PseudoVREDSUM_VS_MF2 = 8064, PseudoVREDSUM_VS_MF2_MASK = 8065, PseudoVREDSUM_VS_MF4 = 8066, PseudoVREDSUM_VS_MF4_MASK = 8067, PseudoVREDSUM_VS_MF8 = 8068, PseudoVREDSUM_VS_MF8_MASK = 8069, PseudoVREDXOR_VS_M1 = 8070, PseudoVREDXOR_VS_M1_MASK = 8071, PseudoVREDXOR_VS_M2 = 8072, PseudoVREDXOR_VS_M2_MASK = 8073, PseudoVREDXOR_VS_M4 = 8074, PseudoVREDXOR_VS_M4_MASK = 8075, PseudoVREDXOR_VS_M8 = 8076, PseudoVREDXOR_VS_M8_MASK = 8077, PseudoVREDXOR_VS_MF2 = 8078, PseudoVREDXOR_VS_MF2_MASK = 8079, PseudoVREDXOR_VS_MF4 = 8080, PseudoVREDXOR_VS_MF4_MASK = 8081, PseudoVREDXOR_VS_MF8 = 8082, PseudoVREDXOR_VS_MF8_MASK = 8083, PseudoVRELOAD2_M1 = 8084, PseudoVRELOAD2_M2 = 8085, PseudoVRELOAD2_M4 = 8086, PseudoVRELOAD2_MF2 = 8087, PseudoVRELOAD2_MF4 = 8088, PseudoVRELOAD2_MF8 = 8089, PseudoVRELOAD3_M1 = 8090, PseudoVRELOAD3_M2 = 8091, PseudoVRELOAD3_MF2 = 8092, PseudoVRELOAD3_MF4 = 8093, PseudoVRELOAD3_MF8 = 8094, PseudoVRELOAD4_M1 = 8095, PseudoVRELOAD4_M2 = 8096, PseudoVRELOAD4_MF2 = 8097, PseudoVRELOAD4_MF4 = 8098, PseudoVRELOAD4_MF8 = 8099, PseudoVRELOAD5_M1 = 8100, PseudoVRELOAD5_MF2 = 8101, PseudoVRELOAD5_MF4 = 8102, PseudoVRELOAD5_MF8 = 8103, PseudoVRELOAD6_M1 = 8104, PseudoVRELOAD6_MF2 = 8105, PseudoVRELOAD6_MF4 = 8106, PseudoVRELOAD6_MF8 = 8107, PseudoVRELOAD7_M1 = 8108, PseudoVRELOAD7_MF2 = 8109, PseudoVRELOAD7_MF4 = 8110, PseudoVRELOAD7_MF8 = 8111, PseudoVRELOAD8_M1 = 8112, PseudoVRELOAD8_MF2 = 8113, PseudoVRELOAD8_MF4 = 8114, PseudoVRELOAD8_MF8 = 8115, PseudoVREMU_VV_M1 = 8116, PseudoVREMU_VV_M1_MASK = 8117, PseudoVREMU_VV_M1_TU = 8118, PseudoVREMU_VV_M2 = 8119, PseudoVREMU_VV_M2_MASK = 8120, PseudoVREMU_VV_M2_TU = 8121, PseudoVREMU_VV_M4 = 8122, PseudoVREMU_VV_M4_MASK = 8123, PseudoVREMU_VV_M4_TU = 8124, PseudoVREMU_VV_M8 = 8125, PseudoVREMU_VV_M8_MASK = 8126, PseudoVREMU_VV_M8_TU = 8127, PseudoVREMU_VV_MF2 = 8128, PseudoVREMU_VV_MF2_MASK = 8129, PseudoVREMU_VV_MF2_TU = 8130, PseudoVREMU_VV_MF4 = 8131, PseudoVREMU_VV_MF4_MASK = 8132, PseudoVREMU_VV_MF4_TU = 8133, PseudoVREMU_VV_MF8 = 8134, PseudoVREMU_VV_MF8_MASK = 8135, PseudoVREMU_VV_MF8_TU = 8136, PseudoVREMU_VX_M1 = 8137, PseudoVREMU_VX_M1_MASK = 8138, PseudoVREMU_VX_M1_TU = 8139, PseudoVREMU_VX_M2 = 8140, PseudoVREMU_VX_M2_MASK = 8141, PseudoVREMU_VX_M2_TU = 8142, PseudoVREMU_VX_M4 = 8143, PseudoVREMU_VX_M4_MASK = 8144, PseudoVREMU_VX_M4_TU = 8145, PseudoVREMU_VX_M8 = 8146, PseudoVREMU_VX_M8_MASK = 8147, PseudoVREMU_VX_M8_TU = 8148, PseudoVREMU_VX_MF2 = 8149, PseudoVREMU_VX_MF2_MASK = 8150, PseudoVREMU_VX_MF2_TU = 8151, PseudoVREMU_VX_MF4 = 8152, PseudoVREMU_VX_MF4_MASK = 8153, PseudoVREMU_VX_MF4_TU = 8154, PseudoVREMU_VX_MF8 = 8155, PseudoVREMU_VX_MF8_MASK = 8156, PseudoVREMU_VX_MF8_TU = 8157, PseudoVREM_VV_M1 = 8158, PseudoVREM_VV_M1_MASK = 8159, PseudoVREM_VV_M1_TU = 8160, PseudoVREM_VV_M2 = 8161, PseudoVREM_VV_M2_MASK = 8162, PseudoVREM_VV_M2_TU = 8163, PseudoVREM_VV_M4 = 8164, PseudoVREM_VV_M4_MASK = 8165, PseudoVREM_VV_M4_TU = 8166, PseudoVREM_VV_M8 = 8167, PseudoVREM_VV_M8_MASK = 8168, PseudoVREM_VV_M8_TU = 8169, PseudoVREM_VV_MF2 = 8170, PseudoVREM_VV_MF2_MASK = 8171, PseudoVREM_VV_MF2_TU = 8172, PseudoVREM_VV_MF4 = 8173, PseudoVREM_VV_MF4_MASK = 8174, PseudoVREM_VV_MF4_TU = 8175, PseudoVREM_VV_MF8 = 8176, PseudoVREM_VV_MF8_MASK = 8177, PseudoVREM_VV_MF8_TU = 8178, PseudoVREM_VX_M1 = 8179, PseudoVREM_VX_M1_MASK = 8180, PseudoVREM_VX_M1_TU = 8181, PseudoVREM_VX_M2 = 8182, PseudoVREM_VX_M2_MASK = 8183, PseudoVREM_VX_M2_TU = 8184, PseudoVREM_VX_M4 = 8185, PseudoVREM_VX_M4_MASK = 8186, PseudoVREM_VX_M4_TU = 8187, PseudoVREM_VX_M8 = 8188, PseudoVREM_VX_M8_MASK = 8189, PseudoVREM_VX_M8_TU = 8190, PseudoVREM_VX_MF2 = 8191, PseudoVREM_VX_MF2_MASK = 8192, PseudoVREM_VX_MF2_TU = 8193, PseudoVREM_VX_MF4 = 8194, PseudoVREM_VX_MF4_MASK = 8195, PseudoVREM_VX_MF4_TU = 8196, PseudoVREM_VX_MF8 = 8197, PseudoVREM_VX_MF8_MASK = 8198, PseudoVREM_VX_MF8_TU = 8199, PseudoVRGATHEREI16_VV_M1_M1 = 8200, PseudoVRGATHEREI16_VV_M1_M1_MASK = 8201, PseudoVRGATHEREI16_VV_M1_M1_TU = 8202, PseudoVRGATHEREI16_VV_M1_M2 = 8203, PseudoVRGATHEREI16_VV_M1_M2_MASK = 8204, PseudoVRGATHEREI16_VV_M1_M2_TU = 8205, PseudoVRGATHEREI16_VV_M1_MF2 = 8206, PseudoVRGATHEREI16_VV_M1_MF2_MASK = 8207, PseudoVRGATHEREI16_VV_M1_MF2_TU = 8208, PseudoVRGATHEREI16_VV_M1_MF4 = 8209, PseudoVRGATHEREI16_VV_M1_MF4_MASK = 8210, PseudoVRGATHEREI16_VV_M1_MF4_TU = 8211, PseudoVRGATHEREI16_VV_M2_M1 = 8212, PseudoVRGATHEREI16_VV_M2_M1_MASK = 8213, PseudoVRGATHEREI16_VV_M2_M1_TU = 8214, PseudoVRGATHEREI16_VV_M2_M2 = 8215, PseudoVRGATHEREI16_VV_M2_M2_MASK = 8216, PseudoVRGATHEREI16_VV_M2_M2_TU = 8217, PseudoVRGATHEREI16_VV_M2_M4 = 8218, PseudoVRGATHEREI16_VV_M2_M4_MASK = 8219, PseudoVRGATHEREI16_VV_M2_M4_TU = 8220, PseudoVRGATHEREI16_VV_M2_MF2 = 8221, PseudoVRGATHEREI16_VV_M2_MF2_MASK = 8222, PseudoVRGATHEREI16_VV_M2_MF2_TU = 8223, PseudoVRGATHEREI16_VV_M4_M1 = 8224, PseudoVRGATHEREI16_VV_M4_M1_MASK = 8225, PseudoVRGATHEREI16_VV_M4_M1_TU = 8226, PseudoVRGATHEREI16_VV_M4_M2 = 8227, PseudoVRGATHEREI16_VV_M4_M2_MASK = 8228, PseudoVRGATHEREI16_VV_M4_M2_TU = 8229, PseudoVRGATHEREI16_VV_M4_M4 = 8230, PseudoVRGATHEREI16_VV_M4_M4_MASK = 8231, PseudoVRGATHEREI16_VV_M4_M4_TU = 8232, PseudoVRGATHEREI16_VV_M4_M8 = 8233, PseudoVRGATHEREI16_VV_M4_M8_MASK = 8234, PseudoVRGATHEREI16_VV_M4_M8_TU = 8235, PseudoVRGATHEREI16_VV_M8_M2 = 8236, PseudoVRGATHEREI16_VV_M8_M2_MASK = 8237, PseudoVRGATHEREI16_VV_M8_M2_TU = 8238, PseudoVRGATHEREI16_VV_M8_M4 = 8239, PseudoVRGATHEREI16_VV_M8_M4_MASK = 8240, PseudoVRGATHEREI16_VV_M8_M4_TU = 8241, PseudoVRGATHEREI16_VV_M8_M8 = 8242, PseudoVRGATHEREI16_VV_M8_M8_MASK = 8243, PseudoVRGATHEREI16_VV_M8_M8_TU = 8244, PseudoVRGATHEREI16_VV_MF2_M1 = 8245, PseudoVRGATHEREI16_VV_MF2_M1_MASK = 8246, PseudoVRGATHEREI16_VV_MF2_M1_TU = 8247, PseudoVRGATHEREI16_VV_MF2_MF2 = 8248, PseudoVRGATHEREI16_VV_MF2_MF2_MASK = 8249, PseudoVRGATHEREI16_VV_MF2_MF2_TU = 8250, PseudoVRGATHEREI16_VV_MF2_MF4 = 8251, PseudoVRGATHEREI16_VV_MF2_MF4_MASK = 8252, PseudoVRGATHEREI16_VV_MF2_MF4_TU = 8253, PseudoVRGATHEREI16_VV_MF2_MF8 = 8254, PseudoVRGATHEREI16_VV_MF2_MF8_MASK = 8255, PseudoVRGATHEREI16_VV_MF2_MF8_TU = 8256, PseudoVRGATHEREI16_VV_MF4_MF2 = 8257, PseudoVRGATHEREI16_VV_MF4_MF2_MASK = 8258, PseudoVRGATHEREI16_VV_MF4_MF2_TU = 8259, PseudoVRGATHEREI16_VV_MF4_MF4 = 8260, PseudoVRGATHEREI16_VV_MF4_MF4_MASK = 8261, PseudoVRGATHEREI16_VV_MF4_MF4_TU = 8262, PseudoVRGATHEREI16_VV_MF4_MF8 = 8263, PseudoVRGATHEREI16_VV_MF4_MF8_MASK = 8264, PseudoVRGATHEREI16_VV_MF4_MF8_TU = 8265, PseudoVRGATHEREI16_VV_MF8_MF4 = 8266, PseudoVRGATHEREI16_VV_MF8_MF4_MASK = 8267, PseudoVRGATHEREI16_VV_MF8_MF4_TU = 8268, PseudoVRGATHEREI16_VV_MF8_MF8 = 8269, PseudoVRGATHEREI16_VV_MF8_MF8_MASK = 8270, PseudoVRGATHEREI16_VV_MF8_MF8_TU = 8271, PseudoVRGATHER_VI_M1 = 8272, PseudoVRGATHER_VI_M1_MASK = 8273, PseudoVRGATHER_VI_M1_TU = 8274, PseudoVRGATHER_VI_M2 = 8275, PseudoVRGATHER_VI_M2_MASK = 8276, PseudoVRGATHER_VI_M2_TU = 8277, PseudoVRGATHER_VI_M4 = 8278, PseudoVRGATHER_VI_M4_MASK = 8279, PseudoVRGATHER_VI_M4_TU = 8280, PseudoVRGATHER_VI_M8 = 8281, PseudoVRGATHER_VI_M8_MASK = 8282, PseudoVRGATHER_VI_M8_TU = 8283, PseudoVRGATHER_VI_MF2 = 8284, PseudoVRGATHER_VI_MF2_MASK = 8285, PseudoVRGATHER_VI_MF2_TU = 8286, PseudoVRGATHER_VI_MF4 = 8287, PseudoVRGATHER_VI_MF4_MASK = 8288, PseudoVRGATHER_VI_MF4_TU = 8289, PseudoVRGATHER_VI_MF8 = 8290, PseudoVRGATHER_VI_MF8_MASK = 8291, PseudoVRGATHER_VI_MF8_TU = 8292, PseudoVRGATHER_VV_M1 = 8293, PseudoVRGATHER_VV_M1_MASK = 8294, PseudoVRGATHER_VV_M1_TU = 8295, PseudoVRGATHER_VV_M2 = 8296, PseudoVRGATHER_VV_M2_MASK = 8297, PseudoVRGATHER_VV_M2_TU = 8298, PseudoVRGATHER_VV_M4 = 8299, PseudoVRGATHER_VV_M4_MASK = 8300, PseudoVRGATHER_VV_M4_TU = 8301, PseudoVRGATHER_VV_M8 = 8302, PseudoVRGATHER_VV_M8_MASK = 8303, PseudoVRGATHER_VV_M8_TU = 8304, PseudoVRGATHER_VV_MF2 = 8305, PseudoVRGATHER_VV_MF2_MASK = 8306, PseudoVRGATHER_VV_MF2_TU = 8307, PseudoVRGATHER_VV_MF4 = 8308, PseudoVRGATHER_VV_MF4_MASK = 8309, PseudoVRGATHER_VV_MF4_TU = 8310, PseudoVRGATHER_VV_MF8 = 8311, PseudoVRGATHER_VV_MF8_MASK = 8312, PseudoVRGATHER_VV_MF8_TU = 8313, PseudoVRGATHER_VX_M1 = 8314, PseudoVRGATHER_VX_M1_MASK = 8315, PseudoVRGATHER_VX_M1_TU = 8316, PseudoVRGATHER_VX_M2 = 8317, PseudoVRGATHER_VX_M2_MASK = 8318, PseudoVRGATHER_VX_M2_TU = 8319, PseudoVRGATHER_VX_M4 = 8320, PseudoVRGATHER_VX_M4_MASK = 8321, PseudoVRGATHER_VX_M4_TU = 8322, PseudoVRGATHER_VX_M8 = 8323, PseudoVRGATHER_VX_M8_MASK = 8324, PseudoVRGATHER_VX_M8_TU = 8325, PseudoVRGATHER_VX_MF2 = 8326, PseudoVRGATHER_VX_MF2_MASK = 8327, PseudoVRGATHER_VX_MF2_TU = 8328, PseudoVRGATHER_VX_MF4 = 8329, PseudoVRGATHER_VX_MF4_MASK = 8330, PseudoVRGATHER_VX_MF4_TU = 8331, PseudoVRGATHER_VX_MF8 = 8332, PseudoVRGATHER_VX_MF8_MASK = 8333, PseudoVRGATHER_VX_MF8_TU = 8334, PseudoVRSUB_VI_M1 = 8335, PseudoVRSUB_VI_M1_MASK = 8336, PseudoVRSUB_VI_M1_TU = 8337, PseudoVRSUB_VI_M2 = 8338, PseudoVRSUB_VI_M2_MASK = 8339, PseudoVRSUB_VI_M2_TU = 8340, PseudoVRSUB_VI_M4 = 8341, PseudoVRSUB_VI_M4_MASK = 8342, PseudoVRSUB_VI_M4_TU = 8343, PseudoVRSUB_VI_M8 = 8344, PseudoVRSUB_VI_M8_MASK = 8345, PseudoVRSUB_VI_M8_TU = 8346, PseudoVRSUB_VI_MF2 = 8347, PseudoVRSUB_VI_MF2_MASK = 8348, PseudoVRSUB_VI_MF2_TU = 8349, PseudoVRSUB_VI_MF4 = 8350, PseudoVRSUB_VI_MF4_MASK = 8351, PseudoVRSUB_VI_MF4_TU = 8352, PseudoVRSUB_VI_MF8 = 8353, PseudoVRSUB_VI_MF8_MASK = 8354, PseudoVRSUB_VI_MF8_TU = 8355, PseudoVRSUB_VX_M1 = 8356, PseudoVRSUB_VX_M1_MASK = 8357, PseudoVRSUB_VX_M1_TU = 8358, PseudoVRSUB_VX_M2 = 8359, PseudoVRSUB_VX_M2_MASK = 8360, PseudoVRSUB_VX_M2_TU = 8361, PseudoVRSUB_VX_M4 = 8362, PseudoVRSUB_VX_M4_MASK = 8363, PseudoVRSUB_VX_M4_TU = 8364, PseudoVRSUB_VX_M8 = 8365, PseudoVRSUB_VX_M8_MASK = 8366, PseudoVRSUB_VX_M8_TU = 8367, PseudoVRSUB_VX_MF2 = 8368, PseudoVRSUB_VX_MF2_MASK = 8369, PseudoVRSUB_VX_MF2_TU = 8370, PseudoVRSUB_VX_MF4 = 8371, PseudoVRSUB_VX_MF4_MASK = 8372, PseudoVRSUB_VX_MF4_TU = 8373, PseudoVRSUB_VX_MF8 = 8374, PseudoVRSUB_VX_MF8_MASK = 8375, PseudoVRSUB_VX_MF8_TU = 8376, PseudoVSADDU_VI_M1 = 8377, PseudoVSADDU_VI_M1_MASK = 8378, PseudoVSADDU_VI_M1_TU = 8379, PseudoVSADDU_VI_M2 = 8380, PseudoVSADDU_VI_M2_MASK = 8381, PseudoVSADDU_VI_M2_TU = 8382, PseudoVSADDU_VI_M4 = 8383, PseudoVSADDU_VI_M4_MASK = 8384, PseudoVSADDU_VI_M4_TU = 8385, PseudoVSADDU_VI_M8 = 8386, PseudoVSADDU_VI_M8_MASK = 8387, PseudoVSADDU_VI_M8_TU = 8388, PseudoVSADDU_VI_MF2 = 8389, PseudoVSADDU_VI_MF2_MASK = 8390, PseudoVSADDU_VI_MF2_TU = 8391, PseudoVSADDU_VI_MF4 = 8392, PseudoVSADDU_VI_MF4_MASK = 8393, PseudoVSADDU_VI_MF4_TU = 8394, PseudoVSADDU_VI_MF8 = 8395, PseudoVSADDU_VI_MF8_MASK = 8396, PseudoVSADDU_VI_MF8_TU = 8397, PseudoVSADDU_VV_M1 = 8398, PseudoVSADDU_VV_M1_MASK = 8399, PseudoVSADDU_VV_M1_TU = 8400, PseudoVSADDU_VV_M2 = 8401, PseudoVSADDU_VV_M2_MASK = 8402, PseudoVSADDU_VV_M2_TU = 8403, PseudoVSADDU_VV_M4 = 8404, PseudoVSADDU_VV_M4_MASK = 8405, PseudoVSADDU_VV_M4_TU = 8406, PseudoVSADDU_VV_M8 = 8407, PseudoVSADDU_VV_M8_MASK = 8408, PseudoVSADDU_VV_M8_TU = 8409, PseudoVSADDU_VV_MF2 = 8410, PseudoVSADDU_VV_MF2_MASK = 8411, PseudoVSADDU_VV_MF2_TU = 8412, PseudoVSADDU_VV_MF4 = 8413, PseudoVSADDU_VV_MF4_MASK = 8414, PseudoVSADDU_VV_MF4_TU = 8415, PseudoVSADDU_VV_MF8 = 8416, PseudoVSADDU_VV_MF8_MASK = 8417, PseudoVSADDU_VV_MF8_TU = 8418, PseudoVSADDU_VX_M1 = 8419, PseudoVSADDU_VX_M1_MASK = 8420, PseudoVSADDU_VX_M1_TU = 8421, PseudoVSADDU_VX_M2 = 8422, PseudoVSADDU_VX_M2_MASK = 8423, PseudoVSADDU_VX_M2_TU = 8424, PseudoVSADDU_VX_M4 = 8425, PseudoVSADDU_VX_M4_MASK = 8426, PseudoVSADDU_VX_M4_TU = 8427, PseudoVSADDU_VX_M8 = 8428, PseudoVSADDU_VX_M8_MASK = 8429, PseudoVSADDU_VX_M8_TU = 8430, PseudoVSADDU_VX_MF2 = 8431, PseudoVSADDU_VX_MF2_MASK = 8432, PseudoVSADDU_VX_MF2_TU = 8433, PseudoVSADDU_VX_MF4 = 8434, PseudoVSADDU_VX_MF4_MASK = 8435, PseudoVSADDU_VX_MF4_TU = 8436, PseudoVSADDU_VX_MF8 = 8437, PseudoVSADDU_VX_MF8_MASK = 8438, PseudoVSADDU_VX_MF8_TU = 8439, PseudoVSADD_VI_M1 = 8440, PseudoVSADD_VI_M1_MASK = 8441, PseudoVSADD_VI_M1_TU = 8442, PseudoVSADD_VI_M2 = 8443, PseudoVSADD_VI_M2_MASK = 8444, PseudoVSADD_VI_M2_TU = 8445, PseudoVSADD_VI_M4 = 8446, PseudoVSADD_VI_M4_MASK = 8447, PseudoVSADD_VI_M4_TU = 8448, PseudoVSADD_VI_M8 = 8449, PseudoVSADD_VI_M8_MASK = 8450, PseudoVSADD_VI_M8_TU = 8451, PseudoVSADD_VI_MF2 = 8452, PseudoVSADD_VI_MF2_MASK = 8453, PseudoVSADD_VI_MF2_TU = 8454, PseudoVSADD_VI_MF4 = 8455, PseudoVSADD_VI_MF4_MASK = 8456, PseudoVSADD_VI_MF4_TU = 8457, PseudoVSADD_VI_MF8 = 8458, PseudoVSADD_VI_MF8_MASK = 8459, PseudoVSADD_VI_MF8_TU = 8460, PseudoVSADD_VV_M1 = 8461, PseudoVSADD_VV_M1_MASK = 8462, PseudoVSADD_VV_M1_TU = 8463, PseudoVSADD_VV_M2 = 8464, PseudoVSADD_VV_M2_MASK = 8465, PseudoVSADD_VV_M2_TU = 8466, PseudoVSADD_VV_M4 = 8467, PseudoVSADD_VV_M4_MASK = 8468, PseudoVSADD_VV_M4_TU = 8469, PseudoVSADD_VV_M8 = 8470, PseudoVSADD_VV_M8_MASK = 8471, PseudoVSADD_VV_M8_TU = 8472, PseudoVSADD_VV_MF2 = 8473, PseudoVSADD_VV_MF2_MASK = 8474, PseudoVSADD_VV_MF2_TU = 8475, PseudoVSADD_VV_MF4 = 8476, PseudoVSADD_VV_MF4_MASK = 8477, PseudoVSADD_VV_MF4_TU = 8478, PseudoVSADD_VV_MF8 = 8479, PseudoVSADD_VV_MF8_MASK = 8480, PseudoVSADD_VV_MF8_TU = 8481, PseudoVSADD_VX_M1 = 8482, PseudoVSADD_VX_M1_MASK = 8483, PseudoVSADD_VX_M1_TU = 8484, PseudoVSADD_VX_M2 = 8485, PseudoVSADD_VX_M2_MASK = 8486, PseudoVSADD_VX_M2_TU = 8487, PseudoVSADD_VX_M4 = 8488, PseudoVSADD_VX_M4_MASK = 8489, PseudoVSADD_VX_M4_TU = 8490, PseudoVSADD_VX_M8 = 8491, PseudoVSADD_VX_M8_MASK = 8492, PseudoVSADD_VX_M8_TU = 8493, PseudoVSADD_VX_MF2 = 8494, PseudoVSADD_VX_MF2_MASK = 8495, PseudoVSADD_VX_MF2_TU = 8496, PseudoVSADD_VX_MF4 = 8497, PseudoVSADD_VX_MF4_MASK = 8498, PseudoVSADD_VX_MF4_TU = 8499, PseudoVSADD_VX_MF8 = 8500, PseudoVSADD_VX_MF8_MASK = 8501, PseudoVSADD_VX_MF8_TU = 8502, PseudoVSBC_VVM_M1 = 8503, PseudoVSBC_VVM_M1_TU = 8504, PseudoVSBC_VVM_M2 = 8505, PseudoVSBC_VVM_M2_TU = 8506, PseudoVSBC_VVM_M4 = 8507, PseudoVSBC_VVM_M4_TU = 8508, PseudoVSBC_VVM_M8 = 8509, PseudoVSBC_VVM_M8_TU = 8510, PseudoVSBC_VVM_MF2 = 8511, PseudoVSBC_VVM_MF2_TU = 8512, PseudoVSBC_VVM_MF4 = 8513, PseudoVSBC_VVM_MF4_TU = 8514, PseudoVSBC_VVM_MF8 = 8515, PseudoVSBC_VVM_MF8_TU = 8516, PseudoVSBC_VXM_M1 = 8517, PseudoVSBC_VXM_M1_TU = 8518, PseudoVSBC_VXM_M2 = 8519, PseudoVSBC_VXM_M2_TU = 8520, PseudoVSBC_VXM_M4 = 8521, PseudoVSBC_VXM_M4_TU = 8522, PseudoVSBC_VXM_M8 = 8523, PseudoVSBC_VXM_M8_TU = 8524, PseudoVSBC_VXM_MF2 = 8525, PseudoVSBC_VXM_MF2_TU = 8526, PseudoVSBC_VXM_MF4 = 8527, PseudoVSBC_VXM_MF4_TU = 8528, PseudoVSBC_VXM_MF8 = 8529, PseudoVSBC_VXM_MF8_TU = 8530, PseudoVSE16_V_M1 = 8531, PseudoVSE16_V_M1_MASK = 8532, PseudoVSE16_V_M2 = 8533, PseudoVSE16_V_M2_MASK = 8534, PseudoVSE16_V_M4 = 8535, PseudoVSE16_V_M4_MASK = 8536, PseudoVSE16_V_M8 = 8537, PseudoVSE16_V_M8_MASK = 8538, PseudoVSE16_V_MF2 = 8539, PseudoVSE16_V_MF2_MASK = 8540, PseudoVSE16_V_MF4 = 8541, PseudoVSE16_V_MF4_MASK = 8542, PseudoVSE32_V_M1 = 8543, PseudoVSE32_V_M1_MASK = 8544, PseudoVSE32_V_M2 = 8545, PseudoVSE32_V_M2_MASK = 8546, PseudoVSE32_V_M4 = 8547, PseudoVSE32_V_M4_MASK = 8548, PseudoVSE32_V_M8 = 8549, PseudoVSE32_V_M8_MASK = 8550, PseudoVSE32_V_MF2 = 8551, PseudoVSE32_V_MF2_MASK = 8552, PseudoVSE64_V_M1 = 8553, PseudoVSE64_V_M1_MASK = 8554, PseudoVSE64_V_M2 = 8555, PseudoVSE64_V_M2_MASK = 8556, PseudoVSE64_V_M4 = 8557, PseudoVSE64_V_M4_MASK = 8558, PseudoVSE64_V_M8 = 8559, PseudoVSE64_V_M8_MASK = 8560, PseudoVSE8_V_M1 = 8561, PseudoVSE8_V_M1_MASK = 8562, PseudoVSE8_V_M2 = 8563, PseudoVSE8_V_M2_MASK = 8564, PseudoVSE8_V_M4 = 8565, PseudoVSE8_V_M4_MASK = 8566, PseudoVSE8_V_M8 = 8567, PseudoVSE8_V_M8_MASK = 8568, PseudoVSE8_V_MF2 = 8569, PseudoVSE8_V_MF2_MASK = 8570, PseudoVSE8_V_MF4 = 8571, PseudoVSE8_V_MF4_MASK = 8572, PseudoVSE8_V_MF8 = 8573, PseudoVSE8_V_MF8_MASK = 8574, PseudoVSETIVLI = 8575, PseudoVSETVLI = 8576, PseudoVSETVLIX0 = 8577, PseudoVSEXT_VF2_M1 = 8578, PseudoVSEXT_VF2_M1_MASK = 8579, PseudoVSEXT_VF2_M1_TU = 8580, PseudoVSEXT_VF2_M2 = 8581, PseudoVSEXT_VF2_M2_MASK = 8582, PseudoVSEXT_VF2_M2_TU = 8583, PseudoVSEXT_VF2_M4 = 8584, PseudoVSEXT_VF2_M4_MASK = 8585, PseudoVSEXT_VF2_M4_TU = 8586, PseudoVSEXT_VF2_M8 = 8587, PseudoVSEXT_VF2_M8_MASK = 8588, PseudoVSEXT_VF2_M8_TU = 8589, PseudoVSEXT_VF2_MF2 = 8590, PseudoVSEXT_VF2_MF2_MASK = 8591, PseudoVSEXT_VF2_MF2_TU = 8592, PseudoVSEXT_VF2_MF4 = 8593, PseudoVSEXT_VF2_MF4_MASK = 8594, PseudoVSEXT_VF2_MF4_TU = 8595, PseudoVSEXT_VF4_M1 = 8596, PseudoVSEXT_VF4_M1_MASK = 8597, PseudoVSEXT_VF4_M1_TU = 8598, PseudoVSEXT_VF4_M2 = 8599, PseudoVSEXT_VF4_M2_MASK = 8600, PseudoVSEXT_VF4_M2_TU = 8601, PseudoVSEXT_VF4_M4 = 8602, PseudoVSEXT_VF4_M4_MASK = 8603, PseudoVSEXT_VF4_M4_TU = 8604, PseudoVSEXT_VF4_M8 = 8605, PseudoVSEXT_VF4_M8_MASK = 8606, PseudoVSEXT_VF4_M8_TU = 8607, PseudoVSEXT_VF4_MF2 = 8608, PseudoVSEXT_VF4_MF2_MASK = 8609, PseudoVSEXT_VF4_MF2_TU = 8610, PseudoVSEXT_VF8_M1 = 8611, PseudoVSEXT_VF8_M1_MASK = 8612, PseudoVSEXT_VF8_M1_TU = 8613, PseudoVSEXT_VF8_M2 = 8614, PseudoVSEXT_VF8_M2_MASK = 8615, PseudoVSEXT_VF8_M2_TU = 8616, PseudoVSEXT_VF8_M4 = 8617, PseudoVSEXT_VF8_M4_MASK = 8618, PseudoVSEXT_VF8_M4_TU = 8619, PseudoVSEXT_VF8_M8 = 8620, PseudoVSEXT_VF8_M8_MASK = 8621, PseudoVSEXT_VF8_M8_TU = 8622, PseudoVSLIDE1DOWN_VX_M1 = 8623, PseudoVSLIDE1DOWN_VX_M1_MASK = 8624, PseudoVSLIDE1DOWN_VX_M1_TU = 8625, PseudoVSLIDE1DOWN_VX_M2 = 8626, PseudoVSLIDE1DOWN_VX_M2_MASK = 8627, PseudoVSLIDE1DOWN_VX_M2_TU = 8628, PseudoVSLIDE1DOWN_VX_M4 = 8629, PseudoVSLIDE1DOWN_VX_M4_MASK = 8630, PseudoVSLIDE1DOWN_VX_M4_TU = 8631, PseudoVSLIDE1DOWN_VX_M8 = 8632, PseudoVSLIDE1DOWN_VX_M8_MASK = 8633, PseudoVSLIDE1DOWN_VX_M8_TU = 8634, PseudoVSLIDE1DOWN_VX_MF2 = 8635, PseudoVSLIDE1DOWN_VX_MF2_MASK = 8636, PseudoVSLIDE1DOWN_VX_MF2_TU = 8637, PseudoVSLIDE1DOWN_VX_MF4 = 8638, PseudoVSLIDE1DOWN_VX_MF4_MASK = 8639, PseudoVSLIDE1DOWN_VX_MF4_TU = 8640, PseudoVSLIDE1DOWN_VX_MF8 = 8641, PseudoVSLIDE1DOWN_VX_MF8_MASK = 8642, PseudoVSLIDE1DOWN_VX_MF8_TU = 8643, PseudoVSLIDE1UP_VX_M1 = 8644, PseudoVSLIDE1UP_VX_M1_MASK = 8645, PseudoVSLIDE1UP_VX_M1_TU = 8646, PseudoVSLIDE1UP_VX_M2 = 8647, PseudoVSLIDE1UP_VX_M2_MASK = 8648, PseudoVSLIDE1UP_VX_M2_TU = 8649, PseudoVSLIDE1UP_VX_M4 = 8650, PseudoVSLIDE1UP_VX_M4_MASK = 8651, PseudoVSLIDE1UP_VX_M4_TU = 8652, PseudoVSLIDE1UP_VX_M8 = 8653, PseudoVSLIDE1UP_VX_M8_MASK = 8654, PseudoVSLIDE1UP_VX_M8_TU = 8655, PseudoVSLIDE1UP_VX_MF2 = 8656, PseudoVSLIDE1UP_VX_MF2_MASK = 8657, PseudoVSLIDE1UP_VX_MF2_TU = 8658, PseudoVSLIDE1UP_VX_MF4 = 8659, PseudoVSLIDE1UP_VX_MF4_MASK = 8660, PseudoVSLIDE1UP_VX_MF4_TU = 8661, PseudoVSLIDE1UP_VX_MF8 = 8662, PseudoVSLIDE1UP_VX_MF8_MASK = 8663, PseudoVSLIDE1UP_VX_MF8_TU = 8664, PseudoVSLIDEDOWN_VI_M1 = 8665, PseudoVSLIDEDOWN_VI_M1_MASK = 8666, PseudoVSLIDEDOWN_VI_M2 = 8667, PseudoVSLIDEDOWN_VI_M2_MASK = 8668, PseudoVSLIDEDOWN_VI_M4 = 8669, PseudoVSLIDEDOWN_VI_M4_MASK = 8670, PseudoVSLIDEDOWN_VI_M8 = 8671, PseudoVSLIDEDOWN_VI_M8_MASK = 8672, PseudoVSLIDEDOWN_VI_MF2 = 8673, PseudoVSLIDEDOWN_VI_MF2_MASK = 8674, PseudoVSLIDEDOWN_VI_MF4 = 8675, PseudoVSLIDEDOWN_VI_MF4_MASK = 8676, PseudoVSLIDEDOWN_VI_MF8 = 8677, PseudoVSLIDEDOWN_VI_MF8_MASK = 8678, PseudoVSLIDEDOWN_VX_M1 = 8679, PseudoVSLIDEDOWN_VX_M1_MASK = 8680, PseudoVSLIDEDOWN_VX_M2 = 8681, PseudoVSLIDEDOWN_VX_M2_MASK = 8682, PseudoVSLIDEDOWN_VX_M4 = 8683, PseudoVSLIDEDOWN_VX_M4_MASK = 8684, PseudoVSLIDEDOWN_VX_M8 = 8685, PseudoVSLIDEDOWN_VX_M8_MASK = 8686, PseudoVSLIDEDOWN_VX_MF2 = 8687, PseudoVSLIDEDOWN_VX_MF2_MASK = 8688, PseudoVSLIDEDOWN_VX_MF4 = 8689, PseudoVSLIDEDOWN_VX_MF4_MASK = 8690, PseudoVSLIDEDOWN_VX_MF8 = 8691, PseudoVSLIDEDOWN_VX_MF8_MASK = 8692, PseudoVSLIDEUP_VI_M1 = 8693, PseudoVSLIDEUP_VI_M1_MASK = 8694, PseudoVSLIDEUP_VI_M2 = 8695, PseudoVSLIDEUP_VI_M2_MASK = 8696, PseudoVSLIDEUP_VI_M4 = 8697, PseudoVSLIDEUP_VI_M4_MASK = 8698, PseudoVSLIDEUP_VI_M8 = 8699, PseudoVSLIDEUP_VI_M8_MASK = 8700, PseudoVSLIDEUP_VI_MF2 = 8701, PseudoVSLIDEUP_VI_MF2_MASK = 8702, PseudoVSLIDEUP_VI_MF4 = 8703, PseudoVSLIDEUP_VI_MF4_MASK = 8704, PseudoVSLIDEUP_VI_MF8 = 8705, PseudoVSLIDEUP_VI_MF8_MASK = 8706, PseudoVSLIDEUP_VX_M1 = 8707, PseudoVSLIDEUP_VX_M1_MASK = 8708, PseudoVSLIDEUP_VX_M2 = 8709, PseudoVSLIDEUP_VX_M2_MASK = 8710, PseudoVSLIDEUP_VX_M4 = 8711, PseudoVSLIDEUP_VX_M4_MASK = 8712, PseudoVSLIDEUP_VX_M8 = 8713, PseudoVSLIDEUP_VX_M8_MASK = 8714, PseudoVSLIDEUP_VX_MF2 = 8715, PseudoVSLIDEUP_VX_MF2_MASK = 8716, PseudoVSLIDEUP_VX_MF4 = 8717, PseudoVSLIDEUP_VX_MF4_MASK = 8718, PseudoVSLIDEUP_VX_MF8 = 8719, PseudoVSLIDEUP_VX_MF8_MASK = 8720, PseudoVSLL_VI_M1 = 8721, PseudoVSLL_VI_M1_MASK = 8722, PseudoVSLL_VI_M1_TU = 8723, PseudoVSLL_VI_M2 = 8724, PseudoVSLL_VI_M2_MASK = 8725, PseudoVSLL_VI_M2_TU = 8726, PseudoVSLL_VI_M4 = 8727, PseudoVSLL_VI_M4_MASK = 8728, PseudoVSLL_VI_M4_TU = 8729, PseudoVSLL_VI_M8 = 8730, PseudoVSLL_VI_M8_MASK = 8731, PseudoVSLL_VI_M8_TU = 8732, PseudoVSLL_VI_MF2 = 8733, PseudoVSLL_VI_MF2_MASK = 8734, PseudoVSLL_VI_MF2_TU = 8735, PseudoVSLL_VI_MF4 = 8736, PseudoVSLL_VI_MF4_MASK = 8737, PseudoVSLL_VI_MF4_TU = 8738, PseudoVSLL_VI_MF8 = 8739, PseudoVSLL_VI_MF8_MASK = 8740, PseudoVSLL_VI_MF8_TU = 8741, PseudoVSLL_VV_M1 = 8742, PseudoVSLL_VV_M1_MASK = 8743, PseudoVSLL_VV_M1_TU = 8744, PseudoVSLL_VV_M2 = 8745, PseudoVSLL_VV_M2_MASK = 8746, PseudoVSLL_VV_M2_TU = 8747, PseudoVSLL_VV_M4 = 8748, PseudoVSLL_VV_M4_MASK = 8749, PseudoVSLL_VV_M4_TU = 8750, PseudoVSLL_VV_M8 = 8751, PseudoVSLL_VV_M8_MASK = 8752, PseudoVSLL_VV_M8_TU = 8753, PseudoVSLL_VV_MF2 = 8754, PseudoVSLL_VV_MF2_MASK = 8755, PseudoVSLL_VV_MF2_TU = 8756, PseudoVSLL_VV_MF4 = 8757, PseudoVSLL_VV_MF4_MASK = 8758, PseudoVSLL_VV_MF4_TU = 8759, PseudoVSLL_VV_MF8 = 8760, PseudoVSLL_VV_MF8_MASK = 8761, PseudoVSLL_VV_MF8_TU = 8762, PseudoVSLL_VX_M1 = 8763, PseudoVSLL_VX_M1_MASK = 8764, PseudoVSLL_VX_M1_TU = 8765, PseudoVSLL_VX_M2 = 8766, PseudoVSLL_VX_M2_MASK = 8767, PseudoVSLL_VX_M2_TU = 8768, PseudoVSLL_VX_M4 = 8769, PseudoVSLL_VX_M4_MASK = 8770, PseudoVSLL_VX_M4_TU = 8771, PseudoVSLL_VX_M8 = 8772, PseudoVSLL_VX_M8_MASK = 8773, PseudoVSLL_VX_M8_TU = 8774, PseudoVSLL_VX_MF2 = 8775, PseudoVSLL_VX_MF2_MASK = 8776, PseudoVSLL_VX_MF2_TU = 8777, PseudoVSLL_VX_MF4 = 8778, PseudoVSLL_VX_MF4_MASK = 8779, PseudoVSLL_VX_MF4_TU = 8780, PseudoVSLL_VX_MF8 = 8781, PseudoVSLL_VX_MF8_MASK = 8782, PseudoVSLL_VX_MF8_TU = 8783, PseudoVSMUL_VV_M1 = 8784, PseudoVSMUL_VV_M1_MASK = 8785, PseudoVSMUL_VV_M1_TU = 8786, PseudoVSMUL_VV_M2 = 8787, PseudoVSMUL_VV_M2_MASK = 8788, PseudoVSMUL_VV_M2_TU = 8789, PseudoVSMUL_VV_M4 = 8790, PseudoVSMUL_VV_M4_MASK = 8791, PseudoVSMUL_VV_M4_TU = 8792, PseudoVSMUL_VV_M8 = 8793, PseudoVSMUL_VV_M8_MASK = 8794, PseudoVSMUL_VV_M8_TU = 8795, PseudoVSMUL_VV_MF2 = 8796, PseudoVSMUL_VV_MF2_MASK = 8797, PseudoVSMUL_VV_MF2_TU = 8798, PseudoVSMUL_VV_MF4 = 8799, PseudoVSMUL_VV_MF4_MASK = 8800, PseudoVSMUL_VV_MF4_TU = 8801, PseudoVSMUL_VV_MF8 = 8802, PseudoVSMUL_VV_MF8_MASK = 8803, PseudoVSMUL_VV_MF8_TU = 8804, PseudoVSMUL_VX_M1 = 8805, PseudoVSMUL_VX_M1_MASK = 8806, PseudoVSMUL_VX_M1_TU = 8807, PseudoVSMUL_VX_M2 = 8808, PseudoVSMUL_VX_M2_MASK = 8809, PseudoVSMUL_VX_M2_TU = 8810, PseudoVSMUL_VX_M4 = 8811, PseudoVSMUL_VX_M4_MASK = 8812, PseudoVSMUL_VX_M4_TU = 8813, PseudoVSMUL_VX_M8 = 8814, PseudoVSMUL_VX_M8_MASK = 8815, PseudoVSMUL_VX_M8_TU = 8816, PseudoVSMUL_VX_MF2 = 8817, PseudoVSMUL_VX_MF2_MASK = 8818, PseudoVSMUL_VX_MF2_TU = 8819, PseudoVSMUL_VX_MF4 = 8820, PseudoVSMUL_VX_MF4_MASK = 8821, PseudoVSMUL_VX_MF4_TU = 8822, PseudoVSMUL_VX_MF8 = 8823, PseudoVSMUL_VX_MF8_MASK = 8824, PseudoVSMUL_VX_MF8_TU = 8825, PseudoVSM_V_B1 = 8826, PseudoVSM_V_B16 = 8827, PseudoVSM_V_B2 = 8828, PseudoVSM_V_B32 = 8829, PseudoVSM_V_B4 = 8830, PseudoVSM_V_B64 = 8831, PseudoVSM_V_B8 = 8832, PseudoVSOXEI16_V_M1_M1 = 8833, PseudoVSOXEI16_V_M1_M1_MASK = 8834, PseudoVSOXEI16_V_M1_M2 = 8835, PseudoVSOXEI16_V_M1_M2_MASK = 8836, PseudoVSOXEI16_V_M1_M4 = 8837, PseudoVSOXEI16_V_M1_M4_MASK = 8838, PseudoVSOXEI16_V_M1_MF2 = 8839, PseudoVSOXEI16_V_M1_MF2_MASK = 8840, PseudoVSOXEI16_V_M2_M1 = 8841, PseudoVSOXEI16_V_M2_M1_MASK = 8842, PseudoVSOXEI16_V_M2_M2 = 8843, PseudoVSOXEI16_V_M2_M2_MASK = 8844, PseudoVSOXEI16_V_M2_M4 = 8845, PseudoVSOXEI16_V_M2_M4_MASK = 8846, PseudoVSOXEI16_V_M2_M8 = 8847, PseudoVSOXEI16_V_M2_M8_MASK = 8848, PseudoVSOXEI16_V_M4_M2 = 8849, PseudoVSOXEI16_V_M4_M2_MASK = 8850, PseudoVSOXEI16_V_M4_M4 = 8851, PseudoVSOXEI16_V_M4_M4_MASK = 8852, PseudoVSOXEI16_V_M4_M8 = 8853, PseudoVSOXEI16_V_M4_M8_MASK = 8854, PseudoVSOXEI16_V_M8_M4 = 8855, PseudoVSOXEI16_V_M8_M4_MASK = 8856, PseudoVSOXEI16_V_M8_M8 = 8857, PseudoVSOXEI16_V_M8_M8_MASK = 8858, PseudoVSOXEI16_V_MF2_M1 = 8859, PseudoVSOXEI16_V_MF2_M1_MASK = 8860, PseudoVSOXEI16_V_MF2_M2 = 8861, PseudoVSOXEI16_V_MF2_M2_MASK = 8862, PseudoVSOXEI16_V_MF2_MF2 = 8863, PseudoVSOXEI16_V_MF2_MF2_MASK = 8864, PseudoVSOXEI16_V_MF2_MF4 = 8865, PseudoVSOXEI16_V_MF2_MF4_MASK = 8866, PseudoVSOXEI16_V_MF4_M1 = 8867, PseudoVSOXEI16_V_MF4_M1_MASK = 8868, PseudoVSOXEI16_V_MF4_MF2 = 8869, PseudoVSOXEI16_V_MF4_MF2_MASK = 8870, PseudoVSOXEI16_V_MF4_MF4 = 8871, PseudoVSOXEI16_V_MF4_MF4_MASK = 8872, PseudoVSOXEI16_V_MF4_MF8 = 8873, PseudoVSOXEI16_V_MF4_MF8_MASK = 8874, PseudoVSOXEI32_V_M1_M1 = 8875, PseudoVSOXEI32_V_M1_M1_MASK = 8876, PseudoVSOXEI32_V_M1_M2 = 8877, PseudoVSOXEI32_V_M1_M2_MASK = 8878, PseudoVSOXEI32_V_M1_MF2 = 8879, PseudoVSOXEI32_V_M1_MF2_MASK = 8880, PseudoVSOXEI32_V_M1_MF4 = 8881, PseudoVSOXEI32_V_M1_MF4_MASK = 8882, PseudoVSOXEI32_V_M2_M1 = 8883, PseudoVSOXEI32_V_M2_M1_MASK = 8884, PseudoVSOXEI32_V_M2_M2 = 8885, PseudoVSOXEI32_V_M2_M2_MASK = 8886, PseudoVSOXEI32_V_M2_M4 = 8887, PseudoVSOXEI32_V_M2_M4_MASK = 8888, PseudoVSOXEI32_V_M2_MF2 = 8889, PseudoVSOXEI32_V_M2_MF2_MASK = 8890, PseudoVSOXEI32_V_M4_M1 = 8891, PseudoVSOXEI32_V_M4_M1_MASK = 8892, PseudoVSOXEI32_V_M4_M2 = 8893, PseudoVSOXEI32_V_M4_M2_MASK = 8894, PseudoVSOXEI32_V_M4_M4 = 8895, PseudoVSOXEI32_V_M4_M4_MASK = 8896, PseudoVSOXEI32_V_M4_M8 = 8897, PseudoVSOXEI32_V_M4_M8_MASK = 8898, PseudoVSOXEI32_V_M8_M2 = 8899, PseudoVSOXEI32_V_M8_M2_MASK = 8900, PseudoVSOXEI32_V_M8_M4 = 8901, PseudoVSOXEI32_V_M8_M4_MASK = 8902, PseudoVSOXEI32_V_M8_M8 = 8903, PseudoVSOXEI32_V_M8_M8_MASK = 8904, PseudoVSOXEI32_V_MF2_M1 = 8905, PseudoVSOXEI32_V_MF2_M1_MASK = 8906, PseudoVSOXEI32_V_MF2_MF2 = 8907, PseudoVSOXEI32_V_MF2_MF2_MASK = 8908, PseudoVSOXEI32_V_MF2_MF4 = 8909, PseudoVSOXEI32_V_MF2_MF4_MASK = 8910, PseudoVSOXEI32_V_MF2_MF8 = 8911, PseudoVSOXEI32_V_MF2_MF8_MASK = 8912, PseudoVSOXEI64_V_M1_M1 = 8913, PseudoVSOXEI64_V_M1_M1_MASK = 8914, PseudoVSOXEI64_V_M1_MF2 = 8915, PseudoVSOXEI64_V_M1_MF2_MASK = 8916, PseudoVSOXEI64_V_M1_MF4 = 8917, PseudoVSOXEI64_V_M1_MF4_MASK = 8918, PseudoVSOXEI64_V_M1_MF8 = 8919, PseudoVSOXEI64_V_M1_MF8_MASK = 8920, PseudoVSOXEI64_V_M2_M1 = 8921, PseudoVSOXEI64_V_M2_M1_MASK = 8922, PseudoVSOXEI64_V_M2_M2 = 8923, PseudoVSOXEI64_V_M2_M2_MASK = 8924, PseudoVSOXEI64_V_M2_MF2 = 8925, PseudoVSOXEI64_V_M2_MF2_MASK = 8926, PseudoVSOXEI64_V_M2_MF4 = 8927, PseudoVSOXEI64_V_M2_MF4_MASK = 8928, PseudoVSOXEI64_V_M4_M1 = 8929, PseudoVSOXEI64_V_M4_M1_MASK = 8930, PseudoVSOXEI64_V_M4_M2 = 8931, PseudoVSOXEI64_V_M4_M2_MASK = 8932, PseudoVSOXEI64_V_M4_M4 = 8933, PseudoVSOXEI64_V_M4_M4_MASK = 8934, PseudoVSOXEI64_V_M4_MF2 = 8935, PseudoVSOXEI64_V_M4_MF2_MASK = 8936, PseudoVSOXEI64_V_M8_M1 = 8937, PseudoVSOXEI64_V_M8_M1_MASK = 8938, PseudoVSOXEI64_V_M8_M2 = 8939, PseudoVSOXEI64_V_M8_M2_MASK = 8940, PseudoVSOXEI64_V_M8_M4 = 8941, PseudoVSOXEI64_V_M8_M4_MASK = 8942, PseudoVSOXEI64_V_M8_M8 = 8943, PseudoVSOXEI64_V_M8_M8_MASK = 8944, PseudoVSOXEI8_V_M1_M1 = 8945, PseudoVSOXEI8_V_M1_M1_MASK = 8946, PseudoVSOXEI8_V_M1_M2 = 8947, PseudoVSOXEI8_V_M1_M2_MASK = 8948, PseudoVSOXEI8_V_M1_M4 = 8949, PseudoVSOXEI8_V_M1_M4_MASK = 8950, PseudoVSOXEI8_V_M1_M8 = 8951, PseudoVSOXEI8_V_M1_M8_MASK = 8952, PseudoVSOXEI8_V_M2_M2 = 8953, PseudoVSOXEI8_V_M2_M2_MASK = 8954, PseudoVSOXEI8_V_M2_M4 = 8955, PseudoVSOXEI8_V_M2_M4_MASK = 8956, PseudoVSOXEI8_V_M2_M8 = 8957, PseudoVSOXEI8_V_M2_M8_MASK = 8958, PseudoVSOXEI8_V_M4_M4 = 8959, PseudoVSOXEI8_V_M4_M4_MASK = 8960, PseudoVSOXEI8_V_M4_M8 = 8961, PseudoVSOXEI8_V_M4_M8_MASK = 8962, PseudoVSOXEI8_V_M8_M8 = 8963, PseudoVSOXEI8_V_M8_M8_MASK = 8964, PseudoVSOXEI8_V_MF2_M1 = 8965, PseudoVSOXEI8_V_MF2_M1_MASK = 8966, PseudoVSOXEI8_V_MF2_M2 = 8967, PseudoVSOXEI8_V_MF2_M2_MASK = 8968, PseudoVSOXEI8_V_MF2_M4 = 8969, PseudoVSOXEI8_V_MF2_M4_MASK = 8970, PseudoVSOXEI8_V_MF2_MF2 = 8971, PseudoVSOXEI8_V_MF2_MF2_MASK = 8972, PseudoVSOXEI8_V_MF4_M1 = 8973, PseudoVSOXEI8_V_MF4_M1_MASK = 8974, PseudoVSOXEI8_V_MF4_M2 = 8975, PseudoVSOXEI8_V_MF4_M2_MASK = 8976, PseudoVSOXEI8_V_MF4_MF2 = 8977, PseudoVSOXEI8_V_MF4_MF2_MASK = 8978, PseudoVSOXEI8_V_MF4_MF4 = 8979, PseudoVSOXEI8_V_MF4_MF4_MASK = 8980, PseudoVSOXEI8_V_MF8_M1 = 8981, PseudoVSOXEI8_V_MF8_M1_MASK = 8982, PseudoVSOXEI8_V_MF8_MF2 = 8983, PseudoVSOXEI8_V_MF8_MF2_MASK = 8984, PseudoVSOXEI8_V_MF8_MF4 = 8985, PseudoVSOXEI8_V_MF8_MF4_MASK = 8986, PseudoVSOXEI8_V_MF8_MF8 = 8987, PseudoVSOXEI8_V_MF8_MF8_MASK = 8988, PseudoVSOXSEG2EI16_V_M1_M1 = 8989, PseudoVSOXSEG2EI16_V_M1_M1_MASK = 8990, PseudoVSOXSEG2EI16_V_M1_M2 = 8991, PseudoVSOXSEG2EI16_V_M1_M2_MASK = 8992, PseudoVSOXSEG2EI16_V_M1_M4 = 8993, PseudoVSOXSEG2EI16_V_M1_M4_MASK = 8994, PseudoVSOXSEG2EI16_V_M1_MF2 = 8995, PseudoVSOXSEG2EI16_V_M1_MF2_MASK = 8996, PseudoVSOXSEG2EI16_V_M2_M1 = 8997, PseudoVSOXSEG2EI16_V_M2_M1_MASK = 8998, PseudoVSOXSEG2EI16_V_M2_M2 = 8999, PseudoVSOXSEG2EI16_V_M2_M2_MASK = 9000, PseudoVSOXSEG2EI16_V_M2_M4 = 9001, PseudoVSOXSEG2EI16_V_M2_M4_MASK = 9002, PseudoVSOXSEG2EI16_V_M4_M2 = 9003, PseudoVSOXSEG2EI16_V_M4_M2_MASK = 9004, PseudoVSOXSEG2EI16_V_M4_M4 = 9005, PseudoVSOXSEG2EI16_V_M4_M4_MASK = 9006, PseudoVSOXSEG2EI16_V_M8_M4 = 9007, PseudoVSOXSEG2EI16_V_M8_M4_MASK = 9008, PseudoVSOXSEG2EI16_V_MF2_M1 = 9009, PseudoVSOXSEG2EI16_V_MF2_M1_MASK = 9010, PseudoVSOXSEG2EI16_V_MF2_M2 = 9011, PseudoVSOXSEG2EI16_V_MF2_M2_MASK = 9012, PseudoVSOXSEG2EI16_V_MF2_MF2 = 9013, PseudoVSOXSEG2EI16_V_MF2_MF2_MASK = 9014, PseudoVSOXSEG2EI16_V_MF2_MF4 = 9015, PseudoVSOXSEG2EI16_V_MF2_MF4_MASK = 9016, PseudoVSOXSEG2EI16_V_MF4_M1 = 9017, PseudoVSOXSEG2EI16_V_MF4_M1_MASK = 9018, PseudoVSOXSEG2EI16_V_MF4_MF2 = 9019, PseudoVSOXSEG2EI16_V_MF4_MF2_MASK = 9020, PseudoVSOXSEG2EI16_V_MF4_MF4 = 9021, PseudoVSOXSEG2EI16_V_MF4_MF4_MASK = 9022, PseudoVSOXSEG2EI16_V_MF4_MF8 = 9023, PseudoVSOXSEG2EI16_V_MF4_MF8_MASK = 9024, PseudoVSOXSEG2EI32_V_M1_M1 = 9025, PseudoVSOXSEG2EI32_V_M1_M1_MASK = 9026, PseudoVSOXSEG2EI32_V_M1_M2 = 9027, PseudoVSOXSEG2EI32_V_M1_M2_MASK = 9028, PseudoVSOXSEG2EI32_V_M1_MF2 = 9029, PseudoVSOXSEG2EI32_V_M1_MF2_MASK = 9030, PseudoVSOXSEG2EI32_V_M1_MF4 = 9031, PseudoVSOXSEG2EI32_V_M1_MF4_MASK = 9032, PseudoVSOXSEG2EI32_V_M2_M1 = 9033, PseudoVSOXSEG2EI32_V_M2_M1_MASK = 9034, PseudoVSOXSEG2EI32_V_M2_M2 = 9035, PseudoVSOXSEG2EI32_V_M2_M2_MASK = 9036, PseudoVSOXSEG2EI32_V_M2_M4 = 9037, PseudoVSOXSEG2EI32_V_M2_M4_MASK = 9038, PseudoVSOXSEG2EI32_V_M2_MF2 = 9039, PseudoVSOXSEG2EI32_V_M2_MF2_MASK = 9040, PseudoVSOXSEG2EI32_V_M4_M1 = 9041, PseudoVSOXSEG2EI32_V_M4_M1_MASK = 9042, PseudoVSOXSEG2EI32_V_M4_M2 = 9043, PseudoVSOXSEG2EI32_V_M4_M2_MASK = 9044, PseudoVSOXSEG2EI32_V_M4_M4 = 9045, PseudoVSOXSEG2EI32_V_M4_M4_MASK = 9046, PseudoVSOXSEG2EI32_V_M8_M2 = 9047, PseudoVSOXSEG2EI32_V_M8_M2_MASK = 9048, PseudoVSOXSEG2EI32_V_M8_M4 = 9049, PseudoVSOXSEG2EI32_V_M8_M4_MASK = 9050, PseudoVSOXSEG2EI32_V_MF2_M1 = 9051, PseudoVSOXSEG2EI32_V_MF2_M1_MASK = 9052, PseudoVSOXSEG2EI32_V_MF2_MF2 = 9053, PseudoVSOXSEG2EI32_V_MF2_MF2_MASK = 9054, PseudoVSOXSEG2EI32_V_MF2_MF4 = 9055, PseudoVSOXSEG2EI32_V_MF2_MF4_MASK = 9056, PseudoVSOXSEG2EI32_V_MF2_MF8 = 9057, PseudoVSOXSEG2EI32_V_MF2_MF8_MASK = 9058, PseudoVSOXSEG2EI64_V_M1_M1 = 9059, PseudoVSOXSEG2EI64_V_M1_M1_MASK = 9060, PseudoVSOXSEG2EI64_V_M1_MF2 = 9061, PseudoVSOXSEG2EI64_V_M1_MF2_MASK = 9062, PseudoVSOXSEG2EI64_V_M1_MF4 = 9063, PseudoVSOXSEG2EI64_V_M1_MF4_MASK = 9064, PseudoVSOXSEG2EI64_V_M1_MF8 = 9065, PseudoVSOXSEG2EI64_V_M1_MF8_MASK = 9066, PseudoVSOXSEG2EI64_V_M2_M1 = 9067, PseudoVSOXSEG2EI64_V_M2_M1_MASK = 9068, PseudoVSOXSEG2EI64_V_M2_M2 = 9069, PseudoVSOXSEG2EI64_V_M2_M2_MASK = 9070, PseudoVSOXSEG2EI64_V_M2_MF2 = 9071, PseudoVSOXSEG2EI64_V_M2_MF2_MASK = 9072, PseudoVSOXSEG2EI64_V_M2_MF4 = 9073, PseudoVSOXSEG2EI64_V_M2_MF4_MASK = 9074, PseudoVSOXSEG2EI64_V_M4_M1 = 9075, PseudoVSOXSEG2EI64_V_M4_M1_MASK = 9076, PseudoVSOXSEG2EI64_V_M4_M2 = 9077, PseudoVSOXSEG2EI64_V_M4_M2_MASK = 9078, PseudoVSOXSEG2EI64_V_M4_M4 = 9079, PseudoVSOXSEG2EI64_V_M4_M4_MASK = 9080, PseudoVSOXSEG2EI64_V_M4_MF2 = 9081, PseudoVSOXSEG2EI64_V_M4_MF2_MASK = 9082, PseudoVSOXSEG2EI64_V_M8_M1 = 9083, PseudoVSOXSEG2EI64_V_M8_M1_MASK = 9084, PseudoVSOXSEG2EI64_V_M8_M2 = 9085, PseudoVSOXSEG2EI64_V_M8_M2_MASK = 9086, PseudoVSOXSEG2EI64_V_M8_M4 = 9087, PseudoVSOXSEG2EI64_V_M8_M4_MASK = 9088, PseudoVSOXSEG2EI8_V_M1_M1 = 9089, PseudoVSOXSEG2EI8_V_M1_M1_MASK = 9090, PseudoVSOXSEG2EI8_V_M1_M2 = 9091, PseudoVSOXSEG2EI8_V_M1_M2_MASK = 9092, PseudoVSOXSEG2EI8_V_M1_M4 = 9093, PseudoVSOXSEG2EI8_V_M1_M4_MASK = 9094, PseudoVSOXSEG2EI8_V_M2_M2 = 9095, PseudoVSOXSEG2EI8_V_M2_M2_MASK = 9096, PseudoVSOXSEG2EI8_V_M2_M4 = 9097, PseudoVSOXSEG2EI8_V_M2_M4_MASK = 9098, PseudoVSOXSEG2EI8_V_M4_M4 = 9099, PseudoVSOXSEG2EI8_V_M4_M4_MASK = 9100, PseudoVSOXSEG2EI8_V_MF2_M1 = 9101, PseudoVSOXSEG2EI8_V_MF2_M1_MASK = 9102, PseudoVSOXSEG2EI8_V_MF2_M2 = 9103, PseudoVSOXSEG2EI8_V_MF2_M2_MASK = 9104, PseudoVSOXSEG2EI8_V_MF2_M4 = 9105, PseudoVSOXSEG2EI8_V_MF2_M4_MASK = 9106, PseudoVSOXSEG2EI8_V_MF2_MF2 = 9107, PseudoVSOXSEG2EI8_V_MF2_MF2_MASK = 9108, PseudoVSOXSEG2EI8_V_MF4_M1 = 9109, PseudoVSOXSEG2EI8_V_MF4_M1_MASK = 9110, PseudoVSOXSEG2EI8_V_MF4_M2 = 9111, PseudoVSOXSEG2EI8_V_MF4_M2_MASK = 9112, PseudoVSOXSEG2EI8_V_MF4_MF2 = 9113, PseudoVSOXSEG2EI8_V_MF4_MF2_MASK = 9114, PseudoVSOXSEG2EI8_V_MF4_MF4 = 9115, PseudoVSOXSEG2EI8_V_MF4_MF4_MASK = 9116, PseudoVSOXSEG2EI8_V_MF8_M1 = 9117, PseudoVSOXSEG2EI8_V_MF8_M1_MASK = 9118, PseudoVSOXSEG2EI8_V_MF8_MF2 = 9119, PseudoVSOXSEG2EI8_V_MF8_MF2_MASK = 9120, PseudoVSOXSEG2EI8_V_MF8_MF4 = 9121, PseudoVSOXSEG2EI8_V_MF8_MF4_MASK = 9122, PseudoVSOXSEG2EI8_V_MF8_MF8 = 9123, PseudoVSOXSEG2EI8_V_MF8_MF8_MASK = 9124, PseudoVSOXSEG3EI16_V_M1_M1 = 9125, PseudoVSOXSEG3EI16_V_M1_M1_MASK = 9126, PseudoVSOXSEG3EI16_V_M1_M2 = 9127, PseudoVSOXSEG3EI16_V_M1_M2_MASK = 9128, PseudoVSOXSEG3EI16_V_M1_MF2 = 9129, PseudoVSOXSEG3EI16_V_M1_MF2_MASK = 9130, PseudoVSOXSEG3EI16_V_M2_M1 = 9131, PseudoVSOXSEG3EI16_V_M2_M1_MASK = 9132, PseudoVSOXSEG3EI16_V_M2_M2 = 9133, PseudoVSOXSEG3EI16_V_M2_M2_MASK = 9134, PseudoVSOXSEG3EI16_V_M4_M2 = 9135, PseudoVSOXSEG3EI16_V_M4_M2_MASK = 9136, PseudoVSOXSEG3EI16_V_MF2_M1 = 9137, PseudoVSOXSEG3EI16_V_MF2_M1_MASK = 9138, PseudoVSOXSEG3EI16_V_MF2_M2 = 9139, PseudoVSOXSEG3EI16_V_MF2_M2_MASK = 9140, PseudoVSOXSEG3EI16_V_MF2_MF2 = 9141, PseudoVSOXSEG3EI16_V_MF2_MF2_MASK = 9142, PseudoVSOXSEG3EI16_V_MF2_MF4 = 9143, PseudoVSOXSEG3EI16_V_MF2_MF4_MASK = 9144, PseudoVSOXSEG3EI16_V_MF4_M1 = 9145, PseudoVSOXSEG3EI16_V_MF4_M1_MASK = 9146, PseudoVSOXSEG3EI16_V_MF4_MF2 = 9147, PseudoVSOXSEG3EI16_V_MF4_MF2_MASK = 9148, PseudoVSOXSEG3EI16_V_MF4_MF4 = 9149, PseudoVSOXSEG3EI16_V_MF4_MF4_MASK = 9150, PseudoVSOXSEG3EI16_V_MF4_MF8 = 9151, PseudoVSOXSEG3EI16_V_MF4_MF8_MASK = 9152, PseudoVSOXSEG3EI32_V_M1_M1 = 9153, PseudoVSOXSEG3EI32_V_M1_M1_MASK = 9154, PseudoVSOXSEG3EI32_V_M1_M2 = 9155, PseudoVSOXSEG3EI32_V_M1_M2_MASK = 9156, PseudoVSOXSEG3EI32_V_M1_MF2 = 9157, PseudoVSOXSEG3EI32_V_M1_MF2_MASK = 9158, PseudoVSOXSEG3EI32_V_M1_MF4 = 9159, PseudoVSOXSEG3EI32_V_M1_MF4_MASK = 9160, PseudoVSOXSEG3EI32_V_M2_M1 = 9161, PseudoVSOXSEG3EI32_V_M2_M1_MASK = 9162, PseudoVSOXSEG3EI32_V_M2_M2 = 9163, PseudoVSOXSEG3EI32_V_M2_M2_MASK = 9164, PseudoVSOXSEG3EI32_V_M2_MF2 = 9165, PseudoVSOXSEG3EI32_V_M2_MF2_MASK = 9166, PseudoVSOXSEG3EI32_V_M4_M1 = 9167, PseudoVSOXSEG3EI32_V_M4_M1_MASK = 9168, PseudoVSOXSEG3EI32_V_M4_M2 = 9169, PseudoVSOXSEG3EI32_V_M4_M2_MASK = 9170, PseudoVSOXSEG3EI32_V_M8_M2 = 9171, PseudoVSOXSEG3EI32_V_M8_M2_MASK = 9172, PseudoVSOXSEG3EI32_V_MF2_M1 = 9173, PseudoVSOXSEG3EI32_V_MF2_M1_MASK = 9174, PseudoVSOXSEG3EI32_V_MF2_MF2 = 9175, PseudoVSOXSEG3EI32_V_MF2_MF2_MASK = 9176, PseudoVSOXSEG3EI32_V_MF2_MF4 = 9177, PseudoVSOXSEG3EI32_V_MF2_MF4_MASK = 9178, PseudoVSOXSEG3EI32_V_MF2_MF8 = 9179, PseudoVSOXSEG3EI32_V_MF2_MF8_MASK = 9180, PseudoVSOXSEG3EI64_V_M1_M1 = 9181, PseudoVSOXSEG3EI64_V_M1_M1_MASK = 9182, PseudoVSOXSEG3EI64_V_M1_MF2 = 9183, PseudoVSOXSEG3EI64_V_M1_MF2_MASK = 9184, PseudoVSOXSEG3EI64_V_M1_MF4 = 9185, PseudoVSOXSEG3EI64_V_M1_MF4_MASK = 9186, PseudoVSOXSEG3EI64_V_M1_MF8 = 9187, PseudoVSOXSEG3EI64_V_M1_MF8_MASK = 9188, PseudoVSOXSEG3EI64_V_M2_M1 = 9189, PseudoVSOXSEG3EI64_V_M2_M1_MASK = 9190, PseudoVSOXSEG3EI64_V_M2_M2 = 9191, PseudoVSOXSEG3EI64_V_M2_M2_MASK = 9192, PseudoVSOXSEG3EI64_V_M2_MF2 = 9193, PseudoVSOXSEG3EI64_V_M2_MF2_MASK = 9194, PseudoVSOXSEG3EI64_V_M2_MF4 = 9195, PseudoVSOXSEG3EI64_V_M2_MF4_MASK = 9196, PseudoVSOXSEG3EI64_V_M4_M1 = 9197, PseudoVSOXSEG3EI64_V_M4_M1_MASK = 9198, PseudoVSOXSEG3EI64_V_M4_M2 = 9199, PseudoVSOXSEG3EI64_V_M4_M2_MASK = 9200, PseudoVSOXSEG3EI64_V_M4_MF2 = 9201, PseudoVSOXSEG3EI64_V_M4_MF2_MASK = 9202, PseudoVSOXSEG3EI64_V_M8_M1 = 9203, PseudoVSOXSEG3EI64_V_M8_M1_MASK = 9204, PseudoVSOXSEG3EI64_V_M8_M2 = 9205, PseudoVSOXSEG3EI64_V_M8_M2_MASK = 9206, PseudoVSOXSEG3EI8_V_M1_M1 = 9207, PseudoVSOXSEG3EI8_V_M1_M1_MASK = 9208, PseudoVSOXSEG3EI8_V_M1_M2 = 9209, PseudoVSOXSEG3EI8_V_M1_M2_MASK = 9210, PseudoVSOXSEG3EI8_V_M2_M2 = 9211, PseudoVSOXSEG3EI8_V_M2_M2_MASK = 9212, PseudoVSOXSEG3EI8_V_MF2_M1 = 9213, PseudoVSOXSEG3EI8_V_MF2_M1_MASK = 9214, PseudoVSOXSEG3EI8_V_MF2_M2 = 9215, PseudoVSOXSEG3EI8_V_MF2_M2_MASK = 9216, PseudoVSOXSEG3EI8_V_MF2_MF2 = 9217, PseudoVSOXSEG3EI8_V_MF2_MF2_MASK = 9218, PseudoVSOXSEG3EI8_V_MF4_M1 = 9219, PseudoVSOXSEG3EI8_V_MF4_M1_MASK = 9220, PseudoVSOXSEG3EI8_V_MF4_M2 = 9221, PseudoVSOXSEG3EI8_V_MF4_M2_MASK = 9222, PseudoVSOXSEG3EI8_V_MF4_MF2 = 9223, PseudoVSOXSEG3EI8_V_MF4_MF2_MASK = 9224, PseudoVSOXSEG3EI8_V_MF4_MF4 = 9225, PseudoVSOXSEG3EI8_V_MF4_MF4_MASK = 9226, PseudoVSOXSEG3EI8_V_MF8_M1 = 9227, PseudoVSOXSEG3EI8_V_MF8_M1_MASK = 9228, PseudoVSOXSEG3EI8_V_MF8_MF2 = 9229, PseudoVSOXSEG3EI8_V_MF8_MF2_MASK = 9230, PseudoVSOXSEG3EI8_V_MF8_MF4 = 9231, PseudoVSOXSEG3EI8_V_MF8_MF4_MASK = 9232, PseudoVSOXSEG3EI8_V_MF8_MF8 = 9233, PseudoVSOXSEG3EI8_V_MF8_MF8_MASK = 9234, PseudoVSOXSEG4EI16_V_M1_M1 = 9235, PseudoVSOXSEG4EI16_V_M1_M1_MASK = 9236, PseudoVSOXSEG4EI16_V_M1_M2 = 9237, PseudoVSOXSEG4EI16_V_M1_M2_MASK = 9238, PseudoVSOXSEG4EI16_V_M1_MF2 = 9239, PseudoVSOXSEG4EI16_V_M1_MF2_MASK = 9240, PseudoVSOXSEG4EI16_V_M2_M1 = 9241, PseudoVSOXSEG4EI16_V_M2_M1_MASK = 9242, PseudoVSOXSEG4EI16_V_M2_M2 = 9243, PseudoVSOXSEG4EI16_V_M2_M2_MASK = 9244, PseudoVSOXSEG4EI16_V_M4_M2 = 9245, PseudoVSOXSEG4EI16_V_M4_M2_MASK = 9246, PseudoVSOXSEG4EI16_V_MF2_M1 = 9247, PseudoVSOXSEG4EI16_V_MF2_M1_MASK = 9248, PseudoVSOXSEG4EI16_V_MF2_M2 = 9249, PseudoVSOXSEG4EI16_V_MF2_M2_MASK = 9250, PseudoVSOXSEG4EI16_V_MF2_MF2 = 9251, PseudoVSOXSEG4EI16_V_MF2_MF2_MASK = 9252, PseudoVSOXSEG4EI16_V_MF2_MF4 = 9253, PseudoVSOXSEG4EI16_V_MF2_MF4_MASK = 9254, PseudoVSOXSEG4EI16_V_MF4_M1 = 9255, PseudoVSOXSEG4EI16_V_MF4_M1_MASK = 9256, PseudoVSOXSEG4EI16_V_MF4_MF2 = 9257, PseudoVSOXSEG4EI16_V_MF4_MF2_MASK = 9258, PseudoVSOXSEG4EI16_V_MF4_MF4 = 9259, PseudoVSOXSEG4EI16_V_MF4_MF4_MASK = 9260, PseudoVSOXSEG4EI16_V_MF4_MF8 = 9261, PseudoVSOXSEG4EI16_V_MF4_MF8_MASK = 9262, PseudoVSOXSEG4EI32_V_M1_M1 = 9263, PseudoVSOXSEG4EI32_V_M1_M1_MASK = 9264, PseudoVSOXSEG4EI32_V_M1_M2 = 9265, PseudoVSOXSEG4EI32_V_M1_M2_MASK = 9266, PseudoVSOXSEG4EI32_V_M1_MF2 = 9267, PseudoVSOXSEG4EI32_V_M1_MF2_MASK = 9268, PseudoVSOXSEG4EI32_V_M1_MF4 = 9269, PseudoVSOXSEG4EI32_V_M1_MF4_MASK = 9270, PseudoVSOXSEG4EI32_V_M2_M1 = 9271, PseudoVSOXSEG4EI32_V_M2_M1_MASK = 9272, PseudoVSOXSEG4EI32_V_M2_M2 = 9273, PseudoVSOXSEG4EI32_V_M2_M2_MASK = 9274, PseudoVSOXSEG4EI32_V_M2_MF2 = 9275, PseudoVSOXSEG4EI32_V_M2_MF2_MASK = 9276, PseudoVSOXSEG4EI32_V_M4_M1 = 9277, PseudoVSOXSEG4EI32_V_M4_M1_MASK = 9278, PseudoVSOXSEG4EI32_V_M4_M2 = 9279, PseudoVSOXSEG4EI32_V_M4_M2_MASK = 9280, PseudoVSOXSEG4EI32_V_M8_M2 = 9281, PseudoVSOXSEG4EI32_V_M8_M2_MASK = 9282, PseudoVSOXSEG4EI32_V_MF2_M1 = 9283, PseudoVSOXSEG4EI32_V_MF2_M1_MASK = 9284, PseudoVSOXSEG4EI32_V_MF2_MF2 = 9285, PseudoVSOXSEG4EI32_V_MF2_MF2_MASK = 9286, PseudoVSOXSEG4EI32_V_MF2_MF4 = 9287, PseudoVSOXSEG4EI32_V_MF2_MF4_MASK = 9288, PseudoVSOXSEG4EI32_V_MF2_MF8 = 9289, PseudoVSOXSEG4EI32_V_MF2_MF8_MASK = 9290, PseudoVSOXSEG4EI64_V_M1_M1 = 9291, PseudoVSOXSEG4EI64_V_M1_M1_MASK = 9292, PseudoVSOXSEG4EI64_V_M1_MF2 = 9293, PseudoVSOXSEG4EI64_V_M1_MF2_MASK = 9294, PseudoVSOXSEG4EI64_V_M1_MF4 = 9295, PseudoVSOXSEG4EI64_V_M1_MF4_MASK = 9296, PseudoVSOXSEG4EI64_V_M1_MF8 = 9297, PseudoVSOXSEG4EI64_V_M1_MF8_MASK = 9298, PseudoVSOXSEG4EI64_V_M2_M1 = 9299, PseudoVSOXSEG4EI64_V_M2_M1_MASK = 9300, PseudoVSOXSEG4EI64_V_M2_M2 = 9301, PseudoVSOXSEG4EI64_V_M2_M2_MASK = 9302, PseudoVSOXSEG4EI64_V_M2_MF2 = 9303, PseudoVSOXSEG4EI64_V_M2_MF2_MASK = 9304, PseudoVSOXSEG4EI64_V_M2_MF4 = 9305, PseudoVSOXSEG4EI64_V_M2_MF4_MASK = 9306, PseudoVSOXSEG4EI64_V_M4_M1 = 9307, PseudoVSOXSEG4EI64_V_M4_M1_MASK = 9308, PseudoVSOXSEG4EI64_V_M4_M2 = 9309, PseudoVSOXSEG4EI64_V_M4_M2_MASK = 9310, PseudoVSOXSEG4EI64_V_M4_MF2 = 9311, PseudoVSOXSEG4EI64_V_M4_MF2_MASK = 9312, PseudoVSOXSEG4EI64_V_M8_M1 = 9313, PseudoVSOXSEG4EI64_V_M8_M1_MASK = 9314, PseudoVSOXSEG4EI64_V_M8_M2 = 9315, PseudoVSOXSEG4EI64_V_M8_M2_MASK = 9316, PseudoVSOXSEG4EI8_V_M1_M1 = 9317, PseudoVSOXSEG4EI8_V_M1_M1_MASK = 9318, PseudoVSOXSEG4EI8_V_M1_M2 = 9319, PseudoVSOXSEG4EI8_V_M1_M2_MASK = 9320, PseudoVSOXSEG4EI8_V_M2_M2 = 9321, PseudoVSOXSEG4EI8_V_M2_M2_MASK = 9322, PseudoVSOXSEG4EI8_V_MF2_M1 = 9323, PseudoVSOXSEG4EI8_V_MF2_M1_MASK = 9324, PseudoVSOXSEG4EI8_V_MF2_M2 = 9325, PseudoVSOXSEG4EI8_V_MF2_M2_MASK = 9326, PseudoVSOXSEG4EI8_V_MF2_MF2 = 9327, PseudoVSOXSEG4EI8_V_MF2_MF2_MASK = 9328, PseudoVSOXSEG4EI8_V_MF4_M1 = 9329, PseudoVSOXSEG4EI8_V_MF4_M1_MASK = 9330, PseudoVSOXSEG4EI8_V_MF4_M2 = 9331, PseudoVSOXSEG4EI8_V_MF4_M2_MASK = 9332, PseudoVSOXSEG4EI8_V_MF4_MF2 = 9333, PseudoVSOXSEG4EI8_V_MF4_MF2_MASK = 9334, PseudoVSOXSEG4EI8_V_MF4_MF4 = 9335, PseudoVSOXSEG4EI8_V_MF4_MF4_MASK = 9336, PseudoVSOXSEG4EI8_V_MF8_M1 = 9337, PseudoVSOXSEG4EI8_V_MF8_M1_MASK = 9338, PseudoVSOXSEG4EI8_V_MF8_MF2 = 9339, PseudoVSOXSEG4EI8_V_MF8_MF2_MASK = 9340, PseudoVSOXSEG4EI8_V_MF8_MF4 = 9341, PseudoVSOXSEG4EI8_V_MF8_MF4_MASK = 9342, PseudoVSOXSEG4EI8_V_MF8_MF8 = 9343, PseudoVSOXSEG4EI8_V_MF8_MF8_MASK = 9344, PseudoVSOXSEG5EI16_V_M1_M1 = 9345, PseudoVSOXSEG5EI16_V_M1_M1_MASK = 9346, PseudoVSOXSEG5EI16_V_M1_MF2 = 9347, PseudoVSOXSEG5EI16_V_M1_MF2_MASK = 9348, PseudoVSOXSEG5EI16_V_M2_M1 = 9349, PseudoVSOXSEG5EI16_V_M2_M1_MASK = 9350, PseudoVSOXSEG5EI16_V_MF2_M1 = 9351, PseudoVSOXSEG5EI16_V_MF2_M1_MASK = 9352, PseudoVSOXSEG5EI16_V_MF2_MF2 = 9353, PseudoVSOXSEG5EI16_V_MF2_MF2_MASK = 9354, PseudoVSOXSEG5EI16_V_MF2_MF4 = 9355, PseudoVSOXSEG5EI16_V_MF2_MF4_MASK = 9356, PseudoVSOXSEG5EI16_V_MF4_M1 = 9357, PseudoVSOXSEG5EI16_V_MF4_M1_MASK = 9358, PseudoVSOXSEG5EI16_V_MF4_MF2 = 9359, PseudoVSOXSEG5EI16_V_MF4_MF2_MASK = 9360, PseudoVSOXSEG5EI16_V_MF4_MF4 = 9361, PseudoVSOXSEG5EI16_V_MF4_MF4_MASK = 9362, PseudoVSOXSEG5EI16_V_MF4_MF8 = 9363, PseudoVSOXSEG5EI16_V_MF4_MF8_MASK = 9364, PseudoVSOXSEG5EI32_V_M1_M1 = 9365, PseudoVSOXSEG5EI32_V_M1_M1_MASK = 9366, PseudoVSOXSEG5EI32_V_M1_MF2 = 9367, PseudoVSOXSEG5EI32_V_M1_MF2_MASK = 9368, PseudoVSOXSEG5EI32_V_M1_MF4 = 9369, PseudoVSOXSEG5EI32_V_M1_MF4_MASK = 9370, PseudoVSOXSEG5EI32_V_M2_M1 = 9371, PseudoVSOXSEG5EI32_V_M2_M1_MASK = 9372, PseudoVSOXSEG5EI32_V_M2_MF2 = 9373, PseudoVSOXSEG5EI32_V_M2_MF2_MASK = 9374, PseudoVSOXSEG5EI32_V_M4_M1 = 9375, PseudoVSOXSEG5EI32_V_M4_M1_MASK = 9376, PseudoVSOXSEG5EI32_V_MF2_M1 = 9377, PseudoVSOXSEG5EI32_V_MF2_M1_MASK = 9378, PseudoVSOXSEG5EI32_V_MF2_MF2 = 9379, PseudoVSOXSEG5EI32_V_MF2_MF2_MASK = 9380, PseudoVSOXSEG5EI32_V_MF2_MF4 = 9381, PseudoVSOXSEG5EI32_V_MF2_MF4_MASK = 9382, PseudoVSOXSEG5EI32_V_MF2_MF8 = 9383, PseudoVSOXSEG5EI32_V_MF2_MF8_MASK = 9384, PseudoVSOXSEG5EI64_V_M1_M1 = 9385, PseudoVSOXSEG5EI64_V_M1_M1_MASK = 9386, PseudoVSOXSEG5EI64_V_M1_MF2 = 9387, PseudoVSOXSEG5EI64_V_M1_MF2_MASK = 9388, PseudoVSOXSEG5EI64_V_M1_MF4 = 9389, PseudoVSOXSEG5EI64_V_M1_MF4_MASK = 9390, PseudoVSOXSEG5EI64_V_M1_MF8 = 9391, PseudoVSOXSEG5EI64_V_M1_MF8_MASK = 9392, PseudoVSOXSEG5EI64_V_M2_M1 = 9393, PseudoVSOXSEG5EI64_V_M2_M1_MASK = 9394, PseudoVSOXSEG5EI64_V_M2_MF2 = 9395, PseudoVSOXSEG5EI64_V_M2_MF2_MASK = 9396, PseudoVSOXSEG5EI64_V_M2_MF4 = 9397, PseudoVSOXSEG5EI64_V_M2_MF4_MASK = 9398, PseudoVSOXSEG5EI64_V_M4_M1 = 9399, PseudoVSOXSEG5EI64_V_M4_M1_MASK = 9400, PseudoVSOXSEG5EI64_V_M4_MF2 = 9401, PseudoVSOXSEG5EI64_V_M4_MF2_MASK = 9402, PseudoVSOXSEG5EI64_V_M8_M1 = 9403, PseudoVSOXSEG5EI64_V_M8_M1_MASK = 9404, PseudoVSOXSEG5EI8_V_M1_M1 = 9405, PseudoVSOXSEG5EI8_V_M1_M1_MASK = 9406, PseudoVSOXSEG5EI8_V_MF2_M1 = 9407, PseudoVSOXSEG5EI8_V_MF2_M1_MASK = 9408, PseudoVSOXSEG5EI8_V_MF2_MF2 = 9409, PseudoVSOXSEG5EI8_V_MF2_MF2_MASK = 9410, PseudoVSOXSEG5EI8_V_MF4_M1 = 9411, PseudoVSOXSEG5EI8_V_MF4_M1_MASK = 9412, PseudoVSOXSEG5EI8_V_MF4_MF2 = 9413, PseudoVSOXSEG5EI8_V_MF4_MF2_MASK = 9414, PseudoVSOXSEG5EI8_V_MF4_MF4 = 9415, PseudoVSOXSEG5EI8_V_MF4_MF4_MASK = 9416, PseudoVSOXSEG5EI8_V_MF8_M1 = 9417, PseudoVSOXSEG5EI8_V_MF8_M1_MASK = 9418, PseudoVSOXSEG5EI8_V_MF8_MF2 = 9419, PseudoVSOXSEG5EI8_V_MF8_MF2_MASK = 9420, PseudoVSOXSEG5EI8_V_MF8_MF4 = 9421, PseudoVSOXSEG5EI8_V_MF8_MF4_MASK = 9422, PseudoVSOXSEG5EI8_V_MF8_MF8 = 9423, PseudoVSOXSEG5EI8_V_MF8_MF8_MASK = 9424, PseudoVSOXSEG6EI16_V_M1_M1 = 9425, PseudoVSOXSEG6EI16_V_M1_M1_MASK = 9426, PseudoVSOXSEG6EI16_V_M1_MF2 = 9427, PseudoVSOXSEG6EI16_V_M1_MF2_MASK = 9428, PseudoVSOXSEG6EI16_V_M2_M1 = 9429, PseudoVSOXSEG6EI16_V_M2_M1_MASK = 9430, PseudoVSOXSEG6EI16_V_MF2_M1 = 9431, PseudoVSOXSEG6EI16_V_MF2_M1_MASK = 9432, PseudoVSOXSEG6EI16_V_MF2_MF2 = 9433, PseudoVSOXSEG6EI16_V_MF2_MF2_MASK = 9434, PseudoVSOXSEG6EI16_V_MF2_MF4 = 9435, PseudoVSOXSEG6EI16_V_MF2_MF4_MASK = 9436, PseudoVSOXSEG6EI16_V_MF4_M1 = 9437, PseudoVSOXSEG6EI16_V_MF4_M1_MASK = 9438, PseudoVSOXSEG6EI16_V_MF4_MF2 = 9439, PseudoVSOXSEG6EI16_V_MF4_MF2_MASK = 9440, PseudoVSOXSEG6EI16_V_MF4_MF4 = 9441, PseudoVSOXSEG6EI16_V_MF4_MF4_MASK = 9442, PseudoVSOXSEG6EI16_V_MF4_MF8 = 9443, PseudoVSOXSEG6EI16_V_MF4_MF8_MASK = 9444, PseudoVSOXSEG6EI32_V_M1_M1 = 9445, PseudoVSOXSEG6EI32_V_M1_M1_MASK = 9446, PseudoVSOXSEG6EI32_V_M1_MF2 = 9447, PseudoVSOXSEG6EI32_V_M1_MF2_MASK = 9448, PseudoVSOXSEG6EI32_V_M1_MF4 = 9449, PseudoVSOXSEG6EI32_V_M1_MF4_MASK = 9450, PseudoVSOXSEG6EI32_V_M2_M1 = 9451, PseudoVSOXSEG6EI32_V_M2_M1_MASK = 9452, PseudoVSOXSEG6EI32_V_M2_MF2 = 9453, PseudoVSOXSEG6EI32_V_M2_MF2_MASK = 9454, PseudoVSOXSEG6EI32_V_M4_M1 = 9455, PseudoVSOXSEG6EI32_V_M4_M1_MASK = 9456, PseudoVSOXSEG6EI32_V_MF2_M1 = 9457, PseudoVSOXSEG6EI32_V_MF2_M1_MASK = 9458, PseudoVSOXSEG6EI32_V_MF2_MF2 = 9459, PseudoVSOXSEG6EI32_V_MF2_MF2_MASK = 9460, PseudoVSOXSEG6EI32_V_MF2_MF4 = 9461, PseudoVSOXSEG6EI32_V_MF2_MF4_MASK = 9462, PseudoVSOXSEG6EI32_V_MF2_MF8 = 9463, PseudoVSOXSEG6EI32_V_MF2_MF8_MASK = 9464, PseudoVSOXSEG6EI64_V_M1_M1 = 9465, PseudoVSOXSEG6EI64_V_M1_M1_MASK = 9466, PseudoVSOXSEG6EI64_V_M1_MF2 = 9467, PseudoVSOXSEG6EI64_V_M1_MF2_MASK = 9468, PseudoVSOXSEG6EI64_V_M1_MF4 = 9469, PseudoVSOXSEG6EI64_V_M1_MF4_MASK = 9470, PseudoVSOXSEG6EI64_V_M1_MF8 = 9471, PseudoVSOXSEG6EI64_V_M1_MF8_MASK = 9472, PseudoVSOXSEG6EI64_V_M2_M1 = 9473, PseudoVSOXSEG6EI64_V_M2_M1_MASK = 9474, PseudoVSOXSEG6EI64_V_M2_MF2 = 9475, PseudoVSOXSEG6EI64_V_M2_MF2_MASK = 9476, PseudoVSOXSEG6EI64_V_M2_MF4 = 9477, PseudoVSOXSEG6EI64_V_M2_MF4_MASK = 9478, PseudoVSOXSEG6EI64_V_M4_M1 = 9479, PseudoVSOXSEG6EI64_V_M4_M1_MASK = 9480, PseudoVSOXSEG6EI64_V_M4_MF2 = 9481, PseudoVSOXSEG6EI64_V_M4_MF2_MASK = 9482, PseudoVSOXSEG6EI64_V_M8_M1 = 9483, PseudoVSOXSEG6EI64_V_M8_M1_MASK = 9484, PseudoVSOXSEG6EI8_V_M1_M1 = 9485, PseudoVSOXSEG6EI8_V_M1_M1_MASK = 9486, PseudoVSOXSEG6EI8_V_MF2_M1 = 9487, PseudoVSOXSEG6EI8_V_MF2_M1_MASK = 9488, PseudoVSOXSEG6EI8_V_MF2_MF2 = 9489, PseudoVSOXSEG6EI8_V_MF2_MF2_MASK = 9490, PseudoVSOXSEG6EI8_V_MF4_M1 = 9491, PseudoVSOXSEG6EI8_V_MF4_M1_MASK = 9492, PseudoVSOXSEG6EI8_V_MF4_MF2 = 9493, PseudoVSOXSEG6EI8_V_MF4_MF2_MASK = 9494, PseudoVSOXSEG6EI8_V_MF4_MF4 = 9495, PseudoVSOXSEG6EI8_V_MF4_MF4_MASK = 9496, PseudoVSOXSEG6EI8_V_MF8_M1 = 9497, PseudoVSOXSEG6EI8_V_MF8_M1_MASK = 9498, PseudoVSOXSEG6EI8_V_MF8_MF2 = 9499, PseudoVSOXSEG6EI8_V_MF8_MF2_MASK = 9500, PseudoVSOXSEG6EI8_V_MF8_MF4 = 9501, PseudoVSOXSEG6EI8_V_MF8_MF4_MASK = 9502, PseudoVSOXSEG6EI8_V_MF8_MF8 = 9503, PseudoVSOXSEG6EI8_V_MF8_MF8_MASK = 9504, PseudoVSOXSEG7EI16_V_M1_M1 = 9505, PseudoVSOXSEG7EI16_V_M1_M1_MASK = 9506, PseudoVSOXSEG7EI16_V_M1_MF2 = 9507, PseudoVSOXSEG7EI16_V_M1_MF2_MASK = 9508, PseudoVSOXSEG7EI16_V_M2_M1 = 9509, PseudoVSOXSEG7EI16_V_M2_M1_MASK = 9510, PseudoVSOXSEG7EI16_V_MF2_M1 = 9511, PseudoVSOXSEG7EI16_V_MF2_M1_MASK = 9512, PseudoVSOXSEG7EI16_V_MF2_MF2 = 9513, PseudoVSOXSEG7EI16_V_MF2_MF2_MASK = 9514, PseudoVSOXSEG7EI16_V_MF2_MF4 = 9515, PseudoVSOXSEG7EI16_V_MF2_MF4_MASK = 9516, PseudoVSOXSEG7EI16_V_MF4_M1 = 9517, PseudoVSOXSEG7EI16_V_MF4_M1_MASK = 9518, PseudoVSOXSEG7EI16_V_MF4_MF2 = 9519, PseudoVSOXSEG7EI16_V_MF4_MF2_MASK = 9520, PseudoVSOXSEG7EI16_V_MF4_MF4 = 9521, PseudoVSOXSEG7EI16_V_MF4_MF4_MASK = 9522, PseudoVSOXSEG7EI16_V_MF4_MF8 = 9523, PseudoVSOXSEG7EI16_V_MF4_MF8_MASK = 9524, PseudoVSOXSEG7EI32_V_M1_M1 = 9525, PseudoVSOXSEG7EI32_V_M1_M1_MASK = 9526, PseudoVSOXSEG7EI32_V_M1_MF2 = 9527, PseudoVSOXSEG7EI32_V_M1_MF2_MASK = 9528, PseudoVSOXSEG7EI32_V_M1_MF4 = 9529, PseudoVSOXSEG7EI32_V_M1_MF4_MASK = 9530, PseudoVSOXSEG7EI32_V_M2_M1 = 9531, PseudoVSOXSEG7EI32_V_M2_M1_MASK = 9532, PseudoVSOXSEG7EI32_V_M2_MF2 = 9533, PseudoVSOXSEG7EI32_V_M2_MF2_MASK = 9534, PseudoVSOXSEG7EI32_V_M4_M1 = 9535, PseudoVSOXSEG7EI32_V_M4_M1_MASK = 9536, PseudoVSOXSEG7EI32_V_MF2_M1 = 9537, PseudoVSOXSEG7EI32_V_MF2_M1_MASK = 9538, PseudoVSOXSEG7EI32_V_MF2_MF2 = 9539, PseudoVSOXSEG7EI32_V_MF2_MF2_MASK = 9540, PseudoVSOXSEG7EI32_V_MF2_MF4 = 9541, PseudoVSOXSEG7EI32_V_MF2_MF4_MASK = 9542, PseudoVSOXSEG7EI32_V_MF2_MF8 = 9543, PseudoVSOXSEG7EI32_V_MF2_MF8_MASK = 9544, PseudoVSOXSEG7EI64_V_M1_M1 = 9545, PseudoVSOXSEG7EI64_V_M1_M1_MASK = 9546, PseudoVSOXSEG7EI64_V_M1_MF2 = 9547, PseudoVSOXSEG7EI64_V_M1_MF2_MASK = 9548, PseudoVSOXSEG7EI64_V_M1_MF4 = 9549, PseudoVSOXSEG7EI64_V_M1_MF4_MASK = 9550, PseudoVSOXSEG7EI64_V_M1_MF8 = 9551, PseudoVSOXSEG7EI64_V_M1_MF8_MASK = 9552, PseudoVSOXSEG7EI64_V_M2_M1 = 9553, PseudoVSOXSEG7EI64_V_M2_M1_MASK = 9554, PseudoVSOXSEG7EI64_V_M2_MF2 = 9555, PseudoVSOXSEG7EI64_V_M2_MF2_MASK = 9556, PseudoVSOXSEG7EI64_V_M2_MF4 = 9557, PseudoVSOXSEG7EI64_V_M2_MF4_MASK = 9558, PseudoVSOXSEG7EI64_V_M4_M1 = 9559, PseudoVSOXSEG7EI64_V_M4_M1_MASK = 9560, PseudoVSOXSEG7EI64_V_M4_MF2 = 9561, PseudoVSOXSEG7EI64_V_M4_MF2_MASK = 9562, PseudoVSOXSEG7EI64_V_M8_M1 = 9563, PseudoVSOXSEG7EI64_V_M8_M1_MASK = 9564, PseudoVSOXSEG7EI8_V_M1_M1 = 9565, PseudoVSOXSEG7EI8_V_M1_M1_MASK = 9566, PseudoVSOXSEG7EI8_V_MF2_M1 = 9567, PseudoVSOXSEG7EI8_V_MF2_M1_MASK = 9568, PseudoVSOXSEG7EI8_V_MF2_MF2 = 9569, PseudoVSOXSEG7EI8_V_MF2_MF2_MASK = 9570, PseudoVSOXSEG7EI8_V_MF4_M1 = 9571, PseudoVSOXSEG7EI8_V_MF4_M1_MASK = 9572, PseudoVSOXSEG7EI8_V_MF4_MF2 = 9573, PseudoVSOXSEG7EI8_V_MF4_MF2_MASK = 9574, PseudoVSOXSEG7EI8_V_MF4_MF4 = 9575, PseudoVSOXSEG7EI8_V_MF4_MF4_MASK = 9576, PseudoVSOXSEG7EI8_V_MF8_M1 = 9577, PseudoVSOXSEG7EI8_V_MF8_M1_MASK = 9578, PseudoVSOXSEG7EI8_V_MF8_MF2 = 9579, PseudoVSOXSEG7EI8_V_MF8_MF2_MASK = 9580, PseudoVSOXSEG7EI8_V_MF8_MF4 = 9581, PseudoVSOXSEG7EI8_V_MF8_MF4_MASK = 9582, PseudoVSOXSEG7EI8_V_MF8_MF8 = 9583, PseudoVSOXSEG7EI8_V_MF8_MF8_MASK = 9584, PseudoVSOXSEG8EI16_V_M1_M1 = 9585, PseudoVSOXSEG8EI16_V_M1_M1_MASK = 9586, PseudoVSOXSEG8EI16_V_M1_MF2 = 9587, PseudoVSOXSEG8EI16_V_M1_MF2_MASK = 9588, PseudoVSOXSEG8EI16_V_M2_M1 = 9589, PseudoVSOXSEG8EI16_V_M2_M1_MASK = 9590, PseudoVSOXSEG8EI16_V_MF2_M1 = 9591, PseudoVSOXSEG8EI16_V_MF2_M1_MASK = 9592, PseudoVSOXSEG8EI16_V_MF2_MF2 = 9593, PseudoVSOXSEG8EI16_V_MF2_MF2_MASK = 9594, PseudoVSOXSEG8EI16_V_MF2_MF4 = 9595, PseudoVSOXSEG8EI16_V_MF2_MF4_MASK = 9596, PseudoVSOXSEG8EI16_V_MF4_M1 = 9597, PseudoVSOXSEG8EI16_V_MF4_M1_MASK = 9598, PseudoVSOXSEG8EI16_V_MF4_MF2 = 9599, PseudoVSOXSEG8EI16_V_MF4_MF2_MASK = 9600, PseudoVSOXSEG8EI16_V_MF4_MF4 = 9601, PseudoVSOXSEG8EI16_V_MF4_MF4_MASK = 9602, PseudoVSOXSEG8EI16_V_MF4_MF8 = 9603, PseudoVSOXSEG8EI16_V_MF4_MF8_MASK = 9604, PseudoVSOXSEG8EI32_V_M1_M1 = 9605, PseudoVSOXSEG8EI32_V_M1_M1_MASK = 9606, PseudoVSOXSEG8EI32_V_M1_MF2 = 9607, PseudoVSOXSEG8EI32_V_M1_MF2_MASK = 9608, PseudoVSOXSEG8EI32_V_M1_MF4 = 9609, PseudoVSOXSEG8EI32_V_M1_MF4_MASK = 9610, PseudoVSOXSEG8EI32_V_M2_M1 = 9611, PseudoVSOXSEG8EI32_V_M2_M1_MASK = 9612, PseudoVSOXSEG8EI32_V_M2_MF2 = 9613, PseudoVSOXSEG8EI32_V_M2_MF2_MASK = 9614, PseudoVSOXSEG8EI32_V_M4_M1 = 9615, PseudoVSOXSEG8EI32_V_M4_M1_MASK = 9616, PseudoVSOXSEG8EI32_V_MF2_M1 = 9617, PseudoVSOXSEG8EI32_V_MF2_M1_MASK = 9618, PseudoVSOXSEG8EI32_V_MF2_MF2 = 9619, PseudoVSOXSEG8EI32_V_MF2_MF2_MASK = 9620, PseudoVSOXSEG8EI32_V_MF2_MF4 = 9621, PseudoVSOXSEG8EI32_V_MF2_MF4_MASK = 9622, PseudoVSOXSEG8EI32_V_MF2_MF8 = 9623, PseudoVSOXSEG8EI32_V_MF2_MF8_MASK = 9624, PseudoVSOXSEG8EI64_V_M1_M1 = 9625, PseudoVSOXSEG8EI64_V_M1_M1_MASK = 9626, PseudoVSOXSEG8EI64_V_M1_MF2 = 9627, PseudoVSOXSEG8EI64_V_M1_MF2_MASK = 9628, PseudoVSOXSEG8EI64_V_M1_MF4 = 9629, PseudoVSOXSEG8EI64_V_M1_MF4_MASK = 9630, PseudoVSOXSEG8EI64_V_M1_MF8 = 9631, PseudoVSOXSEG8EI64_V_M1_MF8_MASK = 9632, PseudoVSOXSEG8EI64_V_M2_M1 = 9633, PseudoVSOXSEG8EI64_V_M2_M1_MASK = 9634, PseudoVSOXSEG8EI64_V_M2_MF2 = 9635, PseudoVSOXSEG8EI64_V_M2_MF2_MASK = 9636, PseudoVSOXSEG8EI64_V_M2_MF4 = 9637, PseudoVSOXSEG8EI64_V_M2_MF4_MASK = 9638, PseudoVSOXSEG8EI64_V_M4_M1 = 9639, PseudoVSOXSEG8EI64_V_M4_M1_MASK = 9640, PseudoVSOXSEG8EI64_V_M4_MF2 = 9641, PseudoVSOXSEG8EI64_V_M4_MF2_MASK = 9642, PseudoVSOXSEG8EI64_V_M8_M1 = 9643, PseudoVSOXSEG8EI64_V_M8_M1_MASK = 9644, PseudoVSOXSEG8EI8_V_M1_M1 = 9645, PseudoVSOXSEG8EI8_V_M1_M1_MASK = 9646, PseudoVSOXSEG8EI8_V_MF2_M1 = 9647, PseudoVSOXSEG8EI8_V_MF2_M1_MASK = 9648, PseudoVSOXSEG8EI8_V_MF2_MF2 = 9649, PseudoVSOXSEG8EI8_V_MF2_MF2_MASK = 9650, PseudoVSOXSEG8EI8_V_MF4_M1 = 9651, PseudoVSOXSEG8EI8_V_MF4_M1_MASK = 9652, PseudoVSOXSEG8EI8_V_MF4_MF2 = 9653, PseudoVSOXSEG8EI8_V_MF4_MF2_MASK = 9654, PseudoVSOXSEG8EI8_V_MF4_MF4 = 9655, PseudoVSOXSEG8EI8_V_MF4_MF4_MASK = 9656, PseudoVSOXSEG8EI8_V_MF8_M1 = 9657, PseudoVSOXSEG8EI8_V_MF8_M1_MASK = 9658, PseudoVSOXSEG8EI8_V_MF8_MF2 = 9659, PseudoVSOXSEG8EI8_V_MF8_MF2_MASK = 9660, PseudoVSOXSEG8EI8_V_MF8_MF4 = 9661, PseudoVSOXSEG8EI8_V_MF8_MF4_MASK = 9662, PseudoVSOXSEG8EI8_V_MF8_MF8 = 9663, PseudoVSOXSEG8EI8_V_MF8_MF8_MASK = 9664, PseudoVSPILL2_M1 = 9665, PseudoVSPILL2_M2 = 9666, PseudoVSPILL2_M4 = 9667, PseudoVSPILL2_MF2 = 9668, PseudoVSPILL2_MF4 = 9669, PseudoVSPILL2_MF8 = 9670, PseudoVSPILL3_M1 = 9671, PseudoVSPILL3_M2 = 9672, PseudoVSPILL3_MF2 = 9673, PseudoVSPILL3_MF4 = 9674, PseudoVSPILL3_MF8 = 9675, PseudoVSPILL4_M1 = 9676, PseudoVSPILL4_M2 = 9677, PseudoVSPILL4_MF2 = 9678, PseudoVSPILL4_MF4 = 9679, PseudoVSPILL4_MF8 = 9680, PseudoVSPILL5_M1 = 9681, PseudoVSPILL5_MF2 = 9682, PseudoVSPILL5_MF4 = 9683, PseudoVSPILL5_MF8 = 9684, PseudoVSPILL6_M1 = 9685, PseudoVSPILL6_MF2 = 9686, PseudoVSPILL6_MF4 = 9687, PseudoVSPILL6_MF8 = 9688, PseudoVSPILL7_M1 = 9689, PseudoVSPILL7_MF2 = 9690, PseudoVSPILL7_MF4 = 9691, PseudoVSPILL7_MF8 = 9692, PseudoVSPILL8_M1 = 9693, PseudoVSPILL8_MF2 = 9694, PseudoVSPILL8_MF4 = 9695, PseudoVSPILL8_MF8 = 9696, PseudoVSRA_VI_M1 = 9697, PseudoVSRA_VI_M1_MASK = 9698, PseudoVSRA_VI_M1_TU = 9699, PseudoVSRA_VI_M2 = 9700, PseudoVSRA_VI_M2_MASK = 9701, PseudoVSRA_VI_M2_TU = 9702, PseudoVSRA_VI_M4 = 9703, PseudoVSRA_VI_M4_MASK = 9704, PseudoVSRA_VI_M4_TU = 9705, PseudoVSRA_VI_M8 = 9706, PseudoVSRA_VI_M8_MASK = 9707, PseudoVSRA_VI_M8_TU = 9708, PseudoVSRA_VI_MF2 = 9709, PseudoVSRA_VI_MF2_MASK = 9710, PseudoVSRA_VI_MF2_TU = 9711, PseudoVSRA_VI_MF4 = 9712, PseudoVSRA_VI_MF4_MASK = 9713, PseudoVSRA_VI_MF4_TU = 9714, PseudoVSRA_VI_MF8 = 9715, PseudoVSRA_VI_MF8_MASK = 9716, PseudoVSRA_VI_MF8_TU = 9717, PseudoVSRA_VV_M1 = 9718, PseudoVSRA_VV_M1_MASK = 9719, PseudoVSRA_VV_M1_TU = 9720, PseudoVSRA_VV_M2 = 9721, PseudoVSRA_VV_M2_MASK = 9722, PseudoVSRA_VV_M2_TU = 9723, PseudoVSRA_VV_M4 = 9724, PseudoVSRA_VV_M4_MASK = 9725, PseudoVSRA_VV_M4_TU = 9726, PseudoVSRA_VV_M8 = 9727, PseudoVSRA_VV_M8_MASK = 9728, PseudoVSRA_VV_M8_TU = 9729, PseudoVSRA_VV_MF2 = 9730, PseudoVSRA_VV_MF2_MASK = 9731, PseudoVSRA_VV_MF2_TU = 9732, PseudoVSRA_VV_MF4 = 9733, PseudoVSRA_VV_MF4_MASK = 9734, PseudoVSRA_VV_MF4_TU = 9735, PseudoVSRA_VV_MF8 = 9736, PseudoVSRA_VV_MF8_MASK = 9737, PseudoVSRA_VV_MF8_TU = 9738, PseudoVSRA_VX_M1 = 9739, PseudoVSRA_VX_M1_MASK = 9740, PseudoVSRA_VX_M1_TU = 9741, PseudoVSRA_VX_M2 = 9742, PseudoVSRA_VX_M2_MASK = 9743, PseudoVSRA_VX_M2_TU = 9744, PseudoVSRA_VX_M4 = 9745, PseudoVSRA_VX_M4_MASK = 9746, PseudoVSRA_VX_M4_TU = 9747, PseudoVSRA_VX_M8 = 9748, PseudoVSRA_VX_M8_MASK = 9749, PseudoVSRA_VX_M8_TU = 9750, PseudoVSRA_VX_MF2 = 9751, PseudoVSRA_VX_MF2_MASK = 9752, PseudoVSRA_VX_MF2_TU = 9753, PseudoVSRA_VX_MF4 = 9754, PseudoVSRA_VX_MF4_MASK = 9755, PseudoVSRA_VX_MF4_TU = 9756, PseudoVSRA_VX_MF8 = 9757, PseudoVSRA_VX_MF8_MASK = 9758, PseudoVSRA_VX_MF8_TU = 9759, PseudoVSRL_VI_M1 = 9760, PseudoVSRL_VI_M1_MASK = 9761, PseudoVSRL_VI_M1_TU = 9762, PseudoVSRL_VI_M2 = 9763, PseudoVSRL_VI_M2_MASK = 9764, PseudoVSRL_VI_M2_TU = 9765, PseudoVSRL_VI_M4 = 9766, PseudoVSRL_VI_M4_MASK = 9767, PseudoVSRL_VI_M4_TU = 9768, PseudoVSRL_VI_M8 = 9769, PseudoVSRL_VI_M8_MASK = 9770, PseudoVSRL_VI_M8_TU = 9771, PseudoVSRL_VI_MF2 = 9772, PseudoVSRL_VI_MF2_MASK = 9773, PseudoVSRL_VI_MF2_TU = 9774, PseudoVSRL_VI_MF4 = 9775, PseudoVSRL_VI_MF4_MASK = 9776, PseudoVSRL_VI_MF4_TU = 9777, PseudoVSRL_VI_MF8 = 9778, PseudoVSRL_VI_MF8_MASK = 9779, PseudoVSRL_VI_MF8_TU = 9780, PseudoVSRL_VV_M1 = 9781, PseudoVSRL_VV_M1_MASK = 9782, PseudoVSRL_VV_M1_TU = 9783, PseudoVSRL_VV_M2 = 9784, PseudoVSRL_VV_M2_MASK = 9785, PseudoVSRL_VV_M2_TU = 9786, PseudoVSRL_VV_M4 = 9787, PseudoVSRL_VV_M4_MASK = 9788, PseudoVSRL_VV_M4_TU = 9789, PseudoVSRL_VV_M8 = 9790, PseudoVSRL_VV_M8_MASK = 9791, PseudoVSRL_VV_M8_TU = 9792, PseudoVSRL_VV_MF2 = 9793, PseudoVSRL_VV_MF2_MASK = 9794, PseudoVSRL_VV_MF2_TU = 9795, PseudoVSRL_VV_MF4 = 9796, PseudoVSRL_VV_MF4_MASK = 9797, PseudoVSRL_VV_MF4_TU = 9798, PseudoVSRL_VV_MF8 = 9799, PseudoVSRL_VV_MF8_MASK = 9800, PseudoVSRL_VV_MF8_TU = 9801, PseudoVSRL_VX_M1 = 9802, PseudoVSRL_VX_M1_MASK = 9803, PseudoVSRL_VX_M1_TU = 9804, PseudoVSRL_VX_M2 = 9805, PseudoVSRL_VX_M2_MASK = 9806, PseudoVSRL_VX_M2_TU = 9807, PseudoVSRL_VX_M4 = 9808, PseudoVSRL_VX_M4_MASK = 9809, PseudoVSRL_VX_M4_TU = 9810, PseudoVSRL_VX_M8 = 9811, PseudoVSRL_VX_M8_MASK = 9812, PseudoVSRL_VX_M8_TU = 9813, PseudoVSRL_VX_MF2 = 9814, PseudoVSRL_VX_MF2_MASK = 9815, PseudoVSRL_VX_MF2_TU = 9816, PseudoVSRL_VX_MF4 = 9817, PseudoVSRL_VX_MF4_MASK = 9818, PseudoVSRL_VX_MF4_TU = 9819, PseudoVSRL_VX_MF8 = 9820, PseudoVSRL_VX_MF8_MASK = 9821, PseudoVSRL_VX_MF8_TU = 9822, PseudoVSSE16_V_M1 = 9823, PseudoVSSE16_V_M1_MASK = 9824, PseudoVSSE16_V_M2 = 9825, PseudoVSSE16_V_M2_MASK = 9826, PseudoVSSE16_V_M4 = 9827, PseudoVSSE16_V_M4_MASK = 9828, PseudoVSSE16_V_M8 = 9829, PseudoVSSE16_V_M8_MASK = 9830, PseudoVSSE16_V_MF2 = 9831, PseudoVSSE16_V_MF2_MASK = 9832, PseudoVSSE16_V_MF4 = 9833, PseudoVSSE16_V_MF4_MASK = 9834, PseudoVSSE32_V_M1 = 9835, PseudoVSSE32_V_M1_MASK = 9836, PseudoVSSE32_V_M2 = 9837, PseudoVSSE32_V_M2_MASK = 9838, PseudoVSSE32_V_M4 = 9839, PseudoVSSE32_V_M4_MASK = 9840, PseudoVSSE32_V_M8 = 9841, PseudoVSSE32_V_M8_MASK = 9842, PseudoVSSE32_V_MF2 = 9843, PseudoVSSE32_V_MF2_MASK = 9844, PseudoVSSE64_V_M1 = 9845, PseudoVSSE64_V_M1_MASK = 9846, PseudoVSSE64_V_M2 = 9847, PseudoVSSE64_V_M2_MASK = 9848, PseudoVSSE64_V_M4 = 9849, PseudoVSSE64_V_M4_MASK = 9850, PseudoVSSE64_V_M8 = 9851, PseudoVSSE64_V_M8_MASK = 9852, PseudoVSSE8_V_M1 = 9853, PseudoVSSE8_V_M1_MASK = 9854, PseudoVSSE8_V_M2 = 9855, PseudoVSSE8_V_M2_MASK = 9856, PseudoVSSE8_V_M4 = 9857, PseudoVSSE8_V_M4_MASK = 9858, PseudoVSSE8_V_M8 = 9859, PseudoVSSE8_V_M8_MASK = 9860, PseudoVSSE8_V_MF2 = 9861, PseudoVSSE8_V_MF2_MASK = 9862, PseudoVSSE8_V_MF4 = 9863, PseudoVSSE8_V_MF4_MASK = 9864, PseudoVSSE8_V_MF8 = 9865, PseudoVSSE8_V_MF8_MASK = 9866, PseudoVSSEG2E16_V_M1 = 9867, PseudoVSSEG2E16_V_M1_MASK = 9868, PseudoVSSEG2E16_V_M2 = 9869, PseudoVSSEG2E16_V_M2_MASK = 9870, PseudoVSSEG2E16_V_M4 = 9871, PseudoVSSEG2E16_V_M4_MASK = 9872, PseudoVSSEG2E16_V_MF2 = 9873, PseudoVSSEG2E16_V_MF2_MASK = 9874, PseudoVSSEG2E16_V_MF4 = 9875, PseudoVSSEG2E16_V_MF4_MASK = 9876, PseudoVSSEG2E32_V_M1 = 9877, PseudoVSSEG2E32_V_M1_MASK = 9878, PseudoVSSEG2E32_V_M2 = 9879, PseudoVSSEG2E32_V_M2_MASK = 9880, PseudoVSSEG2E32_V_M4 = 9881, PseudoVSSEG2E32_V_M4_MASK = 9882, PseudoVSSEG2E32_V_MF2 = 9883, PseudoVSSEG2E32_V_MF2_MASK = 9884, PseudoVSSEG2E64_V_M1 = 9885, PseudoVSSEG2E64_V_M1_MASK = 9886, PseudoVSSEG2E64_V_M2 = 9887, PseudoVSSEG2E64_V_M2_MASK = 9888, PseudoVSSEG2E64_V_M4 = 9889, PseudoVSSEG2E64_V_M4_MASK = 9890, PseudoVSSEG2E8_V_M1 = 9891, PseudoVSSEG2E8_V_M1_MASK = 9892, PseudoVSSEG2E8_V_M2 = 9893, PseudoVSSEG2E8_V_M2_MASK = 9894, PseudoVSSEG2E8_V_M4 = 9895, PseudoVSSEG2E8_V_M4_MASK = 9896, PseudoVSSEG2E8_V_MF2 = 9897, PseudoVSSEG2E8_V_MF2_MASK = 9898, PseudoVSSEG2E8_V_MF4 = 9899, PseudoVSSEG2E8_V_MF4_MASK = 9900, PseudoVSSEG2E8_V_MF8 = 9901, PseudoVSSEG2E8_V_MF8_MASK = 9902, PseudoVSSEG3E16_V_M1 = 9903, PseudoVSSEG3E16_V_M1_MASK = 9904, PseudoVSSEG3E16_V_M2 = 9905, PseudoVSSEG3E16_V_M2_MASK = 9906, PseudoVSSEG3E16_V_MF2 = 9907, PseudoVSSEG3E16_V_MF2_MASK = 9908, PseudoVSSEG3E16_V_MF4 = 9909, PseudoVSSEG3E16_V_MF4_MASK = 9910, PseudoVSSEG3E32_V_M1 = 9911, PseudoVSSEG3E32_V_M1_MASK = 9912, PseudoVSSEG3E32_V_M2 = 9913, PseudoVSSEG3E32_V_M2_MASK = 9914, PseudoVSSEG3E32_V_MF2 = 9915, PseudoVSSEG3E32_V_MF2_MASK = 9916, PseudoVSSEG3E64_V_M1 = 9917, PseudoVSSEG3E64_V_M1_MASK = 9918, PseudoVSSEG3E64_V_M2 = 9919, PseudoVSSEG3E64_V_M2_MASK = 9920, PseudoVSSEG3E8_V_M1 = 9921, PseudoVSSEG3E8_V_M1_MASK = 9922, PseudoVSSEG3E8_V_M2 = 9923, PseudoVSSEG3E8_V_M2_MASK = 9924, PseudoVSSEG3E8_V_MF2 = 9925, PseudoVSSEG3E8_V_MF2_MASK = 9926, PseudoVSSEG3E8_V_MF4 = 9927, PseudoVSSEG3E8_V_MF4_MASK = 9928, PseudoVSSEG3E8_V_MF8 = 9929, PseudoVSSEG3E8_V_MF8_MASK = 9930, PseudoVSSEG4E16_V_M1 = 9931, PseudoVSSEG4E16_V_M1_MASK = 9932, PseudoVSSEG4E16_V_M2 = 9933, PseudoVSSEG4E16_V_M2_MASK = 9934, PseudoVSSEG4E16_V_MF2 = 9935, PseudoVSSEG4E16_V_MF2_MASK = 9936, PseudoVSSEG4E16_V_MF4 = 9937, PseudoVSSEG4E16_V_MF4_MASK = 9938, PseudoVSSEG4E32_V_M1 = 9939, PseudoVSSEG4E32_V_M1_MASK = 9940, PseudoVSSEG4E32_V_M2 = 9941, PseudoVSSEG4E32_V_M2_MASK = 9942, PseudoVSSEG4E32_V_MF2 = 9943, PseudoVSSEG4E32_V_MF2_MASK = 9944, PseudoVSSEG4E64_V_M1 = 9945, PseudoVSSEG4E64_V_M1_MASK = 9946, PseudoVSSEG4E64_V_M2 = 9947, PseudoVSSEG4E64_V_M2_MASK = 9948, PseudoVSSEG4E8_V_M1 = 9949, PseudoVSSEG4E8_V_M1_MASK = 9950, PseudoVSSEG4E8_V_M2 = 9951, PseudoVSSEG4E8_V_M2_MASK = 9952, PseudoVSSEG4E8_V_MF2 = 9953, PseudoVSSEG4E8_V_MF2_MASK = 9954, PseudoVSSEG4E8_V_MF4 = 9955, PseudoVSSEG4E8_V_MF4_MASK = 9956, PseudoVSSEG4E8_V_MF8 = 9957, PseudoVSSEG4E8_V_MF8_MASK = 9958, PseudoVSSEG5E16_V_M1 = 9959, PseudoVSSEG5E16_V_M1_MASK = 9960, PseudoVSSEG5E16_V_MF2 = 9961, PseudoVSSEG5E16_V_MF2_MASK = 9962, PseudoVSSEG5E16_V_MF4 = 9963, PseudoVSSEG5E16_V_MF4_MASK = 9964, PseudoVSSEG5E32_V_M1 = 9965, PseudoVSSEG5E32_V_M1_MASK = 9966, PseudoVSSEG5E32_V_MF2 = 9967, PseudoVSSEG5E32_V_MF2_MASK = 9968, PseudoVSSEG5E64_V_M1 = 9969, PseudoVSSEG5E64_V_M1_MASK = 9970, PseudoVSSEG5E8_V_M1 = 9971, PseudoVSSEG5E8_V_M1_MASK = 9972, PseudoVSSEG5E8_V_MF2 = 9973, PseudoVSSEG5E8_V_MF2_MASK = 9974, PseudoVSSEG5E8_V_MF4 = 9975, PseudoVSSEG5E8_V_MF4_MASK = 9976, PseudoVSSEG5E8_V_MF8 = 9977, PseudoVSSEG5E8_V_MF8_MASK = 9978, PseudoVSSEG6E16_V_M1 = 9979, PseudoVSSEG6E16_V_M1_MASK = 9980, PseudoVSSEG6E16_V_MF2 = 9981, PseudoVSSEG6E16_V_MF2_MASK = 9982, PseudoVSSEG6E16_V_MF4 = 9983, PseudoVSSEG6E16_V_MF4_MASK = 9984, PseudoVSSEG6E32_V_M1 = 9985, PseudoVSSEG6E32_V_M1_MASK = 9986, PseudoVSSEG6E32_V_MF2 = 9987, PseudoVSSEG6E32_V_MF2_MASK = 9988, PseudoVSSEG6E64_V_M1 = 9989, PseudoVSSEG6E64_V_M1_MASK = 9990, PseudoVSSEG6E8_V_M1 = 9991, PseudoVSSEG6E8_V_M1_MASK = 9992, PseudoVSSEG6E8_V_MF2 = 9993, PseudoVSSEG6E8_V_MF2_MASK = 9994, PseudoVSSEG6E8_V_MF4 = 9995, PseudoVSSEG6E8_V_MF4_MASK = 9996, PseudoVSSEG6E8_V_MF8 = 9997, PseudoVSSEG6E8_V_MF8_MASK = 9998, PseudoVSSEG7E16_V_M1 = 9999, PseudoVSSEG7E16_V_M1_MASK = 10000, PseudoVSSEG7E16_V_MF2 = 10001, PseudoVSSEG7E16_V_MF2_MASK = 10002, PseudoVSSEG7E16_V_MF4 = 10003, PseudoVSSEG7E16_V_MF4_MASK = 10004, PseudoVSSEG7E32_V_M1 = 10005, PseudoVSSEG7E32_V_M1_MASK = 10006, PseudoVSSEG7E32_V_MF2 = 10007, PseudoVSSEG7E32_V_MF2_MASK = 10008, PseudoVSSEG7E64_V_M1 = 10009, PseudoVSSEG7E64_V_M1_MASK = 10010, PseudoVSSEG7E8_V_M1 = 10011, PseudoVSSEG7E8_V_M1_MASK = 10012, PseudoVSSEG7E8_V_MF2 = 10013, PseudoVSSEG7E8_V_MF2_MASK = 10014, PseudoVSSEG7E8_V_MF4 = 10015, PseudoVSSEG7E8_V_MF4_MASK = 10016, PseudoVSSEG7E8_V_MF8 = 10017, PseudoVSSEG7E8_V_MF8_MASK = 10018, PseudoVSSEG8E16_V_M1 = 10019, PseudoVSSEG8E16_V_M1_MASK = 10020, PseudoVSSEG8E16_V_MF2 = 10021, PseudoVSSEG8E16_V_MF2_MASK = 10022, PseudoVSSEG8E16_V_MF4 = 10023, PseudoVSSEG8E16_V_MF4_MASK = 10024, PseudoVSSEG8E32_V_M1 = 10025, PseudoVSSEG8E32_V_M1_MASK = 10026, PseudoVSSEG8E32_V_MF2 = 10027, PseudoVSSEG8E32_V_MF2_MASK = 10028, PseudoVSSEG8E64_V_M1 = 10029, PseudoVSSEG8E64_V_M1_MASK = 10030, PseudoVSSEG8E8_V_M1 = 10031, PseudoVSSEG8E8_V_M1_MASK = 10032, PseudoVSSEG8E8_V_MF2 = 10033, PseudoVSSEG8E8_V_MF2_MASK = 10034, PseudoVSSEG8E8_V_MF4 = 10035, PseudoVSSEG8E8_V_MF4_MASK = 10036, PseudoVSSEG8E8_V_MF8 = 10037, PseudoVSSEG8E8_V_MF8_MASK = 10038, PseudoVSSRA_VI_M1 = 10039, PseudoVSSRA_VI_M1_MASK = 10040, PseudoVSSRA_VI_M1_TU = 10041, PseudoVSSRA_VI_M2 = 10042, PseudoVSSRA_VI_M2_MASK = 10043, PseudoVSSRA_VI_M2_TU = 10044, PseudoVSSRA_VI_M4 = 10045, PseudoVSSRA_VI_M4_MASK = 10046, PseudoVSSRA_VI_M4_TU = 10047, PseudoVSSRA_VI_M8 = 10048, PseudoVSSRA_VI_M8_MASK = 10049, PseudoVSSRA_VI_M8_TU = 10050, PseudoVSSRA_VI_MF2 = 10051, PseudoVSSRA_VI_MF2_MASK = 10052, PseudoVSSRA_VI_MF2_TU = 10053, PseudoVSSRA_VI_MF4 = 10054, PseudoVSSRA_VI_MF4_MASK = 10055, PseudoVSSRA_VI_MF4_TU = 10056, PseudoVSSRA_VI_MF8 = 10057, PseudoVSSRA_VI_MF8_MASK = 10058, PseudoVSSRA_VI_MF8_TU = 10059, PseudoVSSRA_VV_M1 = 10060, PseudoVSSRA_VV_M1_MASK = 10061, PseudoVSSRA_VV_M1_TU = 10062, PseudoVSSRA_VV_M2 = 10063, PseudoVSSRA_VV_M2_MASK = 10064, PseudoVSSRA_VV_M2_TU = 10065, PseudoVSSRA_VV_M4 = 10066, PseudoVSSRA_VV_M4_MASK = 10067, PseudoVSSRA_VV_M4_TU = 10068, PseudoVSSRA_VV_M8 = 10069, PseudoVSSRA_VV_M8_MASK = 10070, PseudoVSSRA_VV_M8_TU = 10071, PseudoVSSRA_VV_MF2 = 10072, PseudoVSSRA_VV_MF2_MASK = 10073, PseudoVSSRA_VV_MF2_TU = 10074, PseudoVSSRA_VV_MF4 = 10075, PseudoVSSRA_VV_MF4_MASK = 10076, PseudoVSSRA_VV_MF4_TU = 10077, PseudoVSSRA_VV_MF8 = 10078, PseudoVSSRA_VV_MF8_MASK = 10079, PseudoVSSRA_VV_MF8_TU = 10080, PseudoVSSRA_VX_M1 = 10081, PseudoVSSRA_VX_M1_MASK = 10082, PseudoVSSRA_VX_M1_TU = 10083, PseudoVSSRA_VX_M2 = 10084, PseudoVSSRA_VX_M2_MASK = 10085, PseudoVSSRA_VX_M2_TU = 10086, PseudoVSSRA_VX_M4 = 10087, PseudoVSSRA_VX_M4_MASK = 10088, PseudoVSSRA_VX_M4_TU = 10089, PseudoVSSRA_VX_M8 = 10090, PseudoVSSRA_VX_M8_MASK = 10091, PseudoVSSRA_VX_M8_TU = 10092, PseudoVSSRA_VX_MF2 = 10093, PseudoVSSRA_VX_MF2_MASK = 10094, PseudoVSSRA_VX_MF2_TU = 10095, PseudoVSSRA_VX_MF4 = 10096, PseudoVSSRA_VX_MF4_MASK = 10097, PseudoVSSRA_VX_MF4_TU = 10098, PseudoVSSRA_VX_MF8 = 10099, PseudoVSSRA_VX_MF8_MASK = 10100, PseudoVSSRA_VX_MF8_TU = 10101, PseudoVSSRL_VI_M1 = 10102, PseudoVSSRL_VI_M1_MASK = 10103, PseudoVSSRL_VI_M1_TU = 10104, PseudoVSSRL_VI_M2 = 10105, PseudoVSSRL_VI_M2_MASK = 10106, PseudoVSSRL_VI_M2_TU = 10107, PseudoVSSRL_VI_M4 = 10108, PseudoVSSRL_VI_M4_MASK = 10109, PseudoVSSRL_VI_M4_TU = 10110, PseudoVSSRL_VI_M8 = 10111, PseudoVSSRL_VI_M8_MASK = 10112, PseudoVSSRL_VI_M8_TU = 10113, PseudoVSSRL_VI_MF2 = 10114, PseudoVSSRL_VI_MF2_MASK = 10115, PseudoVSSRL_VI_MF2_TU = 10116, PseudoVSSRL_VI_MF4 = 10117, PseudoVSSRL_VI_MF4_MASK = 10118, PseudoVSSRL_VI_MF4_TU = 10119, PseudoVSSRL_VI_MF8 = 10120, PseudoVSSRL_VI_MF8_MASK = 10121, PseudoVSSRL_VI_MF8_TU = 10122, PseudoVSSRL_VV_M1 = 10123, PseudoVSSRL_VV_M1_MASK = 10124, PseudoVSSRL_VV_M1_TU = 10125, PseudoVSSRL_VV_M2 = 10126, PseudoVSSRL_VV_M2_MASK = 10127, PseudoVSSRL_VV_M2_TU = 10128, PseudoVSSRL_VV_M4 = 10129, PseudoVSSRL_VV_M4_MASK = 10130, PseudoVSSRL_VV_M4_TU = 10131, PseudoVSSRL_VV_M8 = 10132, PseudoVSSRL_VV_M8_MASK = 10133, PseudoVSSRL_VV_M8_TU = 10134, PseudoVSSRL_VV_MF2 = 10135, PseudoVSSRL_VV_MF2_MASK = 10136, PseudoVSSRL_VV_MF2_TU = 10137, PseudoVSSRL_VV_MF4 = 10138, PseudoVSSRL_VV_MF4_MASK = 10139, PseudoVSSRL_VV_MF4_TU = 10140, PseudoVSSRL_VV_MF8 = 10141, PseudoVSSRL_VV_MF8_MASK = 10142, PseudoVSSRL_VV_MF8_TU = 10143, PseudoVSSRL_VX_M1 = 10144, PseudoVSSRL_VX_M1_MASK = 10145, PseudoVSSRL_VX_M1_TU = 10146, PseudoVSSRL_VX_M2 = 10147, PseudoVSSRL_VX_M2_MASK = 10148, PseudoVSSRL_VX_M2_TU = 10149, PseudoVSSRL_VX_M4 = 10150, PseudoVSSRL_VX_M4_MASK = 10151, PseudoVSSRL_VX_M4_TU = 10152, PseudoVSSRL_VX_M8 = 10153, PseudoVSSRL_VX_M8_MASK = 10154, PseudoVSSRL_VX_M8_TU = 10155, PseudoVSSRL_VX_MF2 = 10156, PseudoVSSRL_VX_MF2_MASK = 10157, PseudoVSSRL_VX_MF2_TU = 10158, PseudoVSSRL_VX_MF4 = 10159, PseudoVSSRL_VX_MF4_MASK = 10160, PseudoVSSRL_VX_MF4_TU = 10161, PseudoVSSRL_VX_MF8 = 10162, PseudoVSSRL_VX_MF8_MASK = 10163, PseudoVSSRL_VX_MF8_TU = 10164, PseudoVSSSEG2E16_V_M1 = 10165, PseudoVSSSEG2E16_V_M1_MASK = 10166, PseudoVSSSEG2E16_V_M2 = 10167, PseudoVSSSEG2E16_V_M2_MASK = 10168, PseudoVSSSEG2E16_V_M4 = 10169, PseudoVSSSEG2E16_V_M4_MASK = 10170, PseudoVSSSEG2E16_V_MF2 = 10171, PseudoVSSSEG2E16_V_MF2_MASK = 10172, PseudoVSSSEG2E16_V_MF4 = 10173, PseudoVSSSEG2E16_V_MF4_MASK = 10174, PseudoVSSSEG2E32_V_M1 = 10175, PseudoVSSSEG2E32_V_M1_MASK = 10176, PseudoVSSSEG2E32_V_M2 = 10177, PseudoVSSSEG2E32_V_M2_MASK = 10178, PseudoVSSSEG2E32_V_M4 = 10179, PseudoVSSSEG2E32_V_M4_MASK = 10180, PseudoVSSSEG2E32_V_MF2 = 10181, PseudoVSSSEG2E32_V_MF2_MASK = 10182, PseudoVSSSEG2E64_V_M1 = 10183, PseudoVSSSEG2E64_V_M1_MASK = 10184, PseudoVSSSEG2E64_V_M2 = 10185, PseudoVSSSEG2E64_V_M2_MASK = 10186, PseudoVSSSEG2E64_V_M4 = 10187, PseudoVSSSEG2E64_V_M4_MASK = 10188, PseudoVSSSEG2E8_V_M1 = 10189, PseudoVSSSEG2E8_V_M1_MASK = 10190, PseudoVSSSEG2E8_V_M2 = 10191, PseudoVSSSEG2E8_V_M2_MASK = 10192, PseudoVSSSEG2E8_V_M4 = 10193, PseudoVSSSEG2E8_V_M4_MASK = 10194, PseudoVSSSEG2E8_V_MF2 = 10195, PseudoVSSSEG2E8_V_MF2_MASK = 10196, PseudoVSSSEG2E8_V_MF4 = 10197, PseudoVSSSEG2E8_V_MF4_MASK = 10198, PseudoVSSSEG2E8_V_MF8 = 10199, PseudoVSSSEG2E8_V_MF8_MASK = 10200, PseudoVSSSEG3E16_V_M1 = 10201, PseudoVSSSEG3E16_V_M1_MASK = 10202, PseudoVSSSEG3E16_V_M2 = 10203, PseudoVSSSEG3E16_V_M2_MASK = 10204, PseudoVSSSEG3E16_V_MF2 = 10205, PseudoVSSSEG3E16_V_MF2_MASK = 10206, PseudoVSSSEG3E16_V_MF4 = 10207, PseudoVSSSEG3E16_V_MF4_MASK = 10208, PseudoVSSSEG3E32_V_M1 = 10209, PseudoVSSSEG3E32_V_M1_MASK = 10210, PseudoVSSSEG3E32_V_M2 = 10211, PseudoVSSSEG3E32_V_M2_MASK = 10212, PseudoVSSSEG3E32_V_MF2 = 10213, PseudoVSSSEG3E32_V_MF2_MASK = 10214, PseudoVSSSEG3E64_V_M1 = 10215, PseudoVSSSEG3E64_V_M1_MASK = 10216, PseudoVSSSEG3E64_V_M2 = 10217, PseudoVSSSEG3E64_V_M2_MASK = 10218, PseudoVSSSEG3E8_V_M1 = 10219, PseudoVSSSEG3E8_V_M1_MASK = 10220, PseudoVSSSEG3E8_V_M2 = 10221, PseudoVSSSEG3E8_V_M2_MASK = 10222, PseudoVSSSEG3E8_V_MF2 = 10223, PseudoVSSSEG3E8_V_MF2_MASK = 10224, PseudoVSSSEG3E8_V_MF4 = 10225, PseudoVSSSEG3E8_V_MF4_MASK = 10226, PseudoVSSSEG3E8_V_MF8 = 10227, PseudoVSSSEG3E8_V_MF8_MASK = 10228, PseudoVSSSEG4E16_V_M1 = 10229, PseudoVSSSEG4E16_V_M1_MASK = 10230, PseudoVSSSEG4E16_V_M2 = 10231, PseudoVSSSEG4E16_V_M2_MASK = 10232, PseudoVSSSEG4E16_V_MF2 = 10233, PseudoVSSSEG4E16_V_MF2_MASK = 10234, PseudoVSSSEG4E16_V_MF4 = 10235, PseudoVSSSEG4E16_V_MF4_MASK = 10236, PseudoVSSSEG4E32_V_M1 = 10237, PseudoVSSSEG4E32_V_M1_MASK = 10238, PseudoVSSSEG4E32_V_M2 = 10239, PseudoVSSSEG4E32_V_M2_MASK = 10240, PseudoVSSSEG4E32_V_MF2 = 10241, PseudoVSSSEG4E32_V_MF2_MASK = 10242, PseudoVSSSEG4E64_V_M1 = 10243, PseudoVSSSEG4E64_V_M1_MASK = 10244, PseudoVSSSEG4E64_V_M2 = 10245, PseudoVSSSEG4E64_V_M2_MASK = 10246, PseudoVSSSEG4E8_V_M1 = 10247, PseudoVSSSEG4E8_V_M1_MASK = 10248, PseudoVSSSEG4E8_V_M2 = 10249, PseudoVSSSEG4E8_V_M2_MASK = 10250, PseudoVSSSEG4E8_V_MF2 = 10251, PseudoVSSSEG4E8_V_MF2_MASK = 10252, PseudoVSSSEG4E8_V_MF4 = 10253, PseudoVSSSEG4E8_V_MF4_MASK = 10254, PseudoVSSSEG4E8_V_MF8 = 10255, PseudoVSSSEG4E8_V_MF8_MASK = 10256, PseudoVSSSEG5E16_V_M1 = 10257, PseudoVSSSEG5E16_V_M1_MASK = 10258, PseudoVSSSEG5E16_V_MF2 = 10259, PseudoVSSSEG5E16_V_MF2_MASK = 10260, PseudoVSSSEG5E16_V_MF4 = 10261, PseudoVSSSEG5E16_V_MF4_MASK = 10262, PseudoVSSSEG5E32_V_M1 = 10263, PseudoVSSSEG5E32_V_M1_MASK = 10264, PseudoVSSSEG5E32_V_MF2 = 10265, PseudoVSSSEG5E32_V_MF2_MASK = 10266, PseudoVSSSEG5E64_V_M1 = 10267, PseudoVSSSEG5E64_V_M1_MASK = 10268, PseudoVSSSEG5E8_V_M1 = 10269, PseudoVSSSEG5E8_V_M1_MASK = 10270, PseudoVSSSEG5E8_V_MF2 = 10271, PseudoVSSSEG5E8_V_MF2_MASK = 10272, PseudoVSSSEG5E8_V_MF4 = 10273, PseudoVSSSEG5E8_V_MF4_MASK = 10274, PseudoVSSSEG5E8_V_MF8 = 10275, PseudoVSSSEG5E8_V_MF8_MASK = 10276, PseudoVSSSEG6E16_V_M1 = 10277, PseudoVSSSEG6E16_V_M1_MASK = 10278, PseudoVSSSEG6E16_V_MF2 = 10279, PseudoVSSSEG6E16_V_MF2_MASK = 10280, PseudoVSSSEG6E16_V_MF4 = 10281, PseudoVSSSEG6E16_V_MF4_MASK = 10282, PseudoVSSSEG6E32_V_M1 = 10283, PseudoVSSSEG6E32_V_M1_MASK = 10284, PseudoVSSSEG6E32_V_MF2 = 10285, PseudoVSSSEG6E32_V_MF2_MASK = 10286, PseudoVSSSEG6E64_V_M1 = 10287, PseudoVSSSEG6E64_V_M1_MASK = 10288, PseudoVSSSEG6E8_V_M1 = 10289, PseudoVSSSEG6E8_V_M1_MASK = 10290, PseudoVSSSEG6E8_V_MF2 = 10291, PseudoVSSSEG6E8_V_MF2_MASK = 10292, PseudoVSSSEG6E8_V_MF4 = 10293, PseudoVSSSEG6E8_V_MF4_MASK = 10294, PseudoVSSSEG6E8_V_MF8 = 10295, PseudoVSSSEG6E8_V_MF8_MASK = 10296, PseudoVSSSEG7E16_V_M1 = 10297, PseudoVSSSEG7E16_V_M1_MASK = 10298, PseudoVSSSEG7E16_V_MF2 = 10299, PseudoVSSSEG7E16_V_MF2_MASK = 10300, PseudoVSSSEG7E16_V_MF4 = 10301, PseudoVSSSEG7E16_V_MF4_MASK = 10302, PseudoVSSSEG7E32_V_M1 = 10303, PseudoVSSSEG7E32_V_M1_MASK = 10304, PseudoVSSSEG7E32_V_MF2 = 10305, PseudoVSSSEG7E32_V_MF2_MASK = 10306, PseudoVSSSEG7E64_V_M1 = 10307, PseudoVSSSEG7E64_V_M1_MASK = 10308, PseudoVSSSEG7E8_V_M1 = 10309, PseudoVSSSEG7E8_V_M1_MASK = 10310, PseudoVSSSEG7E8_V_MF2 = 10311, PseudoVSSSEG7E8_V_MF2_MASK = 10312, PseudoVSSSEG7E8_V_MF4 = 10313, PseudoVSSSEG7E8_V_MF4_MASK = 10314, PseudoVSSSEG7E8_V_MF8 = 10315, PseudoVSSSEG7E8_V_MF8_MASK = 10316, PseudoVSSSEG8E16_V_M1 = 10317, PseudoVSSSEG8E16_V_M1_MASK = 10318, PseudoVSSSEG8E16_V_MF2 = 10319, PseudoVSSSEG8E16_V_MF2_MASK = 10320, PseudoVSSSEG8E16_V_MF4 = 10321, PseudoVSSSEG8E16_V_MF4_MASK = 10322, PseudoVSSSEG8E32_V_M1 = 10323, PseudoVSSSEG8E32_V_M1_MASK = 10324, PseudoVSSSEG8E32_V_MF2 = 10325, PseudoVSSSEG8E32_V_MF2_MASK = 10326, PseudoVSSSEG8E64_V_M1 = 10327, PseudoVSSSEG8E64_V_M1_MASK = 10328, PseudoVSSSEG8E8_V_M1 = 10329, PseudoVSSSEG8E8_V_M1_MASK = 10330, PseudoVSSSEG8E8_V_MF2 = 10331, PseudoVSSSEG8E8_V_MF2_MASK = 10332, PseudoVSSSEG8E8_V_MF4 = 10333, PseudoVSSSEG8E8_V_MF4_MASK = 10334, PseudoVSSSEG8E8_V_MF8 = 10335, PseudoVSSSEG8E8_V_MF8_MASK = 10336, PseudoVSSUBU_VV_M1 = 10337, PseudoVSSUBU_VV_M1_MASK = 10338, PseudoVSSUBU_VV_M1_TU = 10339, PseudoVSSUBU_VV_M2 = 10340, PseudoVSSUBU_VV_M2_MASK = 10341, PseudoVSSUBU_VV_M2_TU = 10342, PseudoVSSUBU_VV_M4 = 10343, PseudoVSSUBU_VV_M4_MASK = 10344, PseudoVSSUBU_VV_M4_TU = 10345, PseudoVSSUBU_VV_M8 = 10346, PseudoVSSUBU_VV_M8_MASK = 10347, PseudoVSSUBU_VV_M8_TU = 10348, PseudoVSSUBU_VV_MF2 = 10349, PseudoVSSUBU_VV_MF2_MASK = 10350, PseudoVSSUBU_VV_MF2_TU = 10351, PseudoVSSUBU_VV_MF4 = 10352, PseudoVSSUBU_VV_MF4_MASK = 10353, PseudoVSSUBU_VV_MF4_TU = 10354, PseudoVSSUBU_VV_MF8 = 10355, PseudoVSSUBU_VV_MF8_MASK = 10356, PseudoVSSUBU_VV_MF8_TU = 10357, PseudoVSSUBU_VX_M1 = 10358, PseudoVSSUBU_VX_M1_MASK = 10359, PseudoVSSUBU_VX_M1_TU = 10360, PseudoVSSUBU_VX_M2 = 10361, PseudoVSSUBU_VX_M2_MASK = 10362, PseudoVSSUBU_VX_M2_TU = 10363, PseudoVSSUBU_VX_M4 = 10364, PseudoVSSUBU_VX_M4_MASK = 10365, PseudoVSSUBU_VX_M4_TU = 10366, PseudoVSSUBU_VX_M8 = 10367, PseudoVSSUBU_VX_M8_MASK = 10368, PseudoVSSUBU_VX_M8_TU = 10369, PseudoVSSUBU_VX_MF2 = 10370, PseudoVSSUBU_VX_MF2_MASK = 10371, PseudoVSSUBU_VX_MF2_TU = 10372, PseudoVSSUBU_VX_MF4 = 10373, PseudoVSSUBU_VX_MF4_MASK = 10374, PseudoVSSUBU_VX_MF4_TU = 10375, PseudoVSSUBU_VX_MF8 = 10376, PseudoVSSUBU_VX_MF8_MASK = 10377, PseudoVSSUBU_VX_MF8_TU = 10378, PseudoVSSUB_VV_M1 = 10379, PseudoVSSUB_VV_M1_MASK = 10380, PseudoVSSUB_VV_M1_TU = 10381, PseudoVSSUB_VV_M2 = 10382, PseudoVSSUB_VV_M2_MASK = 10383, PseudoVSSUB_VV_M2_TU = 10384, PseudoVSSUB_VV_M4 = 10385, PseudoVSSUB_VV_M4_MASK = 10386, PseudoVSSUB_VV_M4_TU = 10387, PseudoVSSUB_VV_M8 = 10388, PseudoVSSUB_VV_M8_MASK = 10389, PseudoVSSUB_VV_M8_TU = 10390, PseudoVSSUB_VV_MF2 = 10391, PseudoVSSUB_VV_MF2_MASK = 10392, PseudoVSSUB_VV_MF2_TU = 10393, PseudoVSSUB_VV_MF4 = 10394, PseudoVSSUB_VV_MF4_MASK = 10395, PseudoVSSUB_VV_MF4_TU = 10396, PseudoVSSUB_VV_MF8 = 10397, PseudoVSSUB_VV_MF8_MASK = 10398, PseudoVSSUB_VV_MF8_TU = 10399, PseudoVSSUB_VX_M1 = 10400, PseudoVSSUB_VX_M1_MASK = 10401, PseudoVSSUB_VX_M1_TU = 10402, PseudoVSSUB_VX_M2 = 10403, PseudoVSSUB_VX_M2_MASK = 10404, PseudoVSSUB_VX_M2_TU = 10405, PseudoVSSUB_VX_M4 = 10406, PseudoVSSUB_VX_M4_MASK = 10407, PseudoVSSUB_VX_M4_TU = 10408, PseudoVSSUB_VX_M8 = 10409, PseudoVSSUB_VX_M8_MASK = 10410, PseudoVSSUB_VX_M8_TU = 10411, PseudoVSSUB_VX_MF2 = 10412, PseudoVSSUB_VX_MF2_MASK = 10413, PseudoVSSUB_VX_MF2_TU = 10414, PseudoVSSUB_VX_MF4 = 10415, PseudoVSSUB_VX_MF4_MASK = 10416, PseudoVSSUB_VX_MF4_TU = 10417, PseudoVSSUB_VX_MF8 = 10418, PseudoVSSUB_VX_MF8_MASK = 10419, PseudoVSSUB_VX_MF8_TU = 10420, PseudoVSUB_VV_M1 = 10421, PseudoVSUB_VV_M1_MASK = 10422, PseudoVSUB_VV_M1_TU = 10423, PseudoVSUB_VV_M2 = 10424, PseudoVSUB_VV_M2_MASK = 10425, PseudoVSUB_VV_M2_TU = 10426, PseudoVSUB_VV_M4 = 10427, PseudoVSUB_VV_M4_MASK = 10428, PseudoVSUB_VV_M4_TU = 10429, PseudoVSUB_VV_M8 = 10430, PseudoVSUB_VV_M8_MASK = 10431, PseudoVSUB_VV_M8_TU = 10432, PseudoVSUB_VV_MF2 = 10433, PseudoVSUB_VV_MF2_MASK = 10434, PseudoVSUB_VV_MF2_TU = 10435, PseudoVSUB_VV_MF4 = 10436, PseudoVSUB_VV_MF4_MASK = 10437, PseudoVSUB_VV_MF4_TU = 10438, PseudoVSUB_VV_MF8 = 10439, PseudoVSUB_VV_MF8_MASK = 10440, PseudoVSUB_VV_MF8_TU = 10441, PseudoVSUB_VX_M1 = 10442, PseudoVSUB_VX_M1_MASK = 10443, PseudoVSUB_VX_M1_TU = 10444, PseudoVSUB_VX_M2 = 10445, PseudoVSUB_VX_M2_MASK = 10446, PseudoVSUB_VX_M2_TU = 10447, PseudoVSUB_VX_M4 = 10448, PseudoVSUB_VX_M4_MASK = 10449, PseudoVSUB_VX_M4_TU = 10450, PseudoVSUB_VX_M8 = 10451, PseudoVSUB_VX_M8_MASK = 10452, PseudoVSUB_VX_M8_TU = 10453, PseudoVSUB_VX_MF2 = 10454, PseudoVSUB_VX_MF2_MASK = 10455, PseudoVSUB_VX_MF2_TU = 10456, PseudoVSUB_VX_MF4 = 10457, PseudoVSUB_VX_MF4_MASK = 10458, PseudoVSUB_VX_MF4_TU = 10459, PseudoVSUB_VX_MF8 = 10460, PseudoVSUB_VX_MF8_MASK = 10461, PseudoVSUB_VX_MF8_TU = 10462, PseudoVSUXEI16_V_M1_M1 = 10463, PseudoVSUXEI16_V_M1_M1_MASK = 10464, PseudoVSUXEI16_V_M1_M2 = 10465, PseudoVSUXEI16_V_M1_M2_MASK = 10466, PseudoVSUXEI16_V_M1_M4 = 10467, PseudoVSUXEI16_V_M1_M4_MASK = 10468, PseudoVSUXEI16_V_M1_MF2 = 10469, PseudoVSUXEI16_V_M1_MF2_MASK = 10470, PseudoVSUXEI16_V_M2_M1 = 10471, PseudoVSUXEI16_V_M2_M1_MASK = 10472, PseudoVSUXEI16_V_M2_M2 = 10473, PseudoVSUXEI16_V_M2_M2_MASK = 10474, PseudoVSUXEI16_V_M2_M4 = 10475, PseudoVSUXEI16_V_M2_M4_MASK = 10476, PseudoVSUXEI16_V_M2_M8 = 10477, PseudoVSUXEI16_V_M2_M8_MASK = 10478, PseudoVSUXEI16_V_M4_M2 = 10479, PseudoVSUXEI16_V_M4_M2_MASK = 10480, PseudoVSUXEI16_V_M4_M4 = 10481, PseudoVSUXEI16_V_M4_M4_MASK = 10482, PseudoVSUXEI16_V_M4_M8 = 10483, PseudoVSUXEI16_V_M4_M8_MASK = 10484, PseudoVSUXEI16_V_M8_M4 = 10485, PseudoVSUXEI16_V_M8_M4_MASK = 10486, PseudoVSUXEI16_V_M8_M8 = 10487, PseudoVSUXEI16_V_M8_M8_MASK = 10488, PseudoVSUXEI16_V_MF2_M1 = 10489, PseudoVSUXEI16_V_MF2_M1_MASK = 10490, PseudoVSUXEI16_V_MF2_M2 = 10491, PseudoVSUXEI16_V_MF2_M2_MASK = 10492, PseudoVSUXEI16_V_MF2_MF2 = 10493, PseudoVSUXEI16_V_MF2_MF2_MASK = 10494, PseudoVSUXEI16_V_MF2_MF4 = 10495, PseudoVSUXEI16_V_MF2_MF4_MASK = 10496, PseudoVSUXEI16_V_MF4_M1 = 10497, PseudoVSUXEI16_V_MF4_M1_MASK = 10498, PseudoVSUXEI16_V_MF4_MF2 = 10499, PseudoVSUXEI16_V_MF4_MF2_MASK = 10500, PseudoVSUXEI16_V_MF4_MF4 = 10501, PseudoVSUXEI16_V_MF4_MF4_MASK = 10502, PseudoVSUXEI16_V_MF4_MF8 = 10503, PseudoVSUXEI16_V_MF4_MF8_MASK = 10504, PseudoVSUXEI32_V_M1_M1 = 10505, PseudoVSUXEI32_V_M1_M1_MASK = 10506, PseudoVSUXEI32_V_M1_M2 = 10507, PseudoVSUXEI32_V_M1_M2_MASK = 10508, PseudoVSUXEI32_V_M1_MF2 = 10509, PseudoVSUXEI32_V_M1_MF2_MASK = 10510, PseudoVSUXEI32_V_M1_MF4 = 10511, PseudoVSUXEI32_V_M1_MF4_MASK = 10512, PseudoVSUXEI32_V_M2_M1 = 10513, PseudoVSUXEI32_V_M2_M1_MASK = 10514, PseudoVSUXEI32_V_M2_M2 = 10515, PseudoVSUXEI32_V_M2_M2_MASK = 10516, PseudoVSUXEI32_V_M2_M4 = 10517, PseudoVSUXEI32_V_M2_M4_MASK = 10518, PseudoVSUXEI32_V_M2_MF2 = 10519, PseudoVSUXEI32_V_M2_MF2_MASK = 10520, PseudoVSUXEI32_V_M4_M1 = 10521, PseudoVSUXEI32_V_M4_M1_MASK = 10522, PseudoVSUXEI32_V_M4_M2 = 10523, PseudoVSUXEI32_V_M4_M2_MASK = 10524, PseudoVSUXEI32_V_M4_M4 = 10525, PseudoVSUXEI32_V_M4_M4_MASK = 10526, PseudoVSUXEI32_V_M4_M8 = 10527, PseudoVSUXEI32_V_M4_M8_MASK = 10528, PseudoVSUXEI32_V_M8_M2 = 10529, PseudoVSUXEI32_V_M8_M2_MASK = 10530, PseudoVSUXEI32_V_M8_M4 = 10531, PseudoVSUXEI32_V_M8_M4_MASK = 10532, PseudoVSUXEI32_V_M8_M8 = 10533, PseudoVSUXEI32_V_M8_M8_MASK = 10534, PseudoVSUXEI32_V_MF2_M1 = 10535, PseudoVSUXEI32_V_MF2_M1_MASK = 10536, PseudoVSUXEI32_V_MF2_MF2 = 10537, PseudoVSUXEI32_V_MF2_MF2_MASK = 10538, PseudoVSUXEI32_V_MF2_MF4 = 10539, PseudoVSUXEI32_V_MF2_MF4_MASK = 10540, PseudoVSUXEI32_V_MF2_MF8 = 10541, PseudoVSUXEI32_V_MF2_MF8_MASK = 10542, PseudoVSUXEI64_V_M1_M1 = 10543, PseudoVSUXEI64_V_M1_M1_MASK = 10544, PseudoVSUXEI64_V_M1_MF2 = 10545, PseudoVSUXEI64_V_M1_MF2_MASK = 10546, PseudoVSUXEI64_V_M1_MF4 = 10547, PseudoVSUXEI64_V_M1_MF4_MASK = 10548, PseudoVSUXEI64_V_M1_MF8 = 10549, PseudoVSUXEI64_V_M1_MF8_MASK = 10550, PseudoVSUXEI64_V_M2_M1 = 10551, PseudoVSUXEI64_V_M2_M1_MASK = 10552, PseudoVSUXEI64_V_M2_M2 = 10553, PseudoVSUXEI64_V_M2_M2_MASK = 10554, PseudoVSUXEI64_V_M2_MF2 = 10555, PseudoVSUXEI64_V_M2_MF2_MASK = 10556, PseudoVSUXEI64_V_M2_MF4 = 10557, PseudoVSUXEI64_V_M2_MF4_MASK = 10558, PseudoVSUXEI64_V_M4_M1 = 10559, PseudoVSUXEI64_V_M4_M1_MASK = 10560, PseudoVSUXEI64_V_M4_M2 = 10561, PseudoVSUXEI64_V_M4_M2_MASK = 10562, PseudoVSUXEI64_V_M4_M4 = 10563, PseudoVSUXEI64_V_M4_M4_MASK = 10564, PseudoVSUXEI64_V_M4_MF2 = 10565, PseudoVSUXEI64_V_M4_MF2_MASK = 10566, PseudoVSUXEI64_V_M8_M1 = 10567, PseudoVSUXEI64_V_M8_M1_MASK = 10568, PseudoVSUXEI64_V_M8_M2 = 10569, PseudoVSUXEI64_V_M8_M2_MASK = 10570, PseudoVSUXEI64_V_M8_M4 = 10571, PseudoVSUXEI64_V_M8_M4_MASK = 10572, PseudoVSUXEI64_V_M8_M8 = 10573, PseudoVSUXEI64_V_M8_M8_MASK = 10574, PseudoVSUXEI8_V_M1_M1 = 10575, PseudoVSUXEI8_V_M1_M1_MASK = 10576, PseudoVSUXEI8_V_M1_M2 = 10577, PseudoVSUXEI8_V_M1_M2_MASK = 10578, PseudoVSUXEI8_V_M1_M4 = 10579, PseudoVSUXEI8_V_M1_M4_MASK = 10580, PseudoVSUXEI8_V_M1_M8 = 10581, PseudoVSUXEI8_V_M1_M8_MASK = 10582, PseudoVSUXEI8_V_M2_M2 = 10583, PseudoVSUXEI8_V_M2_M2_MASK = 10584, PseudoVSUXEI8_V_M2_M4 = 10585, PseudoVSUXEI8_V_M2_M4_MASK = 10586, PseudoVSUXEI8_V_M2_M8 = 10587, PseudoVSUXEI8_V_M2_M8_MASK = 10588, PseudoVSUXEI8_V_M4_M4 = 10589, PseudoVSUXEI8_V_M4_M4_MASK = 10590, PseudoVSUXEI8_V_M4_M8 = 10591, PseudoVSUXEI8_V_M4_M8_MASK = 10592, PseudoVSUXEI8_V_M8_M8 = 10593, PseudoVSUXEI8_V_M8_M8_MASK = 10594, PseudoVSUXEI8_V_MF2_M1 = 10595, PseudoVSUXEI8_V_MF2_M1_MASK = 10596, PseudoVSUXEI8_V_MF2_M2 = 10597, PseudoVSUXEI8_V_MF2_M2_MASK = 10598, PseudoVSUXEI8_V_MF2_M4 = 10599, PseudoVSUXEI8_V_MF2_M4_MASK = 10600, PseudoVSUXEI8_V_MF2_MF2 = 10601, PseudoVSUXEI8_V_MF2_MF2_MASK = 10602, PseudoVSUXEI8_V_MF4_M1 = 10603, PseudoVSUXEI8_V_MF4_M1_MASK = 10604, PseudoVSUXEI8_V_MF4_M2 = 10605, PseudoVSUXEI8_V_MF4_M2_MASK = 10606, PseudoVSUXEI8_V_MF4_MF2 = 10607, PseudoVSUXEI8_V_MF4_MF2_MASK = 10608, PseudoVSUXEI8_V_MF4_MF4 = 10609, PseudoVSUXEI8_V_MF4_MF4_MASK = 10610, PseudoVSUXEI8_V_MF8_M1 = 10611, PseudoVSUXEI8_V_MF8_M1_MASK = 10612, PseudoVSUXEI8_V_MF8_MF2 = 10613, PseudoVSUXEI8_V_MF8_MF2_MASK = 10614, PseudoVSUXEI8_V_MF8_MF4 = 10615, PseudoVSUXEI8_V_MF8_MF4_MASK = 10616, PseudoVSUXEI8_V_MF8_MF8 = 10617, PseudoVSUXEI8_V_MF8_MF8_MASK = 10618, PseudoVSUXSEG2EI16_V_M1_M1 = 10619, PseudoVSUXSEG2EI16_V_M1_M1_MASK = 10620, PseudoVSUXSEG2EI16_V_M1_M2 = 10621, PseudoVSUXSEG2EI16_V_M1_M2_MASK = 10622, PseudoVSUXSEG2EI16_V_M1_M4 = 10623, PseudoVSUXSEG2EI16_V_M1_M4_MASK = 10624, PseudoVSUXSEG2EI16_V_M1_MF2 = 10625, PseudoVSUXSEG2EI16_V_M1_MF2_MASK = 10626, PseudoVSUXSEG2EI16_V_M2_M1 = 10627, PseudoVSUXSEG2EI16_V_M2_M1_MASK = 10628, PseudoVSUXSEG2EI16_V_M2_M2 = 10629, PseudoVSUXSEG2EI16_V_M2_M2_MASK = 10630, PseudoVSUXSEG2EI16_V_M2_M4 = 10631, PseudoVSUXSEG2EI16_V_M2_M4_MASK = 10632, PseudoVSUXSEG2EI16_V_M4_M2 = 10633, PseudoVSUXSEG2EI16_V_M4_M2_MASK = 10634, PseudoVSUXSEG2EI16_V_M4_M4 = 10635, PseudoVSUXSEG2EI16_V_M4_M4_MASK = 10636, PseudoVSUXSEG2EI16_V_M8_M4 = 10637, PseudoVSUXSEG2EI16_V_M8_M4_MASK = 10638, PseudoVSUXSEG2EI16_V_MF2_M1 = 10639, PseudoVSUXSEG2EI16_V_MF2_M1_MASK = 10640, PseudoVSUXSEG2EI16_V_MF2_M2 = 10641, PseudoVSUXSEG2EI16_V_MF2_M2_MASK = 10642, PseudoVSUXSEG2EI16_V_MF2_MF2 = 10643, PseudoVSUXSEG2EI16_V_MF2_MF2_MASK = 10644, PseudoVSUXSEG2EI16_V_MF2_MF4 = 10645, PseudoVSUXSEG2EI16_V_MF2_MF4_MASK = 10646, PseudoVSUXSEG2EI16_V_MF4_M1 = 10647, PseudoVSUXSEG2EI16_V_MF4_M1_MASK = 10648, PseudoVSUXSEG2EI16_V_MF4_MF2 = 10649, PseudoVSUXSEG2EI16_V_MF4_MF2_MASK = 10650, PseudoVSUXSEG2EI16_V_MF4_MF4 = 10651, PseudoVSUXSEG2EI16_V_MF4_MF4_MASK = 10652, PseudoVSUXSEG2EI16_V_MF4_MF8 = 10653, PseudoVSUXSEG2EI16_V_MF4_MF8_MASK = 10654, PseudoVSUXSEG2EI32_V_M1_M1 = 10655, PseudoVSUXSEG2EI32_V_M1_M1_MASK = 10656, PseudoVSUXSEG2EI32_V_M1_M2 = 10657, PseudoVSUXSEG2EI32_V_M1_M2_MASK = 10658, PseudoVSUXSEG2EI32_V_M1_MF2 = 10659, PseudoVSUXSEG2EI32_V_M1_MF2_MASK = 10660, PseudoVSUXSEG2EI32_V_M1_MF4 = 10661, PseudoVSUXSEG2EI32_V_M1_MF4_MASK = 10662, PseudoVSUXSEG2EI32_V_M2_M1 = 10663, PseudoVSUXSEG2EI32_V_M2_M1_MASK = 10664, PseudoVSUXSEG2EI32_V_M2_M2 = 10665, PseudoVSUXSEG2EI32_V_M2_M2_MASK = 10666, PseudoVSUXSEG2EI32_V_M2_M4 = 10667, PseudoVSUXSEG2EI32_V_M2_M4_MASK = 10668, PseudoVSUXSEG2EI32_V_M2_MF2 = 10669, PseudoVSUXSEG2EI32_V_M2_MF2_MASK = 10670, PseudoVSUXSEG2EI32_V_M4_M1 = 10671, PseudoVSUXSEG2EI32_V_M4_M1_MASK = 10672, PseudoVSUXSEG2EI32_V_M4_M2 = 10673, PseudoVSUXSEG2EI32_V_M4_M2_MASK = 10674, PseudoVSUXSEG2EI32_V_M4_M4 = 10675, PseudoVSUXSEG2EI32_V_M4_M4_MASK = 10676, PseudoVSUXSEG2EI32_V_M8_M2 = 10677, PseudoVSUXSEG2EI32_V_M8_M2_MASK = 10678, PseudoVSUXSEG2EI32_V_M8_M4 = 10679, PseudoVSUXSEG2EI32_V_M8_M4_MASK = 10680, PseudoVSUXSEG2EI32_V_MF2_M1 = 10681, PseudoVSUXSEG2EI32_V_MF2_M1_MASK = 10682, PseudoVSUXSEG2EI32_V_MF2_MF2 = 10683, PseudoVSUXSEG2EI32_V_MF2_MF2_MASK = 10684, PseudoVSUXSEG2EI32_V_MF2_MF4 = 10685, PseudoVSUXSEG2EI32_V_MF2_MF4_MASK = 10686, PseudoVSUXSEG2EI32_V_MF2_MF8 = 10687, PseudoVSUXSEG2EI32_V_MF2_MF8_MASK = 10688, PseudoVSUXSEG2EI64_V_M1_M1 = 10689, PseudoVSUXSEG2EI64_V_M1_M1_MASK = 10690, PseudoVSUXSEG2EI64_V_M1_MF2 = 10691, PseudoVSUXSEG2EI64_V_M1_MF2_MASK = 10692, PseudoVSUXSEG2EI64_V_M1_MF4 = 10693, PseudoVSUXSEG2EI64_V_M1_MF4_MASK = 10694, PseudoVSUXSEG2EI64_V_M1_MF8 = 10695, PseudoVSUXSEG2EI64_V_M1_MF8_MASK = 10696, PseudoVSUXSEG2EI64_V_M2_M1 = 10697, PseudoVSUXSEG2EI64_V_M2_M1_MASK = 10698, PseudoVSUXSEG2EI64_V_M2_M2 = 10699, PseudoVSUXSEG2EI64_V_M2_M2_MASK = 10700, PseudoVSUXSEG2EI64_V_M2_MF2 = 10701, PseudoVSUXSEG2EI64_V_M2_MF2_MASK = 10702, PseudoVSUXSEG2EI64_V_M2_MF4 = 10703, PseudoVSUXSEG2EI64_V_M2_MF4_MASK = 10704, PseudoVSUXSEG2EI64_V_M4_M1 = 10705, PseudoVSUXSEG2EI64_V_M4_M1_MASK = 10706, PseudoVSUXSEG2EI64_V_M4_M2 = 10707, PseudoVSUXSEG2EI64_V_M4_M2_MASK = 10708, PseudoVSUXSEG2EI64_V_M4_M4 = 10709, PseudoVSUXSEG2EI64_V_M4_M4_MASK = 10710, PseudoVSUXSEG2EI64_V_M4_MF2 = 10711, PseudoVSUXSEG2EI64_V_M4_MF2_MASK = 10712, PseudoVSUXSEG2EI64_V_M8_M1 = 10713, PseudoVSUXSEG2EI64_V_M8_M1_MASK = 10714, PseudoVSUXSEG2EI64_V_M8_M2 = 10715, PseudoVSUXSEG2EI64_V_M8_M2_MASK = 10716, PseudoVSUXSEG2EI64_V_M8_M4 = 10717, PseudoVSUXSEG2EI64_V_M8_M4_MASK = 10718, PseudoVSUXSEG2EI8_V_M1_M1 = 10719, PseudoVSUXSEG2EI8_V_M1_M1_MASK = 10720, PseudoVSUXSEG2EI8_V_M1_M2 = 10721, PseudoVSUXSEG2EI8_V_M1_M2_MASK = 10722, PseudoVSUXSEG2EI8_V_M1_M4 = 10723, PseudoVSUXSEG2EI8_V_M1_M4_MASK = 10724, PseudoVSUXSEG2EI8_V_M2_M2 = 10725, PseudoVSUXSEG2EI8_V_M2_M2_MASK = 10726, PseudoVSUXSEG2EI8_V_M2_M4 = 10727, PseudoVSUXSEG2EI8_V_M2_M4_MASK = 10728, PseudoVSUXSEG2EI8_V_M4_M4 = 10729, PseudoVSUXSEG2EI8_V_M4_M4_MASK = 10730, PseudoVSUXSEG2EI8_V_MF2_M1 = 10731, PseudoVSUXSEG2EI8_V_MF2_M1_MASK = 10732, PseudoVSUXSEG2EI8_V_MF2_M2 = 10733, PseudoVSUXSEG2EI8_V_MF2_M2_MASK = 10734, PseudoVSUXSEG2EI8_V_MF2_M4 = 10735, PseudoVSUXSEG2EI8_V_MF2_M4_MASK = 10736, PseudoVSUXSEG2EI8_V_MF2_MF2 = 10737, PseudoVSUXSEG2EI8_V_MF2_MF2_MASK = 10738, PseudoVSUXSEG2EI8_V_MF4_M1 = 10739, PseudoVSUXSEG2EI8_V_MF4_M1_MASK = 10740, PseudoVSUXSEG2EI8_V_MF4_M2 = 10741, PseudoVSUXSEG2EI8_V_MF4_M2_MASK = 10742, PseudoVSUXSEG2EI8_V_MF4_MF2 = 10743, PseudoVSUXSEG2EI8_V_MF4_MF2_MASK = 10744, PseudoVSUXSEG2EI8_V_MF4_MF4 = 10745, PseudoVSUXSEG2EI8_V_MF4_MF4_MASK = 10746, PseudoVSUXSEG2EI8_V_MF8_M1 = 10747, PseudoVSUXSEG2EI8_V_MF8_M1_MASK = 10748, PseudoVSUXSEG2EI8_V_MF8_MF2 = 10749, PseudoVSUXSEG2EI8_V_MF8_MF2_MASK = 10750, PseudoVSUXSEG2EI8_V_MF8_MF4 = 10751, PseudoVSUXSEG2EI8_V_MF8_MF4_MASK = 10752, PseudoVSUXSEG2EI8_V_MF8_MF8 = 10753, PseudoVSUXSEG2EI8_V_MF8_MF8_MASK = 10754, PseudoVSUXSEG3EI16_V_M1_M1 = 10755, PseudoVSUXSEG3EI16_V_M1_M1_MASK = 10756, PseudoVSUXSEG3EI16_V_M1_M2 = 10757, PseudoVSUXSEG3EI16_V_M1_M2_MASK = 10758, PseudoVSUXSEG3EI16_V_M1_MF2 = 10759, PseudoVSUXSEG3EI16_V_M1_MF2_MASK = 10760, PseudoVSUXSEG3EI16_V_M2_M1 = 10761, PseudoVSUXSEG3EI16_V_M2_M1_MASK = 10762, PseudoVSUXSEG3EI16_V_M2_M2 = 10763, PseudoVSUXSEG3EI16_V_M2_M2_MASK = 10764, PseudoVSUXSEG3EI16_V_M4_M2 = 10765, PseudoVSUXSEG3EI16_V_M4_M2_MASK = 10766, PseudoVSUXSEG3EI16_V_MF2_M1 = 10767, PseudoVSUXSEG3EI16_V_MF2_M1_MASK = 10768, PseudoVSUXSEG3EI16_V_MF2_M2 = 10769, PseudoVSUXSEG3EI16_V_MF2_M2_MASK = 10770, PseudoVSUXSEG3EI16_V_MF2_MF2 = 10771, PseudoVSUXSEG3EI16_V_MF2_MF2_MASK = 10772, PseudoVSUXSEG3EI16_V_MF2_MF4 = 10773, PseudoVSUXSEG3EI16_V_MF2_MF4_MASK = 10774, PseudoVSUXSEG3EI16_V_MF4_M1 = 10775, PseudoVSUXSEG3EI16_V_MF4_M1_MASK = 10776, PseudoVSUXSEG3EI16_V_MF4_MF2 = 10777, PseudoVSUXSEG3EI16_V_MF4_MF2_MASK = 10778, PseudoVSUXSEG3EI16_V_MF4_MF4 = 10779, PseudoVSUXSEG3EI16_V_MF4_MF4_MASK = 10780, PseudoVSUXSEG3EI16_V_MF4_MF8 = 10781, PseudoVSUXSEG3EI16_V_MF4_MF8_MASK = 10782, PseudoVSUXSEG3EI32_V_M1_M1 = 10783, PseudoVSUXSEG3EI32_V_M1_M1_MASK = 10784, PseudoVSUXSEG3EI32_V_M1_M2 = 10785, PseudoVSUXSEG3EI32_V_M1_M2_MASK = 10786, PseudoVSUXSEG3EI32_V_M1_MF2 = 10787, PseudoVSUXSEG3EI32_V_M1_MF2_MASK = 10788, PseudoVSUXSEG3EI32_V_M1_MF4 = 10789, PseudoVSUXSEG3EI32_V_M1_MF4_MASK = 10790, PseudoVSUXSEG3EI32_V_M2_M1 = 10791, PseudoVSUXSEG3EI32_V_M2_M1_MASK = 10792, PseudoVSUXSEG3EI32_V_M2_M2 = 10793, PseudoVSUXSEG3EI32_V_M2_M2_MASK = 10794, PseudoVSUXSEG3EI32_V_M2_MF2 = 10795, PseudoVSUXSEG3EI32_V_M2_MF2_MASK = 10796, PseudoVSUXSEG3EI32_V_M4_M1 = 10797, PseudoVSUXSEG3EI32_V_M4_M1_MASK = 10798, PseudoVSUXSEG3EI32_V_M4_M2 = 10799, PseudoVSUXSEG3EI32_V_M4_M2_MASK = 10800, PseudoVSUXSEG3EI32_V_M8_M2 = 10801, PseudoVSUXSEG3EI32_V_M8_M2_MASK = 10802, PseudoVSUXSEG3EI32_V_MF2_M1 = 10803, PseudoVSUXSEG3EI32_V_MF2_M1_MASK = 10804, PseudoVSUXSEG3EI32_V_MF2_MF2 = 10805, PseudoVSUXSEG3EI32_V_MF2_MF2_MASK = 10806, PseudoVSUXSEG3EI32_V_MF2_MF4 = 10807, PseudoVSUXSEG3EI32_V_MF2_MF4_MASK = 10808, PseudoVSUXSEG3EI32_V_MF2_MF8 = 10809, PseudoVSUXSEG3EI32_V_MF2_MF8_MASK = 10810, PseudoVSUXSEG3EI64_V_M1_M1 = 10811, PseudoVSUXSEG3EI64_V_M1_M1_MASK = 10812, PseudoVSUXSEG3EI64_V_M1_MF2 = 10813, PseudoVSUXSEG3EI64_V_M1_MF2_MASK = 10814, PseudoVSUXSEG3EI64_V_M1_MF4 = 10815, PseudoVSUXSEG3EI64_V_M1_MF4_MASK = 10816, PseudoVSUXSEG3EI64_V_M1_MF8 = 10817, PseudoVSUXSEG3EI64_V_M1_MF8_MASK = 10818, PseudoVSUXSEG3EI64_V_M2_M1 = 10819, PseudoVSUXSEG3EI64_V_M2_M1_MASK = 10820, PseudoVSUXSEG3EI64_V_M2_M2 = 10821, PseudoVSUXSEG3EI64_V_M2_M2_MASK = 10822, PseudoVSUXSEG3EI64_V_M2_MF2 = 10823, PseudoVSUXSEG3EI64_V_M2_MF2_MASK = 10824, PseudoVSUXSEG3EI64_V_M2_MF4 = 10825, PseudoVSUXSEG3EI64_V_M2_MF4_MASK = 10826, PseudoVSUXSEG3EI64_V_M4_M1 = 10827, PseudoVSUXSEG3EI64_V_M4_M1_MASK = 10828, PseudoVSUXSEG3EI64_V_M4_M2 = 10829, PseudoVSUXSEG3EI64_V_M4_M2_MASK = 10830, PseudoVSUXSEG3EI64_V_M4_MF2 = 10831, PseudoVSUXSEG3EI64_V_M4_MF2_MASK = 10832, PseudoVSUXSEG3EI64_V_M8_M1 = 10833, PseudoVSUXSEG3EI64_V_M8_M1_MASK = 10834, PseudoVSUXSEG3EI64_V_M8_M2 = 10835, PseudoVSUXSEG3EI64_V_M8_M2_MASK = 10836, PseudoVSUXSEG3EI8_V_M1_M1 = 10837, PseudoVSUXSEG3EI8_V_M1_M1_MASK = 10838, PseudoVSUXSEG3EI8_V_M1_M2 = 10839, PseudoVSUXSEG3EI8_V_M1_M2_MASK = 10840, PseudoVSUXSEG3EI8_V_M2_M2 = 10841, PseudoVSUXSEG3EI8_V_M2_M2_MASK = 10842, PseudoVSUXSEG3EI8_V_MF2_M1 = 10843, PseudoVSUXSEG3EI8_V_MF2_M1_MASK = 10844, PseudoVSUXSEG3EI8_V_MF2_M2 = 10845, PseudoVSUXSEG3EI8_V_MF2_M2_MASK = 10846, PseudoVSUXSEG3EI8_V_MF2_MF2 = 10847, PseudoVSUXSEG3EI8_V_MF2_MF2_MASK = 10848, PseudoVSUXSEG3EI8_V_MF4_M1 = 10849, PseudoVSUXSEG3EI8_V_MF4_M1_MASK = 10850, PseudoVSUXSEG3EI8_V_MF4_M2 = 10851, PseudoVSUXSEG3EI8_V_MF4_M2_MASK = 10852, PseudoVSUXSEG3EI8_V_MF4_MF2 = 10853, PseudoVSUXSEG3EI8_V_MF4_MF2_MASK = 10854, PseudoVSUXSEG3EI8_V_MF4_MF4 = 10855, PseudoVSUXSEG3EI8_V_MF4_MF4_MASK = 10856, PseudoVSUXSEG3EI8_V_MF8_M1 = 10857, PseudoVSUXSEG3EI8_V_MF8_M1_MASK = 10858, PseudoVSUXSEG3EI8_V_MF8_MF2 = 10859, PseudoVSUXSEG3EI8_V_MF8_MF2_MASK = 10860, PseudoVSUXSEG3EI8_V_MF8_MF4 = 10861, PseudoVSUXSEG3EI8_V_MF8_MF4_MASK = 10862, PseudoVSUXSEG3EI8_V_MF8_MF8 = 10863, PseudoVSUXSEG3EI8_V_MF8_MF8_MASK = 10864, PseudoVSUXSEG4EI16_V_M1_M1 = 10865, PseudoVSUXSEG4EI16_V_M1_M1_MASK = 10866, PseudoVSUXSEG4EI16_V_M1_M2 = 10867, PseudoVSUXSEG4EI16_V_M1_M2_MASK = 10868, PseudoVSUXSEG4EI16_V_M1_MF2 = 10869, PseudoVSUXSEG4EI16_V_M1_MF2_MASK = 10870, PseudoVSUXSEG4EI16_V_M2_M1 = 10871, PseudoVSUXSEG4EI16_V_M2_M1_MASK = 10872, PseudoVSUXSEG4EI16_V_M2_M2 = 10873, PseudoVSUXSEG4EI16_V_M2_M2_MASK = 10874, PseudoVSUXSEG4EI16_V_M4_M2 = 10875, PseudoVSUXSEG4EI16_V_M4_M2_MASK = 10876, PseudoVSUXSEG4EI16_V_MF2_M1 = 10877, PseudoVSUXSEG4EI16_V_MF2_M1_MASK = 10878, PseudoVSUXSEG4EI16_V_MF2_M2 = 10879, PseudoVSUXSEG4EI16_V_MF2_M2_MASK = 10880, PseudoVSUXSEG4EI16_V_MF2_MF2 = 10881, PseudoVSUXSEG4EI16_V_MF2_MF2_MASK = 10882, PseudoVSUXSEG4EI16_V_MF2_MF4 = 10883, PseudoVSUXSEG4EI16_V_MF2_MF4_MASK = 10884, PseudoVSUXSEG4EI16_V_MF4_M1 = 10885, PseudoVSUXSEG4EI16_V_MF4_M1_MASK = 10886, PseudoVSUXSEG4EI16_V_MF4_MF2 = 10887, PseudoVSUXSEG4EI16_V_MF4_MF2_MASK = 10888, PseudoVSUXSEG4EI16_V_MF4_MF4 = 10889, PseudoVSUXSEG4EI16_V_MF4_MF4_MASK = 10890, PseudoVSUXSEG4EI16_V_MF4_MF8 = 10891, PseudoVSUXSEG4EI16_V_MF4_MF8_MASK = 10892, PseudoVSUXSEG4EI32_V_M1_M1 = 10893, PseudoVSUXSEG4EI32_V_M1_M1_MASK = 10894, PseudoVSUXSEG4EI32_V_M1_M2 = 10895, PseudoVSUXSEG4EI32_V_M1_M2_MASK = 10896, PseudoVSUXSEG4EI32_V_M1_MF2 = 10897, PseudoVSUXSEG4EI32_V_M1_MF2_MASK = 10898, PseudoVSUXSEG4EI32_V_M1_MF4 = 10899, PseudoVSUXSEG4EI32_V_M1_MF4_MASK = 10900, PseudoVSUXSEG4EI32_V_M2_M1 = 10901, PseudoVSUXSEG4EI32_V_M2_M1_MASK = 10902, PseudoVSUXSEG4EI32_V_M2_M2 = 10903, PseudoVSUXSEG4EI32_V_M2_M2_MASK = 10904, PseudoVSUXSEG4EI32_V_M2_MF2 = 10905, PseudoVSUXSEG4EI32_V_M2_MF2_MASK = 10906, PseudoVSUXSEG4EI32_V_M4_M1 = 10907, PseudoVSUXSEG4EI32_V_M4_M1_MASK = 10908, PseudoVSUXSEG4EI32_V_M4_M2 = 10909, PseudoVSUXSEG4EI32_V_M4_M2_MASK = 10910, PseudoVSUXSEG4EI32_V_M8_M2 = 10911, PseudoVSUXSEG4EI32_V_M8_M2_MASK = 10912, PseudoVSUXSEG4EI32_V_MF2_M1 = 10913, PseudoVSUXSEG4EI32_V_MF2_M1_MASK = 10914, PseudoVSUXSEG4EI32_V_MF2_MF2 = 10915, PseudoVSUXSEG4EI32_V_MF2_MF2_MASK = 10916, PseudoVSUXSEG4EI32_V_MF2_MF4 = 10917, PseudoVSUXSEG4EI32_V_MF2_MF4_MASK = 10918, PseudoVSUXSEG4EI32_V_MF2_MF8 = 10919, PseudoVSUXSEG4EI32_V_MF2_MF8_MASK = 10920, PseudoVSUXSEG4EI64_V_M1_M1 = 10921, PseudoVSUXSEG4EI64_V_M1_M1_MASK = 10922, PseudoVSUXSEG4EI64_V_M1_MF2 = 10923, PseudoVSUXSEG4EI64_V_M1_MF2_MASK = 10924, PseudoVSUXSEG4EI64_V_M1_MF4 = 10925, PseudoVSUXSEG4EI64_V_M1_MF4_MASK = 10926, PseudoVSUXSEG4EI64_V_M1_MF8 = 10927, PseudoVSUXSEG4EI64_V_M1_MF8_MASK = 10928, PseudoVSUXSEG4EI64_V_M2_M1 = 10929, PseudoVSUXSEG4EI64_V_M2_M1_MASK = 10930, PseudoVSUXSEG4EI64_V_M2_M2 = 10931, PseudoVSUXSEG4EI64_V_M2_M2_MASK = 10932, PseudoVSUXSEG4EI64_V_M2_MF2 = 10933, PseudoVSUXSEG4EI64_V_M2_MF2_MASK = 10934, PseudoVSUXSEG4EI64_V_M2_MF4 = 10935, PseudoVSUXSEG4EI64_V_M2_MF4_MASK = 10936, PseudoVSUXSEG4EI64_V_M4_M1 = 10937, PseudoVSUXSEG4EI64_V_M4_M1_MASK = 10938, PseudoVSUXSEG4EI64_V_M4_M2 = 10939, PseudoVSUXSEG4EI64_V_M4_M2_MASK = 10940, PseudoVSUXSEG4EI64_V_M4_MF2 = 10941, PseudoVSUXSEG4EI64_V_M4_MF2_MASK = 10942, PseudoVSUXSEG4EI64_V_M8_M1 = 10943, PseudoVSUXSEG4EI64_V_M8_M1_MASK = 10944, PseudoVSUXSEG4EI64_V_M8_M2 = 10945, PseudoVSUXSEG4EI64_V_M8_M2_MASK = 10946, PseudoVSUXSEG4EI8_V_M1_M1 = 10947, PseudoVSUXSEG4EI8_V_M1_M1_MASK = 10948, PseudoVSUXSEG4EI8_V_M1_M2 = 10949, PseudoVSUXSEG4EI8_V_M1_M2_MASK = 10950, PseudoVSUXSEG4EI8_V_M2_M2 = 10951, PseudoVSUXSEG4EI8_V_M2_M2_MASK = 10952, PseudoVSUXSEG4EI8_V_MF2_M1 = 10953, PseudoVSUXSEG4EI8_V_MF2_M1_MASK = 10954, PseudoVSUXSEG4EI8_V_MF2_M2 = 10955, PseudoVSUXSEG4EI8_V_MF2_M2_MASK = 10956, PseudoVSUXSEG4EI8_V_MF2_MF2 = 10957, PseudoVSUXSEG4EI8_V_MF2_MF2_MASK = 10958, PseudoVSUXSEG4EI8_V_MF4_M1 = 10959, PseudoVSUXSEG4EI8_V_MF4_M1_MASK = 10960, PseudoVSUXSEG4EI8_V_MF4_M2 = 10961, PseudoVSUXSEG4EI8_V_MF4_M2_MASK = 10962, PseudoVSUXSEG4EI8_V_MF4_MF2 = 10963, PseudoVSUXSEG4EI8_V_MF4_MF2_MASK = 10964, PseudoVSUXSEG4EI8_V_MF4_MF4 = 10965, PseudoVSUXSEG4EI8_V_MF4_MF4_MASK = 10966, PseudoVSUXSEG4EI8_V_MF8_M1 = 10967, PseudoVSUXSEG4EI8_V_MF8_M1_MASK = 10968, PseudoVSUXSEG4EI8_V_MF8_MF2 = 10969, PseudoVSUXSEG4EI8_V_MF8_MF2_MASK = 10970, PseudoVSUXSEG4EI8_V_MF8_MF4 = 10971, PseudoVSUXSEG4EI8_V_MF8_MF4_MASK = 10972, PseudoVSUXSEG4EI8_V_MF8_MF8 = 10973, PseudoVSUXSEG4EI8_V_MF8_MF8_MASK = 10974, PseudoVSUXSEG5EI16_V_M1_M1 = 10975, PseudoVSUXSEG5EI16_V_M1_M1_MASK = 10976, PseudoVSUXSEG5EI16_V_M1_MF2 = 10977, PseudoVSUXSEG5EI16_V_M1_MF2_MASK = 10978, PseudoVSUXSEG5EI16_V_M2_M1 = 10979, PseudoVSUXSEG5EI16_V_M2_M1_MASK = 10980, PseudoVSUXSEG5EI16_V_MF2_M1 = 10981, PseudoVSUXSEG5EI16_V_MF2_M1_MASK = 10982, PseudoVSUXSEG5EI16_V_MF2_MF2 = 10983, PseudoVSUXSEG5EI16_V_MF2_MF2_MASK = 10984, PseudoVSUXSEG5EI16_V_MF2_MF4 = 10985, PseudoVSUXSEG5EI16_V_MF2_MF4_MASK = 10986, PseudoVSUXSEG5EI16_V_MF4_M1 = 10987, PseudoVSUXSEG5EI16_V_MF4_M1_MASK = 10988, PseudoVSUXSEG5EI16_V_MF4_MF2 = 10989, PseudoVSUXSEG5EI16_V_MF4_MF2_MASK = 10990, PseudoVSUXSEG5EI16_V_MF4_MF4 = 10991, PseudoVSUXSEG5EI16_V_MF4_MF4_MASK = 10992, PseudoVSUXSEG5EI16_V_MF4_MF8 = 10993, PseudoVSUXSEG5EI16_V_MF4_MF8_MASK = 10994, PseudoVSUXSEG5EI32_V_M1_M1 = 10995, PseudoVSUXSEG5EI32_V_M1_M1_MASK = 10996, PseudoVSUXSEG5EI32_V_M1_MF2 = 10997, PseudoVSUXSEG5EI32_V_M1_MF2_MASK = 10998, PseudoVSUXSEG5EI32_V_M1_MF4 = 10999, PseudoVSUXSEG5EI32_V_M1_MF4_MASK = 11000, PseudoVSUXSEG5EI32_V_M2_M1 = 11001, PseudoVSUXSEG5EI32_V_M2_M1_MASK = 11002, PseudoVSUXSEG5EI32_V_M2_MF2 = 11003, PseudoVSUXSEG5EI32_V_M2_MF2_MASK = 11004, PseudoVSUXSEG5EI32_V_M4_M1 = 11005, PseudoVSUXSEG5EI32_V_M4_M1_MASK = 11006, PseudoVSUXSEG5EI32_V_MF2_M1 = 11007, PseudoVSUXSEG5EI32_V_MF2_M1_MASK = 11008, PseudoVSUXSEG5EI32_V_MF2_MF2 = 11009, PseudoVSUXSEG5EI32_V_MF2_MF2_MASK = 11010, PseudoVSUXSEG5EI32_V_MF2_MF4 = 11011, PseudoVSUXSEG5EI32_V_MF2_MF4_MASK = 11012, PseudoVSUXSEG5EI32_V_MF2_MF8 = 11013, PseudoVSUXSEG5EI32_V_MF2_MF8_MASK = 11014, PseudoVSUXSEG5EI64_V_M1_M1 = 11015, PseudoVSUXSEG5EI64_V_M1_M1_MASK = 11016, PseudoVSUXSEG5EI64_V_M1_MF2 = 11017, PseudoVSUXSEG5EI64_V_M1_MF2_MASK = 11018, PseudoVSUXSEG5EI64_V_M1_MF4 = 11019, PseudoVSUXSEG5EI64_V_M1_MF4_MASK = 11020, PseudoVSUXSEG5EI64_V_M1_MF8 = 11021, PseudoVSUXSEG5EI64_V_M1_MF8_MASK = 11022, PseudoVSUXSEG5EI64_V_M2_M1 = 11023, PseudoVSUXSEG5EI64_V_M2_M1_MASK = 11024, PseudoVSUXSEG5EI64_V_M2_MF2 = 11025, PseudoVSUXSEG5EI64_V_M2_MF2_MASK = 11026, PseudoVSUXSEG5EI64_V_M2_MF4 = 11027, PseudoVSUXSEG5EI64_V_M2_MF4_MASK = 11028, PseudoVSUXSEG5EI64_V_M4_M1 = 11029, PseudoVSUXSEG5EI64_V_M4_M1_MASK = 11030, PseudoVSUXSEG5EI64_V_M4_MF2 = 11031, PseudoVSUXSEG5EI64_V_M4_MF2_MASK = 11032, PseudoVSUXSEG5EI64_V_M8_M1 = 11033, PseudoVSUXSEG5EI64_V_M8_M1_MASK = 11034, PseudoVSUXSEG5EI8_V_M1_M1 = 11035, PseudoVSUXSEG5EI8_V_M1_M1_MASK = 11036, PseudoVSUXSEG5EI8_V_MF2_M1 = 11037, PseudoVSUXSEG5EI8_V_MF2_M1_MASK = 11038, PseudoVSUXSEG5EI8_V_MF2_MF2 = 11039, PseudoVSUXSEG5EI8_V_MF2_MF2_MASK = 11040, PseudoVSUXSEG5EI8_V_MF4_M1 = 11041, PseudoVSUXSEG5EI8_V_MF4_M1_MASK = 11042, PseudoVSUXSEG5EI8_V_MF4_MF2 = 11043, PseudoVSUXSEG5EI8_V_MF4_MF2_MASK = 11044, PseudoVSUXSEG5EI8_V_MF4_MF4 = 11045, PseudoVSUXSEG5EI8_V_MF4_MF4_MASK = 11046, PseudoVSUXSEG5EI8_V_MF8_M1 = 11047, PseudoVSUXSEG5EI8_V_MF8_M1_MASK = 11048, PseudoVSUXSEG5EI8_V_MF8_MF2 = 11049, PseudoVSUXSEG5EI8_V_MF8_MF2_MASK = 11050, PseudoVSUXSEG5EI8_V_MF8_MF4 = 11051, PseudoVSUXSEG5EI8_V_MF8_MF4_MASK = 11052, PseudoVSUXSEG5EI8_V_MF8_MF8 = 11053, PseudoVSUXSEG5EI8_V_MF8_MF8_MASK = 11054, PseudoVSUXSEG6EI16_V_M1_M1 = 11055, PseudoVSUXSEG6EI16_V_M1_M1_MASK = 11056, PseudoVSUXSEG6EI16_V_M1_MF2 = 11057, PseudoVSUXSEG6EI16_V_M1_MF2_MASK = 11058, PseudoVSUXSEG6EI16_V_M2_M1 = 11059, PseudoVSUXSEG6EI16_V_M2_M1_MASK = 11060, PseudoVSUXSEG6EI16_V_MF2_M1 = 11061, PseudoVSUXSEG6EI16_V_MF2_M1_MASK = 11062, PseudoVSUXSEG6EI16_V_MF2_MF2 = 11063, PseudoVSUXSEG6EI16_V_MF2_MF2_MASK = 11064, PseudoVSUXSEG6EI16_V_MF2_MF4 = 11065, PseudoVSUXSEG6EI16_V_MF2_MF4_MASK = 11066, PseudoVSUXSEG6EI16_V_MF4_M1 = 11067, PseudoVSUXSEG6EI16_V_MF4_M1_MASK = 11068, PseudoVSUXSEG6EI16_V_MF4_MF2 = 11069, PseudoVSUXSEG6EI16_V_MF4_MF2_MASK = 11070, PseudoVSUXSEG6EI16_V_MF4_MF4 = 11071, PseudoVSUXSEG6EI16_V_MF4_MF4_MASK = 11072, PseudoVSUXSEG6EI16_V_MF4_MF8 = 11073, PseudoVSUXSEG6EI16_V_MF4_MF8_MASK = 11074, PseudoVSUXSEG6EI32_V_M1_M1 = 11075, PseudoVSUXSEG6EI32_V_M1_M1_MASK = 11076, PseudoVSUXSEG6EI32_V_M1_MF2 = 11077, PseudoVSUXSEG6EI32_V_M1_MF2_MASK = 11078, PseudoVSUXSEG6EI32_V_M1_MF4 = 11079, PseudoVSUXSEG6EI32_V_M1_MF4_MASK = 11080, PseudoVSUXSEG6EI32_V_M2_M1 = 11081, PseudoVSUXSEG6EI32_V_M2_M1_MASK = 11082, PseudoVSUXSEG6EI32_V_M2_MF2 = 11083, PseudoVSUXSEG6EI32_V_M2_MF2_MASK = 11084, PseudoVSUXSEG6EI32_V_M4_M1 = 11085, PseudoVSUXSEG6EI32_V_M4_M1_MASK = 11086, PseudoVSUXSEG6EI32_V_MF2_M1 = 11087, PseudoVSUXSEG6EI32_V_MF2_M1_MASK = 11088, PseudoVSUXSEG6EI32_V_MF2_MF2 = 11089, PseudoVSUXSEG6EI32_V_MF2_MF2_MASK = 11090, PseudoVSUXSEG6EI32_V_MF2_MF4 = 11091, PseudoVSUXSEG6EI32_V_MF2_MF4_MASK = 11092, PseudoVSUXSEG6EI32_V_MF2_MF8 = 11093, PseudoVSUXSEG6EI32_V_MF2_MF8_MASK = 11094, PseudoVSUXSEG6EI64_V_M1_M1 = 11095, PseudoVSUXSEG6EI64_V_M1_M1_MASK = 11096, PseudoVSUXSEG6EI64_V_M1_MF2 = 11097, PseudoVSUXSEG6EI64_V_M1_MF2_MASK = 11098, PseudoVSUXSEG6EI64_V_M1_MF4 = 11099, PseudoVSUXSEG6EI64_V_M1_MF4_MASK = 11100, PseudoVSUXSEG6EI64_V_M1_MF8 = 11101, PseudoVSUXSEG6EI64_V_M1_MF8_MASK = 11102, PseudoVSUXSEG6EI64_V_M2_M1 = 11103, PseudoVSUXSEG6EI64_V_M2_M1_MASK = 11104, PseudoVSUXSEG6EI64_V_M2_MF2 = 11105, PseudoVSUXSEG6EI64_V_M2_MF2_MASK = 11106, PseudoVSUXSEG6EI64_V_M2_MF4 = 11107, PseudoVSUXSEG6EI64_V_M2_MF4_MASK = 11108, PseudoVSUXSEG6EI64_V_M4_M1 = 11109, PseudoVSUXSEG6EI64_V_M4_M1_MASK = 11110, PseudoVSUXSEG6EI64_V_M4_MF2 = 11111, PseudoVSUXSEG6EI64_V_M4_MF2_MASK = 11112, PseudoVSUXSEG6EI64_V_M8_M1 = 11113, PseudoVSUXSEG6EI64_V_M8_M1_MASK = 11114, PseudoVSUXSEG6EI8_V_M1_M1 = 11115, PseudoVSUXSEG6EI8_V_M1_M1_MASK = 11116, PseudoVSUXSEG6EI8_V_MF2_M1 = 11117, PseudoVSUXSEG6EI8_V_MF2_M1_MASK = 11118, PseudoVSUXSEG6EI8_V_MF2_MF2 = 11119, PseudoVSUXSEG6EI8_V_MF2_MF2_MASK = 11120, PseudoVSUXSEG6EI8_V_MF4_M1 = 11121, PseudoVSUXSEG6EI8_V_MF4_M1_MASK = 11122, PseudoVSUXSEG6EI8_V_MF4_MF2 = 11123, PseudoVSUXSEG6EI8_V_MF4_MF2_MASK = 11124, PseudoVSUXSEG6EI8_V_MF4_MF4 = 11125, PseudoVSUXSEG6EI8_V_MF4_MF4_MASK = 11126, PseudoVSUXSEG6EI8_V_MF8_M1 = 11127, PseudoVSUXSEG6EI8_V_MF8_M1_MASK = 11128, PseudoVSUXSEG6EI8_V_MF8_MF2 = 11129, PseudoVSUXSEG6EI8_V_MF8_MF2_MASK = 11130, PseudoVSUXSEG6EI8_V_MF8_MF4 = 11131, PseudoVSUXSEG6EI8_V_MF8_MF4_MASK = 11132, PseudoVSUXSEG6EI8_V_MF8_MF8 = 11133, PseudoVSUXSEG6EI8_V_MF8_MF8_MASK = 11134, PseudoVSUXSEG7EI16_V_M1_M1 = 11135, PseudoVSUXSEG7EI16_V_M1_M1_MASK = 11136, PseudoVSUXSEG7EI16_V_M1_MF2 = 11137, PseudoVSUXSEG7EI16_V_M1_MF2_MASK = 11138, PseudoVSUXSEG7EI16_V_M2_M1 = 11139, PseudoVSUXSEG7EI16_V_M2_M1_MASK = 11140, PseudoVSUXSEG7EI16_V_MF2_M1 = 11141, PseudoVSUXSEG7EI16_V_MF2_M1_MASK = 11142, PseudoVSUXSEG7EI16_V_MF2_MF2 = 11143, PseudoVSUXSEG7EI16_V_MF2_MF2_MASK = 11144, PseudoVSUXSEG7EI16_V_MF2_MF4 = 11145, PseudoVSUXSEG7EI16_V_MF2_MF4_MASK = 11146, PseudoVSUXSEG7EI16_V_MF4_M1 = 11147, PseudoVSUXSEG7EI16_V_MF4_M1_MASK = 11148, PseudoVSUXSEG7EI16_V_MF4_MF2 = 11149, PseudoVSUXSEG7EI16_V_MF4_MF2_MASK = 11150, PseudoVSUXSEG7EI16_V_MF4_MF4 = 11151, PseudoVSUXSEG7EI16_V_MF4_MF4_MASK = 11152, PseudoVSUXSEG7EI16_V_MF4_MF8 = 11153, PseudoVSUXSEG7EI16_V_MF4_MF8_MASK = 11154, PseudoVSUXSEG7EI32_V_M1_M1 = 11155, PseudoVSUXSEG7EI32_V_M1_M1_MASK = 11156, PseudoVSUXSEG7EI32_V_M1_MF2 = 11157, PseudoVSUXSEG7EI32_V_M1_MF2_MASK = 11158, PseudoVSUXSEG7EI32_V_M1_MF4 = 11159, PseudoVSUXSEG7EI32_V_M1_MF4_MASK = 11160, PseudoVSUXSEG7EI32_V_M2_M1 = 11161, PseudoVSUXSEG7EI32_V_M2_M1_MASK = 11162, PseudoVSUXSEG7EI32_V_M2_MF2 = 11163, PseudoVSUXSEG7EI32_V_M2_MF2_MASK = 11164, PseudoVSUXSEG7EI32_V_M4_M1 = 11165, PseudoVSUXSEG7EI32_V_M4_M1_MASK = 11166, PseudoVSUXSEG7EI32_V_MF2_M1 = 11167, PseudoVSUXSEG7EI32_V_MF2_M1_MASK = 11168, PseudoVSUXSEG7EI32_V_MF2_MF2 = 11169, PseudoVSUXSEG7EI32_V_MF2_MF2_MASK = 11170, PseudoVSUXSEG7EI32_V_MF2_MF4 = 11171, PseudoVSUXSEG7EI32_V_MF2_MF4_MASK = 11172, PseudoVSUXSEG7EI32_V_MF2_MF8 = 11173, PseudoVSUXSEG7EI32_V_MF2_MF8_MASK = 11174, PseudoVSUXSEG7EI64_V_M1_M1 = 11175, PseudoVSUXSEG7EI64_V_M1_M1_MASK = 11176, PseudoVSUXSEG7EI64_V_M1_MF2 = 11177, PseudoVSUXSEG7EI64_V_M1_MF2_MASK = 11178, PseudoVSUXSEG7EI64_V_M1_MF4 = 11179, PseudoVSUXSEG7EI64_V_M1_MF4_MASK = 11180, PseudoVSUXSEG7EI64_V_M1_MF8 = 11181, PseudoVSUXSEG7EI64_V_M1_MF8_MASK = 11182, PseudoVSUXSEG7EI64_V_M2_M1 = 11183, PseudoVSUXSEG7EI64_V_M2_M1_MASK = 11184, PseudoVSUXSEG7EI64_V_M2_MF2 = 11185, PseudoVSUXSEG7EI64_V_M2_MF2_MASK = 11186, PseudoVSUXSEG7EI64_V_M2_MF4 = 11187, PseudoVSUXSEG7EI64_V_M2_MF4_MASK = 11188, PseudoVSUXSEG7EI64_V_M4_M1 = 11189, PseudoVSUXSEG7EI64_V_M4_M1_MASK = 11190, PseudoVSUXSEG7EI64_V_M4_MF2 = 11191, PseudoVSUXSEG7EI64_V_M4_MF2_MASK = 11192, PseudoVSUXSEG7EI64_V_M8_M1 = 11193, PseudoVSUXSEG7EI64_V_M8_M1_MASK = 11194, PseudoVSUXSEG7EI8_V_M1_M1 = 11195, PseudoVSUXSEG7EI8_V_M1_M1_MASK = 11196, PseudoVSUXSEG7EI8_V_MF2_M1 = 11197, PseudoVSUXSEG7EI8_V_MF2_M1_MASK = 11198, PseudoVSUXSEG7EI8_V_MF2_MF2 = 11199, PseudoVSUXSEG7EI8_V_MF2_MF2_MASK = 11200, PseudoVSUXSEG7EI8_V_MF4_M1 = 11201, PseudoVSUXSEG7EI8_V_MF4_M1_MASK = 11202, PseudoVSUXSEG7EI8_V_MF4_MF2 = 11203, PseudoVSUXSEG7EI8_V_MF4_MF2_MASK = 11204, PseudoVSUXSEG7EI8_V_MF4_MF4 = 11205, PseudoVSUXSEG7EI8_V_MF4_MF4_MASK = 11206, PseudoVSUXSEG7EI8_V_MF8_M1 = 11207, PseudoVSUXSEG7EI8_V_MF8_M1_MASK = 11208, PseudoVSUXSEG7EI8_V_MF8_MF2 = 11209, PseudoVSUXSEG7EI8_V_MF8_MF2_MASK = 11210, PseudoVSUXSEG7EI8_V_MF8_MF4 = 11211, PseudoVSUXSEG7EI8_V_MF8_MF4_MASK = 11212, PseudoVSUXSEG7EI8_V_MF8_MF8 = 11213, PseudoVSUXSEG7EI8_V_MF8_MF8_MASK = 11214, PseudoVSUXSEG8EI16_V_M1_M1 = 11215, PseudoVSUXSEG8EI16_V_M1_M1_MASK = 11216, PseudoVSUXSEG8EI16_V_M1_MF2 = 11217, PseudoVSUXSEG8EI16_V_M1_MF2_MASK = 11218, PseudoVSUXSEG8EI16_V_M2_M1 = 11219, PseudoVSUXSEG8EI16_V_M2_M1_MASK = 11220, PseudoVSUXSEG8EI16_V_MF2_M1 = 11221, PseudoVSUXSEG8EI16_V_MF2_M1_MASK = 11222, PseudoVSUXSEG8EI16_V_MF2_MF2 = 11223, PseudoVSUXSEG8EI16_V_MF2_MF2_MASK = 11224, PseudoVSUXSEG8EI16_V_MF2_MF4 = 11225, PseudoVSUXSEG8EI16_V_MF2_MF4_MASK = 11226, PseudoVSUXSEG8EI16_V_MF4_M1 = 11227, PseudoVSUXSEG8EI16_V_MF4_M1_MASK = 11228, PseudoVSUXSEG8EI16_V_MF4_MF2 = 11229, PseudoVSUXSEG8EI16_V_MF4_MF2_MASK = 11230, PseudoVSUXSEG8EI16_V_MF4_MF4 = 11231, PseudoVSUXSEG8EI16_V_MF4_MF4_MASK = 11232, PseudoVSUXSEG8EI16_V_MF4_MF8 = 11233, PseudoVSUXSEG8EI16_V_MF4_MF8_MASK = 11234, PseudoVSUXSEG8EI32_V_M1_M1 = 11235, PseudoVSUXSEG8EI32_V_M1_M1_MASK = 11236, PseudoVSUXSEG8EI32_V_M1_MF2 = 11237, PseudoVSUXSEG8EI32_V_M1_MF2_MASK = 11238, PseudoVSUXSEG8EI32_V_M1_MF4 = 11239, PseudoVSUXSEG8EI32_V_M1_MF4_MASK = 11240, PseudoVSUXSEG8EI32_V_M2_M1 = 11241, PseudoVSUXSEG8EI32_V_M2_M1_MASK = 11242, PseudoVSUXSEG8EI32_V_M2_MF2 = 11243, PseudoVSUXSEG8EI32_V_M2_MF2_MASK = 11244, PseudoVSUXSEG8EI32_V_M4_M1 = 11245, PseudoVSUXSEG8EI32_V_M4_M1_MASK = 11246, PseudoVSUXSEG8EI32_V_MF2_M1 = 11247, PseudoVSUXSEG8EI32_V_MF2_M1_MASK = 11248, PseudoVSUXSEG8EI32_V_MF2_MF2 = 11249, PseudoVSUXSEG8EI32_V_MF2_MF2_MASK = 11250, PseudoVSUXSEG8EI32_V_MF2_MF4 = 11251, PseudoVSUXSEG8EI32_V_MF2_MF4_MASK = 11252, PseudoVSUXSEG8EI32_V_MF2_MF8 = 11253, PseudoVSUXSEG8EI32_V_MF2_MF8_MASK = 11254, PseudoVSUXSEG8EI64_V_M1_M1 = 11255, PseudoVSUXSEG8EI64_V_M1_M1_MASK = 11256, PseudoVSUXSEG8EI64_V_M1_MF2 = 11257, PseudoVSUXSEG8EI64_V_M1_MF2_MASK = 11258, PseudoVSUXSEG8EI64_V_M1_MF4 = 11259, PseudoVSUXSEG8EI64_V_M1_MF4_MASK = 11260, PseudoVSUXSEG8EI64_V_M1_MF8 = 11261, PseudoVSUXSEG8EI64_V_M1_MF8_MASK = 11262, PseudoVSUXSEG8EI64_V_M2_M1 = 11263, PseudoVSUXSEG8EI64_V_M2_M1_MASK = 11264, PseudoVSUXSEG8EI64_V_M2_MF2 = 11265, PseudoVSUXSEG8EI64_V_M2_MF2_MASK = 11266, PseudoVSUXSEG8EI64_V_M2_MF4 = 11267, PseudoVSUXSEG8EI64_V_M2_MF4_MASK = 11268, PseudoVSUXSEG8EI64_V_M4_M1 = 11269, PseudoVSUXSEG8EI64_V_M4_M1_MASK = 11270, PseudoVSUXSEG8EI64_V_M4_MF2 = 11271, PseudoVSUXSEG8EI64_V_M4_MF2_MASK = 11272, PseudoVSUXSEG8EI64_V_M8_M1 = 11273, PseudoVSUXSEG8EI64_V_M8_M1_MASK = 11274, PseudoVSUXSEG8EI8_V_M1_M1 = 11275, PseudoVSUXSEG8EI8_V_M1_M1_MASK = 11276, PseudoVSUXSEG8EI8_V_MF2_M1 = 11277, PseudoVSUXSEG8EI8_V_MF2_M1_MASK = 11278, PseudoVSUXSEG8EI8_V_MF2_MF2 = 11279, PseudoVSUXSEG8EI8_V_MF2_MF2_MASK = 11280, PseudoVSUXSEG8EI8_V_MF4_M1 = 11281, PseudoVSUXSEG8EI8_V_MF4_M1_MASK = 11282, PseudoVSUXSEG8EI8_V_MF4_MF2 = 11283, PseudoVSUXSEG8EI8_V_MF4_MF2_MASK = 11284, PseudoVSUXSEG8EI8_V_MF4_MF4 = 11285, PseudoVSUXSEG8EI8_V_MF4_MF4_MASK = 11286, PseudoVSUXSEG8EI8_V_MF8_M1 = 11287, PseudoVSUXSEG8EI8_V_MF8_M1_MASK = 11288, PseudoVSUXSEG8EI8_V_MF8_MF2 = 11289, PseudoVSUXSEG8EI8_V_MF8_MF2_MASK = 11290, PseudoVSUXSEG8EI8_V_MF8_MF4 = 11291, PseudoVSUXSEG8EI8_V_MF8_MF4_MASK = 11292, PseudoVSUXSEG8EI8_V_MF8_MF8 = 11293, PseudoVSUXSEG8EI8_V_MF8_MF8_MASK = 11294, PseudoVWADDU_VV_M1 = 11295, PseudoVWADDU_VV_M1_MASK = 11296, PseudoVWADDU_VV_M1_TU = 11297, PseudoVWADDU_VV_M2 = 11298, PseudoVWADDU_VV_M2_MASK = 11299, PseudoVWADDU_VV_M2_TU = 11300, PseudoVWADDU_VV_M4 = 11301, PseudoVWADDU_VV_M4_MASK = 11302, PseudoVWADDU_VV_M4_TU = 11303, PseudoVWADDU_VV_MF2 = 11304, PseudoVWADDU_VV_MF2_MASK = 11305, PseudoVWADDU_VV_MF2_TU = 11306, PseudoVWADDU_VV_MF4 = 11307, PseudoVWADDU_VV_MF4_MASK = 11308, PseudoVWADDU_VV_MF4_TU = 11309, PseudoVWADDU_VV_MF8 = 11310, PseudoVWADDU_VV_MF8_MASK = 11311, PseudoVWADDU_VV_MF8_TU = 11312, PseudoVWADDU_VX_M1 = 11313, PseudoVWADDU_VX_M1_MASK = 11314, PseudoVWADDU_VX_M1_TU = 11315, PseudoVWADDU_VX_M2 = 11316, PseudoVWADDU_VX_M2_MASK = 11317, PseudoVWADDU_VX_M2_TU = 11318, PseudoVWADDU_VX_M4 = 11319, PseudoVWADDU_VX_M4_MASK = 11320, PseudoVWADDU_VX_M4_TU = 11321, PseudoVWADDU_VX_MF2 = 11322, PseudoVWADDU_VX_MF2_MASK = 11323, PseudoVWADDU_VX_MF2_TU = 11324, PseudoVWADDU_VX_MF4 = 11325, PseudoVWADDU_VX_MF4_MASK = 11326, PseudoVWADDU_VX_MF4_TU = 11327, PseudoVWADDU_VX_MF8 = 11328, PseudoVWADDU_VX_MF8_MASK = 11329, PseudoVWADDU_VX_MF8_TU = 11330, PseudoVWADDU_WV_M1 = 11331, PseudoVWADDU_WV_M1_MASK = 11332, PseudoVWADDU_WV_M1_MASK_TIED = 11333, PseudoVWADDU_WV_M1_TIED = 11334, PseudoVWADDU_WV_M1_TU = 11335, PseudoVWADDU_WV_M2 = 11336, PseudoVWADDU_WV_M2_MASK = 11337, PseudoVWADDU_WV_M2_MASK_TIED = 11338, PseudoVWADDU_WV_M2_TIED = 11339, PseudoVWADDU_WV_M2_TU = 11340, PseudoVWADDU_WV_M4 = 11341, PseudoVWADDU_WV_M4_MASK = 11342, PseudoVWADDU_WV_M4_MASK_TIED = 11343, PseudoVWADDU_WV_M4_TIED = 11344, PseudoVWADDU_WV_M4_TU = 11345, PseudoVWADDU_WV_MF2 = 11346, PseudoVWADDU_WV_MF2_MASK = 11347, PseudoVWADDU_WV_MF2_MASK_TIED = 11348, PseudoVWADDU_WV_MF2_TIED = 11349, PseudoVWADDU_WV_MF2_TU = 11350, PseudoVWADDU_WV_MF4 = 11351, PseudoVWADDU_WV_MF4_MASK = 11352, PseudoVWADDU_WV_MF4_MASK_TIED = 11353, PseudoVWADDU_WV_MF4_TIED = 11354, PseudoVWADDU_WV_MF4_TU = 11355, PseudoVWADDU_WV_MF8 = 11356, PseudoVWADDU_WV_MF8_MASK = 11357, PseudoVWADDU_WV_MF8_MASK_TIED = 11358, PseudoVWADDU_WV_MF8_TIED = 11359, PseudoVWADDU_WV_MF8_TU = 11360, PseudoVWADDU_WX_M1 = 11361, PseudoVWADDU_WX_M1_MASK = 11362, PseudoVWADDU_WX_M1_TU = 11363, PseudoVWADDU_WX_M2 = 11364, PseudoVWADDU_WX_M2_MASK = 11365, PseudoVWADDU_WX_M2_TU = 11366, PseudoVWADDU_WX_M4 = 11367, PseudoVWADDU_WX_M4_MASK = 11368, PseudoVWADDU_WX_M4_TU = 11369, PseudoVWADDU_WX_MF2 = 11370, PseudoVWADDU_WX_MF2_MASK = 11371, PseudoVWADDU_WX_MF2_TU = 11372, PseudoVWADDU_WX_MF4 = 11373, PseudoVWADDU_WX_MF4_MASK = 11374, PseudoVWADDU_WX_MF4_TU = 11375, PseudoVWADDU_WX_MF8 = 11376, PseudoVWADDU_WX_MF8_MASK = 11377, PseudoVWADDU_WX_MF8_TU = 11378, PseudoVWADD_VV_M1 = 11379, PseudoVWADD_VV_M1_MASK = 11380, PseudoVWADD_VV_M1_TU = 11381, PseudoVWADD_VV_M2 = 11382, PseudoVWADD_VV_M2_MASK = 11383, PseudoVWADD_VV_M2_TU = 11384, PseudoVWADD_VV_M4 = 11385, PseudoVWADD_VV_M4_MASK = 11386, PseudoVWADD_VV_M4_TU = 11387, PseudoVWADD_VV_MF2 = 11388, PseudoVWADD_VV_MF2_MASK = 11389, PseudoVWADD_VV_MF2_TU = 11390, PseudoVWADD_VV_MF4 = 11391, PseudoVWADD_VV_MF4_MASK = 11392, PseudoVWADD_VV_MF4_TU = 11393, PseudoVWADD_VV_MF8 = 11394, PseudoVWADD_VV_MF8_MASK = 11395, PseudoVWADD_VV_MF8_TU = 11396, PseudoVWADD_VX_M1 = 11397, PseudoVWADD_VX_M1_MASK = 11398, PseudoVWADD_VX_M1_TU = 11399, PseudoVWADD_VX_M2 = 11400, PseudoVWADD_VX_M2_MASK = 11401, PseudoVWADD_VX_M2_TU = 11402, PseudoVWADD_VX_M4 = 11403, PseudoVWADD_VX_M4_MASK = 11404, PseudoVWADD_VX_M4_TU = 11405, PseudoVWADD_VX_MF2 = 11406, PseudoVWADD_VX_MF2_MASK = 11407, PseudoVWADD_VX_MF2_TU = 11408, PseudoVWADD_VX_MF4 = 11409, PseudoVWADD_VX_MF4_MASK = 11410, PseudoVWADD_VX_MF4_TU = 11411, PseudoVWADD_VX_MF8 = 11412, PseudoVWADD_VX_MF8_MASK = 11413, PseudoVWADD_VX_MF8_TU = 11414, PseudoVWADD_WV_M1 = 11415, PseudoVWADD_WV_M1_MASK = 11416, PseudoVWADD_WV_M1_MASK_TIED = 11417, PseudoVWADD_WV_M1_TIED = 11418, PseudoVWADD_WV_M1_TU = 11419, PseudoVWADD_WV_M2 = 11420, PseudoVWADD_WV_M2_MASK = 11421, PseudoVWADD_WV_M2_MASK_TIED = 11422, PseudoVWADD_WV_M2_TIED = 11423, PseudoVWADD_WV_M2_TU = 11424, PseudoVWADD_WV_M4 = 11425, PseudoVWADD_WV_M4_MASK = 11426, PseudoVWADD_WV_M4_MASK_TIED = 11427, PseudoVWADD_WV_M4_TIED = 11428, PseudoVWADD_WV_M4_TU = 11429, PseudoVWADD_WV_MF2 = 11430, PseudoVWADD_WV_MF2_MASK = 11431, PseudoVWADD_WV_MF2_MASK_TIED = 11432, PseudoVWADD_WV_MF2_TIED = 11433, PseudoVWADD_WV_MF2_TU = 11434, PseudoVWADD_WV_MF4 = 11435, PseudoVWADD_WV_MF4_MASK = 11436, PseudoVWADD_WV_MF4_MASK_TIED = 11437, PseudoVWADD_WV_MF4_TIED = 11438, PseudoVWADD_WV_MF4_TU = 11439, PseudoVWADD_WV_MF8 = 11440, PseudoVWADD_WV_MF8_MASK = 11441, PseudoVWADD_WV_MF8_MASK_TIED = 11442, PseudoVWADD_WV_MF8_TIED = 11443, PseudoVWADD_WV_MF8_TU = 11444, PseudoVWADD_WX_M1 = 11445, PseudoVWADD_WX_M1_MASK = 11446, PseudoVWADD_WX_M1_TU = 11447, PseudoVWADD_WX_M2 = 11448, PseudoVWADD_WX_M2_MASK = 11449, PseudoVWADD_WX_M2_TU = 11450, PseudoVWADD_WX_M4 = 11451, PseudoVWADD_WX_M4_MASK = 11452, PseudoVWADD_WX_M4_TU = 11453, PseudoVWADD_WX_MF2 = 11454, PseudoVWADD_WX_MF2_MASK = 11455, PseudoVWADD_WX_MF2_TU = 11456, PseudoVWADD_WX_MF4 = 11457, PseudoVWADD_WX_MF4_MASK = 11458, PseudoVWADD_WX_MF4_TU = 11459, PseudoVWADD_WX_MF8 = 11460, PseudoVWADD_WX_MF8_MASK = 11461, PseudoVWADD_WX_MF8_TU = 11462, PseudoVWMACCSU_VV_M1 = 11463, PseudoVWMACCSU_VV_M1_MASK = 11464, PseudoVWMACCSU_VV_M2 = 11465, PseudoVWMACCSU_VV_M2_MASK = 11466, PseudoVWMACCSU_VV_M4 = 11467, PseudoVWMACCSU_VV_M4_MASK = 11468, PseudoVWMACCSU_VV_MF2 = 11469, PseudoVWMACCSU_VV_MF2_MASK = 11470, PseudoVWMACCSU_VV_MF4 = 11471, PseudoVWMACCSU_VV_MF4_MASK = 11472, PseudoVWMACCSU_VV_MF8 = 11473, PseudoVWMACCSU_VV_MF8_MASK = 11474, PseudoVWMACCSU_VX_M1 = 11475, PseudoVWMACCSU_VX_M1_MASK = 11476, PseudoVWMACCSU_VX_M2 = 11477, PseudoVWMACCSU_VX_M2_MASK = 11478, PseudoVWMACCSU_VX_M4 = 11479, PseudoVWMACCSU_VX_M4_MASK = 11480, PseudoVWMACCSU_VX_MF2 = 11481, PseudoVWMACCSU_VX_MF2_MASK = 11482, PseudoVWMACCSU_VX_MF4 = 11483, PseudoVWMACCSU_VX_MF4_MASK = 11484, PseudoVWMACCSU_VX_MF8 = 11485, PseudoVWMACCSU_VX_MF8_MASK = 11486, PseudoVWMACCUS_VX_M1 = 11487, PseudoVWMACCUS_VX_M1_MASK = 11488, PseudoVWMACCUS_VX_M2 = 11489, PseudoVWMACCUS_VX_M2_MASK = 11490, PseudoVWMACCUS_VX_M4 = 11491, PseudoVWMACCUS_VX_M4_MASK = 11492, PseudoVWMACCUS_VX_MF2 = 11493, PseudoVWMACCUS_VX_MF2_MASK = 11494, PseudoVWMACCUS_VX_MF4 = 11495, PseudoVWMACCUS_VX_MF4_MASK = 11496, PseudoVWMACCUS_VX_MF8 = 11497, PseudoVWMACCUS_VX_MF8_MASK = 11498, PseudoVWMACCU_VV_M1 = 11499, PseudoVWMACCU_VV_M1_MASK = 11500, PseudoVWMACCU_VV_M2 = 11501, PseudoVWMACCU_VV_M2_MASK = 11502, PseudoVWMACCU_VV_M4 = 11503, PseudoVWMACCU_VV_M4_MASK = 11504, PseudoVWMACCU_VV_MF2 = 11505, PseudoVWMACCU_VV_MF2_MASK = 11506, PseudoVWMACCU_VV_MF4 = 11507, PseudoVWMACCU_VV_MF4_MASK = 11508, PseudoVWMACCU_VV_MF8 = 11509, PseudoVWMACCU_VV_MF8_MASK = 11510, PseudoVWMACCU_VX_M1 = 11511, PseudoVWMACCU_VX_M1_MASK = 11512, PseudoVWMACCU_VX_M2 = 11513, PseudoVWMACCU_VX_M2_MASK = 11514, PseudoVWMACCU_VX_M4 = 11515, PseudoVWMACCU_VX_M4_MASK = 11516, PseudoVWMACCU_VX_MF2 = 11517, PseudoVWMACCU_VX_MF2_MASK = 11518, PseudoVWMACCU_VX_MF4 = 11519, PseudoVWMACCU_VX_MF4_MASK = 11520, PseudoVWMACCU_VX_MF8 = 11521, PseudoVWMACCU_VX_MF8_MASK = 11522, PseudoVWMACC_VV_M1 = 11523, PseudoVWMACC_VV_M1_MASK = 11524, PseudoVWMACC_VV_M2 = 11525, PseudoVWMACC_VV_M2_MASK = 11526, PseudoVWMACC_VV_M4 = 11527, PseudoVWMACC_VV_M4_MASK = 11528, PseudoVWMACC_VV_MF2 = 11529, PseudoVWMACC_VV_MF2_MASK = 11530, PseudoVWMACC_VV_MF4 = 11531, PseudoVWMACC_VV_MF4_MASK = 11532, PseudoVWMACC_VV_MF8 = 11533, PseudoVWMACC_VV_MF8_MASK = 11534, PseudoVWMACC_VX_M1 = 11535, PseudoVWMACC_VX_M1_MASK = 11536, PseudoVWMACC_VX_M2 = 11537, PseudoVWMACC_VX_M2_MASK = 11538, PseudoVWMACC_VX_M4 = 11539, PseudoVWMACC_VX_M4_MASK = 11540, PseudoVWMACC_VX_MF2 = 11541, PseudoVWMACC_VX_MF2_MASK = 11542, PseudoVWMACC_VX_MF4 = 11543, PseudoVWMACC_VX_MF4_MASK = 11544, PseudoVWMACC_VX_MF8 = 11545, PseudoVWMACC_VX_MF8_MASK = 11546, PseudoVWMULSU_VV_M1 = 11547, PseudoVWMULSU_VV_M1_MASK = 11548, PseudoVWMULSU_VV_M1_TU = 11549, PseudoVWMULSU_VV_M2 = 11550, PseudoVWMULSU_VV_M2_MASK = 11551, PseudoVWMULSU_VV_M2_TU = 11552, PseudoVWMULSU_VV_M4 = 11553, PseudoVWMULSU_VV_M4_MASK = 11554, PseudoVWMULSU_VV_M4_TU = 11555, PseudoVWMULSU_VV_MF2 = 11556, PseudoVWMULSU_VV_MF2_MASK = 11557, PseudoVWMULSU_VV_MF2_TU = 11558, PseudoVWMULSU_VV_MF4 = 11559, PseudoVWMULSU_VV_MF4_MASK = 11560, PseudoVWMULSU_VV_MF4_TU = 11561, PseudoVWMULSU_VV_MF8 = 11562, PseudoVWMULSU_VV_MF8_MASK = 11563, PseudoVWMULSU_VV_MF8_TU = 11564, PseudoVWMULSU_VX_M1 = 11565, PseudoVWMULSU_VX_M1_MASK = 11566, PseudoVWMULSU_VX_M1_TU = 11567, PseudoVWMULSU_VX_M2 = 11568, PseudoVWMULSU_VX_M2_MASK = 11569, PseudoVWMULSU_VX_M2_TU = 11570, PseudoVWMULSU_VX_M4 = 11571, PseudoVWMULSU_VX_M4_MASK = 11572, PseudoVWMULSU_VX_M4_TU = 11573, PseudoVWMULSU_VX_MF2 = 11574, PseudoVWMULSU_VX_MF2_MASK = 11575, PseudoVWMULSU_VX_MF2_TU = 11576, PseudoVWMULSU_VX_MF4 = 11577, PseudoVWMULSU_VX_MF4_MASK = 11578, PseudoVWMULSU_VX_MF4_TU = 11579, PseudoVWMULSU_VX_MF8 = 11580, PseudoVWMULSU_VX_MF8_MASK = 11581, PseudoVWMULSU_VX_MF8_TU = 11582, PseudoVWMULU_VV_M1 = 11583, PseudoVWMULU_VV_M1_MASK = 11584, PseudoVWMULU_VV_M1_TU = 11585, PseudoVWMULU_VV_M2 = 11586, PseudoVWMULU_VV_M2_MASK = 11587, PseudoVWMULU_VV_M2_TU = 11588, PseudoVWMULU_VV_M4 = 11589, PseudoVWMULU_VV_M4_MASK = 11590, PseudoVWMULU_VV_M4_TU = 11591, PseudoVWMULU_VV_MF2 = 11592, PseudoVWMULU_VV_MF2_MASK = 11593, PseudoVWMULU_VV_MF2_TU = 11594, PseudoVWMULU_VV_MF4 = 11595, PseudoVWMULU_VV_MF4_MASK = 11596, PseudoVWMULU_VV_MF4_TU = 11597, PseudoVWMULU_VV_MF8 = 11598, PseudoVWMULU_VV_MF8_MASK = 11599, PseudoVWMULU_VV_MF8_TU = 11600, PseudoVWMULU_VX_M1 = 11601, PseudoVWMULU_VX_M1_MASK = 11602, PseudoVWMULU_VX_M1_TU = 11603, PseudoVWMULU_VX_M2 = 11604, PseudoVWMULU_VX_M2_MASK = 11605, PseudoVWMULU_VX_M2_TU = 11606, PseudoVWMULU_VX_M4 = 11607, PseudoVWMULU_VX_M4_MASK = 11608, PseudoVWMULU_VX_M4_TU = 11609, PseudoVWMULU_VX_MF2 = 11610, PseudoVWMULU_VX_MF2_MASK = 11611, PseudoVWMULU_VX_MF2_TU = 11612, PseudoVWMULU_VX_MF4 = 11613, PseudoVWMULU_VX_MF4_MASK = 11614, PseudoVWMULU_VX_MF4_TU = 11615, PseudoVWMULU_VX_MF8 = 11616, PseudoVWMULU_VX_MF8_MASK = 11617, PseudoVWMULU_VX_MF8_TU = 11618, PseudoVWMUL_VV_M1 = 11619, PseudoVWMUL_VV_M1_MASK = 11620, PseudoVWMUL_VV_M1_TU = 11621, PseudoVWMUL_VV_M2 = 11622, PseudoVWMUL_VV_M2_MASK = 11623, PseudoVWMUL_VV_M2_TU = 11624, PseudoVWMUL_VV_M4 = 11625, PseudoVWMUL_VV_M4_MASK = 11626, PseudoVWMUL_VV_M4_TU = 11627, PseudoVWMUL_VV_MF2 = 11628, PseudoVWMUL_VV_MF2_MASK = 11629, PseudoVWMUL_VV_MF2_TU = 11630, PseudoVWMUL_VV_MF4 = 11631, PseudoVWMUL_VV_MF4_MASK = 11632, PseudoVWMUL_VV_MF4_TU = 11633, PseudoVWMUL_VV_MF8 = 11634, PseudoVWMUL_VV_MF8_MASK = 11635, PseudoVWMUL_VV_MF8_TU = 11636, PseudoVWMUL_VX_M1 = 11637, PseudoVWMUL_VX_M1_MASK = 11638, PseudoVWMUL_VX_M1_TU = 11639, PseudoVWMUL_VX_M2 = 11640, PseudoVWMUL_VX_M2_MASK = 11641, PseudoVWMUL_VX_M2_TU = 11642, PseudoVWMUL_VX_M4 = 11643, PseudoVWMUL_VX_M4_MASK = 11644, PseudoVWMUL_VX_M4_TU = 11645, PseudoVWMUL_VX_MF2 = 11646, PseudoVWMUL_VX_MF2_MASK = 11647, PseudoVWMUL_VX_MF2_TU = 11648, PseudoVWMUL_VX_MF4 = 11649, PseudoVWMUL_VX_MF4_MASK = 11650, PseudoVWMUL_VX_MF4_TU = 11651, PseudoVWMUL_VX_MF8 = 11652, PseudoVWMUL_VX_MF8_MASK = 11653, PseudoVWMUL_VX_MF8_TU = 11654, PseudoVWREDSUMU_VS_M1 = 11655, PseudoVWREDSUMU_VS_M1_MASK = 11656, PseudoVWREDSUMU_VS_M2 = 11657, PseudoVWREDSUMU_VS_M2_MASK = 11658, PseudoVWREDSUMU_VS_M4 = 11659, PseudoVWREDSUMU_VS_M4_MASK = 11660, PseudoVWREDSUMU_VS_M8 = 11661, PseudoVWREDSUMU_VS_M8_MASK = 11662, PseudoVWREDSUMU_VS_MF2 = 11663, PseudoVWREDSUMU_VS_MF2_MASK = 11664, PseudoVWREDSUMU_VS_MF4 = 11665, PseudoVWREDSUMU_VS_MF4_MASK = 11666, PseudoVWREDSUMU_VS_MF8 = 11667, PseudoVWREDSUMU_VS_MF8_MASK = 11668, PseudoVWREDSUM_VS_M1 = 11669, PseudoVWREDSUM_VS_M1_MASK = 11670, PseudoVWREDSUM_VS_M2 = 11671, PseudoVWREDSUM_VS_M2_MASK = 11672, PseudoVWREDSUM_VS_M4 = 11673, PseudoVWREDSUM_VS_M4_MASK = 11674, PseudoVWREDSUM_VS_M8 = 11675, PseudoVWREDSUM_VS_M8_MASK = 11676, PseudoVWREDSUM_VS_MF2 = 11677, PseudoVWREDSUM_VS_MF2_MASK = 11678, PseudoVWREDSUM_VS_MF4 = 11679, PseudoVWREDSUM_VS_MF4_MASK = 11680, PseudoVWREDSUM_VS_MF8 = 11681, PseudoVWREDSUM_VS_MF8_MASK = 11682, PseudoVWSUBU_VV_M1 = 11683, PseudoVWSUBU_VV_M1_MASK = 11684, PseudoVWSUBU_VV_M1_TU = 11685, PseudoVWSUBU_VV_M2 = 11686, PseudoVWSUBU_VV_M2_MASK = 11687, PseudoVWSUBU_VV_M2_TU = 11688, PseudoVWSUBU_VV_M4 = 11689, PseudoVWSUBU_VV_M4_MASK = 11690, PseudoVWSUBU_VV_M4_TU = 11691, PseudoVWSUBU_VV_MF2 = 11692, PseudoVWSUBU_VV_MF2_MASK = 11693, PseudoVWSUBU_VV_MF2_TU = 11694, PseudoVWSUBU_VV_MF4 = 11695, PseudoVWSUBU_VV_MF4_MASK = 11696, PseudoVWSUBU_VV_MF4_TU = 11697, PseudoVWSUBU_VV_MF8 = 11698, PseudoVWSUBU_VV_MF8_MASK = 11699, PseudoVWSUBU_VV_MF8_TU = 11700, PseudoVWSUBU_VX_M1 = 11701, PseudoVWSUBU_VX_M1_MASK = 11702, PseudoVWSUBU_VX_M1_TU = 11703, PseudoVWSUBU_VX_M2 = 11704, PseudoVWSUBU_VX_M2_MASK = 11705, PseudoVWSUBU_VX_M2_TU = 11706, PseudoVWSUBU_VX_M4 = 11707, PseudoVWSUBU_VX_M4_MASK = 11708, PseudoVWSUBU_VX_M4_TU = 11709, PseudoVWSUBU_VX_MF2 = 11710, PseudoVWSUBU_VX_MF2_MASK = 11711, PseudoVWSUBU_VX_MF2_TU = 11712, PseudoVWSUBU_VX_MF4 = 11713, PseudoVWSUBU_VX_MF4_MASK = 11714, PseudoVWSUBU_VX_MF4_TU = 11715, PseudoVWSUBU_VX_MF8 = 11716, PseudoVWSUBU_VX_MF8_MASK = 11717, PseudoVWSUBU_VX_MF8_TU = 11718, PseudoVWSUBU_WV_M1 = 11719, PseudoVWSUBU_WV_M1_MASK = 11720, PseudoVWSUBU_WV_M1_MASK_TIED = 11721, PseudoVWSUBU_WV_M1_TIED = 11722, PseudoVWSUBU_WV_M1_TU = 11723, PseudoVWSUBU_WV_M2 = 11724, PseudoVWSUBU_WV_M2_MASK = 11725, PseudoVWSUBU_WV_M2_MASK_TIED = 11726, PseudoVWSUBU_WV_M2_TIED = 11727, PseudoVWSUBU_WV_M2_TU = 11728, PseudoVWSUBU_WV_M4 = 11729, PseudoVWSUBU_WV_M4_MASK = 11730, PseudoVWSUBU_WV_M4_MASK_TIED = 11731, PseudoVWSUBU_WV_M4_TIED = 11732, PseudoVWSUBU_WV_M4_TU = 11733, PseudoVWSUBU_WV_MF2 = 11734, PseudoVWSUBU_WV_MF2_MASK = 11735, PseudoVWSUBU_WV_MF2_MASK_TIED = 11736, PseudoVWSUBU_WV_MF2_TIED = 11737, PseudoVWSUBU_WV_MF2_TU = 11738, PseudoVWSUBU_WV_MF4 = 11739, PseudoVWSUBU_WV_MF4_MASK = 11740, PseudoVWSUBU_WV_MF4_MASK_TIED = 11741, PseudoVWSUBU_WV_MF4_TIED = 11742, PseudoVWSUBU_WV_MF4_TU = 11743, PseudoVWSUBU_WV_MF8 = 11744, PseudoVWSUBU_WV_MF8_MASK = 11745, PseudoVWSUBU_WV_MF8_MASK_TIED = 11746, PseudoVWSUBU_WV_MF8_TIED = 11747, PseudoVWSUBU_WV_MF8_TU = 11748, PseudoVWSUBU_WX_M1 = 11749, PseudoVWSUBU_WX_M1_MASK = 11750, PseudoVWSUBU_WX_M1_TU = 11751, PseudoVWSUBU_WX_M2 = 11752, PseudoVWSUBU_WX_M2_MASK = 11753, PseudoVWSUBU_WX_M2_TU = 11754, PseudoVWSUBU_WX_M4 = 11755, PseudoVWSUBU_WX_M4_MASK = 11756, PseudoVWSUBU_WX_M4_TU = 11757, PseudoVWSUBU_WX_MF2 = 11758, PseudoVWSUBU_WX_MF2_MASK = 11759, PseudoVWSUBU_WX_MF2_TU = 11760, PseudoVWSUBU_WX_MF4 = 11761, PseudoVWSUBU_WX_MF4_MASK = 11762, PseudoVWSUBU_WX_MF4_TU = 11763, PseudoVWSUBU_WX_MF8 = 11764, PseudoVWSUBU_WX_MF8_MASK = 11765, PseudoVWSUBU_WX_MF8_TU = 11766, PseudoVWSUB_VV_M1 = 11767, PseudoVWSUB_VV_M1_MASK = 11768, PseudoVWSUB_VV_M1_TU = 11769, PseudoVWSUB_VV_M2 = 11770, PseudoVWSUB_VV_M2_MASK = 11771, PseudoVWSUB_VV_M2_TU = 11772, PseudoVWSUB_VV_M4 = 11773, PseudoVWSUB_VV_M4_MASK = 11774, PseudoVWSUB_VV_M4_TU = 11775, PseudoVWSUB_VV_MF2 = 11776, PseudoVWSUB_VV_MF2_MASK = 11777, PseudoVWSUB_VV_MF2_TU = 11778, PseudoVWSUB_VV_MF4 = 11779, PseudoVWSUB_VV_MF4_MASK = 11780, PseudoVWSUB_VV_MF4_TU = 11781, PseudoVWSUB_VV_MF8 = 11782, PseudoVWSUB_VV_MF8_MASK = 11783, PseudoVWSUB_VV_MF8_TU = 11784, PseudoVWSUB_VX_M1 = 11785, PseudoVWSUB_VX_M1_MASK = 11786, PseudoVWSUB_VX_M1_TU = 11787, PseudoVWSUB_VX_M2 = 11788, PseudoVWSUB_VX_M2_MASK = 11789, PseudoVWSUB_VX_M2_TU = 11790, PseudoVWSUB_VX_M4 = 11791, PseudoVWSUB_VX_M4_MASK = 11792, PseudoVWSUB_VX_M4_TU = 11793, PseudoVWSUB_VX_MF2 = 11794, PseudoVWSUB_VX_MF2_MASK = 11795, PseudoVWSUB_VX_MF2_TU = 11796, PseudoVWSUB_VX_MF4 = 11797, PseudoVWSUB_VX_MF4_MASK = 11798, PseudoVWSUB_VX_MF4_TU = 11799, PseudoVWSUB_VX_MF8 = 11800, PseudoVWSUB_VX_MF8_MASK = 11801, PseudoVWSUB_VX_MF8_TU = 11802, PseudoVWSUB_WV_M1 = 11803, PseudoVWSUB_WV_M1_MASK = 11804, PseudoVWSUB_WV_M1_MASK_TIED = 11805, PseudoVWSUB_WV_M1_TIED = 11806, PseudoVWSUB_WV_M1_TU = 11807, PseudoVWSUB_WV_M2 = 11808, PseudoVWSUB_WV_M2_MASK = 11809, PseudoVWSUB_WV_M2_MASK_TIED = 11810, PseudoVWSUB_WV_M2_TIED = 11811, PseudoVWSUB_WV_M2_TU = 11812, PseudoVWSUB_WV_M4 = 11813, PseudoVWSUB_WV_M4_MASK = 11814, PseudoVWSUB_WV_M4_MASK_TIED = 11815, PseudoVWSUB_WV_M4_TIED = 11816, PseudoVWSUB_WV_M4_TU = 11817, PseudoVWSUB_WV_MF2 = 11818, PseudoVWSUB_WV_MF2_MASK = 11819, PseudoVWSUB_WV_MF2_MASK_TIED = 11820, PseudoVWSUB_WV_MF2_TIED = 11821, PseudoVWSUB_WV_MF2_TU = 11822, PseudoVWSUB_WV_MF4 = 11823, PseudoVWSUB_WV_MF4_MASK = 11824, PseudoVWSUB_WV_MF4_MASK_TIED = 11825, PseudoVWSUB_WV_MF4_TIED = 11826, PseudoVWSUB_WV_MF4_TU = 11827, PseudoVWSUB_WV_MF8 = 11828, PseudoVWSUB_WV_MF8_MASK = 11829, PseudoVWSUB_WV_MF8_MASK_TIED = 11830, PseudoVWSUB_WV_MF8_TIED = 11831, PseudoVWSUB_WV_MF8_TU = 11832, PseudoVWSUB_WX_M1 = 11833, PseudoVWSUB_WX_M1_MASK = 11834, PseudoVWSUB_WX_M1_TU = 11835, PseudoVWSUB_WX_M2 = 11836, PseudoVWSUB_WX_M2_MASK = 11837, PseudoVWSUB_WX_M2_TU = 11838, PseudoVWSUB_WX_M4 = 11839, PseudoVWSUB_WX_M4_MASK = 11840, PseudoVWSUB_WX_M4_TU = 11841, PseudoVWSUB_WX_MF2 = 11842, PseudoVWSUB_WX_MF2_MASK = 11843, PseudoVWSUB_WX_MF2_TU = 11844, PseudoVWSUB_WX_MF4 = 11845, PseudoVWSUB_WX_MF4_MASK = 11846, PseudoVWSUB_WX_MF4_TU = 11847, PseudoVWSUB_WX_MF8 = 11848, PseudoVWSUB_WX_MF8_MASK = 11849, PseudoVWSUB_WX_MF8_TU = 11850, PseudoVXOR_VI_M1 = 11851, PseudoVXOR_VI_M1_MASK = 11852, PseudoVXOR_VI_M1_TU = 11853, PseudoVXOR_VI_M2 = 11854, PseudoVXOR_VI_M2_MASK = 11855, PseudoVXOR_VI_M2_TU = 11856, PseudoVXOR_VI_M4 = 11857, PseudoVXOR_VI_M4_MASK = 11858, PseudoVXOR_VI_M4_TU = 11859, PseudoVXOR_VI_M8 = 11860, PseudoVXOR_VI_M8_MASK = 11861, PseudoVXOR_VI_M8_TU = 11862, PseudoVXOR_VI_MF2 = 11863, PseudoVXOR_VI_MF2_MASK = 11864, PseudoVXOR_VI_MF2_TU = 11865, PseudoVXOR_VI_MF4 = 11866, PseudoVXOR_VI_MF4_MASK = 11867, PseudoVXOR_VI_MF4_TU = 11868, PseudoVXOR_VI_MF8 = 11869, PseudoVXOR_VI_MF8_MASK = 11870, PseudoVXOR_VI_MF8_TU = 11871, PseudoVXOR_VV_M1 = 11872, PseudoVXOR_VV_M1_MASK = 11873, PseudoVXOR_VV_M1_TU = 11874, PseudoVXOR_VV_M2 = 11875, PseudoVXOR_VV_M2_MASK = 11876, PseudoVXOR_VV_M2_TU = 11877, PseudoVXOR_VV_M4 = 11878, PseudoVXOR_VV_M4_MASK = 11879, PseudoVXOR_VV_M4_TU = 11880, PseudoVXOR_VV_M8 = 11881, PseudoVXOR_VV_M8_MASK = 11882, PseudoVXOR_VV_M8_TU = 11883, PseudoVXOR_VV_MF2 = 11884, PseudoVXOR_VV_MF2_MASK = 11885, PseudoVXOR_VV_MF2_TU = 11886, PseudoVXOR_VV_MF4 = 11887, PseudoVXOR_VV_MF4_MASK = 11888, PseudoVXOR_VV_MF4_TU = 11889, PseudoVXOR_VV_MF8 = 11890, PseudoVXOR_VV_MF8_MASK = 11891, PseudoVXOR_VV_MF8_TU = 11892, PseudoVXOR_VX_M1 = 11893, PseudoVXOR_VX_M1_MASK = 11894, PseudoVXOR_VX_M1_TU = 11895, PseudoVXOR_VX_M2 = 11896, PseudoVXOR_VX_M2_MASK = 11897, PseudoVXOR_VX_M2_TU = 11898, PseudoVXOR_VX_M4 = 11899, PseudoVXOR_VX_M4_MASK = 11900, PseudoVXOR_VX_M4_TU = 11901, PseudoVXOR_VX_M8 = 11902, PseudoVXOR_VX_M8_MASK = 11903, PseudoVXOR_VX_M8_TU = 11904, PseudoVXOR_VX_MF2 = 11905, PseudoVXOR_VX_MF2_MASK = 11906, PseudoVXOR_VX_MF2_TU = 11907, PseudoVXOR_VX_MF4 = 11908, PseudoVXOR_VX_MF4_MASK = 11909, PseudoVXOR_VX_MF4_TU = 11910, PseudoVXOR_VX_MF8 = 11911, PseudoVXOR_VX_MF8_MASK = 11912, PseudoVXOR_VX_MF8_TU = 11913, PseudoVZEXT_VF2_M1 = 11914, PseudoVZEXT_VF2_M1_MASK = 11915, PseudoVZEXT_VF2_M1_TU = 11916, PseudoVZEXT_VF2_M2 = 11917, PseudoVZEXT_VF2_M2_MASK = 11918, PseudoVZEXT_VF2_M2_TU = 11919, PseudoVZEXT_VF2_M4 = 11920, PseudoVZEXT_VF2_M4_MASK = 11921, PseudoVZEXT_VF2_M4_TU = 11922, PseudoVZEXT_VF2_M8 = 11923, PseudoVZEXT_VF2_M8_MASK = 11924, PseudoVZEXT_VF2_M8_TU = 11925, PseudoVZEXT_VF2_MF2 = 11926, PseudoVZEXT_VF2_MF2_MASK = 11927, PseudoVZEXT_VF2_MF2_TU = 11928, PseudoVZEXT_VF2_MF4 = 11929, PseudoVZEXT_VF2_MF4_MASK = 11930, PseudoVZEXT_VF2_MF4_TU = 11931, PseudoVZEXT_VF4_M1 = 11932, PseudoVZEXT_VF4_M1_MASK = 11933, PseudoVZEXT_VF4_M1_TU = 11934, PseudoVZEXT_VF4_M2 = 11935, PseudoVZEXT_VF4_M2_MASK = 11936, PseudoVZEXT_VF4_M2_TU = 11937, PseudoVZEXT_VF4_M4 = 11938, PseudoVZEXT_VF4_M4_MASK = 11939, PseudoVZEXT_VF4_M4_TU = 11940, PseudoVZEXT_VF4_M8 = 11941, PseudoVZEXT_VF4_M8_MASK = 11942, PseudoVZEXT_VF4_M8_TU = 11943, PseudoVZEXT_VF4_MF2 = 11944, PseudoVZEXT_VF4_MF2_MASK = 11945, PseudoVZEXT_VF4_MF2_TU = 11946, PseudoVZEXT_VF8_M1 = 11947, PseudoVZEXT_VF8_M1_MASK = 11948, PseudoVZEXT_VF8_M1_TU = 11949, PseudoVZEXT_VF8_M2 = 11950, PseudoVZEXT_VF8_M2_MASK = 11951, PseudoVZEXT_VF8_M2_TU = 11952, PseudoVZEXT_VF8_M4 = 11953, PseudoVZEXT_VF8_M4_MASK = 11954, PseudoVZEXT_VF8_M4_TU = 11955, PseudoVZEXT_VF8_M8 = 11956, PseudoVZEXT_VF8_M8_MASK = 11957, PseudoVZEXT_VF8_M8_TU = 11958, PseudoZEXT_H = 11959, PseudoZEXT_W = 11960, ReadCycleWide = 11961, ReadFFLAGS = 11962, ReadFRM = 11963, Select_FPR16_Using_CC_GPR = 11964, Select_FPR32_Using_CC_GPR = 11965, Select_FPR64_Using_CC_GPR = 11966, Select_GPR_Using_CC_GPR = 11967, SplitF64Pseudo = 11968, SwapFRMImm = 11969, WriteFFLAGS = 11970, WriteFRM = 11971, WriteFRMImm = 11972, ADD = 11973, ADDI = 11974, ADDIW = 11975, ADDW = 11976, ADD_UW = 11977, AES32DSI = 11978, AES32DSMI = 11979, AES32ESI = 11980, AES32ESMI = 11981, AES64DS = 11982, AES64DSM = 11983, AES64ES = 11984, AES64ESM = 11985, AES64IM = 11986, AES64KS1I = 11987, AES64KS2 = 11988, AMOADD_D = 11989, AMOADD_D_AQ = 11990, AMOADD_D_AQ_RL = 11991, AMOADD_D_RL = 11992, AMOADD_W = 11993, AMOADD_W_AQ = 11994, AMOADD_W_AQ_RL = 11995, AMOADD_W_RL = 11996, AMOAND_D = 11997, AMOAND_D_AQ = 11998, AMOAND_D_AQ_RL = 11999, AMOAND_D_RL = 12000, AMOAND_W = 12001, AMOAND_W_AQ = 12002, AMOAND_W_AQ_RL = 12003, AMOAND_W_RL = 12004, AMOMAXU_D = 12005, AMOMAXU_D_AQ = 12006, AMOMAXU_D_AQ_RL = 12007, AMOMAXU_D_RL = 12008, AMOMAXU_W = 12009, AMOMAXU_W_AQ = 12010, AMOMAXU_W_AQ_RL = 12011, AMOMAXU_W_RL = 12012, AMOMAX_D = 12013, AMOMAX_D_AQ = 12014, AMOMAX_D_AQ_RL = 12015, AMOMAX_D_RL = 12016, AMOMAX_W = 12017, AMOMAX_W_AQ = 12018, AMOMAX_W_AQ_RL = 12019, AMOMAX_W_RL = 12020, AMOMINU_D = 12021, AMOMINU_D_AQ = 12022, AMOMINU_D_AQ_RL = 12023, AMOMINU_D_RL = 12024, AMOMINU_W = 12025, AMOMINU_W_AQ = 12026, AMOMINU_W_AQ_RL = 12027, AMOMINU_W_RL = 12028, AMOMIN_D = 12029, AMOMIN_D_AQ = 12030, AMOMIN_D_AQ_RL = 12031, AMOMIN_D_RL = 12032, AMOMIN_W = 12033, AMOMIN_W_AQ = 12034, AMOMIN_W_AQ_RL = 12035, AMOMIN_W_RL = 12036, AMOOR_D = 12037, AMOOR_D_AQ = 12038, AMOOR_D_AQ_RL = 12039, AMOOR_D_RL = 12040, AMOOR_W = 12041, AMOOR_W_AQ = 12042, AMOOR_W_AQ_RL = 12043, AMOOR_W_RL = 12044, AMOSWAP_D = 12045, AMOSWAP_D_AQ = 12046, AMOSWAP_D_AQ_RL = 12047, AMOSWAP_D_RL = 12048, AMOSWAP_W = 12049, AMOSWAP_W_AQ = 12050, AMOSWAP_W_AQ_RL = 12051, AMOSWAP_W_RL = 12052, AMOXOR_D = 12053, AMOXOR_D_AQ = 12054, AMOXOR_D_AQ_RL = 12055, AMOXOR_D_RL = 12056, AMOXOR_W = 12057, AMOXOR_W_AQ = 12058, AMOXOR_W_AQ_RL = 12059, AMOXOR_W_RL = 12060, AND = 12061, ANDI = 12062, ANDN = 12063, AUIPC = 12064, BCLR = 12065, BCLRI = 12066, BEQ = 12067, BEXT = 12068, BEXTI = 12069, BGE = 12070, BGEU = 12071, BINV = 12072, BINVI = 12073, BLT = 12074, BLTU = 12075, BNE = 12076, BREV8 = 12077, BSET = 12078, BSETI = 12079, CBO_CLEAN = 12080, CBO_FLUSH = 12081, CBO_INVAL = 12082, CBO_ZERO = 12083, CLMUL = 12084, CLMULH = 12085, CLMULR = 12086, CLZ = 12087, CLZW = 12088, CPOP = 12089, CPOPW = 12090, CSRRC = 12091, CSRRCI = 12092, CSRRS = 12093, CSRRSI = 12094, CSRRW = 12095, CSRRWI = 12096, CTZ = 12097, CTZW = 12098, C_ADD = 12099, C_ADDI = 12100, C_ADDI16SP = 12101, C_ADDI4SPN = 12102, C_ADDIW = 12103, C_ADDI_HINT_IMM_ZERO = 12104, C_ADDI_HINT_X0 = 12105, C_ADDI_NOP = 12106, C_ADDW = 12107, C_ADD_HINT = 12108, C_AND = 12109, C_ANDI = 12110, C_BEQZ = 12111, C_BNEZ = 12112, C_EBREAK = 12113, C_FLD = 12114, C_FLDSP = 12115, C_FLW = 12116, C_FLWSP = 12117, C_FSD = 12118, C_FSDSP = 12119, C_FSW = 12120, C_FSWSP = 12121, C_J = 12122, C_JAL = 12123, C_JALR = 12124, C_JR = 12125, C_LD = 12126, C_LDSP = 12127, C_LI = 12128, C_LI_HINT = 12129, C_LUI = 12130, C_LUI_HINT = 12131, C_LW = 12132, C_LWSP = 12133, C_MV = 12134, C_MV_HINT = 12135, C_NOP = 12136, C_NOP_HINT = 12137, C_OR = 12138, C_SD = 12139, C_SDSP = 12140, C_SLLI = 12141, C_SLLI64_HINT = 12142, C_SLLI_HINT = 12143, C_SRAI = 12144, C_SRAI64_HINT = 12145, C_SRLI = 12146, C_SRLI64_HINT = 12147, C_SUB = 12148, C_SUBW = 12149, C_SW = 12150, C_SWSP = 12151, C_UNIMP = 12152, C_XOR = 12153, DIV = 12154, DIVU = 12155, DIVUW = 12156, DIVW = 12157, DRET = 12158, EBREAK = 12159, ECALL = 12160, FADD_D = 12161, FADD_D_IN32X = 12162, FADD_D_INX = 12163, FADD_H = 12164, FADD_H_INX = 12165, FADD_S = 12166, FADD_S_INX = 12167, FCLASS_D = 12168, FCLASS_D_IN32X = 12169, FCLASS_D_INX = 12170, FCLASS_H = 12171, FCLASS_H_INX = 12172, FCLASS_S = 12173, FCLASS_S_INX = 12174, FCVT_D_H = 12175, FCVT_D_H_INX = 12176, FCVT_D_L = 12177, FCVT_D_LU = 12178, FCVT_D_LU_INX = 12179, FCVT_D_L_INX = 12180, FCVT_D_S = 12181, FCVT_D_S_IN32X = 12182, FCVT_D_S_INX = 12183, FCVT_D_W = 12184, FCVT_D_WU = 12185, FCVT_D_WU_IN32X = 12186, FCVT_D_WU_INX = 12187, FCVT_D_W_IN32X = 12188, FCVT_D_W_INX = 12189, FCVT_H_D = 12190, FCVT_H_D_INX = 12191, FCVT_H_L = 12192, FCVT_H_LU = 12193, FCVT_H_LU_INX = 12194, FCVT_H_L_INX = 12195, FCVT_H_S = 12196, FCVT_H_S_INX = 12197, FCVT_H_W = 12198, FCVT_H_WU = 12199, FCVT_H_WU_INX = 12200, FCVT_H_W_INX = 12201, FCVT_LU_D = 12202, FCVT_LU_D_INX = 12203, FCVT_LU_H = 12204, FCVT_LU_H_INX = 12205, FCVT_LU_S = 12206, FCVT_LU_S_INX = 12207, FCVT_L_D = 12208, FCVT_L_D_INX = 12209, FCVT_L_H = 12210, FCVT_L_H_INX = 12211, FCVT_L_S = 12212, FCVT_L_S_INX = 12213, FCVT_S_D = 12214, FCVT_S_D_IN32X = 12215, FCVT_S_D_INX = 12216, FCVT_S_H = 12217, FCVT_S_H_INX = 12218, FCVT_S_L = 12219, FCVT_S_LU = 12220, FCVT_S_LU_INX = 12221, FCVT_S_L_INX = 12222, FCVT_S_W = 12223, FCVT_S_WU = 12224, FCVT_S_WU_INX = 12225, FCVT_S_W_INX = 12226, FCVT_WU_D = 12227, FCVT_WU_D_IN32X = 12228, FCVT_WU_D_INX = 12229, FCVT_WU_H = 12230, FCVT_WU_H_INX = 12231, FCVT_WU_S = 12232, FCVT_WU_S_INX = 12233, FCVT_W_D = 12234, FCVT_W_D_IN32X = 12235, FCVT_W_D_INX = 12236, FCVT_W_H = 12237, FCVT_W_H_INX = 12238, FCVT_W_S = 12239, FCVT_W_S_INX = 12240, FDIV_D = 12241, FDIV_D_IN32X = 12242, FDIV_D_INX = 12243, FDIV_H = 12244, FDIV_H_INX = 12245, FDIV_S = 12246, FDIV_S_INX = 12247, FENCE = 12248, FENCE_I = 12249, FENCE_TSO = 12250, FEQ_D = 12251, FEQ_D_IN32X = 12252, FEQ_D_INX = 12253, FEQ_H = 12254, FEQ_H_INX = 12255, FEQ_S = 12256, FEQ_S_INX = 12257, FLD = 12258, FLE_D = 12259, FLE_D_IN32X = 12260, FLE_D_INX = 12261, FLE_H = 12262, FLE_H_INX = 12263, FLE_S = 12264, FLE_S_INX = 12265, FLH = 12266, FLT_D = 12267, FLT_D_IN32X = 12268, FLT_D_INX = 12269, FLT_H = 12270, FLT_H_INX = 12271, FLT_S = 12272, FLT_S_INX = 12273, FLW = 12274, FMADD_D = 12275, FMADD_D_IN32X = 12276, FMADD_D_INX = 12277, FMADD_H = 12278, FMADD_H_INX = 12279, FMADD_S = 12280, FMADD_S_INX = 12281, FMAX_D = 12282, FMAX_D_IN32X = 12283, FMAX_D_INX = 12284, FMAX_H = 12285, FMAX_H_INX = 12286, FMAX_S = 12287, FMAX_S_INX = 12288, FMIN_D = 12289, FMIN_D_IN32X = 12290, FMIN_D_INX = 12291, FMIN_H = 12292, FMIN_H_INX = 12293, FMIN_S = 12294, FMIN_S_INX = 12295, FMSUB_D = 12296, FMSUB_D_IN32X = 12297, FMSUB_D_INX = 12298, FMSUB_H = 12299, FMSUB_H_INX = 12300, FMSUB_S = 12301, FMSUB_S_INX = 12302, FMUL_D = 12303, FMUL_D_IN32X = 12304, FMUL_D_INX = 12305, FMUL_H = 12306, FMUL_H_INX = 12307, FMUL_S = 12308, FMUL_S_INX = 12309, FMV_D_X = 12310, FMV_H_X = 12311, FMV_W_X = 12312, FMV_X_D = 12313, FMV_X_H = 12314, FMV_X_W = 12315, FNMADD_D = 12316, FNMADD_D_IN32X = 12317, FNMADD_D_INX = 12318, FNMADD_H = 12319, FNMADD_H_INX = 12320, FNMADD_S = 12321, FNMADD_S_INX = 12322, FNMSUB_D = 12323, FNMSUB_D_IN32X = 12324, FNMSUB_D_INX = 12325, FNMSUB_H = 12326, FNMSUB_H_INX = 12327, FNMSUB_S = 12328, FNMSUB_S_INX = 12329, FSD = 12330, FSGNJN_D = 12331, FSGNJN_D_IN32X = 12332, FSGNJN_D_INX = 12333, FSGNJN_H = 12334, FSGNJN_H_INX = 12335, FSGNJN_S = 12336, FSGNJN_S_INX = 12337, FSGNJX_D = 12338, FSGNJX_D_IN32X = 12339, FSGNJX_D_INX = 12340, FSGNJX_H = 12341, FSGNJX_H_INX = 12342, FSGNJX_S = 12343, FSGNJX_S_INX = 12344, FSGNJ_D = 12345, FSGNJ_D_IN32X = 12346, FSGNJ_D_INX = 12347, FSGNJ_H = 12348, FSGNJ_H_INX = 12349, FSGNJ_S = 12350, FSGNJ_S_INX = 12351, FSH = 12352, FSQRT_D = 12353, FSQRT_D_IN32X = 12354, FSQRT_D_INX = 12355, FSQRT_H = 12356, FSQRT_H_INX = 12357, FSQRT_S = 12358, FSQRT_S_INX = 12359, FSUB_D = 12360, FSUB_D_IN32X = 12361, FSUB_D_INX = 12362, FSUB_H = 12363, FSUB_H_INX = 12364, FSUB_S = 12365, FSUB_S_INX = 12366, FSW = 12367, HFENCE_GVMA = 12368, HFENCE_VVMA = 12369, HINVAL_GVMA = 12370, HINVAL_VVMA = 12371, HLVX_HU = 12372, HLVX_WU = 12373, HLV_B = 12374, HLV_BU = 12375, HLV_D = 12376, HLV_H = 12377, HLV_HU = 12378, HLV_W = 12379, HLV_WU = 12380, HSV_B = 12381, HSV_D = 12382, HSV_H = 12383, HSV_W = 12384, InsnB = 12385, InsnI = 12386, InsnI_Mem = 12387, InsnJ = 12388, InsnR = 12389, InsnR4 = 12390, InsnS = 12391, InsnU = 12392, JAL = 12393, JALR = 12394, LB = 12395, LBU = 12396, LD = 12397, LH = 12398, LHU = 12399, LR_D = 12400, LR_D_AQ = 12401, LR_D_AQ_RL = 12402, LR_D_RL = 12403, LR_W = 12404, LR_W_AQ = 12405, LR_W_AQ_RL = 12406, LR_W_RL = 12407, LUI = 12408, LW = 12409, LWU = 12410, MAX = 12411, MAXU = 12412, MIN = 12413, MINU = 12414, MRET = 12415, MUL = 12416, MULH = 12417, MULHSU = 12418, MULHU = 12419, MULW = 12420, OR = 12421, ORC_B = 12422, ORI = 12423, ORN = 12424, PACK = 12425, PACKH = 12426, PACKW = 12427, PREFETCH_I = 12428, PREFETCH_R = 12429, PREFETCH_W = 12430, REM = 12431, REMU = 12432, REMUW = 12433, REMW = 12434, REV8_RV32 = 12435, REV8_RV64 = 12436, ROL = 12437, ROLW = 12438, ROR = 12439, RORI = 12440, RORIW = 12441, RORW = 12442, SB = 12443, SC_D = 12444, SC_D_AQ = 12445, SC_D_AQ_RL = 12446, SC_D_RL = 12447, SC_W = 12448, SC_W_AQ = 12449, SC_W_AQ_RL = 12450, SC_W_RL = 12451, SD = 12452, SEXT_B = 12453, SEXT_H = 12454, SFENCE_INVAL_IR = 12455, SFENCE_VMA = 12456, SFENCE_W_INVAL = 12457, SH = 12458, SH1ADD = 12459, SH1ADD_UW = 12460, SH2ADD = 12461, SH2ADD_UW = 12462, SH3ADD = 12463, SH3ADD_UW = 12464, SHA256SIG0 = 12465, SHA256SIG1 = 12466, SHA256SUM0 = 12467, SHA256SUM1 = 12468, SHA512SIG0 = 12469, SHA512SIG0H = 12470, SHA512SIG0L = 12471, SHA512SIG1 = 12472, SHA512SIG1H = 12473, SHA512SIG1L = 12474, SHA512SUM0 = 12475, SHA512SUM0R = 12476, SHA512SUM1 = 12477, SHA512SUM1R = 12478, SINVAL_VMA = 12479, SLL = 12480, SLLI = 12481, SLLIW = 12482, SLLI_UW = 12483, SLLW = 12484, SLT = 12485, SLTI = 12486, SLTIU = 12487, SLTU = 12488, SM3P0 = 12489, SM3P1 = 12490, SM4ED = 12491, SM4KS = 12492, SRA = 12493, SRAI = 12494, SRAIW = 12495, SRAW = 12496, SRET = 12497, SRL = 12498, SRLI = 12499, SRLIW = 12500, SRLW = 12501, SUB = 12502, SUBW = 12503, SW = 12504, THVdotVMAQASU_VV = 12505, THVdotVMAQASU_VX = 12506, THVdotVMAQAUS_VX = 12507, THVdotVMAQAU_VV = 12508, THVdotVMAQAU_VX = 12509, THVdotVMAQA_VV = 12510, THVdotVMAQA_VX = 12511, UNIMP = 12512, UNZIP_RV32 = 12513, URET = 12514, VAADDU_VV = 12515, VAADDU_VX = 12516, VAADD_VV = 12517, VAADD_VX = 12518, VADC_VIM = 12519, VADC_VVM = 12520, VADC_VXM = 12521, VADD_VI = 12522, VADD_VV = 12523, VADD_VX = 12524, VAND_VI = 12525, VAND_VV = 12526, VAND_VX = 12527, VASUBU_VV = 12528, VASUBU_VX = 12529, VASUB_VV = 12530, VASUB_VX = 12531, VCOMPRESS_VM = 12532, VCPOP_M = 12533, VDIVU_VV = 12534, VDIVU_VX = 12535, VDIV_VV = 12536, VDIV_VX = 12537, VFADD_VF = 12538, VFADD_VV = 12539, VFCLASS_V = 12540, VFCVT_F_XU_V = 12541, VFCVT_F_X_V = 12542, VFCVT_RTZ_XU_F_V = 12543, VFCVT_RTZ_X_F_V = 12544, VFCVT_XU_F_V = 12545, VFCVT_X_F_V = 12546, VFDIV_VF = 12547, VFDIV_VV = 12548, VFIRST_M = 12549, VFMACC_VF = 12550, VFMACC_VV = 12551, VFMADD_VF = 12552, VFMADD_VV = 12553, VFMAX_VF = 12554, VFMAX_VV = 12555, VFMERGE_VFM = 12556, VFMIN_VF = 12557, VFMIN_VV = 12558, VFMSAC_VF = 12559, VFMSAC_VV = 12560, VFMSUB_VF = 12561, VFMSUB_VV = 12562, VFMUL_VF = 12563, VFMUL_VV = 12564, VFMV_F_S = 12565, VFMV_S_F = 12566, VFMV_V_F = 12567, VFNCVT_F_F_W = 12568, VFNCVT_F_XU_W = 12569, VFNCVT_F_X_W = 12570, VFNCVT_ROD_F_F_W = 12571, VFNCVT_RTZ_XU_F_W = 12572, VFNCVT_RTZ_X_F_W = 12573, VFNCVT_XU_F_W = 12574, VFNCVT_X_F_W = 12575, VFNMACC_VF = 12576, VFNMACC_VV = 12577, VFNMADD_VF = 12578, VFNMADD_VV = 12579, VFNMSAC_VF = 12580, VFNMSAC_VV = 12581, VFNMSUB_VF = 12582, VFNMSUB_VV = 12583, VFRDIV_VF = 12584, VFREC7_V = 12585, VFREDMAX_VS = 12586, VFREDMIN_VS = 12587, VFREDOSUM_VS = 12588, VFREDUSUM_VS = 12589, VFRSQRT7_V = 12590, VFRSUB_VF = 12591, VFSGNJN_VF = 12592, VFSGNJN_VV = 12593, VFSGNJX_VF = 12594, VFSGNJX_VV = 12595, VFSGNJ_VF = 12596, VFSGNJ_VV = 12597, VFSLIDE1DOWN_VF = 12598, VFSLIDE1UP_VF = 12599, VFSQRT_V = 12600, VFSUB_VF = 12601, VFSUB_VV = 12602, VFWADD_VF = 12603, VFWADD_VV = 12604, VFWADD_WF = 12605, VFWADD_WV = 12606, VFWCVT_F_F_V = 12607, VFWCVT_F_XU_V = 12608, VFWCVT_F_X_V = 12609, VFWCVT_RTZ_XU_F_V = 12610, VFWCVT_RTZ_X_F_V = 12611, VFWCVT_XU_F_V = 12612, VFWCVT_X_F_V = 12613, VFWMACC_VF = 12614, VFWMACC_VV = 12615, VFWMSAC_VF = 12616, VFWMSAC_VV = 12617, VFWMUL_VF = 12618, VFWMUL_VV = 12619, VFWNMACC_VF = 12620, VFWNMACC_VV = 12621, VFWNMSAC_VF = 12622, VFWNMSAC_VV = 12623, VFWREDOSUM_VS = 12624, VFWREDUSUM_VS = 12625, VFWSUB_VF = 12626, VFWSUB_VV = 12627, VFWSUB_WF = 12628, VFWSUB_WV = 12629, VID_V = 12630, VIOTA_M = 12631, VL1RE16_V = 12632, VL1RE32_V = 12633, VL1RE64_V = 12634, VL1RE8_V = 12635, VL2RE16_V = 12636, VL2RE32_V = 12637, VL2RE64_V = 12638, VL2RE8_V = 12639, VL4RE16_V = 12640, VL4RE32_V = 12641, VL4RE64_V = 12642, VL4RE8_V = 12643, VL8RE16_V = 12644, VL8RE32_V = 12645, VL8RE64_V = 12646, VL8RE8_V = 12647, VLE16FF_V = 12648, VLE16_V = 12649, VLE32FF_V = 12650, VLE32_V = 12651, VLE64FF_V = 12652, VLE64_V = 12653, VLE8FF_V = 12654, VLE8_V = 12655, VLM_V = 12656, VLOXEI16_V = 12657, VLOXEI32_V = 12658, VLOXEI64_V = 12659, VLOXEI8_V = 12660, VLOXSEG2EI16_V = 12661, VLOXSEG2EI32_V = 12662, VLOXSEG2EI64_V = 12663, VLOXSEG2EI8_V = 12664, VLOXSEG3EI16_V = 12665, VLOXSEG3EI32_V = 12666, VLOXSEG3EI64_V = 12667, VLOXSEG3EI8_V = 12668, VLOXSEG4EI16_V = 12669, VLOXSEG4EI32_V = 12670, VLOXSEG4EI64_V = 12671, VLOXSEG4EI8_V = 12672, VLOXSEG5EI16_V = 12673, VLOXSEG5EI32_V = 12674, VLOXSEG5EI64_V = 12675, VLOXSEG5EI8_V = 12676, VLOXSEG6EI16_V = 12677, VLOXSEG6EI32_V = 12678, VLOXSEG6EI64_V = 12679, VLOXSEG6EI8_V = 12680, VLOXSEG7EI16_V = 12681, VLOXSEG7EI32_V = 12682, VLOXSEG7EI64_V = 12683, VLOXSEG7EI8_V = 12684, VLOXSEG8EI16_V = 12685, VLOXSEG8EI32_V = 12686, VLOXSEG8EI64_V = 12687, VLOXSEG8EI8_V = 12688, VLSE16_V = 12689, VLSE32_V = 12690, VLSE64_V = 12691, VLSE8_V = 12692, VLSEG2E16FF_V = 12693, VLSEG2E16_V = 12694, VLSEG2E32FF_V = 12695, VLSEG2E32_V = 12696, VLSEG2E64FF_V = 12697, VLSEG2E64_V = 12698, VLSEG2E8FF_V = 12699, VLSEG2E8_V = 12700, VLSEG3E16FF_V = 12701, VLSEG3E16_V = 12702, VLSEG3E32FF_V = 12703, VLSEG3E32_V = 12704, VLSEG3E64FF_V = 12705, VLSEG3E64_V = 12706, VLSEG3E8FF_V = 12707, VLSEG3E8_V = 12708, VLSEG4E16FF_V = 12709, VLSEG4E16_V = 12710, VLSEG4E32FF_V = 12711, VLSEG4E32_V = 12712, VLSEG4E64FF_V = 12713, VLSEG4E64_V = 12714, VLSEG4E8FF_V = 12715, VLSEG4E8_V = 12716, VLSEG5E16FF_V = 12717, VLSEG5E16_V = 12718, VLSEG5E32FF_V = 12719, VLSEG5E32_V = 12720, VLSEG5E64FF_V = 12721, VLSEG5E64_V = 12722, VLSEG5E8FF_V = 12723, VLSEG5E8_V = 12724, VLSEG6E16FF_V = 12725, VLSEG6E16_V = 12726, VLSEG6E32FF_V = 12727, VLSEG6E32_V = 12728, VLSEG6E64FF_V = 12729, VLSEG6E64_V = 12730, VLSEG6E8FF_V = 12731, VLSEG6E8_V = 12732, VLSEG7E16FF_V = 12733, VLSEG7E16_V = 12734, VLSEG7E32FF_V = 12735, VLSEG7E32_V = 12736, VLSEG7E64FF_V = 12737, VLSEG7E64_V = 12738, VLSEG7E8FF_V = 12739, VLSEG7E8_V = 12740, VLSEG8E16FF_V = 12741, VLSEG8E16_V = 12742, VLSEG8E32FF_V = 12743, VLSEG8E32_V = 12744, VLSEG8E64FF_V = 12745, VLSEG8E64_V = 12746, VLSEG8E8FF_V = 12747, VLSEG8E8_V = 12748, VLSSEG2E16_V = 12749, VLSSEG2E32_V = 12750, VLSSEG2E64_V = 12751, VLSSEG2E8_V = 12752, VLSSEG3E16_V = 12753, VLSSEG3E32_V = 12754, VLSSEG3E64_V = 12755, VLSSEG3E8_V = 12756, VLSSEG4E16_V = 12757, VLSSEG4E32_V = 12758, VLSSEG4E64_V = 12759, VLSSEG4E8_V = 12760, VLSSEG5E16_V = 12761, VLSSEG5E32_V = 12762, VLSSEG5E64_V = 12763, VLSSEG5E8_V = 12764, VLSSEG6E16_V = 12765, VLSSEG6E32_V = 12766, VLSSEG6E64_V = 12767, VLSSEG6E8_V = 12768, VLSSEG7E16_V = 12769, VLSSEG7E32_V = 12770, VLSSEG7E64_V = 12771, VLSSEG7E8_V = 12772, VLSSEG8E16_V = 12773, VLSSEG8E32_V = 12774, VLSSEG8E64_V = 12775, VLSSEG8E8_V = 12776, VLUXEI16_V = 12777, VLUXEI32_V = 12778, VLUXEI64_V = 12779, VLUXEI8_V = 12780, VLUXSEG2EI16_V = 12781, VLUXSEG2EI32_V = 12782, VLUXSEG2EI64_V = 12783, VLUXSEG2EI8_V = 12784, VLUXSEG3EI16_V = 12785, VLUXSEG3EI32_V = 12786, VLUXSEG3EI64_V = 12787, VLUXSEG3EI8_V = 12788, VLUXSEG4EI16_V = 12789, VLUXSEG4EI32_V = 12790, VLUXSEG4EI64_V = 12791, VLUXSEG4EI8_V = 12792, VLUXSEG5EI16_V = 12793, VLUXSEG5EI32_V = 12794, VLUXSEG5EI64_V = 12795, VLUXSEG5EI8_V = 12796, VLUXSEG6EI16_V = 12797, VLUXSEG6EI32_V = 12798, VLUXSEG6EI64_V = 12799, VLUXSEG6EI8_V = 12800, VLUXSEG7EI16_V = 12801, VLUXSEG7EI32_V = 12802, VLUXSEG7EI64_V = 12803, VLUXSEG7EI8_V = 12804, VLUXSEG8EI16_V = 12805, VLUXSEG8EI32_V = 12806, VLUXSEG8EI64_V = 12807, VLUXSEG8EI8_V = 12808, VMACC_VV = 12809, VMACC_VX = 12810, VMADC_VI = 12811, VMADC_VIM = 12812, VMADC_VV = 12813, VMADC_VVM = 12814, VMADC_VX = 12815, VMADC_VXM = 12816, VMADD_VV = 12817, VMADD_VX = 12818, VMANDN_MM = 12819, VMAND_MM = 12820, VMAXU_VV = 12821, VMAXU_VX = 12822, VMAX_VV = 12823, VMAX_VX = 12824, VMERGE_VIM = 12825, VMERGE_VVM = 12826, VMERGE_VXM = 12827, VMFEQ_VF = 12828, VMFEQ_VV = 12829, VMFGE_VF = 12830, VMFGT_VF = 12831, VMFLE_VF = 12832, VMFLE_VV = 12833, VMFLT_VF = 12834, VMFLT_VV = 12835, VMFNE_VF = 12836, VMFNE_VV = 12837, VMINU_VV = 12838, VMINU_VX = 12839, VMIN_VV = 12840, VMIN_VX = 12841, VMNAND_MM = 12842, VMNOR_MM = 12843, VMORN_MM = 12844, VMOR_MM = 12845, VMSBC_VV = 12846, VMSBC_VVM = 12847, VMSBC_VX = 12848, VMSBC_VXM = 12849, VMSBF_M = 12850, VMSEQ_VI = 12851, VMSEQ_VV = 12852, VMSEQ_VX = 12853, VMSGTU_VI = 12854, VMSGTU_VX = 12855, VMSGT_VI = 12856, VMSGT_VX = 12857, VMSIF_M = 12858, VMSLEU_VI = 12859, VMSLEU_VV = 12860, VMSLEU_VX = 12861, VMSLE_VI = 12862, VMSLE_VV = 12863, VMSLE_VX = 12864, VMSLTU_VV = 12865, VMSLTU_VX = 12866, VMSLT_VV = 12867, VMSLT_VX = 12868, VMSNE_VI = 12869, VMSNE_VV = 12870, VMSNE_VX = 12871, VMSOF_M = 12872, VMULHSU_VV = 12873, VMULHSU_VX = 12874, VMULHU_VV = 12875, VMULHU_VX = 12876, VMULH_VV = 12877, VMULH_VX = 12878, VMUL_VV = 12879, VMUL_VX = 12880, VMV1R_V = 12881, VMV2R_V = 12882, VMV4R_V = 12883, VMV8R_V = 12884, VMV_S_X = 12885, VMV_V_I = 12886, VMV_V_V = 12887, VMV_V_X = 12888, VMV_X_S = 12889, VMXNOR_MM = 12890, VMXOR_MM = 12891, VNCLIPU_WI = 12892, VNCLIPU_WV = 12893, VNCLIPU_WX = 12894, VNCLIP_WI = 12895, VNCLIP_WV = 12896, VNCLIP_WX = 12897, VNMSAC_VV = 12898, VNMSAC_VX = 12899, VNMSUB_VV = 12900, VNMSUB_VX = 12901, VNSRA_WI = 12902, VNSRA_WV = 12903, VNSRA_WX = 12904, VNSRL_WI = 12905, VNSRL_WV = 12906, VNSRL_WX = 12907, VOR_VI = 12908, VOR_VV = 12909, VOR_VX = 12910, VREDAND_VS = 12911, VREDMAXU_VS = 12912, VREDMAX_VS = 12913, VREDMINU_VS = 12914, VREDMIN_VS = 12915, VREDOR_VS = 12916, VREDSUM_VS = 12917, VREDXOR_VS = 12918, VREMU_VV = 12919, VREMU_VX = 12920, VREM_VV = 12921, VREM_VX = 12922, VRGATHEREI16_VV = 12923, VRGATHER_VI = 12924, VRGATHER_VV = 12925, VRGATHER_VX = 12926, VRSUB_VI = 12927, VRSUB_VX = 12928, VS1R_V = 12929, VS2R_V = 12930, VS4R_V = 12931, VS8R_V = 12932, VSADDU_VI = 12933, VSADDU_VV = 12934, VSADDU_VX = 12935, VSADD_VI = 12936, VSADD_VV = 12937, VSADD_VX = 12938, VSBC_VVM = 12939, VSBC_VXM = 12940, VSE16_V = 12941, VSE32_V = 12942, VSE64_V = 12943, VSE8_V = 12944, VSETIVLI = 12945, VSETVL = 12946, VSETVLI = 12947, VSEXT_VF2 = 12948, VSEXT_VF4 = 12949, VSEXT_VF8 = 12950, VSLIDE1DOWN_VX = 12951, VSLIDE1UP_VX = 12952, VSLIDEDOWN_VI = 12953, VSLIDEDOWN_VX = 12954, VSLIDEUP_VI = 12955, VSLIDEUP_VX = 12956, VSLL_VI = 12957, VSLL_VV = 12958, VSLL_VX = 12959, VSMUL_VV = 12960, VSMUL_VX = 12961, VSM_V = 12962, VSOXEI16_V = 12963, VSOXEI32_V = 12964, VSOXEI64_V = 12965, VSOXEI8_V = 12966, VSOXSEG2EI16_V = 12967, VSOXSEG2EI32_V = 12968, VSOXSEG2EI64_V = 12969, VSOXSEG2EI8_V = 12970, VSOXSEG3EI16_V = 12971, VSOXSEG3EI32_V = 12972, VSOXSEG3EI64_V = 12973, VSOXSEG3EI8_V = 12974, VSOXSEG4EI16_V = 12975, VSOXSEG4EI32_V = 12976, VSOXSEG4EI64_V = 12977, VSOXSEG4EI8_V = 12978, VSOXSEG5EI16_V = 12979, VSOXSEG5EI32_V = 12980, VSOXSEG5EI64_V = 12981, VSOXSEG5EI8_V = 12982, VSOXSEG6EI16_V = 12983, VSOXSEG6EI32_V = 12984, VSOXSEG6EI64_V = 12985, VSOXSEG6EI8_V = 12986, VSOXSEG7EI16_V = 12987, VSOXSEG7EI32_V = 12988, VSOXSEG7EI64_V = 12989, VSOXSEG7EI8_V = 12990, VSOXSEG8EI16_V = 12991, VSOXSEG8EI32_V = 12992, VSOXSEG8EI64_V = 12993, VSOXSEG8EI8_V = 12994, VSRA_VI = 12995, VSRA_VV = 12996, VSRA_VX = 12997, VSRL_VI = 12998, VSRL_VV = 12999, VSRL_VX = 13000, VSSE16_V = 13001, VSSE32_V = 13002, VSSE64_V = 13003, VSSE8_V = 13004, VSSEG2E16_V = 13005, VSSEG2E32_V = 13006, VSSEG2E64_V = 13007, VSSEG2E8_V = 13008, VSSEG3E16_V = 13009, VSSEG3E32_V = 13010, VSSEG3E64_V = 13011, VSSEG3E8_V = 13012, VSSEG4E16_V = 13013, VSSEG4E32_V = 13014, VSSEG4E64_V = 13015, VSSEG4E8_V = 13016, VSSEG5E16_V = 13017, VSSEG5E32_V = 13018, VSSEG5E64_V = 13019, VSSEG5E8_V = 13020, VSSEG6E16_V = 13021, VSSEG6E32_V = 13022, VSSEG6E64_V = 13023, VSSEG6E8_V = 13024, VSSEG7E16_V = 13025, VSSEG7E32_V = 13026, VSSEG7E64_V = 13027, VSSEG7E8_V = 13028, VSSEG8E16_V = 13029, VSSEG8E32_V = 13030, VSSEG8E64_V = 13031, VSSEG8E8_V = 13032, VSSRA_VI = 13033, VSSRA_VV = 13034, VSSRA_VX = 13035, VSSRL_VI = 13036, VSSRL_VV = 13037, VSSRL_VX = 13038, VSSSEG2E16_V = 13039, VSSSEG2E32_V = 13040, VSSSEG2E64_V = 13041, VSSSEG2E8_V = 13042, VSSSEG3E16_V = 13043, VSSSEG3E32_V = 13044, VSSSEG3E64_V = 13045, VSSSEG3E8_V = 13046, VSSSEG4E16_V = 13047, VSSSEG4E32_V = 13048, VSSSEG4E64_V = 13049, VSSSEG4E8_V = 13050, VSSSEG5E16_V = 13051, VSSSEG5E32_V = 13052, VSSSEG5E64_V = 13053, VSSSEG5E8_V = 13054, VSSSEG6E16_V = 13055, VSSSEG6E32_V = 13056, VSSSEG6E64_V = 13057, VSSSEG6E8_V = 13058, VSSSEG7E16_V = 13059, VSSSEG7E32_V = 13060, VSSSEG7E64_V = 13061, VSSSEG7E8_V = 13062, VSSSEG8E16_V = 13063, VSSSEG8E32_V = 13064, VSSSEG8E64_V = 13065, VSSSEG8E8_V = 13066, VSSUBU_VV = 13067, VSSUBU_VX = 13068, VSSUB_VV = 13069, VSSUB_VX = 13070, VSUB_VV = 13071, VSUB_VX = 13072, VSUXEI16_V = 13073, VSUXEI32_V = 13074, VSUXEI64_V = 13075, VSUXEI8_V = 13076, VSUXSEG2EI16_V = 13077, VSUXSEG2EI32_V = 13078, VSUXSEG2EI64_V = 13079, VSUXSEG2EI8_V = 13080, VSUXSEG3EI16_V = 13081, VSUXSEG3EI32_V = 13082, VSUXSEG3EI64_V = 13083, VSUXSEG3EI8_V = 13084, VSUXSEG4EI16_V = 13085, VSUXSEG4EI32_V = 13086, VSUXSEG4EI64_V = 13087, VSUXSEG4EI8_V = 13088, VSUXSEG5EI16_V = 13089, VSUXSEG5EI32_V = 13090, VSUXSEG5EI64_V = 13091, VSUXSEG5EI8_V = 13092, VSUXSEG6EI16_V = 13093, VSUXSEG6EI32_V = 13094, VSUXSEG6EI64_V = 13095, VSUXSEG6EI8_V = 13096, VSUXSEG7EI16_V = 13097, VSUXSEG7EI32_V = 13098, VSUXSEG7EI64_V = 13099, VSUXSEG7EI8_V = 13100, VSUXSEG8EI16_V = 13101, VSUXSEG8EI32_V = 13102, VSUXSEG8EI64_V = 13103, VSUXSEG8EI8_V = 13104, VT_MASKC = 13105, VT_MASKCN = 13106, VWADDU_VV = 13107, VWADDU_VX = 13108, VWADDU_WV = 13109, VWADDU_WX = 13110, VWADD_VV = 13111, VWADD_VX = 13112, VWADD_WV = 13113, VWADD_WX = 13114, VWMACCSU_VV = 13115, VWMACCSU_VX = 13116, VWMACCUS_VX = 13117, VWMACCU_VV = 13118, VWMACCU_VX = 13119, VWMACC_VV = 13120, VWMACC_VX = 13121, VWMULSU_VV = 13122, VWMULSU_VX = 13123, VWMULU_VV = 13124, VWMULU_VX = 13125, VWMUL_VV = 13126, VWMUL_VX = 13127, VWREDSUMU_VS = 13128, VWREDSUM_VS = 13129, VWSUBU_VV = 13130, VWSUBU_VX = 13131, VWSUBU_WV = 13132, VWSUBU_WX = 13133, VWSUB_VV = 13134, VWSUB_VX = 13135, VWSUB_WV = 13136, VWSUB_WX = 13137, VXOR_VI = 13138, VXOR_VV = 13139, VXOR_VX = 13140, VZEXT_VF2 = 13141, VZEXT_VF4 = 13142, VZEXT_VF8 = 13143, WFI = 13144, WRS_NTO = 13145, WRS_STO = 13146, XNOR = 13147, XOR = 13148, XORI = 13149, XPERM4 = 13150, XPERM8 = 13151, ZEXT_H_RV32 = 13152, ZEXT_H_RV64 = 13153, ZIP_RV32 = 13154, INSTRUCTION_LIST_END = 13155 }; } // end namespace RISCV } // end namespace llvm #endif // GET_INSTRINFO_ENUM #ifdef GET_INSTRINFO_SCHED_ENUM #undef GET_INSTRINFO_SCHED_ENUM namespace llvm { namespace RISCV { namespace Sched { enum { NoInstrModel = 0, WriteIALU_WriteJalr_ReadJalr = 1, WriteSFB_ReadSFB_ReadSFB_ReadSFB_ReadSFB_ReadSFB = 2, WriteSFB_ReadSFB_ReadSFB_ReadSFB_ReadSFB = 3, WriteRdVLENB = 4, WriteVAALUV_M1_ReadVAALUV_M1_ReadVAALUV_M1_ReadVMask = 5, WriteVAALUV_M2_ReadVAALUV_M2_ReadVAALUV_M2_ReadVMask = 6, WriteVAALUV_M4_ReadVAALUV_M4_ReadVAALUV_M4_ReadVMask = 7, WriteVAALUV_M8_ReadVAALUV_M8_ReadVAALUV_M8_ReadVMask = 8, WriteVAALUV_MF2_ReadVAALUV_MF2_ReadVAALUV_MF2_ReadVMask = 9, WriteVAALUV_MF4_ReadVAALUV_MF4_ReadVAALUV_MF4_ReadVMask = 10, WriteVAALUV_MF8_ReadVAALUV_MF8_ReadVAALUV_MF8_ReadVMask = 11, WriteVAALUX_M1_ReadVAALUV_M1_ReadVAALUX_M1_ReadVMask = 12, WriteVAALUX_M2_ReadVAALUV_M2_ReadVAALUX_M2_ReadVMask = 13, WriteVAALUX_M4_ReadVAALUV_M4_ReadVAALUX_M4_ReadVMask = 14, WriteVAALUX_M8_ReadVAALUV_M8_ReadVAALUX_M8_ReadVMask = 15, WriteVAALUX_MF2_ReadVAALUV_MF2_ReadVAALUX_MF2_ReadVMask = 16, WriteVAALUX_MF4_ReadVAALUV_MF4_ReadVAALUX_MF4_ReadVMask = 17, WriteVAALUX_MF8_ReadVAALUV_MF8_ReadVAALUX_MF8_ReadVMask = 18, WriteVICALUI_M1_ReadVICALUV_M1_ReadVMask = 19, WriteVICALUI_M2_ReadVICALUV_M2_ReadVMask = 20, WriteVICALUI_M4_ReadVICALUV_M4_ReadVMask = 21, WriteVICALUI_M8_ReadVICALUV_M8_ReadVMask = 22, WriteVICALUI_MF2_ReadVICALUV_MF2_ReadVMask = 23, WriteVICALUI_MF4_ReadVICALUV_MF4_ReadVMask = 24, WriteVICALUI_MF8_ReadVICALUV_MF8_ReadVMask = 25, WriteVICALUV_M1_ReadVICALUV_M1_ReadVICALUV_M1_ReadVMask = 26, WriteVICALUV_M2_ReadVICALUV_M2_ReadVICALUV_M2_ReadVMask = 27, WriteVICALUV_M4_ReadVICALUV_M4_ReadVICALUV_M4_ReadVMask = 28, WriteVICALUV_M8_ReadVICALUV_M8_ReadVICALUV_M8_ReadVMask = 29, WriteVICALUV_MF2_ReadVICALUV_MF2_ReadVICALUV_MF2_ReadVMask = 30, WriteVICALUV_MF4_ReadVICALUV_MF4_ReadVICALUV_MF4_ReadVMask = 31, WriteVICALUV_MF8_ReadVICALUV_MF8_ReadVICALUV_MF8_ReadVMask = 32, WriteVICALUX_M1_ReadVICALUV_M1_ReadVICALUX_M1_ReadVMask = 33, WriteVICALUX_M2_ReadVICALUV_M2_ReadVICALUX_M2_ReadVMask = 34, WriteVICALUX_M4_ReadVICALUV_M4_ReadVICALUX_M4_ReadVMask = 35, WriteVICALUX_M8_ReadVICALUV_M8_ReadVICALUX_M8_ReadVMask = 36, WriteVICALUX_MF2_ReadVICALUV_MF2_ReadVICALUX_MF2_ReadVMask = 37, WriteVICALUX_MF4_ReadVICALUV_MF4_ReadVICALUX_MF4_ReadVMask = 38, WriteVICALUX_MF8_ReadVICALUV_MF8_ReadVICALUX_MF8_ReadVMask = 39, WriteVIALUI_M1_ReadVIALUV_M1_ReadVMask = 40, WriteVIALUI_M2_ReadVIALUV_M2_ReadVMask = 41, WriteVIALUI_M4_ReadVIALUV_M4_ReadVMask = 42, WriteVIALUI_M8_ReadVIALUV_M8_ReadVMask = 43, WriteVIALUI_MF2_ReadVIALUV_MF2_ReadVMask = 44, WriteVIALUI_MF4_ReadVIALUV_MF4_ReadVMask = 45, WriteVIALUI_MF8_ReadVIALUV_MF8_ReadVMask = 46, WriteVIALUV_M1_ReadVIALUV_M1_ReadVIALUV_M1_ReadVMask = 47, WriteVIALUV_M2_ReadVIALUV_M2_ReadVIALUV_M2_ReadVMask = 48, WriteVIALUV_M4_ReadVIALUV_M4_ReadVIALUV_M4_ReadVMask = 49, WriteVIALUV_M8_ReadVIALUV_M8_ReadVIALUV_M8_ReadVMask = 50, WriteVIALUV_MF2_ReadVIALUV_MF2_ReadVIALUV_MF2_ReadVMask = 51, WriteVIALUV_MF4_ReadVIALUV_MF4_ReadVIALUV_MF4_ReadVMask = 52, WriteVIALUV_MF8_ReadVIALUV_MF8_ReadVIALUV_MF8_ReadVMask = 53, WriteVIALUX_M1_ReadVIALUV_M1_ReadVIALUX_M1_ReadVMask = 54, WriteVIALUX_M2_ReadVIALUV_M2_ReadVIALUX_M2_ReadVMask = 55, WriteVIALUX_M4_ReadVIALUV_M4_ReadVIALUX_M4_ReadVMask = 56, WriteVIALUX_M8_ReadVIALUV_M8_ReadVIALUX_M8_ReadVMask = 57, WriteVIALUX_MF2_ReadVIALUV_MF2_ReadVIALUX_MF2_ReadVMask = 58, WriteVIALUX_MF4_ReadVIALUV_MF4_ReadVIALUX_MF4_ReadVMask = 59, WriteVIALUX_MF8_ReadVIALUV_MF8_ReadVIALUX_MF8_ReadVMask = 60, WriteVCompressV_M1_ReadVCompressV_M1_ReadVCompressV_M1 = 61, WriteVCompressV_M2_ReadVCompressV_M2_ReadVCompressV_M2 = 62, WriteVCompressV_M4_ReadVCompressV_M4_ReadVCompressV_M4 = 63, WriteVCompressV_M8_ReadVCompressV_M8_ReadVCompressV_M8 = 64, WriteVCompressV_MF2_ReadVCompressV_MF2_ReadVCompressV_MF2 = 65, WriteVCompressV_MF4_ReadVCompressV_MF4_ReadVCompressV_MF4 = 66, WriteVCompressV_MF8_ReadVCompressV_MF8_ReadVCompressV_MF8 = 67, WriteVMPopV_MF8_ReadVMPopV_MF8_ReadVMPopV_MF8 = 68, WriteVMPopV_M2_ReadVMPopV_M2_ReadVMPopV_M2 = 69, WriteVMPopV_MF4_ReadVMPopV_MF4_ReadVMPopV_MF4 = 70, WriteVMPopV_M4_ReadVMPopV_M4_ReadVMPopV_M4 = 71, WriteVMPopV_MF2_ReadVMPopV_MF2_ReadVMPopV_MF2 = 72, WriteVMPopV_M8_ReadVMPopV_M8_ReadVMPopV_M8 = 73, WriteVMPopV_M1_ReadVMPopV_M1_ReadVMPopV_M1 = 74, WriteVIDivV_M1_ReadVIDivV_M1_ReadVIDivV_M1_ReadVMask = 75, WriteVIDivV_M2_ReadVIDivV_M2_ReadVIDivV_M2_ReadVMask = 76, WriteVIDivV_M4_ReadVIDivV_M4_ReadVIDivV_M4_ReadVMask = 77, WriteVIDivV_M8_ReadVIDivV_M8_ReadVIDivV_M8_ReadVMask = 78, WriteVIDivV_MF2_ReadVIDivV_MF2_ReadVIDivV_MF2_ReadVMask = 79, WriteVIDivV_MF4_ReadVIDivV_MF4_ReadVIDivV_MF4_ReadVMask = 80, WriteVIDivV_MF8_ReadVIDivV_MF8_ReadVIDivV_MF8_ReadVMask = 81, WriteVIDivX_M1_ReadVIDivV_M1_ReadVIDivX_M1_ReadVMask = 82, WriteVIDivX_M2_ReadVIDivV_M2_ReadVIDivX_M2_ReadVMask = 83, WriteVIDivX_M4_ReadVIDivV_M4_ReadVIDivX_M4_ReadVMask = 84, WriteVIDivX_M8_ReadVIDivV_M8_ReadVIDivX_M8_ReadVMask = 85, WriteVIDivX_MF2_ReadVIDivV_MF2_ReadVIDivX_MF2_ReadVMask = 86, WriteVIDivX_MF4_ReadVIDivV_MF4_ReadVIDivX_MF4_ReadVMask = 87, WriteVIDivX_MF8_ReadVIDivV_MF8_ReadVIDivX_MF8_ReadVMask = 88, WriteVFALUF_M1_ReadVFALUV_M1_ReadVFALUF_M1_ReadVMask = 89, WriteVFALUF_M2_ReadVFALUV_M2_ReadVFALUF_M2_ReadVMask = 90, WriteVFALUF_M4_ReadVFALUV_M4_ReadVFALUF_M4_ReadVMask = 91, WriteVFALUF_M8_ReadVFALUV_M8_ReadVFALUF_M8_ReadVMask = 92, WriteVFALUF_MF2_ReadVFALUV_MF2_ReadVFALUF_MF2_ReadVMask = 93, WriteVFALUF_MF4_ReadVFALUV_MF4_ReadVFALUF_MF4_ReadVMask = 94, WriteVFALUV_M1_ReadVFALUV_M1_ReadVFALUV_M1_ReadVMask = 95, WriteVFALUV_M2_ReadVFALUV_M2_ReadVFALUV_M2_ReadVMask = 96, WriteVFALUV_M4_ReadVFALUV_M4_ReadVFALUV_M4_ReadVMask = 97, WriteVFALUV_M8_ReadVFALUV_M8_ReadVFALUV_M8_ReadVMask = 98, WriteVFALUV_MF2_ReadVFALUV_MF2_ReadVFALUV_MF2_ReadVMask = 99, WriteVFALUV_MF4_ReadVFALUV_MF4_ReadVFALUV_MF4_ReadVMask = 100, WriteVFClassV_M1_ReadVFClassV_M1_ReadVMask = 101, WriteVFClassV_M2_ReadVFClassV_M2_ReadVMask = 102, WriteVFClassV_M4_ReadVFClassV_M4_ReadVMask = 103, WriteVFClassV_M8_ReadVFClassV_M8_ReadVMask = 104, WriteVFClassV_MF2_ReadVFClassV_MF2_ReadVMask = 105, WriteVFClassV_MF4_ReadVFClassV_MF4_ReadVMask = 106, WriteVFCvtIToFV_M1_ReadVFCvtIToFV_M1_ReadVMask = 107, WriteVFCvtIToFV_M2_ReadVFCvtIToFV_M2_ReadVMask = 108, WriteVFCvtIToFV_M4_ReadVFCvtIToFV_M4_ReadVMask = 109, WriteVFCvtIToFV_M8_ReadVFCvtIToFV_M8_ReadVMask = 110, WriteVFCvtIToFV_MF2_ReadVFCvtIToFV_MF2_ReadVMask = 111, WriteVFCvtIToFV_MF4_ReadVFCvtIToFV_MF4_ReadVMask = 112, WriteVFCvtFToIV_M1_ReadVFCvtFToIV_M1_ReadVMask = 113, WriteVFCvtFToIV_M2_ReadVFCvtFToIV_M2_ReadVMask = 114, WriteVFCvtFToIV_M4_ReadVFCvtFToIV_M4_ReadVMask = 115, WriteVFCvtFToIV_M8_ReadVFCvtFToIV_M8_ReadVMask = 116, WriteVFCvtFToIV_MF2_ReadVFCvtFToIV_MF2_ReadVMask = 117, WriteVFCvtFToIV_MF4_ReadVFCvtFToIV_MF4_ReadVMask = 118, WriteVFDivF_M1_ReadVFDivV_M1_ReadVFDivF_M1_ReadVMask = 119, WriteVFDivF_M2_ReadVFDivV_M2_ReadVFDivF_M2_ReadVMask = 120, WriteVFDivF_M4_ReadVFDivV_M4_ReadVFDivF_M4_ReadVMask = 121, WriteVFDivF_M8_ReadVFDivV_M8_ReadVFDivF_M8_ReadVMask = 122, WriteVFDivF_MF2_ReadVFDivV_MF2_ReadVFDivF_MF2_ReadVMask = 123, WriteVFDivF_MF4_ReadVFDivV_MF4_ReadVFDivF_MF4_ReadVMask = 124, WriteVFDivV_M1_ReadVFDivV_M1_ReadVFDivV_M1_ReadVMask = 125, WriteVFDivV_M2_ReadVFDivV_M2_ReadVFDivV_M2_ReadVMask = 126, WriteVFDivV_M4_ReadVFDivV_M4_ReadVFDivV_M4_ReadVMask = 127, WriteVFDivV_M8_ReadVFDivV_M8_ReadVFDivV_M8_ReadVMask = 128, WriteVFDivV_MF2_ReadVFDivV_MF2_ReadVFDivV_MF2_ReadVMask = 129, WriteVFDivV_MF4_ReadVFDivV_MF4_ReadVFDivV_MF4_ReadVMask = 130, WriteVMFFSV_MF8_ReadVMFFSV_MF8_ReadVMFFSV_MF8 = 131, WriteVMFFSV_M2_ReadVMFFSV_M2_ReadVMFFSV_M2 = 132, WriteVMFFSV_MF4_ReadVMFFSV_MF4_ReadVMFFSV_MF4 = 133, WriteVMFFSV_M4_ReadVMFFSV_M4_ReadVMFFSV_M4 = 134, WriteVMFFSV_MF2_ReadVMFFSV_MF2_ReadVMFFSV_MF2 = 135, WriteVMFFSV_M8_ReadVMFFSV_M8_ReadVMFFSV_M8 = 136, WriteVMFFSV_M1_ReadVMFFSV_M1_ReadVMFFSV_M1 = 137, WriteVFMulAddF_M1_ReadVFMulAddV_M1_ReadVFMulAddV_M1_ReadVFMulAddF_M1_ReadVMask = 138, WriteVFMulAddF_M2_ReadVFMulAddV_M2_ReadVFMulAddV_M2_ReadVFMulAddF_M2_ReadVMask = 139, WriteVFMulAddF_M4_ReadVFMulAddV_M4_ReadVFMulAddV_M4_ReadVFMulAddF_M4_ReadVMask = 140, WriteVFMulAddF_M8_ReadVFMulAddV_M8_ReadVFMulAddV_M8_ReadVFMulAddF_M8_ReadVMask = 141, WriteVFMulAddF_MF2_ReadVFMulAddV_MF2_ReadVFMulAddV_MF2_ReadVFMulAddF_MF2_ReadVMask = 142, WriteVFMulAddF_MF4_ReadVFMulAddV_MF4_ReadVFMulAddV_MF4_ReadVFMulAddF_MF4_ReadVMask = 143, WriteVFMulAddV_M1_ReadVFMulAddV_M1_ReadVFMulAddV_M1_ReadVFMulAddV_M1_ReadVMask = 144, WriteVFMulAddV_M2_ReadVFMulAddV_M2_ReadVFMulAddV_M2_ReadVFMulAddV_M2_ReadVMask = 145, WriteVFMulAddV_M4_ReadVFMulAddV_M4_ReadVFMulAddV_M4_ReadVFMulAddV_M4_ReadVMask = 146, WriteVFMulAddV_M8_ReadVFMulAddV_M8_ReadVFMulAddV_M8_ReadVFMulAddV_M8_ReadVMask = 147, WriteVFMulAddV_MF2_ReadVFMulAddV_MF2_ReadVFMulAddV_MF2_ReadVFMulAddV_MF2_ReadVMask = 148, WriteVFMulAddV_MF4_ReadVFMulAddV_MF4_ReadVFMulAddV_MF4_ReadVFMulAddV_MF4_ReadVMask = 149, WriteVFCmpF_M1_ReadVFCmpV_M1_ReadVFCmpF_M1_ReadVMask = 150, WriteVFCmpF_M2_ReadVFCmpV_M2_ReadVFCmpF_M2_ReadVMask = 151, WriteVFCmpF_M4_ReadVFCmpV_M4_ReadVFCmpF_M4_ReadVMask = 152, WriteVFCmpF_M8_ReadVFCmpV_M8_ReadVFCmpF_M8_ReadVMask = 153, WriteVFCmpF_MF2_ReadVFCmpV_MF2_ReadVFCmpF_MF2_ReadVMask = 154, WriteVFCmpF_MF4_ReadVFCmpV_MF4_ReadVFCmpF_MF4_ReadVMask = 155, WriteVFCmpV_M1_ReadVFCmpV_M1_ReadVFCmpV_M1_ReadVMask = 156, WriteVFCmpV_M2_ReadVFCmpV_M2_ReadVFCmpV_M2_ReadVMask = 157, WriteVFCmpV_M4_ReadVFCmpV_M4_ReadVFCmpV_M4_ReadVMask = 158, WriteVFCmpV_M8_ReadVFCmpV_M8_ReadVFCmpV_M8_ReadVMask = 159, WriteVFCmpV_MF2_ReadVFCmpV_MF2_ReadVFCmpV_MF2_ReadVMask = 160, WriteVFCmpV_MF4_ReadVFCmpV_MF4_ReadVFCmpV_MF4_ReadVMask = 161, WriteVFMergeV_M1_ReadVFMergeV_M1_ReadVFMergeF_M1_ReadVMask = 162, WriteVFMergeV_M2_ReadVFMergeV_M2_ReadVFMergeF_M2_ReadVMask = 163, WriteVFMergeV_M4_ReadVFMergeV_M4_ReadVFMergeF_M4_ReadVMask = 164, WriteVFMergeV_M8_ReadVFMergeV_M8_ReadVFMergeF_M8_ReadVMask = 165, WriteVFMergeV_MF2_ReadVFMergeV_MF2_ReadVFMergeF_MF2_ReadVMask = 166, WriteVFMergeV_MF4_ReadVFMergeV_MF4_ReadVFMergeF_MF4_ReadVMask = 167, WriteVFMulF_M1_ReadVFMulV_M1_ReadVFMulF_M1_ReadVMask = 168, WriteVFMulF_M2_ReadVFMulV_M2_ReadVFMulF_M2_ReadVMask = 169, WriteVFMulF_M4_ReadVFMulV_M4_ReadVFMulF_M4_ReadVMask = 170, WriteVFMulF_M8_ReadVFMulV_M8_ReadVFMulF_M8_ReadVMask = 171, WriteVFMulF_MF2_ReadVFMulV_MF2_ReadVFMulF_MF2_ReadVMask = 172, WriteVFMulF_MF4_ReadVFMulV_MF4_ReadVFMulF_MF4_ReadVMask = 173, WriteVFMulV_M1_ReadVFMulV_M1_ReadVFMulV_M1_ReadVMask = 174, WriteVFMulV_M2_ReadVFMulV_M2_ReadVFMulV_M2_ReadVMask = 175, WriteVFMulV_M4_ReadVFMulV_M4_ReadVFMulV_M4_ReadVMask = 176, WriteVFMulV_M8_ReadVFMulV_M8_ReadVFMulV_M8_ReadVMask = 177, WriteVFMulV_MF2_ReadVFMulV_MF2_ReadVFMulV_MF2_ReadVMask = 178, WriteVFMulV_MF4_ReadVFMulV_MF4_ReadVFMulV_MF4_ReadVMask = 179, WriteVFMovVF_M1_ReadVFMovVF_M1 = 180, WriteVFMovVF_M2_ReadVFMovVF_M2 = 181, WriteVFMovVF_M4_ReadVFMovVF_M4 = 182, WriteVFMovVF_M8_ReadVFMovVF_M8 = 183, WriteVFMovVF_MF2_ReadVFMovVF_MF2 = 184, WriteVFMovVF_MF4_ReadVFMovVF_MF4 = 185, WriteVFMovFV_M1_ReadVFMovFV_M1_ReadVFMovFX_M1 = 186, WriteVFMovFV_M2_ReadVFMovFV_M2_ReadVFMovFX_M2 = 187, WriteVFMovFV_M4_ReadVFMovFV_M4_ReadVFMovFX_M4 = 188, WriteVFMovFV_M8_ReadVFMovFV_M8_ReadVFMovFX_M8 = 189, WriteVFMovFV_MF2_ReadVFMovFV_MF2_ReadVFMovFX_MF2 = 190, WriteVFMovFV_MF4_ReadVFMovFV_MF4_ReadVFMovFX_MF4 = 191, WriteVFMovV_M1_ReadVFMovF_M1 = 192, WriteVFMovV_M2_ReadVFMovF_M2 = 193, WriteVFMovV_M4_ReadVFMovF_M4 = 194, WriteVFMovV_M8_ReadVFMovF_M8 = 195, WriteVFMovV_MF2_ReadVFMovF_MF2 = 196, WriteVFMovV_MF4_ReadVFMovF_MF4 = 197, WriteVFNCvtFToFV_M1_ReadVFNCvtFToFV_M1_ReadVMask = 198, WriteVFNCvtFToFV_M2_ReadVFNCvtFToFV_M2_ReadVMask = 199, WriteVFNCvtFToFV_M4_ReadVFNCvtFToFV_M4_ReadVMask = 200, WriteVFNCvtFToFV_MF2_ReadVFNCvtFToFV_MF2_ReadVMask = 201, WriteVFNCvtFToFV_MF4_ReadVFNCvtFToFV_MF4_ReadVMask = 202, WriteVFNCvtIToFV_M1_ReadVFNCvtIToFV_M1_ReadVMask = 203, WriteVFNCvtIToFV_M2_ReadVFNCvtIToFV_M2_ReadVMask = 204, WriteVFNCvtIToFV_M4_ReadVFNCvtIToFV_M4_ReadVMask = 205, WriteVFNCvtIToFV_MF2_ReadVFNCvtIToFV_MF2_ReadVMask = 206, WriteVFNCvtIToFV_MF4_ReadVFNCvtIToFV_MF4_ReadVMask = 207, WriteVFNCvtFToIV_M1_ReadVFNCvtFToIV_M1_ReadVMask = 208, WriteVFNCvtFToIV_M2_ReadVFNCvtFToIV_M2_ReadVMask = 209, WriteVFNCvtFToIV_M4_ReadVFNCvtFToIV_M4_ReadVMask = 210, WriteVFNCvtFToIV_MF2_ReadVFNCvtFToIV_MF2_ReadVMask = 211, WriteVFNCvtFToIV_MF4_ReadVFNCvtFToIV_MF4_ReadVMask = 212, WriteVFNCvtFToIV_MF8_ReadVFNCvtFToIV_MF8_ReadVMask = 213, WriteVFRecpV_M1_ReadVFRecpV_M1_ReadVMask = 214, WriteVFRecpV_M2_ReadVFRecpV_M2_ReadVMask = 215, WriteVFRecpV_M4_ReadVFRecpV_M4_ReadVMask = 216, WriteVFRecpV_M8_ReadVFRecpV_M8_ReadVMask = 217, WriteVFRecpV_MF2_ReadVFRecpV_MF2_ReadVMask = 218, WriteVFRecpV_MF4_ReadVFRecpV_MF4_ReadVMask = 219, WriteVFRedV_ReadVFRedV_ReadVFRedV_ReadVFRedV_ReadVMask = 220, WriteVFRedOV_ReadVFRedOV_ReadVFRedOV_ReadVFRedOV_ReadVMask = 221, WriteVFSgnjF_M1_ReadVFSgnjV_M1_ReadVFSgnjF_M1_ReadVMask = 222, WriteVFSgnjF_M2_ReadVFSgnjV_M2_ReadVFSgnjF_M2_ReadVMask = 223, WriteVFSgnjF_M4_ReadVFSgnjV_M4_ReadVFSgnjF_M4_ReadVMask = 224, WriteVFSgnjF_M8_ReadVFSgnjV_M8_ReadVFSgnjF_M8_ReadVMask = 225, WriteVFSgnjF_MF2_ReadVFSgnjV_MF2_ReadVFSgnjF_MF2_ReadVMask = 226, WriteVFSgnjF_MF4_ReadVFSgnjV_MF4_ReadVFSgnjF_MF4_ReadVMask = 227, WriteVFSgnjV_M1_ReadVFSgnjV_M1_ReadVFSgnjV_M1_ReadVMask = 228, WriteVFSgnjV_M2_ReadVFSgnjV_M2_ReadVFSgnjV_M2_ReadVMask = 229, WriteVFSgnjV_M4_ReadVFSgnjV_M4_ReadVFSgnjV_M4_ReadVMask = 230, WriteVFSgnjV_M8_ReadVFSgnjV_M8_ReadVFSgnjV_M8_ReadVMask = 231, WriteVFSgnjV_MF2_ReadVFSgnjV_MF2_ReadVFSgnjV_MF2_ReadVMask = 232, WriteVFSgnjV_MF4_ReadVFSgnjV_MF4_ReadVFSgnjV_MF4_ReadVMask = 233, WriteVFSlide1F_M1_ReadVFSlideV_M1_ReadVFSlideF_M1_ReadVMask = 234, WriteVFSlide1F_M2_ReadVFSlideV_M2_ReadVFSlideF_M2_ReadVMask = 235, WriteVFSlide1F_M4_ReadVFSlideV_M4_ReadVFSlideF_M4_ReadVMask = 236, WriteVFSlide1F_M8_ReadVFSlideV_M8_ReadVFSlideF_M8_ReadVMask = 237, WriteVFSlide1F_MF2_ReadVFSlideV_MF2_ReadVFSlideF_MF2_ReadVMask = 238, WriteVFSlide1F_MF4_ReadVFSlideV_MF4_ReadVFSlideF_MF4_ReadVMask = 239, WriteVFSqrtV_M1_ReadVFSqrtV_M1_ReadVMask = 240, WriteVFSqrtV_M2_ReadVFSqrtV_M2_ReadVMask = 241, WriteVFSqrtV_M4_ReadVFSqrtV_M4_ReadVMask = 242, WriteVFSqrtV_M8_ReadVFSqrtV_M8_ReadVMask = 243, WriteVFSqrtV_MF2_ReadVFSqrtV_MF2_ReadVMask = 244, WriteVFSqrtV_MF4_ReadVFSqrtV_MF4_ReadVMask = 245, WriteVFWALUF_M1_ReadVFWALUV_M1_ReadVFWALUF_M1_ReadVMask = 246, WriteVFWALUF_M2_ReadVFWALUV_M2_ReadVFWALUF_M2_ReadVMask = 247, WriteVFWALUF_M4_ReadVFWALUV_M4_ReadVFWALUF_M4_ReadVMask = 248, WriteVFWALUF_MF2_ReadVFWALUV_MF2_ReadVFWALUF_MF2_ReadVMask = 249, WriteVFWALUF_MF4_ReadVFWALUV_MF4_ReadVFWALUF_MF4_ReadVMask = 250, WriteVFWALUV_M1_ReadVFWALUV_M1_ReadVFWALUV_M1_ReadVMask = 251, WriteVFWALUV_M2_ReadVFWALUV_M2_ReadVFWALUV_M2_ReadVMask = 252, WriteVFWALUV_M4_ReadVFWALUV_M4_ReadVFWALUV_M4_ReadVMask = 253, WriteVFWALUV_MF2_ReadVFWALUV_MF2_ReadVFWALUV_MF2_ReadVMask = 254, WriteVFWALUV_MF4_ReadVFWALUV_MF4_ReadVFWALUV_MF4_ReadVMask = 255, WriteVFWCvtFToFV_M1_ReadVFWCvtFToFV_M1_ReadVMask = 256, WriteVFWCvtFToFV_M2_ReadVFWCvtFToFV_M2_ReadVMask = 257, WriteVFWCvtFToFV_M4_ReadVFWCvtFToFV_M4_ReadVMask = 258, WriteVFWCvtFToFV_MF2_ReadVFWCvtFToFV_MF2_ReadVMask = 259, WriteVFWCvtFToFV_MF4_ReadVFWCvtFToFV_MF4_ReadVMask = 260, WriteVFWCvtIToFV_M1_ReadVFWCvtIToFV_M1_ReadVMask = 261, WriteVFWCvtIToFV_M2_ReadVFWCvtIToFV_M2_ReadVMask = 262, WriteVFWCvtIToFV_M4_ReadVFWCvtIToFV_M4_ReadVMask = 263, WriteVFWCvtIToFV_MF2_ReadVFWCvtIToFV_MF2_ReadVMask = 264, WriteVFWCvtIToFV_MF4_ReadVFWCvtIToFV_MF4_ReadVMask = 265, WriteVFWCvtIToFV_MF8_ReadVFWCvtIToFV_MF8_ReadVMask = 266, WriteVFWCvtFToIV_M1_ReadVFWCvtFToIV_M1_ReadVMask = 267, WriteVFWCvtFToIV_M2_ReadVFWCvtFToIV_M2_ReadVMask = 268, WriteVFWCvtFToIV_M4_ReadVFWCvtFToIV_M4_ReadVMask = 269, WriteVFWCvtFToIV_MF2_ReadVFWCvtFToIV_MF2_ReadVMask = 270, WriteVFWCvtFToIV_MF4_ReadVFWCvtFToIV_MF4_ReadVMask = 271, WriteVFWMulAddF_M1_ReadVFWMulAddV_M1_ReadVFWMulAddV_M1_ReadVFWMulAddF_M1_ReadVMask = 272, WriteVFWMulAddF_M2_ReadVFWMulAddV_M2_ReadVFWMulAddV_M2_ReadVFWMulAddF_M2_ReadVMask = 273, WriteVFWMulAddF_M4_ReadVFWMulAddV_M4_ReadVFWMulAddV_M4_ReadVFWMulAddF_M4_ReadVMask = 274, WriteVFWMulAddF_MF2_ReadVFWMulAddV_MF2_ReadVFWMulAddV_MF2_ReadVFWMulAddF_MF2_ReadVMask = 275, WriteVFWMulAddF_MF4_ReadVFWMulAddV_MF4_ReadVFWMulAddV_MF4_ReadVFWMulAddF_MF4_ReadVMask = 276, WriteVFWMulAddV_M1_ReadVFWMulAddV_M1_ReadVFWMulAddV_M1_ReadVFWMulAddV_M1_ReadVMask = 277, WriteVFWMulAddV_M2_ReadVFWMulAddV_M2_ReadVFWMulAddV_M2_ReadVFWMulAddV_M2_ReadVMask = 278, WriteVFWMulAddV_M4_ReadVFWMulAddV_M4_ReadVFWMulAddV_M4_ReadVFWMulAddV_M4_ReadVMask = 279, WriteVFWMulAddV_MF2_ReadVFWMulAddV_MF2_ReadVFWMulAddV_MF2_ReadVFWMulAddV_MF2_ReadVMask = 280, WriteVFWMulAddV_MF4_ReadVFWMulAddV_MF4_ReadVFWMulAddV_MF4_ReadVFWMulAddV_MF4_ReadVMask = 281, WriteVFWMulF_M1_ReadVFWMulV_M1_ReadVFWMulF_M1_ReadVMask = 282, WriteVFWMulF_M2_ReadVFWMulV_M2_ReadVFWMulF_M2_ReadVMask = 283, WriteVFWMulF_M4_ReadVFWMulV_M4_ReadVFWMulF_M4_ReadVMask = 284, WriteVFWMulF_MF2_ReadVFWMulV_MF2_ReadVFWMulF_MF2_ReadVMask = 285, WriteVFWMulF_MF4_ReadVFWMulV_MF4_ReadVFWMulF_MF4_ReadVMask = 286, WriteVFWMulV_M1_ReadVFWMulV_M1_ReadVFWMulV_M1_ReadVMask = 287, WriteVFWMulV_M2_ReadVFWMulV_M2_ReadVFWMulV_M2_ReadVMask = 288, WriteVFWMulV_M4_ReadVFWMulV_M4_ReadVFWMulV_M4_ReadVMask = 289, WriteVFWMulV_MF2_ReadVFWMulV_MF2_ReadVFWMulV_MF2_ReadVMask = 290, WriteVFWMulV_MF4_ReadVFWMulV_MF4_ReadVFWMulV_MF4_ReadVMask = 291, WriteVFWRedV_ReadVFWRedV_ReadVFWRedV_ReadVFWRedV_ReadVMask = 292, WriteVMIdxV_M1_ReadVMask = 293, WriteVMIdxV_M2_ReadVMask = 294, WriteVMIdxV_M4_ReadVMask = 295, WriteVMIdxV_M8_ReadVMask = 296, WriteVMIdxV_MF2_ReadVMask = 297, WriteVMIdxV_MF4_ReadVMask = 298, WriteVMIdxV_MF8_ReadVMask = 299, WriteVMIotV_M1_ReadVMIotV_M1_ReadVMask = 300, WriteVMIotV_M2_ReadVMIotV_M2_ReadVMask = 301, WriteVMIotV_M4_ReadVMIotV_M4_ReadVMask = 302, WriteVMIotV_M8_ReadVMIotV_M8_ReadVMask = 303, WriteVMIotV_MF2_ReadVMIotV_MF2_ReadVMask = 304, WriteVMIotV_MF4_ReadVMIotV_MF4_ReadVMask = 305, WriteVMIotV_MF8_ReadVMIotV_MF8_ReadVMask = 306, WriteVLDFF_M1_ReadVLDX_M1_ReadVMask = 307, WriteVLDFF_M2_ReadVLDX_M2_ReadVMask = 308, WriteVLDFF_M4_ReadVLDX_M4_ReadVMask = 309, WriteVLDFF_M8_ReadVLDX_M8_ReadVMask = 310, WriteVLDFF_MF2_ReadVLDX_MF2_ReadVMask = 311, WriteVLDFF_MF4_ReadVLDX_MF4_ReadVMask = 312, WriteVLDE_M1_ReadVLDX_M1_ReadVMask = 313, WriteVLDE_M2_ReadVLDX_M2_ReadVMask = 314, WriteVLDE_M4_ReadVLDX_M4_ReadVMask = 315, WriteVLDE_M8_ReadVLDX_M8_ReadVMask = 316, WriteVLDE_MF2_ReadVLDX_MF2_ReadVMask = 317, WriteVLDE_MF4_ReadVLDX_MF4_ReadVMask = 318, WriteVLDFF_MF8_ReadVLDX_MF8_ReadVMask = 319, WriteVLDE_MF8_ReadVLDX_MF8_ReadVMask = 320, WriteVLDM_MF8_ReadVLDX_MF8 = 321, WriteVLDM_M2_ReadVLDX_M2 = 322, WriteVLDM_MF4_ReadVLDX_MF4 = 323, WriteVLDM_M4_ReadVLDX_M4 = 324, WriteVLDM_MF2_ReadVLDX_MF2 = 325, WriteVLDM_M8_ReadVLDX_M8 = 326, WriteVLDM_M1_ReadVLDX_M1 = 327, WriteVLDOX16_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 328, WriteVLDOX16_M2_ReadVLDX_M2_ReadVLDOXV_M2_ReadVMask = 329, WriteVLDOX16_M4_ReadVLDX_M4_ReadVLDOXV_M4_ReadVMask = 330, WriteVLDOX16_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 331, WriteVLDOX16_M8_ReadVLDX_M8_ReadVLDOXV_M8_ReadVMask = 332, WriteVLDOX16_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 333, WriteVLDOX16_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 334, WriteVLDOX32_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 335, WriteVLDOX32_M2_ReadVLDX_M2_ReadVLDOXV_M2_ReadVMask = 336, WriteVLDOX32_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 337, WriteVLDOX32_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 338, WriteVLDOX32_M4_ReadVLDX_M4_ReadVLDOXV_M4_ReadVMask = 339, WriteVLDOX32_M8_ReadVLDX_M8_ReadVLDOXV_M8_ReadVMask = 340, WriteVLDOX32_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 341, WriteVLDOX64_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 342, WriteVLDOX64_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 343, WriteVLDOX64_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 344, WriteVLDOX64_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 345, WriteVLDOX64_M2_ReadVLDX_M2_ReadVLDOXV_M2_ReadVMask = 346, WriteVLDOX64_M4_ReadVLDX_M4_ReadVLDOXV_M4_ReadVMask = 347, WriteVLDOX64_M8_ReadVLDX_M8_ReadVLDOXV_M8_ReadVMask = 348, WriteVLDOX8_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 349, WriteVLDOX8_M2_ReadVLDX_M2_ReadVLDOXV_M2_ReadVMask = 350, WriteVLDOX8_M4_ReadVLDX_M4_ReadVLDOXV_M4_ReadVMask = 351, WriteVLDOX8_M8_ReadVLDX_M8_ReadVLDOXV_M8_ReadVMask = 352, WriteVLDOX8_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 353, WriteVLDOX8_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 354, WriteVLDOX8_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 355, WriteVLOXSEG2e16_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 356, WriteVLOXSEG2e16_M2_ReadVLDX_M2_ReadVLDOXV_M2_ReadVMask = 357, WriteVLOXSEG2e16_M4_ReadVLDX_M4_ReadVLDOXV_M4_ReadVMask = 358, WriteVLOXSEG2e16_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 359, WriteVLOXSEG2e16_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 360, WriteVLOXSEG2e16_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 361, WriteVLOXSEG2e32_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 362, WriteVLOXSEG2e32_M2_ReadVLDX_M2_ReadVLDOXV_M2_ReadVMask = 363, WriteVLOXSEG2e32_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 364, WriteVLOXSEG2e32_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 365, WriteVLOXSEG2e32_M4_ReadVLDX_M4_ReadVLDOXV_M4_ReadVMask = 366, WriteVLOXSEG2e32_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 367, WriteVLOXSEG2e64_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 368, WriteVLOXSEG2e64_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 369, WriteVLOXSEG2e64_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 370, WriteVLOXSEG2e64_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 371, WriteVLOXSEG2e64_M2_ReadVLDX_M2_ReadVLDOXV_M2_ReadVMask = 372, WriteVLOXSEG2e64_M4_ReadVLDX_M4_ReadVLDOXV_M4_ReadVMask = 373, WriteVLOXSEG2e8_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 374, WriteVLOXSEG2e8_M2_ReadVLDX_M2_ReadVLDOXV_M2_ReadVMask = 375, WriteVLOXSEG2e8_M4_ReadVLDX_M4_ReadVLDOXV_M4_ReadVMask = 376, WriteVLOXSEG2e8_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 377, WriteVLOXSEG2e8_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 378, WriteVLOXSEG2e8_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 379, WriteVLOXSEG3e16_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 380, WriteVLOXSEG3e16_M2_ReadVLDX_M2_ReadVLDOXV_M2_ReadVMask = 381, WriteVLOXSEG3e16_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 382, WriteVLOXSEG3e16_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 383, WriteVLOXSEG3e16_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 384, WriteVLOXSEG3e32_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 385, WriteVLOXSEG3e32_M2_ReadVLDX_M2_ReadVLDOXV_M2_ReadVMask = 386, WriteVLOXSEG3e32_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 387, WriteVLOXSEG3e32_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 388, WriteVLOXSEG3e32_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 389, WriteVLOXSEG3e64_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 390, WriteVLOXSEG3e64_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 391, WriteVLOXSEG3e64_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 392, WriteVLOXSEG3e64_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 393, WriteVLOXSEG3e64_M2_ReadVLDX_M2_ReadVLDOXV_M2_ReadVMask = 394, WriteVLOXSEG3e8_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 395, WriteVLOXSEG3e8_M2_ReadVLDX_M2_ReadVLDOXV_M2_ReadVMask = 396, WriteVLOXSEG3e8_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 397, WriteVLOXSEG3e8_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 398, WriteVLOXSEG3e8_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 399, WriteVLOXSEG4e16_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 400, WriteVLOXSEG4e16_M2_ReadVLDX_M2_ReadVLDOXV_M2_ReadVMask = 401, WriteVLOXSEG4e16_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 402, WriteVLOXSEG4e16_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 403, WriteVLOXSEG4e16_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 404, WriteVLOXSEG4e32_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 405, WriteVLOXSEG4e32_M2_ReadVLDX_M2_ReadVLDOXV_M2_ReadVMask = 406, WriteVLOXSEG4e32_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 407, WriteVLOXSEG4e32_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 408, WriteVLOXSEG4e32_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 409, WriteVLOXSEG4e64_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 410, WriteVLOXSEG4e64_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 411, WriteVLOXSEG4e64_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 412, WriteVLOXSEG4e64_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 413, WriteVLOXSEG4e64_M2_ReadVLDX_M2_ReadVLDOXV_M2_ReadVMask = 414, WriteVLOXSEG4e8_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 415, WriteVLOXSEG4e8_M2_ReadVLDX_M2_ReadVLDOXV_M2_ReadVMask = 416, WriteVLOXSEG4e8_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 417, WriteVLOXSEG4e8_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 418, WriteVLOXSEG4e8_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 419, WriteVLOXSEG5e16_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 420, WriteVLOXSEG5e16_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 421, WriteVLOXSEG5e16_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 422, WriteVLOXSEG5e16_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 423, WriteVLOXSEG5e32_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 424, WriteVLOXSEG5e32_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 425, WriteVLOXSEG5e32_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 426, WriteVLOXSEG5e32_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 427, WriteVLOXSEG5e64_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 428, WriteVLOXSEG5e64_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 429, WriteVLOXSEG5e64_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 430, WriteVLOXSEG5e64_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 431, WriteVLOXSEG5e8_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 432, WriteVLOXSEG5e8_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 433, WriteVLOXSEG5e8_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 434, WriteVLOXSEG5e8_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 435, WriteVLOXSEG6e16_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 436, WriteVLOXSEG6e16_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 437, WriteVLOXSEG6e16_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 438, WriteVLOXSEG6e16_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 439, WriteVLOXSEG6e32_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 440, WriteVLOXSEG6e32_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 441, WriteVLOXSEG6e32_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 442, WriteVLOXSEG6e32_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 443, WriteVLOXSEG6e64_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 444, WriteVLOXSEG6e64_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 445, WriteVLOXSEG6e64_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 446, WriteVLOXSEG6e64_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 447, WriteVLOXSEG6e8_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 448, WriteVLOXSEG6e8_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 449, WriteVLOXSEG6e8_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 450, WriteVLOXSEG6e8_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 451, WriteVLOXSEG7e16_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 452, WriteVLOXSEG7e16_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 453, WriteVLOXSEG7e16_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 454, WriteVLOXSEG7e16_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 455, WriteVLOXSEG7e32_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 456, WriteVLOXSEG7e32_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 457, WriteVLOXSEG7e32_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 458, WriteVLOXSEG7e32_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 459, WriteVLOXSEG7e64_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 460, WriteVLOXSEG7e64_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 461, WriteVLOXSEG7e64_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 462, WriteVLOXSEG7e64_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 463, WriteVLOXSEG7e8_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 464, WriteVLOXSEG7e8_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 465, WriteVLOXSEG7e8_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 466, WriteVLOXSEG7e8_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 467, WriteVLOXSEG8e16_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 468, WriteVLOXSEG8e16_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 469, WriteVLOXSEG8e16_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 470, WriteVLOXSEG8e16_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 471, WriteVLOXSEG8e32_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 472, WriteVLOXSEG8e32_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 473, WriteVLOXSEG8e32_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 474, WriteVLOXSEG8e32_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 475, WriteVLOXSEG8e64_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 476, WriteVLOXSEG8e64_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 477, WriteVLOXSEG8e64_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 478, WriteVLOXSEG8e64_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 479, WriteVLOXSEG8e8_M1_ReadVLDX_M1_ReadVLDOXV_M1_ReadVMask = 480, WriteVLOXSEG8e8_MF2_ReadVLDX_MF2_ReadVLDOXV_MF2_ReadVMask = 481, WriteVLOXSEG8e8_MF4_ReadVLDX_MF4_ReadVLDOXV_MF4_ReadVMask = 482, WriteVLOXSEG8e8_MF8_ReadVLDX_MF8_ReadVLDOXV_MF8_ReadVMask = 483, WriteVLDS16_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 484, WriteVLDS16_M2_ReadVLDX_M2_ReadVLDSX_M2_ReadVMask = 485, WriteVLDS16_M4_ReadVLDX_M4_ReadVLDSX_M4_ReadVMask = 486, WriteVLDS16_M8_ReadVLDX_M8_ReadVLDSX_M8_ReadVMask = 487, WriteVLDS16_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 488, WriteVLDS16_MF4_ReadVLDX_MF4_ReadVLDSX_MF4_ReadVMask = 489, WriteVLDS32_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 490, WriteVLDS32_M2_ReadVLDX_M2_ReadVLDSX_M2_ReadVMask = 491, WriteVLDS32_M4_ReadVLDX_M4_ReadVLDSX_M4_ReadVMask = 492, WriteVLDS32_M8_ReadVLDX_M8_ReadVLDSX_M8_ReadVMask = 493, WriteVLDS32_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 494, WriteVLDS64_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 495, WriteVLDS64_M2_ReadVLDX_M2_ReadVLDSX_M2_ReadVMask = 496, WriteVLDS64_M4_ReadVLDX_M4_ReadVLDSX_M4_ReadVMask = 497, WriteVLDS64_M8_ReadVLDX_M8_ReadVLDSX_M8_ReadVMask = 498, WriteVLDS8_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 499, WriteVLDS8_M2_ReadVLDX_M2_ReadVLDSX_M2_ReadVMask = 500, WriteVLDS8_M4_ReadVLDX_M4_ReadVLDSX_M4_ReadVMask = 501, WriteVLDS8_M8_ReadVLDX_M8_ReadVLDSX_M8_ReadVMask = 502, WriteVLDS8_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 503, WriteVLDS8_MF4_ReadVLDX_MF4_ReadVLDSX_MF4_ReadVMask = 504, WriteVLDS8_MF8_ReadVLDX_MF8_ReadVLDSX_MF8_ReadVMask = 505, WriteVLSEGFF2e16_M1_ReadVLDX_M1_ReadVMask = 506, WriteVLSEGFF2e16_M2_ReadVLDX_M2_ReadVMask = 507, WriteVLSEGFF2e16_M4_ReadVLDX_M4_ReadVMask = 508, WriteVLSEGFF2e16_MF2_ReadVLDX_MF2_ReadVMask = 509, WriteVLSEGFF2e16_MF4_ReadVLDX_MF4_ReadVMask = 510, WriteVLSEG2e16_M1_ReadVLDX_M1_ReadVMask = 511, WriteVLSEG2e16_M2_ReadVLDX_M2_ReadVMask = 512, WriteVLSEG2e16_M4_ReadVLDX_M4_ReadVMask = 513, WriteVLSEG2e16_MF2_ReadVLDX_MF2_ReadVMask = 514, WriteVLSEG2e16_MF4_ReadVLDX_MF4_ReadVMask = 515, WriteVLSEGFF2e32_M1_ReadVLDX_M1_ReadVMask = 516, WriteVLSEGFF2e32_M2_ReadVLDX_M2_ReadVMask = 517, WriteVLSEGFF2e32_M4_ReadVLDX_M4_ReadVMask = 518, WriteVLSEGFF2e32_MF2_ReadVLDX_MF2_ReadVMask = 519, WriteVLSEG2e32_M1_ReadVLDX_M1_ReadVMask = 520, WriteVLSEG2e32_M2_ReadVLDX_M2_ReadVMask = 521, WriteVLSEG2e32_M4_ReadVLDX_M4_ReadVMask = 522, WriteVLSEG2e32_MF2_ReadVLDX_MF2_ReadVMask = 523, WriteVLSEGFF2e64_M1_ReadVLDX_M1_ReadVMask = 524, WriteVLSEGFF2e64_M2_ReadVLDX_M2_ReadVMask = 525, WriteVLSEGFF2e64_M4_ReadVLDX_M4_ReadVMask = 526, WriteVLSEG2e64_M1_ReadVLDX_M1_ReadVMask = 527, WriteVLSEG2e64_M2_ReadVLDX_M2_ReadVMask = 528, WriteVLSEG2e64_M4_ReadVLDX_M4_ReadVMask = 529, WriteVLSEGFF2e8_M1_ReadVLDX_M1_ReadVMask = 530, WriteVLSEGFF2e8_M2_ReadVLDX_M2_ReadVMask = 531, WriteVLSEGFF2e8_M4_ReadVLDX_M4_ReadVMask = 532, WriteVLSEGFF2e8_MF2_ReadVLDX_MF2_ReadVMask = 533, WriteVLSEGFF2e8_MF4_ReadVLDX_MF4_ReadVMask = 534, WriteVLSEGFF2e8_MF8_ReadVLDX_MF8_ReadVMask = 535, WriteVLSEG2e8_M1_ReadVLDX_M1_ReadVMask = 536, WriteVLSEG2e8_M2_ReadVLDX_M2_ReadVMask = 537, WriteVLSEG2e8_M4_ReadVLDX_M4_ReadVMask = 538, WriteVLSEG2e8_MF2_ReadVLDX_MF2_ReadVMask = 539, WriteVLSEG2e8_MF4_ReadVLDX_MF4_ReadVMask = 540, WriteVLSEG2e8_MF8_ReadVLDX_MF8_ReadVMask = 541, WriteVLSEGFF3e16_M1_ReadVLDX_M1_ReadVMask = 542, WriteVLSEGFF3e16_M2_ReadVLDX_M2_ReadVMask = 543, WriteVLSEGFF3e16_MF2_ReadVLDX_MF2_ReadVMask = 544, WriteVLSEGFF3e16_MF4_ReadVLDX_MF4_ReadVMask = 545, WriteVLSEG3e16_M1_ReadVLDX_M1_ReadVMask = 546, WriteVLSEG3e16_M2_ReadVLDX_M2_ReadVMask = 547, WriteVLSEG3e16_MF2_ReadVLDX_MF2_ReadVMask = 548, WriteVLSEG3e16_MF4_ReadVLDX_MF4_ReadVMask = 549, WriteVLSEGFF3e32_M1_ReadVLDX_M1_ReadVMask = 550, WriteVLSEGFF3e32_M2_ReadVLDX_M2_ReadVMask = 551, WriteVLSEGFF3e32_MF2_ReadVLDX_MF2_ReadVMask = 552, WriteVLSEG3e32_M1_ReadVLDX_M1_ReadVMask = 553, WriteVLSEG3e32_M2_ReadVLDX_M2_ReadVMask = 554, WriteVLSEG3e32_MF2_ReadVLDX_MF2_ReadVMask = 555, WriteVLSEGFF3e64_M1_ReadVLDX_M1_ReadVMask = 556, WriteVLSEGFF3e64_M2_ReadVLDX_M2_ReadVMask = 557, WriteVLSEG3e64_M1_ReadVLDX_M1_ReadVMask = 558, WriteVLSEG3e64_M2_ReadVLDX_M2_ReadVMask = 559, WriteVLSEGFF3e8_M1_ReadVLDX_M1_ReadVMask = 560, WriteVLSEGFF3e8_M2_ReadVLDX_M2_ReadVMask = 561, WriteVLSEGFF3e8_MF2_ReadVLDX_MF2_ReadVMask = 562, WriteVLSEGFF3e8_MF4_ReadVLDX_MF4_ReadVMask = 563, WriteVLSEGFF3e8_MF8_ReadVLDX_MF8_ReadVMask = 564, WriteVLSEG3e8_M1_ReadVLDX_M1_ReadVMask = 565, WriteVLSEG3e8_M2_ReadVLDX_M2_ReadVMask = 566, WriteVLSEG3e8_MF2_ReadVLDX_MF2_ReadVMask = 567, WriteVLSEG3e8_MF4_ReadVLDX_MF4_ReadVMask = 568, WriteVLSEG3e8_MF8_ReadVLDX_MF8_ReadVMask = 569, WriteVLSEGFF4e16_M1_ReadVLDX_M1_ReadVMask = 570, WriteVLSEGFF4e16_M2_ReadVLDX_M2_ReadVMask = 571, WriteVLSEGFF4e16_MF2_ReadVLDX_MF2_ReadVMask = 572, WriteVLSEGFF4e16_MF4_ReadVLDX_MF4_ReadVMask = 573, WriteVLSEG4e16_M1_ReadVLDX_M1_ReadVMask = 574, WriteVLSEG4e16_M2_ReadVLDX_M2_ReadVMask = 575, WriteVLSEG4e16_MF2_ReadVLDX_MF2_ReadVMask = 576, WriteVLSEG4e16_MF4_ReadVLDX_MF4_ReadVMask = 577, WriteVLSEGFF4e32_M1_ReadVLDX_M1_ReadVMask = 578, WriteVLSEGFF4e32_M2_ReadVLDX_M2_ReadVMask = 579, WriteVLSEGFF4e32_MF2_ReadVLDX_MF2_ReadVMask = 580, WriteVLSEG4e32_M1_ReadVLDX_M1_ReadVMask = 581, WriteVLSEG4e32_M2_ReadVLDX_M2_ReadVMask = 582, WriteVLSEG4e32_MF2_ReadVLDX_MF2_ReadVMask = 583, WriteVLSEGFF4e64_M1_ReadVLDX_M1_ReadVMask = 584, WriteVLSEGFF4e64_M2_ReadVLDX_M2_ReadVMask = 585, WriteVLSEG4e64_M1_ReadVLDX_M1_ReadVMask = 586, WriteVLSEG4e64_M2_ReadVLDX_M2_ReadVMask = 587, WriteVLSEGFF4e8_M1_ReadVLDX_M1_ReadVMask = 588, WriteVLSEGFF4e8_M2_ReadVLDX_M2_ReadVMask = 589, WriteVLSEGFF4e8_MF2_ReadVLDX_MF2_ReadVMask = 590, WriteVLSEGFF4e8_MF4_ReadVLDX_MF4_ReadVMask = 591, WriteVLSEGFF4e8_MF8_ReadVLDX_MF8_ReadVMask = 592, WriteVLSEG4e8_M1_ReadVLDX_M1_ReadVMask = 593, WriteVLSEG4e8_M2_ReadVLDX_M2_ReadVMask = 594, WriteVLSEG4e8_MF2_ReadVLDX_MF2_ReadVMask = 595, WriteVLSEG4e8_MF4_ReadVLDX_MF4_ReadVMask = 596, WriteVLSEG4e8_MF8_ReadVLDX_MF8_ReadVMask = 597, WriteVLSEGFF5e16_M1_ReadVLDX_M1_ReadVMask = 598, WriteVLSEGFF5e16_MF2_ReadVLDX_MF2_ReadVMask = 599, WriteVLSEGFF5e16_MF4_ReadVLDX_MF4_ReadVMask = 600, WriteVLSEG5e16_M1_ReadVLDX_M1_ReadVMask = 601, WriteVLSEG5e16_MF2_ReadVLDX_MF2_ReadVMask = 602, WriteVLSEG5e16_MF4_ReadVLDX_MF4_ReadVMask = 603, WriteVLSEGFF5e32_M1_ReadVLDX_M1_ReadVMask = 604, WriteVLSEGFF5e32_MF2_ReadVLDX_MF2_ReadVMask = 605, WriteVLSEG5e32_M1_ReadVLDX_M1_ReadVMask = 606, WriteVLSEG5e32_MF2_ReadVLDX_MF2_ReadVMask = 607, WriteVLSEGFF5e64_M1_ReadVLDX_M1_ReadVMask = 608, WriteVLSEG5e64_M1_ReadVLDX_M1_ReadVMask = 609, WriteVLSEGFF5e8_M1_ReadVLDX_M1_ReadVMask = 610, WriteVLSEGFF5e8_MF2_ReadVLDX_MF2_ReadVMask = 611, WriteVLSEGFF5e8_MF4_ReadVLDX_MF4_ReadVMask = 612, WriteVLSEGFF5e8_MF8_ReadVLDX_MF8_ReadVMask = 613, WriteVLSEG5e8_M1_ReadVLDX_M1_ReadVMask = 614, WriteVLSEG5e8_MF2_ReadVLDX_MF2_ReadVMask = 615, WriteVLSEG5e8_MF4_ReadVLDX_MF4_ReadVMask = 616, WriteVLSEG5e8_MF8_ReadVLDX_MF8_ReadVMask = 617, WriteVLSEGFF6e16_M1_ReadVLDX_M1_ReadVMask = 618, WriteVLSEGFF6e16_MF2_ReadVLDX_MF2_ReadVMask = 619, WriteVLSEGFF6e16_MF4_ReadVLDX_MF4_ReadVMask = 620, WriteVLSEG6e16_M1_ReadVLDX_M1_ReadVMask = 621, WriteVLSEG6e16_MF2_ReadVLDX_MF2_ReadVMask = 622, WriteVLSEG6e16_MF4_ReadVLDX_MF4_ReadVMask = 623, WriteVLSEGFF6e32_M1_ReadVLDX_M1_ReadVMask = 624, WriteVLSEGFF6e32_MF2_ReadVLDX_MF2_ReadVMask = 625, WriteVLSEG6e32_M1_ReadVLDX_M1_ReadVMask = 626, WriteVLSEG6e32_MF2_ReadVLDX_MF2_ReadVMask = 627, WriteVLSEGFF6e64_M1_ReadVLDX_M1_ReadVMask = 628, WriteVLSEG6e64_M1_ReadVLDX_M1_ReadVMask = 629, WriteVLSEGFF6e8_M1_ReadVLDX_M1_ReadVMask = 630, WriteVLSEGFF6e8_MF2_ReadVLDX_MF2_ReadVMask = 631, WriteVLSEGFF6e8_MF4_ReadVLDX_MF4_ReadVMask = 632, WriteVLSEGFF6e8_MF8_ReadVLDX_MF8_ReadVMask = 633, WriteVLSEG6e8_M1_ReadVLDX_M1_ReadVMask = 634, WriteVLSEG6e8_MF2_ReadVLDX_MF2_ReadVMask = 635, WriteVLSEG6e8_MF4_ReadVLDX_MF4_ReadVMask = 636, WriteVLSEG6e8_MF8_ReadVLDX_MF8_ReadVMask = 637, WriteVLSEGFF7e16_M1_ReadVLDX_M1_ReadVMask = 638, WriteVLSEGFF7e16_MF2_ReadVLDX_MF2_ReadVMask = 639, WriteVLSEGFF7e16_MF4_ReadVLDX_MF4_ReadVMask = 640, WriteVLSEG7e16_M1_ReadVLDX_M1_ReadVMask = 641, WriteVLSEG7e16_MF2_ReadVLDX_MF2_ReadVMask = 642, WriteVLSEG7e16_MF4_ReadVLDX_MF4_ReadVMask = 643, WriteVLSEGFF7e32_M1_ReadVLDX_M1_ReadVMask = 644, WriteVLSEGFF7e32_MF2_ReadVLDX_MF2_ReadVMask = 645, WriteVLSEG7e32_M1_ReadVLDX_M1_ReadVMask = 646, WriteVLSEG7e32_MF2_ReadVLDX_MF2_ReadVMask = 647, WriteVLSEGFF7e64_M1_ReadVLDX_M1_ReadVMask = 648, WriteVLSEG7e64_M1_ReadVLDX_M1_ReadVMask = 649, WriteVLSEGFF7e8_M1_ReadVLDX_M1_ReadVMask = 650, WriteVLSEGFF7e8_MF2_ReadVLDX_MF2_ReadVMask = 651, WriteVLSEGFF7e8_MF4_ReadVLDX_MF4_ReadVMask = 652, WriteVLSEGFF7e8_MF8_ReadVLDX_MF8_ReadVMask = 653, WriteVLSEG7e8_M1_ReadVLDX_M1_ReadVMask = 654, WriteVLSEG7e8_MF2_ReadVLDX_MF2_ReadVMask = 655, WriteVLSEG7e8_MF4_ReadVLDX_MF4_ReadVMask = 656, WriteVLSEG7e8_MF8_ReadVLDX_MF8_ReadVMask = 657, WriteVLSEGFF8e16_M1_ReadVLDX_M1_ReadVMask = 658, WriteVLSEGFF8e16_MF2_ReadVLDX_MF2_ReadVMask = 659, WriteVLSEGFF8e16_MF4_ReadVLDX_MF4_ReadVMask = 660, WriteVLSEG8e16_M1_ReadVLDX_M1_ReadVMask = 661, WriteVLSEG8e16_MF2_ReadVLDX_MF2_ReadVMask = 662, WriteVLSEG8e16_MF4_ReadVLDX_MF4_ReadVMask = 663, WriteVLSEGFF8e32_M1_ReadVLDX_M1_ReadVMask = 664, WriteVLSEGFF8e32_MF2_ReadVLDX_MF2_ReadVMask = 665, WriteVLSEG8e32_M1_ReadVLDX_M1_ReadVMask = 666, WriteVLSEG8e32_MF2_ReadVLDX_MF2_ReadVMask = 667, WriteVLSEGFF8e64_M1_ReadVLDX_M1_ReadVMask = 668, WriteVLSEG8e64_M1_ReadVLDX_M1_ReadVMask = 669, WriteVLSEGFF8e8_M1_ReadVLDX_M1_ReadVMask = 670, WriteVLSEGFF8e8_MF2_ReadVLDX_MF2_ReadVMask = 671, WriteVLSEGFF8e8_MF4_ReadVLDX_MF4_ReadVMask = 672, WriteVLSEGFF8e8_MF8_ReadVLDX_MF8_ReadVMask = 673, WriteVLSEG8e8_M1_ReadVLDX_M1_ReadVMask = 674, WriteVLSEG8e8_MF2_ReadVLDX_MF2_ReadVMask = 675, WriteVLSEG8e8_MF4_ReadVLDX_MF4_ReadVMask = 676, WriteVLSEG8e8_MF8_ReadVLDX_MF8_ReadVMask = 677, WriteVLSSEG2e16_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 678, WriteVLSSEG2e16_M2_ReadVLDX_M2_ReadVLDSX_M2_ReadVMask = 679, WriteVLSSEG2e16_M4_ReadVLDX_M4_ReadVLDSX_M4_ReadVMask = 680, WriteVLSSEG2e16_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 681, WriteVLSSEG2e16_MF4_ReadVLDX_MF4_ReadVLDSX_MF4_ReadVMask = 682, WriteVLSSEG2e32_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 683, WriteVLSSEG2e32_M2_ReadVLDX_M2_ReadVLDSX_M2_ReadVMask = 684, WriteVLSSEG2e32_M4_ReadVLDX_M4_ReadVLDSX_M4_ReadVMask = 685, WriteVLSSEG2e32_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 686, WriteVLSSEG2e64_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 687, WriteVLSSEG2e64_M2_ReadVLDX_M2_ReadVLDSX_M2_ReadVMask = 688, WriteVLSSEG2e64_M4_ReadVLDX_M4_ReadVLDSX_M4_ReadVMask = 689, WriteVLSSEG2e8_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 690, WriteVLSSEG2e8_M2_ReadVLDX_M2_ReadVLDSX_M2_ReadVMask = 691, WriteVLSSEG2e8_M4_ReadVLDX_M4_ReadVLDSX_M4_ReadVMask = 692, WriteVLSSEG2e8_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 693, WriteVLSSEG2e8_MF4_ReadVLDX_MF4_ReadVLDSX_MF4_ReadVMask = 694, WriteVLSSEG2e8_MF8_ReadVLDX_MF8_ReadVLDSX_MF8_ReadVMask = 695, WriteVLSSEG3e16_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 696, WriteVLSSEG3e16_M2_ReadVLDX_M2_ReadVLDSX_M2_ReadVMask = 697, WriteVLSSEG3e16_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 698, WriteVLSSEG3e16_MF4_ReadVLDX_MF4_ReadVLDSX_MF4_ReadVMask = 699, WriteVLSSEG3e32_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 700, WriteVLSSEG3e32_M2_ReadVLDX_M2_ReadVLDSX_M2_ReadVMask = 701, WriteVLSSEG3e32_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 702, WriteVLSSEG3e64_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 703, WriteVLSSEG3e64_M2_ReadVLDX_M2_ReadVLDSX_M2_ReadVMask = 704, WriteVLSSEG3e8_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 705, WriteVLSSEG3e8_M2_ReadVLDX_M2_ReadVLDSX_M2_ReadVMask = 706, WriteVLSSEG3e8_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 707, WriteVLSSEG3e8_MF4_ReadVLDX_MF4_ReadVLDSX_MF4_ReadVMask = 708, WriteVLSSEG3e8_MF8_ReadVLDX_MF8_ReadVLDSX_MF8_ReadVMask = 709, WriteVLSSEG4e16_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 710, WriteVLSSEG4e16_M2_ReadVLDX_M2_ReadVLDSX_M2_ReadVMask = 711, WriteVLSSEG4e16_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 712, WriteVLSSEG4e16_MF4_ReadVLDX_MF4_ReadVLDSX_MF4_ReadVMask = 713, WriteVLSSEG4e32_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 714, WriteVLSSEG4e32_M2_ReadVLDX_M2_ReadVLDSX_M2_ReadVMask = 715, WriteVLSSEG4e32_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 716, WriteVLSSEG4e64_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 717, WriteVLSSEG4e64_M2_ReadVLDX_M2_ReadVLDSX_M2_ReadVMask = 718, WriteVLSSEG4e8_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 719, WriteVLSSEG4e8_M2_ReadVLDX_M2_ReadVLDSX_M2_ReadVMask = 720, WriteVLSSEG4e8_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 721, WriteVLSSEG4e8_MF4_ReadVLDX_MF4_ReadVLDSX_MF4_ReadVMask = 722, WriteVLSSEG4e8_MF8_ReadVLDX_MF8_ReadVLDSX_MF8_ReadVMask = 723, WriteVLSSEG5e16_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 724, WriteVLSSEG5e16_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 725, WriteVLSSEG5e16_MF4_ReadVLDX_MF4_ReadVLDSX_MF4_ReadVMask = 726, WriteVLSSEG5e32_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 727, WriteVLSSEG5e32_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 728, WriteVLSSEG5e64_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 729, WriteVLSSEG5e8_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 730, WriteVLSSEG5e8_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 731, WriteVLSSEG5e8_MF4_ReadVLDX_MF4_ReadVLDSX_MF4_ReadVMask = 732, WriteVLSSEG5e8_MF8_ReadVLDX_MF8_ReadVLDSX_MF8_ReadVMask = 733, WriteVLSSEG6e16_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 734, WriteVLSSEG6e16_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 735, WriteVLSSEG6e16_MF4_ReadVLDX_MF4_ReadVLDSX_MF4_ReadVMask = 736, WriteVLSSEG6e32_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 737, WriteVLSSEG6e32_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 738, WriteVLSSEG6e64_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 739, WriteVLSSEG6e8_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 740, WriteVLSSEG6e8_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 741, WriteVLSSEG6e8_MF4_ReadVLDX_MF4_ReadVLDSX_MF4_ReadVMask = 742, WriteVLSSEG6e8_MF8_ReadVLDX_MF8_ReadVLDSX_MF8_ReadVMask = 743, WriteVLSSEG7e16_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 744, WriteVLSSEG7e16_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 745, WriteVLSSEG7e16_MF4_ReadVLDX_MF4_ReadVLDSX_MF4_ReadVMask = 746, WriteVLSSEG7e32_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 747, WriteVLSSEG7e32_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 748, WriteVLSSEG7e64_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 749, WriteVLSSEG7e8_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 750, WriteVLSSEG7e8_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 751, WriteVLSSEG7e8_MF4_ReadVLDX_MF4_ReadVLDSX_MF4_ReadVMask = 752, WriteVLSSEG7e8_MF8_ReadVLDX_MF8_ReadVLDSX_MF8_ReadVMask = 753, WriteVLSSEG8e16_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 754, WriteVLSSEG8e16_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 755, WriteVLSSEG8e16_MF4_ReadVLDX_MF4_ReadVLDSX_MF4_ReadVMask = 756, WriteVLSSEG8e32_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 757, WriteVLSSEG8e32_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 758, WriteVLSSEG8e64_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 759, WriteVLSSEG8e8_M1_ReadVLDX_M1_ReadVLDSX_M1_ReadVMask = 760, WriteVLSSEG8e8_MF2_ReadVLDX_MF2_ReadVLDSX_MF2_ReadVMask = 761, WriteVLSSEG8e8_MF4_ReadVLDX_MF4_ReadVLDSX_MF4_ReadVMask = 762, WriteVLSSEG8e8_MF8_ReadVLDX_MF8_ReadVLDSX_MF8_ReadVMask = 763, WriteVLDUX16_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 764, WriteVLDUX16_M2_ReadVLDX_M2_ReadVLDUXV_M2_ReadVMask = 765, WriteVLDUX16_M4_ReadVLDX_M4_ReadVLDUXV_M4_ReadVMask = 766, WriteVLDUX16_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 767, WriteVLDUX16_M8_ReadVLDX_M8_ReadVLDUXV_M8_ReadVMask = 768, WriteVLDUX16_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 769, WriteVLDUX16_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 770, WriteVLDUX32_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 771, WriteVLDUX32_M2_ReadVLDX_M2_ReadVLDUXV_M2_ReadVMask = 772, WriteVLDUX32_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 773, WriteVLDUX32_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 774, WriteVLDUX32_M4_ReadVLDX_M4_ReadVLDUXV_M4_ReadVMask = 775, WriteVLDUX32_M8_ReadVLDX_M8_ReadVLDUXV_M8_ReadVMask = 776, WriteVLDUX32_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 777, WriteVLDUX64_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 778, WriteVLDUX64_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 779, WriteVLDUX64_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 780, WriteVLDUX64_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 781, WriteVLDUX64_M2_ReadVLDX_M2_ReadVLDUXV_M2_ReadVMask = 782, WriteVLDUX64_M4_ReadVLDX_M4_ReadVLDUXV_M4_ReadVMask = 783, WriteVLDUX64_M8_ReadVLDX_M8_ReadVLDUXV_M8_ReadVMask = 784, WriteVLDUX8_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 785, WriteVLDUX8_M2_ReadVLDX_M2_ReadVLDUXV_M2_ReadVMask = 786, WriteVLDUX8_M4_ReadVLDX_M4_ReadVLDUXV_M4_ReadVMask = 787, WriteVLDUX8_M8_ReadVLDX_M8_ReadVLDUXV_M8_ReadVMask = 788, WriteVLDUX8_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 789, WriteVLDUX8_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 790, WriteVLDUX8_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 791, WriteVLUXSEG2e16_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 792, WriteVLUXSEG2e16_M2_ReadVLDX_M2_ReadVLDUXV_M2_ReadVMask = 793, WriteVLUXSEG2e16_M4_ReadVLDX_M4_ReadVLDUXV_M4_ReadVMask = 794, WriteVLUXSEG2e16_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 795, WriteVLUXSEG2e16_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 796, WriteVLUXSEG2e16_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 797, WriteVLUXSEG2e32_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 798, WriteVLUXSEG2e32_M2_ReadVLDX_M2_ReadVLDUXV_M2_ReadVMask = 799, WriteVLUXSEG2e32_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 800, WriteVLUXSEG2e32_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 801, WriteVLUXSEG2e32_M4_ReadVLDX_M4_ReadVLDUXV_M4_ReadVMask = 802, WriteVLUXSEG2e32_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 803, WriteVLUXSEG2e64_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 804, WriteVLUXSEG2e64_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 805, WriteVLUXSEG2e64_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 806, WriteVLUXSEG2e64_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 807, WriteVLUXSEG2e64_M2_ReadVLDX_M2_ReadVLDUXV_M2_ReadVMask = 808, WriteVLUXSEG2e64_M4_ReadVLDX_M4_ReadVLDUXV_M4_ReadVMask = 809, WriteVLUXSEG2e8_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 810, WriteVLUXSEG2e8_M2_ReadVLDX_M2_ReadVLDUXV_M2_ReadVMask = 811, WriteVLUXSEG2e8_M4_ReadVLDX_M4_ReadVLDUXV_M4_ReadVMask = 812, WriteVLUXSEG2e8_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 813, WriteVLUXSEG2e8_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 814, WriteVLUXSEG2e8_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 815, WriteVLUXSEG3e16_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 816, WriteVLUXSEG3e16_M2_ReadVLDX_M2_ReadVLDUXV_M2_ReadVMask = 817, WriteVLUXSEG3e16_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 818, WriteVLUXSEG3e16_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 819, WriteVLUXSEG3e16_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 820, WriteVLUXSEG3e32_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 821, WriteVLUXSEG3e32_M2_ReadVLDX_M2_ReadVLDUXV_M2_ReadVMask = 822, WriteVLUXSEG3e32_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 823, WriteVLUXSEG3e32_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 824, WriteVLUXSEG3e32_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 825, WriteVLUXSEG3e64_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 826, WriteVLUXSEG3e64_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 827, WriteVLUXSEG3e64_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 828, WriteVLUXSEG3e64_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 829, WriteVLUXSEG3e64_M2_ReadVLDX_M2_ReadVLDUXV_M2_ReadVMask = 830, WriteVLUXSEG3e8_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 831, WriteVLUXSEG3e8_M2_ReadVLDX_M2_ReadVLDUXV_M2_ReadVMask = 832, WriteVLUXSEG3e8_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 833, WriteVLUXSEG3e8_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 834, WriteVLUXSEG3e8_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 835, WriteVLUXSEG4e16_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 836, WriteVLUXSEG4e16_M2_ReadVLDX_M2_ReadVLDUXV_M2_ReadVMask = 837, WriteVLUXSEG4e16_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 838, WriteVLUXSEG4e16_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 839, WriteVLUXSEG4e16_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 840, WriteVLUXSEG4e32_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 841, WriteVLUXSEG4e32_M2_ReadVLDX_M2_ReadVLDUXV_M2_ReadVMask = 842, WriteVLUXSEG4e32_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 843, WriteVLUXSEG4e32_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 844, WriteVLUXSEG4e32_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 845, WriteVLUXSEG4e64_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 846, WriteVLUXSEG4e64_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 847, WriteVLUXSEG4e64_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 848, WriteVLUXSEG4e64_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 849, WriteVLUXSEG4e64_M2_ReadVLDX_M2_ReadVLDUXV_M2_ReadVMask = 850, WriteVLUXSEG4e8_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 851, WriteVLUXSEG4e8_M2_ReadVLDX_M2_ReadVLDUXV_M2_ReadVMask = 852, WriteVLUXSEG4e8_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 853, WriteVLUXSEG4e8_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 854, WriteVLUXSEG4e8_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 855, WriteVLUXSEG5e16_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 856, WriteVLUXSEG5e16_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 857, WriteVLUXSEG5e16_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 858, WriteVLUXSEG5e16_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 859, WriteVLUXSEG5e32_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 860, WriteVLUXSEG5e32_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 861, WriteVLUXSEG5e32_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 862, WriteVLUXSEG5e32_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 863, WriteVLUXSEG5e64_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 864, WriteVLUXSEG5e64_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 865, WriteVLUXSEG5e64_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 866, WriteVLUXSEG5e64_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 867, WriteVLUXSEG5e8_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 868, WriteVLUXSEG5e8_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 869, WriteVLUXSEG5e8_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 870, WriteVLUXSEG5e8_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 871, WriteVLUXSEG6e16_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 872, WriteVLUXSEG6e16_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 873, WriteVLUXSEG6e16_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 874, WriteVLUXSEG6e16_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 875, WriteVLUXSEG6e32_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 876, WriteVLUXSEG6e32_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 877, WriteVLUXSEG6e32_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 878, WriteVLUXSEG6e32_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 879, WriteVLUXSEG6e64_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 880, WriteVLUXSEG6e64_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 881, WriteVLUXSEG6e64_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 882, WriteVLUXSEG6e64_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 883, WriteVLUXSEG6e8_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 884, WriteVLUXSEG6e8_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 885, WriteVLUXSEG6e8_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 886, WriteVLUXSEG6e8_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 887, WriteVLUXSEG7e16_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 888, WriteVLUXSEG7e16_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 889, WriteVLUXSEG7e16_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 890, WriteVLUXSEG7e16_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 891, WriteVLUXSEG7e32_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 892, WriteVLUXSEG7e32_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 893, WriteVLUXSEG7e32_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 894, WriteVLUXSEG7e32_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 895, WriteVLUXSEG7e64_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 896, WriteVLUXSEG7e64_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 897, WriteVLUXSEG7e64_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 898, WriteVLUXSEG7e64_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 899, WriteVLUXSEG7e8_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 900, WriteVLUXSEG7e8_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 901, WriteVLUXSEG7e8_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 902, WriteVLUXSEG7e8_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 903, WriteVLUXSEG8e16_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 904, WriteVLUXSEG8e16_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 905, WriteVLUXSEG8e16_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 906, WriteVLUXSEG8e16_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 907, WriteVLUXSEG8e32_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 908, WriteVLUXSEG8e32_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 909, WriteVLUXSEG8e32_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 910, WriteVLUXSEG8e32_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 911, WriteVLUXSEG8e64_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 912, WriteVLUXSEG8e64_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 913, WriteVLUXSEG8e64_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 914, WriteVLUXSEG8e64_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 915, WriteVLUXSEG8e8_M1_ReadVLDX_M1_ReadVLDUXV_M1_ReadVMask = 916, WriteVLUXSEG8e8_MF2_ReadVLDX_MF2_ReadVLDUXV_MF2_ReadVMask = 917, WriteVLUXSEG8e8_MF4_ReadVLDX_MF4_ReadVLDUXV_MF4_ReadVMask = 918, WriteVLUXSEG8e8_MF8_ReadVLDX_MF8_ReadVLDUXV_MF8_ReadVMask = 919, WriteVIMulAddV_M1_ReadVIMulAddV_M1_ReadVIMulAddV_M1_ReadVIMulAddV_M1_ReadVMask = 920, WriteVIMulAddV_M2_ReadVIMulAddV_M2_ReadVIMulAddV_M2_ReadVIMulAddV_M2_ReadVMask = 921, WriteVIMulAddV_M4_ReadVIMulAddV_M4_ReadVIMulAddV_M4_ReadVIMulAddV_M4_ReadVMask = 922, WriteVIMulAddV_M8_ReadVIMulAddV_M8_ReadVIMulAddV_M8_ReadVIMulAddV_M8_ReadVMask = 923, WriteVIMulAddV_MF2_ReadVIMulAddV_MF2_ReadVIMulAddV_MF2_ReadVIMulAddV_MF2_ReadVMask = 924, WriteVIMulAddV_MF4_ReadVIMulAddV_MF4_ReadVIMulAddV_MF4_ReadVIMulAddV_MF4_ReadVMask = 925, WriteVIMulAddV_MF8_ReadVIMulAddV_MF8_ReadVIMulAddV_MF8_ReadVIMulAddV_MF8_ReadVMask = 926, WriteVIMulAddX_M1_ReadVIMulAddV_M1_ReadVIMulAddV_M1_ReadVIMulAddX_M1_ReadVMask = 927, WriteVIMulAddX_M2_ReadVIMulAddV_M2_ReadVIMulAddV_M2_ReadVIMulAddX_M2_ReadVMask = 928, WriteVIMulAddX_M4_ReadVIMulAddV_M4_ReadVIMulAddV_M4_ReadVIMulAddX_M4_ReadVMask = 929, WriteVIMulAddX_M8_ReadVIMulAddV_M8_ReadVIMulAddV_M8_ReadVIMulAddX_M8_ReadVMask = 930, WriteVIMulAddX_MF2_ReadVIMulAddV_MF2_ReadVIMulAddV_MF2_ReadVIMulAddX_MF2_ReadVMask = 931, WriteVIMulAddX_MF4_ReadVIMulAddV_MF4_ReadVIMulAddV_MF4_ReadVIMulAddX_MF4_ReadVMask = 932, WriteVIMulAddX_MF8_ReadVIMulAddV_MF8_ReadVIMulAddV_MF8_ReadVIMulAddX_MF8_ReadVMask = 933, WriteVICALUI_M1_ReadVICALUV_M1 = 934, WriteVICALUI_M2_ReadVICALUV_M2 = 935, WriteVICALUI_M4_ReadVICALUV_M4 = 936, WriteVICALUI_M8_ReadVICALUV_M8 = 937, WriteVICALUI_MF2_ReadVICALUV_MF2 = 938, WriteVICALUI_MF4_ReadVICALUV_MF4 = 939, WriteVICALUI_MF8_ReadVICALUV_MF8 = 940, WriteVICALUV_M1_ReadVICALUV_M1_ReadVICALUV_M1 = 941, WriteVICALUV_M2_ReadVICALUV_M2_ReadVICALUV_M2 = 942, WriteVICALUV_M4_ReadVICALUV_M4_ReadVICALUV_M4 = 943, WriteVICALUV_M8_ReadVICALUV_M8_ReadVICALUV_M8 = 944, WriteVICALUV_MF2_ReadVICALUV_MF2_ReadVICALUV_MF2 = 945, WriteVICALUV_MF4_ReadVICALUV_MF4_ReadVICALUV_MF4 = 946, WriteVICALUV_MF8_ReadVICALUV_MF8_ReadVICALUV_MF8 = 947, WriteVICALUX_M1_ReadVICALUV_M1_ReadVICALUX_M1 = 948, WriteVICALUX_M2_ReadVICALUV_M2_ReadVICALUX_M2 = 949, WriteVICALUX_M4_ReadVICALUV_M4_ReadVICALUX_M4 = 950, WriteVICALUX_M8_ReadVICALUV_M8_ReadVICALUX_M8 = 951, WriteVICALUX_MF2_ReadVICALUV_MF2_ReadVICALUX_MF2 = 952, WriteVICALUX_MF4_ReadVICALUV_MF4_ReadVICALUX_MF4 = 953, WriteVICALUX_MF8_ReadVICALUV_MF8_ReadVICALUX_MF8 = 954, WriteVMALUV_M1_ReadVMALUV_M1_ReadVMALUV_M1 = 955, WriteVMALUV_M2_ReadVMALUV_M2_ReadVMALUV_M2 = 956, WriteVMALUV_M4_ReadVMALUV_M4_ReadVMALUV_M4 = 957, WriteVMALUV_M8_ReadVMALUV_M8_ReadVMALUV_M8 = 958, WriteVMALUV_MF2_ReadVMALUV_MF2_ReadVMALUV_MF2 = 959, WriteVMALUV_MF4_ReadVMALUV_MF4_ReadVMALUV_MF4 = 960, WriteVMALUV_MF8_ReadVMALUV_MF8_ReadVMALUV_MF8 = 961, WriteVICmpV_M1_ReadVICmpV_M1_ReadVICmpV_M1_ReadVMask = 962, WriteVICmpV_M2_ReadVICmpV_M2_ReadVICmpV_M2_ReadVMask = 963, WriteVICmpV_M4_ReadVICmpV_M4_ReadVICmpV_M4_ReadVMask = 964, WriteVICmpV_M8_ReadVICmpV_M8_ReadVICmpV_M8_ReadVMask = 965, WriteVICmpV_MF2_ReadVICmpV_MF2_ReadVICmpV_MF2_ReadVMask = 966, WriteVICmpV_MF4_ReadVICmpV_MF4_ReadVICmpV_MF4_ReadVMask = 967, WriteVICmpV_MF8_ReadVICmpV_MF8_ReadVICmpV_MF8_ReadVMask = 968, WriteVICmpX_M1_ReadVICmpV_M1_ReadVICmpX_M1_ReadVMask = 969, WriteVICmpX_M2_ReadVICmpV_M2_ReadVICmpX_M2_ReadVMask = 970, WriteVICmpX_M4_ReadVICmpV_M4_ReadVICmpX_M4_ReadVMask = 971, WriteVICmpX_M8_ReadVICmpV_M8_ReadVICmpX_M8_ReadVMask = 972, WriteVICmpX_MF2_ReadVICmpV_MF2_ReadVICmpX_MF2_ReadVMask = 973, WriteVICmpX_MF4_ReadVICmpV_MF4_ReadVICmpX_MF4_ReadVMask = 974, WriteVICmpX_MF8_ReadVICmpV_MF8_ReadVICmpX_MF8_ReadVMask = 975, WriteVIMergeI_M1_ReadVIMergeV_M1_ReadVMask = 976, WriteVIMergeI_M2_ReadVIMergeV_M2_ReadVMask = 977, WriteVIMergeI_M4_ReadVIMergeV_M4_ReadVMask = 978, WriteVIMergeI_M8_ReadVIMergeV_M8_ReadVMask = 979, WriteVIMergeI_MF2_ReadVIMergeV_MF2_ReadVMask = 980, WriteVIMergeI_MF4_ReadVIMergeV_MF4_ReadVMask = 981, WriteVIMergeI_MF8_ReadVIMergeV_MF8_ReadVMask = 982, WriteVIMergeV_M1_ReadVIMergeV_M1_ReadVIMergeV_M1_ReadVMask = 983, WriteVIMergeV_M2_ReadVIMergeV_M2_ReadVIMergeV_M2_ReadVMask = 984, WriteVIMergeV_M4_ReadVIMergeV_M4_ReadVIMergeV_M4_ReadVMask = 985, WriteVIMergeV_M8_ReadVIMergeV_M8_ReadVIMergeV_M8_ReadVMask = 986, WriteVIMergeV_MF2_ReadVIMergeV_MF2_ReadVIMergeV_MF2_ReadVMask = 987, WriteVIMergeV_MF4_ReadVIMergeV_MF4_ReadVIMergeV_MF4_ReadVMask = 988, WriteVIMergeV_MF8_ReadVIMergeV_MF8_ReadVIMergeV_MF8_ReadVMask = 989, WriteVIMergeX_M1_ReadVIMergeV_M1_ReadVIMergeX_M1_ReadVMask = 990, WriteVIMergeX_M2_ReadVIMergeV_M2_ReadVIMergeX_M2_ReadVMask = 991, WriteVIMergeX_M4_ReadVIMergeV_M4_ReadVIMergeX_M4_ReadVMask = 992, WriteVIMergeX_M8_ReadVIMergeV_M8_ReadVIMergeX_M8_ReadVMask = 993, WriteVIMergeX_MF2_ReadVIMergeV_MF2_ReadVIMergeX_MF2_ReadVMask = 994, WriteVIMergeX_MF4_ReadVIMergeV_MF4_ReadVIMergeX_MF4_ReadVMask = 995, WriteVIMergeX_MF8_ReadVIMergeV_MF8_ReadVIMergeX_MF8_ReadVMask = 996, WriteVMSFSV_MF8_ReadVMSFSV_MF8_ReadVMask = 997, WriteVMSFSV_M2_ReadVMSFSV_M2_ReadVMask = 998, WriteVMSFSV_MF4_ReadVMSFSV_MF4_ReadVMask = 999, WriteVMSFSV_M4_ReadVMSFSV_M4_ReadVMask = 1000, WriteVMSFSV_MF2_ReadVMSFSV_MF2_ReadVMask = 1001, WriteVMSFSV_M8_ReadVMSFSV_M8_ReadVMask = 1002, WriteVMSFSV_M1_ReadVMSFSV_M1_ReadVMask = 1003, WriteVICmpI_M1_ReadVICmpV_M1_ReadVMask = 1004, WriteVICmpI_M2_ReadVICmpV_M2_ReadVMask = 1005, WriteVICmpI_M4_ReadVICmpV_M4_ReadVMask = 1006, WriteVICmpI_M8_ReadVICmpV_M8_ReadVMask = 1007, WriteVICmpI_MF2_ReadVICmpV_MF2_ReadVMask = 1008, WriteVICmpI_MF4_ReadVICmpV_MF4_ReadVMask = 1009, WriteVICmpI_MF8_ReadVICmpV_MF8_ReadVMask = 1010, WriteVIMulV_M1_ReadVIMulV_M1_ReadVIMulV_M1_ReadVMask = 1011, WriteVIMulV_M2_ReadVIMulV_M2_ReadVIMulV_M2_ReadVMask = 1012, WriteVIMulV_M4_ReadVIMulV_M4_ReadVIMulV_M4_ReadVMask = 1013, WriteVIMulV_M8_ReadVIMulV_M8_ReadVIMulV_M8_ReadVMask = 1014, WriteVIMulV_MF2_ReadVIMulV_MF2_ReadVIMulV_MF2_ReadVMask = 1015, WriteVIMulV_MF4_ReadVIMulV_MF4_ReadVIMulV_MF4_ReadVMask = 1016, WriteVIMulV_MF8_ReadVIMulV_MF8_ReadVIMulV_MF8_ReadVMask = 1017, WriteVIMulX_M1_ReadVIMulV_M1_ReadVIMulX_M1_ReadVMask = 1018, WriteVIMulX_M2_ReadVIMulV_M2_ReadVIMulX_M2_ReadVMask = 1019, WriteVIMulX_M4_ReadVIMulV_M4_ReadVIMulX_M4_ReadVMask = 1020, WriteVIMulX_M8_ReadVIMulV_M8_ReadVIMulX_M8_ReadVMask = 1021, WriteVIMulX_MF2_ReadVIMulV_MF2_ReadVIMulX_MF2_ReadVMask = 1022, WriteVIMulX_MF4_ReadVIMulV_MF4_ReadVIMulX_MF4_ReadVMask = 1023, WriteVIMulX_MF8_ReadVIMulV_MF8_ReadVIMulX_MF8_ReadVMask = 1024, WriteVIMovXV_M1_ReadVIMovXV_M1_ReadVIMovXX_M1 = 1025, WriteVIMovXV_M2_ReadVIMovXV_M2_ReadVIMovXX_M2 = 1026, WriteVIMovXV_M4_ReadVIMovXV_M4_ReadVIMovXX_M4 = 1027, WriteVIMovXV_M8_ReadVIMovXV_M8_ReadVIMovXX_M8 = 1028, WriteVIMovXV_MF2_ReadVIMovXV_MF2_ReadVIMovXX_MF2 = 1029, WriteVIMovXV_MF4_ReadVIMovXV_MF4_ReadVIMovXX_MF4 = 1030, WriteVIMovXV_MF8_ReadVIMovXV_MF8_ReadVIMovXX_MF8 = 1031, WriteVIMovI_M1 = 1032, WriteVIMovI_M2 = 1033, WriteVIMovI_M4 = 1034, WriteVIMovI_M8 = 1035, WriteVIMovI_MF2 = 1036, WriteVIMovI_MF4 = 1037, WriteVIMovI_MF8 = 1038, WriteVIMovV_M1_ReadVIMovV_M1 = 1039, WriteVIMovV_M2_ReadVIMovV_M2 = 1040, WriteVIMovV_M4_ReadVIMovV_M4 = 1041, WriteVIMovV_M8_ReadVIMovV_M8 = 1042, WriteVIMovV_MF2_ReadVIMovV_MF2 = 1043, WriteVIMovV_MF4_ReadVIMovV_MF4 = 1044, WriteVIMovV_MF8_ReadVIMovV_MF8 = 1045, WriteVIMovX_M1_ReadVIMovX_M1 = 1046, WriteVIMovX_M2_ReadVIMovX_M2 = 1047, WriteVIMovX_M4_ReadVIMovX_M4 = 1048, WriteVIMovX_M8_ReadVIMovX_M8 = 1049, WriteVIMovX_MF2_ReadVIMovX_MF2 = 1050, WriteVIMovX_MF4_ReadVIMovX_MF4 = 1051, WriteVIMovX_MF8_ReadVIMovX_MF8 = 1052, WriteVIMovVX_M1_ReadVIMovVX_M1 = 1053, WriteVIMovVX_M2_ReadVIMovVX_M2 = 1054, WriteVIMovVX_M4_ReadVIMovVX_M4 = 1055, WriteVIMovVX_M8_ReadVIMovVX_M8 = 1056, WriteVIMovVX_MF2_ReadVIMovVX_MF2 = 1057, WriteVIMovVX_MF4_ReadVIMovVX_MF4 = 1058, WriteVIMovVX_MF8_ReadVIMovVX_MF8 = 1059, WriteVNClipI_M1_ReadVNClipV_M1_ReadVMask = 1060, WriteVNClipI_M2_ReadVNClipV_M2_ReadVMask = 1061, WriteVNClipI_M4_ReadVNClipV_M4_ReadVMask = 1062, WriteVNClipI_MF2_ReadVNClipV_MF2_ReadVMask = 1063, WriteVNClipI_MF4_ReadVNClipV_MF4_ReadVMask = 1064, WriteVNClipI_MF8_ReadVNClipV_MF8_ReadVMask = 1065, WriteVNClipV_M1_ReadVNClipV_M1_ReadVNClipV_M1_ReadVMask = 1066, WriteVNClipV_M2_ReadVNClipV_M2_ReadVNClipV_M2_ReadVMask = 1067, WriteVNClipV_M4_ReadVNClipV_M4_ReadVNClipV_M4_ReadVMask = 1068, WriteVNClipV_MF2_ReadVNClipV_MF2_ReadVNClipV_MF2_ReadVMask = 1069, WriteVNClipV_MF4_ReadVNClipV_MF4_ReadVNClipV_MF4_ReadVMask = 1070, WriteVNClipV_MF8_ReadVNClipV_MF8_ReadVNClipV_MF8_ReadVMask = 1071, WriteVNClipX_M1_ReadVNClipV_M1_ReadVNClipX_M1_ReadVMask = 1072, WriteVNClipX_M2_ReadVNClipV_M2_ReadVNClipX_M2_ReadVMask = 1073, WriteVNClipX_M4_ReadVNClipV_M4_ReadVNClipX_M4_ReadVMask = 1074, WriteVNClipX_MF2_ReadVNClipV_MF2_ReadVNClipX_MF2_ReadVMask = 1075, WriteVNClipX_MF4_ReadVNClipV_MF4_ReadVNClipX_MF4_ReadVMask = 1076, WriteVNClipX_MF8_ReadVNClipV_MF8_ReadVNClipX_MF8_ReadVMask = 1077, WriteVNShiftI_M1_ReadVNShiftV_M1_ReadVMask = 1078, WriteVNShiftI_M2_ReadVNShiftV_M2_ReadVMask = 1079, WriteVNShiftI_M4_ReadVNShiftV_M4_ReadVMask = 1080, WriteVNShiftI_MF2_ReadVNShiftV_MF2_ReadVMask = 1081, WriteVNShiftI_MF4_ReadVNShiftV_MF4_ReadVMask = 1082, WriteVNShiftI_MF8_ReadVNShiftV_MF8_ReadVMask = 1083, WriteVNShiftV_M1_ReadVNShiftV_M1_ReadVNShiftV_M1_ReadVMask = 1084, WriteVNShiftV_M2_ReadVNShiftV_M2_ReadVNShiftV_M2_ReadVMask = 1085, WriteVNShiftV_M4_ReadVNShiftV_M4_ReadVNShiftV_M4_ReadVMask = 1086, WriteVNShiftV_MF2_ReadVNShiftV_MF2_ReadVNShiftV_MF2_ReadVMask = 1087, WriteVNShiftV_MF4_ReadVNShiftV_MF4_ReadVNShiftV_MF4_ReadVMask = 1088, WriteVNShiftV_MF8_ReadVNShiftV_MF8_ReadVNShiftV_MF8_ReadVMask = 1089, WriteVNShiftX_M1_ReadVNShiftV_M1_ReadVNShiftX_M1_ReadVMask = 1090, WriteVNShiftX_M2_ReadVNShiftV_M2_ReadVNShiftX_M2_ReadVMask = 1091, WriteVNShiftX_M4_ReadVNShiftV_M4_ReadVNShiftX_M4_ReadVMask = 1092, WriteVNShiftX_MF2_ReadVNShiftV_MF2_ReadVNShiftX_MF2_ReadVMask = 1093, WriteVNShiftX_MF4_ReadVNShiftV_MF4_ReadVNShiftX_MF4_ReadVMask = 1094, WriteVNShiftX_MF8_ReadVNShiftV_MF8_ReadVNShiftX_MF8_ReadVMask = 1095, WriteVIRedV_ReadVIRedV_ReadVIRedV_ReadVIRedV_ReadVMask = 1096, WriteVGatherV_M1_ReadVGatherV_M1_ReadVGatherV_M1 = 1097, WriteVGatherV_M2_ReadVGatherV_M2_ReadVGatherV_M2 = 1098, WriteVGatherV_M4_ReadVGatherV_M4_ReadVGatherV_M4 = 1099, WriteVGatherV_M8_ReadVGatherV_M8_ReadVGatherV_M8 = 1100, WriteVGatherV_MF2_ReadVGatherV_MF2_ReadVGatherV_MF2 = 1101, WriteVGatherV_MF4_ReadVGatherV_MF4_ReadVGatherV_MF4 = 1102, WriteVGatherV_MF8_ReadVGatherV_MF8_ReadVGatherV_MF8 = 1103, WriteVGatherI_M1_ReadVGatherV_M1_ReadVMask = 1104, WriteVGatherI_M2_ReadVGatherV_M2_ReadVMask = 1105, WriteVGatherI_M4_ReadVGatherV_M4_ReadVMask = 1106, WriteVGatherI_M8_ReadVGatherV_M8_ReadVMask = 1107, WriteVGatherI_MF2_ReadVGatherV_MF2_ReadVMask = 1108, WriteVGatherI_MF4_ReadVGatherV_MF4_ReadVMask = 1109, WriteVGatherI_MF8_ReadVGatherV_MF8_ReadVMask = 1110, WriteVGatherV_M1_ReadVGatherV_M1_ReadVGatherV_M1_ReadVMask = 1111, WriteVGatherV_M2_ReadVGatherV_M2_ReadVGatherV_M2_ReadVMask = 1112, WriteVGatherV_M4_ReadVGatherV_M4_ReadVGatherV_M4_ReadVMask = 1113, WriteVGatherV_M8_ReadVGatherV_M8_ReadVGatherV_M8_ReadVMask = 1114, WriteVGatherV_MF2_ReadVGatherV_MF2_ReadVGatherV_MF2_ReadVMask = 1115, WriteVGatherV_MF4_ReadVGatherV_MF4_ReadVGatherV_MF4_ReadVMask = 1116, WriteVGatherV_MF8_ReadVGatherV_MF8_ReadVGatherV_MF8_ReadVMask = 1117, WriteVGatherX_M1_ReadVGatherV_M1_ReadVGatherX_M1_ReadVMask = 1118, WriteVGatherX_M2_ReadVGatherV_M2_ReadVGatherX_M2_ReadVMask = 1119, WriteVGatherX_M4_ReadVGatherV_M4_ReadVGatherX_M4_ReadVMask = 1120, WriteVGatherX_M8_ReadVGatherV_M8_ReadVGatherX_M8_ReadVMask = 1121, WriteVGatherX_MF2_ReadVGatherV_MF2_ReadVGatherX_MF2_ReadVMask = 1122, WriteVGatherX_MF4_ReadVGatherV_MF4_ReadVGatherX_MF4_ReadVMask = 1123, WriteVGatherX_MF8_ReadVGatherV_MF8_ReadVGatherX_MF8_ReadVMask = 1124, WriteVSALUI_M1_ReadVSALUV_M1_ReadVMask = 1125, WriteVSALUI_M2_ReadVSALUV_M2_ReadVMask = 1126, WriteVSALUI_M4_ReadVSALUV_M4_ReadVMask = 1127, WriteVSALUI_M8_ReadVSALUV_M8_ReadVMask = 1128, WriteVSALUI_MF2_ReadVSALUV_MF2_ReadVMask = 1129, WriteVSALUI_MF4_ReadVSALUV_MF4_ReadVMask = 1130, WriteVSALUI_MF8_ReadVSALUV_MF8_ReadVMask = 1131, WriteVSALUV_M1_ReadVSALUV_M1_ReadVSALUV_M1_ReadVMask = 1132, WriteVSALUV_M2_ReadVSALUV_M2_ReadVSALUV_M2_ReadVMask = 1133, WriteVSALUV_M4_ReadVSALUV_M4_ReadVSALUV_M4_ReadVMask = 1134, WriteVSALUV_M8_ReadVSALUV_M8_ReadVSALUV_M8_ReadVMask = 1135, WriteVSALUV_MF2_ReadVSALUV_MF2_ReadVSALUV_MF2_ReadVMask = 1136, WriteVSALUV_MF4_ReadVSALUV_MF4_ReadVSALUV_MF4_ReadVMask = 1137, WriteVSALUV_MF8_ReadVSALUV_MF8_ReadVSALUV_MF8_ReadVMask = 1138, WriteVSALUX_M1_ReadVSALUV_M1_ReadVSALUX_M1_ReadVMask = 1139, WriteVSALUX_M2_ReadVSALUV_M2_ReadVSALUX_M2_ReadVMask = 1140, WriteVSALUX_M4_ReadVSALUV_M4_ReadVSALUX_M4_ReadVMask = 1141, WriteVSALUX_M8_ReadVSALUV_M8_ReadVSALUX_M8_ReadVMask = 1142, WriteVSALUX_MF2_ReadVSALUV_MF2_ReadVSALUX_MF2_ReadVMask = 1143, WriteVSALUX_MF4_ReadVSALUV_MF4_ReadVSALUX_MF4_ReadVMask = 1144, WriteVSALUX_MF8_ReadVSALUV_MF8_ReadVSALUX_MF8_ReadVMask = 1145, WriteVSTE_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1146, WriteVSTE_M2_ReadVSTEV_M2_ReadVSTX_M2_ReadVMask = 1147, WriteVSTE_M4_ReadVSTEV_M4_ReadVSTX_M4_ReadVMask = 1148, WriteVSTE_M8_ReadVSTEV_M8_ReadVSTX_M8_ReadVMask = 1149, WriteVSTE_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1150, WriteVSTE_MF4_ReadVSTEV_MF4_ReadVSTX_MF4_ReadVMask = 1151, WriteVSTE_MF8_ReadVSTEV_MF8_ReadVSTX_MF8_ReadVMask = 1152, WriteVSETIVLI = 1153, WriteVSETVLI_ReadVSETVLI = 1154, WriteVExtV_M1_ReadVExtV_M1_ReadVMask = 1155, WriteVExtV_M2_ReadVExtV_M2_ReadVMask = 1156, WriteVExtV_M4_ReadVExtV_M4_ReadVMask = 1157, WriteVExtV_M8_ReadVExtV_M8_ReadVMask = 1158, WriteVExtV_MF2_ReadVExtV_MF2_ReadVMask = 1159, WriteVExtV_MF4_ReadVExtV_MF4_ReadVMask = 1160, WriteVISlide1X_M1_ReadVISlideV_M1_ReadVISlideX_M1_ReadVMask = 1161, WriteVISlide1X_M2_ReadVISlideV_M2_ReadVISlideX_M2_ReadVMask = 1162, WriteVISlide1X_M4_ReadVISlideV_M4_ReadVISlideX_M4_ReadVMask = 1163, WriteVISlide1X_M8_ReadVISlideV_M8_ReadVISlideX_M8_ReadVMask = 1164, WriteVISlide1X_MF2_ReadVISlideV_MF2_ReadVISlideX_MF2_ReadVMask = 1165, WriteVISlide1X_MF4_ReadVISlideV_MF4_ReadVISlideX_MF4_ReadVMask = 1166, WriteVISlide1X_MF8_ReadVISlideV_MF8_ReadVISlideX_MF8_ReadVMask = 1167, WriteVISlideI_M1_ReadVISlideV_M1_ReadVISlideV_M1_ReadVMask = 1168, WriteVISlideI_M2_ReadVISlideV_M2_ReadVISlideV_M2_ReadVMask = 1169, WriteVISlideI_M4_ReadVISlideV_M4_ReadVISlideV_M4_ReadVMask = 1170, WriteVISlideI_M8_ReadVISlideV_M8_ReadVISlideV_M8_ReadVMask = 1171, WriteVISlideI_MF2_ReadVISlideV_MF2_ReadVISlideV_MF2_ReadVMask = 1172, WriteVISlideI_MF4_ReadVISlideV_MF4_ReadVISlideV_MF4_ReadVMask = 1173, WriteVISlideI_MF8_ReadVISlideV_MF8_ReadVISlideV_MF8_ReadVMask = 1174, WriteVISlideX_M1_ReadVISlideV_M1_ReadVISlideV_M1_ReadVISlideX_M1_ReadVMask = 1175, WriteVISlideX_M2_ReadVISlideV_M2_ReadVISlideV_M2_ReadVISlideX_M2_ReadVMask = 1176, WriteVISlideX_M4_ReadVISlideV_M4_ReadVISlideV_M4_ReadVISlideX_M4_ReadVMask = 1177, WriteVISlideX_M8_ReadVISlideV_M8_ReadVISlideV_M8_ReadVISlideX_M8_ReadVMask = 1178, WriteVISlideX_MF2_ReadVISlideV_MF2_ReadVISlideV_MF2_ReadVISlideX_MF2_ReadVMask = 1179, WriteVISlideX_MF4_ReadVISlideV_MF4_ReadVISlideV_MF4_ReadVISlideX_MF4_ReadVMask = 1180, WriteVISlideX_MF8_ReadVISlideV_MF8_ReadVISlideV_MF8_ReadVISlideX_MF8_ReadVMask = 1181, WriteVShiftI_M1_ReadVShiftV_M1_ReadVMask = 1182, WriteVShiftI_M2_ReadVShiftV_M2_ReadVMask = 1183, WriteVShiftI_M4_ReadVShiftV_M4_ReadVMask = 1184, WriteVShiftI_M8_ReadVShiftV_M8_ReadVMask = 1185, WriteVShiftI_MF2_ReadVShiftV_MF2_ReadVMask = 1186, WriteVShiftI_MF4_ReadVShiftV_MF4_ReadVMask = 1187, WriteVShiftI_MF8_ReadVShiftV_MF8_ReadVMask = 1188, WriteVShiftV_M1_ReadVShiftV_M1_ReadVShiftV_M1_ReadVMask = 1189, WriteVShiftV_M2_ReadVShiftV_M2_ReadVShiftV_M2_ReadVMask = 1190, WriteVShiftV_M4_ReadVShiftV_M4_ReadVShiftV_M4_ReadVMask = 1191, WriteVShiftV_M8_ReadVShiftV_M8_ReadVShiftV_M8_ReadVMask = 1192, WriteVShiftV_MF2_ReadVShiftV_MF2_ReadVShiftV_MF2_ReadVMask = 1193, WriteVShiftV_MF4_ReadVShiftV_MF4_ReadVShiftV_MF4_ReadVMask = 1194, WriteVShiftV_MF8_ReadVShiftV_MF8_ReadVShiftV_MF8_ReadVMask = 1195, WriteVShiftX_M1_ReadVShiftV_M1_ReadVShiftX_M1_ReadVMask = 1196, WriteVShiftX_M2_ReadVShiftV_M2_ReadVShiftX_M2_ReadVMask = 1197, WriteVShiftX_M4_ReadVShiftV_M4_ReadVShiftX_M4_ReadVMask = 1198, WriteVShiftX_M8_ReadVShiftV_M8_ReadVShiftX_M8_ReadVMask = 1199, WriteVShiftX_MF2_ReadVShiftV_MF2_ReadVShiftX_MF2_ReadVMask = 1200, WriteVShiftX_MF4_ReadVShiftV_MF4_ReadVShiftX_MF4_ReadVMask = 1201, WriteVShiftX_MF8_ReadVShiftV_MF8_ReadVShiftX_MF8_ReadVMask = 1202, WriteVSMulV_M1_ReadVSMulV_M1_ReadVSMulV_M1_ReadVMask = 1203, WriteVSMulV_M2_ReadVSMulV_M2_ReadVSMulV_M2_ReadVMask = 1204, WriteVSMulV_M4_ReadVSMulV_M4_ReadVSMulV_M4_ReadVMask = 1205, WriteVSMulV_M8_ReadVSMulV_M8_ReadVSMulV_M8_ReadVMask = 1206, WriteVSMulV_MF2_ReadVSMulV_MF2_ReadVSMulV_MF2_ReadVMask = 1207, WriteVSMulV_MF4_ReadVSMulV_MF4_ReadVSMulV_MF4_ReadVMask = 1208, WriteVSMulV_MF8_ReadVSMulV_MF8_ReadVSMulV_MF8_ReadVMask = 1209, WriteVSMulX_M1_ReadVSMulV_M1_ReadVSMulX_M1_ReadVMask = 1210, WriteVSMulX_M2_ReadVSMulV_M2_ReadVSMulX_M2_ReadVMask = 1211, WriteVSMulX_M4_ReadVSMulV_M4_ReadVSMulX_M4_ReadVMask = 1212, WriteVSMulX_M8_ReadVSMulV_M8_ReadVSMulX_M8_ReadVMask = 1213, WriteVSMulX_MF2_ReadVSMulV_MF2_ReadVSMulX_MF2_ReadVMask = 1214, WriteVSMulX_MF4_ReadVSMulV_MF4_ReadVSMulX_MF4_ReadVMask = 1215, WriteVSMulX_MF8_ReadVSMulV_MF8_ReadVSMulX_MF8_ReadVMask = 1216, WriteVSTM_MF8_ReadVSTX_MF8 = 1217, WriteVSTM_M2_ReadVSTX_M2 = 1218, WriteVSTM_MF4_ReadVSTX_MF4 = 1219, WriteVSTM_M4_ReadVSTX_M4 = 1220, WriteVSTM_MF2_ReadVSTX_MF2 = 1221, WriteVSTM_M8_ReadVSTX_M8 = 1222, WriteVSTM_M1_ReadVSTX_M1 = 1223, WriteVSTOX16_M1_ReadVSTOX16_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1224, WriteVSTOX16_M2_ReadVSTOX16_M2_ReadVSTX_M2_ReadVSTOXV_M2_ReadVMask = 1225, WriteVSTOX16_M4_ReadVSTOX16_M4_ReadVSTX_M4_ReadVSTOXV_M4_ReadVMask = 1226, WriteVSTOX16_MF2_ReadVSTOX16_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1227, WriteVSTOX16_M8_ReadVSTOX16_M8_ReadVSTX_M8_ReadVSTOXV_M8_ReadVMask = 1228, WriteVSTOX16_MF4_ReadVSTOX16_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1229, WriteVSTOX16_MF8_ReadVSTOX16_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1230, WriteVSTOX32_M1_ReadVSTOX32_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1231, WriteVSTOX32_M2_ReadVSTOX32_M2_ReadVSTX_M2_ReadVSTOXV_M2_ReadVMask = 1232, WriteVSTOX32_MF2_ReadVSTOX32_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1233, WriteVSTOX32_MF4_ReadVSTOX32_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1234, WriteVSTOX32_M4_ReadVSTOX32_M4_ReadVSTX_M4_ReadVSTOXV_M4_ReadVMask = 1235, WriteVSTOX32_M8_ReadVSTOX32_M8_ReadVSTX_M8_ReadVSTOXV_M8_ReadVMask = 1236, WriteVSTOX32_MF8_ReadVSTOX32_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1237, WriteVSTOX64_M1_ReadVSTOX64_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1238, WriteVSTOX64_MF2_ReadVSTOX64_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1239, WriteVSTOX64_MF4_ReadVSTOX64_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1240, WriteVSTOX64_MF8_ReadVSTOX64_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1241, WriteVSTOX64_M2_ReadVSTOX64_M2_ReadVSTX_M2_ReadVSTOXV_M2_ReadVMask = 1242, WriteVSTOX64_M4_ReadVSTOX64_M4_ReadVSTX_M4_ReadVSTOXV_M4_ReadVMask = 1243, WriteVSTOX64_M8_ReadVSTOX64_M8_ReadVSTX_M8_ReadVSTOXV_M8_ReadVMask = 1244, WriteVSTOX8_M1_ReadVSTOX8_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1245, WriteVSTOX8_M2_ReadVSTOX8_M2_ReadVSTX_M2_ReadVSTOXV_M2_ReadVMask = 1246, WriteVSTOX8_M4_ReadVSTOX8_M4_ReadVSTX_M4_ReadVSTOXV_M4_ReadVMask = 1247, WriteVSTOX8_M8_ReadVSTOX8_M8_ReadVSTX_M8_ReadVSTOXV_M8_ReadVMask = 1248, WriteVSTOX8_MF2_ReadVSTOX8_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1249, WriteVSTOX8_MF4_ReadVSTOX8_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1250, WriteVSTOX8_MF8_ReadVSTOX8_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1251, WriteVSOXSEG2e16_M1_ReadVSTOX16_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1252, WriteVSOXSEG2e16_M2_ReadVSTOX16_M2_ReadVSTX_M2_ReadVSTOXV_M2_ReadVMask = 1253, WriteVSOXSEG2e16_M4_ReadVSTOX16_M4_ReadVSTX_M4_ReadVSTOXV_M4_ReadVMask = 1254, WriteVSOXSEG2e16_MF2_ReadVSTOX16_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1255, WriteVSOXSEG2e16_MF4_ReadVSTOX16_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1256, WriteVSOXSEG2e16_MF8_ReadVSTOX16_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1257, WriteVSOXSEG2e32_M1_ReadVSTOX32_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1258, WriteVSOXSEG2e32_M2_ReadVSTOX32_M2_ReadVSTX_M2_ReadVSTOXV_M2_ReadVMask = 1259, WriteVSOXSEG2e32_MF2_ReadVSTOX32_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1260, WriteVSOXSEG2e32_MF4_ReadVSTOX32_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1261, WriteVSOXSEG2e32_M4_ReadVSTOX32_M4_ReadVSTX_M4_ReadVSTOXV_M4_ReadVMask = 1262, WriteVSOXSEG2e32_MF8_ReadVSTOX32_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1263, WriteVSOXSEG2e64_M1_ReadVSTOX64_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1264, WriteVSOXSEG2e64_MF2_ReadVSTOX64_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1265, WriteVSOXSEG2e64_MF4_ReadVSTOX64_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1266, WriteVSOXSEG2e64_MF8_ReadVSTOX64_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1267, WriteVSOXSEG2e64_M2_ReadVSTOX64_M2_ReadVSTX_M2_ReadVSTOXV_M2_ReadVMask = 1268, WriteVSOXSEG2e64_M4_ReadVSTOX64_M4_ReadVSTX_M4_ReadVSTOXV_M4_ReadVMask = 1269, WriteVSOXSEG2e8_M1_ReadVSTOX8_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1270, WriteVSOXSEG2e8_M2_ReadVSTOX8_M2_ReadVSTX_M2_ReadVSTOXV_M2_ReadVMask = 1271, WriteVSOXSEG2e8_M4_ReadVSTOX8_M4_ReadVSTX_M4_ReadVSTOXV_M4_ReadVMask = 1272, WriteVSOXSEG2e8_MF2_ReadVSTOX8_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1273, WriteVSOXSEG2e8_MF4_ReadVSTOX8_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1274, WriteVSOXSEG2e8_MF8_ReadVSTOX8_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1275, WriteVSOXSEG3e16_M1_ReadVSTOX16_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1276, WriteVSOXSEG3e16_M2_ReadVSTOX16_M2_ReadVSTX_M2_ReadVSTOXV_M2_ReadVMask = 1277, WriteVSOXSEG3e16_MF2_ReadVSTOX16_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1278, WriteVSOXSEG3e16_MF4_ReadVSTOX16_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1279, WriteVSOXSEG3e16_MF8_ReadVSTOX16_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1280, WriteVSOXSEG3e32_M1_ReadVSTOX32_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1281, WriteVSOXSEG3e32_M2_ReadVSTOX32_M2_ReadVSTX_M2_ReadVSTOXV_M2_ReadVMask = 1282, WriteVSOXSEG3e32_MF2_ReadVSTOX32_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1283, WriteVSOXSEG3e32_MF4_ReadVSTOX32_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1284, WriteVSOXSEG3e32_MF8_ReadVSTOX32_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1285, WriteVSOXSEG3e64_M1_ReadVSTOX64_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1286, WriteVSOXSEG3e64_MF2_ReadVSTOX64_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1287, WriteVSOXSEG3e64_MF4_ReadVSTOX64_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1288, WriteVSOXSEG3e64_MF8_ReadVSTOX64_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1289, WriteVSOXSEG3e64_M2_ReadVSTOX64_M2_ReadVSTX_M2_ReadVSTOXV_M2_ReadVMask = 1290, WriteVSOXSEG3e8_M1_ReadVSTOX8_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1291, WriteVSOXSEG3e8_M2_ReadVSTOX8_M2_ReadVSTX_M2_ReadVSTOXV_M2_ReadVMask = 1292, WriteVSOXSEG3e8_MF2_ReadVSTOX8_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1293, WriteVSOXSEG3e8_MF4_ReadVSTOX8_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1294, WriteVSOXSEG3e8_MF8_ReadVSTOX8_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1295, WriteVSOXSEG4e16_M1_ReadVSTOX16_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1296, WriteVSOXSEG4e16_M2_ReadVSTOX16_M2_ReadVSTX_M2_ReadVSTOXV_M2_ReadVMask = 1297, WriteVSOXSEG4e16_MF2_ReadVSTOX16_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1298, WriteVSOXSEG4e16_MF4_ReadVSTOX16_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1299, WriteVSOXSEG4e16_MF8_ReadVSTOX16_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1300, WriteVSOXSEG4e32_M1_ReadVSTOX32_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1301, WriteVSOXSEG4e32_M2_ReadVSTOX32_M2_ReadVSTX_M2_ReadVSTOXV_M2_ReadVMask = 1302, WriteVSOXSEG4e32_MF2_ReadVSTOX32_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1303, WriteVSOXSEG4e32_MF4_ReadVSTOX32_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1304, WriteVSOXSEG4e32_MF8_ReadVSTOX32_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1305, WriteVSOXSEG4e64_M1_ReadVSTOX64_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1306, WriteVSOXSEG4e64_MF2_ReadVSTOX64_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1307, WriteVSOXSEG4e64_MF4_ReadVSTOX64_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1308, WriteVSOXSEG4e64_MF8_ReadVSTOX64_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1309, WriteVSOXSEG4e64_M2_ReadVSTOX64_M2_ReadVSTX_M2_ReadVSTOXV_M2_ReadVMask = 1310, WriteVSOXSEG4e8_M1_ReadVSTOX8_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1311, WriteVSOXSEG4e8_M2_ReadVSTOX8_M2_ReadVSTX_M2_ReadVSTOXV_M2_ReadVMask = 1312, WriteVSOXSEG4e8_MF2_ReadVSTOX8_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1313, WriteVSOXSEG4e8_MF4_ReadVSTOX8_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1314, WriteVSOXSEG4e8_MF8_ReadVSTOX8_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1315, WriteVSOXSEG5e16_M1_ReadVSTOX16_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1316, WriteVSOXSEG5e16_MF2_ReadVSTOX16_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1317, WriteVSOXSEG5e16_MF4_ReadVSTOX16_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1318, WriteVSOXSEG5e16_MF8_ReadVSTOX16_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1319, WriteVSOXSEG5e32_M1_ReadVSTOX32_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1320, WriteVSOXSEG5e32_MF2_ReadVSTOX32_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1321, WriteVSOXSEG5e32_MF4_ReadVSTOX32_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1322, WriteVSOXSEG5e32_MF8_ReadVSTOX32_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1323, WriteVSOXSEG5e64_M1_ReadVSTOX64_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1324, WriteVSOXSEG5e64_MF2_ReadVSTOX64_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1325, WriteVSOXSEG5e64_MF4_ReadVSTOX64_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1326, WriteVSOXSEG5e64_MF8_ReadVSTOX64_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1327, WriteVSOXSEG5e8_M1_ReadVSTOX8_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1328, WriteVSOXSEG5e8_MF2_ReadVSTOX8_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1329, WriteVSOXSEG5e8_MF4_ReadVSTOX8_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1330, WriteVSOXSEG5e8_MF8_ReadVSTOX8_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1331, WriteVSOXSEG6e16_M1_ReadVSTOX16_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1332, WriteVSOXSEG6e16_MF2_ReadVSTOX16_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1333, WriteVSOXSEG6e16_MF4_ReadVSTOX16_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1334, WriteVSOXSEG6e16_MF8_ReadVSTOX16_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1335, WriteVSOXSEG6e32_M1_ReadVSTOX32_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1336, WriteVSOXSEG6e32_MF2_ReadVSTOX32_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1337, WriteVSOXSEG6e32_MF4_ReadVSTOX32_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1338, WriteVSOXSEG6e32_MF8_ReadVSTOX32_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1339, WriteVSOXSEG6e64_M1_ReadVSTOX64_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1340, WriteVSOXSEG6e64_MF2_ReadVSTOX64_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1341, WriteVSOXSEG6e64_MF4_ReadVSTOX64_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1342, WriteVSOXSEG6e64_MF8_ReadVSTOX64_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1343, WriteVSOXSEG6e8_M1_ReadVSTOX8_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1344, WriteVSOXSEG6e8_MF2_ReadVSTOX8_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1345, WriteVSOXSEG6e8_MF4_ReadVSTOX8_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1346, WriteVSOXSEG6e8_MF8_ReadVSTOX8_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1347, WriteVSOXSEG7e16_M1_ReadVSTOX16_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1348, WriteVSOXSEG7e16_MF2_ReadVSTOX16_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1349, WriteVSOXSEG7e16_MF4_ReadVSTOX16_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1350, WriteVSOXSEG7e16_MF8_ReadVSTOX16_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1351, WriteVSOXSEG7e32_M1_ReadVSTOX32_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1352, WriteVSOXSEG7e32_MF2_ReadVSTOX32_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1353, WriteVSOXSEG7e32_MF4_ReadVSTOX32_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1354, WriteVSOXSEG7e32_MF8_ReadVSTOX32_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1355, WriteVSOXSEG7e64_M1_ReadVSTOX64_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1356, WriteVSOXSEG7e64_MF2_ReadVSTOX64_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1357, WriteVSOXSEG7e64_MF4_ReadVSTOX64_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1358, WriteVSOXSEG7e64_MF8_ReadVSTOX64_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1359, WriteVSOXSEG7e8_M1_ReadVSTOX8_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1360, WriteVSOXSEG7e8_MF2_ReadVSTOX8_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1361, WriteVSOXSEG7e8_MF4_ReadVSTOX8_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1362, WriteVSOXSEG7e8_MF8_ReadVSTOX8_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1363, WriteVSOXSEG8e16_M1_ReadVSTOX16_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1364, WriteVSOXSEG8e16_MF2_ReadVSTOX16_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1365, WriteVSOXSEG8e16_MF4_ReadVSTOX16_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1366, WriteVSOXSEG8e16_MF8_ReadVSTOX16_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1367, WriteVSOXSEG8e32_M1_ReadVSTOX32_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1368, WriteVSOXSEG8e32_MF2_ReadVSTOX32_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1369, WriteVSOXSEG8e32_MF4_ReadVSTOX32_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1370, WriteVSOXSEG8e32_MF8_ReadVSTOX32_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1371, WriteVSOXSEG8e64_M1_ReadVSTOX64_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1372, WriteVSOXSEG8e64_MF2_ReadVSTOX64_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1373, WriteVSOXSEG8e64_MF4_ReadVSTOX64_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1374, WriteVSOXSEG8e64_MF8_ReadVSTOX64_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1375, WriteVSOXSEG8e8_M1_ReadVSTOX8_M1_ReadVSTX_M1_ReadVSTOXV_M1_ReadVMask = 1376, WriteVSOXSEG8e8_MF2_ReadVSTOX8_MF2_ReadVSTX_MF2_ReadVSTOXV_MF2_ReadVMask = 1377, WriteVSOXSEG8e8_MF4_ReadVSTOX8_MF4_ReadVSTX_MF4_ReadVSTOXV_MF4_ReadVMask = 1378, WriteVSOXSEG8e8_MF8_ReadVSTOX8_MF8_ReadVSTX_MF8_ReadVSTOXV_MF8_ReadVMask = 1379, WriteVSTS16_M1_ReadVSTS16V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1380, WriteVSTS16_M2_ReadVSTS16V_M2_ReadVSTX_M2_ReadVSTSX_M2_ReadVMask = 1381, WriteVSTS16_M4_ReadVSTS16V_M4_ReadVSTX_M4_ReadVSTSX_M4_ReadVMask = 1382, WriteVSTS16_M8_ReadVSTS16V_M8_ReadVSTX_M8_ReadVSTSX_M8_ReadVMask = 1383, WriteVSTS16_MF2_ReadVSTS16V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1384, WriteVSTS16_MF4_ReadVSTS16V_MF4_ReadVSTX_MF4_ReadVSTSX_MF4_ReadVMask = 1385, WriteVSTS32_M1_ReadVSTS32V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1386, WriteVSTS32_M2_ReadVSTS32V_M2_ReadVSTX_M2_ReadVSTSX_M2_ReadVMask = 1387, WriteVSTS32_M4_ReadVSTS32V_M4_ReadVSTX_M4_ReadVSTSX_M4_ReadVMask = 1388, WriteVSTS32_M8_ReadVSTS32V_M8_ReadVSTX_M8_ReadVSTSX_M8_ReadVMask = 1389, WriteVSTS32_MF2_ReadVSTS32V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1390, WriteVSTS64_M1_ReadVSTS64V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1391, WriteVSTS64_M2_ReadVSTS64V_M2_ReadVSTX_M2_ReadVSTSX_M2_ReadVMask = 1392, WriteVSTS64_M4_ReadVSTS64V_M4_ReadVSTX_M4_ReadVSTSX_M4_ReadVMask = 1393, WriteVSTS64_M8_ReadVSTS64V_M8_ReadVSTX_M8_ReadVSTSX_M8_ReadVMask = 1394, WriteVSTS8_M1_ReadVSTS8V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1395, WriteVSTS8_M2_ReadVSTS8V_M2_ReadVSTX_M2_ReadVSTSX_M2_ReadVMask = 1396, WriteVSTS8_M4_ReadVSTS8V_M4_ReadVSTX_M4_ReadVSTSX_M4_ReadVMask = 1397, WriteVSTS8_M8_ReadVSTS8V_M8_ReadVSTX_M8_ReadVSTSX_M8_ReadVMask = 1398, WriteVSTS8_MF2_ReadVSTS8V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1399, WriteVSTS8_MF4_ReadVSTS8V_MF4_ReadVSTX_MF4_ReadVSTSX_MF4_ReadVMask = 1400, WriteVSTS8_MF8_ReadVSTS8V_MF8_ReadVSTX_MF8_ReadVSTSX_MF8_ReadVMask = 1401, WriteVSSEG2e16_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1402, WriteVSSEG2e16_M2_ReadVSTEV_M2_ReadVSTX_M2_ReadVMask = 1403, WriteVSSEG2e16_M4_ReadVSTEV_M4_ReadVSTX_M4_ReadVMask = 1404, WriteVSSEG2e16_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1405, WriteVSSEG2e16_MF4_ReadVSTEV_MF4_ReadVSTX_MF4_ReadVMask = 1406, WriteVSSEG2e32_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1407, WriteVSSEG2e32_M2_ReadVSTEV_M2_ReadVSTX_M2_ReadVMask = 1408, WriteVSSEG2e32_M4_ReadVSTEV_M4_ReadVSTX_M4_ReadVMask = 1409, WriteVSSEG2e32_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1410, WriteVSSEG2e64_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1411, WriteVSSEG2e64_M2_ReadVSTEV_M2_ReadVSTX_M2_ReadVMask = 1412, WriteVSSEG2e64_M4_ReadVSTEV_M4_ReadVSTX_M4_ReadVMask = 1413, WriteVSSEG2e8_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1414, WriteVSSEG2e8_M2_ReadVSTEV_M2_ReadVSTX_M2_ReadVMask = 1415, WriteVSSEG2e8_M4_ReadVSTEV_M4_ReadVSTX_M4_ReadVMask = 1416, WriteVSSEG2e8_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1417, WriteVSSEG2e8_MF4_ReadVSTEV_MF4_ReadVSTX_MF4_ReadVMask = 1418, WriteVSSEG2e8_MF8_ReadVSTEV_MF8_ReadVSTX_MF8_ReadVMask = 1419, WriteVSSEG3e16_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1420, WriteVSSEG3e16_M2_ReadVSTEV_M2_ReadVSTX_M2_ReadVMask = 1421, WriteVSSEG3e16_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1422, WriteVSSEG3e16_MF4_ReadVSTEV_MF4_ReadVSTX_MF4_ReadVMask = 1423, WriteVSSEG3e32_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1424, WriteVSSEG3e32_M2_ReadVSTEV_M2_ReadVSTX_M2_ReadVMask = 1425, WriteVSSEG3e32_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1426, WriteVSSEG3e64_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1427, WriteVSSEG3e64_M2_ReadVSTEV_M2_ReadVSTX_M2_ReadVMask = 1428, WriteVSSEG3e8_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1429, WriteVSSEG3e8_M2_ReadVSTEV_M2_ReadVSTX_M2_ReadVMask = 1430, WriteVSSEG3e8_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1431, WriteVSSEG3e8_MF4_ReadVSTEV_MF4_ReadVSTX_MF4_ReadVMask = 1432, WriteVSSEG3e8_MF8_ReadVSTEV_MF8_ReadVSTX_MF8_ReadVMask = 1433, WriteVSSEG4e16_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1434, WriteVSSEG4e16_M2_ReadVSTEV_M2_ReadVSTX_M2_ReadVMask = 1435, WriteVSSEG4e16_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1436, WriteVSSEG4e16_MF4_ReadVSTEV_MF4_ReadVSTX_MF4_ReadVMask = 1437, WriteVSSEG4e32_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1438, WriteVSSEG4e32_M2_ReadVSTEV_M2_ReadVSTX_M2_ReadVMask = 1439, WriteVSSEG4e32_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1440, WriteVSSEG4e64_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1441, WriteVSSEG4e64_M2_ReadVSTEV_M2_ReadVSTX_M2_ReadVMask = 1442, WriteVSSEG4e8_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1443, WriteVSSEG4e8_M2_ReadVSTEV_M2_ReadVSTX_M2_ReadVMask = 1444, WriteVSSEG4e8_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1445, WriteVSSEG4e8_MF4_ReadVSTEV_MF4_ReadVSTX_MF4_ReadVMask = 1446, WriteVSSEG4e8_MF8_ReadVSTEV_MF8_ReadVSTX_MF8_ReadVMask = 1447, WriteVSSEG5e16_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1448, WriteVSSEG5e16_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1449, WriteVSSEG5e16_MF4_ReadVSTEV_MF4_ReadVSTX_MF4_ReadVMask = 1450, WriteVSSEG5e32_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1451, WriteVSSEG5e32_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1452, WriteVSSEG5e64_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1453, WriteVSSEG5e8_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1454, WriteVSSEG5e8_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1455, WriteVSSEG5e8_MF4_ReadVSTEV_MF4_ReadVSTX_MF4_ReadVMask = 1456, WriteVSSEG5e8_MF8_ReadVSTEV_MF8_ReadVSTX_MF8_ReadVMask = 1457, WriteVSSEG6e16_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1458, WriteVSSEG6e16_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1459, WriteVSSEG6e16_MF4_ReadVSTEV_MF4_ReadVSTX_MF4_ReadVMask = 1460, WriteVSSEG6e32_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1461, WriteVSSEG6e32_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1462, WriteVSSEG6e64_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1463, WriteVSSEG6e8_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1464, WriteVSSEG6e8_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1465, WriteVSSEG6e8_MF4_ReadVSTEV_MF4_ReadVSTX_MF4_ReadVMask = 1466, WriteVSSEG6e8_MF8_ReadVSTEV_MF8_ReadVSTX_MF8_ReadVMask = 1467, WriteVSSEG7e16_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1468, WriteVSSEG7e16_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1469, WriteVSSEG7e16_MF4_ReadVSTEV_MF4_ReadVSTX_MF4_ReadVMask = 1470, WriteVSSEG7e32_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1471, WriteVSSEG7e32_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1472, WriteVSSEG7e64_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1473, WriteVSSEG7e8_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1474, WriteVSSEG7e8_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1475, WriteVSSEG7e8_MF4_ReadVSTEV_MF4_ReadVSTX_MF4_ReadVMask = 1476, WriteVSSEG7e8_MF8_ReadVSTEV_MF8_ReadVSTX_MF8_ReadVMask = 1477, WriteVSSEG8e16_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1478, WriteVSSEG8e16_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1479, WriteVSSEG8e16_MF4_ReadVSTEV_MF4_ReadVSTX_MF4_ReadVMask = 1480, WriteVSSEG8e32_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1481, WriteVSSEG8e32_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1482, WriteVSSEG8e64_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1483, WriteVSSEG8e8_M1_ReadVSTEV_M1_ReadVSTX_M1_ReadVMask = 1484, WriteVSSEG8e8_MF2_ReadVSTEV_MF2_ReadVSTX_MF2_ReadVMask = 1485, WriteVSSEG8e8_MF4_ReadVSTEV_MF4_ReadVSTX_MF4_ReadVMask = 1486, WriteVSSEG8e8_MF8_ReadVSTEV_MF8_ReadVSTX_MF8_ReadVMask = 1487, WriteVSShiftI_M1_ReadVSShiftV_M1_ReadVMask = 1488, WriteVSShiftI_M2_ReadVSShiftV_M2_ReadVMask = 1489, WriteVSShiftI_M4_ReadVSShiftV_M4_ReadVMask = 1490, WriteVSShiftI_M8_ReadVSShiftV_M8_ReadVMask = 1491, WriteVSShiftI_MF2_ReadVSShiftV_MF2_ReadVMask = 1492, WriteVSShiftI_MF4_ReadVSShiftV_MF4_ReadVMask = 1493, WriteVSShiftI_MF8_ReadVSShiftV_MF8_ReadVMask = 1494, WriteVSShiftV_M1_ReadVSShiftV_M1_ReadVSShiftV_M1_ReadVMask = 1495, WriteVSShiftV_M2_ReadVSShiftV_M2_ReadVSShiftV_M2_ReadVMask = 1496, WriteVSShiftV_M4_ReadVSShiftV_M4_ReadVSShiftV_M4_ReadVMask = 1497, WriteVSShiftV_M8_ReadVSShiftV_M8_ReadVSShiftV_M8_ReadVMask = 1498, WriteVSShiftV_MF2_ReadVSShiftV_MF2_ReadVSShiftV_MF2_ReadVMask = 1499, WriteVSShiftV_MF4_ReadVSShiftV_MF4_ReadVSShiftV_MF4_ReadVMask = 1500, WriteVSShiftV_MF8_ReadVSShiftV_MF8_ReadVSShiftV_MF8_ReadVMask = 1501, WriteVSShiftX_M1_ReadVSShiftV_M1_ReadVSShiftX_M1_ReadVMask = 1502, WriteVSShiftX_M2_ReadVSShiftV_M2_ReadVSShiftX_M2_ReadVMask = 1503, WriteVSShiftX_M4_ReadVSShiftV_M4_ReadVSShiftX_M4_ReadVMask = 1504, WriteVSShiftX_M8_ReadVSShiftV_M8_ReadVSShiftX_M8_ReadVMask = 1505, WriteVSShiftX_MF2_ReadVSShiftV_MF2_ReadVSShiftX_MF2_ReadVMask = 1506, WriteVSShiftX_MF4_ReadVSShiftV_MF4_ReadVSShiftX_MF4_ReadVMask = 1507, WriteVSShiftX_MF8_ReadVSShiftV_MF8_ReadVSShiftX_MF8_ReadVMask = 1508, WriteVSSSEG2e16_M1_ReadVSTS16V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1509, WriteVSSSEG2e16_M2_ReadVSTS16V_M2_ReadVSTX_M2_ReadVSTSX_M2_ReadVMask = 1510, WriteVSSSEG2e16_M4_ReadVSTS16V_M4_ReadVSTX_M4_ReadVSTSX_M4_ReadVMask = 1511, WriteVSSSEG2e16_MF2_ReadVSTS16V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1512, WriteVSSSEG2e16_MF4_ReadVSTS16V_MF4_ReadVSTX_MF4_ReadVSTSX_MF4_ReadVMask = 1513, WriteVSSSEG2e32_M1_ReadVSTS32V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1514, WriteVSSSEG2e32_M2_ReadVSTS32V_M2_ReadVSTX_M2_ReadVSTSX_M2_ReadVMask = 1515, WriteVSSSEG2e32_M4_ReadVSTS32V_M4_ReadVSTX_M4_ReadVSTSX_M4_ReadVMask = 1516, WriteVSSSEG2e32_MF2_ReadVSTS32V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1517, WriteVSSSEG2e64_M1_ReadVSTS64V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1518, WriteVSSSEG2e64_M2_ReadVSTS64V_M2_ReadVSTX_M2_ReadVSTSX_M2_ReadVMask = 1519, WriteVSSSEG2e64_M4_ReadVSTS64V_M4_ReadVSTX_M4_ReadVSTSX_M4_ReadVMask = 1520, WriteVSSSEG2e8_M1_ReadVSTS8V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1521, WriteVSSSEG2e8_M2_ReadVSTS8V_M2_ReadVSTX_M2_ReadVSTSX_M2_ReadVMask = 1522, WriteVSSSEG2e8_M4_ReadVSTS8V_M4_ReadVSTX_M4_ReadVSTSX_M4_ReadVMask = 1523, WriteVSSSEG2e8_MF2_ReadVSTS8V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1524, WriteVSSSEG2e8_MF4_ReadVSTS8V_MF4_ReadVSTX_MF4_ReadVSTSX_MF4_ReadVMask = 1525, WriteVSSSEG2e8_MF8_ReadVSTS8V_MF8_ReadVSTX_MF8_ReadVSTSX_MF8_ReadVMask = 1526, WriteVSSSEG3e16_M1_ReadVSTS16V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1527, WriteVSSSEG3e16_M2_ReadVSTS16V_M2_ReadVSTX_M2_ReadVSTSX_M2_ReadVMask = 1528, WriteVSSSEG3e16_MF2_ReadVSTS16V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1529, WriteVSSSEG3e16_MF4_ReadVSTS16V_MF4_ReadVSTX_MF4_ReadVSTSX_MF4_ReadVMask = 1530, WriteVSSSEG3e32_M1_ReadVSTS32V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1531, WriteVSSSEG3e32_M2_ReadVSTS32V_M2_ReadVSTX_M2_ReadVSTSX_M2_ReadVMask = 1532, WriteVSSSEG3e32_MF2_ReadVSTS32V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1533, WriteVSSSEG3e64_M1_ReadVSTS64V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1534, WriteVSSSEG3e64_M2_ReadVSTS64V_M2_ReadVSTX_M2_ReadVSTSX_M2_ReadVMask = 1535, WriteVSSSEG3e8_M1_ReadVSTS8V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1536, WriteVSSSEG3e8_M2_ReadVSTS8V_M2_ReadVSTX_M2_ReadVSTSX_M2_ReadVMask = 1537, WriteVSSSEG3e8_MF2_ReadVSTS8V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1538, WriteVSSSEG3e8_MF4_ReadVSTS8V_MF4_ReadVSTX_MF4_ReadVSTSX_MF4_ReadVMask = 1539, WriteVSSSEG3e8_MF8_ReadVSTS8V_MF8_ReadVSTX_MF8_ReadVSTSX_MF8_ReadVMask = 1540, WriteVSSSEG4e16_M1_ReadVSTS16V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1541, WriteVSSSEG4e16_M2_ReadVSTS16V_M2_ReadVSTX_M2_ReadVSTSX_M2_ReadVMask = 1542, WriteVSSSEG4e16_MF2_ReadVSTS16V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1543, WriteVSSSEG4e16_MF4_ReadVSTS16V_MF4_ReadVSTX_MF4_ReadVSTSX_MF4_ReadVMask = 1544, WriteVSSSEG4e32_M1_ReadVSTS32V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1545, WriteVSSSEG4e32_M2_ReadVSTS32V_M2_ReadVSTX_M2_ReadVSTSX_M2_ReadVMask = 1546, WriteVSSSEG4e32_MF2_ReadVSTS32V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1547, WriteVSSSEG4e64_M1_ReadVSTS64V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1548, WriteVSSSEG4e64_M2_ReadVSTS64V_M2_ReadVSTX_M2_ReadVSTSX_M2_ReadVMask = 1549, WriteVSSSEG4e8_M1_ReadVSTS8V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1550, WriteVSSSEG4e8_M2_ReadVSTS8V_M2_ReadVSTX_M2_ReadVSTSX_M2_ReadVMask = 1551, WriteVSSSEG4e8_MF2_ReadVSTS8V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1552, WriteVSSSEG4e8_MF4_ReadVSTS8V_MF4_ReadVSTX_MF4_ReadVSTSX_MF4_ReadVMask = 1553, WriteVSSSEG4e8_MF8_ReadVSTS8V_MF8_ReadVSTX_MF8_ReadVSTSX_MF8_ReadVMask = 1554, WriteVSSSEG5e16_M1_ReadVSTS16V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1555, WriteVSSSEG5e16_MF2_ReadVSTS16V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1556, WriteVSSSEG5e16_MF4_ReadVSTS16V_MF4_ReadVSTX_MF4_ReadVSTSX_MF4_ReadVMask = 1557, WriteVSSSEG5e32_M1_ReadVSTS32V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1558, WriteVSSSEG5e32_MF2_ReadVSTS32V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1559, WriteVSSSEG5e64_M1_ReadVSTS64V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1560, WriteVSSSEG5e8_M1_ReadVSTS8V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1561, WriteVSSSEG5e8_MF2_ReadVSTS8V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1562, WriteVSSSEG5e8_MF4_ReadVSTS8V_MF4_ReadVSTX_MF4_ReadVSTSX_MF4_ReadVMask = 1563, WriteVSSSEG5e8_MF8_ReadVSTS8V_MF8_ReadVSTX_MF8_ReadVSTSX_MF8_ReadVMask = 1564, WriteVSSSEG6e16_M1_ReadVSTS16V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1565, WriteVSSSEG6e16_MF2_ReadVSTS16V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1566, WriteVSSSEG6e16_MF4_ReadVSTS16V_MF4_ReadVSTX_MF4_ReadVSTSX_MF4_ReadVMask = 1567, WriteVSSSEG6e32_M1_ReadVSTS32V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1568, WriteVSSSEG6e32_MF2_ReadVSTS32V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1569, WriteVSSSEG6e64_M1_ReadVSTS64V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1570, WriteVSSSEG6e8_M1_ReadVSTS8V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1571, WriteVSSSEG6e8_MF2_ReadVSTS8V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1572, WriteVSSSEG6e8_MF4_ReadVSTS8V_MF4_ReadVSTX_MF4_ReadVSTSX_MF4_ReadVMask = 1573, WriteVSSSEG6e8_MF8_ReadVSTS8V_MF8_ReadVSTX_MF8_ReadVSTSX_MF8_ReadVMask = 1574, WriteVSSSEG7e16_M1_ReadVSTS16V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1575, WriteVSSSEG7e16_MF2_ReadVSTS16V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1576, WriteVSSSEG7e16_MF4_ReadVSTS16V_MF4_ReadVSTX_MF4_ReadVSTSX_MF4_ReadVMask = 1577, WriteVSSSEG7e32_M1_ReadVSTS32V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1578, WriteVSSSEG7e32_MF2_ReadVSTS32V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1579, WriteVSSSEG7e64_M1_ReadVSTS64V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1580, WriteVSSSEG7e8_M1_ReadVSTS8V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1581, WriteVSSSEG7e8_MF2_ReadVSTS8V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1582, WriteVSSSEG7e8_MF4_ReadVSTS8V_MF4_ReadVSTX_MF4_ReadVSTSX_MF4_ReadVMask = 1583, WriteVSSSEG7e8_MF8_ReadVSTS8V_MF8_ReadVSTX_MF8_ReadVSTSX_MF8_ReadVMask = 1584, WriteVSSSEG8e16_M1_ReadVSTS16V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1585, WriteVSSSEG8e16_MF2_ReadVSTS16V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1586, WriteVSSSEG8e16_MF4_ReadVSTS16V_MF4_ReadVSTX_MF4_ReadVSTSX_MF4_ReadVMask = 1587, WriteVSSSEG8e32_M1_ReadVSTS32V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1588, WriteVSSSEG8e32_MF2_ReadVSTS32V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1589, WriteVSSSEG8e64_M1_ReadVSTS64V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1590, WriteVSSSEG8e8_M1_ReadVSTS8V_M1_ReadVSTX_M1_ReadVSTSX_M1_ReadVMask = 1591, WriteVSSSEG8e8_MF2_ReadVSTS8V_MF2_ReadVSTX_MF2_ReadVSTSX_MF2_ReadVMask = 1592, WriteVSSSEG8e8_MF4_ReadVSTS8V_MF4_ReadVSTX_MF4_ReadVSTSX_MF4_ReadVMask = 1593, WriteVSSSEG8e8_MF8_ReadVSTS8V_MF8_ReadVSTX_MF8_ReadVSTSX_MF8_ReadVMask = 1594, WriteVIALUV_M1_ReadVIALUV_M1_ReadVIALUX_M1_ReadVMask = 1595, WriteVIALUV_M2_ReadVIALUV_M2_ReadVIALUX_M2_ReadVMask = 1596, WriteVIALUV_M4_ReadVIALUV_M4_ReadVIALUX_M4_ReadVMask = 1597, WriteVIALUV_M8_ReadVIALUV_M8_ReadVIALUX_M8_ReadVMask = 1598, WriteVIALUV_MF2_ReadVIALUV_MF2_ReadVIALUX_MF2_ReadVMask = 1599, WriteVIALUV_MF4_ReadVIALUV_MF4_ReadVIALUX_MF4_ReadVMask = 1600, WriteVIALUV_MF8_ReadVIALUV_MF8_ReadVIALUX_MF8_ReadVMask = 1601, WriteVSTUX16_M1_ReadVSTUX16_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1602, WriteVSTUX16_M2_ReadVSTUX16_M2_ReadVSTX_M2_ReadVSTUXV_M2_ReadVMask = 1603, WriteVSTUX16_M4_ReadVSTUX16_M4_ReadVSTX_M4_ReadVSTUXV_M4_ReadVMask = 1604, WriteVSTUX16_MF2_ReadVSTUX16_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1605, WriteVSTUX16_M8_ReadVSTUX16_M8_ReadVSTX_M8_ReadVSTUXV_M8_ReadVMask = 1606, WriteVSTUX16_MF4_ReadVSTUX16_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1607, WriteVSTUX16_MF8_ReadVSTUX16_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1608, WriteVSTUX32_M1_ReadVSTUX32_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1609, WriteVSTUX32_M2_ReadVSTUX32_M2_ReadVSTX_M2_ReadVSTUXV_M2_ReadVMask = 1610, WriteVSTUX32_MF2_ReadVSTUX32_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1611, WriteVSTUX32_MF4_ReadVSTUX32_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1612, WriteVSTUX32_M4_ReadVSTUX32_M4_ReadVSTX_M4_ReadVSTUXV_M4_ReadVMask = 1613, WriteVSTUX32_M8_ReadVSTUX32_M8_ReadVSTX_M8_ReadVSTUXV_M8_ReadVMask = 1614, WriteVSTUX32_MF8_ReadVSTUX32_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1615, WriteVSTUX64_M1_ReadVSTUX64_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1616, WriteVSTUX64_MF2_ReadVSTUX64_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1617, WriteVSTUX64_MF4_ReadVSTUX64_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1618, WriteVSTUX64_MF8_ReadVSTUX64_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1619, WriteVSTUX64_M2_ReadVSTUX64_M2_ReadVSTX_M2_ReadVSTUXV_M2_ReadVMask = 1620, WriteVSTUX64_M4_ReadVSTUX64_M4_ReadVSTX_M4_ReadVSTUXV_M4_ReadVMask = 1621, WriteVSTUX64_M8_ReadVSTUX64_M8_ReadVSTX_M8_ReadVSTUXV_M8_ReadVMask = 1622, WriteVSTUX8_M1_ReadVSTUX8_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1623, WriteVSTUX8_M2_ReadVSTUX8_M2_ReadVSTX_M2_ReadVSTUXV_M2_ReadVMask = 1624, WriteVSTUX8_M4_ReadVSTUX8_M4_ReadVSTX_M4_ReadVSTUXV_M4_ReadVMask = 1625, WriteVSTUX8_M8_ReadVSTUX8_M8_ReadVSTX_M8_ReadVSTUXV_M8_ReadVMask = 1626, WriteVSTUX8_MF2_ReadVSTUX8_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1627, WriteVSTUX8_MF4_ReadVSTUX8_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1628, WriteVSTUX8_MF8_ReadVSTUX8_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1629, WriteVSUXSEG2e16_M1_ReadVSTUX16_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1630, WriteVSUXSEG2e16_M2_ReadVSTUX16_M2_ReadVSTX_M2_ReadVSTUXV_M2_ReadVMask = 1631, WriteVSUXSEG2e16_M4_ReadVSTUX16_M4_ReadVSTX_M4_ReadVSTUXV_M4_ReadVMask = 1632, WriteVSUXSEG2e16_MF2_ReadVSTUX16_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1633, WriteVSUXSEG2e16_MF4_ReadVSTUX16_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1634, WriteVSUXSEG2e16_MF8_ReadVSTUX16_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1635, WriteVSUXSEG2e32_M1_ReadVSTUX32_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1636, WriteVSUXSEG2e32_M2_ReadVSTUX32_M2_ReadVSTX_M2_ReadVSTUXV_M2_ReadVMask = 1637, WriteVSUXSEG2e32_MF2_ReadVSTUX32_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1638, WriteVSUXSEG2e32_MF4_ReadVSTUX32_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1639, WriteVSUXSEG2e32_M4_ReadVSTUX32_M4_ReadVSTX_M4_ReadVSTUXV_M4_ReadVMask = 1640, WriteVSUXSEG2e32_MF8_ReadVSTUX32_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1641, WriteVSUXSEG2e64_M1_ReadVSTUX64_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1642, WriteVSUXSEG2e64_MF2_ReadVSTUX64_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1643, WriteVSUXSEG2e64_MF4_ReadVSTUX64_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1644, WriteVSUXSEG2e64_MF8_ReadVSTUX64_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1645, WriteVSUXSEG2e64_M2_ReadVSTUX64_M2_ReadVSTX_M2_ReadVSTUXV_M2_ReadVMask = 1646, WriteVSUXSEG2e64_M4_ReadVSTUX64_M4_ReadVSTX_M4_ReadVSTUXV_M4_ReadVMask = 1647, WriteVSUXSEG2e8_M1_ReadVSTUX8_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1648, WriteVSUXSEG2e8_M2_ReadVSTUX8_M2_ReadVSTX_M2_ReadVSTUXV_M2_ReadVMask = 1649, WriteVSUXSEG2e8_M4_ReadVSTUX8_M4_ReadVSTX_M4_ReadVSTUXV_M4_ReadVMask = 1650, WriteVSUXSEG2e8_MF2_ReadVSTUX8_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1651, WriteVSUXSEG2e8_MF4_ReadVSTUX8_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1652, WriteVSUXSEG2e8_MF8_ReadVSTUX8_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1653, WriteVSUXSEG3e16_M1_ReadVSTUX16_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1654, WriteVSUXSEG3e16_M2_ReadVSTUX16_M2_ReadVSTX_M2_ReadVSTUXV_M2_ReadVMask = 1655, WriteVSUXSEG3e16_MF2_ReadVSTUX16_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1656, WriteVSUXSEG3e16_MF4_ReadVSTUX16_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1657, WriteVSUXSEG3e16_MF8_ReadVSTUX16_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1658, WriteVSUXSEG3e32_M1_ReadVSTUX32_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1659, WriteVSUXSEG3e32_M2_ReadVSTUX32_M2_ReadVSTX_M2_ReadVSTUXV_M2_ReadVMask = 1660, WriteVSUXSEG3e32_MF2_ReadVSTUX32_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1661, WriteVSUXSEG3e32_MF4_ReadVSTUX32_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1662, WriteVSUXSEG3e32_MF8_ReadVSTUX32_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1663, WriteVSUXSEG3e64_M1_ReadVSTUX64_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1664, WriteVSUXSEG3e64_MF2_ReadVSTUX64_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1665, WriteVSUXSEG3e64_MF4_ReadVSTUX64_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1666, WriteVSUXSEG3e64_MF8_ReadVSTUX64_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1667, WriteVSUXSEG3e64_M2_ReadVSTUX64_M2_ReadVSTX_M2_ReadVSTUXV_M2_ReadVMask = 1668, WriteVSUXSEG3e8_M1_ReadVSTUX8_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1669, WriteVSUXSEG3e8_M2_ReadVSTUX8_M2_ReadVSTX_M2_ReadVSTUXV_M2_ReadVMask = 1670, WriteVSUXSEG3e8_MF2_ReadVSTUX8_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1671, WriteVSUXSEG3e8_MF4_ReadVSTUX8_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1672, WriteVSUXSEG3e8_MF8_ReadVSTUX8_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1673, WriteVSUXSEG4e16_M1_ReadVSTUX16_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1674, WriteVSUXSEG4e16_M2_ReadVSTUX16_M2_ReadVSTX_M2_ReadVSTUXV_M2_ReadVMask = 1675, WriteVSUXSEG4e16_MF2_ReadVSTUX16_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1676, WriteVSUXSEG4e16_MF4_ReadVSTUX16_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1677, WriteVSUXSEG4e16_MF8_ReadVSTUX16_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1678, WriteVSUXSEG4e32_M1_ReadVSTUX32_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1679, WriteVSUXSEG4e32_M2_ReadVSTUX32_M2_ReadVSTX_M2_ReadVSTUXV_M2_ReadVMask = 1680, WriteVSUXSEG4e32_MF2_ReadVSTUX32_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1681, WriteVSUXSEG4e32_MF4_ReadVSTUX32_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1682, WriteVSUXSEG4e32_MF8_ReadVSTUX32_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1683, WriteVSUXSEG4e64_M1_ReadVSTUX64_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1684, WriteVSUXSEG4e64_MF2_ReadVSTUX64_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1685, WriteVSUXSEG4e64_MF4_ReadVSTUX64_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1686, WriteVSUXSEG4e64_MF8_ReadVSTUX64_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1687, WriteVSUXSEG4e64_M2_ReadVSTUX64_M2_ReadVSTX_M2_ReadVSTUXV_M2_ReadVMask = 1688, WriteVSUXSEG4e8_M1_ReadVSTUX8_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1689, WriteVSUXSEG4e8_M2_ReadVSTUX8_M2_ReadVSTX_M2_ReadVSTUXV_M2_ReadVMask = 1690, WriteVSUXSEG4e8_MF2_ReadVSTUX8_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1691, WriteVSUXSEG4e8_MF4_ReadVSTUX8_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1692, WriteVSUXSEG4e8_MF8_ReadVSTUX8_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1693, WriteVSUXSEG5e16_M1_ReadVSTUX16_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1694, WriteVSUXSEG5e16_MF2_ReadVSTUX16_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1695, WriteVSUXSEG5e16_MF4_ReadVSTUX16_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1696, WriteVSUXSEG5e16_MF8_ReadVSTUX16_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1697, WriteVSUXSEG5e32_M1_ReadVSTUX32_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1698, WriteVSUXSEG5e32_MF2_ReadVSTUX32_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1699, WriteVSUXSEG5e32_MF4_ReadVSTUX32_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1700, WriteVSUXSEG5e32_MF8_ReadVSTUX32_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1701, WriteVSUXSEG5e64_M1_ReadVSTUX64_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1702, WriteVSUXSEG5e64_MF2_ReadVSTUX64_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1703, WriteVSUXSEG5e64_MF4_ReadVSTUX64_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1704, WriteVSUXSEG5e64_MF8_ReadVSTUX64_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1705, WriteVSUXSEG5e8_M1_ReadVSTUX8_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1706, WriteVSUXSEG5e8_MF2_ReadVSTUX8_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1707, WriteVSUXSEG5e8_MF4_ReadVSTUX8_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1708, WriteVSUXSEG5e8_MF8_ReadVSTUX8_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1709, WriteVSUXSEG6e16_M1_ReadVSTUX16_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1710, WriteVSUXSEG6e16_MF2_ReadVSTUX16_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1711, WriteVSUXSEG6e16_MF4_ReadVSTUX16_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1712, WriteVSUXSEG6e16_MF8_ReadVSTUX16_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1713, WriteVSUXSEG6e32_M1_ReadVSTUX32_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1714, WriteVSUXSEG6e32_MF2_ReadVSTUX32_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1715, WriteVSUXSEG6e32_MF4_ReadVSTUX32_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1716, WriteVSUXSEG6e32_MF8_ReadVSTUX32_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1717, WriteVSUXSEG6e64_M1_ReadVSTUX64_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1718, WriteVSUXSEG6e64_MF2_ReadVSTUX64_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1719, WriteVSUXSEG6e64_MF4_ReadVSTUX64_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1720, WriteVSUXSEG6e64_MF8_ReadVSTUX64_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1721, WriteVSUXSEG6e8_M1_ReadVSTUX8_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1722, WriteVSUXSEG6e8_MF2_ReadVSTUX8_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1723, WriteVSUXSEG6e8_MF4_ReadVSTUX8_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1724, WriteVSUXSEG6e8_MF8_ReadVSTUX8_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1725, WriteVSUXSEG7e16_M1_ReadVSTUX16_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1726, WriteVSUXSEG7e16_MF2_ReadVSTUX16_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1727, WriteVSUXSEG7e16_MF4_ReadVSTUX16_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1728, WriteVSUXSEG7e16_MF8_ReadVSTUX16_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1729, WriteVSUXSEG7e32_M1_ReadVSTUX32_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1730, WriteVSUXSEG7e32_MF2_ReadVSTUX32_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1731, WriteVSUXSEG7e32_MF4_ReadVSTUX32_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1732, WriteVSUXSEG7e32_MF8_ReadVSTUX32_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1733, WriteVSUXSEG7e64_M1_ReadVSTUX64_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1734, WriteVSUXSEG7e64_MF2_ReadVSTUX64_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1735, WriteVSUXSEG7e64_MF4_ReadVSTUX64_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1736, WriteVSUXSEG7e64_MF8_ReadVSTUX64_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1737, WriteVSUXSEG7e8_M1_ReadVSTUX8_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1738, WriteVSUXSEG7e8_MF2_ReadVSTUX8_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1739, WriteVSUXSEG7e8_MF4_ReadVSTUX8_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1740, WriteVSUXSEG7e8_MF8_ReadVSTUX8_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1741, WriteVSUXSEG8e16_M1_ReadVSTUX16_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1742, WriteVSUXSEG8e16_MF2_ReadVSTUX16_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1743, WriteVSUXSEG8e16_MF4_ReadVSTUX16_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1744, WriteVSUXSEG8e16_MF8_ReadVSTUX16_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1745, WriteVSUXSEG8e32_M1_ReadVSTUX32_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1746, WriteVSUXSEG8e32_MF2_ReadVSTUX32_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1747, WriteVSUXSEG8e32_MF4_ReadVSTUX32_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1748, WriteVSUXSEG8e32_MF8_ReadVSTUX32_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1749, WriteVSUXSEG8e64_M1_ReadVSTUX64_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1750, WriteVSUXSEG8e64_MF2_ReadVSTUX64_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1751, WriteVSUXSEG8e64_MF4_ReadVSTUX64_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1752, WriteVSUXSEG8e64_MF8_ReadVSTUX64_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1753, WriteVSUXSEG8e8_M1_ReadVSTUX8_M1_ReadVSTX_M1_ReadVSTUXV_M1_ReadVMask = 1754, WriteVSUXSEG8e8_MF2_ReadVSTUX8_MF2_ReadVSTX_MF2_ReadVSTUXV_MF2_ReadVMask = 1755, WriteVSUXSEG8e8_MF4_ReadVSTUX8_MF4_ReadVSTX_MF4_ReadVSTUXV_MF4_ReadVMask = 1756, WriteVSUXSEG8e8_MF8_ReadVSTUX8_MF8_ReadVSTX_MF8_ReadVSTUXV_MF8_ReadVMask = 1757, WriteVIWALUV_M1_ReadVIWALUV_M1_ReadVIWALUV_M1_ReadVMask = 1758, WriteVIWALUV_M2_ReadVIWALUV_M2_ReadVIWALUV_M2_ReadVMask = 1759, WriteVIWALUV_M4_ReadVIWALUV_M4_ReadVIWALUV_M4_ReadVMask = 1760, WriteVIWALUV_MF2_ReadVIWALUV_MF2_ReadVIWALUV_MF2_ReadVMask = 1761, WriteVIWALUV_MF4_ReadVIWALUV_MF4_ReadVIWALUV_MF4_ReadVMask = 1762, WriteVIWALUV_MF8_ReadVIWALUV_MF8_ReadVIWALUV_MF8_ReadVMask = 1763, WriteVIWALUX_M1_ReadVIWALUV_M1_ReadVIWALUX_M1_ReadVMask = 1764, WriteVIWALUX_M2_ReadVIWALUV_M2_ReadVIWALUX_M2_ReadVMask = 1765, WriteVIWALUX_M4_ReadVIWALUV_M4_ReadVIWALUX_M4_ReadVMask = 1766, WriteVIWALUX_MF2_ReadVIWALUV_MF2_ReadVIWALUX_MF2_ReadVMask = 1767, WriteVIWALUX_MF4_ReadVIWALUV_MF4_ReadVIWALUX_MF4_ReadVMask = 1768, WriteVIWALUX_MF8_ReadVIWALUV_MF8_ReadVIWALUX_MF8_ReadVMask = 1769, WriteVIWMulAddV_M1_ReadVIWMulAddV_M1_ReadVIWMulAddV_M1_ReadVIWMulAddV_M1_ReadVMask = 1770, WriteVIWMulAddV_M2_ReadVIWMulAddV_M2_ReadVIWMulAddV_M2_ReadVIWMulAddV_M2_ReadVMask = 1771, WriteVIWMulAddV_M4_ReadVIWMulAddV_M4_ReadVIWMulAddV_M4_ReadVIWMulAddV_M4_ReadVMask = 1772, WriteVIWMulAddV_MF2_ReadVIWMulAddV_MF2_ReadVIWMulAddV_MF2_ReadVIWMulAddV_MF2_ReadVMask = 1773, WriteVIWMulAddV_MF4_ReadVIWMulAddV_MF4_ReadVIWMulAddV_MF4_ReadVIWMulAddV_MF4_ReadVMask = 1774, WriteVIWMulAddV_MF8_ReadVIWMulAddV_MF8_ReadVIWMulAddV_MF8_ReadVIWMulAddV_MF8_ReadVMask = 1775, WriteVIWMulAddX_M1_ReadVIWMulAddV_M1_ReadVIWMulAddV_M1_ReadVIWMulAddX_M1_ReadVMask = 1776, WriteVIWMulAddX_M2_ReadVIWMulAddV_M2_ReadVIWMulAddV_M2_ReadVIWMulAddX_M2_ReadVMask = 1777, WriteVIWMulAddX_M4_ReadVIWMulAddV_M4_ReadVIWMulAddV_M4_ReadVIWMulAddX_M4_ReadVMask = 1778, WriteVIWMulAddX_MF2_ReadVIWMulAddV_MF2_ReadVIWMulAddV_MF2_ReadVIWMulAddX_MF2_ReadVMask = 1779, WriteVIWMulAddX_MF4_ReadVIWMulAddV_MF4_ReadVIWMulAddV_MF4_ReadVIWMulAddX_MF4_ReadVMask = 1780, WriteVIWMulAddX_MF8_ReadVIWMulAddV_MF8_ReadVIWMulAddV_MF8_ReadVIWMulAddX_MF8_ReadVMask = 1781, WriteVIWMulV_M1_ReadVIWMulV_M1_ReadVIWMulV_M1_ReadVMask = 1782, WriteVIWMulV_M2_ReadVIWMulV_M2_ReadVIWMulV_M2_ReadVMask = 1783, WriteVIWMulV_M4_ReadVIWMulV_M4_ReadVIWMulV_M4_ReadVMask = 1784, WriteVIWMulV_MF2_ReadVIWMulV_MF2_ReadVIWMulV_MF2_ReadVMask = 1785, WriteVIWMulV_MF4_ReadVIWMulV_MF4_ReadVIWMulV_MF4_ReadVMask = 1786, WriteVIWMulV_MF8_ReadVIWMulV_MF8_ReadVIWMulV_MF8_ReadVMask = 1787, WriteVIWMulX_M1_ReadVIWMulV_M1_ReadVIWMulX_M1_ReadVMask = 1788, WriteVIWMulX_M2_ReadVIWMulV_M2_ReadVIWMulX_M2_ReadVMask = 1789, WriteVIWMulX_M4_ReadVIWMulV_M4_ReadVIWMulX_M4_ReadVMask = 1790, WriteVIWMulX_MF2_ReadVIWMulV_MF2_ReadVIWMulX_MF2_ReadVMask = 1791, WriteVIWMulX_MF4_ReadVIWMulV_MF4_ReadVIWMulX_MF4_ReadVMask = 1792, WriteVIWMulX_MF8_ReadVIWMulV_MF8_ReadVIWMulX_MF8_ReadVMask = 1793, WriteVIWRedV_ReadVIWRedV_ReadVIWRedV_ReadVIWRedV_ReadVMask = 1794, WriteIALU_ReadIALU_ReadIALU = 1795, WriteIALU_ReadIALU = 1796, WriteIALU32_ReadIALU32 = 1797, WriteIALU32_ReadIALU32_ReadIALU32 = 1798, WriteAtomicD_ReadAtomicDA_ReadAtomicDD = 1799, WriteAtomicW_ReadAtomicWA_ReadAtomicWD = 1800, WriteIALU = 1801, WriteSingleBit_ReadSingleBit_ReadSingleBit = 1802, WriteSingleBitImm_ReadSingleBitImm = 1803, WriteJmp_ReadJmp_ReadJmp = 1804, WriteBREV8_ReadBREV8 = 1805, WriteCLMUL_ReadCLMUL_ReadCLMUL = 1806, WriteCLZ_ReadCLZ = 1807, WriteCLZ32_ReadCLZ32 = 1808, WriteCPOP_ReadCPOP = 1809, WriteCPOP32_ReadCPOP32 = 1810, WriteCSR_ReadCSR = 1811, WriteCSR = 1812, WriteCTZ_ReadCTZ = 1813, WriteCTZ32_ReadCTZ32 = 1814, WriteJmp = 1815, WriteFLD64_ReadMemBase = 1816, WriteFLD32_ReadMemBase = 1817, WriteFST64_ReadStoreData_ReadMemBase = 1818, WriteFST32_ReadStoreData_ReadMemBase = 1819, WriteJal = 1820, WriteJalr_ReadJalr = 1821, WriteJmpReg = 1822, WriteLDD_ReadMemBase = 1823, WriteLDW_ReadMemBase = 1824, WriteNop = 1825, WriteSTD_ReadStoreData_ReadMemBase = 1826, WriteShiftImm_ReadShiftImm = 1827, WriteSTW_ReadStoreData_ReadMemBase = 1828, WriteIDiv_ReadIDiv_ReadIDiv = 1829, WriteIDiv32_ReadIDiv32_ReadIDiv32 = 1830, WriteFAdd64_ReadFAdd64_ReadFAdd64 = 1831, WriteFAdd16_ReadFAdd16_ReadFAdd16 = 1832, WriteFAdd32_ReadFAdd32_ReadFAdd32 = 1833, WriteFClass64_ReadFClass64 = 1834, WriteFClass16_ReadFClass16 = 1835, WriteFClass32_ReadFClass32 = 1836, WriteFCvtF16ToF64_ReadFCvtF16ToF64 = 1837, WriteFCvtI64ToF64_ReadFCvtI64ToF64 = 1838, WriteFCvtF32ToF64_ReadFCvtF32ToF64 = 1839, WriteFCvtI32ToF64_ReadFCvtI32ToF64 = 1840, WriteFCvtF64ToF16_ReadFCvtF64ToF16 = 1841, WriteFCvtI64ToF16_ReadFCvtI64ToF16 = 1842, WriteFCvtF32ToF16_ReadFCvtF32ToF16 = 1843, WriteFCvtI32ToF16_ReadFCvtI32ToF16 = 1844, WriteFCvtF64ToI64_ReadFCvtF64ToI64 = 1845, WriteFCvtF16ToI64_ReadFCvtF16ToI64 = 1846, WriteFCvtF32ToI64_ReadFCvtF32ToI64 = 1847, WriteFCvtF64ToF32_ReadFCvtF64ToF32 = 1848, WriteFCvtF16ToF32_ReadFCvtF16ToF32 = 1849, WriteFCvtI64ToF32_ReadFCvtI64ToF32 = 1850, WriteFCvtI32ToF32_ReadFCvtI32ToF32 = 1851, WriteFCvtF64ToI32_ReadFCvtF64ToI32 = 1852, WriteFCvtF16ToI32_ReadFCvtF16ToI32 = 1853, WriteFCvtF32ToI32_ReadFCvtF32ToI32 = 1854, WriteFDiv64_ReadFDiv64_ReadFDiv64 = 1855, WriteFDiv16_ReadFDiv16_ReadFDiv16 = 1856, WriteFDiv32_ReadFDiv32_ReadFDiv32 = 1857, WriteFCmp64_ReadFCmp64_ReadFCmp64 = 1858, WriteFCmp16_ReadFCmp16_ReadFCmp16 = 1859, WriteFCmp32_ReadFCmp32_ReadFCmp32 = 1860, WriteFLD64_ReadFMemBase = 1861, WriteFLD16_ReadFMemBase = 1862, WriteFLD32_ReadFMemBase = 1863, WriteFMA64_ReadFMA64_ReadFMA64_ReadFMA64 = 1864, WriteFMA16_ReadFMA16_ReadFMA16_ReadFMA16 = 1865, WriteFMA32_ReadFMA32_ReadFMA32_ReadFMA32 = 1866, WriteFMinMax64_ReadFMinMax64_ReadFMinMax64 = 1867, WriteFMinMax16_ReadFMinMax16_ReadFMinMax16 = 1868, WriteFMinMax32_ReadFMinMax32_ReadFMinMax32 = 1869, WriteFMul64_ReadFMul64_ReadFMul64 = 1870, WriteFMul16_ReadFMul16_ReadFMul16 = 1871, WriteFMul32_ReadFMul32_ReadFMul32 = 1872, WriteFMovI64ToF64_ReadFMovI64ToF64 = 1873, WriteFMovI16ToF16_ReadFMovI16ToF16 = 1874, WriteFMovI32ToF32_ReadFMovI32ToF32 = 1875, WriteFMovF64ToI64_ReadFMovF64ToI64 = 1876, WriteFMovF16ToI16_ReadFMovF16ToI16 = 1877, WriteFMovF32ToI32_ReadFMovF32ToI32 = 1878, WriteFST64_ReadFStoreData_ReadFMemBase = 1879, WriteFSGNJ64_ReadFSGNJ64_ReadFSGNJ64 = 1880, WriteFSGNJ16_ReadFSGNJ16_ReadFSGNJ16 = 1881, WriteFSGNJ32_ReadFSGNJ32_ReadFSGNJ32 = 1882, WriteFST16_ReadFStoreData_ReadFMemBase = 1883, WriteFSqrt64_ReadFSqrt64 = 1884, WriteFSqrt16_ReadFSqrt16 = 1885, WriteFSqrt32_ReadFSqrt32 = 1886, WriteFST32_ReadFStoreData_ReadFMemBase = 1887, WriteLDB_ReadMemBase = 1888, WriteLDH_ReadMemBase = 1889, WriteAtomicLDD_ReadAtomicLDD = 1890, WriteAtomicLDW_ReadAtomicLDW = 1891, WriteIMul_ReadIMul_ReadIMul = 1892, WriteIMul32_ReadIMul32_ReadIMul32 = 1893, WriteORCB_ReadORCB = 1894, WritePACK_ReadPACK_ReadPACK = 1895, WritePACK32_ReadPACK32_ReadPACK32 = 1896, WriteREV8_ReadREV8 = 1897, WriteRotateReg_ReadRotateReg_ReadRotateReg = 1898, WriteRotateReg32_ReadRotateReg32_ReadRotateReg32 = 1899, WriteRotateImm_ReadRotateImm = 1900, WriteRotateImm32_ReadRotateImm32 = 1901, WriteSTB_ReadStoreData_ReadMemBase = 1902, WriteAtomicSTD_ReadAtomicSTD_ReadAtomicSTD = 1903, WriteAtomicSTW_ReadAtomicSTW_ReadAtomicSTW = 1904, WriteSTH_ReadStoreData_ReadMemBase = 1905, WriteSHXADD_ReadSHXADD_ReadSHXADD = 1906, WriteSHXADD32_ReadSHXADD32_ReadSHXADD32 = 1907, WriteShiftReg_ReadShiftReg_ReadShiftReg = 1908, WriteShiftImm32_ReadShiftImm32 = 1909, WriteShiftReg32_ReadShiftReg32_ReadShiftReg32 = 1910, WriteZIP_ReadZIP = 1911, WriteVAALUV_UpperBound_ReadVAALUV_UpperBound_ReadVAALUV_UpperBound_ReadVMask = 1912, WriteVAALUX_UpperBound_ReadVAALUV_UpperBound_ReadVAALUX_UpperBound_ReadVMask = 1913, WriteVICALUI_UpperBound_ReadVICALUV_UpperBound_ReadVMask = 1914, WriteVICALUV_UpperBound_ReadVICALUV_UpperBound_ReadVICALUV_UpperBound_ReadVMask = 1915, WriteVICALUX_UpperBound_ReadVICALUV_UpperBound_ReadVICALUX_UpperBound_ReadVMask = 1916, WriteVIALUI_UpperBound_ReadVIALUV_UpperBound_ReadVMask = 1917, WriteVIALUV_UpperBound_ReadVIALUV_UpperBound_ReadVIALUV_UpperBound_ReadVMask = 1918, WriteVIALUX_UpperBound_ReadVIALUV_UpperBound_ReadVIALUX_UpperBound_ReadVMask = 1919, WriteVCompressV_UpperBound_ReadVCompressV_UpperBound_ReadVCompressV_UpperBound = 1920, WriteVMPopV_UpperBound_ReadVMPopV_UpperBound_ReadVMask = 1921, WriteVIDivV_UpperBound_ReadVIDivV_UpperBound_ReadVIDivV_UpperBound_ReadVMask = 1922, WriteVIDivX_UpperBound_ReadVIDivV_UpperBound_ReadVIDivX_UpperBound_ReadVMask = 1923, WriteVFALUF_UpperBound_ReadVFALUV_UpperBound_ReadVFALUF_UpperBound_ReadVMask = 1924, WriteVFALUV_UpperBound_ReadVFALUV_UpperBound_ReadVFALUV_UpperBound_ReadVMask = 1925, WriteVFClassV_UpperBound_ReadVFClassV_UpperBound_ReadVMask = 1926, WriteVFCvtIToFV_UpperBound_ReadVFCvtIToFV_UpperBound_ReadVMask = 1927, WriteVFCvtFToIV_UpperBound_ReadVFCvtFToIV_UpperBound_ReadVMask = 1928, WriteVFDivF_UpperBound_ReadVFDivV_UpperBound_ReadVFDivF_UpperBound_ReadVMask = 1929, WriteVFDivV_UpperBound_ReadVFDivV_UpperBound_ReadVFDivV_UpperBound_ReadVMask = 1930, WriteVMFFSV_UpperBound_ReadVMFFSV_UpperBound_ReadVMask = 1931, WriteVFMulAddF_UpperBound_ReadVFMulAddV_UpperBound_ReadVFMulAddF_UpperBound_ReadVMask = 1932, WriteVFMulAddV_UpperBound_ReadVFMulAddV_UpperBound_ReadVFMulAddV_UpperBound_ReadVMask = 1933, WriteVFCmpF_UpperBound_ReadVFCmpV_UpperBound_ReadVFCmpF_UpperBound_ReadVMask = 1934, WriteVFCmpV_UpperBound_ReadVFCmpV_UpperBound_ReadVFCmpV_UpperBound_ReadVMask = 1935, WriteVFMergeV_UpperBound_ReadVFMergeV_UpperBound_ReadVFMergeF_UpperBound_ReadVMask = 1936, WriteVFMulF_UpperBound_ReadVFMulV_UpperBound_ReadVFMulF_UpperBound_ReadVMask = 1937, WriteVFMulV_UpperBound_ReadVFMulV_UpperBound_ReadVFMulV_UpperBound_ReadVMask = 1938, WriteVFMovVF_UpperBound_ReadVFMovVF_UpperBound = 1939, WriteVFMovFV_UpperBound_ReadVFMovFV_UpperBound_ReadVFMovFX_UpperBound = 1940, WriteVFMovV_UpperBound_ReadVFMovF_UpperBound = 1941, WriteVFNCvtFToFV_UpperBound_ReadVFNCvtFToFV_UpperBound_ReadVMask = 1942, WriteVFNCvtIToFV_UpperBound_ReadVFNCvtIToFV_UpperBound_ReadVMask = 1943, WriteVFNCvtFToIV_UpperBound_ReadVFNCvtFToIV_UpperBound_ReadVMask = 1944, WriteVFRecpV_UpperBound_ReadVFRecpV_UpperBound_ReadVMask = 1945, WriteVFRedV_ReadVFRedV_ReadVFRedV0_ReadVMask = 1946, WriteVFRedOV_ReadVFRedOV_ReadVFRedOV0_ReadVMask = 1947, WriteVFSgnjF_UpperBound_ReadVFSgnjV_UpperBound_ReadVFSgnjF_UpperBound_ReadVMask = 1948, WriteVFSgnjV_UpperBound_ReadVFSgnjV_UpperBound_ReadVFSgnjV_UpperBound_ReadVMask = 1949, WriteVFSlide1F_UpperBound_ReadVFSlideV_UpperBound_ReadVFSlideF_UpperBound_ReadVMask = 1950, WriteVFSqrtV_UpperBound_ReadVFSqrtV_UpperBound_ReadVMask = 1951, WriteVFWALUF_UpperBound_ReadVFWALUV_UpperBound_ReadVFWALUF_UpperBound_ReadVMask = 1952, WriteVFWALUV_UpperBound_ReadVFWALUV_UpperBound_ReadVFWALUV_UpperBound_ReadVMask = 1953, WriteVFWCvtFToFV_UpperBound_ReadVFWCvtFToFV_UpperBound_ReadVMask = 1954, WriteVFWCvtIToFV_UpperBound_ReadVFWCvtIToFV_UpperBound_ReadVMask = 1955, WriteVFWCvtFToIV_UpperBound_ReadVFWCvtFToIV_UpperBound_ReadVMask = 1956, WriteVFWMulAddF_UpperBound_ReadVFWMulAddV_UpperBound_ReadVFWMulAddF_UpperBound_ReadVMask = 1957, WriteVFWMulAddV_UpperBound_ReadVFWMulAddV_UpperBound_ReadVFWMulAddV_UpperBound_ReadVMask = 1958, WriteVFWMulF_UpperBound_ReadVFWMulV_UpperBound_ReadVFWMulF_UpperBound_ReadVMask = 1959, WriteVFWMulV_UpperBound_ReadVFWMulV_UpperBound_ReadVFWMulV_UpperBound_ReadVMask = 1960, WriteVFWRedOV_ReadVFWRedOV_ReadVFWRedOV0_ReadVMask = 1961, WriteVFWRedV_ReadVFWRedV_ReadVFWRedV0_ReadVMask = 1962, WriteVMIdxV_UpperBound_ReadVMask = 1963, WriteVMIotV_UpperBound_ReadVMIotV_UpperBound_ReadVMask = 1964, WriteVLD1R_ReadVLDX_UpperBound = 1965, WriteVLD2R_ReadVLDX_UpperBound = 1966, WriteVLD4R_ReadVLDX_UpperBound = 1967, WriteVLD8R_ReadVLDX_UpperBound = 1968, WriteVLDFF_UpperBound_ReadVLDX_UpperBound_ReadVMask = 1969, WriteVLDE_UpperBound_ReadVLDX_UpperBound_ReadVMask = 1970, WriteVLDM_UpperBound_ReadVLDX_UpperBound = 1971, WriteVLDOX16_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1972, WriteVLDOX32_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1973, WriteVLDOX64_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1974, WriteVLDOX8_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1975, WriteVLOXSEG2e16_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1976, WriteVLOXSEG2e32_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1977, WriteVLOXSEG2e64_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1978, WriteVLOXSEG2e8_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1979, WriteVLOXSEG3e16_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1980, WriteVLOXSEG3e32_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1981, WriteVLOXSEG3e64_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1982, WriteVLOXSEG3e8_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1983, WriteVLOXSEG4e16_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1984, WriteVLOXSEG4e32_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1985, WriteVLOXSEG4e64_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1986, WriteVLOXSEG4e8_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1987, WriteVLOXSEG5e16_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1988, WriteVLOXSEG5e32_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1989, WriteVLOXSEG5e64_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1990, WriteVLOXSEG5e8_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1991, WriteVLOXSEG6e16_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1992, WriteVLOXSEG6e32_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1993, WriteVLOXSEG6e64_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1994, WriteVLOXSEG6e8_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1995, WriteVLOXSEG7e16_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1996, WriteVLOXSEG7e32_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1997, WriteVLOXSEG7e64_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1998, WriteVLOXSEG7e8_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 1999, WriteVLOXSEG8e16_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 2000, WriteVLOXSEG8e32_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 2001, WriteVLOXSEG8e64_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 2002, WriteVLOXSEG8e8_UpperBound_ReadVLDX_UpperBound_ReadVLDOXV_UpperBound_ReadVMask = 2003, WriteVLDS16_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2004, WriteVLDS32_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2005, WriteVLDS8_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2006, WriteVLSEGFF2e16_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2007, WriteVLSEG2e16_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2008, WriteVLSEGFF2e32_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2009, WriteVLSEG2e32_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2010, WriteVLSEGFF2e64_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2011, WriteVLSEG2e64_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2012, WriteVLSEGFF2e8_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2013, WriteVLSEG2e8_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2014, WriteVLSEGFF3e16_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2015, WriteVLSEG3e16_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2016, WriteVLSEGFF3e32_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2017, WriteVLSEG3e32_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2018, WriteVLSEGFF3e64_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2019, WriteVLSEG3e64_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2020, WriteVLSEGFF3e8_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2021, WriteVLSEG3e8_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2022, WriteVLSEGFF4e16_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2023, WriteVLSEG4e16_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2024, WriteVLSEGFF4e32_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2025, WriteVLSEG4e32_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2026, WriteVLSEGFF4e64_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2027, WriteVLSEG4e64_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2028, WriteVLSEGFF4e8_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2029, WriteVLSEG4e8_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2030, WriteVLSEGFF5e16_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2031, WriteVLSEG5e16_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2032, WriteVLSEGFF5e32_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2033, WriteVLSEG5e32_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2034, WriteVLSEGFF5e64_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2035, WriteVLSEG5e64_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2036, WriteVLSEGFF5e8_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2037, WriteVLSEG5e8_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2038, WriteVLSEGFF6e16_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2039, WriteVLSEG6e16_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2040, WriteVLSEGFF6e32_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2041, WriteVLSEG6e32_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2042, WriteVLSEGFF6e64_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2043, WriteVLSEG6e64_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2044, WriteVLSEGFF6e8_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2045, WriteVLSEG6e8_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2046, WriteVLSEGFF7e16_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2047, WriteVLSEG7e16_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2048, WriteVLSEGFF7e32_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2049, WriteVLSEG7e32_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2050, WriteVLSEGFF7e64_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2051, WriteVLSEG7e64_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2052, WriteVLSEGFF7e8_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2053, WriteVLSEG7e8_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2054, WriteVLSEGFF8e16_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2055, WriteVLSEG8e16_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2056, WriteVLSEGFF8e32_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2057, WriteVLSEG8e32_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2058, WriteVLSEGFF8e64_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2059, WriteVLSEG8e64_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2060, WriteVLSEGFF8e8_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2061, WriteVLSEG8e8_UpperBound_ReadVLDX_UpperBound_ReadVMask = 2062, WriteVLSSEG2e16_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2063, WriteVLSSEG2e32_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2064, WriteVLSSEG2e64_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2065, WriteVLSSEG2e8_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2066, WriteVLSSEG3e16_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2067, WriteVLSSEG3e32_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2068, WriteVLSSEG3e64_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2069, WriteVLSSEG3e8_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2070, WriteVLSSEG4e16_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2071, WriteVLSSEG4e32_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2072, WriteVLSSEG4e64_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2073, WriteVLSSEG4e8_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2074, WriteVLSSEG5e16_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2075, WriteVLSSEG5e32_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2076, WriteVLSSEG5e64_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2077, WriteVLSSEG5e8_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2078, WriteVLSSEG6e16_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2079, WriteVLSSEG6e32_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2080, WriteVLSSEG6e64_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2081, WriteVLSSEG6e8_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2082, WriteVLSSEG7e16_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2083, WriteVLSSEG7e32_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2084, WriteVLSSEG7e64_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2085, WriteVLSSEG7e8_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2086, WriteVLSSEG8e16_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2087, WriteVLSSEG8e32_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2088, WriteVLSSEG8e64_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2089, WriteVLSSEG8e8_UpperBound_ReadVLDX_UpperBound_ReadVLDSX_UpperBound_ReadVMask = 2090, WriteVLDUX16_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2091, WriteVLDUX32_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2092, WriteVLDUX64_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2093, WriteVLDUX8_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2094, WriteVLUXSEG2e16_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2095, WriteVLUXSEG2e32_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2096, WriteVLUXSEG2e64_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2097, WriteVLUXSEG2e8_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2098, WriteVLUXSEG3e16_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2099, WriteVLUXSEG3e32_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2100, WriteVLUXSEG3e64_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2101, WriteVLUXSEG3e8_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2102, WriteVLUXSEG4e16_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2103, WriteVLUXSEG4e32_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2104, WriteVLUXSEG4e64_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2105, WriteVLUXSEG4e8_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2106, WriteVLUXSEG5e16_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2107, WriteVLUXSEG5e32_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2108, WriteVLUXSEG5e64_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2109, WriteVLUXSEG5e8_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2110, WriteVLUXSEG6e16_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2111, WriteVLUXSEG6e32_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2112, WriteVLUXSEG6e64_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2113, WriteVLUXSEG6e8_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2114, WriteVLUXSEG7e16_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2115, WriteVLUXSEG7e32_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2116, WriteVLUXSEG7e64_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2117, WriteVLUXSEG7e8_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2118, WriteVLUXSEG8e16_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2119, WriteVLUXSEG8e32_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2120, WriteVLUXSEG8e64_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2121, WriteVLUXSEG8e8_UpperBound_ReadVLDX_UpperBound_ReadVLDUXV_UpperBound_ReadVMask = 2122, WriteVIMulAddV_UpperBound_ReadVIMulAddV_UpperBound_ReadVIMulAddV_UpperBound_ReadVMask = 2123, WriteVIMulAddX_UpperBound_ReadVIMulAddV_UpperBound_ReadVIMulAddX_UpperBound_ReadVMask = 2124, WriteVICALUI_UpperBound_ReadVICALUV_UpperBound = 2125, WriteVICALUV_UpperBound_ReadVICALUV_UpperBound_ReadVICALUV_UpperBound = 2126, WriteVICALUX_UpperBound_ReadVICALUV_UpperBound_ReadVICALUX_UpperBound = 2127, WriteVMALUV_UpperBound_ReadVMALUV_UpperBound_ReadVMALUV_UpperBound = 2128, WriteVICmpV_UpperBound_ReadVICmpV_UpperBound_ReadVICmpV_UpperBound_ReadVMask = 2129, WriteVICmpX_UpperBound_ReadVICmpV_UpperBound_ReadVICmpX_UpperBound_ReadVMask = 2130, WriteVIMergeI_UpperBound_ReadVIMergeV_UpperBound_ReadVMask = 2131, WriteVIMergeV_UpperBound_ReadVIMergeV_UpperBound_ReadVIMergeV_UpperBound_ReadVMask = 2132, WriteVIMergeX_UpperBound_ReadVIMergeV_UpperBound_ReadVIMergeX_UpperBound_ReadVMask = 2133, WriteVMSFSV_UpperBound_ReadVMSFSV_UpperBound_ReadVMask = 2134, WriteVICmpI_UpperBound_ReadVICmpV_UpperBound_ReadVMask = 2135, WriteVICmpV_UpperBound_ReadVICmpV_UpperBound_ReadVICmpX_UpperBound_ReadVMask = 2136, WriteVIMulV_UpperBound_ReadVIMulV_UpperBound_ReadVIMulV_UpperBound_ReadVMask = 2137, WriteVIMulX_UpperBound_ReadVIMulV_UpperBound_ReadVIMulX_UpperBound_ReadVMask = 2138, WriteVMov1V_ReadVMov1V = 2139, WriteVMov2V_ReadVMov2V = 2140, WriteVMov4V_ReadVMov4V = 2141, WriteVMov8V_ReadVMov8V = 2142, WriteVIMovXV_UpperBound_ReadVIMovXV_UpperBound_ReadVIMovXX_UpperBound = 2143, WriteVIMovI_UpperBound = 2144, WriteVIMovV_UpperBound_ReadVIMovV_UpperBound = 2145, WriteVIMovX_UpperBound_ReadVIMovX_UpperBound = 2146, WriteVIMovVX_UpperBound_ReadVIMovVX_UpperBound = 2147, WriteVNClipI_UpperBound_ReadVNClipV_UpperBound_ReadVMask = 2148, WriteVNClipV_UpperBound_ReadVNClipV_UpperBound_ReadVNClipV_UpperBound_ReadVMask = 2149, WriteVNClipX_UpperBound_ReadVNClipV_UpperBound_ReadVNClipX_UpperBound_ReadVMask = 2150, WriteVNShiftI_UpperBound_ReadVNShiftV_UpperBound_ReadVMask = 2151, WriteVNShiftV_UpperBound_ReadVNShiftV_UpperBound_ReadVNShiftV_UpperBound_ReadVMask = 2152, WriteVNShiftX_UpperBound_ReadVNShiftV_UpperBound_ReadVNShiftX_UpperBound_ReadVMask = 2153, WriteVIRedV_ReadVIRedV_ReadVIRedV0_ReadVMask = 2154, WriteVGatherV_UpperBound_ReadVGatherV_UpperBound_ReadVGatherV_UpperBound = 2155, WriteVGatherI_UpperBound_ReadVGatherV_UpperBound_ReadVMask = 2156, WriteVGatherV_UpperBound_ReadVGatherV_UpperBound_ReadVGatherV_UpperBound_ReadVMask = 2157, WriteVGatherX_UpperBound_ReadVGatherV_UpperBound_ReadVGatherX_UpperBound_ReadVMask = 2158, WriteVIALUV_UpperBound_ReadVIALUV_UpperBound_ReadVIALUX_UpperBound_ReadVMask = 2159, WriteVST1R_ReadVST1R_ReadVSTX_UpperBound = 2160, WriteVST2R_ReadVST2R_ReadVSTX_UpperBound = 2161, WriteVST4R_ReadVST4R_ReadVSTX_UpperBound = 2162, WriteVST8R_ReadVST8R_ReadVSTX_UpperBound = 2163, WriteVSALUI_UpperBound_ReadVSALUV_UpperBound_ReadVMask = 2164, WriteVSALUV_UpperBound_ReadVSALUV_UpperBound_ReadVSALUV_UpperBound_ReadVMask = 2165, WriteVSALUX_UpperBound_ReadVSALUV_UpperBound_ReadVSALUX_UpperBound_ReadVMask = 2166, WriteVSTE_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2167, WriteVSETVL_ReadVSETVL_ReadVSETVL = 2168, WriteVExtV_UpperBound_ReadVExtV_UpperBound_ReadVMask = 2169, WriteVISlide1X_UpperBound_ReadVISlideV_UpperBound_ReadVISlideX_UpperBound_ReadVMask = 2170, WriteVISlideI_UpperBound_ReadVISlideV_UpperBound_ReadVMask = 2171, WriteVISlideX_UpperBound_ReadVISlideV_UpperBound_ReadVISlideX_UpperBound_ReadVMask = 2172, WriteVShiftI_UpperBound_ReadVShiftV_UpperBound_ReadVMask = 2173, WriteVShiftV_UpperBound_ReadVShiftV_UpperBound_ReadVShiftV_UpperBound_ReadVMask = 2174, WriteVShiftX_UpperBound_ReadVShiftV_UpperBound_ReadVShiftX_UpperBound_ReadVMask = 2175, WriteVSMulV_UpperBound_ReadVSMulV_UpperBound_ReadVSMulV_UpperBound_ReadVMask = 2176, WriteVSMulX_UpperBound_ReadVSMulV_UpperBound_ReadVSMulX_UpperBound_ReadVMask = 2177, WriteVSTM_UpperBound_ReadVSTM_UpperBound_ReadVSTX_UpperBound = 2178, WriteVSTOX16_UpperBound_ReadVSTOX16_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2179, WriteVSTOX32_UpperBound_ReadVSTOX32_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2180, WriteVSTOX64_UpperBound_ReadVSTOX64_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2181, WriteVSTOX8_UpperBound_ReadVSTOX8_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2182, WriteVSOXSEG2e16_UpperBound_ReadVSTOX16_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2183, WriteVSOXSEG2e32_UpperBound_ReadVSTOX32_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2184, WriteVSOXSEG2e64_UpperBound_ReadVSTOX64_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2185, WriteVSOXSEG2e8_UpperBound_ReadVSTOX8_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2186, WriteVSOXSEG3e16_UpperBound_ReadVSTOX16_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2187, WriteVSOXSEG3e32_UpperBound_ReadVSTOX32_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2188, WriteVSOXSEG3e64_UpperBound_ReadVSTOX64_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2189, WriteVSOXSEG3e8_UpperBound_ReadVSTOX8_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2190, WriteVSOXSEG4e16_UpperBound_ReadVSTOX16_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2191, WriteVSOXSEG4e32_UpperBound_ReadVSTOX32_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2192, WriteVSOXSEG4e64_UpperBound_ReadVSTOX64_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2193, WriteVSOXSEG4e8_UpperBound_ReadVSTOX8_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2194, WriteVSOXSEG5e16_UpperBound_ReadVSTOX16_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2195, WriteVSOXSEG5e32_UpperBound_ReadVSTOX32_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2196, WriteVSOXSEG5e64_UpperBound_ReadVSTOX64_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2197, WriteVSOXSEG5e8_UpperBound_ReadVSTOX8_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2198, WriteVSOXSEG6e16_UpperBound_ReadVSTOX16_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2199, WriteVSOXSEG6e32_UpperBound_ReadVSTOX32_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2200, WriteVSOXSEG6e64_UpperBound_ReadVSTOX64_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2201, WriteVSOXSEG6e8_UpperBound_ReadVSTOX8_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2202, WriteVSOXSEG7e16_UpperBound_ReadVSTOX16_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2203, WriteVSOXSEG7e32_UpperBound_ReadVSTOX32_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2204, WriteVSOXSEG7e64_UpperBound_ReadVSTOX64_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2205, WriteVSOXSEG7e8_UpperBound_ReadVSTOX8_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2206, WriteVSOXSEG8e16_UpperBound_ReadVSTOX16_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2207, WriteVSOXSEG8e32_UpperBound_ReadVSTOX32_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2208, WriteVSOXSEG8e64_UpperBound_ReadVSTOX64_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2209, WriteVSOXSEG8e8_UpperBound_ReadVSTOX8_UpperBound_ReadVSTX_UpperBound_ReadVSTOXV_UpperBound_ReadVMask = 2210, WriteVSTS16_UpperBound_ReadVSTS16V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2211, WriteVSTS32_UpperBound_ReadVSTS32V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2212, WriteVSTS64_UpperBound_ReadVSTS64V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2213, WriteVSTS8_UpperBound_ReadVSTS8V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2214, WriteVSSEG2e16_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2215, WriteVSSEG2e32_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2216, WriteVSSEG2e64_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2217, WriteVSSEG2e8_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2218, WriteVSSEG3e16_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2219, WriteVSSEG3e32_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2220, WriteVSSEG3e64_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2221, WriteVSSEG3e8_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2222, WriteVSSEG4e16_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2223, WriteVSSEG4e32_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2224, WriteVSSEG4e64_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2225, WriteVSSEG4e8_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2226, WriteVSSEG5e16_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2227, WriteVSSEG5e32_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2228, WriteVSSEG5e64_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2229, WriteVSSEG5e8_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2230, WriteVSSEG6e16_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2231, WriteVSSEG6e32_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2232, WriteVSSEG6e64_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2233, WriteVSSEG6e8_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2234, WriteVSSEG7e16_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2235, WriteVSSEG7e32_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2236, WriteVSSEG7e64_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2237, WriteVSSEG7e8_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2238, WriteVSSEG8e16_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2239, WriteVSSEG8e32_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2240, WriteVSSEG8e64_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2241, WriteVSSEG8e8_UpperBound_ReadVSTEV_UpperBound_ReadVSTX_UpperBound_ReadVMask = 2242, WriteVSShiftI_UpperBound_ReadVSShiftV_UpperBound_ReadVMask = 2243, WriteVSShiftV_UpperBound_ReadVSShiftV_UpperBound_ReadVSShiftV_UpperBound_ReadVMask = 2244, WriteVSShiftX_UpperBound_ReadVSShiftV_UpperBound_ReadVSShiftX_UpperBound_ReadVMask = 2245, WriteVSSSEG2e16_UpperBound_ReadVSTS16V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2246, WriteVSSSEG2e32_UpperBound_ReadVSTS32V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2247, WriteVSSSEG2e64_UpperBound_ReadVSTS64V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2248, WriteVSSSEG2e8_UpperBound_ReadVSTS8V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2249, WriteVSSSEG3e16_UpperBound_ReadVSTS16V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2250, WriteVSSSEG3e32_UpperBound_ReadVSTS32V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2251, WriteVSSSEG3e64_UpperBound_ReadVSTS64V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2252, WriteVSSSEG3e8_UpperBound_ReadVSTS8V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2253, WriteVSSSEG4e16_UpperBound_ReadVSTS16V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2254, WriteVSSSEG4e32_UpperBound_ReadVSTS32V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2255, WriteVSSSEG4e64_UpperBound_ReadVSTS64V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2256, WriteVSSSEG4e8_UpperBound_ReadVSTS8V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2257, WriteVSSSEG5e16_UpperBound_ReadVSTS16V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2258, WriteVSSSEG5e32_UpperBound_ReadVSTS32V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2259, WriteVSSSEG5e64_UpperBound_ReadVSTS64V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2260, WriteVSSSEG5e8_UpperBound_ReadVSTS8V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2261, WriteVSSSEG6e16_UpperBound_ReadVSTS16V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2262, WriteVSSSEG6e32_UpperBound_ReadVSTS32V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2263, WriteVSSSEG6e64_UpperBound_ReadVSTS64V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2264, WriteVSSSEG6e8_UpperBound_ReadVSTS8V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2265, WriteVSSSEG7e16_UpperBound_ReadVSTS16V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2266, WriteVSSSEG7e32_UpperBound_ReadVSTS32V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2267, WriteVSSSEG7e64_UpperBound_ReadVSTS64V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2268, WriteVSSSEG7e8_UpperBound_ReadVSTS8V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2269, WriteVSSSEG8e16_UpperBound_ReadVSTS16V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2270, WriteVSSSEG8e32_UpperBound_ReadVSTS32V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2271, WriteVSSSEG8e64_UpperBound_ReadVSTS64V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2272, WriteVSSSEG8e8_UpperBound_ReadVSTS8V_UpperBound_ReadVSTX_UpperBound_ReadVSTSX_UpperBound_ReadVMask = 2273, WriteVSTUX16_UpperBound_ReadVSTUX16_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2274, WriteVSTUX32_UpperBound_ReadVSTUX32_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2275, WriteVSTUX64_UpperBound_ReadVSTUX64_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2276, WriteVSTUX8_UpperBound_ReadVSTUX8_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2277, WriteVSUXSEG2e16_UpperBound_ReadVSTUX16_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2278, WriteVSUXSEG2e32_UpperBound_ReadVSTUX32_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2279, WriteVSUXSEG2e64_UpperBound_ReadVSTUX64_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2280, WriteVSUXSEG2e8_UpperBound_ReadVSTUX8_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2281, WriteVSUXSEG3e16_UpperBound_ReadVSTUX16_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2282, WriteVSUXSEG3e32_UpperBound_ReadVSTUX32_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2283, WriteVSUXSEG3e64_UpperBound_ReadVSTUX64_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2284, WriteVSUXSEG3e8_UpperBound_ReadVSTUX8_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2285, WriteVSUXSEG4e16_UpperBound_ReadVSTUX16_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2286, WriteVSUXSEG4e32_UpperBound_ReadVSTUX32_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2287, WriteVSUXSEG4e64_UpperBound_ReadVSTUX64_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2288, WriteVSUXSEG4e8_UpperBound_ReadVSTUX8_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2289, WriteVSUXSEG5e16_UpperBound_ReadVSTUX16_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2290, WriteVSUXSEG5e32_UpperBound_ReadVSTUX32_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2291, WriteVSUXSEG5e64_UpperBound_ReadVSTUX64_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2292, WriteVSUXSEG5e8_UpperBound_ReadVSTUX8_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2293, WriteVSUXSEG6e16_UpperBound_ReadVSTUX16_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2294, WriteVSUXSEG6e32_UpperBound_ReadVSTUX32_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2295, WriteVSUXSEG6e64_UpperBound_ReadVSTUX64_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2296, WriteVSUXSEG6e8_UpperBound_ReadVSTUX8_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2297, WriteVSUXSEG7e16_UpperBound_ReadVSTUX16_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2298, WriteVSUXSEG7e32_UpperBound_ReadVSTUX32_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2299, WriteVSUXSEG7e64_UpperBound_ReadVSTUX64_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2300, WriteVSUXSEG7e8_UpperBound_ReadVSTUX8_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2301, WriteVSUXSEG8e16_UpperBound_ReadVSTUX16_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2302, WriteVSUXSEG8e32_UpperBound_ReadVSTUX32_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2303, WriteVSUXSEG8e64_UpperBound_ReadVSTUX64_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2304, WriteVSUXSEG8e8_UpperBound_ReadVSTUX8_UpperBound_ReadVSTX_UpperBound_ReadVSTUXV_UpperBound_ReadVMask = 2305, WriteVIWALUV_UpperBound_ReadVIWALUV_UpperBound_ReadVIWALUV_UpperBound_ReadVMask = 2306, WriteVIWALUX_UpperBound_ReadVIWALUV_UpperBound_ReadVIWALUX_UpperBound_ReadVMask = 2307, WriteVIWMulAddV_UpperBound_ReadVIWMulAddV_UpperBound_ReadVIWMulAddV_UpperBound_ReadVMask = 2308, WriteVIWMulAddX_UpperBound_ReadVIWMulAddV_UpperBound_ReadVIWMulAddX_UpperBound_ReadVMask = 2309, WriteVIWMulV_UpperBound_ReadVIWMulV_UpperBound_ReadVIWMulV_UpperBound_ReadVMask = 2310, WriteVIWMulX_UpperBound_ReadVIWMulV_UpperBound_ReadVIWMulX_UpperBound_ReadVMask = 2311, WriteVIWRedV_ReadVIWRedV_ReadVIWRedV0_ReadVMask = 2312, WriteXPERM_ReadXPERM_ReadXPERM = 2313, COPY = 2314, SCHED_LIST_END = 2315 }; } // end namespace Sched } // end namespace RISCV } // end namespace llvm #endif // GET_INSTRINFO_SCHED_ENUM #ifdef GET_INSTRINFO_MC_DESC #undef GET_INSTRINFO_MC_DESC namespace llvm { static const MCPhysReg ImplicitList1[] = { RISCV::X2, RISCV::X2 }; static const MCPhysReg ImplicitList2[] = { RISCV::X5, RISCV::X1, RISCV::X6, RISCV::X7, RISCV::X28, RISCV::X29, RISCV::X30, RISCV::X31 }; static const MCPhysReg ImplicitList3[] = { RISCV::X1 }; static const MCPhysReg ImplicitList4[] = { RISCV::VL }; static const MCPhysReg ImplicitList5[] = { RISCV::X2 }; static const MCPhysReg ImplicitList6[] = { RISCV::VXRM }; static const MCPhysReg ImplicitList7[] = { RISCV::FRM }; static const MCPhysReg ImplicitList8[] = { RISCV::VXRM, RISCV::VXSAT }; static const MCPhysReg ImplicitList9[] = { RISCV::VXSAT }; static const MCPhysReg ImplicitList10[] = { RISCV::VL, RISCV::VTYPE }; static const MCPhysReg ImplicitList11[] = { RISCV::FFLAGS }; static const MCPhysReg ImplicitList12[] = { RISCV::FRM, RISCV::FRM }; static const MCPhysReg ImplicitList13[] = { RISCV::VTYPE, RISCV::VL }; static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, MCOI_TIED_TO(0) }, }; static const MCOperandInfo OperandInfo10[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo11[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo12[] = { { 0, 0|(1<InitMCInstrInfo(RISCVInsts, RISCVInstrNameIndices, RISCVInstrNameData, nullptr, nullptr, 13155); } } // end namespace llvm #endif // GET_INSTRINFO_MC_DESC #ifdef GET_INSTRINFO_HEADER #undef GET_INSTRINFO_HEADER namespace llvm { struct RISCVGenInstrInfo : public TargetInstrInfo { explicit RISCVGenInstrInfo(unsigned CFSetupOpcode = ~0u, unsigned CFDestroyOpcode = ~0u, unsigned CatchRetOpcode = ~0u, unsigned ReturnOpcode = ~0u); ~RISCVGenInstrInfo() override = default; }; } // end namespace llvm #endif // GET_INSTRINFO_HEADER #ifdef GET_INSTRINFO_HELPER_DECLS #undef GET_INSTRINFO_HELPER_DECLS #endif // GET_INSTRINFO_HELPER_DECLS #ifdef GET_INSTRINFO_HELPERS #undef GET_INSTRINFO_HELPERS #endif // GET_INSTRINFO_HELPERS #ifdef GET_INSTRINFO_CTOR_DTOR #undef GET_INSTRINFO_CTOR_DTOR namespace llvm { extern const MCInstrDesc RISCVInsts[]; extern const unsigned RISCVInstrNameIndices[]; extern const char RISCVInstrNameData[]; RISCVGenInstrInfo::RISCVGenInstrInfo(unsigned CFSetupOpcode, unsigned CFDestroyOpcode, unsigned CatchRetOpcode, unsigned ReturnOpcode) : TargetInstrInfo(CFSetupOpcode, CFDestroyOpcode, CatchRetOpcode, ReturnOpcode) { InitMCInstrInfo(RISCVInsts, RISCVInstrNameIndices, RISCVInstrNameData, nullptr, nullptr, 13155); } } // end namespace llvm #endif // GET_INSTRINFO_CTOR_DTOR #ifdef GET_INSTRINFO_OPERAND_ENUM #undef GET_INSTRINFO_OPERAND_ENUM namespace llvm { namespace RISCV { namespace OpName { enum { frm = 3, rd = 0, rs1 = 1, rs2 = 2, rs3 = 4, OPERAND_LAST }; } // end namespace OpName } // end namespace RISCV } // end namespace llvm #endif //GET_INSTRINFO_OPERAND_ENUM #ifdef GET_INSTRINFO_NAMED_OPS #undef GET_INSTRINFO_NAMED_OPS namespace llvm { namespace RISCV { LLVM_READONLY int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) { static const int16_t OperandMap [][5] = { {0, 1, 2, 3, -1, }, {0, 1, 2, 4, 3, }, {0, 1, -1, 2, -1, }, }; switch(Opcode) { case RISCV::FADD_D: case RISCV::FADD_D_IN32X: case RISCV::FADD_D_INX: case RISCV::FADD_H: case RISCV::FADD_H_INX: case RISCV::FADD_S: case RISCV::FADD_S_INX: case RISCV::FDIV_D: case RISCV::FDIV_D_IN32X: case RISCV::FDIV_D_INX: case RISCV::FDIV_H: case RISCV::FDIV_H_INX: case RISCV::FDIV_S: case RISCV::FDIV_S_INX: case RISCV::FMUL_D: case RISCV::FMUL_D_IN32X: case RISCV::FMUL_D_INX: case RISCV::FMUL_H: case RISCV::FMUL_H_INX: case RISCV::FMUL_S: case RISCV::FMUL_S_INX: case RISCV::FSUB_D: case RISCV::FSUB_D_IN32X: case RISCV::FSUB_D_INX: case RISCV::FSUB_H: case RISCV::FSUB_H_INX: case RISCV::FSUB_S: case RISCV::FSUB_S_INX: return OperandMap[0][NamedIdx]; case RISCV::FMADD_D: case RISCV::FMADD_D_IN32X: case RISCV::FMADD_D_INX: case RISCV::FMADD_H: case RISCV::FMADD_H_INX: case RISCV::FMADD_S: case RISCV::FMADD_S_INX: case RISCV::FMSUB_D: case RISCV::FMSUB_D_IN32X: case RISCV::FMSUB_D_INX: case RISCV::FMSUB_H: case RISCV::FMSUB_H_INX: case RISCV::FMSUB_S: case RISCV::FMSUB_S_INX: case RISCV::FNMADD_D: case RISCV::FNMADD_D_IN32X: case RISCV::FNMADD_D_INX: case RISCV::FNMADD_H: case RISCV::FNMADD_H_INX: case RISCV::FNMADD_S: case RISCV::FNMADD_S_INX: case RISCV::FNMSUB_D: case RISCV::FNMSUB_D_IN32X: case RISCV::FNMSUB_D_INX: case RISCV::FNMSUB_H: case RISCV::FNMSUB_H_INX: case RISCV::FNMSUB_S: case RISCV::FNMSUB_S_INX: return OperandMap[1][NamedIdx]; case RISCV::FCVT_D_L: case RISCV::FCVT_D_LU: case RISCV::FCVT_D_LU_INX: case RISCV::FCVT_D_L_INX: case RISCV::FCVT_H_D: case RISCV::FCVT_H_D_INX: case RISCV::FCVT_H_L: case RISCV::FCVT_H_LU: case RISCV::FCVT_H_LU_INX: case RISCV::FCVT_H_L_INX: case RISCV::FCVT_H_S: case RISCV::FCVT_H_S_INX: case RISCV::FCVT_H_W: case RISCV::FCVT_H_WU: case RISCV::FCVT_H_WU_INX: case RISCV::FCVT_H_W_INX: case RISCV::FCVT_LU_D: case RISCV::FCVT_LU_D_INX: case RISCV::FCVT_LU_H: case RISCV::FCVT_LU_H_INX: case RISCV::FCVT_LU_S: case RISCV::FCVT_LU_S_INX: case RISCV::FCVT_L_D: case RISCV::FCVT_L_D_INX: case RISCV::FCVT_L_H: case RISCV::FCVT_L_H_INX: case RISCV::FCVT_L_S: case RISCV::FCVT_L_S_INX: case RISCV::FCVT_S_D: case RISCV::FCVT_S_D_IN32X: case RISCV::FCVT_S_D_INX: case RISCV::FCVT_S_L: case RISCV::FCVT_S_LU: case RISCV::FCVT_S_LU_INX: case RISCV::FCVT_S_L_INX: case RISCV::FCVT_S_W: case RISCV::FCVT_S_WU: case RISCV::FCVT_S_WU_INX: case RISCV::FCVT_S_W_INX: case RISCV::FCVT_WU_D: case RISCV::FCVT_WU_D_IN32X: case RISCV::FCVT_WU_D_INX: case RISCV::FCVT_WU_H: case RISCV::FCVT_WU_H_INX: case RISCV::FCVT_WU_S: case RISCV::FCVT_WU_S_INX: case RISCV::FCVT_W_D: case RISCV::FCVT_W_D_IN32X: case RISCV::FCVT_W_D_INX: case RISCV::FCVT_W_H: case RISCV::FCVT_W_H_INX: case RISCV::FCVT_W_S: case RISCV::FCVT_W_S_INX: case RISCV::FSQRT_D: case RISCV::FSQRT_D_IN32X: case RISCV::FSQRT_D_INX: case RISCV::FSQRT_H: case RISCV::FSQRT_H_INX: case RISCV::FSQRT_S: case RISCV::FSQRT_S_INX: return OperandMap[2][NamedIdx]; default: return -1; } } } // end namespace RISCV } // end namespace llvm #endif //GET_INSTRINFO_NAMED_OPS #ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM #undef GET_INSTRINFO_OPERAND_TYPES_ENUM namespace llvm { namespace RISCV { namespace OpTypes { enum OperandType { VTypeIOp10 = 0, VTypeIOp11 = 1, bare_symbol = 2, byteselect = 3, c_lui_imm = 4, call_symbol = 5, csr_sysreg = 6, f32imm = 7, f64imm = 8, fencearg = 9, frmarg = 10, i16imm = 11, i1imm = 12, i32imm = 13, i64imm = 14, i8imm = 15, immzero = 16, ixlenimm = 17, ixlenimm_li = 18, pseudo_jump_symbol = 19, ptype0 = 20, ptype1 = 21, ptype2 = 22, ptype3 = 23, ptype4 = 24, ptype5 = 25, rnum = 26, shfl_uimm = 27, simm10_lsb0000nonzero = 28, simm12 = 29, simm12_lsb0 = 30, simm12_lsb00000 = 31, simm13_lsb0 = 32, simm21_lsb0_jal = 33, simm5 = 34, simm5_plus1 = 35, simm6 = 36, simm6nonzero = 37, simm9_lsb0 = 38, tprel_add_symbol = 39, type0 = 40, type1 = 41, type2 = 42, type3 = 43, type4 = 44, type5 = 45, uimm10_lsb00nonzero = 46, uimm2 = 47, uimm20_auipc = 48, uimm20_lui = 49, uimm3 = 50, uimm5 = 51, uimm7 = 52, uimm7_lsb00 = 53, uimm7_opcode = 54, uimm8_lsb00 = 55, uimm8_lsb000 = 56, uimm9_lsb000 = 57, uimmlog2xlen = 58, uimmlog2xlennonzero = 59, untyped_imm_0 = 60, AVL = 61, FPR16INX = 62, FPR32INX = 63, FPR64IN32X = 64, FPR64INX = 65, GPRCMem = 66, GPRMem = 67, GPRMemZeroOffset = 68, SPMem = 69, VMaskOp = 70, AnyReg = 71, FPR16 = 72, FPR32 = 73, FPR32C = 74, FPR64 = 75, FPR64C = 76, GPR = 77, GPRC = 78, GPRF16 = 79, GPRF32 = 80, GPRF64 = 81, GPRJALR = 82, GPRNoX0 = 83, GPRNoX0X2 = 84, GPRPF64 = 85, GPRTC = 86, GPRX0 = 87, SP = 88, VCSR = 89, VM = 90, VMV0 = 91, VR = 92, VRM2 = 93, VRM2NoV0 = 94, VRM4 = 95, VRM4NoV0 = 96, VRM8 = 97, VRM8NoV0 = 98, VRN2M1 = 99, VRN2M1NoV0 = 100, VRN2M2 = 101, VRN2M2NoV0 = 102, VRN2M4 = 103, VRN2M4NoV0 = 104, VRN3M1 = 105, VRN3M1NoV0 = 106, VRN3M2 = 107, VRN3M2NoV0 = 108, VRN4M1 = 109, VRN4M1NoV0 = 110, VRN4M2 = 111, VRN4M2NoV0 = 112, VRN5M1 = 113, VRN5M1NoV0 = 114, VRN6M1 = 115, VRN6M1NoV0 = 116, VRN7M1 = 117, VRN7M1NoV0 = 118, VRN8M1 = 119, VRN8M1NoV0 = 120, VRNoV0 = 121, OPERAND_TYPE_LIST_END }; } // end namespace OpTypes } // end namespace RISCV } // end namespace llvm #endif // GET_INSTRINFO_OPERAND_TYPES_ENUM #ifdef GET_INSTRINFO_OPERAND_TYPE #undef GET_INSTRINFO_OPERAND_TYPE namespace llvm { namespace RISCV { LLVM_READONLY static int getOperandType(uint16_t Opcode, uint16_t OpIdx) { const uint32_t Offsets[] = { /* PHI */ 0, /* INLINEASM */ 1, /* INLINEASM_BR */ 1, /* CFI_INSTRUCTION */ 1, /* EH_LABEL */ 2, /* GC_LABEL */ 3, /* ANNOTATION_LABEL */ 4, /* KILL */ 5, /* EXTRACT_SUBREG */ 5, /* INSERT_SUBREG */ 8, /* IMPLICIT_DEF */ 12, /* SUBREG_TO_REG */ 13, /* COPY_TO_REGCLASS */ 17, /* DBG_VALUE */ 20, /* DBG_VALUE_LIST */ 20, /* DBG_INSTR_REF */ 20, /* DBG_PHI */ 20, /* DBG_LABEL */ 20, /* REG_SEQUENCE */ 21, /* COPY */ 23, /* BUNDLE */ 25, /* LIFETIME_START */ 25, /* LIFETIME_END */ 26, /* PSEUDO_PROBE */ 27, /* ARITH_FENCE */ 31, /* STACKMAP */ 33, /* FENTRY_CALL */ 35, /* PATCHPOINT */ 35, /* LOAD_STACK_GUARD */ 41, /* PREALLOCATED_SETUP */ 42, /* PREALLOCATED_ARG */ 43, /* STATEPOINT */ 46, /* LOCAL_ESCAPE */ 46, /* FAULTING_OP */ 48, /* PATCHABLE_OP */ 49, /* PATCHABLE_FUNCTION_ENTER */ 49, /* PATCHABLE_RET */ 49, /* PATCHABLE_FUNCTION_EXIT */ 49, /* PATCHABLE_TAIL_CALL */ 49, /* PATCHABLE_EVENT_CALL */ 49, /* PATCHABLE_TYPED_EVENT_CALL */ 51, /* ICALL_BRANCH_FUNNEL */ 54, /* MEMBARRIER */ 54, /* G_ASSERT_SEXT */ 54, /* G_ASSERT_ZEXT */ 57, /* G_ASSERT_ALIGN */ 60, /* G_ADD */ 63, /* G_SUB */ 66, /* G_MUL */ 69, /* G_SDIV */ 72, /* G_UDIV */ 75, /* G_SREM */ 78, /* G_UREM */ 81, /* G_SDIVREM */ 84, /* G_UDIVREM */ 88, /* G_AND */ 92, /* G_OR */ 95, /* G_XOR */ 98, /* G_IMPLICIT_DEF */ 101, /* G_PHI */ 102, /* G_FRAME_INDEX */ 103, /* G_GLOBAL_VALUE */ 105, /* G_EXTRACT */ 107, /* G_UNMERGE_VALUES */ 110, /* G_INSERT */ 112, /* G_MERGE_VALUES */ 116, /* G_BUILD_VECTOR */ 118, /* G_BUILD_VECTOR_TRUNC */ 120, /* G_CONCAT_VECTORS */ 122, /* G_PTRTOINT */ 124, /* G_INTTOPTR */ 126, /* G_BITCAST */ 128, /* G_FREEZE */ 130, /* G_INTRINSIC_FPTRUNC_ROUND */ 132, /* G_INTRINSIC_TRUNC */ 135, /* G_INTRINSIC_ROUND */ 137, /* G_INTRINSIC_LRINT */ 139, /* G_INTRINSIC_ROUNDEVEN */ 141, /* G_READCYCLECOUNTER */ 143, /* G_LOAD */ 144, /* G_SEXTLOAD */ 146, /* G_ZEXTLOAD */ 148, /* G_INDEXED_LOAD */ 150, /* G_INDEXED_SEXTLOAD */ 155, /* G_INDEXED_ZEXTLOAD */ 160, /* G_STORE */ 165, /* G_INDEXED_STORE */ 167, /* G_ATOMIC_CMPXCHG_WITH_SUCCESS */ 172, /* G_ATOMIC_CMPXCHG */ 177, /* G_ATOMICRMW_XCHG */ 181, /* G_ATOMICRMW_ADD */ 184, /* G_ATOMICRMW_SUB */ 187, /* G_ATOMICRMW_AND */ 190, /* G_ATOMICRMW_NAND */ 193, /* G_ATOMICRMW_OR */ 196, /* G_ATOMICRMW_XOR */ 199, /* G_ATOMICRMW_MAX */ 202, /* G_ATOMICRMW_MIN */ 205, /* G_ATOMICRMW_UMAX */ 208, /* G_ATOMICRMW_UMIN */ 211, /* G_ATOMICRMW_FADD */ 214, /* G_ATOMICRMW_FSUB */ 217, /* G_ATOMICRMW_FMAX */ 220, /* G_ATOMICRMW_FMIN */ 223, /* G_ATOMICRMW_UINC_WRAP */ 226, /* G_ATOMICRMW_UDEC_WRAP */ 229, /* G_FENCE */ 232, /* G_BRCOND */ 234, /* G_BRINDIRECT */ 236, /* G_INVOKE_REGION_START */ 237, /* G_INTRINSIC */ 237, /* G_INTRINSIC_W_SIDE_EFFECTS */ 238, /* G_ANYEXT */ 239, /* G_TRUNC */ 241, /* G_CONSTANT */ 243, /* G_FCONSTANT */ 245, /* G_VASTART */ 247, /* G_VAARG */ 248, /* G_SEXT */ 251, /* G_SEXT_INREG */ 253, /* G_ZEXT */ 256, /* G_SHL */ 258, /* G_LSHR */ 261, /* G_ASHR */ 264, /* G_FSHL */ 267, /* G_FSHR */ 271, /* G_ROTR */ 275, /* G_ROTL */ 278, /* G_ICMP */ 281, /* G_FCMP */ 285, /* G_SELECT */ 289, /* G_UADDO */ 293, /* G_UADDE */ 297, /* G_USUBO */ 302, /* G_USUBE */ 306, /* G_SADDO */ 311, /* G_SADDE */ 315, /* G_SSUBO */ 320, /* G_SSUBE */ 324, /* G_UMULO */ 329, /* G_SMULO */ 333, /* G_UMULH */ 337, /* G_SMULH */ 340, /* G_UADDSAT */ 343, /* G_SADDSAT */ 346, /* G_USUBSAT */ 349, /* G_SSUBSAT */ 352, /* G_USHLSAT */ 355, /* G_SSHLSAT */ 358, /* G_SMULFIX */ 361, /* G_UMULFIX */ 365, /* G_SMULFIXSAT */ 369, /* G_UMULFIXSAT */ 373, /* G_SDIVFIX */ 377, /* G_UDIVFIX */ 381, /* G_SDIVFIXSAT */ 385, /* G_UDIVFIXSAT */ 389, /* G_FADD */ 393, /* G_FSUB */ 396, /* G_FMUL */ 399, /* G_FMA */ 402, /* G_FMAD */ 406, /* G_FDIV */ 410, /* G_FREM */ 413, /* G_FPOW */ 416, /* G_FPOWI */ 419, /* G_FEXP */ 422, /* G_FEXP2 */ 424, /* G_FLOG */ 426, /* G_FLOG2 */ 428, /* G_FLOG10 */ 430, /* G_FNEG */ 432, /* G_FPEXT */ 434, /* G_FPTRUNC */ 436, /* G_FPTOSI */ 438, /* G_FPTOUI */ 440, /* G_SITOFP */ 442, /* G_UITOFP */ 444, /* G_FABS */ 446, /* G_FCOPYSIGN */ 448, /* G_IS_FPCLASS */ 451, /* G_FCANONICALIZE */ 454, /* G_FMINNUM */ 456, /* G_FMAXNUM */ 459, /* G_FMINNUM_IEEE */ 462, /* G_FMAXNUM_IEEE */ 465, /* G_FMINIMUM */ 468, /* G_FMAXIMUM */ 471, /* G_PTR_ADD */ 474, /* G_PTRMASK */ 477, /* G_SMIN */ 480, /* G_SMAX */ 483, /* G_UMIN */ 486, /* G_UMAX */ 489, /* G_ABS */ 492, /* G_LROUND */ 494, /* G_LLROUND */ 496, /* G_BR */ 498, /* G_BRJT */ 499, /* G_INSERT_VECTOR_ELT */ 502, /* G_EXTRACT_VECTOR_ELT */ 506, /* G_SHUFFLE_VECTOR */ 509, /* G_CTTZ */ 513, /* G_CTTZ_ZERO_UNDEF */ 515, /* G_CTLZ */ 517, /* G_CTLZ_ZERO_UNDEF */ 519, /* G_CTPOP */ 521, /* G_BSWAP */ 523, /* G_BITREVERSE */ 525, /* G_FCEIL */ 527, /* G_FCOS */ 529, /* G_FSIN */ 531, /* G_FSQRT */ 533, /* G_FFLOOR */ 535, /* G_FRINT */ 537, /* G_FNEARBYINT */ 539, /* G_ADDRSPACE_CAST */ 541, /* G_BLOCK_ADDR */ 543, /* G_JUMP_TABLE */ 545, /* G_DYN_STACKALLOC */ 547, /* G_STRICT_FADD */ 550, /* G_STRICT_FSUB */ 553, /* G_STRICT_FMUL */ 556, /* G_STRICT_FDIV */ 559, /* G_STRICT_FREM */ 562, /* G_STRICT_FMA */ 565, /* G_STRICT_FSQRT */ 569, /* G_READ_REGISTER */ 571, /* G_WRITE_REGISTER */ 573, /* G_MEMCPY */ 575, /* G_MEMCPY_INLINE */ 579, /* G_MEMMOVE */ 582, /* G_MEMSET */ 586, /* G_BZERO */ 590, /* G_VECREDUCE_SEQ_FADD */ 593, /* G_VECREDUCE_SEQ_FMUL */ 596, /* G_VECREDUCE_FADD */ 599, /* G_VECREDUCE_FMUL */ 601, /* G_VECREDUCE_FMAX */ 603, /* G_VECREDUCE_FMIN */ 605, /* G_VECREDUCE_ADD */ 607, /* G_VECREDUCE_MUL */ 609, /* G_VECREDUCE_AND */ 611, /* G_VECREDUCE_OR */ 613, /* G_VECREDUCE_XOR */ 615, /* G_VECREDUCE_SMAX */ 617, /* G_VECREDUCE_SMIN */ 619, /* G_VECREDUCE_UMAX */ 621, /* G_VECREDUCE_UMIN */ 623, /* G_SBFX */ 625, /* G_UBFX */ 629, /* ADJCALLSTACKDOWN */ 633, /* ADJCALLSTACKUP */ 635, /* BuildPairF64Pseudo */ 637, /* HWASAN_CHECK_MEMACCESS_SHORTGRANULES */ 640, /* PseudoAddTPRel */ 642, /* PseudoAtomicLoadNand32 */ 646, /* PseudoAtomicLoadNand64 */ 651, /* PseudoBR */ 656, /* PseudoBRIND */ 657, /* PseudoCALL */ 659, /* PseudoCALLIndirect */ 660, /* PseudoCALLReg */ 661, /* PseudoCCADD */ 663, /* PseudoCCADDW */ 670, /* PseudoCCAND */ 677, /* PseudoCCMOVGPR */ 684, /* PseudoCCOR */ 690, /* PseudoCCSUB */ 697, /* PseudoCCSUBW */ 704, /* PseudoCCXOR */ 711, /* PseudoCmpXchg32 */ 718, /* PseudoCmpXchg64 */ 724, /* PseudoFLD */ 730, /* PseudoFLH */ 733, /* PseudoFLW */ 736, /* PseudoFROUND_D */ 739, /* PseudoFROUND_H */ 743, /* PseudoFROUND_S */ 747, /* PseudoFSD */ 751, /* PseudoFSH */ 754, /* PseudoFSW */ 757, /* PseudoJump */ 760, /* PseudoLA */ 762, /* PseudoLA_TLS_GD */ 764, /* PseudoLA_TLS_IE */ 766, /* PseudoLB */ 768, /* PseudoLBU */ 770, /* PseudoLD */ 772, /* PseudoLH */ 774, /* PseudoLHU */ 776, /* PseudoLI */ 778, /* PseudoLLA */ 780, /* PseudoLW */ 782, /* PseudoLWU */ 784, /* PseudoMaskedAtomicLoadAdd32 */ 786, /* PseudoMaskedAtomicLoadMax32 */ 792, /* PseudoMaskedAtomicLoadMin32 */ 800, /* PseudoMaskedAtomicLoadNand32 */ 808, /* PseudoMaskedAtomicLoadSub32 */ 814, /* PseudoMaskedAtomicLoadUMax32 */ 820, /* PseudoMaskedAtomicLoadUMin32 */ 827, /* PseudoMaskedAtomicSwap32 */ 834, /* PseudoMaskedCmpXchg32 */ 840, /* PseudoQuietFLE_D */ 847, /* PseudoQuietFLE_H */ 850, /* PseudoQuietFLE_S */ 853, /* PseudoQuietFLT_D */ 856, /* PseudoQuietFLT_H */ 859, /* PseudoQuietFLT_S */ 862, /* PseudoRET */ 865, /* PseudoReadVL */ 865, /* PseudoReadVLENB */ 866, /* PseudoSB */ 867, /* PseudoSD */ 870, /* PseudoSEXT_B */ 873, /* PseudoSEXT_H */ 875, /* PseudoSH */ 877, /* PseudoSW */ 880, /* PseudoTAIL */ 883, /* PseudoTAILIndirect */ 884, /* PseudoTHVdotVMAQASU_VV_M1 */ 885, /* PseudoTHVdotVMAQASU_VV_M1_MASK */ 892, /* PseudoTHVdotVMAQASU_VV_M2 */ 900, /* PseudoTHVdotVMAQASU_VV_M2_MASK */ 907, /* PseudoTHVdotVMAQASU_VV_M4 */ 915, /* PseudoTHVdotVMAQASU_VV_M4_MASK */ 922, /* PseudoTHVdotVMAQASU_VV_M8 */ 930, /* PseudoTHVdotVMAQASU_VV_M8_MASK */ 937, /* PseudoTHVdotVMAQASU_VV_MF2 */ 945, /* PseudoTHVdotVMAQASU_VV_MF2_MASK */ 952, /* PseudoTHVdotVMAQASU_VX_M1 */ 960, /* PseudoTHVdotVMAQASU_VX_M1_MASK */ 967, /* PseudoTHVdotVMAQASU_VX_M2 */ 975, /* PseudoTHVdotVMAQASU_VX_M2_MASK */ 982, /* PseudoTHVdotVMAQASU_VX_M4 */ 990, /* PseudoTHVdotVMAQASU_VX_M4_MASK */ 997, /* PseudoTHVdotVMAQASU_VX_M8 */ 1005, /* PseudoTHVdotVMAQASU_VX_M8_MASK */ 1012, /* PseudoTHVdotVMAQASU_VX_MF2 */ 1020, /* PseudoTHVdotVMAQASU_VX_MF2_MASK */ 1027, /* PseudoTHVdotVMAQAUS_VX_M1 */ 1035, /* PseudoTHVdotVMAQAUS_VX_M1_MASK */ 1042, /* PseudoTHVdotVMAQAUS_VX_M2 */ 1050, /* PseudoTHVdotVMAQAUS_VX_M2_MASK */ 1057, /* PseudoTHVdotVMAQAUS_VX_M4 */ 1065, /* PseudoTHVdotVMAQAUS_VX_M4_MASK */ 1072, /* PseudoTHVdotVMAQAUS_VX_M8 */ 1080, /* PseudoTHVdotVMAQAUS_VX_M8_MASK */ 1087, /* PseudoTHVdotVMAQAUS_VX_MF2 */ 1095, /* PseudoTHVdotVMAQAUS_VX_MF2_MASK */ 1102, /* PseudoTHVdotVMAQAU_VV_M1 */ 1110, /* PseudoTHVdotVMAQAU_VV_M1_MASK */ 1117, /* PseudoTHVdotVMAQAU_VV_M2 */ 1125, /* PseudoTHVdotVMAQAU_VV_M2_MASK */ 1132, /* PseudoTHVdotVMAQAU_VV_M4 */ 1140, /* PseudoTHVdotVMAQAU_VV_M4_MASK */ 1147, /* PseudoTHVdotVMAQAU_VV_M8 */ 1155, /* PseudoTHVdotVMAQAU_VV_M8_MASK */ 1162, /* PseudoTHVdotVMAQAU_VV_MF2 */ 1170, /* PseudoTHVdotVMAQAU_VV_MF2_MASK */ 1177, /* PseudoTHVdotVMAQAU_VX_M1 */ 1185, /* PseudoTHVdotVMAQAU_VX_M1_MASK */ 1192, /* PseudoTHVdotVMAQAU_VX_M2 */ 1200, /* PseudoTHVdotVMAQAU_VX_M2_MASK */ 1207, /* PseudoTHVdotVMAQAU_VX_M4 */ 1215, /* PseudoTHVdotVMAQAU_VX_M4_MASK */ 1222, /* PseudoTHVdotVMAQAU_VX_M8 */ 1230, /* PseudoTHVdotVMAQAU_VX_M8_MASK */ 1237, /* PseudoTHVdotVMAQAU_VX_MF2 */ 1245, /* PseudoTHVdotVMAQAU_VX_MF2_MASK */ 1252, /* PseudoTHVdotVMAQA_VV_M1 */ 1260, /* PseudoTHVdotVMAQA_VV_M1_MASK */ 1267, /* PseudoTHVdotVMAQA_VV_M2 */ 1275, /* PseudoTHVdotVMAQA_VV_M2_MASK */ 1282, /* PseudoTHVdotVMAQA_VV_M4 */ 1290, /* PseudoTHVdotVMAQA_VV_M4_MASK */ 1297, /* PseudoTHVdotVMAQA_VV_M8 */ 1305, /* PseudoTHVdotVMAQA_VV_M8_MASK */ 1312, /* PseudoTHVdotVMAQA_VV_MF2 */ 1320, /* PseudoTHVdotVMAQA_VV_MF2_MASK */ 1327, /* PseudoTHVdotVMAQA_VX_M1 */ 1335, /* PseudoTHVdotVMAQA_VX_M1_MASK */ 1342, /* PseudoTHVdotVMAQA_VX_M2 */ 1350, /* PseudoTHVdotVMAQA_VX_M2_MASK */ 1357, /* PseudoTHVdotVMAQA_VX_M4 */ 1365, /* PseudoTHVdotVMAQA_VX_M4_MASK */ 1372, /* PseudoTHVdotVMAQA_VX_M8 */ 1380, /* PseudoTHVdotVMAQA_VX_M8_MASK */ 1387, /* PseudoTHVdotVMAQA_VX_MF2 */ 1395, /* PseudoTHVdotVMAQA_VX_MF2_MASK */ 1402, /* PseudoVAADDU_VV_M1 */ 1410, /* PseudoVAADDU_VV_M1_MASK */ 1415, /* PseudoVAADDU_VV_M1_TU */ 1423, /* PseudoVAADDU_VV_M2 */ 1429, /* PseudoVAADDU_VV_M2_MASK */ 1434, /* PseudoVAADDU_VV_M2_TU */ 1442, /* PseudoVAADDU_VV_M4 */ 1448, /* PseudoVAADDU_VV_M4_MASK */ 1453, /* PseudoVAADDU_VV_M4_TU */ 1461, /* PseudoVAADDU_VV_M8 */ 1467, /* PseudoVAADDU_VV_M8_MASK */ 1472, /* PseudoVAADDU_VV_M8_TU */ 1480, /* PseudoVAADDU_VV_MF2 */ 1486, /* PseudoVAADDU_VV_MF2_MASK */ 1491, /* PseudoVAADDU_VV_MF2_TU */ 1499, /* PseudoVAADDU_VV_MF4 */ 1505, /* PseudoVAADDU_VV_MF4_MASK */ 1510, /* PseudoVAADDU_VV_MF4_TU */ 1518, /* PseudoVAADDU_VV_MF8 */ 1524, /* PseudoVAADDU_VV_MF8_MASK */ 1529, /* PseudoVAADDU_VV_MF8_TU */ 1537, /* PseudoVAADDU_VX_M1 */ 1543, /* PseudoVAADDU_VX_M1_MASK */ 1548, /* PseudoVAADDU_VX_M1_TU */ 1556, /* PseudoVAADDU_VX_M2 */ 1562, /* PseudoVAADDU_VX_M2_MASK */ 1567, /* PseudoVAADDU_VX_M2_TU */ 1575, /* PseudoVAADDU_VX_M4 */ 1581, /* PseudoVAADDU_VX_M4_MASK */ 1586, /* PseudoVAADDU_VX_M4_TU */ 1594, /* PseudoVAADDU_VX_M8 */ 1600, /* PseudoVAADDU_VX_M8_MASK */ 1605, /* PseudoVAADDU_VX_M8_TU */ 1613, /* PseudoVAADDU_VX_MF2 */ 1619, /* PseudoVAADDU_VX_MF2_MASK */ 1624, /* PseudoVAADDU_VX_MF2_TU */ 1632, /* PseudoVAADDU_VX_MF4 */ 1638, /* PseudoVAADDU_VX_MF4_MASK */ 1643, /* PseudoVAADDU_VX_MF4_TU */ 1651, /* PseudoVAADDU_VX_MF8 */ 1657, /* PseudoVAADDU_VX_MF8_MASK */ 1662, /* PseudoVAADDU_VX_MF8_TU */ 1670, /* PseudoVAADD_VV_M1 */ 1676, /* PseudoVAADD_VV_M1_MASK */ 1681, /* PseudoVAADD_VV_M1_TU */ 1689, /* PseudoVAADD_VV_M2 */ 1695, /* PseudoVAADD_VV_M2_MASK */ 1700, /* PseudoVAADD_VV_M2_TU */ 1708, /* PseudoVAADD_VV_M4 */ 1714, /* PseudoVAADD_VV_M4_MASK */ 1719, /* PseudoVAADD_VV_M4_TU */ 1727, /* PseudoVAADD_VV_M8 */ 1733, /* PseudoVAADD_VV_M8_MASK */ 1738, /* PseudoVAADD_VV_M8_TU */ 1746, /* PseudoVAADD_VV_MF2 */ 1752, /* PseudoVAADD_VV_MF2_MASK */ 1757, /* PseudoVAADD_VV_MF2_TU */ 1765, /* PseudoVAADD_VV_MF4 */ 1771, /* PseudoVAADD_VV_MF4_MASK */ 1776, /* PseudoVAADD_VV_MF4_TU */ 1784, /* PseudoVAADD_VV_MF8 */ 1790, /* PseudoVAADD_VV_MF8_MASK */ 1795, /* PseudoVAADD_VV_MF8_TU */ 1803, /* PseudoVAADD_VX_M1 */ 1809, /* PseudoVAADD_VX_M1_MASK */ 1814, /* PseudoVAADD_VX_M1_TU */ 1822, /* PseudoVAADD_VX_M2 */ 1828, /* PseudoVAADD_VX_M2_MASK */ 1833, /* PseudoVAADD_VX_M2_TU */ 1841, /* PseudoVAADD_VX_M4 */ 1847, /* PseudoVAADD_VX_M4_MASK */ 1852, /* PseudoVAADD_VX_M4_TU */ 1860, /* PseudoVAADD_VX_M8 */ 1866, /* PseudoVAADD_VX_M8_MASK */ 1871, /* PseudoVAADD_VX_M8_TU */ 1879, /* PseudoVAADD_VX_MF2 */ 1885, /* PseudoVAADD_VX_MF2_MASK */ 1890, /* PseudoVAADD_VX_MF2_TU */ 1898, /* PseudoVAADD_VX_MF4 */ 1904, /* PseudoVAADD_VX_MF4_MASK */ 1909, /* PseudoVAADD_VX_MF4_TU */ 1917, /* PseudoVAADD_VX_MF8 */ 1923, /* PseudoVAADD_VX_MF8_MASK */ 1928, /* PseudoVAADD_VX_MF8_TU */ 1936, /* PseudoVADC_VIM_M1 */ 1942, /* PseudoVADC_VIM_M1_TU */ 1948, /* PseudoVADC_VIM_M2 */ 1955, /* PseudoVADC_VIM_M2_TU */ 1961, /* PseudoVADC_VIM_M4 */ 1968, /* PseudoVADC_VIM_M4_TU */ 1974, /* PseudoVADC_VIM_M8 */ 1981, /* PseudoVADC_VIM_M8_TU */ 1987, /* PseudoVADC_VIM_MF2 */ 1994, /* PseudoVADC_VIM_MF2_TU */ 2000, /* PseudoVADC_VIM_MF4 */ 2007, /* PseudoVADC_VIM_MF4_TU */ 2013, /* PseudoVADC_VIM_MF8 */ 2020, /* PseudoVADC_VIM_MF8_TU */ 2026, /* PseudoVADC_VVM_M1 */ 2033, /* PseudoVADC_VVM_M1_TU */ 2039, /* PseudoVADC_VVM_M2 */ 2046, /* PseudoVADC_VVM_M2_TU */ 2052, /* PseudoVADC_VVM_M4 */ 2059, /* PseudoVADC_VVM_M4_TU */ 2065, /* PseudoVADC_VVM_M8 */ 2072, /* PseudoVADC_VVM_M8_TU */ 2078, /* PseudoVADC_VVM_MF2 */ 2085, /* PseudoVADC_VVM_MF2_TU */ 2091, /* PseudoVADC_VVM_MF4 */ 2098, /* PseudoVADC_VVM_MF4_TU */ 2104, /* PseudoVADC_VVM_MF8 */ 2111, /* PseudoVADC_VVM_MF8_TU */ 2117, /* PseudoVADC_VXM_M1 */ 2124, /* PseudoVADC_VXM_M1_TU */ 2130, /* PseudoVADC_VXM_M2 */ 2137, /* PseudoVADC_VXM_M2_TU */ 2143, /* PseudoVADC_VXM_M4 */ 2150, /* PseudoVADC_VXM_M4_TU */ 2156, /* PseudoVADC_VXM_M8 */ 2163, /* PseudoVADC_VXM_M8_TU */ 2169, /* PseudoVADC_VXM_MF2 */ 2176, /* PseudoVADC_VXM_MF2_TU */ 2182, /* PseudoVADC_VXM_MF4 */ 2189, /* PseudoVADC_VXM_MF4_TU */ 2195, /* PseudoVADC_VXM_MF8 */ 2202, /* PseudoVADC_VXM_MF8_TU */ 2208, /* PseudoVADD_VI_M1 */ 2215, /* PseudoVADD_VI_M1_MASK */ 2220, /* PseudoVADD_VI_M1_TU */ 2228, /* PseudoVADD_VI_M2 */ 2234, /* PseudoVADD_VI_M2_MASK */ 2239, /* PseudoVADD_VI_M2_TU */ 2247, /* PseudoVADD_VI_M4 */ 2253, /* PseudoVADD_VI_M4_MASK */ 2258, /* PseudoVADD_VI_M4_TU */ 2266, /* PseudoVADD_VI_M8 */ 2272, /* PseudoVADD_VI_M8_MASK */ 2277, /* PseudoVADD_VI_M8_TU */ 2285, /* PseudoVADD_VI_MF2 */ 2291, /* PseudoVADD_VI_MF2_MASK */ 2296, /* PseudoVADD_VI_MF2_TU */ 2304, /* PseudoVADD_VI_MF4 */ 2310, /* PseudoVADD_VI_MF4_MASK */ 2315, /* PseudoVADD_VI_MF4_TU */ 2323, /* PseudoVADD_VI_MF8 */ 2329, /* PseudoVADD_VI_MF8_MASK */ 2334, /* PseudoVADD_VI_MF8_TU */ 2342, /* PseudoVADD_VV_M1 */ 2348, /* PseudoVADD_VV_M1_MASK */ 2353, /* PseudoVADD_VV_M1_TU */ 2361, /* PseudoVADD_VV_M2 */ 2367, /* PseudoVADD_VV_M2_MASK */ 2372, /* PseudoVADD_VV_M2_TU */ 2380, /* PseudoVADD_VV_M4 */ 2386, /* PseudoVADD_VV_M4_MASK */ 2391, /* PseudoVADD_VV_M4_TU */ 2399, /* PseudoVADD_VV_M8 */ 2405, /* PseudoVADD_VV_M8_MASK */ 2410, /* PseudoVADD_VV_M8_TU */ 2418, /* PseudoVADD_VV_MF2 */ 2424, /* PseudoVADD_VV_MF2_MASK */ 2429, /* PseudoVADD_VV_MF2_TU */ 2437, /* PseudoVADD_VV_MF4 */ 2443, /* PseudoVADD_VV_MF4_MASK */ 2448, /* PseudoVADD_VV_MF4_TU */ 2456, /* PseudoVADD_VV_MF8 */ 2462, /* PseudoVADD_VV_MF8_MASK */ 2467, /* PseudoVADD_VV_MF8_TU */ 2475, /* PseudoVADD_VX_M1 */ 2481, /* PseudoVADD_VX_M1_MASK */ 2486, /* PseudoVADD_VX_M1_TU */ 2494, /* PseudoVADD_VX_M2 */ 2500, /* PseudoVADD_VX_M2_MASK */ 2505, /* PseudoVADD_VX_M2_TU */ 2513, /* PseudoVADD_VX_M4 */ 2519, /* PseudoVADD_VX_M4_MASK */ 2524, /* PseudoVADD_VX_M4_TU */ 2532, /* PseudoVADD_VX_M8 */ 2538, /* PseudoVADD_VX_M8_MASK */ 2543, /* PseudoVADD_VX_M8_TU */ 2551, /* PseudoVADD_VX_MF2 */ 2557, /* PseudoVADD_VX_MF2_MASK */ 2562, /* PseudoVADD_VX_MF2_TU */ 2570, /* PseudoVADD_VX_MF4 */ 2576, /* PseudoVADD_VX_MF4_MASK */ 2581, /* PseudoVADD_VX_MF4_TU */ 2589, /* PseudoVADD_VX_MF8 */ 2595, /* PseudoVADD_VX_MF8_MASK */ 2600, /* PseudoVADD_VX_MF8_TU */ 2608, /* PseudoVAND_VI_M1 */ 2614, /* PseudoVAND_VI_M1_MASK */ 2619, /* PseudoVAND_VI_M1_TU */ 2627, /* PseudoVAND_VI_M2 */ 2633, /* PseudoVAND_VI_M2_MASK */ 2638, /* PseudoVAND_VI_M2_TU */ 2646, /* PseudoVAND_VI_M4 */ 2652, /* PseudoVAND_VI_M4_MASK */ 2657, /* PseudoVAND_VI_M4_TU */ 2665, /* PseudoVAND_VI_M8 */ 2671, /* PseudoVAND_VI_M8_MASK */ 2676, /* PseudoVAND_VI_M8_TU */ 2684, /* PseudoVAND_VI_MF2 */ 2690, /* PseudoVAND_VI_MF2_MASK */ 2695, /* PseudoVAND_VI_MF2_TU */ 2703, /* PseudoVAND_VI_MF4 */ 2709, /* PseudoVAND_VI_MF4_MASK */ 2714, /* PseudoVAND_VI_MF4_TU */ 2722, /* PseudoVAND_VI_MF8 */ 2728, /* PseudoVAND_VI_MF8_MASK */ 2733, /* PseudoVAND_VI_MF8_TU */ 2741, /* PseudoVAND_VV_M1 */ 2747, /* PseudoVAND_VV_M1_MASK */ 2752, /* PseudoVAND_VV_M1_TU */ 2760, /* PseudoVAND_VV_M2 */ 2766, /* PseudoVAND_VV_M2_MASK */ 2771, /* PseudoVAND_VV_M2_TU */ 2779, /* PseudoVAND_VV_M4 */ 2785, /* PseudoVAND_VV_M4_MASK */ 2790, /* PseudoVAND_VV_M4_TU */ 2798, /* PseudoVAND_VV_M8 */ 2804, /* PseudoVAND_VV_M8_MASK */ 2809, /* PseudoVAND_VV_M8_TU */ 2817, /* PseudoVAND_VV_MF2 */ 2823, /* PseudoVAND_VV_MF2_MASK */ 2828, /* PseudoVAND_VV_MF2_TU */ 2836, /* PseudoVAND_VV_MF4 */ 2842, /* PseudoVAND_VV_MF4_MASK */ 2847, /* PseudoVAND_VV_MF4_TU */ 2855, /* PseudoVAND_VV_MF8 */ 2861, /* PseudoVAND_VV_MF8_MASK */ 2866, /* PseudoVAND_VV_MF8_TU */ 2874, /* PseudoVAND_VX_M1 */ 2880, /* PseudoVAND_VX_M1_MASK */ 2885, /* PseudoVAND_VX_M1_TU */ 2893, /* PseudoVAND_VX_M2 */ 2899, /* PseudoVAND_VX_M2_MASK */ 2904, /* PseudoVAND_VX_M2_TU */ 2912, /* PseudoVAND_VX_M4 */ 2918, /* PseudoVAND_VX_M4_MASK */ 2923, /* PseudoVAND_VX_M4_TU */ 2931, /* PseudoVAND_VX_M8 */ 2937, /* PseudoVAND_VX_M8_MASK */ 2942, /* PseudoVAND_VX_M8_TU */ 2950, /* PseudoVAND_VX_MF2 */ 2956, /* PseudoVAND_VX_MF2_MASK */ 2961, /* PseudoVAND_VX_MF2_TU */ 2969, /* PseudoVAND_VX_MF4 */ 2975, /* PseudoVAND_VX_MF4_MASK */ 2980, /* PseudoVAND_VX_MF4_TU */ 2988, /* PseudoVAND_VX_MF8 */ 2994, /* PseudoVAND_VX_MF8_MASK */ 2999, /* PseudoVAND_VX_MF8_TU */ 3007, /* PseudoVASUBU_VV_M1 */ 3013, /* PseudoVASUBU_VV_M1_MASK */ 3018, /* PseudoVASUBU_VV_M1_TU */ 3026, /* PseudoVASUBU_VV_M2 */ 3032, /* PseudoVASUBU_VV_M2_MASK */ 3037, /* PseudoVASUBU_VV_M2_TU */ 3045, /* PseudoVASUBU_VV_M4 */ 3051, /* PseudoVASUBU_VV_M4_MASK */ 3056, /* PseudoVASUBU_VV_M4_TU */ 3064, /* PseudoVASUBU_VV_M8 */ 3070, /* PseudoVASUBU_VV_M8_MASK */ 3075, /* PseudoVASUBU_VV_M8_TU */ 3083, /* PseudoVASUBU_VV_MF2 */ 3089, /* PseudoVASUBU_VV_MF2_MASK */ 3094, /* PseudoVASUBU_VV_MF2_TU */ 3102, /* PseudoVASUBU_VV_MF4 */ 3108, /* PseudoVASUBU_VV_MF4_MASK */ 3113, /* PseudoVASUBU_VV_MF4_TU */ 3121, /* PseudoVASUBU_VV_MF8 */ 3127, /* PseudoVASUBU_VV_MF8_MASK */ 3132, /* PseudoVASUBU_VV_MF8_TU */ 3140, /* PseudoVASUBU_VX_M1 */ 3146, /* PseudoVASUBU_VX_M1_MASK */ 3151, /* PseudoVASUBU_VX_M1_TU */ 3159, /* PseudoVASUBU_VX_M2 */ 3165, /* PseudoVASUBU_VX_M2_MASK */ 3170, /* PseudoVASUBU_VX_M2_TU */ 3178, /* PseudoVASUBU_VX_M4 */ 3184, /* PseudoVASUBU_VX_M4_MASK */ 3189, /* PseudoVASUBU_VX_M4_TU */ 3197, /* PseudoVASUBU_VX_M8 */ 3203, /* PseudoVASUBU_VX_M8_MASK */ 3208, /* PseudoVASUBU_VX_M8_TU */ 3216, /* PseudoVASUBU_VX_MF2 */ 3222, /* PseudoVASUBU_VX_MF2_MASK */ 3227, /* PseudoVASUBU_VX_MF2_TU */ 3235, /* PseudoVASUBU_VX_MF4 */ 3241, /* PseudoVASUBU_VX_MF4_MASK */ 3246, /* PseudoVASUBU_VX_MF4_TU */ 3254, /* PseudoVASUBU_VX_MF8 */ 3260, /* PseudoVASUBU_VX_MF8_MASK */ 3265, /* PseudoVASUBU_VX_MF8_TU */ 3273, /* PseudoVASUB_VV_M1 */ 3279, /* PseudoVASUB_VV_M1_MASK */ 3284, /* PseudoVASUB_VV_M1_TU */ 3292, /* PseudoVASUB_VV_M2 */ 3298, /* PseudoVASUB_VV_M2_MASK */ 3303, /* PseudoVASUB_VV_M2_TU */ 3311, /* PseudoVASUB_VV_M4 */ 3317, /* PseudoVASUB_VV_M4_MASK */ 3322, /* PseudoVASUB_VV_M4_TU */ 3330, /* PseudoVASUB_VV_M8 */ 3336, /* PseudoVASUB_VV_M8_MASK */ 3341, /* PseudoVASUB_VV_M8_TU */ 3349, /* PseudoVASUB_VV_MF2 */ 3355, /* PseudoVASUB_VV_MF2_MASK */ 3360, /* PseudoVASUB_VV_MF2_TU */ 3368, /* PseudoVASUB_VV_MF4 */ 3374, /* PseudoVASUB_VV_MF4_MASK */ 3379, /* PseudoVASUB_VV_MF4_TU */ 3387, /* PseudoVASUB_VV_MF8 */ 3393, /* PseudoVASUB_VV_MF8_MASK */ 3398, /* PseudoVASUB_VV_MF8_TU */ 3406, /* PseudoVASUB_VX_M1 */ 3412, /* PseudoVASUB_VX_M1_MASK */ 3417, /* PseudoVASUB_VX_M1_TU */ 3425, /* PseudoVASUB_VX_M2 */ 3431, /* PseudoVASUB_VX_M2_MASK */ 3436, /* PseudoVASUB_VX_M2_TU */ 3444, /* PseudoVASUB_VX_M4 */ 3450, /* PseudoVASUB_VX_M4_MASK */ 3455, /* PseudoVASUB_VX_M4_TU */ 3463, /* PseudoVASUB_VX_M8 */ 3469, /* PseudoVASUB_VX_M8_MASK */ 3474, /* PseudoVASUB_VX_M8_TU */ 3482, /* PseudoVASUB_VX_MF2 */ 3488, /* PseudoVASUB_VX_MF2_MASK */ 3493, /* PseudoVASUB_VX_MF2_TU */ 3501, /* PseudoVASUB_VX_MF4 */ 3507, /* PseudoVASUB_VX_MF4_MASK */ 3512, /* PseudoVASUB_VX_MF4_TU */ 3520, /* PseudoVASUB_VX_MF8 */ 3526, /* PseudoVASUB_VX_MF8_MASK */ 3531, /* PseudoVASUB_VX_MF8_TU */ 3539, /* PseudoVCOMPRESS_VM_M1 */ 3545, /* PseudoVCOMPRESS_VM_M2 */ 3551, /* PseudoVCOMPRESS_VM_M4 */ 3557, /* PseudoVCOMPRESS_VM_M8 */ 3563, /* PseudoVCOMPRESS_VM_MF2 */ 3569, /* PseudoVCOMPRESS_VM_MF4 */ 3575, /* PseudoVCOMPRESS_VM_MF8 */ 3581, /* PseudoVCPOP_M_B1 */ 3587, /* PseudoVCPOP_M_B16 */ 3591, /* PseudoVCPOP_M_B16_MASK */ 3595, /* PseudoVCPOP_M_B1_MASK */ 3600, /* PseudoVCPOP_M_B2 */ 3605, /* PseudoVCPOP_M_B2_MASK */ 3609, /* PseudoVCPOP_M_B32 */ 3614, /* PseudoVCPOP_M_B32_MASK */ 3618, /* PseudoVCPOP_M_B4 */ 3623, /* PseudoVCPOP_M_B4_MASK */ 3627, /* PseudoVCPOP_M_B64 */ 3632, /* PseudoVCPOP_M_B64_MASK */ 3636, /* PseudoVCPOP_M_B8 */ 3641, /* PseudoVCPOP_M_B8_MASK */ 3645, /* PseudoVDIVU_VV_M1 */ 3650, /* PseudoVDIVU_VV_M1_MASK */ 3655, /* PseudoVDIVU_VV_M1_TU */ 3663, /* PseudoVDIVU_VV_M2 */ 3669, /* PseudoVDIVU_VV_M2_MASK */ 3674, /* PseudoVDIVU_VV_M2_TU */ 3682, /* PseudoVDIVU_VV_M4 */ 3688, /* PseudoVDIVU_VV_M4_MASK */ 3693, /* PseudoVDIVU_VV_M4_TU */ 3701, /* PseudoVDIVU_VV_M8 */ 3707, /* PseudoVDIVU_VV_M8_MASK */ 3712, /* PseudoVDIVU_VV_M8_TU */ 3720, /* PseudoVDIVU_VV_MF2 */ 3726, /* PseudoVDIVU_VV_MF2_MASK */ 3731, /* PseudoVDIVU_VV_MF2_TU */ 3739, /* PseudoVDIVU_VV_MF4 */ 3745, /* PseudoVDIVU_VV_MF4_MASK */ 3750, /* PseudoVDIVU_VV_MF4_TU */ 3758, /* PseudoVDIVU_VV_MF8 */ 3764, /* PseudoVDIVU_VV_MF8_MASK */ 3769, /* PseudoVDIVU_VV_MF8_TU */ 3777, /* PseudoVDIVU_VX_M1 */ 3783, /* PseudoVDIVU_VX_M1_MASK */ 3788, /* PseudoVDIVU_VX_M1_TU */ 3796, /* PseudoVDIVU_VX_M2 */ 3802, /* PseudoVDIVU_VX_M2_MASK */ 3807, /* PseudoVDIVU_VX_M2_TU */ 3815, /* PseudoVDIVU_VX_M4 */ 3821, /* PseudoVDIVU_VX_M4_MASK */ 3826, /* PseudoVDIVU_VX_M4_TU */ 3834, /* PseudoVDIVU_VX_M8 */ 3840, /* PseudoVDIVU_VX_M8_MASK */ 3845, /* PseudoVDIVU_VX_M8_TU */ 3853, /* PseudoVDIVU_VX_MF2 */ 3859, /* PseudoVDIVU_VX_MF2_MASK */ 3864, /* PseudoVDIVU_VX_MF2_TU */ 3872, /* PseudoVDIVU_VX_MF4 */ 3878, /* PseudoVDIVU_VX_MF4_MASK */ 3883, /* PseudoVDIVU_VX_MF4_TU */ 3891, /* PseudoVDIVU_VX_MF8 */ 3897, /* PseudoVDIVU_VX_MF8_MASK */ 3902, /* PseudoVDIVU_VX_MF8_TU */ 3910, /* PseudoVDIV_VV_M1 */ 3916, /* PseudoVDIV_VV_M1_MASK */ 3921, /* PseudoVDIV_VV_M1_TU */ 3929, /* PseudoVDIV_VV_M2 */ 3935, /* PseudoVDIV_VV_M2_MASK */ 3940, /* PseudoVDIV_VV_M2_TU */ 3948, /* PseudoVDIV_VV_M4 */ 3954, /* PseudoVDIV_VV_M4_MASK */ 3959, /* PseudoVDIV_VV_M4_TU */ 3967, /* PseudoVDIV_VV_M8 */ 3973, /* PseudoVDIV_VV_M8_MASK */ 3978, /* PseudoVDIV_VV_M8_TU */ 3986, /* PseudoVDIV_VV_MF2 */ 3992, /* PseudoVDIV_VV_MF2_MASK */ 3997, /* PseudoVDIV_VV_MF2_TU */ 4005, /* PseudoVDIV_VV_MF4 */ 4011, /* PseudoVDIV_VV_MF4_MASK */ 4016, /* PseudoVDIV_VV_MF4_TU */ 4024, /* PseudoVDIV_VV_MF8 */ 4030, /* PseudoVDIV_VV_MF8_MASK */ 4035, /* PseudoVDIV_VV_MF8_TU */ 4043, /* PseudoVDIV_VX_M1 */ 4049, /* PseudoVDIV_VX_M1_MASK */ 4054, /* PseudoVDIV_VX_M1_TU */ 4062, /* PseudoVDIV_VX_M2 */ 4068, /* PseudoVDIV_VX_M2_MASK */ 4073, /* PseudoVDIV_VX_M2_TU */ 4081, /* PseudoVDIV_VX_M4 */ 4087, /* PseudoVDIV_VX_M4_MASK */ 4092, /* PseudoVDIV_VX_M4_TU */ 4100, /* PseudoVDIV_VX_M8 */ 4106, /* PseudoVDIV_VX_M8_MASK */ 4111, /* PseudoVDIV_VX_M8_TU */ 4119, /* PseudoVDIV_VX_MF2 */ 4125, /* PseudoVDIV_VX_MF2_MASK */ 4130, /* PseudoVDIV_VX_MF2_TU */ 4138, /* PseudoVDIV_VX_MF4 */ 4144, /* PseudoVDIV_VX_MF4_MASK */ 4149, /* PseudoVDIV_VX_MF4_TU */ 4157, /* PseudoVDIV_VX_MF8 */ 4163, /* PseudoVDIV_VX_MF8_MASK */ 4168, /* PseudoVDIV_VX_MF8_TU */ 4176, /* PseudoVFADD_VF16_M1 */ 4182, /* PseudoVFADD_VF16_M1_MASK */ 4187, /* PseudoVFADD_VF16_M1_TU */ 4195, /* PseudoVFADD_VF16_M2 */ 4201, /* PseudoVFADD_VF16_M2_MASK */ 4206, /* PseudoVFADD_VF16_M2_TU */ 4214, /* PseudoVFADD_VF16_M4 */ 4220, /* PseudoVFADD_VF16_M4_MASK */ 4225, /* PseudoVFADD_VF16_M4_TU */ 4233, /* PseudoVFADD_VF16_M8 */ 4239, /* PseudoVFADD_VF16_M8_MASK */ 4244, /* PseudoVFADD_VF16_M8_TU */ 4252, /* PseudoVFADD_VF16_MF2 */ 4258, /* PseudoVFADD_VF16_MF2_MASK */ 4263, /* PseudoVFADD_VF16_MF2_TU */ 4271, /* PseudoVFADD_VF16_MF4 */ 4277, /* PseudoVFADD_VF16_MF4_MASK */ 4282, /* PseudoVFADD_VF16_MF4_TU */ 4290, /* PseudoVFADD_VF32_M1 */ 4296, /* PseudoVFADD_VF32_M1_MASK */ 4301, /* PseudoVFADD_VF32_M1_TU */ 4309, /* PseudoVFADD_VF32_M2 */ 4315, /* PseudoVFADD_VF32_M2_MASK */ 4320, /* PseudoVFADD_VF32_M2_TU */ 4328, /* PseudoVFADD_VF32_M4 */ 4334, /* PseudoVFADD_VF32_M4_MASK */ 4339, /* PseudoVFADD_VF32_M4_TU */ 4347, /* PseudoVFADD_VF32_M8 */ 4353, /* PseudoVFADD_VF32_M8_MASK */ 4358, /* PseudoVFADD_VF32_M8_TU */ 4366, /* PseudoVFADD_VF32_MF2 */ 4372, /* PseudoVFADD_VF32_MF2_MASK */ 4377, /* PseudoVFADD_VF32_MF2_TU */ 4385, /* PseudoVFADD_VF64_M1 */ 4391, /* PseudoVFADD_VF64_M1_MASK */ 4396, /* PseudoVFADD_VF64_M1_TU */ 4404, /* PseudoVFADD_VF64_M2 */ 4410, /* PseudoVFADD_VF64_M2_MASK */ 4415, /* PseudoVFADD_VF64_M2_TU */ 4423, /* PseudoVFADD_VF64_M4 */ 4429, /* PseudoVFADD_VF64_M4_MASK */ 4434, /* PseudoVFADD_VF64_M4_TU */ 4442, /* PseudoVFADD_VF64_M8 */ 4448, /* PseudoVFADD_VF64_M8_MASK */ 4453, /* PseudoVFADD_VF64_M8_TU */ 4461, /* PseudoVFADD_VV_M1 */ 4467, /* PseudoVFADD_VV_M1_MASK */ 4472, /* PseudoVFADD_VV_M1_TU */ 4480, /* PseudoVFADD_VV_M2 */ 4486, /* PseudoVFADD_VV_M2_MASK */ 4491, /* PseudoVFADD_VV_M2_TU */ 4499, /* PseudoVFADD_VV_M4 */ 4505, /* PseudoVFADD_VV_M4_MASK */ 4510, /* PseudoVFADD_VV_M4_TU */ 4518, /* PseudoVFADD_VV_M8 */ 4524, /* PseudoVFADD_VV_M8_MASK */ 4529, /* PseudoVFADD_VV_M8_TU */ 4537, /* PseudoVFADD_VV_MF2 */ 4543, /* PseudoVFADD_VV_MF2_MASK */ 4548, /* PseudoVFADD_VV_MF2_TU */ 4556, /* PseudoVFADD_VV_MF4 */ 4562, /* PseudoVFADD_VV_MF4_MASK */ 4567, /* PseudoVFADD_VV_MF4_TU */ 4575, /* PseudoVFCLASS_V_M1 */ 4581, /* PseudoVFCLASS_V_M1_MASK */ 4585, /* PseudoVFCLASS_V_M1_TU */ 4592, /* PseudoVFCLASS_V_M2 */ 4597, /* PseudoVFCLASS_V_M2_MASK */ 4601, /* PseudoVFCLASS_V_M2_TU */ 4608, /* PseudoVFCLASS_V_M4 */ 4613, /* PseudoVFCLASS_V_M4_MASK */ 4617, /* PseudoVFCLASS_V_M4_TU */ 4624, /* PseudoVFCLASS_V_M8 */ 4629, /* PseudoVFCLASS_V_M8_MASK */ 4633, /* PseudoVFCLASS_V_M8_TU */ 4640, /* PseudoVFCLASS_V_MF2 */ 4645, /* PseudoVFCLASS_V_MF2_MASK */ 4649, /* PseudoVFCLASS_V_MF2_TU */ 4656, /* PseudoVFCLASS_V_MF4 */ 4661, /* PseudoVFCLASS_V_MF4_MASK */ 4665, /* PseudoVFCLASS_V_MF4_TU */ 4672, /* PseudoVFCVT_F_XU_V_M1 */ 4677, /* PseudoVFCVT_F_XU_V_M1_MASK */ 4681, /* PseudoVFCVT_F_XU_V_M1_TU */ 4688, /* PseudoVFCVT_F_XU_V_M2 */ 4693, /* PseudoVFCVT_F_XU_V_M2_MASK */ 4697, /* PseudoVFCVT_F_XU_V_M2_TU */ 4704, /* PseudoVFCVT_F_XU_V_M4 */ 4709, /* PseudoVFCVT_F_XU_V_M4_MASK */ 4713, /* PseudoVFCVT_F_XU_V_M4_TU */ 4720, /* PseudoVFCVT_F_XU_V_M8 */ 4725, /* PseudoVFCVT_F_XU_V_M8_MASK */ 4729, /* PseudoVFCVT_F_XU_V_M8_TU */ 4736, /* PseudoVFCVT_F_XU_V_MF2 */ 4741, /* PseudoVFCVT_F_XU_V_MF2_MASK */ 4745, /* PseudoVFCVT_F_XU_V_MF2_TU */ 4752, /* PseudoVFCVT_F_XU_V_MF4 */ 4757, /* PseudoVFCVT_F_XU_V_MF4_MASK */ 4761, /* PseudoVFCVT_F_XU_V_MF4_TU */ 4768, /* PseudoVFCVT_F_X_V_M1 */ 4773, /* PseudoVFCVT_F_X_V_M1_MASK */ 4777, /* PseudoVFCVT_F_X_V_M1_TU */ 4784, /* PseudoVFCVT_F_X_V_M2 */ 4789, /* PseudoVFCVT_F_X_V_M2_MASK */ 4793, /* PseudoVFCVT_F_X_V_M2_TU */ 4800, /* PseudoVFCVT_F_X_V_M4 */ 4805, /* PseudoVFCVT_F_X_V_M4_MASK */ 4809, /* PseudoVFCVT_F_X_V_M4_TU */ 4816, /* PseudoVFCVT_F_X_V_M8 */ 4821, /* PseudoVFCVT_F_X_V_M8_MASK */ 4825, /* PseudoVFCVT_F_X_V_M8_TU */ 4832, /* PseudoVFCVT_F_X_V_MF2 */ 4837, /* PseudoVFCVT_F_X_V_MF2_MASK */ 4841, /* PseudoVFCVT_F_X_V_MF2_TU */ 4848, /* PseudoVFCVT_F_X_V_MF4 */ 4853, /* PseudoVFCVT_F_X_V_MF4_MASK */ 4857, /* PseudoVFCVT_F_X_V_MF4_TU */ 4864, /* PseudoVFCVT_RM_F_XU_V_M1_MASK */ 4869, /* PseudoVFCVT_RM_F_XU_V_M2_MASK */ 4877, /* PseudoVFCVT_RM_F_XU_V_M4_MASK */ 4885, /* PseudoVFCVT_RM_F_XU_V_M8_MASK */ 4893, /* PseudoVFCVT_RM_F_XU_V_MF2_MASK */ 4901, /* PseudoVFCVT_RM_F_XU_V_MF4_MASK */ 4909, /* PseudoVFCVT_RM_F_X_V_M1_MASK */ 4917, /* PseudoVFCVT_RM_F_X_V_M2_MASK */ 4925, /* PseudoVFCVT_RM_F_X_V_M4_MASK */ 4933, /* PseudoVFCVT_RM_F_X_V_M8_MASK */ 4941, /* PseudoVFCVT_RM_F_X_V_MF2_MASK */ 4949, /* PseudoVFCVT_RM_F_X_V_MF4_MASK */ 4957, /* PseudoVFCVT_RM_XU_F_V_M1_MASK */ 4965, /* PseudoVFCVT_RM_XU_F_V_M2_MASK */ 4973, /* PseudoVFCVT_RM_XU_F_V_M4_MASK */ 4981, /* PseudoVFCVT_RM_XU_F_V_M8_MASK */ 4989, /* PseudoVFCVT_RM_XU_F_V_MF2_MASK */ 4997, /* PseudoVFCVT_RM_XU_F_V_MF4_MASK */ 5005, /* PseudoVFCVT_RM_X_F_V_M1_MASK */ 5013, /* PseudoVFCVT_RM_X_F_V_M2_MASK */ 5021, /* PseudoVFCVT_RM_X_F_V_M4_MASK */ 5029, /* PseudoVFCVT_RM_X_F_V_M8_MASK */ 5037, /* PseudoVFCVT_RM_X_F_V_MF2_MASK */ 5045, /* PseudoVFCVT_RM_X_F_V_MF4_MASK */ 5053, /* PseudoVFCVT_RTZ_XU_F_V_M1 */ 5061, /* PseudoVFCVT_RTZ_XU_F_V_M1_MASK */ 5065, /* PseudoVFCVT_RTZ_XU_F_V_M1_TU */ 5072, /* PseudoVFCVT_RTZ_XU_F_V_M2 */ 5077, /* PseudoVFCVT_RTZ_XU_F_V_M2_MASK */ 5081, /* PseudoVFCVT_RTZ_XU_F_V_M2_TU */ 5088, /* PseudoVFCVT_RTZ_XU_F_V_M4 */ 5093, /* PseudoVFCVT_RTZ_XU_F_V_M4_MASK */ 5097, /* PseudoVFCVT_RTZ_XU_F_V_M4_TU */ 5104, /* PseudoVFCVT_RTZ_XU_F_V_M8 */ 5109, /* PseudoVFCVT_RTZ_XU_F_V_M8_MASK */ 5113, /* PseudoVFCVT_RTZ_XU_F_V_M8_TU */ 5120, /* PseudoVFCVT_RTZ_XU_F_V_MF2 */ 5125, /* PseudoVFCVT_RTZ_XU_F_V_MF2_MASK */ 5129, /* PseudoVFCVT_RTZ_XU_F_V_MF2_TU */ 5136, /* PseudoVFCVT_RTZ_XU_F_V_MF4 */ 5141, /* PseudoVFCVT_RTZ_XU_F_V_MF4_MASK */ 5145, /* PseudoVFCVT_RTZ_XU_F_V_MF4_TU */ 5152, /* PseudoVFCVT_RTZ_X_F_V_M1 */ 5157, /* PseudoVFCVT_RTZ_X_F_V_M1_MASK */ 5161, /* PseudoVFCVT_RTZ_X_F_V_M1_TU */ 5168, /* PseudoVFCVT_RTZ_X_F_V_M2 */ 5173, /* PseudoVFCVT_RTZ_X_F_V_M2_MASK */ 5177, /* PseudoVFCVT_RTZ_X_F_V_M2_TU */ 5184, /* PseudoVFCVT_RTZ_X_F_V_M4 */ 5189, /* PseudoVFCVT_RTZ_X_F_V_M4_MASK */ 5193, /* PseudoVFCVT_RTZ_X_F_V_M4_TU */ 5200, /* PseudoVFCVT_RTZ_X_F_V_M8 */ 5205, /* PseudoVFCVT_RTZ_X_F_V_M8_MASK */ 5209, /* PseudoVFCVT_RTZ_X_F_V_M8_TU */ 5216, /* PseudoVFCVT_RTZ_X_F_V_MF2 */ 5221, /* PseudoVFCVT_RTZ_X_F_V_MF2_MASK */ 5225, /* PseudoVFCVT_RTZ_X_F_V_MF2_TU */ 5232, /* PseudoVFCVT_RTZ_X_F_V_MF4 */ 5237, /* PseudoVFCVT_RTZ_X_F_V_MF4_MASK */ 5241, /* PseudoVFCVT_RTZ_X_F_V_MF4_TU */ 5248, /* PseudoVFCVT_XU_F_V_M1 */ 5253, /* PseudoVFCVT_XU_F_V_M1_MASK */ 5257, /* PseudoVFCVT_XU_F_V_M1_TU */ 5264, /* PseudoVFCVT_XU_F_V_M2 */ 5269, /* PseudoVFCVT_XU_F_V_M2_MASK */ 5273, /* PseudoVFCVT_XU_F_V_M2_TU */ 5280, /* PseudoVFCVT_XU_F_V_M4 */ 5285, /* PseudoVFCVT_XU_F_V_M4_MASK */ 5289, /* PseudoVFCVT_XU_F_V_M4_TU */ 5296, /* PseudoVFCVT_XU_F_V_M8 */ 5301, /* PseudoVFCVT_XU_F_V_M8_MASK */ 5305, /* PseudoVFCVT_XU_F_V_M8_TU */ 5312, /* PseudoVFCVT_XU_F_V_MF2 */ 5317, /* PseudoVFCVT_XU_F_V_MF2_MASK */ 5321, /* PseudoVFCVT_XU_F_V_MF2_TU */ 5328, /* PseudoVFCVT_XU_F_V_MF4 */ 5333, /* PseudoVFCVT_XU_F_V_MF4_MASK */ 5337, /* PseudoVFCVT_XU_F_V_MF4_TU */ 5344, /* PseudoVFCVT_X_F_V_M1 */ 5349, /* PseudoVFCVT_X_F_V_M1_MASK */ 5353, /* PseudoVFCVT_X_F_V_M1_TU */ 5360, /* PseudoVFCVT_X_F_V_M2 */ 5365, /* PseudoVFCVT_X_F_V_M2_MASK */ 5369, /* PseudoVFCVT_X_F_V_M2_TU */ 5376, /* PseudoVFCVT_X_F_V_M4 */ 5381, /* PseudoVFCVT_X_F_V_M4_MASK */ 5385, /* PseudoVFCVT_X_F_V_M4_TU */ 5392, /* PseudoVFCVT_X_F_V_M8 */ 5397, /* PseudoVFCVT_X_F_V_M8_MASK */ 5401, /* PseudoVFCVT_X_F_V_M8_TU */ 5408, /* PseudoVFCVT_X_F_V_MF2 */ 5413, /* PseudoVFCVT_X_F_V_MF2_MASK */ 5417, /* PseudoVFCVT_X_F_V_MF2_TU */ 5424, /* PseudoVFCVT_X_F_V_MF4 */ 5429, /* PseudoVFCVT_X_F_V_MF4_MASK */ 5433, /* PseudoVFCVT_X_F_V_MF4_TU */ 5440, /* PseudoVFDIV_VF16_M1 */ 5445, /* PseudoVFDIV_VF16_M1_MASK */ 5450, /* PseudoVFDIV_VF16_M1_TU */ 5458, /* PseudoVFDIV_VF16_M2 */ 5464, /* PseudoVFDIV_VF16_M2_MASK */ 5469, /* PseudoVFDIV_VF16_M2_TU */ 5477, /* PseudoVFDIV_VF16_M4 */ 5483, /* PseudoVFDIV_VF16_M4_MASK */ 5488, /* PseudoVFDIV_VF16_M4_TU */ 5496, /* PseudoVFDIV_VF16_M8 */ 5502, /* PseudoVFDIV_VF16_M8_MASK */ 5507, /* PseudoVFDIV_VF16_M8_TU */ 5515, /* PseudoVFDIV_VF16_MF2 */ 5521, /* PseudoVFDIV_VF16_MF2_MASK */ 5526, /* PseudoVFDIV_VF16_MF2_TU */ 5534, /* PseudoVFDIV_VF16_MF4 */ 5540, /* PseudoVFDIV_VF16_MF4_MASK */ 5545, /* PseudoVFDIV_VF16_MF4_TU */ 5553, /* PseudoVFDIV_VF32_M1 */ 5559, /* PseudoVFDIV_VF32_M1_MASK */ 5564, /* PseudoVFDIV_VF32_M1_TU */ 5572, /* PseudoVFDIV_VF32_M2 */ 5578, /* PseudoVFDIV_VF32_M2_MASK */ 5583, /* PseudoVFDIV_VF32_M2_TU */ 5591, /* PseudoVFDIV_VF32_M4 */ 5597, /* PseudoVFDIV_VF32_M4_MASK */ 5602, /* PseudoVFDIV_VF32_M4_TU */ 5610, /* PseudoVFDIV_VF32_M8 */ 5616, /* PseudoVFDIV_VF32_M8_MASK */ 5621, /* PseudoVFDIV_VF32_M8_TU */ 5629, /* PseudoVFDIV_VF32_MF2 */ 5635, /* PseudoVFDIV_VF32_MF2_MASK */ 5640, /* PseudoVFDIV_VF32_MF2_TU */ 5648, /* PseudoVFDIV_VF64_M1 */ 5654, /* PseudoVFDIV_VF64_M1_MASK */ 5659, /* PseudoVFDIV_VF64_M1_TU */ 5667, /* PseudoVFDIV_VF64_M2 */ 5673, /* PseudoVFDIV_VF64_M2_MASK */ 5678, /* PseudoVFDIV_VF64_M2_TU */ 5686, /* PseudoVFDIV_VF64_M4 */ 5692, /* PseudoVFDIV_VF64_M4_MASK */ 5697, /* PseudoVFDIV_VF64_M4_TU */ 5705, /* PseudoVFDIV_VF64_M8 */ 5711, /* PseudoVFDIV_VF64_M8_MASK */ 5716, /* PseudoVFDIV_VF64_M8_TU */ 5724, /* PseudoVFDIV_VV_M1 */ 5730, /* PseudoVFDIV_VV_M1_MASK */ 5735, /* PseudoVFDIV_VV_M1_TU */ 5743, /* PseudoVFDIV_VV_M2 */ 5749, /* PseudoVFDIV_VV_M2_MASK */ 5754, /* PseudoVFDIV_VV_M2_TU */ 5762, /* PseudoVFDIV_VV_M4 */ 5768, /* PseudoVFDIV_VV_M4_MASK */ 5773, /* PseudoVFDIV_VV_M4_TU */ 5781, /* PseudoVFDIV_VV_M8 */ 5787, /* PseudoVFDIV_VV_M8_MASK */ 5792, /* PseudoVFDIV_VV_M8_TU */ 5800, /* PseudoVFDIV_VV_MF2 */ 5806, /* PseudoVFDIV_VV_MF2_MASK */ 5811, /* PseudoVFDIV_VV_MF2_TU */ 5819, /* PseudoVFDIV_VV_MF4 */ 5825, /* PseudoVFDIV_VV_MF4_MASK */ 5830, /* PseudoVFDIV_VV_MF4_TU */ 5838, /* PseudoVFIRST_M_B1 */ 5844, /* PseudoVFIRST_M_B16 */ 5848, /* PseudoVFIRST_M_B16_MASK */ 5852, /* PseudoVFIRST_M_B1_MASK */ 5857, /* PseudoVFIRST_M_B2 */ 5862, /* PseudoVFIRST_M_B2_MASK */ 5866, /* PseudoVFIRST_M_B32 */ 5871, /* PseudoVFIRST_M_B32_MASK */ 5875, /* PseudoVFIRST_M_B4 */ 5880, /* PseudoVFIRST_M_B4_MASK */ 5884, /* PseudoVFIRST_M_B64 */ 5889, /* PseudoVFIRST_M_B64_MASK */ 5893, /* PseudoVFIRST_M_B8 */ 5898, /* PseudoVFIRST_M_B8_MASK */ 5902, /* PseudoVFMACC_VF16_M1 */ 5907, /* PseudoVFMACC_VF16_M1_MASK */ 5914, /* PseudoVFMACC_VF16_M2 */ 5922, /* PseudoVFMACC_VF16_M2_MASK */ 5929, /* PseudoVFMACC_VF16_M4 */ 5937, /* PseudoVFMACC_VF16_M4_MASK */ 5944, /* PseudoVFMACC_VF16_M8 */ 5952, /* PseudoVFMACC_VF16_M8_MASK */ 5959, /* PseudoVFMACC_VF16_MF2 */ 5967, /* PseudoVFMACC_VF16_MF2_MASK */ 5974, /* PseudoVFMACC_VF16_MF4 */ 5982, /* PseudoVFMACC_VF16_MF4_MASK */ 5989, /* PseudoVFMACC_VF32_M1 */ 5997, /* PseudoVFMACC_VF32_M1_MASK */ 6004, /* PseudoVFMACC_VF32_M2 */ 6012, /* PseudoVFMACC_VF32_M2_MASK */ 6019, /* PseudoVFMACC_VF32_M4 */ 6027, /* PseudoVFMACC_VF32_M4_MASK */ 6034, /* PseudoVFMACC_VF32_M8 */ 6042, /* PseudoVFMACC_VF32_M8_MASK */ 6049, /* PseudoVFMACC_VF32_MF2 */ 6057, /* PseudoVFMACC_VF32_MF2_MASK */ 6064, /* PseudoVFMACC_VF64_M1 */ 6072, /* PseudoVFMACC_VF64_M1_MASK */ 6079, /* PseudoVFMACC_VF64_M2 */ 6087, /* PseudoVFMACC_VF64_M2_MASK */ 6094, /* PseudoVFMACC_VF64_M4 */ 6102, /* PseudoVFMACC_VF64_M4_MASK */ 6109, /* PseudoVFMACC_VF64_M8 */ 6117, /* PseudoVFMACC_VF64_M8_MASK */ 6124, /* PseudoVFMACC_VV_M1 */ 6132, /* PseudoVFMACC_VV_M1_MASK */ 6139, /* PseudoVFMACC_VV_M2 */ 6147, /* PseudoVFMACC_VV_M2_MASK */ 6154, /* PseudoVFMACC_VV_M4 */ 6162, /* PseudoVFMACC_VV_M4_MASK */ 6169, /* PseudoVFMACC_VV_M8 */ 6177, /* PseudoVFMACC_VV_M8_MASK */ 6184, /* PseudoVFMACC_VV_MF2 */ 6192, /* PseudoVFMACC_VV_MF2_MASK */ 6199, /* PseudoVFMACC_VV_MF4 */ 6207, /* PseudoVFMACC_VV_MF4_MASK */ 6214, /* PseudoVFMADD_VF16_M1 */ 6222, /* PseudoVFMADD_VF16_M1_MASK */ 6229, /* PseudoVFMADD_VF16_M2 */ 6237, /* PseudoVFMADD_VF16_M2_MASK */ 6244, /* PseudoVFMADD_VF16_M4 */ 6252, /* PseudoVFMADD_VF16_M4_MASK */ 6259, /* PseudoVFMADD_VF16_M8 */ 6267, /* PseudoVFMADD_VF16_M8_MASK */ 6274, /* PseudoVFMADD_VF16_MF2 */ 6282, /* PseudoVFMADD_VF16_MF2_MASK */ 6289, /* PseudoVFMADD_VF16_MF4 */ 6297, /* PseudoVFMADD_VF16_MF4_MASK */ 6304, /* PseudoVFMADD_VF32_M1 */ 6312, /* PseudoVFMADD_VF32_M1_MASK */ 6319, /* PseudoVFMADD_VF32_M2 */ 6327, /* PseudoVFMADD_VF32_M2_MASK */ 6334, /* PseudoVFMADD_VF32_M4 */ 6342, /* PseudoVFMADD_VF32_M4_MASK */ 6349, /* PseudoVFMADD_VF32_M8 */ 6357, /* PseudoVFMADD_VF32_M8_MASK */ 6364, /* PseudoVFMADD_VF32_MF2 */ 6372, /* PseudoVFMADD_VF32_MF2_MASK */ 6379, /* PseudoVFMADD_VF64_M1 */ 6387, /* PseudoVFMADD_VF64_M1_MASK */ 6394, /* PseudoVFMADD_VF64_M2 */ 6402, /* PseudoVFMADD_VF64_M2_MASK */ 6409, /* PseudoVFMADD_VF64_M4 */ 6417, /* PseudoVFMADD_VF64_M4_MASK */ 6424, /* PseudoVFMADD_VF64_M8 */ 6432, /* PseudoVFMADD_VF64_M8_MASK */ 6439, /* PseudoVFMADD_VV_M1 */ 6447, /* PseudoVFMADD_VV_M1_MASK */ 6454, /* PseudoVFMADD_VV_M2 */ 6462, /* PseudoVFMADD_VV_M2_MASK */ 6469, /* PseudoVFMADD_VV_M4 */ 6477, /* PseudoVFMADD_VV_M4_MASK */ 6484, /* PseudoVFMADD_VV_M8 */ 6492, /* PseudoVFMADD_VV_M8_MASK */ 6499, /* PseudoVFMADD_VV_MF2 */ 6507, /* PseudoVFMADD_VV_MF2_MASK */ 6514, /* PseudoVFMADD_VV_MF4 */ 6522, /* PseudoVFMADD_VV_MF4_MASK */ 6529, /* PseudoVFMAX_VF16_M1 */ 6537, /* PseudoVFMAX_VF16_M1_MASK */ 6542, /* PseudoVFMAX_VF16_M1_TU */ 6550, /* PseudoVFMAX_VF16_M2 */ 6556, /* PseudoVFMAX_VF16_M2_MASK */ 6561, /* PseudoVFMAX_VF16_M2_TU */ 6569, /* PseudoVFMAX_VF16_M4 */ 6575, /* PseudoVFMAX_VF16_M4_MASK */ 6580, /* PseudoVFMAX_VF16_M4_TU */ 6588, /* PseudoVFMAX_VF16_M8 */ 6594, /* PseudoVFMAX_VF16_M8_MASK */ 6599, /* PseudoVFMAX_VF16_M8_TU */ 6607, /* PseudoVFMAX_VF16_MF2 */ 6613, /* PseudoVFMAX_VF16_MF2_MASK */ 6618, /* PseudoVFMAX_VF16_MF2_TU */ 6626, /* PseudoVFMAX_VF16_MF4 */ 6632, /* PseudoVFMAX_VF16_MF4_MASK */ 6637, /* PseudoVFMAX_VF16_MF4_TU */ 6645, /* PseudoVFMAX_VF32_M1 */ 6651, /* PseudoVFMAX_VF32_M1_MASK */ 6656, /* PseudoVFMAX_VF32_M1_TU */ 6664, /* PseudoVFMAX_VF32_M2 */ 6670, /* PseudoVFMAX_VF32_M2_MASK */ 6675, /* PseudoVFMAX_VF32_M2_TU */ 6683, /* PseudoVFMAX_VF32_M4 */ 6689, /* PseudoVFMAX_VF32_M4_MASK */ 6694, /* PseudoVFMAX_VF32_M4_TU */ 6702, /* PseudoVFMAX_VF32_M8 */ 6708, /* PseudoVFMAX_VF32_M8_MASK */ 6713, /* PseudoVFMAX_VF32_M8_TU */ 6721, /* PseudoVFMAX_VF32_MF2 */ 6727, /* PseudoVFMAX_VF32_MF2_MASK */ 6732, /* PseudoVFMAX_VF32_MF2_TU */ 6740, /* PseudoVFMAX_VF64_M1 */ 6746, /* PseudoVFMAX_VF64_M1_MASK */ 6751, /* PseudoVFMAX_VF64_M1_TU */ 6759, /* PseudoVFMAX_VF64_M2 */ 6765, /* PseudoVFMAX_VF64_M2_MASK */ 6770, /* PseudoVFMAX_VF64_M2_TU */ 6778, /* PseudoVFMAX_VF64_M4 */ 6784, /* PseudoVFMAX_VF64_M4_MASK */ 6789, /* PseudoVFMAX_VF64_M4_TU */ 6797, /* PseudoVFMAX_VF64_M8 */ 6803, /* PseudoVFMAX_VF64_M8_MASK */ 6808, /* PseudoVFMAX_VF64_M8_TU */ 6816, /* PseudoVFMAX_VV_M1 */ 6822, /* PseudoVFMAX_VV_M1_MASK */ 6827, /* PseudoVFMAX_VV_M1_TU */ 6835, /* PseudoVFMAX_VV_M2 */ 6841, /* PseudoVFMAX_VV_M2_MASK */ 6846, /* PseudoVFMAX_VV_M2_TU */ 6854, /* PseudoVFMAX_VV_M4 */ 6860, /* PseudoVFMAX_VV_M4_MASK */ 6865, /* PseudoVFMAX_VV_M4_TU */ 6873, /* PseudoVFMAX_VV_M8 */ 6879, /* PseudoVFMAX_VV_M8_MASK */ 6884, /* PseudoVFMAX_VV_M8_TU */ 6892, /* PseudoVFMAX_VV_MF2 */ 6898, /* PseudoVFMAX_VV_MF2_MASK */ 6903, /* PseudoVFMAX_VV_MF2_TU */ 6911, /* PseudoVFMAX_VV_MF4 */ 6917, /* PseudoVFMAX_VV_MF4_MASK */ 6922, /* PseudoVFMAX_VV_MF4_TU */ 6930, /* PseudoVFMERGE_VF16M_M1 */ 6936, /* PseudoVFMERGE_VF16M_M1_TU */ 6942, /* PseudoVFMERGE_VF16M_M2 */ 6949, /* PseudoVFMERGE_VF16M_M2_TU */ 6955, /* PseudoVFMERGE_VF16M_M4 */ 6962, /* PseudoVFMERGE_VF16M_M4_TU */ 6968, /* PseudoVFMERGE_VF16M_M8 */ 6975, /* PseudoVFMERGE_VF16M_M8_TU */ 6981, /* PseudoVFMERGE_VF16M_MF2 */ 6988, /* PseudoVFMERGE_VF16M_MF2_TU */ 6994, /* PseudoVFMERGE_VF16M_MF4 */ 7001, /* PseudoVFMERGE_VF16M_MF4_TU */ 7007, /* PseudoVFMERGE_VF32M_M1 */ 7014, /* PseudoVFMERGE_VF32M_M1_TU */ 7020, /* PseudoVFMERGE_VF32M_M2 */ 7027, /* PseudoVFMERGE_VF32M_M2_TU */ 7033, /* PseudoVFMERGE_VF32M_M4 */ 7040, /* PseudoVFMERGE_VF32M_M4_TU */ 7046, /* PseudoVFMERGE_VF32M_M8 */ 7053, /* PseudoVFMERGE_VF32M_M8_TU */ 7059, /* PseudoVFMERGE_VF32M_MF2 */ 7066, /* PseudoVFMERGE_VF32M_MF2_TU */ 7072, /* PseudoVFMERGE_VF64M_M1 */ 7079, /* PseudoVFMERGE_VF64M_M1_TU */ 7085, /* PseudoVFMERGE_VF64M_M2 */ 7092, /* PseudoVFMERGE_VF64M_M2_TU */ 7098, /* PseudoVFMERGE_VF64M_M4 */ 7105, /* PseudoVFMERGE_VF64M_M4_TU */ 7111, /* PseudoVFMERGE_VF64M_M8 */ 7118, /* PseudoVFMERGE_VF64M_M8_TU */ 7124, /* PseudoVFMIN_VF16_M1 */ 7131, /* PseudoVFMIN_VF16_M1_MASK */ 7136, /* PseudoVFMIN_VF16_M1_TU */ 7144, /* PseudoVFMIN_VF16_M2 */ 7150, /* PseudoVFMIN_VF16_M2_MASK */ 7155, /* PseudoVFMIN_VF16_M2_TU */ 7163, /* PseudoVFMIN_VF16_M4 */ 7169, /* PseudoVFMIN_VF16_M4_MASK */ 7174, /* PseudoVFMIN_VF16_M4_TU */ 7182, /* PseudoVFMIN_VF16_M8 */ 7188, /* PseudoVFMIN_VF16_M8_MASK */ 7193, /* PseudoVFMIN_VF16_M8_TU */ 7201, /* PseudoVFMIN_VF16_MF2 */ 7207, /* PseudoVFMIN_VF16_MF2_MASK */ 7212, /* PseudoVFMIN_VF16_MF2_TU */ 7220, /* PseudoVFMIN_VF16_MF4 */ 7226, /* PseudoVFMIN_VF16_MF4_MASK */ 7231, /* PseudoVFMIN_VF16_MF4_TU */ 7239, /* PseudoVFMIN_VF32_M1 */ 7245, /* PseudoVFMIN_VF32_M1_MASK */ 7250, /* PseudoVFMIN_VF32_M1_TU */ 7258, /* PseudoVFMIN_VF32_M2 */ 7264, /* PseudoVFMIN_VF32_M2_MASK */ 7269, /* PseudoVFMIN_VF32_M2_TU */ 7277, /* PseudoVFMIN_VF32_M4 */ 7283, /* PseudoVFMIN_VF32_M4_MASK */ 7288, /* PseudoVFMIN_VF32_M4_TU */ 7296, /* PseudoVFMIN_VF32_M8 */ 7302, /* PseudoVFMIN_VF32_M8_MASK */ 7307, /* PseudoVFMIN_VF32_M8_TU */ 7315, /* PseudoVFMIN_VF32_MF2 */ 7321, /* PseudoVFMIN_VF32_MF2_MASK */ 7326, /* PseudoVFMIN_VF32_MF2_TU */ 7334, /* PseudoVFMIN_VF64_M1 */ 7340, /* PseudoVFMIN_VF64_M1_MASK */ 7345, /* PseudoVFMIN_VF64_M1_TU */ 7353, /* PseudoVFMIN_VF64_M2 */ 7359, /* PseudoVFMIN_VF64_M2_MASK */ 7364, /* PseudoVFMIN_VF64_M2_TU */ 7372, /* PseudoVFMIN_VF64_M4 */ 7378, /* PseudoVFMIN_VF64_M4_MASK */ 7383, /* PseudoVFMIN_VF64_M4_TU */ 7391, /* PseudoVFMIN_VF64_M8 */ 7397, /* PseudoVFMIN_VF64_M8_MASK */ 7402, /* PseudoVFMIN_VF64_M8_TU */ 7410, /* PseudoVFMIN_VV_M1 */ 7416, /* PseudoVFMIN_VV_M1_MASK */ 7421, /* PseudoVFMIN_VV_M1_TU */ 7429, /* PseudoVFMIN_VV_M2 */ 7435, /* PseudoVFMIN_VV_M2_MASK */ 7440, /* PseudoVFMIN_VV_M2_TU */ 7448, /* PseudoVFMIN_VV_M4 */ 7454, /* PseudoVFMIN_VV_M4_MASK */ 7459, /* PseudoVFMIN_VV_M4_TU */ 7467, /* PseudoVFMIN_VV_M8 */ 7473, /* PseudoVFMIN_VV_M8_MASK */ 7478, /* PseudoVFMIN_VV_M8_TU */ 7486, /* PseudoVFMIN_VV_MF2 */ 7492, /* PseudoVFMIN_VV_MF2_MASK */ 7497, /* PseudoVFMIN_VV_MF2_TU */ 7505, /* PseudoVFMIN_VV_MF4 */ 7511, /* PseudoVFMIN_VV_MF4_MASK */ 7516, /* PseudoVFMIN_VV_MF4_TU */ 7524, /* PseudoVFMSAC_VF16_M1 */ 7530, /* PseudoVFMSAC_VF16_M1_MASK */ 7537, /* PseudoVFMSAC_VF16_M2 */ 7545, /* PseudoVFMSAC_VF16_M2_MASK */ 7552, /* PseudoVFMSAC_VF16_M4 */ 7560, /* PseudoVFMSAC_VF16_M4_MASK */ 7567, /* PseudoVFMSAC_VF16_M8 */ 7575, /* PseudoVFMSAC_VF16_M8_MASK */ 7582, /* PseudoVFMSAC_VF16_MF2 */ 7590, /* PseudoVFMSAC_VF16_MF2_MASK */ 7597, /* PseudoVFMSAC_VF16_MF4 */ 7605, /* PseudoVFMSAC_VF16_MF4_MASK */ 7612, /* PseudoVFMSAC_VF32_M1 */ 7620, /* PseudoVFMSAC_VF32_M1_MASK */ 7627, /* PseudoVFMSAC_VF32_M2 */ 7635, /* PseudoVFMSAC_VF32_M2_MASK */ 7642, /* PseudoVFMSAC_VF32_M4 */ 7650, /* PseudoVFMSAC_VF32_M4_MASK */ 7657, /* PseudoVFMSAC_VF32_M8 */ 7665, /* PseudoVFMSAC_VF32_M8_MASK */ 7672, /* PseudoVFMSAC_VF32_MF2 */ 7680, /* PseudoVFMSAC_VF32_MF2_MASK */ 7687, /* PseudoVFMSAC_VF64_M1 */ 7695, /* PseudoVFMSAC_VF64_M1_MASK */ 7702, /* PseudoVFMSAC_VF64_M2 */ 7710, /* PseudoVFMSAC_VF64_M2_MASK */ 7717, /* PseudoVFMSAC_VF64_M4 */ 7725, /* PseudoVFMSAC_VF64_M4_MASK */ 7732, /* PseudoVFMSAC_VF64_M8 */ 7740, /* PseudoVFMSAC_VF64_M8_MASK */ 7747, /* PseudoVFMSAC_VV_M1 */ 7755, /* PseudoVFMSAC_VV_M1_MASK */ 7762, /* PseudoVFMSAC_VV_M2 */ 7770, /* PseudoVFMSAC_VV_M2_MASK */ 7777, /* PseudoVFMSAC_VV_M4 */ 7785, /* PseudoVFMSAC_VV_M4_MASK */ 7792, /* PseudoVFMSAC_VV_M8 */ 7800, /* PseudoVFMSAC_VV_M8_MASK */ 7807, /* PseudoVFMSAC_VV_MF2 */ 7815, /* PseudoVFMSAC_VV_MF2_MASK */ 7822, /* PseudoVFMSAC_VV_MF4 */ 7830, /* PseudoVFMSAC_VV_MF4_MASK */ 7837, /* PseudoVFMSUB_VF16_M1 */ 7845, /* PseudoVFMSUB_VF16_M1_MASK */ 7852, /* PseudoVFMSUB_VF16_M2 */ 7860, /* PseudoVFMSUB_VF16_M2_MASK */ 7867, /* PseudoVFMSUB_VF16_M4 */ 7875, /* PseudoVFMSUB_VF16_M4_MASK */ 7882, /* PseudoVFMSUB_VF16_M8 */ 7890, /* PseudoVFMSUB_VF16_M8_MASK */ 7897, /* PseudoVFMSUB_VF16_MF2 */ 7905, /* PseudoVFMSUB_VF16_MF2_MASK */ 7912, /* PseudoVFMSUB_VF16_MF4 */ 7920, /* PseudoVFMSUB_VF16_MF4_MASK */ 7927, /* PseudoVFMSUB_VF32_M1 */ 7935, /* PseudoVFMSUB_VF32_M1_MASK */ 7942, /* PseudoVFMSUB_VF32_M2 */ 7950, /* PseudoVFMSUB_VF32_M2_MASK */ 7957, /* PseudoVFMSUB_VF32_M4 */ 7965, /* PseudoVFMSUB_VF32_M4_MASK */ 7972, /* PseudoVFMSUB_VF32_M8 */ 7980, /* PseudoVFMSUB_VF32_M8_MASK */ 7987, /* PseudoVFMSUB_VF32_MF2 */ 7995, /* PseudoVFMSUB_VF32_MF2_MASK */ 8002, /* PseudoVFMSUB_VF64_M1 */ 8010, /* PseudoVFMSUB_VF64_M1_MASK */ 8017, /* PseudoVFMSUB_VF64_M2 */ 8025, /* PseudoVFMSUB_VF64_M2_MASK */ 8032, /* PseudoVFMSUB_VF64_M4 */ 8040, /* PseudoVFMSUB_VF64_M4_MASK */ 8047, /* PseudoVFMSUB_VF64_M8 */ 8055, /* PseudoVFMSUB_VF64_M8_MASK */ 8062, /* PseudoVFMSUB_VV_M1 */ 8070, /* PseudoVFMSUB_VV_M1_MASK */ 8077, /* PseudoVFMSUB_VV_M2 */ 8085, /* PseudoVFMSUB_VV_M2_MASK */ 8092, /* PseudoVFMSUB_VV_M4 */ 8100, /* PseudoVFMSUB_VV_M4_MASK */ 8107, /* PseudoVFMSUB_VV_M8 */ 8115, /* PseudoVFMSUB_VV_M8_MASK */ 8122, /* PseudoVFMSUB_VV_MF2 */ 8130, /* PseudoVFMSUB_VV_MF2_MASK */ 8137, /* PseudoVFMSUB_VV_MF4 */ 8145, /* PseudoVFMSUB_VV_MF4_MASK */ 8152, /* PseudoVFMUL_VF16_M1 */ 8160, /* PseudoVFMUL_VF16_M1_MASK */ 8165, /* PseudoVFMUL_VF16_M1_TU */ 8173, /* PseudoVFMUL_VF16_M2 */ 8179, /* PseudoVFMUL_VF16_M2_MASK */ 8184, /* PseudoVFMUL_VF16_M2_TU */ 8192, /* PseudoVFMUL_VF16_M4 */ 8198, /* PseudoVFMUL_VF16_M4_MASK */ 8203, /* PseudoVFMUL_VF16_M4_TU */ 8211, /* PseudoVFMUL_VF16_M8 */ 8217, /* PseudoVFMUL_VF16_M8_MASK */ 8222, /* PseudoVFMUL_VF16_M8_TU */ 8230, /* PseudoVFMUL_VF16_MF2 */ 8236, /* PseudoVFMUL_VF16_MF2_MASK */ 8241, /* PseudoVFMUL_VF16_MF2_TU */ 8249, /* PseudoVFMUL_VF16_MF4 */ 8255, /* PseudoVFMUL_VF16_MF4_MASK */ 8260, /* PseudoVFMUL_VF16_MF4_TU */ 8268, /* PseudoVFMUL_VF32_M1 */ 8274, /* PseudoVFMUL_VF32_M1_MASK */ 8279, /* PseudoVFMUL_VF32_M1_TU */ 8287, /* PseudoVFMUL_VF32_M2 */ 8293, /* PseudoVFMUL_VF32_M2_MASK */ 8298, /* PseudoVFMUL_VF32_M2_TU */ 8306, /* PseudoVFMUL_VF32_M4 */ 8312, /* PseudoVFMUL_VF32_M4_MASK */ 8317, /* PseudoVFMUL_VF32_M4_TU */ 8325, /* PseudoVFMUL_VF32_M8 */ 8331, /* PseudoVFMUL_VF32_M8_MASK */ 8336, /* PseudoVFMUL_VF32_M8_TU */ 8344, /* PseudoVFMUL_VF32_MF2 */ 8350, /* PseudoVFMUL_VF32_MF2_MASK */ 8355, /* PseudoVFMUL_VF32_MF2_TU */ 8363, /* PseudoVFMUL_VF64_M1 */ 8369, /* PseudoVFMUL_VF64_M1_MASK */ 8374, /* PseudoVFMUL_VF64_M1_TU */ 8382, /* PseudoVFMUL_VF64_M2 */ 8388, /* PseudoVFMUL_VF64_M2_MASK */ 8393, /* PseudoVFMUL_VF64_M2_TU */ 8401, /* PseudoVFMUL_VF64_M4 */ 8407, /* PseudoVFMUL_VF64_M4_MASK */ 8412, /* PseudoVFMUL_VF64_M4_TU */ 8420, /* PseudoVFMUL_VF64_M8 */ 8426, /* PseudoVFMUL_VF64_M8_MASK */ 8431, /* PseudoVFMUL_VF64_M8_TU */ 8439, /* PseudoVFMUL_VV_M1 */ 8445, /* PseudoVFMUL_VV_M1_MASK */ 8450, /* PseudoVFMUL_VV_M1_TU */ 8458, /* PseudoVFMUL_VV_M2 */ 8464, /* PseudoVFMUL_VV_M2_MASK */ 8469, /* PseudoVFMUL_VV_M2_TU */ 8477, /* PseudoVFMUL_VV_M4 */ 8483, /* PseudoVFMUL_VV_M4_MASK */ 8488, /* PseudoVFMUL_VV_M4_TU */ 8496, /* PseudoVFMUL_VV_M8 */ 8502, /* PseudoVFMUL_VV_M8_MASK */ 8507, /* PseudoVFMUL_VV_M8_TU */ 8515, /* PseudoVFMUL_VV_MF2 */ 8521, /* PseudoVFMUL_VV_MF2_MASK */ 8526, /* PseudoVFMUL_VV_MF2_TU */ 8534, /* PseudoVFMUL_VV_MF4 */ 8540, /* PseudoVFMUL_VV_MF4_MASK */ 8545, /* PseudoVFMUL_VV_MF4_TU */ 8553, /* PseudoVFMV_F16_S_M1 */ 8559, /* PseudoVFMV_F16_S_M2 */ 8562, /* PseudoVFMV_F16_S_M4 */ 8565, /* PseudoVFMV_F16_S_M8 */ 8568, /* PseudoVFMV_F16_S_MF2 */ 8571, /* PseudoVFMV_F16_S_MF4 */ 8574, /* PseudoVFMV_F32_S_M1 */ 8577, /* PseudoVFMV_F32_S_M2 */ 8580, /* PseudoVFMV_F32_S_M4 */ 8583, /* PseudoVFMV_F32_S_M8 */ 8586, /* PseudoVFMV_F32_S_MF2 */ 8589, /* PseudoVFMV_F64_S_M1 */ 8592, /* PseudoVFMV_F64_S_M2 */ 8595, /* PseudoVFMV_F64_S_M4 */ 8598, /* PseudoVFMV_F64_S_M8 */ 8601, /* PseudoVFMV_S_F16_M1 */ 8604, /* PseudoVFMV_S_F16_M2 */ 8609, /* PseudoVFMV_S_F16_M4 */ 8614, /* PseudoVFMV_S_F16_M8 */ 8619, /* PseudoVFMV_S_F16_MF2 */ 8624, /* PseudoVFMV_S_F16_MF4 */ 8629, /* PseudoVFMV_S_F32_M1 */ 8634, /* PseudoVFMV_S_F32_M2 */ 8639, /* PseudoVFMV_S_F32_M4 */ 8644, /* PseudoVFMV_S_F32_M8 */ 8649, /* PseudoVFMV_S_F32_MF2 */ 8654, /* PseudoVFMV_S_F64_M1 */ 8659, /* PseudoVFMV_S_F64_M2 */ 8664, /* PseudoVFMV_S_F64_M4 */ 8669, /* PseudoVFMV_S_F64_M8 */ 8674, /* PseudoVFMV_V_F16_M1 */ 8679, /* PseudoVFMV_V_F16_M1_TU */ 8683, /* PseudoVFMV_V_F16_M2 */ 8688, /* PseudoVFMV_V_F16_M2_TU */ 8692, /* PseudoVFMV_V_F16_M4 */ 8697, /* PseudoVFMV_V_F16_M4_TU */ 8701, /* PseudoVFMV_V_F16_M8 */ 8706, /* PseudoVFMV_V_F16_M8_TU */ 8710, /* PseudoVFMV_V_F16_MF2 */ 8715, /* PseudoVFMV_V_F16_MF2_TU */ 8719, /* PseudoVFMV_V_F16_MF4 */ 8724, /* PseudoVFMV_V_F16_MF4_TU */ 8728, /* PseudoVFMV_V_F32_M1 */ 8733, /* PseudoVFMV_V_F32_M1_TU */ 8737, /* PseudoVFMV_V_F32_M2 */ 8742, /* PseudoVFMV_V_F32_M2_TU */ 8746, /* PseudoVFMV_V_F32_M4 */ 8751, /* PseudoVFMV_V_F32_M4_TU */ 8755, /* PseudoVFMV_V_F32_M8 */ 8760, /* PseudoVFMV_V_F32_M8_TU */ 8764, /* PseudoVFMV_V_F32_MF2 */ 8769, /* PseudoVFMV_V_F32_MF2_TU */ 8773, /* PseudoVFMV_V_F64_M1 */ 8778, /* PseudoVFMV_V_F64_M1_TU */ 8782, /* PseudoVFMV_V_F64_M2 */ 8787, /* PseudoVFMV_V_F64_M2_TU */ 8791, /* PseudoVFMV_V_F64_M4 */ 8796, /* PseudoVFMV_V_F64_M4_TU */ 8800, /* PseudoVFMV_V_F64_M8 */ 8805, /* PseudoVFMV_V_F64_M8_TU */ 8809, /* PseudoVFNCVT_F_F_W_M1 */ 8814, /* PseudoVFNCVT_F_F_W_M1_MASK */ 8818, /* PseudoVFNCVT_F_F_W_M1_TU */ 8825, /* PseudoVFNCVT_F_F_W_M2 */ 8830, /* PseudoVFNCVT_F_F_W_M2_MASK */ 8834, /* PseudoVFNCVT_F_F_W_M2_TU */ 8841, /* PseudoVFNCVT_F_F_W_M4 */ 8846, /* PseudoVFNCVT_F_F_W_M4_MASK */ 8850, /* PseudoVFNCVT_F_F_W_M4_TU */ 8857, /* PseudoVFNCVT_F_F_W_MF2 */ 8862, /* PseudoVFNCVT_F_F_W_MF2_MASK */ 8866, /* PseudoVFNCVT_F_F_W_MF2_TU */ 8873, /* PseudoVFNCVT_F_F_W_MF4 */ 8878, /* PseudoVFNCVT_F_F_W_MF4_MASK */ 8882, /* PseudoVFNCVT_F_F_W_MF4_TU */ 8889, /* PseudoVFNCVT_F_XU_W_M1 */ 8894, /* PseudoVFNCVT_F_XU_W_M1_MASK */ 8898, /* PseudoVFNCVT_F_XU_W_M1_TU */ 8905, /* PseudoVFNCVT_F_XU_W_M2 */ 8910, /* PseudoVFNCVT_F_XU_W_M2_MASK */ 8914, /* PseudoVFNCVT_F_XU_W_M2_TU */ 8921, /* PseudoVFNCVT_F_XU_W_M4 */ 8926, /* PseudoVFNCVT_F_XU_W_M4_MASK */ 8930, /* PseudoVFNCVT_F_XU_W_M4_TU */ 8937, /* PseudoVFNCVT_F_XU_W_MF2 */ 8942, /* PseudoVFNCVT_F_XU_W_MF2_MASK */ 8946, /* PseudoVFNCVT_F_XU_W_MF2_TU */ 8953, /* PseudoVFNCVT_F_XU_W_MF4 */ 8958, /* PseudoVFNCVT_F_XU_W_MF4_MASK */ 8962, /* PseudoVFNCVT_F_XU_W_MF4_TU */ 8969, /* PseudoVFNCVT_F_X_W_M1 */ 8974, /* PseudoVFNCVT_F_X_W_M1_MASK */ 8978, /* PseudoVFNCVT_F_X_W_M1_TU */ 8985, /* PseudoVFNCVT_F_X_W_M2 */ 8990, /* PseudoVFNCVT_F_X_W_M2_MASK */ 8994, /* PseudoVFNCVT_F_X_W_M2_TU */ 9001, /* PseudoVFNCVT_F_X_W_M4 */ 9006, /* PseudoVFNCVT_F_X_W_M4_MASK */ 9010, /* PseudoVFNCVT_F_X_W_M4_TU */ 9017, /* PseudoVFNCVT_F_X_W_MF2 */ 9022, /* PseudoVFNCVT_F_X_W_MF2_MASK */ 9026, /* PseudoVFNCVT_F_X_W_MF2_TU */ 9033, /* PseudoVFNCVT_F_X_W_MF4 */ 9038, /* PseudoVFNCVT_F_X_W_MF4_MASK */ 9042, /* PseudoVFNCVT_F_X_W_MF4_TU */ 9049, /* PseudoVFNCVT_RM_F_XU_W_M1_MASK */ 9054, /* PseudoVFNCVT_RM_F_XU_W_M2_MASK */ 9062, /* PseudoVFNCVT_RM_F_XU_W_M4_MASK */ 9070, /* PseudoVFNCVT_RM_F_XU_W_MF2_MASK */ 9078, /* PseudoVFNCVT_RM_F_XU_W_MF4_MASK */ 9086, /* PseudoVFNCVT_RM_F_X_W_M1_MASK */ 9094, /* PseudoVFNCVT_RM_F_X_W_M2_MASK */ 9102, /* PseudoVFNCVT_RM_F_X_W_M4_MASK */ 9110, /* PseudoVFNCVT_RM_F_X_W_MF2_MASK */ 9118, /* PseudoVFNCVT_RM_F_X_W_MF4_MASK */ 9126, /* PseudoVFNCVT_RM_XU_F_W_M1_MASK */ 9134, /* PseudoVFNCVT_RM_XU_F_W_M2_MASK */ 9142, /* PseudoVFNCVT_RM_XU_F_W_M4_MASK */ 9150, /* PseudoVFNCVT_RM_XU_F_W_MF2_MASK */ 9158, /* PseudoVFNCVT_RM_XU_F_W_MF4_MASK */ 9166, /* PseudoVFNCVT_RM_XU_F_W_MF8_MASK */ 9174, /* PseudoVFNCVT_RM_X_F_W_M1_MASK */ 9182, /* PseudoVFNCVT_RM_X_F_W_M2_MASK */ 9190, /* PseudoVFNCVT_RM_X_F_W_M4_MASK */ 9198, /* PseudoVFNCVT_RM_X_F_W_MF2_MASK */ 9206, /* PseudoVFNCVT_RM_X_F_W_MF4_MASK */ 9214, /* PseudoVFNCVT_RM_X_F_W_MF8_MASK */ 9222, /* PseudoVFNCVT_ROD_F_F_W_M1 */ 9230, /* PseudoVFNCVT_ROD_F_F_W_M1_MASK */ 9234, /* PseudoVFNCVT_ROD_F_F_W_M1_TU */ 9241, /* PseudoVFNCVT_ROD_F_F_W_M2 */ 9246, /* PseudoVFNCVT_ROD_F_F_W_M2_MASK */ 9250, /* PseudoVFNCVT_ROD_F_F_W_M2_TU */ 9257, /* PseudoVFNCVT_ROD_F_F_W_M4 */ 9262, /* PseudoVFNCVT_ROD_F_F_W_M4_MASK */ 9266, /* PseudoVFNCVT_ROD_F_F_W_M4_TU */ 9273, /* PseudoVFNCVT_ROD_F_F_W_MF2 */ 9278, /* PseudoVFNCVT_ROD_F_F_W_MF2_MASK */ 9282, /* PseudoVFNCVT_ROD_F_F_W_MF2_TU */ 9289, /* PseudoVFNCVT_ROD_F_F_W_MF4 */ 9294, /* PseudoVFNCVT_ROD_F_F_W_MF4_MASK */ 9298, /* PseudoVFNCVT_ROD_F_F_W_MF4_TU */ 9305, /* PseudoVFNCVT_RTZ_XU_F_W_M1 */ 9310, /* PseudoVFNCVT_RTZ_XU_F_W_M1_MASK */ 9314, /* PseudoVFNCVT_RTZ_XU_F_W_M1_TU */ 9321, /* PseudoVFNCVT_RTZ_XU_F_W_M2 */ 9326, /* PseudoVFNCVT_RTZ_XU_F_W_M2_MASK */ 9330, /* PseudoVFNCVT_RTZ_XU_F_W_M2_TU */ 9337, /* PseudoVFNCVT_RTZ_XU_F_W_M4 */ 9342, /* PseudoVFNCVT_RTZ_XU_F_W_M4_MASK */ 9346, /* PseudoVFNCVT_RTZ_XU_F_W_M4_TU */ 9353, /* PseudoVFNCVT_RTZ_XU_F_W_MF2 */ 9358, /* PseudoVFNCVT_RTZ_XU_F_W_MF2_MASK */ 9362, /* PseudoVFNCVT_RTZ_XU_F_W_MF2_TU */ 9369, /* PseudoVFNCVT_RTZ_XU_F_W_MF4 */ 9374, /* PseudoVFNCVT_RTZ_XU_F_W_MF4_MASK */ 9378, /* PseudoVFNCVT_RTZ_XU_F_W_MF4_TU */ 9385, /* PseudoVFNCVT_RTZ_XU_F_W_MF8 */ 9390, /* PseudoVFNCVT_RTZ_XU_F_W_MF8_MASK */ 9394, /* PseudoVFNCVT_RTZ_XU_F_W_MF8_TU */ 9401, /* PseudoVFNCVT_RTZ_X_F_W_M1 */ 9406, /* PseudoVFNCVT_RTZ_X_F_W_M1_MASK */ 9410, /* PseudoVFNCVT_RTZ_X_F_W_M1_TU */ 9417, /* PseudoVFNCVT_RTZ_X_F_W_M2 */ 9422, /* PseudoVFNCVT_RTZ_X_F_W_M2_MASK */ 9426, /* PseudoVFNCVT_RTZ_X_F_W_M2_TU */ 9433, /* PseudoVFNCVT_RTZ_X_F_W_M4 */ 9438, /* PseudoVFNCVT_RTZ_X_F_W_M4_MASK */ 9442, /* PseudoVFNCVT_RTZ_X_F_W_M4_TU */ 9449, /* PseudoVFNCVT_RTZ_X_F_W_MF2 */ 9454, /* PseudoVFNCVT_RTZ_X_F_W_MF2_MASK */ 9458, /* PseudoVFNCVT_RTZ_X_F_W_MF2_TU */ 9465, /* PseudoVFNCVT_RTZ_X_F_W_MF4 */ 9470, /* PseudoVFNCVT_RTZ_X_F_W_MF4_MASK */ 9474, /* PseudoVFNCVT_RTZ_X_F_W_MF4_TU */ 9481, /* PseudoVFNCVT_RTZ_X_F_W_MF8 */ 9486, /* PseudoVFNCVT_RTZ_X_F_W_MF8_MASK */ 9490, /* PseudoVFNCVT_RTZ_X_F_W_MF8_TU */ 9497, /* PseudoVFNCVT_XU_F_W_M1 */ 9502, /* PseudoVFNCVT_XU_F_W_M1_MASK */ 9506, /* PseudoVFNCVT_XU_F_W_M1_TU */ 9513, /* PseudoVFNCVT_XU_F_W_M2 */ 9518, /* PseudoVFNCVT_XU_F_W_M2_MASK */ 9522, /* PseudoVFNCVT_XU_F_W_M2_TU */ 9529, /* PseudoVFNCVT_XU_F_W_M4 */ 9534, /* PseudoVFNCVT_XU_F_W_M4_MASK */ 9538, /* PseudoVFNCVT_XU_F_W_M4_TU */ 9545, /* PseudoVFNCVT_XU_F_W_MF2 */ 9550, /* PseudoVFNCVT_XU_F_W_MF2_MASK */ 9554, /* PseudoVFNCVT_XU_F_W_MF2_TU */ 9561, /* PseudoVFNCVT_XU_F_W_MF4 */ 9566, /* PseudoVFNCVT_XU_F_W_MF4_MASK */ 9570, /* PseudoVFNCVT_XU_F_W_MF4_TU */ 9577, /* PseudoVFNCVT_XU_F_W_MF8 */ 9582, /* PseudoVFNCVT_XU_F_W_MF8_MASK */ 9586, /* PseudoVFNCVT_XU_F_W_MF8_TU */ 9593, /* PseudoVFNCVT_X_F_W_M1 */ 9598, /* PseudoVFNCVT_X_F_W_M1_MASK */ 9602, /* PseudoVFNCVT_X_F_W_M1_TU */ 9609, /* PseudoVFNCVT_X_F_W_M2 */ 9614, /* PseudoVFNCVT_X_F_W_M2_MASK */ 9618, /* PseudoVFNCVT_X_F_W_M2_TU */ 9625, /* PseudoVFNCVT_X_F_W_M4 */ 9630, /* PseudoVFNCVT_X_F_W_M4_MASK */ 9634, /* PseudoVFNCVT_X_F_W_M4_TU */ 9641, /* PseudoVFNCVT_X_F_W_MF2 */ 9646, /* PseudoVFNCVT_X_F_W_MF2_MASK */ 9650, /* PseudoVFNCVT_X_F_W_MF2_TU */ 9657, /* PseudoVFNCVT_X_F_W_MF4 */ 9662, /* PseudoVFNCVT_X_F_W_MF4_MASK */ 9666, /* PseudoVFNCVT_X_F_W_MF4_TU */ 9673, /* PseudoVFNCVT_X_F_W_MF8 */ 9678, /* PseudoVFNCVT_X_F_W_MF8_MASK */ 9682, /* PseudoVFNCVT_X_F_W_MF8_TU */ 9689, /* PseudoVFNMACC_VF16_M1 */ 9694, /* PseudoVFNMACC_VF16_M1_MASK */ 9701, /* PseudoVFNMACC_VF16_M2 */ 9709, /* PseudoVFNMACC_VF16_M2_MASK */ 9716, /* PseudoVFNMACC_VF16_M4 */ 9724, /* PseudoVFNMACC_VF16_M4_MASK */ 9731, /* PseudoVFNMACC_VF16_M8 */ 9739, /* PseudoVFNMACC_VF16_M8_MASK */ 9746, /* PseudoVFNMACC_VF16_MF2 */ 9754, /* PseudoVFNMACC_VF16_MF2_MASK */ 9761, /* PseudoVFNMACC_VF16_MF4 */ 9769, /* PseudoVFNMACC_VF16_MF4_MASK */ 9776, /* PseudoVFNMACC_VF32_M1 */ 9784, /* PseudoVFNMACC_VF32_M1_MASK */ 9791, /* PseudoVFNMACC_VF32_M2 */ 9799, /* PseudoVFNMACC_VF32_M2_MASK */ 9806, /* PseudoVFNMACC_VF32_M4 */ 9814, /* PseudoVFNMACC_VF32_M4_MASK */ 9821, /* PseudoVFNMACC_VF32_M8 */ 9829, /* PseudoVFNMACC_VF32_M8_MASK */ 9836, /* PseudoVFNMACC_VF32_MF2 */ 9844, /* PseudoVFNMACC_VF32_MF2_MASK */ 9851, /* PseudoVFNMACC_VF64_M1 */ 9859, /* PseudoVFNMACC_VF64_M1_MASK */ 9866, /* PseudoVFNMACC_VF64_M2 */ 9874, /* PseudoVFNMACC_VF64_M2_MASK */ 9881, /* PseudoVFNMACC_VF64_M4 */ 9889, /* PseudoVFNMACC_VF64_M4_MASK */ 9896, /* PseudoVFNMACC_VF64_M8 */ 9904, /* PseudoVFNMACC_VF64_M8_MASK */ 9911, /* PseudoVFNMACC_VV_M1 */ 9919, /* PseudoVFNMACC_VV_M1_MASK */ 9926, /* PseudoVFNMACC_VV_M2 */ 9934, /* PseudoVFNMACC_VV_M2_MASK */ 9941, /* PseudoVFNMACC_VV_M4 */ 9949, /* PseudoVFNMACC_VV_M4_MASK */ 9956, /* PseudoVFNMACC_VV_M8 */ 9964, /* PseudoVFNMACC_VV_M8_MASK */ 9971, /* PseudoVFNMACC_VV_MF2 */ 9979, /* PseudoVFNMACC_VV_MF2_MASK */ 9986, /* PseudoVFNMACC_VV_MF4 */ 9994, /* PseudoVFNMACC_VV_MF4_MASK */ 10001, /* PseudoVFNMADD_VF16_M1 */ 10009, /* PseudoVFNMADD_VF16_M1_MASK */ 10016, /* PseudoVFNMADD_VF16_M2 */ 10024, /* PseudoVFNMADD_VF16_M2_MASK */ 10031, /* PseudoVFNMADD_VF16_M4 */ 10039, /* PseudoVFNMADD_VF16_M4_MASK */ 10046, /* PseudoVFNMADD_VF16_M8 */ 10054, /* PseudoVFNMADD_VF16_M8_MASK */ 10061, /* PseudoVFNMADD_VF16_MF2 */ 10069, /* PseudoVFNMADD_VF16_MF2_MASK */ 10076, /* PseudoVFNMADD_VF16_MF4 */ 10084, /* PseudoVFNMADD_VF16_MF4_MASK */ 10091, /* PseudoVFNMADD_VF32_M1 */ 10099, /* PseudoVFNMADD_VF32_M1_MASK */ 10106, /* PseudoVFNMADD_VF32_M2 */ 10114, /* PseudoVFNMADD_VF32_M2_MASK */ 10121, /* PseudoVFNMADD_VF32_M4 */ 10129, /* PseudoVFNMADD_VF32_M4_MASK */ 10136, /* PseudoVFNMADD_VF32_M8 */ 10144, /* PseudoVFNMADD_VF32_M8_MASK */ 10151, /* PseudoVFNMADD_VF32_MF2 */ 10159, /* PseudoVFNMADD_VF32_MF2_MASK */ 10166, /* PseudoVFNMADD_VF64_M1 */ 10174, /* PseudoVFNMADD_VF64_M1_MASK */ 10181, /* PseudoVFNMADD_VF64_M2 */ 10189, /* PseudoVFNMADD_VF64_M2_MASK */ 10196, /* PseudoVFNMADD_VF64_M4 */ 10204, /* PseudoVFNMADD_VF64_M4_MASK */ 10211, /* PseudoVFNMADD_VF64_M8 */ 10219, /* PseudoVFNMADD_VF64_M8_MASK */ 10226, /* PseudoVFNMADD_VV_M1 */ 10234, /* PseudoVFNMADD_VV_M1_MASK */ 10241, /* PseudoVFNMADD_VV_M2 */ 10249, /* PseudoVFNMADD_VV_M2_MASK */ 10256, /* PseudoVFNMADD_VV_M4 */ 10264, /* PseudoVFNMADD_VV_M4_MASK */ 10271, /* PseudoVFNMADD_VV_M8 */ 10279, /* PseudoVFNMADD_VV_M8_MASK */ 10286, /* PseudoVFNMADD_VV_MF2 */ 10294, /* PseudoVFNMADD_VV_MF2_MASK */ 10301, /* PseudoVFNMADD_VV_MF4 */ 10309, /* PseudoVFNMADD_VV_MF4_MASK */ 10316, /* PseudoVFNMSAC_VF16_M1 */ 10324, /* PseudoVFNMSAC_VF16_M1_MASK */ 10331, /* PseudoVFNMSAC_VF16_M2 */ 10339, /* PseudoVFNMSAC_VF16_M2_MASK */ 10346, /* PseudoVFNMSAC_VF16_M4 */ 10354, /* PseudoVFNMSAC_VF16_M4_MASK */ 10361, /* PseudoVFNMSAC_VF16_M8 */ 10369, /* PseudoVFNMSAC_VF16_M8_MASK */ 10376, /* PseudoVFNMSAC_VF16_MF2 */ 10384, /* PseudoVFNMSAC_VF16_MF2_MASK */ 10391, /* PseudoVFNMSAC_VF16_MF4 */ 10399, /* PseudoVFNMSAC_VF16_MF4_MASK */ 10406, /* PseudoVFNMSAC_VF32_M1 */ 10414, /* PseudoVFNMSAC_VF32_M1_MASK */ 10421, /* PseudoVFNMSAC_VF32_M2 */ 10429, /* PseudoVFNMSAC_VF32_M2_MASK */ 10436, /* PseudoVFNMSAC_VF32_M4 */ 10444, /* PseudoVFNMSAC_VF32_M4_MASK */ 10451, /* PseudoVFNMSAC_VF32_M8 */ 10459, /* PseudoVFNMSAC_VF32_M8_MASK */ 10466, /* PseudoVFNMSAC_VF32_MF2 */ 10474, /* PseudoVFNMSAC_VF32_MF2_MASK */ 10481, /* PseudoVFNMSAC_VF64_M1 */ 10489, /* PseudoVFNMSAC_VF64_M1_MASK */ 10496, /* PseudoVFNMSAC_VF64_M2 */ 10504, /* PseudoVFNMSAC_VF64_M2_MASK */ 10511, /* PseudoVFNMSAC_VF64_M4 */ 10519, /* PseudoVFNMSAC_VF64_M4_MASK */ 10526, /* PseudoVFNMSAC_VF64_M8 */ 10534, /* PseudoVFNMSAC_VF64_M8_MASK */ 10541, /* PseudoVFNMSAC_VV_M1 */ 10549, /* PseudoVFNMSAC_VV_M1_MASK */ 10556, /* PseudoVFNMSAC_VV_M2 */ 10564, /* PseudoVFNMSAC_VV_M2_MASK */ 10571, /* PseudoVFNMSAC_VV_M4 */ 10579, /* PseudoVFNMSAC_VV_M4_MASK */ 10586, /* PseudoVFNMSAC_VV_M8 */ 10594, /* PseudoVFNMSAC_VV_M8_MASK */ 10601, /* PseudoVFNMSAC_VV_MF2 */ 10609, /* PseudoVFNMSAC_VV_MF2_MASK */ 10616, /* PseudoVFNMSAC_VV_MF4 */ 10624, /* PseudoVFNMSAC_VV_MF4_MASK */ 10631, /* PseudoVFNMSUB_VF16_M1 */ 10639, /* PseudoVFNMSUB_VF16_M1_MASK */ 10646, /* PseudoVFNMSUB_VF16_M2 */ 10654, /* PseudoVFNMSUB_VF16_M2_MASK */ 10661, /* PseudoVFNMSUB_VF16_M4 */ 10669, /* PseudoVFNMSUB_VF16_M4_MASK */ 10676, /* PseudoVFNMSUB_VF16_M8 */ 10684, /* PseudoVFNMSUB_VF16_M8_MASK */ 10691, /* PseudoVFNMSUB_VF16_MF2 */ 10699, /* PseudoVFNMSUB_VF16_MF2_MASK */ 10706, /* PseudoVFNMSUB_VF16_MF4 */ 10714, /* PseudoVFNMSUB_VF16_MF4_MASK */ 10721, /* PseudoVFNMSUB_VF32_M1 */ 10729, /* PseudoVFNMSUB_VF32_M1_MASK */ 10736, /* PseudoVFNMSUB_VF32_M2 */ 10744, /* PseudoVFNMSUB_VF32_M2_MASK */ 10751, /* PseudoVFNMSUB_VF32_M4 */ 10759, /* PseudoVFNMSUB_VF32_M4_MASK */ 10766, /* PseudoVFNMSUB_VF32_M8 */ 10774, /* PseudoVFNMSUB_VF32_M8_MASK */ 10781, /* PseudoVFNMSUB_VF32_MF2 */ 10789, /* PseudoVFNMSUB_VF32_MF2_MASK */ 10796, /* PseudoVFNMSUB_VF64_M1 */ 10804, /* PseudoVFNMSUB_VF64_M1_MASK */ 10811, /* PseudoVFNMSUB_VF64_M2 */ 10819, /* PseudoVFNMSUB_VF64_M2_MASK */ 10826, /* PseudoVFNMSUB_VF64_M4 */ 10834, /* PseudoVFNMSUB_VF64_M4_MASK */ 10841, /* PseudoVFNMSUB_VF64_M8 */ 10849, /* PseudoVFNMSUB_VF64_M8_MASK */ 10856, /* PseudoVFNMSUB_VV_M1 */ 10864, /* PseudoVFNMSUB_VV_M1_MASK */ 10871, /* PseudoVFNMSUB_VV_M2 */ 10879, /* PseudoVFNMSUB_VV_M2_MASK */ 10886, /* PseudoVFNMSUB_VV_M4 */ 10894, /* PseudoVFNMSUB_VV_M4_MASK */ 10901, /* PseudoVFNMSUB_VV_M8 */ 10909, /* PseudoVFNMSUB_VV_M8_MASK */ 10916, /* PseudoVFNMSUB_VV_MF2 */ 10924, /* PseudoVFNMSUB_VV_MF2_MASK */ 10931, /* PseudoVFNMSUB_VV_MF4 */ 10939, /* PseudoVFNMSUB_VV_MF4_MASK */ 10946, /* PseudoVFRDIV_VF16_M1 */ 10954, /* PseudoVFRDIV_VF16_M1_MASK */ 10959, /* PseudoVFRDIV_VF16_M1_TU */ 10967, /* PseudoVFRDIV_VF16_M2 */ 10973, /* PseudoVFRDIV_VF16_M2_MASK */ 10978, /* PseudoVFRDIV_VF16_M2_TU */ 10986, /* PseudoVFRDIV_VF16_M4 */ 10992, /* PseudoVFRDIV_VF16_M4_MASK */ 10997, /* PseudoVFRDIV_VF16_M4_TU */ 11005, /* PseudoVFRDIV_VF16_M8 */ 11011, /* PseudoVFRDIV_VF16_M8_MASK */ 11016, /* PseudoVFRDIV_VF16_M8_TU */ 11024, /* PseudoVFRDIV_VF16_MF2 */ 11030, /* PseudoVFRDIV_VF16_MF2_MASK */ 11035, /* PseudoVFRDIV_VF16_MF2_TU */ 11043, /* PseudoVFRDIV_VF16_MF4 */ 11049, /* PseudoVFRDIV_VF16_MF4_MASK */ 11054, /* PseudoVFRDIV_VF16_MF4_TU */ 11062, /* PseudoVFRDIV_VF32_M1 */ 11068, /* PseudoVFRDIV_VF32_M1_MASK */ 11073, /* PseudoVFRDIV_VF32_M1_TU */ 11081, /* PseudoVFRDIV_VF32_M2 */ 11087, /* PseudoVFRDIV_VF32_M2_MASK */ 11092, /* PseudoVFRDIV_VF32_M2_TU */ 11100, /* PseudoVFRDIV_VF32_M4 */ 11106, /* PseudoVFRDIV_VF32_M4_MASK */ 11111, /* PseudoVFRDIV_VF32_M4_TU */ 11119, /* PseudoVFRDIV_VF32_M8 */ 11125, /* PseudoVFRDIV_VF32_M8_MASK */ 11130, /* PseudoVFRDIV_VF32_M8_TU */ 11138, /* PseudoVFRDIV_VF32_MF2 */ 11144, /* PseudoVFRDIV_VF32_MF2_MASK */ 11149, /* PseudoVFRDIV_VF32_MF2_TU */ 11157, /* PseudoVFRDIV_VF64_M1 */ 11163, /* PseudoVFRDIV_VF64_M1_MASK */ 11168, /* PseudoVFRDIV_VF64_M1_TU */ 11176, /* PseudoVFRDIV_VF64_M2 */ 11182, /* PseudoVFRDIV_VF64_M2_MASK */ 11187, /* PseudoVFRDIV_VF64_M2_TU */ 11195, /* PseudoVFRDIV_VF64_M4 */ 11201, /* PseudoVFRDIV_VF64_M4_MASK */ 11206, /* PseudoVFRDIV_VF64_M4_TU */ 11214, /* PseudoVFRDIV_VF64_M8 */ 11220, /* PseudoVFRDIV_VF64_M8_MASK */ 11225, /* PseudoVFRDIV_VF64_M8_TU */ 11233, /* PseudoVFREC7_V_M1 */ 11239, /* PseudoVFREC7_V_M1_MASK */ 11243, /* PseudoVFREC7_V_M1_TU */ 11250, /* PseudoVFREC7_V_M2 */ 11255, /* PseudoVFREC7_V_M2_MASK */ 11259, /* PseudoVFREC7_V_M2_TU */ 11266, /* PseudoVFREC7_V_M4 */ 11271, /* PseudoVFREC7_V_M4_MASK */ 11275, /* PseudoVFREC7_V_M4_TU */ 11282, /* PseudoVFREC7_V_M8 */ 11287, /* PseudoVFREC7_V_M8_MASK */ 11291, /* PseudoVFREC7_V_M8_TU */ 11298, /* PseudoVFREC7_V_MF2 */ 11303, /* PseudoVFREC7_V_MF2_MASK */ 11307, /* PseudoVFREC7_V_MF2_TU */ 11314, /* PseudoVFREC7_V_MF4 */ 11319, /* PseudoVFREC7_V_MF4_MASK */ 11323, /* PseudoVFREC7_V_MF4_TU */ 11330, /* PseudoVFREDMAX_VS_M1 */ 11335, /* PseudoVFREDMAX_VS_M1_MASK */ 11341, /* PseudoVFREDMAX_VS_M2 */ 11348, /* PseudoVFREDMAX_VS_M2_MASK */ 11354, /* PseudoVFREDMAX_VS_M4 */ 11361, /* PseudoVFREDMAX_VS_M4_MASK */ 11367, /* PseudoVFREDMAX_VS_M8 */ 11374, /* PseudoVFREDMAX_VS_M8_MASK */ 11380, /* PseudoVFREDMAX_VS_MF2 */ 11387, /* PseudoVFREDMAX_VS_MF2_MASK */ 11393, /* PseudoVFREDMAX_VS_MF4 */ 11400, /* PseudoVFREDMAX_VS_MF4_MASK */ 11406, /* PseudoVFREDMIN_VS_M1 */ 11413, /* PseudoVFREDMIN_VS_M1_MASK */ 11419, /* PseudoVFREDMIN_VS_M2 */ 11426, /* PseudoVFREDMIN_VS_M2_MASK */ 11432, /* PseudoVFREDMIN_VS_M4 */ 11439, /* PseudoVFREDMIN_VS_M4_MASK */ 11445, /* PseudoVFREDMIN_VS_M8 */ 11452, /* PseudoVFREDMIN_VS_M8_MASK */ 11458, /* PseudoVFREDMIN_VS_MF2 */ 11465, /* PseudoVFREDMIN_VS_MF2_MASK */ 11471, /* PseudoVFREDMIN_VS_MF4 */ 11478, /* PseudoVFREDMIN_VS_MF4_MASK */ 11484, /* PseudoVFREDOSUM_VS_M1 */ 11491, /* PseudoVFREDOSUM_VS_M1_MASK */ 11497, /* PseudoVFREDOSUM_VS_M2 */ 11504, /* PseudoVFREDOSUM_VS_M2_MASK */ 11510, /* PseudoVFREDOSUM_VS_M4 */ 11517, /* PseudoVFREDOSUM_VS_M4_MASK */ 11523, /* PseudoVFREDOSUM_VS_M8 */ 11530, /* PseudoVFREDOSUM_VS_M8_MASK */ 11536, /* PseudoVFREDOSUM_VS_MF2 */ 11543, /* PseudoVFREDOSUM_VS_MF2_MASK */ 11549, /* PseudoVFREDOSUM_VS_MF4 */ 11556, /* PseudoVFREDOSUM_VS_MF4_MASK */ 11562, /* PseudoVFREDUSUM_VS_M1 */ 11569, /* PseudoVFREDUSUM_VS_M1_MASK */ 11575, /* PseudoVFREDUSUM_VS_M2 */ 11582, /* PseudoVFREDUSUM_VS_M2_MASK */ 11588, /* PseudoVFREDUSUM_VS_M4 */ 11595, /* PseudoVFREDUSUM_VS_M4_MASK */ 11601, /* PseudoVFREDUSUM_VS_M8 */ 11608, /* PseudoVFREDUSUM_VS_M8_MASK */ 11614, /* PseudoVFREDUSUM_VS_MF2 */ 11621, /* PseudoVFREDUSUM_VS_MF2_MASK */ 11627, /* PseudoVFREDUSUM_VS_MF4 */ 11634, /* PseudoVFREDUSUM_VS_MF4_MASK */ 11640, /* PseudoVFROUND_NOEXCEPT_V_M1_MASK */ 11647, /* PseudoVFROUND_NOEXCEPT_V_M2_MASK */ 11654, /* PseudoVFROUND_NOEXCEPT_V_M4_MASK */ 11661, /* PseudoVFROUND_NOEXCEPT_V_M8_MASK */ 11668, /* PseudoVFROUND_NOEXCEPT_V_MF2_MASK */ 11675, /* PseudoVFROUND_NOEXCEPT_V_MF4_MASK */ 11682, /* PseudoVFRSQRT7_V_M1 */ 11689, /* PseudoVFRSQRT7_V_M1_MASK */ 11693, /* PseudoVFRSQRT7_V_M1_TU */ 11700, /* PseudoVFRSQRT7_V_M2 */ 11705, /* PseudoVFRSQRT7_V_M2_MASK */ 11709, /* PseudoVFRSQRT7_V_M2_TU */ 11716, /* PseudoVFRSQRT7_V_M4 */ 11721, /* PseudoVFRSQRT7_V_M4_MASK */ 11725, /* PseudoVFRSQRT7_V_M4_TU */ 11732, /* PseudoVFRSQRT7_V_M8 */ 11737, /* PseudoVFRSQRT7_V_M8_MASK */ 11741, /* PseudoVFRSQRT7_V_M8_TU */ 11748, /* PseudoVFRSQRT7_V_MF2 */ 11753, /* PseudoVFRSQRT7_V_MF2_MASK */ 11757, /* PseudoVFRSQRT7_V_MF2_TU */ 11764, /* PseudoVFRSQRT7_V_MF4 */ 11769, /* PseudoVFRSQRT7_V_MF4_MASK */ 11773, /* PseudoVFRSQRT7_V_MF4_TU */ 11780, /* PseudoVFRSUB_VF16_M1 */ 11785, /* PseudoVFRSUB_VF16_M1_MASK */ 11790, /* PseudoVFRSUB_VF16_M1_TU */ 11798, /* PseudoVFRSUB_VF16_M2 */ 11804, /* PseudoVFRSUB_VF16_M2_MASK */ 11809, /* PseudoVFRSUB_VF16_M2_TU */ 11817, /* PseudoVFRSUB_VF16_M4 */ 11823, /* PseudoVFRSUB_VF16_M4_MASK */ 11828, /* PseudoVFRSUB_VF16_M4_TU */ 11836, /* PseudoVFRSUB_VF16_M8 */ 11842, /* PseudoVFRSUB_VF16_M8_MASK */ 11847, /* PseudoVFRSUB_VF16_M8_TU */ 11855, /* PseudoVFRSUB_VF16_MF2 */ 11861, /* PseudoVFRSUB_VF16_MF2_MASK */ 11866, /* PseudoVFRSUB_VF16_MF2_TU */ 11874, /* PseudoVFRSUB_VF16_MF4 */ 11880, /* PseudoVFRSUB_VF16_MF4_MASK */ 11885, /* PseudoVFRSUB_VF16_MF4_TU */ 11893, /* PseudoVFRSUB_VF32_M1 */ 11899, /* PseudoVFRSUB_VF32_M1_MASK */ 11904, /* PseudoVFRSUB_VF32_M1_TU */ 11912, /* PseudoVFRSUB_VF32_M2 */ 11918, /* PseudoVFRSUB_VF32_M2_MASK */ 11923, /* PseudoVFRSUB_VF32_M2_TU */ 11931, /* PseudoVFRSUB_VF32_M4 */ 11937, /* PseudoVFRSUB_VF32_M4_MASK */ 11942, /* PseudoVFRSUB_VF32_M4_TU */ 11950, /* PseudoVFRSUB_VF32_M8 */ 11956, /* PseudoVFRSUB_VF32_M8_MASK */ 11961, /* PseudoVFRSUB_VF32_M8_TU */ 11969, /* PseudoVFRSUB_VF32_MF2 */ 11975, /* PseudoVFRSUB_VF32_MF2_MASK */ 11980, /* PseudoVFRSUB_VF32_MF2_TU */ 11988, /* PseudoVFRSUB_VF64_M1 */ 11994, /* PseudoVFRSUB_VF64_M1_MASK */ 11999, /* PseudoVFRSUB_VF64_M1_TU */ 12007, /* PseudoVFRSUB_VF64_M2 */ 12013, /* PseudoVFRSUB_VF64_M2_MASK */ 12018, /* PseudoVFRSUB_VF64_M2_TU */ 12026, /* PseudoVFRSUB_VF64_M4 */ 12032, /* PseudoVFRSUB_VF64_M4_MASK */ 12037, /* PseudoVFRSUB_VF64_M4_TU */ 12045, /* PseudoVFRSUB_VF64_M8 */ 12051, /* PseudoVFRSUB_VF64_M8_MASK */ 12056, /* PseudoVFRSUB_VF64_M8_TU */ 12064, /* PseudoVFSGNJN_VF16_M1 */ 12070, /* PseudoVFSGNJN_VF16_M1_MASK */ 12075, /* PseudoVFSGNJN_VF16_M1_TU */ 12083, /* PseudoVFSGNJN_VF16_M2 */ 12089, /* PseudoVFSGNJN_VF16_M2_MASK */ 12094, /* PseudoVFSGNJN_VF16_M2_TU */ 12102, /* PseudoVFSGNJN_VF16_M4 */ 12108, /* PseudoVFSGNJN_VF16_M4_MASK */ 12113, /* PseudoVFSGNJN_VF16_M4_TU */ 12121, /* PseudoVFSGNJN_VF16_M8 */ 12127, /* PseudoVFSGNJN_VF16_M8_MASK */ 12132, /* PseudoVFSGNJN_VF16_M8_TU */ 12140, /* PseudoVFSGNJN_VF16_MF2 */ 12146, /* PseudoVFSGNJN_VF16_MF2_MASK */ 12151, /* PseudoVFSGNJN_VF16_MF2_TU */ 12159, /* PseudoVFSGNJN_VF16_MF4 */ 12165, /* PseudoVFSGNJN_VF16_MF4_MASK */ 12170, /* PseudoVFSGNJN_VF16_MF4_TU */ 12178, /* PseudoVFSGNJN_VF32_M1 */ 12184, /* PseudoVFSGNJN_VF32_M1_MASK */ 12189, /* PseudoVFSGNJN_VF32_M1_TU */ 12197, /* PseudoVFSGNJN_VF32_M2 */ 12203, /* PseudoVFSGNJN_VF32_M2_MASK */ 12208, /* PseudoVFSGNJN_VF32_M2_TU */ 12216, /* PseudoVFSGNJN_VF32_M4 */ 12222, /* PseudoVFSGNJN_VF32_M4_MASK */ 12227, /* PseudoVFSGNJN_VF32_M4_TU */ 12235, /* PseudoVFSGNJN_VF32_M8 */ 12241, /* PseudoVFSGNJN_VF32_M8_MASK */ 12246, /* PseudoVFSGNJN_VF32_M8_TU */ 12254, /* PseudoVFSGNJN_VF32_MF2 */ 12260, /* PseudoVFSGNJN_VF32_MF2_MASK */ 12265, /* PseudoVFSGNJN_VF32_MF2_TU */ 12273, /* PseudoVFSGNJN_VF64_M1 */ 12279, /* PseudoVFSGNJN_VF64_M1_MASK */ 12284, /* PseudoVFSGNJN_VF64_M1_TU */ 12292, /* PseudoVFSGNJN_VF64_M2 */ 12298, /* PseudoVFSGNJN_VF64_M2_MASK */ 12303, /* PseudoVFSGNJN_VF64_M2_TU */ 12311, /* PseudoVFSGNJN_VF64_M4 */ 12317, /* PseudoVFSGNJN_VF64_M4_MASK */ 12322, /* PseudoVFSGNJN_VF64_M4_TU */ 12330, /* PseudoVFSGNJN_VF64_M8 */ 12336, /* PseudoVFSGNJN_VF64_M8_MASK */ 12341, /* PseudoVFSGNJN_VF64_M8_TU */ 12349, /* PseudoVFSGNJN_VV_M1 */ 12355, /* PseudoVFSGNJN_VV_M1_MASK */ 12360, /* PseudoVFSGNJN_VV_M1_TU */ 12368, /* PseudoVFSGNJN_VV_M2 */ 12374, /* PseudoVFSGNJN_VV_M2_MASK */ 12379, /* PseudoVFSGNJN_VV_M2_TU */ 12387, /* PseudoVFSGNJN_VV_M4 */ 12393, /* PseudoVFSGNJN_VV_M4_MASK */ 12398, /* PseudoVFSGNJN_VV_M4_TU */ 12406, /* PseudoVFSGNJN_VV_M8 */ 12412, /* PseudoVFSGNJN_VV_M8_MASK */ 12417, /* PseudoVFSGNJN_VV_M8_TU */ 12425, /* PseudoVFSGNJN_VV_MF2 */ 12431, /* PseudoVFSGNJN_VV_MF2_MASK */ 12436, /* PseudoVFSGNJN_VV_MF2_TU */ 12444, /* PseudoVFSGNJN_VV_MF4 */ 12450, /* PseudoVFSGNJN_VV_MF4_MASK */ 12455, /* PseudoVFSGNJN_VV_MF4_TU */ 12463, /* PseudoVFSGNJX_VF16_M1 */ 12469, /* PseudoVFSGNJX_VF16_M1_MASK */ 12474, /* PseudoVFSGNJX_VF16_M1_TU */ 12482, /* PseudoVFSGNJX_VF16_M2 */ 12488, /* PseudoVFSGNJX_VF16_M2_MASK */ 12493, /* PseudoVFSGNJX_VF16_M2_TU */ 12501, /* PseudoVFSGNJX_VF16_M4 */ 12507, /* PseudoVFSGNJX_VF16_M4_MASK */ 12512, /* PseudoVFSGNJX_VF16_M4_TU */ 12520, /* PseudoVFSGNJX_VF16_M8 */ 12526, /* PseudoVFSGNJX_VF16_M8_MASK */ 12531, /* PseudoVFSGNJX_VF16_M8_TU */ 12539, /* PseudoVFSGNJX_VF16_MF2 */ 12545, /* PseudoVFSGNJX_VF16_MF2_MASK */ 12550, /* PseudoVFSGNJX_VF16_MF2_TU */ 12558, /* PseudoVFSGNJX_VF16_MF4 */ 12564, /* PseudoVFSGNJX_VF16_MF4_MASK */ 12569, /* PseudoVFSGNJX_VF16_MF4_TU */ 12577, /* PseudoVFSGNJX_VF32_M1 */ 12583, /* PseudoVFSGNJX_VF32_M1_MASK */ 12588, /* PseudoVFSGNJX_VF32_M1_TU */ 12596, /* PseudoVFSGNJX_VF32_M2 */ 12602, /* PseudoVFSGNJX_VF32_M2_MASK */ 12607, /* PseudoVFSGNJX_VF32_M2_TU */ 12615, /* PseudoVFSGNJX_VF32_M4 */ 12621, /* PseudoVFSGNJX_VF32_M4_MASK */ 12626, /* PseudoVFSGNJX_VF32_M4_TU */ 12634, /* PseudoVFSGNJX_VF32_M8 */ 12640, /* PseudoVFSGNJX_VF32_M8_MASK */ 12645, /* PseudoVFSGNJX_VF32_M8_TU */ 12653, /* PseudoVFSGNJX_VF32_MF2 */ 12659, /* PseudoVFSGNJX_VF32_MF2_MASK */ 12664, /* PseudoVFSGNJX_VF32_MF2_TU */ 12672, /* PseudoVFSGNJX_VF64_M1 */ 12678, /* PseudoVFSGNJX_VF64_M1_MASK */ 12683, /* PseudoVFSGNJX_VF64_M1_TU */ 12691, /* PseudoVFSGNJX_VF64_M2 */ 12697, /* PseudoVFSGNJX_VF64_M2_MASK */ 12702, /* PseudoVFSGNJX_VF64_M2_TU */ 12710, /* PseudoVFSGNJX_VF64_M4 */ 12716, /* PseudoVFSGNJX_VF64_M4_MASK */ 12721, /* PseudoVFSGNJX_VF64_M4_TU */ 12729, /* PseudoVFSGNJX_VF64_M8 */ 12735, /* PseudoVFSGNJX_VF64_M8_MASK */ 12740, /* PseudoVFSGNJX_VF64_M8_TU */ 12748, /* PseudoVFSGNJX_VV_M1 */ 12754, /* PseudoVFSGNJX_VV_M1_MASK */ 12759, /* PseudoVFSGNJX_VV_M1_TU */ 12767, /* PseudoVFSGNJX_VV_M2 */ 12773, /* PseudoVFSGNJX_VV_M2_MASK */ 12778, /* PseudoVFSGNJX_VV_M2_TU */ 12786, /* PseudoVFSGNJX_VV_M4 */ 12792, /* PseudoVFSGNJX_VV_M4_MASK */ 12797, /* PseudoVFSGNJX_VV_M4_TU */ 12805, /* PseudoVFSGNJX_VV_M8 */ 12811, /* PseudoVFSGNJX_VV_M8_MASK */ 12816, /* PseudoVFSGNJX_VV_M8_TU */ 12824, /* PseudoVFSGNJX_VV_MF2 */ 12830, /* PseudoVFSGNJX_VV_MF2_MASK */ 12835, /* PseudoVFSGNJX_VV_MF2_TU */ 12843, /* PseudoVFSGNJX_VV_MF4 */ 12849, /* PseudoVFSGNJX_VV_MF4_MASK */ 12854, /* PseudoVFSGNJX_VV_MF4_TU */ 12862, /* PseudoVFSGNJ_VF16_M1 */ 12868, /* PseudoVFSGNJ_VF16_M1_MASK */ 12873, /* PseudoVFSGNJ_VF16_M1_TU */ 12881, /* PseudoVFSGNJ_VF16_M2 */ 12887, /* PseudoVFSGNJ_VF16_M2_MASK */ 12892, /* PseudoVFSGNJ_VF16_M2_TU */ 12900, /* PseudoVFSGNJ_VF16_M4 */ 12906, /* PseudoVFSGNJ_VF16_M4_MASK */ 12911, /* PseudoVFSGNJ_VF16_M4_TU */ 12919, /* PseudoVFSGNJ_VF16_M8 */ 12925, /* PseudoVFSGNJ_VF16_M8_MASK */ 12930, /* PseudoVFSGNJ_VF16_M8_TU */ 12938, /* PseudoVFSGNJ_VF16_MF2 */ 12944, /* PseudoVFSGNJ_VF16_MF2_MASK */ 12949, /* PseudoVFSGNJ_VF16_MF2_TU */ 12957, /* PseudoVFSGNJ_VF16_MF4 */ 12963, /* PseudoVFSGNJ_VF16_MF4_MASK */ 12968, /* PseudoVFSGNJ_VF16_MF4_TU */ 12976, /* PseudoVFSGNJ_VF32_M1 */ 12982, /* PseudoVFSGNJ_VF32_M1_MASK */ 12987, /* PseudoVFSGNJ_VF32_M1_TU */ 12995, /* PseudoVFSGNJ_VF32_M2 */ 13001, /* PseudoVFSGNJ_VF32_M2_MASK */ 13006, /* PseudoVFSGNJ_VF32_M2_TU */ 13014, /* PseudoVFSGNJ_VF32_M4 */ 13020, /* PseudoVFSGNJ_VF32_M4_MASK */ 13025, /* PseudoVFSGNJ_VF32_M4_TU */ 13033, /* PseudoVFSGNJ_VF32_M8 */ 13039, /* PseudoVFSGNJ_VF32_M8_MASK */ 13044, /* PseudoVFSGNJ_VF32_M8_TU */ 13052, /* PseudoVFSGNJ_VF32_MF2 */ 13058, /* PseudoVFSGNJ_VF32_MF2_MASK */ 13063, /* PseudoVFSGNJ_VF32_MF2_TU */ 13071, /* PseudoVFSGNJ_VF64_M1 */ 13077, /* PseudoVFSGNJ_VF64_M1_MASK */ 13082, /* PseudoVFSGNJ_VF64_M1_TU */ 13090, /* PseudoVFSGNJ_VF64_M2 */ 13096, /* PseudoVFSGNJ_VF64_M2_MASK */ 13101, /* PseudoVFSGNJ_VF64_M2_TU */ 13109, /* PseudoVFSGNJ_VF64_M4 */ 13115, /* PseudoVFSGNJ_VF64_M4_MASK */ 13120, /* PseudoVFSGNJ_VF64_M4_TU */ 13128, /* PseudoVFSGNJ_VF64_M8 */ 13134, /* PseudoVFSGNJ_VF64_M8_MASK */ 13139, /* PseudoVFSGNJ_VF64_M8_TU */ 13147, /* PseudoVFSGNJ_VV_M1 */ 13153, /* PseudoVFSGNJ_VV_M1_MASK */ 13158, /* PseudoVFSGNJ_VV_M1_TU */ 13166, /* PseudoVFSGNJ_VV_M2 */ 13172, /* PseudoVFSGNJ_VV_M2_MASK */ 13177, /* PseudoVFSGNJ_VV_M2_TU */ 13185, /* PseudoVFSGNJ_VV_M4 */ 13191, /* PseudoVFSGNJ_VV_M4_MASK */ 13196, /* PseudoVFSGNJ_VV_M4_TU */ 13204, /* PseudoVFSGNJ_VV_M8 */ 13210, /* PseudoVFSGNJ_VV_M8_MASK */ 13215, /* PseudoVFSGNJ_VV_M8_TU */ 13223, /* PseudoVFSGNJ_VV_MF2 */ 13229, /* PseudoVFSGNJ_VV_MF2_MASK */ 13234, /* PseudoVFSGNJ_VV_MF2_TU */ 13242, /* PseudoVFSGNJ_VV_MF4 */ 13248, /* PseudoVFSGNJ_VV_MF4_MASK */ 13253, /* PseudoVFSGNJ_VV_MF4_TU */ 13261, /* PseudoVFSLIDE1DOWN_VF16_M1 */ 13267, /* PseudoVFSLIDE1DOWN_VF16_M1_MASK */ 13272, /* PseudoVFSLIDE1DOWN_VF16_M1_TU */ 13280, /* PseudoVFSLIDE1DOWN_VF16_M2 */ 13286, /* PseudoVFSLIDE1DOWN_VF16_M2_MASK */ 13291, /* PseudoVFSLIDE1DOWN_VF16_M2_TU */ 13299, /* PseudoVFSLIDE1DOWN_VF16_M4 */ 13305, /* PseudoVFSLIDE1DOWN_VF16_M4_MASK */ 13310, /* PseudoVFSLIDE1DOWN_VF16_M4_TU */ 13318, /* PseudoVFSLIDE1DOWN_VF16_M8 */ 13324, /* PseudoVFSLIDE1DOWN_VF16_M8_MASK */ 13329, /* PseudoVFSLIDE1DOWN_VF16_M8_TU */ 13337, /* PseudoVFSLIDE1DOWN_VF16_MF2 */ 13343, /* PseudoVFSLIDE1DOWN_VF16_MF2_MASK */ 13348, /* PseudoVFSLIDE1DOWN_VF16_MF2_TU */ 13356, /* PseudoVFSLIDE1DOWN_VF16_MF4 */ 13362, /* PseudoVFSLIDE1DOWN_VF16_MF4_MASK */ 13367, /* PseudoVFSLIDE1DOWN_VF16_MF4_TU */ 13375, /* PseudoVFSLIDE1DOWN_VF32_M1 */ 13381, /* PseudoVFSLIDE1DOWN_VF32_M1_MASK */ 13386, /* PseudoVFSLIDE1DOWN_VF32_M1_TU */ 13394, /* PseudoVFSLIDE1DOWN_VF32_M2 */ 13400, /* PseudoVFSLIDE1DOWN_VF32_M2_MASK */ 13405, /* PseudoVFSLIDE1DOWN_VF32_M2_TU */ 13413, /* PseudoVFSLIDE1DOWN_VF32_M4 */ 13419, /* PseudoVFSLIDE1DOWN_VF32_M4_MASK */ 13424, /* PseudoVFSLIDE1DOWN_VF32_M4_TU */ 13432, /* PseudoVFSLIDE1DOWN_VF32_M8 */ 13438, /* PseudoVFSLIDE1DOWN_VF32_M8_MASK */ 13443, /* PseudoVFSLIDE1DOWN_VF32_M8_TU */ 13451, /* PseudoVFSLIDE1DOWN_VF32_MF2 */ 13457, /* PseudoVFSLIDE1DOWN_VF32_MF2_MASK */ 13462, /* PseudoVFSLIDE1DOWN_VF32_MF2_TU */ 13470, /* PseudoVFSLIDE1DOWN_VF64_M1 */ 13476, /* PseudoVFSLIDE1DOWN_VF64_M1_MASK */ 13481, /* PseudoVFSLIDE1DOWN_VF64_M1_TU */ 13489, /* PseudoVFSLIDE1DOWN_VF64_M2 */ 13495, /* PseudoVFSLIDE1DOWN_VF64_M2_MASK */ 13500, /* PseudoVFSLIDE1DOWN_VF64_M2_TU */ 13508, /* PseudoVFSLIDE1DOWN_VF64_M4 */ 13514, /* PseudoVFSLIDE1DOWN_VF64_M4_MASK */ 13519, /* PseudoVFSLIDE1DOWN_VF64_M4_TU */ 13527, /* PseudoVFSLIDE1DOWN_VF64_M8 */ 13533, /* PseudoVFSLIDE1DOWN_VF64_M8_MASK */ 13538, /* PseudoVFSLIDE1DOWN_VF64_M8_TU */ 13546, /* PseudoVFSLIDE1UP_VF16_M1 */ 13552, /* PseudoVFSLIDE1UP_VF16_M1_MASK */ 13557, /* PseudoVFSLIDE1UP_VF16_M1_TU */ 13565, /* PseudoVFSLIDE1UP_VF16_M2 */ 13571, /* PseudoVFSLIDE1UP_VF16_M2_MASK */ 13576, /* PseudoVFSLIDE1UP_VF16_M2_TU */ 13584, /* PseudoVFSLIDE1UP_VF16_M4 */ 13590, /* PseudoVFSLIDE1UP_VF16_M4_MASK */ 13595, /* PseudoVFSLIDE1UP_VF16_M4_TU */ 13603, /* PseudoVFSLIDE1UP_VF16_M8 */ 13609, /* PseudoVFSLIDE1UP_VF16_M8_MASK */ 13614, /* PseudoVFSLIDE1UP_VF16_M8_TU */ 13622, /* PseudoVFSLIDE1UP_VF16_MF2 */ 13628, /* PseudoVFSLIDE1UP_VF16_MF2_MASK */ 13633, /* PseudoVFSLIDE1UP_VF16_MF2_TU */ 13641, /* PseudoVFSLIDE1UP_VF16_MF4 */ 13647, /* PseudoVFSLIDE1UP_VF16_MF4_MASK */ 13652, /* PseudoVFSLIDE1UP_VF16_MF4_TU */ 13660, /* PseudoVFSLIDE1UP_VF32_M1 */ 13666, /* PseudoVFSLIDE1UP_VF32_M1_MASK */ 13671, /* PseudoVFSLIDE1UP_VF32_M1_TU */ 13679, /* PseudoVFSLIDE1UP_VF32_M2 */ 13685, /* PseudoVFSLIDE1UP_VF32_M2_MASK */ 13690, /* PseudoVFSLIDE1UP_VF32_M2_TU */ 13698, /* PseudoVFSLIDE1UP_VF32_M4 */ 13704, /* PseudoVFSLIDE1UP_VF32_M4_MASK */ 13709, /* PseudoVFSLIDE1UP_VF32_M4_TU */ 13717, /* PseudoVFSLIDE1UP_VF32_M8 */ 13723, /* PseudoVFSLIDE1UP_VF32_M8_MASK */ 13728, /* PseudoVFSLIDE1UP_VF32_M8_TU */ 13736, /* PseudoVFSLIDE1UP_VF32_MF2 */ 13742, /* PseudoVFSLIDE1UP_VF32_MF2_MASK */ 13747, /* PseudoVFSLIDE1UP_VF32_MF2_TU */ 13755, /* PseudoVFSLIDE1UP_VF64_M1 */ 13761, /* PseudoVFSLIDE1UP_VF64_M1_MASK */ 13766, /* PseudoVFSLIDE1UP_VF64_M1_TU */ 13774, /* PseudoVFSLIDE1UP_VF64_M2 */ 13780, /* PseudoVFSLIDE1UP_VF64_M2_MASK */ 13785, /* PseudoVFSLIDE1UP_VF64_M2_TU */ 13793, /* PseudoVFSLIDE1UP_VF64_M4 */ 13799, /* PseudoVFSLIDE1UP_VF64_M4_MASK */ 13804, /* PseudoVFSLIDE1UP_VF64_M4_TU */ 13812, /* PseudoVFSLIDE1UP_VF64_M8 */ 13818, /* PseudoVFSLIDE1UP_VF64_M8_MASK */ 13823, /* PseudoVFSLIDE1UP_VF64_M8_TU */ 13831, /* PseudoVFSQRT_V_M1 */ 13837, /* PseudoVFSQRT_V_M1_MASK */ 13841, /* PseudoVFSQRT_V_M1_TU */ 13848, /* PseudoVFSQRT_V_M2 */ 13853, /* PseudoVFSQRT_V_M2_MASK */ 13857, /* PseudoVFSQRT_V_M2_TU */ 13864, /* PseudoVFSQRT_V_M4 */ 13869, /* PseudoVFSQRT_V_M4_MASK */ 13873, /* PseudoVFSQRT_V_M4_TU */ 13880, /* PseudoVFSQRT_V_M8 */ 13885, /* PseudoVFSQRT_V_M8_MASK */ 13889, /* PseudoVFSQRT_V_M8_TU */ 13896, /* PseudoVFSQRT_V_MF2 */ 13901, /* PseudoVFSQRT_V_MF2_MASK */ 13905, /* PseudoVFSQRT_V_MF2_TU */ 13912, /* PseudoVFSQRT_V_MF4 */ 13917, /* PseudoVFSQRT_V_MF4_MASK */ 13921, /* PseudoVFSQRT_V_MF4_TU */ 13928, /* PseudoVFSUB_VF16_M1 */ 13933, /* PseudoVFSUB_VF16_M1_MASK */ 13938, /* PseudoVFSUB_VF16_M1_TU */ 13946, /* PseudoVFSUB_VF16_M2 */ 13952, /* PseudoVFSUB_VF16_M2_MASK */ 13957, /* PseudoVFSUB_VF16_M2_TU */ 13965, /* PseudoVFSUB_VF16_M4 */ 13971, /* PseudoVFSUB_VF16_M4_MASK */ 13976, /* PseudoVFSUB_VF16_M4_TU */ 13984, /* PseudoVFSUB_VF16_M8 */ 13990, /* PseudoVFSUB_VF16_M8_MASK */ 13995, /* PseudoVFSUB_VF16_M8_TU */ 14003, /* PseudoVFSUB_VF16_MF2 */ 14009, /* PseudoVFSUB_VF16_MF2_MASK */ 14014, /* PseudoVFSUB_VF16_MF2_TU */ 14022, /* PseudoVFSUB_VF16_MF4 */ 14028, /* PseudoVFSUB_VF16_MF4_MASK */ 14033, /* PseudoVFSUB_VF16_MF4_TU */ 14041, /* PseudoVFSUB_VF32_M1 */ 14047, /* PseudoVFSUB_VF32_M1_MASK */ 14052, /* PseudoVFSUB_VF32_M1_TU */ 14060, /* PseudoVFSUB_VF32_M2 */ 14066, /* PseudoVFSUB_VF32_M2_MASK */ 14071, /* PseudoVFSUB_VF32_M2_TU */ 14079, /* PseudoVFSUB_VF32_M4 */ 14085, /* PseudoVFSUB_VF32_M4_MASK */ 14090, /* PseudoVFSUB_VF32_M4_TU */ 14098, /* PseudoVFSUB_VF32_M8 */ 14104, /* PseudoVFSUB_VF32_M8_MASK */ 14109, /* PseudoVFSUB_VF32_M8_TU */ 14117, /* PseudoVFSUB_VF32_MF2 */ 14123, /* PseudoVFSUB_VF32_MF2_MASK */ 14128, /* PseudoVFSUB_VF32_MF2_TU */ 14136, /* PseudoVFSUB_VF64_M1 */ 14142, /* PseudoVFSUB_VF64_M1_MASK */ 14147, /* PseudoVFSUB_VF64_M1_TU */ 14155, /* PseudoVFSUB_VF64_M2 */ 14161, /* PseudoVFSUB_VF64_M2_MASK */ 14166, /* PseudoVFSUB_VF64_M2_TU */ 14174, /* PseudoVFSUB_VF64_M4 */ 14180, /* PseudoVFSUB_VF64_M4_MASK */ 14185, /* PseudoVFSUB_VF64_M4_TU */ 14193, /* PseudoVFSUB_VF64_M8 */ 14199, /* PseudoVFSUB_VF64_M8_MASK */ 14204, /* PseudoVFSUB_VF64_M8_TU */ 14212, /* PseudoVFSUB_VV_M1 */ 14218, /* PseudoVFSUB_VV_M1_MASK */ 14223, /* PseudoVFSUB_VV_M1_TU */ 14231, /* PseudoVFSUB_VV_M2 */ 14237, /* PseudoVFSUB_VV_M2_MASK */ 14242, /* PseudoVFSUB_VV_M2_TU */ 14250, /* PseudoVFSUB_VV_M4 */ 14256, /* PseudoVFSUB_VV_M4_MASK */ 14261, /* PseudoVFSUB_VV_M4_TU */ 14269, /* PseudoVFSUB_VV_M8 */ 14275, /* PseudoVFSUB_VV_M8_MASK */ 14280, /* PseudoVFSUB_VV_M8_TU */ 14288, /* PseudoVFSUB_VV_MF2 */ 14294, /* PseudoVFSUB_VV_MF2_MASK */ 14299, /* PseudoVFSUB_VV_MF2_TU */ 14307, /* PseudoVFSUB_VV_MF4 */ 14313, /* PseudoVFSUB_VV_MF4_MASK */ 14318, /* PseudoVFSUB_VV_MF4_TU */ 14326, /* PseudoVFWADD_VF16_M1 */ 14332, /* PseudoVFWADD_VF16_M1_MASK */ 14337, /* PseudoVFWADD_VF16_M1_TU */ 14345, /* PseudoVFWADD_VF16_M2 */ 14351, /* PseudoVFWADD_VF16_M2_MASK */ 14356, /* PseudoVFWADD_VF16_M2_TU */ 14364, /* PseudoVFWADD_VF16_M4 */ 14370, /* PseudoVFWADD_VF16_M4_MASK */ 14375, /* PseudoVFWADD_VF16_M4_TU */ 14383, /* PseudoVFWADD_VF16_MF2 */ 14389, /* PseudoVFWADD_VF16_MF2_MASK */ 14394, /* PseudoVFWADD_VF16_MF2_TU */ 14402, /* PseudoVFWADD_VF16_MF4 */ 14408, /* PseudoVFWADD_VF16_MF4_MASK */ 14413, /* PseudoVFWADD_VF16_MF4_TU */ 14421, /* PseudoVFWADD_VF32_M1 */ 14427, /* PseudoVFWADD_VF32_M1_MASK */ 14432, /* PseudoVFWADD_VF32_M1_TU */ 14440, /* PseudoVFWADD_VF32_M2 */ 14446, /* PseudoVFWADD_VF32_M2_MASK */ 14451, /* PseudoVFWADD_VF32_M2_TU */ 14459, /* PseudoVFWADD_VF32_M4 */ 14465, /* PseudoVFWADD_VF32_M4_MASK */ 14470, /* PseudoVFWADD_VF32_M4_TU */ 14478, /* PseudoVFWADD_VF32_MF2 */ 14484, /* PseudoVFWADD_VF32_MF2_MASK */ 14489, /* PseudoVFWADD_VF32_MF2_TU */ 14497, /* PseudoVFWADD_VV_M1 */ 14503, /* PseudoVFWADD_VV_M1_MASK */ 14508, /* PseudoVFWADD_VV_M1_TU */ 14516, /* PseudoVFWADD_VV_M2 */ 14522, /* PseudoVFWADD_VV_M2_MASK */ 14527, /* PseudoVFWADD_VV_M2_TU */ 14535, /* PseudoVFWADD_VV_M4 */ 14541, /* PseudoVFWADD_VV_M4_MASK */ 14546, /* PseudoVFWADD_VV_M4_TU */ 14554, /* PseudoVFWADD_VV_MF2 */ 14560, /* PseudoVFWADD_VV_MF2_MASK */ 14565, /* PseudoVFWADD_VV_MF2_TU */ 14573, /* PseudoVFWADD_VV_MF4 */ 14579, /* PseudoVFWADD_VV_MF4_MASK */ 14584, /* PseudoVFWADD_VV_MF4_TU */ 14592, /* PseudoVFWADD_WF16_M1 */ 14598, /* PseudoVFWADD_WF16_M1_MASK */ 14603, /* PseudoVFWADD_WF16_M1_TU */ 14611, /* PseudoVFWADD_WF16_M2 */ 14617, /* PseudoVFWADD_WF16_M2_MASK */ 14622, /* PseudoVFWADD_WF16_M2_TU */ 14630, /* PseudoVFWADD_WF16_M4 */ 14636, /* PseudoVFWADD_WF16_M4_MASK */ 14641, /* PseudoVFWADD_WF16_M4_TU */ 14649, /* PseudoVFWADD_WF16_MF2 */ 14655, /* PseudoVFWADD_WF16_MF2_MASK */ 14660, /* PseudoVFWADD_WF16_MF2_TU */ 14668, /* PseudoVFWADD_WF16_MF4 */ 14674, /* PseudoVFWADD_WF16_MF4_MASK */ 14679, /* PseudoVFWADD_WF16_MF4_TU */ 14687, /* PseudoVFWADD_WF32_M1 */ 14693, /* PseudoVFWADD_WF32_M1_MASK */ 14698, /* PseudoVFWADD_WF32_M1_TU */ 14706, /* PseudoVFWADD_WF32_M2 */ 14712, /* PseudoVFWADD_WF32_M2_MASK */ 14717, /* PseudoVFWADD_WF32_M2_TU */ 14725, /* PseudoVFWADD_WF32_M4 */ 14731, /* PseudoVFWADD_WF32_M4_MASK */ 14736, /* PseudoVFWADD_WF32_M4_TU */ 14744, /* PseudoVFWADD_WF32_MF2 */ 14750, /* PseudoVFWADD_WF32_MF2_MASK */ 14755, /* PseudoVFWADD_WF32_MF2_TU */ 14763, /* PseudoVFWADD_WV_M1 */ 14769, /* PseudoVFWADD_WV_M1_MASK */ 14774, /* PseudoVFWADD_WV_M1_MASK_TIED */ 14782, /* PseudoVFWADD_WV_M1_TIED */ 14789, /* PseudoVFWADD_WV_M1_TU */ 14795, /* PseudoVFWADD_WV_M2 */ 14801, /* PseudoVFWADD_WV_M2_MASK */ 14806, /* PseudoVFWADD_WV_M2_MASK_TIED */ 14814, /* PseudoVFWADD_WV_M2_TIED */ 14821, /* PseudoVFWADD_WV_M2_TU */ 14827, /* PseudoVFWADD_WV_M4 */ 14833, /* PseudoVFWADD_WV_M4_MASK */ 14838, /* PseudoVFWADD_WV_M4_MASK_TIED */ 14846, /* PseudoVFWADD_WV_M4_TIED */ 14853, /* PseudoVFWADD_WV_M4_TU */ 14859, /* PseudoVFWADD_WV_MF2 */ 14865, /* PseudoVFWADD_WV_MF2_MASK */ 14870, /* PseudoVFWADD_WV_MF2_MASK_TIED */ 14878, /* PseudoVFWADD_WV_MF2_TIED */ 14885, /* PseudoVFWADD_WV_MF2_TU */ 14891, /* PseudoVFWADD_WV_MF4 */ 14897, /* PseudoVFWADD_WV_MF4_MASK */ 14902, /* PseudoVFWADD_WV_MF4_MASK_TIED */ 14910, /* PseudoVFWADD_WV_MF4_TIED */ 14917, /* PseudoVFWADD_WV_MF4_TU */ 14923, /* PseudoVFWCVT_F_F_V_M1 */ 14929, /* PseudoVFWCVT_F_F_V_M1_MASK */ 14933, /* PseudoVFWCVT_F_F_V_M1_TU */ 14940, /* PseudoVFWCVT_F_F_V_M2 */ 14945, /* PseudoVFWCVT_F_F_V_M2_MASK */ 14949, /* PseudoVFWCVT_F_F_V_M2_TU */ 14956, /* PseudoVFWCVT_F_F_V_M4 */ 14961, /* PseudoVFWCVT_F_F_V_M4_MASK */ 14965, /* PseudoVFWCVT_F_F_V_M4_TU */ 14972, /* PseudoVFWCVT_F_F_V_MF2 */ 14977, /* PseudoVFWCVT_F_F_V_MF2_MASK */ 14981, /* PseudoVFWCVT_F_F_V_MF2_TU */ 14988, /* PseudoVFWCVT_F_F_V_MF4 */ 14993, /* PseudoVFWCVT_F_F_V_MF4_MASK */ 14997, /* PseudoVFWCVT_F_F_V_MF4_TU */ 15004, /* PseudoVFWCVT_F_XU_V_M1 */ 15009, /* PseudoVFWCVT_F_XU_V_M1_MASK */ 15013, /* PseudoVFWCVT_F_XU_V_M1_TU */ 15020, /* PseudoVFWCVT_F_XU_V_M2 */ 15025, /* PseudoVFWCVT_F_XU_V_M2_MASK */ 15029, /* PseudoVFWCVT_F_XU_V_M2_TU */ 15036, /* PseudoVFWCVT_F_XU_V_M4 */ 15041, /* PseudoVFWCVT_F_XU_V_M4_MASK */ 15045, /* PseudoVFWCVT_F_XU_V_M4_TU */ 15052, /* PseudoVFWCVT_F_XU_V_MF2 */ 15057, /* PseudoVFWCVT_F_XU_V_MF2_MASK */ 15061, /* PseudoVFWCVT_F_XU_V_MF2_TU */ 15068, /* PseudoVFWCVT_F_XU_V_MF4 */ 15073, /* PseudoVFWCVT_F_XU_V_MF4_MASK */ 15077, /* PseudoVFWCVT_F_XU_V_MF4_TU */ 15084, /* PseudoVFWCVT_F_XU_V_MF8 */ 15089, /* PseudoVFWCVT_F_XU_V_MF8_MASK */ 15093, /* PseudoVFWCVT_F_XU_V_MF8_TU */ 15100, /* PseudoVFWCVT_F_X_V_M1 */ 15105, /* PseudoVFWCVT_F_X_V_M1_MASK */ 15109, /* PseudoVFWCVT_F_X_V_M1_TU */ 15116, /* PseudoVFWCVT_F_X_V_M2 */ 15121, /* PseudoVFWCVT_F_X_V_M2_MASK */ 15125, /* PseudoVFWCVT_F_X_V_M2_TU */ 15132, /* PseudoVFWCVT_F_X_V_M4 */ 15137, /* PseudoVFWCVT_F_X_V_M4_MASK */ 15141, /* PseudoVFWCVT_F_X_V_M4_TU */ 15148, /* PseudoVFWCVT_F_X_V_MF2 */ 15153, /* PseudoVFWCVT_F_X_V_MF2_MASK */ 15157, /* PseudoVFWCVT_F_X_V_MF2_TU */ 15164, /* PseudoVFWCVT_F_X_V_MF4 */ 15169, /* PseudoVFWCVT_F_X_V_MF4_MASK */ 15173, /* PseudoVFWCVT_F_X_V_MF4_TU */ 15180, /* PseudoVFWCVT_F_X_V_MF8 */ 15185, /* PseudoVFWCVT_F_X_V_MF8_MASK */ 15189, /* PseudoVFWCVT_F_X_V_MF8_TU */ 15196, /* PseudoVFWCVT_RM_F_XU_V_M1_MASK */ 15201, /* PseudoVFWCVT_RM_F_XU_V_M2_MASK */ 15209, /* PseudoVFWCVT_RM_F_XU_V_M4_MASK */ 15217, /* PseudoVFWCVT_RM_F_XU_V_MF2_MASK */ 15225, /* PseudoVFWCVT_RM_F_XU_V_MF4_MASK */ 15233, /* PseudoVFWCVT_RM_F_XU_V_MF8_MASK */ 15241, /* PseudoVFWCVT_RM_F_X_V_M1_MASK */ 15249, /* PseudoVFWCVT_RM_F_X_V_M2_MASK */ 15257, /* PseudoVFWCVT_RM_F_X_V_M4_MASK */ 15265, /* PseudoVFWCVT_RM_F_X_V_MF2_MASK */ 15273, /* PseudoVFWCVT_RM_F_X_V_MF4_MASK */ 15281, /* PseudoVFWCVT_RM_F_X_V_MF8_MASK */ 15289, /* PseudoVFWCVT_RM_XU_F_V_M1_MASK */ 15297, /* PseudoVFWCVT_RM_XU_F_V_M2_MASK */ 15305, /* PseudoVFWCVT_RM_XU_F_V_M4_MASK */ 15313, /* PseudoVFWCVT_RM_XU_F_V_MF2_MASK */ 15321, /* PseudoVFWCVT_RM_XU_F_V_MF4_MASK */ 15329, /* PseudoVFWCVT_RM_X_F_V_M1_MASK */ 15337, /* PseudoVFWCVT_RM_X_F_V_M2_MASK */ 15345, /* PseudoVFWCVT_RM_X_F_V_M4_MASK */ 15353, /* PseudoVFWCVT_RM_X_F_V_MF2_MASK */ 15361, /* PseudoVFWCVT_RM_X_F_V_MF4_MASK */ 15369, /* PseudoVFWCVT_RTZ_XU_F_V_M1 */ 15377, /* PseudoVFWCVT_RTZ_XU_F_V_M1_MASK */ 15381, /* PseudoVFWCVT_RTZ_XU_F_V_M1_TU */ 15388, /* PseudoVFWCVT_RTZ_XU_F_V_M2 */ 15393, /* PseudoVFWCVT_RTZ_XU_F_V_M2_MASK */ 15397, /* PseudoVFWCVT_RTZ_XU_F_V_M2_TU */ 15404, /* PseudoVFWCVT_RTZ_XU_F_V_M4 */ 15409, /* PseudoVFWCVT_RTZ_XU_F_V_M4_MASK */ 15413, /* PseudoVFWCVT_RTZ_XU_F_V_M4_TU */ 15420, /* PseudoVFWCVT_RTZ_XU_F_V_MF2 */ 15425, /* PseudoVFWCVT_RTZ_XU_F_V_MF2_MASK */ 15429, /* PseudoVFWCVT_RTZ_XU_F_V_MF2_TU */ 15436, /* PseudoVFWCVT_RTZ_XU_F_V_MF4 */ 15441, /* PseudoVFWCVT_RTZ_XU_F_V_MF4_MASK */ 15445, /* PseudoVFWCVT_RTZ_XU_F_V_MF4_TU */ 15452, /* PseudoVFWCVT_RTZ_X_F_V_M1 */ 15457, /* PseudoVFWCVT_RTZ_X_F_V_M1_MASK */ 15461, /* PseudoVFWCVT_RTZ_X_F_V_M1_TU */ 15468, /* PseudoVFWCVT_RTZ_X_F_V_M2 */ 15473, /* PseudoVFWCVT_RTZ_X_F_V_M2_MASK */ 15477, /* PseudoVFWCVT_RTZ_X_F_V_M2_TU */ 15484, /* PseudoVFWCVT_RTZ_X_F_V_M4 */ 15489, /* PseudoVFWCVT_RTZ_X_F_V_M4_MASK */ 15493, /* PseudoVFWCVT_RTZ_X_F_V_M4_TU */ 15500, /* PseudoVFWCVT_RTZ_X_F_V_MF2 */ 15505, /* PseudoVFWCVT_RTZ_X_F_V_MF2_MASK */ 15509, /* PseudoVFWCVT_RTZ_X_F_V_MF2_TU */ 15516, /* PseudoVFWCVT_RTZ_X_F_V_MF4 */ 15521, /* PseudoVFWCVT_RTZ_X_F_V_MF4_MASK */ 15525, /* PseudoVFWCVT_RTZ_X_F_V_MF4_TU */ 15532, /* PseudoVFWCVT_XU_F_V_M1 */ 15537, /* PseudoVFWCVT_XU_F_V_M1_MASK */ 15541, /* PseudoVFWCVT_XU_F_V_M1_TU */ 15548, /* PseudoVFWCVT_XU_F_V_M2 */ 15553, /* PseudoVFWCVT_XU_F_V_M2_MASK */ 15557, /* PseudoVFWCVT_XU_F_V_M2_TU */ 15564, /* PseudoVFWCVT_XU_F_V_M4 */ 15569, /* PseudoVFWCVT_XU_F_V_M4_MASK */ 15573, /* PseudoVFWCVT_XU_F_V_M4_TU */ 15580, /* PseudoVFWCVT_XU_F_V_MF2 */ 15585, /* PseudoVFWCVT_XU_F_V_MF2_MASK */ 15589, /* PseudoVFWCVT_XU_F_V_MF2_TU */ 15596, /* PseudoVFWCVT_XU_F_V_MF4 */ 15601, /* PseudoVFWCVT_XU_F_V_MF4_MASK */ 15605, /* PseudoVFWCVT_XU_F_V_MF4_TU */ 15612, /* PseudoVFWCVT_X_F_V_M1 */ 15617, /* PseudoVFWCVT_X_F_V_M1_MASK */ 15621, /* PseudoVFWCVT_X_F_V_M1_TU */ 15628, /* PseudoVFWCVT_X_F_V_M2 */ 15633, /* PseudoVFWCVT_X_F_V_M2_MASK */ 15637, /* PseudoVFWCVT_X_F_V_M2_TU */ 15644, /* PseudoVFWCVT_X_F_V_M4 */ 15649, /* PseudoVFWCVT_X_F_V_M4_MASK */ 15653, /* PseudoVFWCVT_X_F_V_M4_TU */ 15660, /* PseudoVFWCVT_X_F_V_MF2 */ 15665, /* PseudoVFWCVT_X_F_V_MF2_MASK */ 15669, /* PseudoVFWCVT_X_F_V_MF2_TU */ 15676, /* PseudoVFWCVT_X_F_V_MF4 */ 15681, /* PseudoVFWCVT_X_F_V_MF4_MASK */ 15685, /* PseudoVFWCVT_X_F_V_MF4_TU */ 15692, /* PseudoVFWMACC_VF16_M1 */ 15697, /* PseudoVFWMACC_VF16_M1_MASK */ 15704, /* PseudoVFWMACC_VF16_M2 */ 15712, /* PseudoVFWMACC_VF16_M2_MASK */ 15719, /* PseudoVFWMACC_VF16_M4 */ 15727, /* PseudoVFWMACC_VF16_M4_MASK */ 15734, /* PseudoVFWMACC_VF16_MF2 */ 15742, /* PseudoVFWMACC_VF16_MF2_MASK */ 15749, /* PseudoVFWMACC_VF16_MF4 */ 15757, /* PseudoVFWMACC_VF16_MF4_MASK */ 15764, /* PseudoVFWMACC_VF32_M1 */ 15772, /* PseudoVFWMACC_VF32_M1_MASK */ 15779, /* PseudoVFWMACC_VF32_M2 */ 15787, /* PseudoVFWMACC_VF32_M2_MASK */ 15794, /* PseudoVFWMACC_VF32_M4 */ 15802, /* PseudoVFWMACC_VF32_M4_MASK */ 15809, /* PseudoVFWMACC_VF32_MF2 */ 15817, /* PseudoVFWMACC_VF32_MF2_MASK */ 15824, /* PseudoVFWMACC_VV_M1 */ 15832, /* PseudoVFWMACC_VV_M1_MASK */ 15839, /* PseudoVFWMACC_VV_M2 */ 15847, /* PseudoVFWMACC_VV_M2_MASK */ 15854, /* PseudoVFWMACC_VV_M4 */ 15862, /* PseudoVFWMACC_VV_M4_MASK */ 15869, /* PseudoVFWMACC_VV_MF2 */ 15877, /* PseudoVFWMACC_VV_MF2_MASK */ 15884, /* PseudoVFWMACC_VV_MF4 */ 15892, /* PseudoVFWMACC_VV_MF4_MASK */ 15899, /* PseudoVFWMSAC_VF16_M1 */ 15907, /* PseudoVFWMSAC_VF16_M1_MASK */ 15914, /* PseudoVFWMSAC_VF16_M2 */ 15922, /* PseudoVFWMSAC_VF16_M2_MASK */ 15929, /* PseudoVFWMSAC_VF16_M4 */ 15937, /* PseudoVFWMSAC_VF16_M4_MASK */ 15944, /* PseudoVFWMSAC_VF16_MF2 */ 15952, /* PseudoVFWMSAC_VF16_MF2_MASK */ 15959, /* PseudoVFWMSAC_VF16_MF4 */ 15967, /* PseudoVFWMSAC_VF16_MF4_MASK */ 15974, /* PseudoVFWMSAC_VF32_M1 */ 15982, /* PseudoVFWMSAC_VF32_M1_MASK */ 15989, /* PseudoVFWMSAC_VF32_M2 */ 15997, /* PseudoVFWMSAC_VF32_M2_MASK */ 16004, /* PseudoVFWMSAC_VF32_M4 */ 16012, /* PseudoVFWMSAC_VF32_M4_MASK */ 16019, /* PseudoVFWMSAC_VF32_MF2 */ 16027, /* PseudoVFWMSAC_VF32_MF2_MASK */ 16034, /* PseudoVFWMSAC_VV_M1 */ 16042, /* PseudoVFWMSAC_VV_M1_MASK */ 16049, /* PseudoVFWMSAC_VV_M2 */ 16057, /* PseudoVFWMSAC_VV_M2_MASK */ 16064, /* PseudoVFWMSAC_VV_M4 */ 16072, /* PseudoVFWMSAC_VV_M4_MASK */ 16079, /* PseudoVFWMSAC_VV_MF2 */ 16087, /* PseudoVFWMSAC_VV_MF2_MASK */ 16094, /* PseudoVFWMSAC_VV_MF4 */ 16102, /* PseudoVFWMSAC_VV_MF4_MASK */ 16109, /* PseudoVFWMUL_VF16_M1 */ 16117, /* PseudoVFWMUL_VF16_M1_MASK */ 16122, /* PseudoVFWMUL_VF16_M1_TU */ 16130, /* PseudoVFWMUL_VF16_M2 */ 16136, /* PseudoVFWMUL_VF16_M2_MASK */ 16141, /* PseudoVFWMUL_VF16_M2_TU */ 16149, /* PseudoVFWMUL_VF16_M4 */ 16155, /* PseudoVFWMUL_VF16_M4_MASK */ 16160, /* PseudoVFWMUL_VF16_M4_TU */ 16168, /* PseudoVFWMUL_VF16_MF2 */ 16174, /* PseudoVFWMUL_VF16_MF2_MASK */ 16179, /* PseudoVFWMUL_VF16_MF2_TU */ 16187, /* PseudoVFWMUL_VF16_MF4 */ 16193, /* PseudoVFWMUL_VF16_MF4_MASK */ 16198, /* PseudoVFWMUL_VF16_MF4_TU */ 16206, /* PseudoVFWMUL_VF32_M1 */ 16212, /* PseudoVFWMUL_VF32_M1_MASK */ 16217, /* PseudoVFWMUL_VF32_M1_TU */ 16225, /* PseudoVFWMUL_VF32_M2 */ 16231, /* PseudoVFWMUL_VF32_M2_MASK */ 16236, /* PseudoVFWMUL_VF32_M2_TU */ 16244, /* PseudoVFWMUL_VF32_M4 */ 16250, /* PseudoVFWMUL_VF32_M4_MASK */ 16255, /* PseudoVFWMUL_VF32_M4_TU */ 16263, /* PseudoVFWMUL_VF32_MF2 */ 16269, /* PseudoVFWMUL_VF32_MF2_MASK */ 16274, /* PseudoVFWMUL_VF32_MF2_TU */ 16282, /* PseudoVFWMUL_VV_M1 */ 16288, /* PseudoVFWMUL_VV_M1_MASK */ 16293, /* PseudoVFWMUL_VV_M1_TU */ 16301, /* PseudoVFWMUL_VV_M2 */ 16307, /* PseudoVFWMUL_VV_M2_MASK */ 16312, /* PseudoVFWMUL_VV_M2_TU */ 16320, /* PseudoVFWMUL_VV_M4 */ 16326, /* PseudoVFWMUL_VV_M4_MASK */ 16331, /* PseudoVFWMUL_VV_M4_TU */ 16339, /* PseudoVFWMUL_VV_MF2 */ 16345, /* PseudoVFWMUL_VV_MF2_MASK */ 16350, /* PseudoVFWMUL_VV_MF2_TU */ 16358, /* PseudoVFWMUL_VV_MF4 */ 16364, /* PseudoVFWMUL_VV_MF4_MASK */ 16369, /* PseudoVFWMUL_VV_MF4_TU */ 16377, /* PseudoVFWNMACC_VF16_M1 */ 16383, /* PseudoVFWNMACC_VF16_M1_MASK */ 16390, /* PseudoVFWNMACC_VF16_M2 */ 16398, /* PseudoVFWNMACC_VF16_M2_MASK */ 16405, /* PseudoVFWNMACC_VF16_M4 */ 16413, /* PseudoVFWNMACC_VF16_M4_MASK */ 16420, /* PseudoVFWNMACC_VF16_MF2 */ 16428, /* PseudoVFWNMACC_VF16_MF2_MASK */ 16435, /* PseudoVFWNMACC_VF16_MF4 */ 16443, /* PseudoVFWNMACC_VF16_MF4_MASK */ 16450, /* PseudoVFWNMACC_VF32_M1 */ 16458, /* PseudoVFWNMACC_VF32_M1_MASK */ 16465, /* PseudoVFWNMACC_VF32_M2 */ 16473, /* PseudoVFWNMACC_VF32_M2_MASK */ 16480, /* PseudoVFWNMACC_VF32_M4 */ 16488, /* PseudoVFWNMACC_VF32_M4_MASK */ 16495, /* PseudoVFWNMACC_VF32_MF2 */ 16503, /* PseudoVFWNMACC_VF32_MF2_MASK */ 16510, /* PseudoVFWNMACC_VV_M1 */ 16518, /* PseudoVFWNMACC_VV_M1_MASK */ 16525, /* PseudoVFWNMACC_VV_M2 */ 16533, /* PseudoVFWNMACC_VV_M2_MASK */ 16540, /* PseudoVFWNMACC_VV_M4 */ 16548, /* PseudoVFWNMACC_VV_M4_MASK */ 16555, /* PseudoVFWNMACC_VV_MF2 */ 16563, /* PseudoVFWNMACC_VV_MF2_MASK */ 16570, /* PseudoVFWNMACC_VV_MF4 */ 16578, /* PseudoVFWNMACC_VV_MF4_MASK */ 16585, /* PseudoVFWNMSAC_VF16_M1 */ 16593, /* PseudoVFWNMSAC_VF16_M1_MASK */ 16600, /* PseudoVFWNMSAC_VF16_M2 */ 16608, /* PseudoVFWNMSAC_VF16_M2_MASK */ 16615, /* PseudoVFWNMSAC_VF16_M4 */ 16623, /* PseudoVFWNMSAC_VF16_M4_MASK */ 16630, /* PseudoVFWNMSAC_VF16_MF2 */ 16638, /* PseudoVFWNMSAC_VF16_MF2_MASK */ 16645, /* PseudoVFWNMSAC_VF16_MF4 */ 16653, /* PseudoVFWNMSAC_VF16_MF4_MASK */ 16660, /* PseudoVFWNMSAC_VF32_M1 */ 16668, /* PseudoVFWNMSAC_VF32_M1_MASK */ 16675, /* PseudoVFWNMSAC_VF32_M2 */ 16683, /* PseudoVFWNMSAC_VF32_M2_MASK */ 16690, /* PseudoVFWNMSAC_VF32_M4 */ 16698, /* PseudoVFWNMSAC_VF32_M4_MASK */ 16705, /* PseudoVFWNMSAC_VF32_MF2 */ 16713, /* PseudoVFWNMSAC_VF32_MF2_MASK */ 16720, /* PseudoVFWNMSAC_VV_M1 */ 16728, /* PseudoVFWNMSAC_VV_M1_MASK */ 16735, /* PseudoVFWNMSAC_VV_M2 */ 16743, /* PseudoVFWNMSAC_VV_M2_MASK */ 16750, /* PseudoVFWNMSAC_VV_M4 */ 16758, /* PseudoVFWNMSAC_VV_M4_MASK */ 16765, /* PseudoVFWNMSAC_VV_MF2 */ 16773, /* PseudoVFWNMSAC_VV_MF2_MASK */ 16780, /* PseudoVFWNMSAC_VV_MF4 */ 16788, /* PseudoVFWNMSAC_VV_MF4_MASK */ 16795, /* PseudoVFWREDOSUM_VS_M1 */ 16803, /* PseudoVFWREDOSUM_VS_M1_MASK */ 16809, /* PseudoVFWREDOSUM_VS_M2 */ 16816, /* PseudoVFWREDOSUM_VS_M2_MASK */ 16822, /* PseudoVFWREDOSUM_VS_M4 */ 16829, /* PseudoVFWREDOSUM_VS_M4_MASK */ 16835, /* PseudoVFWREDOSUM_VS_M8 */ 16842, /* PseudoVFWREDOSUM_VS_M8_MASK */ 16848, /* PseudoVFWREDOSUM_VS_MF2 */ 16855, /* PseudoVFWREDOSUM_VS_MF2_MASK */ 16861, /* PseudoVFWREDOSUM_VS_MF4 */ 16868, /* PseudoVFWREDOSUM_VS_MF4_MASK */ 16874, /* PseudoVFWREDUSUM_VS_M1 */ 16881, /* PseudoVFWREDUSUM_VS_M1_MASK */ 16887, /* PseudoVFWREDUSUM_VS_M2 */ 16894, /* PseudoVFWREDUSUM_VS_M2_MASK */ 16900, /* PseudoVFWREDUSUM_VS_M4 */ 16907, /* PseudoVFWREDUSUM_VS_M4_MASK */ 16913, /* PseudoVFWREDUSUM_VS_M8 */ 16920, /* PseudoVFWREDUSUM_VS_M8_MASK */ 16926, /* PseudoVFWREDUSUM_VS_MF2 */ 16933, /* PseudoVFWREDUSUM_VS_MF2_MASK */ 16939, /* PseudoVFWREDUSUM_VS_MF4 */ 16946, /* PseudoVFWREDUSUM_VS_MF4_MASK */ 16952, /* PseudoVFWSUB_VF16_M1 */ 16959, /* PseudoVFWSUB_VF16_M1_MASK */ 16964, /* PseudoVFWSUB_VF16_M1_TU */ 16972, /* PseudoVFWSUB_VF16_M2 */ 16978, /* PseudoVFWSUB_VF16_M2_MASK */ 16983, /* PseudoVFWSUB_VF16_M2_TU */ 16991, /* PseudoVFWSUB_VF16_M4 */ 16997, /* PseudoVFWSUB_VF16_M4_MASK */ 17002, /* PseudoVFWSUB_VF16_M4_TU */ 17010, /* PseudoVFWSUB_VF16_MF2 */ 17016, /* PseudoVFWSUB_VF16_MF2_MASK */ 17021, /* PseudoVFWSUB_VF16_MF2_TU */ 17029, /* PseudoVFWSUB_VF16_MF4 */ 17035, /* PseudoVFWSUB_VF16_MF4_MASK */ 17040, /* PseudoVFWSUB_VF16_MF4_TU */ 17048, /* PseudoVFWSUB_VF32_M1 */ 17054, /* PseudoVFWSUB_VF32_M1_MASK */ 17059, /* PseudoVFWSUB_VF32_M1_TU */ 17067, /* PseudoVFWSUB_VF32_M2 */ 17073, /* PseudoVFWSUB_VF32_M2_MASK */ 17078, /* PseudoVFWSUB_VF32_M2_TU */ 17086, /* PseudoVFWSUB_VF32_M4 */ 17092, /* PseudoVFWSUB_VF32_M4_MASK */ 17097, /* PseudoVFWSUB_VF32_M4_TU */ 17105, /* PseudoVFWSUB_VF32_MF2 */ 17111, /* PseudoVFWSUB_VF32_MF2_MASK */ 17116, /* PseudoVFWSUB_VF32_MF2_TU */ 17124, /* PseudoVFWSUB_VV_M1 */ 17130, /* PseudoVFWSUB_VV_M1_MASK */ 17135, /* PseudoVFWSUB_VV_M1_TU */ 17143, /* PseudoVFWSUB_VV_M2 */ 17149, /* PseudoVFWSUB_VV_M2_MASK */ 17154, /* PseudoVFWSUB_VV_M2_TU */ 17162, /* PseudoVFWSUB_VV_M4 */ 17168, /* PseudoVFWSUB_VV_M4_MASK */ 17173, /* PseudoVFWSUB_VV_M4_TU */ 17181, /* PseudoVFWSUB_VV_MF2 */ 17187, /* PseudoVFWSUB_VV_MF2_MASK */ 17192, /* PseudoVFWSUB_VV_MF2_TU */ 17200, /* PseudoVFWSUB_VV_MF4 */ 17206, /* PseudoVFWSUB_VV_MF4_MASK */ 17211, /* PseudoVFWSUB_VV_MF4_TU */ 17219, /* PseudoVFWSUB_WF16_M1 */ 17225, /* PseudoVFWSUB_WF16_M1_MASK */ 17230, /* PseudoVFWSUB_WF16_M1_TU */ 17238, /* PseudoVFWSUB_WF16_M2 */ 17244, /* PseudoVFWSUB_WF16_M2_MASK */ 17249, /* PseudoVFWSUB_WF16_M2_TU */ 17257, /* PseudoVFWSUB_WF16_M4 */ 17263, /* PseudoVFWSUB_WF16_M4_MASK */ 17268, /* PseudoVFWSUB_WF16_M4_TU */ 17276, /* PseudoVFWSUB_WF16_MF2 */ 17282, /* PseudoVFWSUB_WF16_MF2_MASK */ 17287, /* PseudoVFWSUB_WF16_MF2_TU */ 17295, /* PseudoVFWSUB_WF16_MF4 */ 17301, /* PseudoVFWSUB_WF16_MF4_MASK */ 17306, /* PseudoVFWSUB_WF16_MF4_TU */ 17314, /* PseudoVFWSUB_WF32_M1 */ 17320, /* PseudoVFWSUB_WF32_M1_MASK */ 17325, /* PseudoVFWSUB_WF32_M1_TU */ 17333, /* PseudoVFWSUB_WF32_M2 */ 17339, /* PseudoVFWSUB_WF32_M2_MASK */ 17344, /* PseudoVFWSUB_WF32_M2_TU */ 17352, /* PseudoVFWSUB_WF32_M4 */ 17358, /* PseudoVFWSUB_WF32_M4_MASK */ 17363, /* PseudoVFWSUB_WF32_M4_TU */ 17371, /* PseudoVFWSUB_WF32_MF2 */ 17377, /* PseudoVFWSUB_WF32_MF2_MASK */ 17382, /* PseudoVFWSUB_WF32_MF2_TU */ 17390, /* PseudoVFWSUB_WV_M1 */ 17396, /* PseudoVFWSUB_WV_M1_MASK */ 17401, /* PseudoVFWSUB_WV_M1_MASK_TIED */ 17409, /* PseudoVFWSUB_WV_M1_TIED */ 17416, /* PseudoVFWSUB_WV_M1_TU */ 17422, /* PseudoVFWSUB_WV_M2 */ 17428, /* PseudoVFWSUB_WV_M2_MASK */ 17433, /* PseudoVFWSUB_WV_M2_MASK_TIED */ 17441, /* PseudoVFWSUB_WV_M2_TIED */ 17448, /* PseudoVFWSUB_WV_M2_TU */ 17454, /* PseudoVFWSUB_WV_M4 */ 17460, /* PseudoVFWSUB_WV_M4_MASK */ 17465, /* PseudoVFWSUB_WV_M4_MASK_TIED */ 17473, /* PseudoVFWSUB_WV_M4_TIED */ 17480, /* PseudoVFWSUB_WV_M4_TU */ 17486, /* PseudoVFWSUB_WV_MF2 */ 17492, /* PseudoVFWSUB_WV_MF2_MASK */ 17497, /* PseudoVFWSUB_WV_MF2_MASK_TIED */ 17505, /* PseudoVFWSUB_WV_MF2_TIED */ 17512, /* PseudoVFWSUB_WV_MF2_TU */ 17518, /* PseudoVFWSUB_WV_MF4 */ 17524, /* PseudoVFWSUB_WV_MF4_MASK */ 17529, /* PseudoVFWSUB_WV_MF4_MASK_TIED */ 17537, /* PseudoVFWSUB_WV_MF4_TIED */ 17544, /* PseudoVFWSUB_WV_MF4_TU */ 17550, /* PseudoVID_V_M1 */ 17556, /* PseudoVID_V_M1_MASK */ 17559, /* PseudoVID_V_M1_TU */ 17565, /* PseudoVID_V_M2 */ 17569, /* PseudoVID_V_M2_MASK */ 17572, /* PseudoVID_V_M2_TU */ 17578, /* PseudoVID_V_M4 */ 17582, /* PseudoVID_V_M4_MASK */ 17585, /* PseudoVID_V_M4_TU */ 17591, /* PseudoVID_V_M8 */ 17595, /* PseudoVID_V_M8_MASK */ 17598, /* PseudoVID_V_M8_TU */ 17604, /* PseudoVID_V_MF2 */ 17608, /* PseudoVID_V_MF2_MASK */ 17611, /* PseudoVID_V_MF2_TU */ 17617, /* PseudoVID_V_MF4 */ 17621, /* PseudoVID_V_MF4_MASK */ 17624, /* PseudoVID_V_MF4_TU */ 17630, /* PseudoVID_V_MF8 */ 17634, /* PseudoVID_V_MF8_MASK */ 17637, /* PseudoVID_V_MF8_TU */ 17643, /* PseudoVIOTA_M_M1 */ 17647, /* PseudoVIOTA_M_M1_MASK */ 17651, /* PseudoVIOTA_M_M1_TU */ 17658, /* PseudoVIOTA_M_M2 */ 17663, /* PseudoVIOTA_M_M2_MASK */ 17667, /* PseudoVIOTA_M_M2_TU */ 17674, /* PseudoVIOTA_M_M4 */ 17679, /* PseudoVIOTA_M_M4_MASK */ 17683, /* PseudoVIOTA_M_M4_TU */ 17690, /* PseudoVIOTA_M_M8 */ 17695, /* PseudoVIOTA_M_M8_MASK */ 17699, /* PseudoVIOTA_M_M8_TU */ 17706, /* PseudoVIOTA_M_MF2 */ 17711, /* PseudoVIOTA_M_MF2_MASK */ 17715, /* PseudoVIOTA_M_MF2_TU */ 17722, /* PseudoVIOTA_M_MF4 */ 17727, /* PseudoVIOTA_M_MF4_MASK */ 17731, /* PseudoVIOTA_M_MF4_TU */ 17738, /* PseudoVIOTA_M_MF8 */ 17743, /* PseudoVIOTA_M_MF8_MASK */ 17747, /* PseudoVIOTA_M_MF8_TU */ 17754, /* PseudoVLE16FF_V_M1 */ 17759, /* PseudoVLE16FF_V_M1_MASK */ 17764, /* PseudoVLE16FF_V_M1_TU */ 17772, /* PseudoVLE16FF_V_M2 */ 17778, /* PseudoVLE16FF_V_M2_MASK */ 17783, /* PseudoVLE16FF_V_M2_TU */ 17791, /* PseudoVLE16FF_V_M4 */ 17797, /* PseudoVLE16FF_V_M4_MASK */ 17802, /* PseudoVLE16FF_V_M4_TU */ 17810, /* PseudoVLE16FF_V_M8 */ 17816, /* PseudoVLE16FF_V_M8_MASK */ 17821, /* PseudoVLE16FF_V_M8_TU */ 17829, /* PseudoVLE16FF_V_MF2 */ 17835, /* PseudoVLE16FF_V_MF2_MASK */ 17840, /* PseudoVLE16FF_V_MF2_TU */ 17848, /* PseudoVLE16FF_V_MF4 */ 17854, /* PseudoVLE16FF_V_MF4_MASK */ 17859, /* PseudoVLE16FF_V_MF4_TU */ 17867, /* PseudoVLE16_V_M1 */ 17873, /* PseudoVLE16_V_M1_MASK */ 17877, /* PseudoVLE16_V_M1_TU */ 17884, /* PseudoVLE16_V_M2 */ 17889, /* PseudoVLE16_V_M2_MASK */ 17893, /* PseudoVLE16_V_M2_TU */ 17900, /* PseudoVLE16_V_M4 */ 17905, /* PseudoVLE16_V_M4_MASK */ 17909, /* PseudoVLE16_V_M4_TU */ 17916, /* PseudoVLE16_V_M8 */ 17921, /* PseudoVLE16_V_M8_MASK */ 17925, /* PseudoVLE16_V_M8_TU */ 17932, /* PseudoVLE16_V_MF2 */ 17937, /* PseudoVLE16_V_MF2_MASK */ 17941, /* PseudoVLE16_V_MF2_TU */ 17948, /* PseudoVLE16_V_MF4 */ 17953, /* PseudoVLE16_V_MF4_MASK */ 17957, /* PseudoVLE16_V_MF4_TU */ 17964, /* PseudoVLE32FF_V_M1 */ 17969, /* PseudoVLE32FF_V_M1_MASK */ 17974, /* PseudoVLE32FF_V_M1_TU */ 17982, /* PseudoVLE32FF_V_M2 */ 17988, /* PseudoVLE32FF_V_M2_MASK */ 17993, /* PseudoVLE32FF_V_M2_TU */ 18001, /* PseudoVLE32FF_V_M4 */ 18007, /* PseudoVLE32FF_V_M4_MASK */ 18012, /* PseudoVLE32FF_V_M4_TU */ 18020, /* PseudoVLE32FF_V_M8 */ 18026, /* PseudoVLE32FF_V_M8_MASK */ 18031, /* PseudoVLE32FF_V_M8_TU */ 18039, /* PseudoVLE32FF_V_MF2 */ 18045, /* PseudoVLE32FF_V_MF2_MASK */ 18050, /* PseudoVLE32FF_V_MF2_TU */ 18058, /* PseudoVLE32_V_M1 */ 18064, /* PseudoVLE32_V_M1_MASK */ 18068, /* PseudoVLE32_V_M1_TU */ 18075, /* PseudoVLE32_V_M2 */ 18080, /* PseudoVLE32_V_M2_MASK */ 18084, /* PseudoVLE32_V_M2_TU */ 18091, /* PseudoVLE32_V_M4 */ 18096, /* PseudoVLE32_V_M4_MASK */ 18100, /* PseudoVLE32_V_M4_TU */ 18107, /* PseudoVLE32_V_M8 */ 18112, /* PseudoVLE32_V_M8_MASK */ 18116, /* PseudoVLE32_V_M8_TU */ 18123, /* PseudoVLE32_V_MF2 */ 18128, /* PseudoVLE32_V_MF2_MASK */ 18132, /* PseudoVLE32_V_MF2_TU */ 18139, /* PseudoVLE64FF_V_M1 */ 18144, /* PseudoVLE64FF_V_M1_MASK */ 18149, /* PseudoVLE64FF_V_M1_TU */ 18157, /* PseudoVLE64FF_V_M2 */ 18163, /* PseudoVLE64FF_V_M2_MASK */ 18168, /* PseudoVLE64FF_V_M2_TU */ 18176, /* PseudoVLE64FF_V_M4 */ 18182, /* PseudoVLE64FF_V_M4_MASK */ 18187, /* PseudoVLE64FF_V_M4_TU */ 18195, /* PseudoVLE64FF_V_M8 */ 18201, /* PseudoVLE64FF_V_M8_MASK */ 18206, /* PseudoVLE64FF_V_M8_TU */ 18214, /* PseudoVLE64_V_M1 */ 18220, /* PseudoVLE64_V_M1_MASK */ 18224, /* PseudoVLE64_V_M1_TU */ 18231, /* PseudoVLE64_V_M2 */ 18236, /* PseudoVLE64_V_M2_MASK */ 18240, /* PseudoVLE64_V_M2_TU */ 18247, /* PseudoVLE64_V_M4 */ 18252, /* PseudoVLE64_V_M4_MASK */ 18256, /* PseudoVLE64_V_M4_TU */ 18263, /* PseudoVLE64_V_M8 */ 18268, /* PseudoVLE64_V_M8_MASK */ 18272, /* PseudoVLE64_V_M8_TU */ 18279, /* PseudoVLE8FF_V_M1 */ 18284, /* PseudoVLE8FF_V_M1_MASK */ 18289, /* PseudoVLE8FF_V_M1_TU */ 18297, /* PseudoVLE8FF_V_M2 */ 18303, /* PseudoVLE8FF_V_M2_MASK */ 18308, /* PseudoVLE8FF_V_M2_TU */ 18316, /* PseudoVLE8FF_V_M4 */ 18322, /* PseudoVLE8FF_V_M4_MASK */ 18327, /* PseudoVLE8FF_V_M4_TU */ 18335, /* PseudoVLE8FF_V_M8 */ 18341, /* PseudoVLE8FF_V_M8_MASK */ 18346, /* PseudoVLE8FF_V_M8_TU */ 18354, /* PseudoVLE8FF_V_MF2 */ 18360, /* PseudoVLE8FF_V_MF2_MASK */ 18365, /* PseudoVLE8FF_V_MF2_TU */ 18373, /* PseudoVLE8FF_V_MF4 */ 18379, /* PseudoVLE8FF_V_MF4_MASK */ 18384, /* PseudoVLE8FF_V_MF4_TU */ 18392, /* PseudoVLE8FF_V_MF8 */ 18398, /* PseudoVLE8FF_V_MF8_MASK */ 18403, /* PseudoVLE8FF_V_MF8_TU */ 18411, /* PseudoVLE8_V_M1 */ 18417, /* PseudoVLE8_V_M1_MASK */ 18421, /* PseudoVLE8_V_M1_TU */ 18428, /* PseudoVLE8_V_M2 */ 18433, /* PseudoVLE8_V_M2_MASK */ 18437, /* PseudoVLE8_V_M2_TU */ 18444, /* PseudoVLE8_V_M4 */ 18449, /* PseudoVLE8_V_M4_MASK */ 18453, /* PseudoVLE8_V_M4_TU */ 18460, /* PseudoVLE8_V_M8 */ 18465, /* PseudoVLE8_V_M8_MASK */ 18469, /* PseudoVLE8_V_M8_TU */ 18476, /* PseudoVLE8_V_MF2 */ 18481, /* PseudoVLE8_V_MF2_MASK */ 18485, /* PseudoVLE8_V_MF2_TU */ 18492, /* PseudoVLE8_V_MF4 */ 18497, /* PseudoVLE8_V_MF4_MASK */ 18501, /* PseudoVLE8_V_MF4_TU */ 18508, /* PseudoVLE8_V_MF8 */ 18513, /* PseudoVLE8_V_MF8_MASK */ 18517, /* PseudoVLE8_V_MF8_TU */ 18524, /* PseudoVLM_V_B1 */ 18529, /* PseudoVLM_V_B16 */ 18533, /* PseudoVLM_V_B2 */ 18537, /* PseudoVLM_V_B32 */ 18541, /* PseudoVLM_V_B4 */ 18545, /* PseudoVLM_V_B64 */ 18549, /* PseudoVLM_V_B8 */ 18553, /* PseudoVLOXEI16_V_M1_M1 */ 18557, /* PseudoVLOXEI16_V_M1_M1_MASK */ 18562, /* PseudoVLOXEI16_V_M1_M1_TU */ 18570, /* PseudoVLOXEI16_V_M1_M2 */ 18576, /* PseudoVLOXEI16_V_M1_M2_MASK */ 18581, /* PseudoVLOXEI16_V_M1_M2_TU */ 18589, /* PseudoVLOXEI16_V_M1_M4 */ 18595, /* PseudoVLOXEI16_V_M1_M4_MASK */ 18600, /* PseudoVLOXEI16_V_M1_M4_TU */ 18608, /* PseudoVLOXEI16_V_M1_MF2 */ 18614, /* PseudoVLOXEI16_V_M1_MF2_MASK */ 18619, /* PseudoVLOXEI16_V_M1_MF2_TU */ 18627, /* PseudoVLOXEI16_V_M2_M1 */ 18633, /* PseudoVLOXEI16_V_M2_M1_MASK */ 18638, /* PseudoVLOXEI16_V_M2_M1_TU */ 18646, /* PseudoVLOXEI16_V_M2_M2 */ 18652, /* PseudoVLOXEI16_V_M2_M2_MASK */ 18657, /* PseudoVLOXEI16_V_M2_M2_TU */ 18665, /* PseudoVLOXEI16_V_M2_M4 */ 18671, /* PseudoVLOXEI16_V_M2_M4_MASK */ 18676, /* PseudoVLOXEI16_V_M2_M4_TU */ 18684, /* PseudoVLOXEI16_V_M2_M8 */ 18690, /* PseudoVLOXEI16_V_M2_M8_MASK */ 18695, /* PseudoVLOXEI16_V_M2_M8_TU */ 18703, /* PseudoVLOXEI16_V_M4_M2 */ 18709, /* PseudoVLOXEI16_V_M4_M2_MASK */ 18714, /* PseudoVLOXEI16_V_M4_M2_TU */ 18722, /* PseudoVLOXEI16_V_M4_M4 */ 18728, /* PseudoVLOXEI16_V_M4_M4_MASK */ 18733, /* PseudoVLOXEI16_V_M4_M4_TU */ 18741, /* PseudoVLOXEI16_V_M4_M8 */ 18747, /* PseudoVLOXEI16_V_M4_M8_MASK */ 18752, /* PseudoVLOXEI16_V_M4_M8_TU */ 18760, /* PseudoVLOXEI16_V_M8_M4 */ 18766, /* PseudoVLOXEI16_V_M8_M4_MASK */ 18771, /* PseudoVLOXEI16_V_M8_M4_TU */ 18779, /* PseudoVLOXEI16_V_M8_M8 */ 18785, /* PseudoVLOXEI16_V_M8_M8_MASK */ 18790, /* PseudoVLOXEI16_V_M8_M8_TU */ 18798, /* PseudoVLOXEI16_V_MF2_M1 */ 18804, /* PseudoVLOXEI16_V_MF2_M1_MASK */ 18809, /* PseudoVLOXEI16_V_MF2_M1_TU */ 18817, /* PseudoVLOXEI16_V_MF2_M2 */ 18823, /* PseudoVLOXEI16_V_MF2_M2_MASK */ 18828, /* PseudoVLOXEI16_V_MF2_M2_TU */ 18836, /* PseudoVLOXEI16_V_MF2_MF2 */ 18842, /* PseudoVLOXEI16_V_MF2_MF2_MASK */ 18847, /* PseudoVLOXEI16_V_MF2_MF2_TU */ 18855, /* PseudoVLOXEI16_V_MF2_MF4 */ 18861, /* PseudoVLOXEI16_V_MF2_MF4_MASK */ 18866, /* PseudoVLOXEI16_V_MF2_MF4_TU */ 18874, /* PseudoVLOXEI16_V_MF4_M1 */ 18880, /* PseudoVLOXEI16_V_MF4_M1_MASK */ 18885, /* PseudoVLOXEI16_V_MF4_M1_TU */ 18893, /* PseudoVLOXEI16_V_MF4_MF2 */ 18899, /* PseudoVLOXEI16_V_MF4_MF2_MASK */ 18904, /* PseudoVLOXEI16_V_MF4_MF2_TU */ 18912, /* PseudoVLOXEI16_V_MF4_MF4 */ 18918, /* PseudoVLOXEI16_V_MF4_MF4_MASK */ 18923, /* PseudoVLOXEI16_V_MF4_MF4_TU */ 18931, /* PseudoVLOXEI16_V_MF4_MF8 */ 18937, /* PseudoVLOXEI16_V_MF4_MF8_MASK */ 18942, /* PseudoVLOXEI16_V_MF4_MF8_TU */ 18950, /* PseudoVLOXEI32_V_M1_M1 */ 18956, /* PseudoVLOXEI32_V_M1_M1_MASK */ 18961, /* PseudoVLOXEI32_V_M1_M1_TU */ 18969, /* PseudoVLOXEI32_V_M1_M2 */ 18975, /* PseudoVLOXEI32_V_M1_M2_MASK */ 18980, /* PseudoVLOXEI32_V_M1_M2_TU */ 18988, /* PseudoVLOXEI32_V_M1_MF2 */ 18994, /* PseudoVLOXEI32_V_M1_MF2_MASK */ 18999, /* PseudoVLOXEI32_V_M1_MF2_TU */ 19007, /* PseudoVLOXEI32_V_M1_MF4 */ 19013, /* PseudoVLOXEI32_V_M1_MF4_MASK */ 19018, /* PseudoVLOXEI32_V_M1_MF4_TU */ 19026, /* PseudoVLOXEI32_V_M2_M1 */ 19032, /* PseudoVLOXEI32_V_M2_M1_MASK */ 19037, /* PseudoVLOXEI32_V_M2_M1_TU */ 19045, /* PseudoVLOXEI32_V_M2_M2 */ 19051, /* PseudoVLOXEI32_V_M2_M2_MASK */ 19056, /* PseudoVLOXEI32_V_M2_M2_TU */ 19064, /* PseudoVLOXEI32_V_M2_M4 */ 19070, /* PseudoVLOXEI32_V_M2_M4_MASK */ 19075, /* PseudoVLOXEI32_V_M2_M4_TU */ 19083, /* PseudoVLOXEI32_V_M2_MF2 */ 19089, /* PseudoVLOXEI32_V_M2_MF2_MASK */ 19094, /* PseudoVLOXEI32_V_M2_MF2_TU */ 19102, /* PseudoVLOXEI32_V_M4_M1 */ 19108, /* PseudoVLOXEI32_V_M4_M1_MASK */ 19113, /* PseudoVLOXEI32_V_M4_M1_TU */ 19121, /* PseudoVLOXEI32_V_M4_M2 */ 19127, /* PseudoVLOXEI32_V_M4_M2_MASK */ 19132, /* PseudoVLOXEI32_V_M4_M2_TU */ 19140, /* PseudoVLOXEI32_V_M4_M4 */ 19146, /* PseudoVLOXEI32_V_M4_M4_MASK */ 19151, /* PseudoVLOXEI32_V_M4_M4_TU */ 19159, /* PseudoVLOXEI32_V_M4_M8 */ 19165, /* PseudoVLOXEI32_V_M4_M8_MASK */ 19170, /* PseudoVLOXEI32_V_M4_M8_TU */ 19178, /* PseudoVLOXEI32_V_M8_M2 */ 19184, /* PseudoVLOXEI32_V_M8_M2_MASK */ 19189, /* PseudoVLOXEI32_V_M8_M2_TU */ 19197, /* PseudoVLOXEI32_V_M8_M4 */ 19203, /* PseudoVLOXEI32_V_M8_M4_MASK */ 19208, /* PseudoVLOXEI32_V_M8_M4_TU */ 19216, /* PseudoVLOXEI32_V_M8_M8 */ 19222, /* PseudoVLOXEI32_V_M8_M8_MASK */ 19227, /* PseudoVLOXEI32_V_M8_M8_TU */ 19235, /* PseudoVLOXEI32_V_MF2_M1 */ 19241, /* PseudoVLOXEI32_V_MF2_M1_MASK */ 19246, /* PseudoVLOXEI32_V_MF2_M1_TU */ 19254, /* PseudoVLOXEI32_V_MF2_MF2 */ 19260, /* PseudoVLOXEI32_V_MF2_MF2_MASK */ 19265, /* PseudoVLOXEI32_V_MF2_MF2_TU */ 19273, /* PseudoVLOXEI32_V_MF2_MF4 */ 19279, /* PseudoVLOXEI32_V_MF2_MF4_MASK */ 19284, /* PseudoVLOXEI32_V_MF2_MF4_TU */ 19292, /* PseudoVLOXEI32_V_MF2_MF8 */ 19298, /* PseudoVLOXEI32_V_MF2_MF8_MASK */ 19303, /* PseudoVLOXEI32_V_MF2_MF8_TU */ 19311, /* PseudoVLOXEI64_V_M1_M1 */ 19317, /* PseudoVLOXEI64_V_M1_M1_MASK */ 19322, /* PseudoVLOXEI64_V_M1_M1_TU */ 19330, /* PseudoVLOXEI64_V_M1_MF2 */ 19336, /* PseudoVLOXEI64_V_M1_MF2_MASK */ 19341, /* PseudoVLOXEI64_V_M1_MF2_TU */ 19349, /* PseudoVLOXEI64_V_M1_MF4 */ 19355, /* PseudoVLOXEI64_V_M1_MF4_MASK */ 19360, /* PseudoVLOXEI64_V_M1_MF4_TU */ 19368, /* PseudoVLOXEI64_V_M1_MF8 */ 19374, /* PseudoVLOXEI64_V_M1_MF8_MASK */ 19379, /* PseudoVLOXEI64_V_M1_MF8_TU */ 19387, /* PseudoVLOXEI64_V_M2_M1 */ 19393, /* PseudoVLOXEI64_V_M2_M1_MASK */ 19398, /* PseudoVLOXEI64_V_M2_M1_TU */ 19406, /* PseudoVLOXEI64_V_M2_M2 */ 19412, /* PseudoVLOXEI64_V_M2_M2_MASK */ 19417, /* PseudoVLOXEI64_V_M2_M2_TU */ 19425, /* PseudoVLOXEI64_V_M2_MF2 */ 19431, /* PseudoVLOXEI64_V_M2_MF2_MASK */ 19436, /* PseudoVLOXEI64_V_M2_MF2_TU */ 19444, /* PseudoVLOXEI64_V_M2_MF4 */ 19450, /* PseudoVLOXEI64_V_M2_MF4_MASK */ 19455, /* PseudoVLOXEI64_V_M2_MF4_TU */ 19463, /* PseudoVLOXEI64_V_M4_M1 */ 19469, /* PseudoVLOXEI64_V_M4_M1_MASK */ 19474, /* PseudoVLOXEI64_V_M4_M1_TU */ 19482, /* PseudoVLOXEI64_V_M4_M2 */ 19488, /* PseudoVLOXEI64_V_M4_M2_MASK */ 19493, /* PseudoVLOXEI64_V_M4_M2_TU */ 19501, /* PseudoVLOXEI64_V_M4_M4 */ 19507, /* PseudoVLOXEI64_V_M4_M4_MASK */ 19512, /* PseudoVLOXEI64_V_M4_M4_TU */ 19520, /* PseudoVLOXEI64_V_M4_MF2 */ 19526, /* PseudoVLOXEI64_V_M4_MF2_MASK */ 19531, /* PseudoVLOXEI64_V_M4_MF2_TU */ 19539, /* PseudoVLOXEI64_V_M8_M1 */ 19545, /* PseudoVLOXEI64_V_M8_M1_MASK */ 19550, /* PseudoVLOXEI64_V_M8_M1_TU */ 19558, /* PseudoVLOXEI64_V_M8_M2 */ 19564, /* PseudoVLOXEI64_V_M8_M2_MASK */ 19569, /* PseudoVLOXEI64_V_M8_M2_TU */ 19577, /* PseudoVLOXEI64_V_M8_M4 */ 19583, /* PseudoVLOXEI64_V_M8_M4_MASK */ 19588, /* PseudoVLOXEI64_V_M8_M4_TU */ 19596, /* PseudoVLOXEI64_V_M8_M8 */ 19602, /* PseudoVLOXEI64_V_M8_M8_MASK */ 19607, /* PseudoVLOXEI64_V_M8_M8_TU */ 19615, /* PseudoVLOXEI8_V_M1_M1 */ 19621, /* PseudoVLOXEI8_V_M1_M1_MASK */ 19626, /* PseudoVLOXEI8_V_M1_M1_TU */ 19634, /* PseudoVLOXEI8_V_M1_M2 */ 19640, /* PseudoVLOXEI8_V_M1_M2_MASK */ 19645, /* PseudoVLOXEI8_V_M1_M2_TU */ 19653, /* PseudoVLOXEI8_V_M1_M4 */ 19659, /* PseudoVLOXEI8_V_M1_M4_MASK */ 19664, /* PseudoVLOXEI8_V_M1_M4_TU */ 19672, /* PseudoVLOXEI8_V_M1_M8 */ 19678, /* PseudoVLOXEI8_V_M1_M8_MASK */ 19683, /* PseudoVLOXEI8_V_M1_M8_TU */ 19691, /* PseudoVLOXEI8_V_M2_M2 */ 19697, /* PseudoVLOXEI8_V_M2_M2_MASK */ 19702, /* PseudoVLOXEI8_V_M2_M2_TU */ 19710, /* PseudoVLOXEI8_V_M2_M4 */ 19716, /* PseudoVLOXEI8_V_M2_M4_MASK */ 19721, /* PseudoVLOXEI8_V_M2_M4_TU */ 19729, /* PseudoVLOXEI8_V_M2_M8 */ 19735, /* PseudoVLOXEI8_V_M2_M8_MASK */ 19740, /* PseudoVLOXEI8_V_M2_M8_TU */ 19748, /* PseudoVLOXEI8_V_M4_M4 */ 19754, /* PseudoVLOXEI8_V_M4_M4_MASK */ 19759, /* PseudoVLOXEI8_V_M4_M4_TU */ 19767, /* PseudoVLOXEI8_V_M4_M8 */ 19773, /* PseudoVLOXEI8_V_M4_M8_MASK */ 19778, /* PseudoVLOXEI8_V_M4_M8_TU */ 19786, /* PseudoVLOXEI8_V_M8_M8 */ 19792, /* PseudoVLOXEI8_V_M8_M8_MASK */ 19797, /* PseudoVLOXEI8_V_M8_M8_TU */ 19805, /* PseudoVLOXEI8_V_MF2_M1 */ 19811, /* PseudoVLOXEI8_V_MF2_M1_MASK */ 19816, /* PseudoVLOXEI8_V_MF2_M1_TU */ 19824, /* PseudoVLOXEI8_V_MF2_M2 */ 19830, /* PseudoVLOXEI8_V_MF2_M2_MASK */ 19835, /* PseudoVLOXEI8_V_MF2_M2_TU */ 19843, /* PseudoVLOXEI8_V_MF2_M4 */ 19849, /* PseudoVLOXEI8_V_MF2_M4_MASK */ 19854, /* PseudoVLOXEI8_V_MF2_M4_TU */ 19862, /* PseudoVLOXEI8_V_MF2_MF2 */ 19868, /* PseudoVLOXEI8_V_MF2_MF2_MASK */ 19873, /* PseudoVLOXEI8_V_MF2_MF2_TU */ 19881, /* PseudoVLOXEI8_V_MF4_M1 */ 19887, /* PseudoVLOXEI8_V_MF4_M1_MASK */ 19892, /* PseudoVLOXEI8_V_MF4_M1_TU */ 19900, /* PseudoVLOXEI8_V_MF4_M2 */ 19906, /* PseudoVLOXEI8_V_MF4_M2_MASK */ 19911, /* PseudoVLOXEI8_V_MF4_M2_TU */ 19919, /* PseudoVLOXEI8_V_MF4_MF2 */ 19925, /* PseudoVLOXEI8_V_MF4_MF2_MASK */ 19930, /* PseudoVLOXEI8_V_MF4_MF2_TU */ 19938, /* PseudoVLOXEI8_V_MF4_MF4 */ 19944, /* PseudoVLOXEI8_V_MF4_MF4_MASK */ 19949, /* PseudoVLOXEI8_V_MF4_MF4_TU */ 19957, /* PseudoVLOXEI8_V_MF8_M1 */ 19963, /* PseudoVLOXEI8_V_MF8_M1_MASK */ 19968, /* PseudoVLOXEI8_V_MF8_M1_TU */ 19976, /* PseudoVLOXEI8_V_MF8_MF2 */ 19982, /* PseudoVLOXEI8_V_MF8_MF2_MASK */ 19987, /* PseudoVLOXEI8_V_MF8_MF2_TU */ 19995, /* PseudoVLOXEI8_V_MF8_MF4 */ 20001, /* PseudoVLOXEI8_V_MF8_MF4_MASK */ 20006, /* PseudoVLOXEI8_V_MF8_MF4_TU */ 20014, /* PseudoVLOXEI8_V_MF8_MF8 */ 20020, /* PseudoVLOXEI8_V_MF8_MF8_MASK */ 20025, /* PseudoVLOXEI8_V_MF8_MF8_TU */ 20033, /* PseudoVLOXSEG2EI16_V_M1_M1 */ 20039, /* PseudoVLOXSEG2EI16_V_M1_M1_MASK */ 20044, /* PseudoVLOXSEG2EI16_V_M1_M1_TU */ 20052, /* PseudoVLOXSEG2EI16_V_M1_M2 */ 20058, /* PseudoVLOXSEG2EI16_V_M1_M2_MASK */ 20063, /* PseudoVLOXSEG2EI16_V_M1_M2_TU */ 20071, /* PseudoVLOXSEG2EI16_V_M1_M4 */ 20077, /* PseudoVLOXSEG2EI16_V_M1_M4_MASK */ 20082, /* PseudoVLOXSEG2EI16_V_M1_M4_TU */ 20090, /* PseudoVLOXSEG2EI16_V_M1_MF2 */ 20096, /* PseudoVLOXSEG2EI16_V_M1_MF2_MASK */ 20101, /* PseudoVLOXSEG2EI16_V_M1_MF2_TU */ 20109, /* PseudoVLOXSEG2EI16_V_M2_M1 */ 20115, /* PseudoVLOXSEG2EI16_V_M2_M1_MASK */ 20120, /* PseudoVLOXSEG2EI16_V_M2_M1_TU */ 20128, /* PseudoVLOXSEG2EI16_V_M2_M2 */ 20134, /* PseudoVLOXSEG2EI16_V_M2_M2_MASK */ 20139, /* PseudoVLOXSEG2EI16_V_M2_M2_TU */ 20147, /* PseudoVLOXSEG2EI16_V_M2_M4 */ 20153, /* PseudoVLOXSEG2EI16_V_M2_M4_MASK */ 20158, /* PseudoVLOXSEG2EI16_V_M2_M4_TU */ 20166, /* PseudoVLOXSEG2EI16_V_M4_M2 */ 20172, /* PseudoVLOXSEG2EI16_V_M4_M2_MASK */ 20177, /* PseudoVLOXSEG2EI16_V_M4_M2_TU */ 20185, /* PseudoVLOXSEG2EI16_V_M4_M4 */ 20191, /* PseudoVLOXSEG2EI16_V_M4_M4_MASK */ 20196, /* PseudoVLOXSEG2EI16_V_M4_M4_TU */ 20204, /* PseudoVLOXSEG2EI16_V_M8_M4 */ 20210, /* PseudoVLOXSEG2EI16_V_M8_M4_MASK */ 20215, /* PseudoVLOXSEG2EI16_V_M8_M4_TU */ 20223, /* PseudoVLOXSEG2EI16_V_MF2_M1 */ 20229, /* PseudoVLOXSEG2EI16_V_MF2_M1_MASK */ 20234, /* PseudoVLOXSEG2EI16_V_MF2_M1_TU */ 20242, /* PseudoVLOXSEG2EI16_V_MF2_M2 */ 20248, /* PseudoVLOXSEG2EI16_V_MF2_M2_MASK */ 20253, /* PseudoVLOXSEG2EI16_V_MF2_M2_TU */ 20261, /* PseudoVLOXSEG2EI16_V_MF2_MF2 */ 20267, /* PseudoVLOXSEG2EI16_V_MF2_MF2_MASK */ 20272, /* PseudoVLOXSEG2EI16_V_MF2_MF2_TU */ 20280, /* PseudoVLOXSEG2EI16_V_MF2_MF4 */ 20286, /* PseudoVLOXSEG2EI16_V_MF2_MF4_MASK */ 20291, /* PseudoVLOXSEG2EI16_V_MF2_MF4_TU */ 20299, /* PseudoVLOXSEG2EI16_V_MF4_M1 */ 20305, /* PseudoVLOXSEG2EI16_V_MF4_M1_MASK */ 20310, /* PseudoVLOXSEG2EI16_V_MF4_M1_TU */ 20318, /* PseudoVLOXSEG2EI16_V_MF4_MF2 */ 20324, /* PseudoVLOXSEG2EI16_V_MF4_MF2_MASK */ 20329, /* PseudoVLOXSEG2EI16_V_MF4_MF2_TU */ 20337, /* PseudoVLOXSEG2EI16_V_MF4_MF4 */ 20343, /* PseudoVLOXSEG2EI16_V_MF4_MF4_MASK */ 20348, /* PseudoVLOXSEG2EI16_V_MF4_MF4_TU */ 20356, /* PseudoVLOXSEG2EI16_V_MF4_MF8 */ 20362, /* PseudoVLOXSEG2EI16_V_MF4_MF8_MASK */ 20367, /* PseudoVLOXSEG2EI16_V_MF4_MF8_TU */ 20375, /* PseudoVLOXSEG2EI32_V_M1_M1 */ 20381, /* PseudoVLOXSEG2EI32_V_M1_M1_MASK */ 20386, /* PseudoVLOXSEG2EI32_V_M1_M1_TU */ 20394, /* PseudoVLOXSEG2EI32_V_M1_M2 */ 20400, /* PseudoVLOXSEG2EI32_V_M1_M2_MASK */ 20405, /* PseudoVLOXSEG2EI32_V_M1_M2_TU */ 20413, /* PseudoVLOXSEG2EI32_V_M1_MF2 */ 20419, /* PseudoVLOXSEG2EI32_V_M1_MF2_MASK */ 20424, /* PseudoVLOXSEG2EI32_V_M1_MF2_TU */ 20432, /* PseudoVLOXSEG2EI32_V_M1_MF4 */ 20438, /* PseudoVLOXSEG2EI32_V_M1_MF4_MASK */ 20443, /* PseudoVLOXSEG2EI32_V_M1_MF4_TU */ 20451, /* PseudoVLOXSEG2EI32_V_M2_M1 */ 20457, /* PseudoVLOXSEG2EI32_V_M2_M1_MASK */ 20462, /* PseudoVLOXSEG2EI32_V_M2_M1_TU */ 20470, /* PseudoVLOXSEG2EI32_V_M2_M2 */ 20476, /* PseudoVLOXSEG2EI32_V_M2_M2_MASK */ 20481, /* PseudoVLOXSEG2EI32_V_M2_M2_TU */ 20489, /* PseudoVLOXSEG2EI32_V_M2_M4 */ 20495, /* PseudoVLOXSEG2EI32_V_M2_M4_MASK */ 20500, /* PseudoVLOXSEG2EI32_V_M2_M4_TU */ 20508, /* PseudoVLOXSEG2EI32_V_M2_MF2 */ 20514, /* PseudoVLOXSEG2EI32_V_M2_MF2_MASK */ 20519, /* PseudoVLOXSEG2EI32_V_M2_MF2_TU */ 20527, /* PseudoVLOXSEG2EI32_V_M4_M1 */ 20533, /* PseudoVLOXSEG2EI32_V_M4_M1_MASK */ 20538, /* PseudoVLOXSEG2EI32_V_M4_M1_TU */ 20546, /* PseudoVLOXSEG2EI32_V_M4_M2 */ 20552, /* PseudoVLOXSEG2EI32_V_M4_M2_MASK */ 20557, /* PseudoVLOXSEG2EI32_V_M4_M2_TU */ 20565, /* PseudoVLOXSEG2EI32_V_M4_M4 */ 20571, /* PseudoVLOXSEG2EI32_V_M4_M4_MASK */ 20576, /* PseudoVLOXSEG2EI32_V_M4_M4_TU */ 20584, /* PseudoVLOXSEG2EI32_V_M8_M2 */ 20590, /* PseudoVLOXSEG2EI32_V_M8_M2_MASK */ 20595, /* PseudoVLOXSEG2EI32_V_M8_M2_TU */ 20603, /* PseudoVLOXSEG2EI32_V_M8_M4 */ 20609, /* PseudoVLOXSEG2EI32_V_M8_M4_MASK */ 20614, /* PseudoVLOXSEG2EI32_V_M8_M4_TU */ 20622, /* PseudoVLOXSEG2EI32_V_MF2_M1 */ 20628, /* PseudoVLOXSEG2EI32_V_MF2_M1_MASK */ 20633, /* PseudoVLOXSEG2EI32_V_MF2_M1_TU */ 20641, /* PseudoVLOXSEG2EI32_V_MF2_MF2 */ 20647, /* PseudoVLOXSEG2EI32_V_MF2_MF2_MASK */ 20652, /* PseudoVLOXSEG2EI32_V_MF2_MF2_TU */ 20660, /* PseudoVLOXSEG2EI32_V_MF2_MF4 */ 20666, /* PseudoVLOXSEG2EI32_V_MF2_MF4_MASK */ 20671, /* PseudoVLOXSEG2EI32_V_MF2_MF4_TU */ 20679, /* PseudoVLOXSEG2EI32_V_MF2_MF8 */ 20685, /* PseudoVLOXSEG2EI32_V_MF2_MF8_MASK */ 20690, /* PseudoVLOXSEG2EI32_V_MF2_MF8_TU */ 20698, /* PseudoVLOXSEG2EI64_V_M1_M1 */ 20704, /* PseudoVLOXSEG2EI64_V_M1_M1_MASK */ 20709, /* PseudoVLOXSEG2EI64_V_M1_M1_TU */ 20717, /* PseudoVLOXSEG2EI64_V_M1_MF2 */ 20723, /* PseudoVLOXSEG2EI64_V_M1_MF2_MASK */ 20728, /* PseudoVLOXSEG2EI64_V_M1_MF2_TU */ 20736, /* PseudoVLOXSEG2EI64_V_M1_MF4 */ 20742, /* PseudoVLOXSEG2EI64_V_M1_MF4_MASK */ 20747, /* PseudoVLOXSEG2EI64_V_M1_MF4_TU */ 20755, /* PseudoVLOXSEG2EI64_V_M1_MF8 */ 20761, /* PseudoVLOXSEG2EI64_V_M1_MF8_MASK */ 20766, /* PseudoVLOXSEG2EI64_V_M1_MF8_TU */ 20774, /* PseudoVLOXSEG2EI64_V_M2_M1 */ 20780, /* PseudoVLOXSEG2EI64_V_M2_M1_MASK */ 20785, /* PseudoVLOXSEG2EI64_V_M2_M1_TU */ 20793, /* PseudoVLOXSEG2EI64_V_M2_M2 */ 20799, /* PseudoVLOXSEG2EI64_V_M2_M2_MASK */ 20804, /* PseudoVLOXSEG2EI64_V_M2_M2_TU */ 20812, /* PseudoVLOXSEG2EI64_V_M2_MF2 */ 20818, /* PseudoVLOXSEG2EI64_V_M2_MF2_MASK */ 20823, /* PseudoVLOXSEG2EI64_V_M2_MF2_TU */ 20831, /* PseudoVLOXSEG2EI64_V_M2_MF4 */ 20837, /* PseudoVLOXSEG2EI64_V_M2_MF4_MASK */ 20842, /* PseudoVLOXSEG2EI64_V_M2_MF4_TU */ 20850, /* PseudoVLOXSEG2EI64_V_M4_M1 */ 20856, /* PseudoVLOXSEG2EI64_V_M4_M1_MASK */ 20861, /* PseudoVLOXSEG2EI64_V_M4_M1_TU */ 20869, /* PseudoVLOXSEG2EI64_V_M4_M2 */ 20875, /* PseudoVLOXSEG2EI64_V_M4_M2_MASK */ 20880, /* PseudoVLOXSEG2EI64_V_M4_M2_TU */ 20888, /* PseudoVLOXSEG2EI64_V_M4_M4 */ 20894, /* PseudoVLOXSEG2EI64_V_M4_M4_MASK */ 20899, /* PseudoVLOXSEG2EI64_V_M4_M4_TU */ 20907, /* PseudoVLOXSEG2EI64_V_M4_MF2 */ 20913, /* PseudoVLOXSEG2EI64_V_M4_MF2_MASK */ 20918, /* PseudoVLOXSEG2EI64_V_M4_MF2_TU */ 20926, /* PseudoVLOXSEG2EI64_V_M8_M1 */ 20932, /* PseudoVLOXSEG2EI64_V_M8_M1_MASK */ 20937, /* PseudoVLOXSEG2EI64_V_M8_M1_TU */ 20945, /* PseudoVLOXSEG2EI64_V_M8_M2 */ 20951, /* PseudoVLOXSEG2EI64_V_M8_M2_MASK */ 20956, /* PseudoVLOXSEG2EI64_V_M8_M2_TU */ 20964, /* PseudoVLOXSEG2EI64_V_M8_M4 */ 20970, /* PseudoVLOXSEG2EI64_V_M8_M4_MASK */ 20975, /* PseudoVLOXSEG2EI64_V_M8_M4_TU */ 20983, /* PseudoVLOXSEG2EI8_V_M1_M1 */ 20989, /* PseudoVLOXSEG2EI8_V_M1_M1_MASK */ 20994, /* PseudoVLOXSEG2EI8_V_M1_M1_TU */ 21002, /* PseudoVLOXSEG2EI8_V_M1_M2 */ 21008, /* PseudoVLOXSEG2EI8_V_M1_M2_MASK */ 21013, /* PseudoVLOXSEG2EI8_V_M1_M2_TU */ 21021, /* PseudoVLOXSEG2EI8_V_M1_M4 */ 21027, /* PseudoVLOXSEG2EI8_V_M1_M4_MASK */ 21032, /* PseudoVLOXSEG2EI8_V_M1_M4_TU */ 21040, /* PseudoVLOXSEG2EI8_V_M2_M2 */ 21046, /* PseudoVLOXSEG2EI8_V_M2_M2_MASK */ 21051, /* PseudoVLOXSEG2EI8_V_M2_M2_TU */ 21059, /* PseudoVLOXSEG2EI8_V_M2_M4 */ 21065, /* PseudoVLOXSEG2EI8_V_M2_M4_MASK */ 21070, /* PseudoVLOXSEG2EI8_V_M2_M4_TU */ 21078, /* PseudoVLOXSEG2EI8_V_M4_M4 */ 21084, /* PseudoVLOXSEG2EI8_V_M4_M4_MASK */ 21089, /* PseudoVLOXSEG2EI8_V_M4_M4_TU */ 21097, /* PseudoVLOXSEG2EI8_V_MF2_M1 */ 21103, /* PseudoVLOXSEG2EI8_V_MF2_M1_MASK */ 21108, /* PseudoVLOXSEG2EI8_V_MF2_M1_TU */ 21116, /* PseudoVLOXSEG2EI8_V_MF2_M2 */ 21122, /* PseudoVLOXSEG2EI8_V_MF2_M2_MASK */ 21127, /* PseudoVLOXSEG2EI8_V_MF2_M2_TU */ 21135, /* PseudoVLOXSEG2EI8_V_MF2_M4 */ 21141, /* PseudoVLOXSEG2EI8_V_MF2_M4_MASK */ 21146, /* PseudoVLOXSEG2EI8_V_MF2_M4_TU */ 21154, /* PseudoVLOXSEG2EI8_V_MF2_MF2 */ 21160, /* PseudoVLOXSEG2EI8_V_MF2_MF2_MASK */ 21165, /* PseudoVLOXSEG2EI8_V_MF2_MF2_TU */ 21173, /* PseudoVLOXSEG2EI8_V_MF4_M1 */ 21179, /* PseudoVLOXSEG2EI8_V_MF4_M1_MASK */ 21184, /* PseudoVLOXSEG2EI8_V_MF4_M1_TU */ 21192, /* PseudoVLOXSEG2EI8_V_MF4_M2 */ 21198, /* PseudoVLOXSEG2EI8_V_MF4_M2_MASK */ 21203, /* PseudoVLOXSEG2EI8_V_MF4_M2_TU */ 21211, /* PseudoVLOXSEG2EI8_V_MF4_MF2 */ 21217, /* PseudoVLOXSEG2EI8_V_MF4_MF2_MASK */ 21222, /* PseudoVLOXSEG2EI8_V_MF4_MF2_TU */ 21230, /* PseudoVLOXSEG2EI8_V_MF4_MF4 */ 21236, /* PseudoVLOXSEG2EI8_V_MF4_MF4_MASK */ 21241, /* PseudoVLOXSEG2EI8_V_MF4_MF4_TU */ 21249, /* PseudoVLOXSEG2EI8_V_MF8_M1 */ 21255, /* PseudoVLOXSEG2EI8_V_MF8_M1_MASK */ 21260, /* PseudoVLOXSEG2EI8_V_MF8_M1_TU */ 21268, /* PseudoVLOXSEG2EI8_V_MF8_MF2 */ 21274, /* PseudoVLOXSEG2EI8_V_MF8_MF2_MASK */ 21279, /* PseudoVLOXSEG2EI8_V_MF8_MF2_TU */ 21287, /* PseudoVLOXSEG2EI8_V_MF8_MF4 */ 21293, /* PseudoVLOXSEG2EI8_V_MF8_MF4_MASK */ 21298, /* PseudoVLOXSEG2EI8_V_MF8_MF4_TU */ 21306, /* PseudoVLOXSEG2EI8_V_MF8_MF8 */ 21312, /* PseudoVLOXSEG2EI8_V_MF8_MF8_MASK */ 21317, /* PseudoVLOXSEG2EI8_V_MF8_MF8_TU */ 21325, /* PseudoVLOXSEG3EI16_V_M1_M1 */ 21331, /* PseudoVLOXSEG3EI16_V_M1_M1_MASK */ 21336, /* PseudoVLOXSEG3EI16_V_M1_M1_TU */ 21344, /* PseudoVLOXSEG3EI16_V_M1_M2 */ 21350, /* PseudoVLOXSEG3EI16_V_M1_M2_MASK */ 21355, /* PseudoVLOXSEG3EI16_V_M1_M2_TU */ 21363, /* PseudoVLOXSEG3EI16_V_M1_MF2 */ 21369, /* PseudoVLOXSEG3EI16_V_M1_MF2_MASK */ 21374, /* PseudoVLOXSEG3EI16_V_M1_MF2_TU */ 21382, /* PseudoVLOXSEG3EI16_V_M2_M1 */ 21388, /* PseudoVLOXSEG3EI16_V_M2_M1_MASK */ 21393, /* PseudoVLOXSEG3EI16_V_M2_M1_TU */ 21401, /* PseudoVLOXSEG3EI16_V_M2_M2 */ 21407, /* PseudoVLOXSEG3EI16_V_M2_M2_MASK */ 21412, /* PseudoVLOXSEG3EI16_V_M2_M2_TU */ 21420, /* PseudoVLOXSEG3EI16_V_M4_M2 */ 21426, /* PseudoVLOXSEG3EI16_V_M4_M2_MASK */ 21431, /* PseudoVLOXSEG3EI16_V_M4_M2_TU */ 21439, /* PseudoVLOXSEG3EI16_V_MF2_M1 */ 21445, /* PseudoVLOXSEG3EI16_V_MF2_M1_MASK */ 21450, /* PseudoVLOXSEG3EI16_V_MF2_M1_TU */ 21458, /* PseudoVLOXSEG3EI16_V_MF2_M2 */ 21464, /* PseudoVLOXSEG3EI16_V_MF2_M2_MASK */ 21469, /* PseudoVLOXSEG3EI16_V_MF2_M2_TU */ 21477, /* PseudoVLOXSEG3EI16_V_MF2_MF2 */ 21483, /* PseudoVLOXSEG3EI16_V_MF2_MF2_MASK */ 21488, /* PseudoVLOXSEG3EI16_V_MF2_MF2_TU */ 21496, /* PseudoVLOXSEG3EI16_V_MF2_MF4 */ 21502, /* PseudoVLOXSEG3EI16_V_MF2_MF4_MASK */ 21507, /* PseudoVLOXSEG3EI16_V_MF2_MF4_TU */ 21515, /* PseudoVLOXSEG3EI16_V_MF4_M1 */ 21521, /* PseudoVLOXSEG3EI16_V_MF4_M1_MASK */ 21526, /* PseudoVLOXSEG3EI16_V_MF4_M1_TU */ 21534, /* PseudoVLOXSEG3EI16_V_MF4_MF2 */ 21540, /* PseudoVLOXSEG3EI16_V_MF4_MF2_MASK */ 21545, /* PseudoVLOXSEG3EI16_V_MF4_MF2_TU */ 21553, /* PseudoVLOXSEG3EI16_V_MF4_MF4 */ 21559, /* PseudoVLOXSEG3EI16_V_MF4_MF4_MASK */ 21564, /* PseudoVLOXSEG3EI16_V_MF4_MF4_TU */ 21572, /* PseudoVLOXSEG3EI16_V_MF4_MF8 */ 21578, /* PseudoVLOXSEG3EI16_V_MF4_MF8_MASK */ 21583, /* PseudoVLOXSEG3EI16_V_MF4_MF8_TU */ 21591, /* PseudoVLOXSEG3EI32_V_M1_M1 */ 21597, /* PseudoVLOXSEG3EI32_V_M1_M1_MASK */ 21602, /* PseudoVLOXSEG3EI32_V_M1_M1_TU */ 21610, /* PseudoVLOXSEG3EI32_V_M1_M2 */ 21616, /* PseudoVLOXSEG3EI32_V_M1_M2_MASK */ 21621, /* PseudoVLOXSEG3EI32_V_M1_M2_TU */ 21629, /* PseudoVLOXSEG3EI32_V_M1_MF2 */ 21635, /* PseudoVLOXSEG3EI32_V_M1_MF2_MASK */ 21640, /* PseudoVLOXSEG3EI32_V_M1_MF2_TU */ 21648, /* PseudoVLOXSEG3EI32_V_M1_MF4 */ 21654, /* PseudoVLOXSEG3EI32_V_M1_MF4_MASK */ 21659, /* PseudoVLOXSEG3EI32_V_M1_MF4_TU */ 21667, /* PseudoVLOXSEG3EI32_V_M2_M1 */ 21673, /* PseudoVLOXSEG3EI32_V_M2_M1_MASK */ 21678, /* PseudoVLOXSEG3EI32_V_M2_M1_TU */ 21686, /* PseudoVLOXSEG3EI32_V_M2_M2 */ 21692, /* PseudoVLOXSEG3EI32_V_M2_M2_MASK */ 21697, /* PseudoVLOXSEG3EI32_V_M2_M2_TU */ 21705, /* PseudoVLOXSEG3EI32_V_M2_MF2 */ 21711, /* PseudoVLOXSEG3EI32_V_M2_MF2_MASK */ 21716, /* PseudoVLOXSEG3EI32_V_M2_MF2_TU */ 21724, /* PseudoVLOXSEG3EI32_V_M4_M1 */ 21730, /* PseudoVLOXSEG3EI32_V_M4_M1_MASK */ 21735, /* PseudoVLOXSEG3EI32_V_M4_M1_TU */ 21743, /* PseudoVLOXSEG3EI32_V_M4_M2 */ 21749, /* PseudoVLOXSEG3EI32_V_M4_M2_MASK */ 21754, /* PseudoVLOXSEG3EI32_V_M4_M2_TU */ 21762, /* PseudoVLOXSEG3EI32_V_M8_M2 */ 21768, /* PseudoVLOXSEG3EI32_V_M8_M2_MASK */ 21773, /* PseudoVLOXSEG3EI32_V_M8_M2_TU */ 21781, /* PseudoVLOXSEG3EI32_V_MF2_M1 */ 21787, /* PseudoVLOXSEG3EI32_V_MF2_M1_MASK */ 21792, /* PseudoVLOXSEG3EI32_V_MF2_M1_TU */ 21800, /* PseudoVLOXSEG3EI32_V_MF2_MF2 */ 21806, /* PseudoVLOXSEG3EI32_V_MF2_MF2_MASK */ 21811, /* PseudoVLOXSEG3EI32_V_MF2_MF2_TU */ 21819, /* PseudoVLOXSEG3EI32_V_MF2_MF4 */ 21825, /* PseudoVLOXSEG3EI32_V_MF2_MF4_MASK */ 21830, /* PseudoVLOXSEG3EI32_V_MF2_MF4_TU */ 21838, /* PseudoVLOXSEG3EI32_V_MF2_MF8 */ 21844, /* PseudoVLOXSEG3EI32_V_MF2_MF8_MASK */ 21849, /* PseudoVLOXSEG3EI32_V_MF2_MF8_TU */ 21857, /* PseudoVLOXSEG3EI64_V_M1_M1 */ 21863, /* PseudoVLOXSEG3EI64_V_M1_M1_MASK */ 21868, /* PseudoVLOXSEG3EI64_V_M1_M1_TU */ 21876, /* PseudoVLOXSEG3EI64_V_M1_MF2 */ 21882, /* PseudoVLOXSEG3EI64_V_M1_MF2_MASK */ 21887, /* PseudoVLOXSEG3EI64_V_M1_MF2_TU */ 21895, /* PseudoVLOXSEG3EI64_V_M1_MF4 */ 21901, /* PseudoVLOXSEG3EI64_V_M1_MF4_MASK */ 21906, /* PseudoVLOXSEG3EI64_V_M1_MF4_TU */ 21914, /* PseudoVLOXSEG3EI64_V_M1_MF8 */ 21920, /* PseudoVLOXSEG3EI64_V_M1_MF8_MASK */ 21925, /* PseudoVLOXSEG3EI64_V_M1_MF8_TU */ 21933, /* PseudoVLOXSEG3EI64_V_M2_M1 */ 21939, /* PseudoVLOXSEG3EI64_V_M2_M1_MASK */ 21944, /* PseudoVLOXSEG3EI64_V_M2_M1_TU */ 21952, /* PseudoVLOXSEG3EI64_V_M2_M2 */ 21958, /* PseudoVLOXSEG3EI64_V_M2_M2_MASK */ 21963, /* PseudoVLOXSEG3EI64_V_M2_M2_TU */ 21971, /* PseudoVLOXSEG3EI64_V_M2_MF2 */ 21977, /* PseudoVLOXSEG3EI64_V_M2_MF2_MASK */ 21982, /* PseudoVLOXSEG3EI64_V_M2_MF2_TU */ 21990, /* PseudoVLOXSEG3EI64_V_M2_MF4 */ 21996, /* PseudoVLOXSEG3EI64_V_M2_MF4_MASK */ 22001, /* PseudoVLOXSEG3EI64_V_M2_MF4_TU */ 22009, /* PseudoVLOXSEG3EI64_V_M4_M1 */ 22015, /* PseudoVLOXSEG3EI64_V_M4_M1_MASK */ 22020, /* PseudoVLOXSEG3EI64_V_M4_M1_TU */ 22028, /* PseudoVLOXSEG3EI64_V_M4_M2 */ 22034, /* PseudoVLOXSEG3EI64_V_M4_M2_MASK */ 22039, /* PseudoVLOXSEG3EI64_V_M4_M2_TU */ 22047, /* PseudoVLOXSEG3EI64_V_M4_MF2 */ 22053, /* PseudoVLOXSEG3EI64_V_M4_MF2_MASK */ 22058, /* PseudoVLOXSEG3EI64_V_M4_MF2_TU */ 22066, /* PseudoVLOXSEG3EI64_V_M8_M1 */ 22072, /* PseudoVLOXSEG3EI64_V_M8_M1_MASK */ 22077, /* PseudoVLOXSEG3EI64_V_M8_M1_TU */ 22085, /* PseudoVLOXSEG3EI64_V_M8_M2 */ 22091, /* PseudoVLOXSEG3EI64_V_M8_M2_MASK */ 22096, /* PseudoVLOXSEG3EI64_V_M8_M2_TU */ 22104, /* PseudoVLOXSEG3EI8_V_M1_M1 */ 22110, /* PseudoVLOXSEG3EI8_V_M1_M1_MASK */ 22115, /* PseudoVLOXSEG3EI8_V_M1_M1_TU */ 22123, /* PseudoVLOXSEG3EI8_V_M1_M2 */ 22129, /* PseudoVLOXSEG3EI8_V_M1_M2_MASK */ 22134, /* PseudoVLOXSEG3EI8_V_M1_M2_TU */ 22142, /* PseudoVLOXSEG3EI8_V_M2_M2 */ 22148, /* PseudoVLOXSEG3EI8_V_M2_M2_MASK */ 22153, /* PseudoVLOXSEG3EI8_V_M2_M2_TU */ 22161, /* PseudoVLOXSEG3EI8_V_MF2_M1 */ 22167, /* PseudoVLOXSEG3EI8_V_MF2_M1_MASK */ 22172, /* PseudoVLOXSEG3EI8_V_MF2_M1_TU */ 22180, /* PseudoVLOXSEG3EI8_V_MF2_M2 */ 22186, /* PseudoVLOXSEG3EI8_V_MF2_M2_MASK */ 22191, /* PseudoVLOXSEG3EI8_V_MF2_M2_TU */ 22199, /* PseudoVLOXSEG3EI8_V_MF2_MF2 */ 22205, /* PseudoVLOXSEG3EI8_V_MF2_MF2_MASK */ 22210, /* PseudoVLOXSEG3EI8_V_MF2_MF2_TU */ 22218, /* PseudoVLOXSEG3EI8_V_MF4_M1 */ 22224, /* PseudoVLOXSEG3EI8_V_MF4_M1_MASK */ 22229, /* PseudoVLOXSEG3EI8_V_MF4_M1_TU */ 22237, /* PseudoVLOXSEG3EI8_V_MF4_M2 */ 22243, /* PseudoVLOXSEG3EI8_V_MF4_M2_MASK */ 22248, /* PseudoVLOXSEG3EI8_V_MF4_M2_TU */ 22256, /* PseudoVLOXSEG3EI8_V_MF4_MF2 */ 22262, /* PseudoVLOXSEG3EI8_V_MF4_MF2_MASK */ 22267, /* PseudoVLOXSEG3EI8_V_MF4_MF2_TU */ 22275, /* PseudoVLOXSEG3EI8_V_MF4_MF4 */ 22281, /* PseudoVLOXSEG3EI8_V_MF4_MF4_MASK */ 22286, /* PseudoVLOXSEG3EI8_V_MF4_MF4_TU */ 22294, /* PseudoVLOXSEG3EI8_V_MF8_M1 */ 22300, /* PseudoVLOXSEG3EI8_V_MF8_M1_MASK */ 22305, /* PseudoVLOXSEG3EI8_V_MF8_M1_TU */ 22313, /* PseudoVLOXSEG3EI8_V_MF8_MF2 */ 22319, /* PseudoVLOXSEG3EI8_V_MF8_MF2_MASK */ 22324, /* PseudoVLOXSEG3EI8_V_MF8_MF2_TU */ 22332, /* PseudoVLOXSEG3EI8_V_MF8_MF4 */ 22338, /* PseudoVLOXSEG3EI8_V_MF8_MF4_MASK */ 22343, /* PseudoVLOXSEG3EI8_V_MF8_MF4_TU */ 22351, /* PseudoVLOXSEG3EI8_V_MF8_MF8 */ 22357, /* PseudoVLOXSEG3EI8_V_MF8_MF8_MASK */ 22362, /* PseudoVLOXSEG3EI8_V_MF8_MF8_TU */ 22370, /* PseudoVLOXSEG4EI16_V_M1_M1 */ 22376, /* PseudoVLOXSEG4EI16_V_M1_M1_MASK */ 22381, /* PseudoVLOXSEG4EI16_V_M1_M1_TU */ 22389, /* PseudoVLOXSEG4EI16_V_M1_M2 */ 22395, /* PseudoVLOXSEG4EI16_V_M1_M2_MASK */ 22400, /* PseudoVLOXSEG4EI16_V_M1_M2_TU */ 22408, /* PseudoVLOXSEG4EI16_V_M1_MF2 */ 22414, /* PseudoVLOXSEG4EI16_V_M1_MF2_MASK */ 22419, /* PseudoVLOXSEG4EI16_V_M1_MF2_TU */ 22427, /* PseudoVLOXSEG4EI16_V_M2_M1 */ 22433, /* PseudoVLOXSEG4EI16_V_M2_M1_MASK */ 22438, /* PseudoVLOXSEG4EI16_V_M2_M1_TU */ 22446, /* PseudoVLOXSEG4EI16_V_M2_M2 */ 22452, /* PseudoVLOXSEG4EI16_V_M2_M2_MASK */ 22457, /* PseudoVLOXSEG4EI16_V_M2_M2_TU */ 22465, /* PseudoVLOXSEG4EI16_V_M4_M2 */ 22471, /* PseudoVLOXSEG4EI16_V_M4_M2_MASK */ 22476, /* PseudoVLOXSEG4EI16_V_M4_M2_TU */ 22484, /* PseudoVLOXSEG4EI16_V_MF2_M1 */ 22490, /* PseudoVLOXSEG4EI16_V_MF2_M1_MASK */ 22495, /* PseudoVLOXSEG4EI16_V_MF2_M1_TU */ 22503, /* PseudoVLOXSEG4EI16_V_MF2_M2 */ 22509, /* PseudoVLOXSEG4EI16_V_MF2_M2_MASK */ 22514, /* PseudoVLOXSEG4EI16_V_MF2_M2_TU */ 22522, /* PseudoVLOXSEG4EI16_V_MF2_MF2 */ 22528, /* PseudoVLOXSEG4EI16_V_MF2_MF2_MASK */ 22533, /* PseudoVLOXSEG4EI16_V_MF2_MF2_TU */ 22541, /* PseudoVLOXSEG4EI16_V_MF2_MF4 */ 22547, /* PseudoVLOXSEG4EI16_V_MF2_MF4_MASK */ 22552, /* PseudoVLOXSEG4EI16_V_MF2_MF4_TU */ 22560, /* PseudoVLOXSEG4EI16_V_MF4_M1 */ 22566, /* PseudoVLOXSEG4EI16_V_MF4_M1_MASK */ 22571, /* PseudoVLOXSEG4EI16_V_MF4_M1_TU */ 22579, /* PseudoVLOXSEG4EI16_V_MF4_MF2 */ 22585, /* PseudoVLOXSEG4EI16_V_MF4_MF2_MASK */ 22590, /* PseudoVLOXSEG4EI16_V_MF4_MF2_TU */ 22598, /* PseudoVLOXSEG4EI16_V_MF4_MF4 */ 22604, /* PseudoVLOXSEG4EI16_V_MF4_MF4_MASK */ 22609, /* PseudoVLOXSEG4EI16_V_MF4_MF4_TU */ 22617, /* PseudoVLOXSEG4EI16_V_MF4_MF8 */ 22623, /* PseudoVLOXSEG4EI16_V_MF4_MF8_MASK */ 22628, /* PseudoVLOXSEG4EI16_V_MF4_MF8_TU */ 22636, /* PseudoVLOXSEG4EI32_V_M1_M1 */ 22642, /* PseudoVLOXSEG4EI32_V_M1_M1_MASK */ 22647, /* PseudoVLOXSEG4EI32_V_M1_M1_TU */ 22655, /* PseudoVLOXSEG4EI32_V_M1_M2 */ 22661, /* PseudoVLOXSEG4EI32_V_M1_M2_MASK */ 22666, /* PseudoVLOXSEG4EI32_V_M1_M2_TU */ 22674, /* PseudoVLOXSEG4EI32_V_M1_MF2 */ 22680, /* PseudoVLOXSEG4EI32_V_M1_MF2_MASK */ 22685, /* PseudoVLOXSEG4EI32_V_M1_MF2_TU */ 22693, /* PseudoVLOXSEG4EI32_V_M1_MF4 */ 22699, /* PseudoVLOXSEG4EI32_V_M1_MF4_MASK */ 22704, /* PseudoVLOXSEG4EI32_V_M1_MF4_TU */ 22712, /* PseudoVLOXSEG4EI32_V_M2_M1 */ 22718, /* PseudoVLOXSEG4EI32_V_M2_M1_MASK */ 22723, /* PseudoVLOXSEG4EI32_V_M2_M1_TU */ 22731, /* PseudoVLOXSEG4EI32_V_M2_M2 */ 22737, /* PseudoVLOXSEG4EI32_V_M2_M2_MASK */ 22742, /* PseudoVLOXSEG4EI32_V_M2_M2_TU */ 22750, /* PseudoVLOXSEG4EI32_V_M2_MF2 */ 22756, /* PseudoVLOXSEG4EI32_V_M2_MF2_MASK */ 22761, /* PseudoVLOXSEG4EI32_V_M2_MF2_TU */ 22769, /* PseudoVLOXSEG4EI32_V_M4_M1 */ 22775, /* PseudoVLOXSEG4EI32_V_M4_M1_MASK */ 22780, /* PseudoVLOXSEG4EI32_V_M4_M1_TU */ 22788, /* PseudoVLOXSEG4EI32_V_M4_M2 */ 22794, /* PseudoVLOXSEG4EI32_V_M4_M2_MASK */ 22799, /* PseudoVLOXSEG4EI32_V_M4_M2_TU */ 22807, /* PseudoVLOXSEG4EI32_V_M8_M2 */ 22813, /* PseudoVLOXSEG4EI32_V_M8_M2_MASK */ 22818, /* PseudoVLOXSEG4EI32_V_M8_M2_TU */ 22826, /* PseudoVLOXSEG4EI32_V_MF2_M1 */ 22832, /* PseudoVLOXSEG4EI32_V_MF2_M1_MASK */ 22837, /* PseudoVLOXSEG4EI32_V_MF2_M1_TU */ 22845, /* PseudoVLOXSEG4EI32_V_MF2_MF2 */ 22851, /* PseudoVLOXSEG4EI32_V_MF2_MF2_MASK */ 22856, /* PseudoVLOXSEG4EI32_V_MF2_MF2_TU */ 22864, /* PseudoVLOXSEG4EI32_V_MF2_MF4 */ 22870, /* PseudoVLOXSEG4EI32_V_MF2_MF4_MASK */ 22875, /* PseudoVLOXSEG4EI32_V_MF2_MF4_TU */ 22883, /* PseudoVLOXSEG4EI32_V_MF2_MF8 */ 22889, /* PseudoVLOXSEG4EI32_V_MF2_MF8_MASK */ 22894, /* PseudoVLOXSEG4EI32_V_MF2_MF8_TU */ 22902, /* PseudoVLOXSEG4EI64_V_M1_M1 */ 22908, /* PseudoVLOXSEG4EI64_V_M1_M1_MASK */ 22913, /* PseudoVLOXSEG4EI64_V_M1_M1_TU */ 22921, /* PseudoVLOXSEG4EI64_V_M1_MF2 */ 22927, /* PseudoVLOXSEG4EI64_V_M1_MF2_MASK */ 22932, /* PseudoVLOXSEG4EI64_V_M1_MF2_TU */ 22940, /* PseudoVLOXSEG4EI64_V_M1_MF4 */ 22946, /* PseudoVLOXSEG4EI64_V_M1_MF4_MASK */ 22951, /* PseudoVLOXSEG4EI64_V_M1_MF4_TU */ 22959, /* PseudoVLOXSEG4EI64_V_M1_MF8 */ 22965, /* PseudoVLOXSEG4EI64_V_M1_MF8_MASK */ 22970, /* PseudoVLOXSEG4EI64_V_M1_MF8_TU */ 22978, /* PseudoVLOXSEG4EI64_V_M2_M1 */ 22984, /* PseudoVLOXSEG4EI64_V_M2_M1_MASK */ 22989, /* PseudoVLOXSEG4EI64_V_M2_M1_TU */ 22997, /* PseudoVLOXSEG4EI64_V_M2_M2 */ 23003, /* PseudoVLOXSEG4EI64_V_M2_M2_MASK */ 23008, /* PseudoVLOXSEG4EI64_V_M2_M2_TU */ 23016, /* PseudoVLOXSEG4EI64_V_M2_MF2 */ 23022, /* PseudoVLOXSEG4EI64_V_M2_MF2_MASK */ 23027, /* PseudoVLOXSEG4EI64_V_M2_MF2_TU */ 23035, /* PseudoVLOXSEG4EI64_V_M2_MF4 */ 23041, /* PseudoVLOXSEG4EI64_V_M2_MF4_MASK */ 23046, /* PseudoVLOXSEG4EI64_V_M2_MF4_TU */ 23054, /* PseudoVLOXSEG4EI64_V_M4_M1 */ 23060, /* PseudoVLOXSEG4EI64_V_M4_M1_MASK */ 23065, /* PseudoVLOXSEG4EI64_V_M4_M1_TU */ 23073, /* PseudoVLOXSEG4EI64_V_M4_M2 */ 23079, /* PseudoVLOXSEG4EI64_V_M4_M2_MASK */ 23084, /* PseudoVLOXSEG4EI64_V_M4_M2_TU */ 23092, /* PseudoVLOXSEG4EI64_V_M4_MF2 */ 23098, /* PseudoVLOXSEG4EI64_V_M4_MF2_MASK */ 23103, /* PseudoVLOXSEG4EI64_V_M4_MF2_TU */ 23111, /* PseudoVLOXSEG4EI64_V_M8_M1 */ 23117, /* PseudoVLOXSEG4EI64_V_M8_M1_MASK */ 23122, /* PseudoVLOXSEG4EI64_V_M8_M1_TU */ 23130, /* PseudoVLOXSEG4EI64_V_M8_M2 */ 23136, /* PseudoVLOXSEG4EI64_V_M8_M2_MASK */ 23141, /* PseudoVLOXSEG4EI64_V_M8_M2_TU */ 23149, /* PseudoVLOXSEG4EI8_V_M1_M1 */ 23155, /* PseudoVLOXSEG4EI8_V_M1_M1_MASK */ 23160, /* PseudoVLOXSEG4EI8_V_M1_M1_TU */ 23168, /* PseudoVLOXSEG4EI8_V_M1_M2 */ 23174, /* PseudoVLOXSEG4EI8_V_M1_M2_MASK */ 23179, /* PseudoVLOXSEG4EI8_V_M1_M2_TU */ 23187, /* PseudoVLOXSEG4EI8_V_M2_M2 */ 23193, /* PseudoVLOXSEG4EI8_V_M2_M2_MASK */ 23198, /* PseudoVLOXSEG4EI8_V_M2_M2_TU */ 23206, /* PseudoVLOXSEG4EI8_V_MF2_M1 */ 23212, /* PseudoVLOXSEG4EI8_V_MF2_M1_MASK */ 23217, /* PseudoVLOXSEG4EI8_V_MF2_M1_TU */ 23225, /* PseudoVLOXSEG4EI8_V_MF2_M2 */ 23231, /* PseudoVLOXSEG4EI8_V_MF2_M2_MASK */ 23236, /* PseudoVLOXSEG4EI8_V_MF2_M2_TU */ 23244, /* PseudoVLOXSEG4EI8_V_MF2_MF2 */ 23250, /* PseudoVLOXSEG4EI8_V_MF2_MF2_MASK */ 23255, /* PseudoVLOXSEG4EI8_V_MF2_MF2_TU */ 23263, /* PseudoVLOXSEG4EI8_V_MF4_M1 */ 23269, /* PseudoVLOXSEG4EI8_V_MF4_M1_MASK */ 23274, /* PseudoVLOXSEG4EI8_V_MF4_M1_TU */ 23282, /* PseudoVLOXSEG4EI8_V_MF4_M2 */ 23288, /* PseudoVLOXSEG4EI8_V_MF4_M2_MASK */ 23293, /* PseudoVLOXSEG4EI8_V_MF4_M2_TU */ 23301, /* PseudoVLOXSEG4EI8_V_MF4_MF2 */ 23307, /* PseudoVLOXSEG4EI8_V_MF4_MF2_MASK */ 23312, /* PseudoVLOXSEG4EI8_V_MF4_MF2_TU */ 23320, /* PseudoVLOXSEG4EI8_V_MF4_MF4 */ 23326, /* PseudoVLOXSEG4EI8_V_MF4_MF4_MASK */ 23331, /* PseudoVLOXSEG4EI8_V_MF4_MF4_TU */ 23339, /* PseudoVLOXSEG4EI8_V_MF8_M1 */ 23345, /* PseudoVLOXSEG4EI8_V_MF8_M1_MASK */ 23350, /* PseudoVLOXSEG4EI8_V_MF8_M1_TU */ 23358, /* PseudoVLOXSEG4EI8_V_MF8_MF2 */ 23364, /* PseudoVLOXSEG4EI8_V_MF8_MF2_MASK */ 23369, /* PseudoVLOXSEG4EI8_V_MF8_MF2_TU */ 23377, /* PseudoVLOXSEG4EI8_V_MF8_MF4 */ 23383, /* PseudoVLOXSEG4EI8_V_MF8_MF4_MASK */ 23388, /* PseudoVLOXSEG4EI8_V_MF8_MF4_TU */ 23396, /* PseudoVLOXSEG4EI8_V_MF8_MF8 */ 23402, /* PseudoVLOXSEG4EI8_V_MF8_MF8_MASK */ 23407, /* PseudoVLOXSEG4EI8_V_MF8_MF8_TU */ 23415, /* PseudoVLOXSEG5EI16_V_M1_M1 */ 23421, /* PseudoVLOXSEG5EI16_V_M1_M1_MASK */ 23426, /* PseudoVLOXSEG5EI16_V_M1_M1_TU */ 23434, /* PseudoVLOXSEG5EI16_V_M1_MF2 */ 23440, /* PseudoVLOXSEG5EI16_V_M1_MF2_MASK */ 23445, /* PseudoVLOXSEG5EI16_V_M1_MF2_TU */ 23453, /* PseudoVLOXSEG5EI16_V_M2_M1 */ 23459, /* PseudoVLOXSEG5EI16_V_M2_M1_MASK */ 23464, /* PseudoVLOXSEG5EI16_V_M2_M1_TU */ 23472, /* PseudoVLOXSEG5EI16_V_MF2_M1 */ 23478, /* PseudoVLOXSEG5EI16_V_MF2_M1_MASK */ 23483, /* PseudoVLOXSEG5EI16_V_MF2_M1_TU */ 23491, /* PseudoVLOXSEG5EI16_V_MF2_MF2 */ 23497, /* PseudoVLOXSEG5EI16_V_MF2_MF2_MASK */ 23502, /* PseudoVLOXSEG5EI16_V_MF2_MF2_TU */ 23510, /* PseudoVLOXSEG5EI16_V_MF2_MF4 */ 23516, /* PseudoVLOXSEG5EI16_V_MF2_MF4_MASK */ 23521, /* PseudoVLOXSEG5EI16_V_MF2_MF4_TU */ 23529, /* PseudoVLOXSEG5EI16_V_MF4_M1 */ 23535, /* PseudoVLOXSEG5EI16_V_MF4_M1_MASK */ 23540, /* PseudoVLOXSEG5EI16_V_MF4_M1_TU */ 23548, /* PseudoVLOXSEG5EI16_V_MF4_MF2 */ 23554, /* PseudoVLOXSEG5EI16_V_MF4_MF2_MASK */ 23559, /* PseudoVLOXSEG5EI16_V_MF4_MF2_TU */ 23567, /* PseudoVLOXSEG5EI16_V_MF4_MF4 */ 23573, /* PseudoVLOXSEG5EI16_V_MF4_MF4_MASK */ 23578, /* PseudoVLOXSEG5EI16_V_MF4_MF4_TU */ 23586, /* PseudoVLOXSEG5EI16_V_MF4_MF8 */ 23592, /* PseudoVLOXSEG5EI16_V_MF4_MF8_MASK */ 23597, /* PseudoVLOXSEG5EI16_V_MF4_MF8_TU */ 23605, /* PseudoVLOXSEG5EI32_V_M1_M1 */ 23611, /* PseudoVLOXSEG5EI32_V_M1_M1_MASK */ 23616, /* PseudoVLOXSEG5EI32_V_M1_M1_TU */ 23624, /* PseudoVLOXSEG5EI32_V_M1_MF2 */ 23630, /* PseudoVLOXSEG5EI32_V_M1_MF2_MASK */ 23635, /* PseudoVLOXSEG5EI32_V_M1_MF2_TU */ 23643, /* PseudoVLOXSEG5EI32_V_M1_MF4 */ 23649, /* PseudoVLOXSEG5EI32_V_M1_MF4_MASK */ 23654, /* PseudoVLOXSEG5EI32_V_M1_MF4_TU */ 23662, /* PseudoVLOXSEG5EI32_V_M2_M1 */ 23668, /* PseudoVLOXSEG5EI32_V_M2_M1_MASK */ 23673, /* PseudoVLOXSEG5EI32_V_M2_M1_TU */ 23681, /* PseudoVLOXSEG5EI32_V_M2_MF2 */ 23687, /* PseudoVLOXSEG5EI32_V_M2_MF2_MASK */ 23692, /* PseudoVLOXSEG5EI32_V_M2_MF2_TU */ 23700, /* PseudoVLOXSEG5EI32_V_M4_M1 */ 23706, /* PseudoVLOXSEG5EI32_V_M4_M1_MASK */ 23711, /* PseudoVLOXSEG5EI32_V_M4_M1_TU */ 23719, /* PseudoVLOXSEG5EI32_V_MF2_M1 */ 23725, /* PseudoVLOXSEG5EI32_V_MF2_M1_MASK */ 23730, /* PseudoVLOXSEG5EI32_V_MF2_M1_TU */ 23738, /* PseudoVLOXSEG5EI32_V_MF2_MF2 */ 23744, /* PseudoVLOXSEG5EI32_V_MF2_MF2_MASK */ 23749, /* PseudoVLOXSEG5EI32_V_MF2_MF2_TU */ 23757, /* PseudoVLOXSEG5EI32_V_MF2_MF4 */ 23763, /* PseudoVLOXSEG5EI32_V_MF2_MF4_MASK */ 23768, /* PseudoVLOXSEG5EI32_V_MF2_MF4_TU */ 23776, /* PseudoVLOXSEG5EI32_V_MF2_MF8 */ 23782, /* PseudoVLOXSEG5EI32_V_MF2_MF8_MASK */ 23787, /* PseudoVLOXSEG5EI32_V_MF2_MF8_TU */ 23795, /* PseudoVLOXSEG5EI64_V_M1_M1 */ 23801, /* PseudoVLOXSEG5EI64_V_M1_M1_MASK */ 23806, /* PseudoVLOXSEG5EI64_V_M1_M1_TU */ 23814, /* PseudoVLOXSEG5EI64_V_M1_MF2 */ 23820, /* PseudoVLOXSEG5EI64_V_M1_MF2_MASK */ 23825, /* PseudoVLOXSEG5EI64_V_M1_MF2_TU */ 23833, /* PseudoVLOXSEG5EI64_V_M1_MF4 */ 23839, /* PseudoVLOXSEG5EI64_V_M1_MF4_MASK */ 23844, /* PseudoVLOXSEG5EI64_V_M1_MF4_TU */ 23852, /* PseudoVLOXSEG5EI64_V_M1_MF8 */ 23858, /* PseudoVLOXSEG5EI64_V_M1_MF8_MASK */ 23863, /* PseudoVLOXSEG5EI64_V_M1_MF8_TU */ 23871, /* PseudoVLOXSEG5EI64_V_M2_M1 */ 23877, /* PseudoVLOXSEG5EI64_V_M2_M1_MASK */ 23882, /* PseudoVLOXSEG5EI64_V_M2_M1_TU */ 23890, /* PseudoVLOXSEG5EI64_V_M2_MF2 */ 23896, /* PseudoVLOXSEG5EI64_V_M2_MF2_MASK */ 23901, /* PseudoVLOXSEG5EI64_V_M2_MF2_TU */ 23909, /* PseudoVLOXSEG5EI64_V_M2_MF4 */ 23915, /* PseudoVLOXSEG5EI64_V_M2_MF4_MASK */ 23920, /* PseudoVLOXSEG5EI64_V_M2_MF4_TU */ 23928, /* PseudoVLOXSEG5EI64_V_M4_M1 */ 23934, /* PseudoVLOXSEG5EI64_V_M4_M1_MASK */ 23939, /* PseudoVLOXSEG5EI64_V_M4_M1_TU */ 23947, /* PseudoVLOXSEG5EI64_V_M4_MF2 */ 23953, /* PseudoVLOXSEG5EI64_V_M4_MF2_MASK */ 23958, /* PseudoVLOXSEG5EI64_V_M4_MF2_TU */ 23966, /* PseudoVLOXSEG5EI64_V_M8_M1 */ 23972, /* PseudoVLOXSEG5EI64_V_M8_M1_MASK */ 23977, /* PseudoVLOXSEG5EI64_V_M8_M1_TU */ 23985, /* PseudoVLOXSEG5EI8_V_M1_M1 */ 23991, /* PseudoVLOXSEG5EI8_V_M1_M1_MASK */ 23996, /* PseudoVLOXSEG5EI8_V_M1_M1_TU */ 24004, /* PseudoVLOXSEG5EI8_V_MF2_M1 */ 24010, /* PseudoVLOXSEG5EI8_V_MF2_M1_MASK */ 24015, /* PseudoVLOXSEG5EI8_V_MF2_M1_TU */ 24023, /* PseudoVLOXSEG5EI8_V_MF2_MF2 */ 24029, /* PseudoVLOXSEG5EI8_V_MF2_MF2_MASK */ 24034, /* PseudoVLOXSEG5EI8_V_MF2_MF2_TU */ 24042, /* PseudoVLOXSEG5EI8_V_MF4_M1 */ 24048, /* PseudoVLOXSEG5EI8_V_MF4_M1_MASK */ 24053, /* PseudoVLOXSEG5EI8_V_MF4_M1_TU */ 24061, /* PseudoVLOXSEG5EI8_V_MF4_MF2 */ 24067, /* PseudoVLOXSEG5EI8_V_MF4_MF2_MASK */ 24072, /* PseudoVLOXSEG5EI8_V_MF4_MF2_TU */ 24080, /* PseudoVLOXSEG5EI8_V_MF4_MF4 */ 24086, /* PseudoVLOXSEG5EI8_V_MF4_MF4_MASK */ 24091, /* PseudoVLOXSEG5EI8_V_MF4_MF4_TU */ 24099, /* PseudoVLOXSEG5EI8_V_MF8_M1 */ 24105, /* PseudoVLOXSEG5EI8_V_MF8_M1_MASK */ 24110, /* PseudoVLOXSEG5EI8_V_MF8_M1_TU */ 24118, /* PseudoVLOXSEG5EI8_V_MF8_MF2 */ 24124, /* PseudoVLOXSEG5EI8_V_MF8_MF2_MASK */ 24129, /* PseudoVLOXSEG5EI8_V_MF8_MF2_TU */ 24137, /* PseudoVLOXSEG5EI8_V_MF8_MF4 */ 24143, /* PseudoVLOXSEG5EI8_V_MF8_MF4_MASK */ 24148, /* PseudoVLOXSEG5EI8_V_MF8_MF4_TU */ 24156, /* PseudoVLOXSEG5EI8_V_MF8_MF8 */ 24162, /* PseudoVLOXSEG5EI8_V_MF8_MF8_MASK */ 24167, /* PseudoVLOXSEG5EI8_V_MF8_MF8_TU */ 24175, /* PseudoVLOXSEG6EI16_V_M1_M1 */ 24181, /* PseudoVLOXSEG6EI16_V_M1_M1_MASK */ 24186, /* PseudoVLOXSEG6EI16_V_M1_M1_TU */ 24194, /* PseudoVLOXSEG6EI16_V_M1_MF2 */ 24200, /* PseudoVLOXSEG6EI16_V_M1_MF2_MASK */ 24205, /* PseudoVLOXSEG6EI16_V_M1_MF2_TU */ 24213, /* PseudoVLOXSEG6EI16_V_M2_M1 */ 24219, /* PseudoVLOXSEG6EI16_V_M2_M1_MASK */ 24224, /* PseudoVLOXSEG6EI16_V_M2_M1_TU */ 24232, /* PseudoVLOXSEG6EI16_V_MF2_M1 */ 24238, /* PseudoVLOXSEG6EI16_V_MF2_M1_MASK */ 24243, /* PseudoVLOXSEG6EI16_V_MF2_M1_TU */ 24251, /* PseudoVLOXSEG6EI16_V_MF2_MF2 */ 24257, /* PseudoVLOXSEG6EI16_V_MF2_MF2_MASK */ 24262, /* PseudoVLOXSEG6EI16_V_MF2_MF2_TU */ 24270, /* PseudoVLOXSEG6EI16_V_MF2_MF4 */ 24276, /* PseudoVLOXSEG6EI16_V_MF2_MF4_MASK */ 24281, /* PseudoVLOXSEG6EI16_V_MF2_MF4_TU */ 24289, /* PseudoVLOXSEG6EI16_V_MF4_M1 */ 24295, /* PseudoVLOXSEG6EI16_V_MF4_M1_MASK */ 24300, /* PseudoVLOXSEG6EI16_V_MF4_M1_TU */ 24308, /* PseudoVLOXSEG6EI16_V_MF4_MF2 */ 24314, /* PseudoVLOXSEG6EI16_V_MF4_MF2_MASK */ 24319, /* PseudoVLOXSEG6EI16_V_MF4_MF2_TU */ 24327, /* PseudoVLOXSEG6EI16_V_MF4_MF4 */ 24333, /* PseudoVLOXSEG6EI16_V_MF4_MF4_MASK */ 24338, /* PseudoVLOXSEG6EI16_V_MF4_MF4_TU */ 24346, /* PseudoVLOXSEG6EI16_V_MF4_MF8 */ 24352, /* PseudoVLOXSEG6EI16_V_MF4_MF8_MASK */ 24357, /* PseudoVLOXSEG6EI16_V_MF4_MF8_TU */ 24365, /* PseudoVLOXSEG6EI32_V_M1_M1 */ 24371, /* PseudoVLOXSEG6EI32_V_M1_M1_MASK */ 24376, /* PseudoVLOXSEG6EI32_V_M1_M1_TU */ 24384, /* PseudoVLOXSEG6EI32_V_M1_MF2 */ 24390, /* PseudoVLOXSEG6EI32_V_M1_MF2_MASK */ 24395, /* PseudoVLOXSEG6EI32_V_M1_MF2_TU */ 24403, /* PseudoVLOXSEG6EI32_V_M1_MF4 */ 24409, /* PseudoVLOXSEG6EI32_V_M1_MF4_MASK */ 24414, /* PseudoVLOXSEG6EI32_V_M1_MF4_TU */ 24422, /* PseudoVLOXSEG6EI32_V_M2_M1 */ 24428, /* PseudoVLOXSEG6EI32_V_M2_M1_MASK */ 24433, /* PseudoVLOXSEG6EI32_V_M2_M1_TU */ 24441, /* PseudoVLOXSEG6EI32_V_M2_MF2 */ 24447, /* PseudoVLOXSEG6EI32_V_M2_MF2_MASK */ 24452, /* PseudoVLOXSEG6EI32_V_M2_MF2_TU */ 24460, /* PseudoVLOXSEG6EI32_V_M4_M1 */ 24466, /* PseudoVLOXSEG6EI32_V_M4_M1_MASK */ 24471, /* PseudoVLOXSEG6EI32_V_M4_M1_TU */ 24479, /* PseudoVLOXSEG6EI32_V_MF2_M1 */ 24485, /* PseudoVLOXSEG6EI32_V_MF2_M1_MASK */ 24490, /* PseudoVLOXSEG6EI32_V_MF2_M1_TU */ 24498, /* PseudoVLOXSEG6EI32_V_MF2_MF2 */ 24504, /* PseudoVLOXSEG6EI32_V_MF2_MF2_MASK */ 24509, /* PseudoVLOXSEG6EI32_V_MF2_MF2_TU */ 24517, /* PseudoVLOXSEG6EI32_V_MF2_MF4 */ 24523, /* PseudoVLOXSEG6EI32_V_MF2_MF4_MASK */ 24528, /* PseudoVLOXSEG6EI32_V_MF2_MF4_TU */ 24536, /* PseudoVLOXSEG6EI32_V_MF2_MF8 */ 24542, /* PseudoVLOXSEG6EI32_V_MF2_MF8_MASK */ 24547, /* PseudoVLOXSEG6EI32_V_MF2_MF8_TU */ 24555, /* PseudoVLOXSEG6EI64_V_M1_M1 */ 24561, /* PseudoVLOXSEG6EI64_V_M1_M1_MASK */ 24566, /* PseudoVLOXSEG6EI64_V_M1_M1_TU */ 24574, /* PseudoVLOXSEG6EI64_V_M1_MF2 */ 24580, /* PseudoVLOXSEG6EI64_V_M1_MF2_MASK */ 24585, /* PseudoVLOXSEG6EI64_V_M1_MF2_TU */ 24593, /* PseudoVLOXSEG6EI64_V_M1_MF4 */ 24599, /* PseudoVLOXSEG6EI64_V_M1_MF4_MASK */ 24604, /* PseudoVLOXSEG6EI64_V_M1_MF4_TU */ 24612, /* PseudoVLOXSEG6EI64_V_M1_MF8 */ 24618, /* PseudoVLOXSEG6EI64_V_M1_MF8_MASK */ 24623, /* PseudoVLOXSEG6EI64_V_M1_MF8_TU */ 24631, /* PseudoVLOXSEG6EI64_V_M2_M1 */ 24637, /* PseudoVLOXSEG6EI64_V_M2_M1_MASK */ 24642, /* PseudoVLOXSEG6EI64_V_M2_M1_TU */ 24650, /* PseudoVLOXSEG6EI64_V_M2_MF2 */ 24656, /* PseudoVLOXSEG6EI64_V_M2_MF2_MASK */ 24661, /* PseudoVLOXSEG6EI64_V_M2_MF2_TU */ 24669, /* PseudoVLOXSEG6EI64_V_M2_MF4 */ 24675, /* PseudoVLOXSEG6EI64_V_M2_MF4_MASK */ 24680, /* PseudoVLOXSEG6EI64_V_M2_MF4_TU */ 24688, /* PseudoVLOXSEG6EI64_V_M4_M1 */ 24694, /* PseudoVLOXSEG6EI64_V_M4_M1_MASK */ 24699, /* PseudoVLOXSEG6EI64_V_M4_M1_TU */ 24707, /* PseudoVLOXSEG6EI64_V_M4_MF2 */ 24713, /* PseudoVLOXSEG6EI64_V_M4_MF2_MASK */ 24718, /* PseudoVLOXSEG6EI64_V_M4_MF2_TU */ 24726, /* PseudoVLOXSEG6EI64_V_M8_M1 */ 24732, /* PseudoVLOXSEG6EI64_V_M8_M1_MASK */ 24737, /* PseudoVLOXSEG6EI64_V_M8_M1_TU */ 24745, /* PseudoVLOXSEG6EI8_V_M1_M1 */ 24751, /* PseudoVLOXSEG6EI8_V_M1_M1_MASK */ 24756, /* PseudoVLOXSEG6EI8_V_M1_M1_TU */ 24764, /* PseudoVLOXSEG6EI8_V_MF2_M1 */ 24770, /* PseudoVLOXSEG6EI8_V_MF2_M1_MASK */ 24775, /* PseudoVLOXSEG6EI8_V_MF2_M1_TU */ 24783, /* PseudoVLOXSEG6EI8_V_MF2_MF2 */ 24789, /* PseudoVLOXSEG6EI8_V_MF2_MF2_MASK */ 24794, /* PseudoVLOXSEG6EI8_V_MF2_MF2_TU */ 24802, /* PseudoVLOXSEG6EI8_V_MF4_M1 */ 24808, /* PseudoVLOXSEG6EI8_V_MF4_M1_MASK */ 24813, /* PseudoVLOXSEG6EI8_V_MF4_M1_TU */ 24821, /* PseudoVLOXSEG6EI8_V_MF4_MF2 */ 24827, /* PseudoVLOXSEG6EI8_V_MF4_MF2_MASK */ 24832, /* PseudoVLOXSEG6EI8_V_MF4_MF2_TU */ 24840, /* PseudoVLOXSEG6EI8_V_MF4_MF4 */ 24846, /* PseudoVLOXSEG6EI8_V_MF4_MF4_MASK */ 24851, /* PseudoVLOXSEG6EI8_V_MF4_MF4_TU */ 24859, /* PseudoVLOXSEG6EI8_V_MF8_M1 */ 24865, /* PseudoVLOXSEG6EI8_V_MF8_M1_MASK */ 24870, /* PseudoVLOXSEG6EI8_V_MF8_M1_TU */ 24878, /* PseudoVLOXSEG6EI8_V_MF8_MF2 */ 24884, /* PseudoVLOXSEG6EI8_V_MF8_MF2_MASK */ 24889, /* PseudoVLOXSEG6EI8_V_MF8_MF2_TU */ 24897, /* PseudoVLOXSEG6EI8_V_MF8_MF4 */ 24903, /* PseudoVLOXSEG6EI8_V_MF8_MF4_MASK */ 24908, /* PseudoVLOXSEG6EI8_V_MF8_MF4_TU */ 24916, /* PseudoVLOXSEG6EI8_V_MF8_MF8 */ 24922, /* PseudoVLOXSEG6EI8_V_MF8_MF8_MASK */ 24927, /* PseudoVLOXSEG6EI8_V_MF8_MF8_TU */ 24935, /* PseudoVLOXSEG7EI16_V_M1_M1 */ 24941, /* PseudoVLOXSEG7EI16_V_M1_M1_MASK */ 24946, /* PseudoVLOXSEG7EI16_V_M1_M1_TU */ 24954, /* PseudoVLOXSEG7EI16_V_M1_MF2 */ 24960, /* PseudoVLOXSEG7EI16_V_M1_MF2_MASK */ 24965, /* PseudoVLOXSEG7EI16_V_M1_MF2_TU */ 24973, /* PseudoVLOXSEG7EI16_V_M2_M1 */ 24979, /* PseudoVLOXSEG7EI16_V_M2_M1_MASK */ 24984, /* PseudoVLOXSEG7EI16_V_M2_M1_TU */ 24992, /* PseudoVLOXSEG7EI16_V_MF2_M1 */ 24998, /* PseudoVLOXSEG7EI16_V_MF2_M1_MASK */ 25003, /* PseudoVLOXSEG7EI16_V_MF2_M1_TU */ 25011, /* PseudoVLOXSEG7EI16_V_MF2_MF2 */ 25017, /* PseudoVLOXSEG7EI16_V_MF2_MF2_MASK */ 25022, /* PseudoVLOXSEG7EI16_V_MF2_MF2_TU */ 25030, /* PseudoVLOXSEG7EI16_V_MF2_MF4 */ 25036, /* PseudoVLOXSEG7EI16_V_MF2_MF4_MASK */ 25041, /* PseudoVLOXSEG7EI16_V_MF2_MF4_TU */ 25049, /* PseudoVLOXSEG7EI16_V_MF4_M1 */ 25055, /* PseudoVLOXSEG7EI16_V_MF4_M1_MASK */ 25060, /* PseudoVLOXSEG7EI16_V_MF4_M1_TU */ 25068, /* PseudoVLOXSEG7EI16_V_MF4_MF2 */ 25074, /* PseudoVLOXSEG7EI16_V_MF4_MF2_MASK */ 25079, /* PseudoVLOXSEG7EI16_V_MF4_MF2_TU */ 25087, /* PseudoVLOXSEG7EI16_V_MF4_MF4 */ 25093, /* PseudoVLOXSEG7EI16_V_MF4_MF4_MASK */ 25098, /* PseudoVLOXSEG7EI16_V_MF4_MF4_TU */ 25106, /* PseudoVLOXSEG7EI16_V_MF4_MF8 */ 25112, /* PseudoVLOXSEG7EI16_V_MF4_MF8_MASK */ 25117, /* PseudoVLOXSEG7EI16_V_MF4_MF8_TU */ 25125, /* PseudoVLOXSEG7EI32_V_M1_M1 */ 25131, /* PseudoVLOXSEG7EI32_V_M1_M1_MASK */ 25136, /* PseudoVLOXSEG7EI32_V_M1_M1_TU */ 25144, /* PseudoVLOXSEG7EI32_V_M1_MF2 */ 25150, /* PseudoVLOXSEG7EI32_V_M1_MF2_MASK */ 25155, /* PseudoVLOXSEG7EI32_V_M1_MF2_TU */ 25163, /* PseudoVLOXSEG7EI32_V_M1_MF4 */ 25169, /* PseudoVLOXSEG7EI32_V_M1_MF4_MASK */ 25174, /* PseudoVLOXSEG7EI32_V_M1_MF4_TU */ 25182, /* PseudoVLOXSEG7EI32_V_M2_M1 */ 25188, /* PseudoVLOXSEG7EI32_V_M2_M1_MASK */ 25193, /* PseudoVLOXSEG7EI32_V_M2_M1_TU */ 25201, /* PseudoVLOXSEG7EI32_V_M2_MF2 */ 25207, /* PseudoVLOXSEG7EI32_V_M2_MF2_MASK */ 25212, /* PseudoVLOXSEG7EI32_V_M2_MF2_TU */ 25220, /* PseudoVLOXSEG7EI32_V_M4_M1 */ 25226, /* PseudoVLOXSEG7EI32_V_M4_M1_MASK */ 25231, /* PseudoVLOXSEG7EI32_V_M4_M1_TU */ 25239, /* PseudoVLOXSEG7EI32_V_MF2_M1 */ 25245, /* PseudoVLOXSEG7EI32_V_MF2_M1_MASK */ 25250, /* PseudoVLOXSEG7EI32_V_MF2_M1_TU */ 25258, /* PseudoVLOXSEG7EI32_V_MF2_MF2 */ 25264, /* PseudoVLOXSEG7EI32_V_MF2_MF2_MASK */ 25269, /* PseudoVLOXSEG7EI32_V_MF2_MF2_TU */ 25277, /* PseudoVLOXSEG7EI32_V_MF2_MF4 */ 25283, /* PseudoVLOXSEG7EI32_V_MF2_MF4_MASK */ 25288, /* PseudoVLOXSEG7EI32_V_MF2_MF4_TU */ 25296, /* PseudoVLOXSEG7EI32_V_MF2_MF8 */ 25302, /* PseudoVLOXSEG7EI32_V_MF2_MF8_MASK */ 25307, /* PseudoVLOXSEG7EI32_V_MF2_MF8_TU */ 25315, /* PseudoVLOXSEG7EI64_V_M1_M1 */ 25321, /* PseudoVLOXSEG7EI64_V_M1_M1_MASK */ 25326, /* PseudoVLOXSEG7EI64_V_M1_M1_TU */ 25334, /* PseudoVLOXSEG7EI64_V_M1_MF2 */ 25340, /* PseudoVLOXSEG7EI64_V_M1_MF2_MASK */ 25345, /* PseudoVLOXSEG7EI64_V_M1_MF2_TU */ 25353, /* PseudoVLOXSEG7EI64_V_M1_MF4 */ 25359, /* PseudoVLOXSEG7EI64_V_M1_MF4_MASK */ 25364, /* PseudoVLOXSEG7EI64_V_M1_MF4_TU */ 25372, /* PseudoVLOXSEG7EI64_V_M1_MF8 */ 25378, /* PseudoVLOXSEG7EI64_V_M1_MF8_MASK */ 25383, /* PseudoVLOXSEG7EI64_V_M1_MF8_TU */ 25391, /* PseudoVLOXSEG7EI64_V_M2_M1 */ 25397, /* PseudoVLOXSEG7EI64_V_M2_M1_MASK */ 25402, /* PseudoVLOXSEG7EI64_V_M2_M1_TU */ 25410, /* PseudoVLOXSEG7EI64_V_M2_MF2 */ 25416, /* PseudoVLOXSEG7EI64_V_M2_MF2_MASK */ 25421, /* PseudoVLOXSEG7EI64_V_M2_MF2_TU */ 25429, /* PseudoVLOXSEG7EI64_V_M2_MF4 */ 25435, /* PseudoVLOXSEG7EI64_V_M2_MF4_MASK */ 25440, /* PseudoVLOXSEG7EI64_V_M2_MF4_TU */ 25448, /* PseudoVLOXSEG7EI64_V_M4_M1 */ 25454, /* PseudoVLOXSEG7EI64_V_M4_M1_MASK */ 25459, /* PseudoVLOXSEG7EI64_V_M4_M1_TU */ 25467, /* PseudoVLOXSEG7EI64_V_M4_MF2 */ 25473, /* PseudoVLOXSEG7EI64_V_M4_MF2_MASK */ 25478, /* PseudoVLOXSEG7EI64_V_M4_MF2_TU */ 25486, /* PseudoVLOXSEG7EI64_V_M8_M1 */ 25492, /* PseudoVLOXSEG7EI64_V_M8_M1_MASK */ 25497, /* PseudoVLOXSEG7EI64_V_M8_M1_TU */ 25505, /* PseudoVLOXSEG7EI8_V_M1_M1 */ 25511, /* PseudoVLOXSEG7EI8_V_M1_M1_MASK */ 25516, /* PseudoVLOXSEG7EI8_V_M1_M1_TU */ 25524, /* PseudoVLOXSEG7EI8_V_MF2_M1 */ 25530, /* PseudoVLOXSEG7EI8_V_MF2_M1_MASK */ 25535, /* PseudoVLOXSEG7EI8_V_MF2_M1_TU */ 25543, /* PseudoVLOXSEG7EI8_V_MF2_MF2 */ 25549, /* PseudoVLOXSEG7EI8_V_MF2_MF2_MASK */ 25554, /* PseudoVLOXSEG7EI8_V_MF2_MF2_TU */ 25562, /* PseudoVLOXSEG7EI8_V_MF4_M1 */ 25568, /* PseudoVLOXSEG7EI8_V_MF4_M1_MASK */ 25573, /* PseudoVLOXSEG7EI8_V_MF4_M1_TU */ 25581, /* PseudoVLOXSEG7EI8_V_MF4_MF2 */ 25587, /* PseudoVLOXSEG7EI8_V_MF4_MF2_MASK */ 25592, /* PseudoVLOXSEG7EI8_V_MF4_MF2_TU */ 25600, /* PseudoVLOXSEG7EI8_V_MF4_MF4 */ 25606, /* PseudoVLOXSEG7EI8_V_MF4_MF4_MASK */ 25611, /* PseudoVLOXSEG7EI8_V_MF4_MF4_TU */ 25619, /* PseudoVLOXSEG7EI8_V_MF8_M1 */ 25625, /* PseudoVLOXSEG7EI8_V_MF8_M1_MASK */ 25630, /* PseudoVLOXSEG7EI8_V_MF8_M1_TU */ 25638, /* PseudoVLOXSEG7EI8_V_MF8_MF2 */ 25644, /* PseudoVLOXSEG7EI8_V_MF8_MF2_MASK */ 25649, /* PseudoVLOXSEG7EI8_V_MF8_MF2_TU */ 25657, /* PseudoVLOXSEG7EI8_V_MF8_MF4 */ 25663, /* PseudoVLOXSEG7EI8_V_MF8_MF4_MASK */ 25668, /* PseudoVLOXSEG7EI8_V_MF8_MF4_TU */ 25676, /* PseudoVLOXSEG7EI8_V_MF8_MF8 */ 25682, /* PseudoVLOXSEG7EI8_V_MF8_MF8_MASK */ 25687, /* PseudoVLOXSEG7EI8_V_MF8_MF8_TU */ 25695, /* PseudoVLOXSEG8EI16_V_M1_M1 */ 25701, /* PseudoVLOXSEG8EI16_V_M1_M1_MASK */ 25706, /* PseudoVLOXSEG8EI16_V_M1_M1_TU */ 25714, /* PseudoVLOXSEG8EI16_V_M1_MF2 */ 25720, /* PseudoVLOXSEG8EI16_V_M1_MF2_MASK */ 25725, /* PseudoVLOXSEG8EI16_V_M1_MF2_TU */ 25733, /* PseudoVLOXSEG8EI16_V_M2_M1 */ 25739, /* PseudoVLOXSEG8EI16_V_M2_M1_MASK */ 25744, /* PseudoVLOXSEG8EI16_V_M2_M1_TU */ 25752, /* PseudoVLOXSEG8EI16_V_MF2_M1 */ 25758, /* PseudoVLOXSEG8EI16_V_MF2_M1_MASK */ 25763, /* PseudoVLOXSEG8EI16_V_MF2_M1_TU */ 25771, /* PseudoVLOXSEG8EI16_V_MF2_MF2 */ 25777, /* PseudoVLOXSEG8EI16_V_MF2_MF2_MASK */ 25782, /* PseudoVLOXSEG8EI16_V_MF2_MF2_TU */ 25790, /* PseudoVLOXSEG8EI16_V_MF2_MF4 */ 25796, /* PseudoVLOXSEG8EI16_V_MF2_MF4_MASK */ 25801, /* PseudoVLOXSEG8EI16_V_MF2_MF4_TU */ 25809, /* PseudoVLOXSEG8EI16_V_MF4_M1 */ 25815, /* PseudoVLOXSEG8EI16_V_MF4_M1_MASK */ 25820, /* PseudoVLOXSEG8EI16_V_MF4_M1_TU */ 25828, /* PseudoVLOXSEG8EI16_V_MF4_MF2 */ 25834, /* PseudoVLOXSEG8EI16_V_MF4_MF2_MASK */ 25839, /* PseudoVLOXSEG8EI16_V_MF4_MF2_TU */ 25847, /* PseudoVLOXSEG8EI16_V_MF4_MF4 */ 25853, /* PseudoVLOXSEG8EI16_V_MF4_MF4_MASK */ 25858, /* PseudoVLOXSEG8EI16_V_MF4_MF4_TU */ 25866, /* PseudoVLOXSEG8EI16_V_MF4_MF8 */ 25872, /* PseudoVLOXSEG8EI16_V_MF4_MF8_MASK */ 25877, /* PseudoVLOXSEG8EI16_V_MF4_MF8_TU */ 25885, /* PseudoVLOXSEG8EI32_V_M1_M1 */ 25891, /* PseudoVLOXSEG8EI32_V_M1_M1_MASK */ 25896, /* PseudoVLOXSEG8EI32_V_M1_M1_TU */ 25904, /* PseudoVLOXSEG8EI32_V_M1_MF2 */ 25910, /* PseudoVLOXSEG8EI32_V_M1_MF2_MASK */ 25915, /* PseudoVLOXSEG8EI32_V_M1_MF2_TU */ 25923, /* PseudoVLOXSEG8EI32_V_M1_MF4 */ 25929, /* PseudoVLOXSEG8EI32_V_M1_MF4_MASK */ 25934, /* PseudoVLOXSEG8EI32_V_M1_MF4_TU */ 25942, /* PseudoVLOXSEG8EI32_V_M2_M1 */ 25948, /* PseudoVLOXSEG8EI32_V_M2_M1_MASK */ 25953, /* PseudoVLOXSEG8EI32_V_M2_M1_TU */ 25961, /* PseudoVLOXSEG8EI32_V_M2_MF2 */ 25967, /* PseudoVLOXSEG8EI32_V_M2_MF2_MASK */ 25972, /* PseudoVLOXSEG8EI32_V_M2_MF2_TU */ 25980, /* PseudoVLOXSEG8EI32_V_M4_M1 */ 25986, /* PseudoVLOXSEG8EI32_V_M4_M1_MASK */ 25991, /* PseudoVLOXSEG8EI32_V_M4_M1_TU */ 25999, /* PseudoVLOXSEG8EI32_V_MF2_M1 */ 26005, /* PseudoVLOXSEG8EI32_V_MF2_M1_MASK */ 26010, /* PseudoVLOXSEG8EI32_V_MF2_M1_TU */ 26018, /* PseudoVLOXSEG8EI32_V_MF2_MF2 */ 26024, /* PseudoVLOXSEG8EI32_V_MF2_MF2_MASK */ 26029, /* PseudoVLOXSEG8EI32_V_MF2_MF2_TU */ 26037, /* PseudoVLOXSEG8EI32_V_MF2_MF4 */ 26043, /* PseudoVLOXSEG8EI32_V_MF2_MF4_MASK */ 26048, /* PseudoVLOXSEG8EI32_V_MF2_MF4_TU */ 26056, /* PseudoVLOXSEG8EI32_V_MF2_MF8 */ 26062, /* PseudoVLOXSEG8EI32_V_MF2_MF8_MASK */ 26067, /* PseudoVLOXSEG8EI32_V_MF2_MF8_TU */ 26075, /* PseudoVLOXSEG8EI64_V_M1_M1 */ 26081, /* PseudoVLOXSEG8EI64_V_M1_M1_MASK */ 26086, /* PseudoVLOXSEG8EI64_V_M1_M1_TU */ 26094, /* PseudoVLOXSEG8EI64_V_M1_MF2 */ 26100, /* PseudoVLOXSEG8EI64_V_M1_MF2_MASK */ 26105, /* PseudoVLOXSEG8EI64_V_M1_MF2_TU */ 26113, /* PseudoVLOXSEG8EI64_V_M1_MF4 */ 26119, /* PseudoVLOXSEG8EI64_V_M1_MF4_MASK */ 26124, /* PseudoVLOXSEG8EI64_V_M1_MF4_TU */ 26132, /* PseudoVLOXSEG8EI64_V_M1_MF8 */ 26138, /* PseudoVLOXSEG8EI64_V_M1_MF8_MASK */ 26143, /* PseudoVLOXSEG8EI64_V_M1_MF8_TU */ 26151, /* PseudoVLOXSEG8EI64_V_M2_M1 */ 26157, /* PseudoVLOXSEG8EI64_V_M2_M1_MASK */ 26162, /* PseudoVLOXSEG8EI64_V_M2_M1_TU */ 26170, /* PseudoVLOXSEG8EI64_V_M2_MF2 */ 26176, /* PseudoVLOXSEG8EI64_V_M2_MF2_MASK */ 26181, /* PseudoVLOXSEG8EI64_V_M2_MF2_TU */ 26189, /* PseudoVLOXSEG8EI64_V_M2_MF4 */ 26195, /* PseudoVLOXSEG8EI64_V_M2_MF4_MASK */ 26200, /* PseudoVLOXSEG8EI64_V_M2_MF4_TU */ 26208, /* PseudoVLOXSEG8EI64_V_M4_M1 */ 26214, /* PseudoVLOXSEG8EI64_V_M4_M1_MASK */ 26219, /* PseudoVLOXSEG8EI64_V_M4_M1_TU */ 26227, /* PseudoVLOXSEG8EI64_V_M4_MF2 */ 26233, /* PseudoVLOXSEG8EI64_V_M4_MF2_MASK */ 26238, /* PseudoVLOXSEG8EI64_V_M4_MF2_TU */ 26246, /* PseudoVLOXSEG8EI64_V_M8_M1 */ 26252, /* PseudoVLOXSEG8EI64_V_M8_M1_MASK */ 26257, /* PseudoVLOXSEG8EI64_V_M8_M1_TU */ 26265, /* PseudoVLOXSEG8EI8_V_M1_M1 */ 26271, /* PseudoVLOXSEG8EI8_V_M1_M1_MASK */ 26276, /* PseudoVLOXSEG8EI8_V_M1_M1_TU */ 26284, /* PseudoVLOXSEG8EI8_V_MF2_M1 */ 26290, /* PseudoVLOXSEG8EI8_V_MF2_M1_MASK */ 26295, /* PseudoVLOXSEG8EI8_V_MF2_M1_TU */ 26303, /* PseudoVLOXSEG8EI8_V_MF2_MF2 */ 26309, /* PseudoVLOXSEG8EI8_V_MF2_MF2_MASK */ 26314, /* PseudoVLOXSEG8EI8_V_MF2_MF2_TU */ 26322, /* PseudoVLOXSEG8EI8_V_MF4_M1 */ 26328, /* PseudoVLOXSEG8EI8_V_MF4_M1_MASK */ 26333, /* PseudoVLOXSEG8EI8_V_MF4_M1_TU */ 26341, /* PseudoVLOXSEG8EI8_V_MF4_MF2 */ 26347, /* PseudoVLOXSEG8EI8_V_MF4_MF2_MASK */ 26352, /* PseudoVLOXSEG8EI8_V_MF4_MF2_TU */ 26360, /* PseudoVLOXSEG8EI8_V_MF4_MF4 */ 26366, /* PseudoVLOXSEG8EI8_V_MF4_MF4_MASK */ 26371, /* PseudoVLOXSEG8EI8_V_MF4_MF4_TU */ 26379, /* PseudoVLOXSEG8EI8_V_MF8_M1 */ 26385, /* PseudoVLOXSEG8EI8_V_MF8_M1_MASK */ 26390, /* PseudoVLOXSEG8EI8_V_MF8_M1_TU */ 26398, /* PseudoVLOXSEG8EI8_V_MF8_MF2 */ 26404, /* PseudoVLOXSEG8EI8_V_MF8_MF2_MASK */ 26409, /* PseudoVLOXSEG8EI8_V_MF8_MF2_TU */ 26417, /* PseudoVLOXSEG8EI8_V_MF8_MF4 */ 26423, /* PseudoVLOXSEG8EI8_V_MF8_MF4_MASK */ 26428, /* PseudoVLOXSEG8EI8_V_MF8_MF4_TU */ 26436, /* PseudoVLOXSEG8EI8_V_MF8_MF8 */ 26442, /* PseudoVLOXSEG8EI8_V_MF8_MF8_MASK */ 26447, /* PseudoVLOXSEG8EI8_V_MF8_MF8_TU */ 26455, /* PseudoVLSE16_V_M1 */ 26461, /* PseudoVLSE16_V_M1_MASK */ 26466, /* PseudoVLSE16_V_M1_TU */ 26474, /* PseudoVLSE16_V_M2 */ 26480, /* PseudoVLSE16_V_M2_MASK */ 26485, /* PseudoVLSE16_V_M2_TU */ 26493, /* PseudoVLSE16_V_M4 */ 26499, /* PseudoVLSE16_V_M4_MASK */ 26504, /* PseudoVLSE16_V_M4_TU */ 26512, /* PseudoVLSE16_V_M8 */ 26518, /* PseudoVLSE16_V_M8_MASK */ 26523, /* PseudoVLSE16_V_M8_TU */ 26531, /* PseudoVLSE16_V_MF2 */ 26537, /* PseudoVLSE16_V_MF2_MASK */ 26542, /* PseudoVLSE16_V_MF2_TU */ 26550, /* PseudoVLSE16_V_MF4 */ 26556, /* PseudoVLSE16_V_MF4_MASK */ 26561, /* PseudoVLSE16_V_MF4_TU */ 26569, /* PseudoVLSE32_V_M1 */ 26575, /* PseudoVLSE32_V_M1_MASK */ 26580, /* PseudoVLSE32_V_M1_TU */ 26588, /* PseudoVLSE32_V_M2 */ 26594, /* PseudoVLSE32_V_M2_MASK */ 26599, /* PseudoVLSE32_V_M2_TU */ 26607, /* PseudoVLSE32_V_M4 */ 26613, /* PseudoVLSE32_V_M4_MASK */ 26618, /* PseudoVLSE32_V_M4_TU */ 26626, /* PseudoVLSE32_V_M8 */ 26632, /* PseudoVLSE32_V_M8_MASK */ 26637, /* PseudoVLSE32_V_M8_TU */ 26645, /* PseudoVLSE32_V_MF2 */ 26651, /* PseudoVLSE32_V_MF2_MASK */ 26656, /* PseudoVLSE32_V_MF2_TU */ 26664, /* PseudoVLSE64_V_M1 */ 26670, /* PseudoVLSE64_V_M1_MASK */ 26675, /* PseudoVLSE64_V_M1_TU */ 26683, /* PseudoVLSE64_V_M2 */ 26689, /* PseudoVLSE64_V_M2_MASK */ 26694, /* PseudoVLSE64_V_M2_TU */ 26702, /* PseudoVLSE64_V_M4 */ 26708, /* PseudoVLSE64_V_M4_MASK */ 26713, /* PseudoVLSE64_V_M4_TU */ 26721, /* PseudoVLSE64_V_M8 */ 26727, /* PseudoVLSE64_V_M8_MASK */ 26732, /* PseudoVLSE64_V_M8_TU */ 26740, /* PseudoVLSE8_V_M1 */ 26746, /* PseudoVLSE8_V_M1_MASK */ 26751, /* PseudoVLSE8_V_M1_TU */ 26759, /* PseudoVLSE8_V_M2 */ 26765, /* PseudoVLSE8_V_M2_MASK */ 26770, /* PseudoVLSE8_V_M2_TU */ 26778, /* PseudoVLSE8_V_M4 */ 26784, /* PseudoVLSE8_V_M4_MASK */ 26789, /* PseudoVLSE8_V_M4_TU */ 26797, /* PseudoVLSE8_V_M8 */ 26803, /* PseudoVLSE8_V_M8_MASK */ 26808, /* PseudoVLSE8_V_M8_TU */ 26816, /* PseudoVLSE8_V_MF2 */ 26822, /* PseudoVLSE8_V_MF2_MASK */ 26827, /* PseudoVLSE8_V_MF2_TU */ 26835, /* PseudoVLSE8_V_MF4 */ 26841, /* PseudoVLSE8_V_MF4_MASK */ 26846, /* PseudoVLSE8_V_MF4_TU */ 26854, /* PseudoVLSE8_V_MF8 */ 26860, /* PseudoVLSE8_V_MF8_MASK */ 26865, /* PseudoVLSE8_V_MF8_TU */ 26873, /* PseudoVLSEG2E16FF_V_M1 */ 26879, /* PseudoVLSEG2E16FF_V_M1_MASK */ 26884, /* PseudoVLSEG2E16FF_V_M1_TU */ 26892, /* PseudoVLSEG2E16FF_V_M2 */ 26898, /* PseudoVLSEG2E16FF_V_M2_MASK */ 26903, /* PseudoVLSEG2E16FF_V_M2_TU */ 26911, /* PseudoVLSEG2E16FF_V_M4 */ 26917, /* PseudoVLSEG2E16FF_V_M4_MASK */ 26922, /* PseudoVLSEG2E16FF_V_M4_TU */ 26930, /* PseudoVLSEG2E16FF_V_MF2 */ 26936, /* PseudoVLSEG2E16FF_V_MF2_MASK */ 26941, /* PseudoVLSEG2E16FF_V_MF2_TU */ 26949, /* PseudoVLSEG2E16FF_V_MF4 */ 26955, /* PseudoVLSEG2E16FF_V_MF4_MASK */ 26960, /* PseudoVLSEG2E16FF_V_MF4_TU */ 26968, /* PseudoVLSEG2E16_V_M1 */ 26974, /* PseudoVLSEG2E16_V_M1_MASK */ 26978, /* PseudoVLSEG2E16_V_M1_TU */ 26985, /* PseudoVLSEG2E16_V_M2 */ 26990, /* PseudoVLSEG2E16_V_M2_MASK */ 26994, /* PseudoVLSEG2E16_V_M2_TU */ 27001, /* PseudoVLSEG2E16_V_M4 */ 27006, /* PseudoVLSEG2E16_V_M4_MASK */ 27010, /* PseudoVLSEG2E16_V_M4_TU */ 27017, /* PseudoVLSEG2E16_V_MF2 */ 27022, /* PseudoVLSEG2E16_V_MF2_MASK */ 27026, /* PseudoVLSEG2E16_V_MF2_TU */ 27033, /* PseudoVLSEG2E16_V_MF4 */ 27038, /* PseudoVLSEG2E16_V_MF4_MASK */ 27042, /* PseudoVLSEG2E16_V_MF4_TU */ 27049, /* PseudoVLSEG2E32FF_V_M1 */ 27054, /* PseudoVLSEG2E32FF_V_M1_MASK */ 27059, /* PseudoVLSEG2E32FF_V_M1_TU */ 27067, /* PseudoVLSEG2E32FF_V_M2 */ 27073, /* PseudoVLSEG2E32FF_V_M2_MASK */ 27078, /* PseudoVLSEG2E32FF_V_M2_TU */ 27086, /* PseudoVLSEG2E32FF_V_M4 */ 27092, /* PseudoVLSEG2E32FF_V_M4_MASK */ 27097, /* PseudoVLSEG2E32FF_V_M4_TU */ 27105, /* PseudoVLSEG2E32FF_V_MF2 */ 27111, /* PseudoVLSEG2E32FF_V_MF2_MASK */ 27116, /* PseudoVLSEG2E32FF_V_MF2_TU */ 27124, /* PseudoVLSEG2E32_V_M1 */ 27130, /* PseudoVLSEG2E32_V_M1_MASK */ 27134, /* PseudoVLSEG2E32_V_M1_TU */ 27141, /* PseudoVLSEG2E32_V_M2 */ 27146, /* PseudoVLSEG2E32_V_M2_MASK */ 27150, /* PseudoVLSEG2E32_V_M2_TU */ 27157, /* PseudoVLSEG2E32_V_M4 */ 27162, /* PseudoVLSEG2E32_V_M4_MASK */ 27166, /* PseudoVLSEG2E32_V_M4_TU */ 27173, /* PseudoVLSEG2E32_V_MF2 */ 27178, /* PseudoVLSEG2E32_V_MF2_MASK */ 27182, /* PseudoVLSEG2E32_V_MF2_TU */ 27189, /* PseudoVLSEG2E64FF_V_M1 */ 27194, /* PseudoVLSEG2E64FF_V_M1_MASK */ 27199, /* PseudoVLSEG2E64FF_V_M1_TU */ 27207, /* PseudoVLSEG2E64FF_V_M2 */ 27213, /* PseudoVLSEG2E64FF_V_M2_MASK */ 27218, /* PseudoVLSEG2E64FF_V_M2_TU */ 27226, /* PseudoVLSEG2E64FF_V_M4 */ 27232, /* PseudoVLSEG2E64FF_V_M4_MASK */ 27237, /* PseudoVLSEG2E64FF_V_M4_TU */ 27245, /* PseudoVLSEG2E64_V_M1 */ 27251, /* PseudoVLSEG2E64_V_M1_MASK */ 27255, /* PseudoVLSEG2E64_V_M1_TU */ 27262, /* PseudoVLSEG2E64_V_M2 */ 27267, /* PseudoVLSEG2E64_V_M2_MASK */ 27271, /* PseudoVLSEG2E64_V_M2_TU */ 27278, /* PseudoVLSEG2E64_V_M4 */ 27283, /* PseudoVLSEG2E64_V_M4_MASK */ 27287, /* PseudoVLSEG2E64_V_M4_TU */ 27294, /* PseudoVLSEG2E8FF_V_M1 */ 27299, /* PseudoVLSEG2E8FF_V_M1_MASK */ 27304, /* PseudoVLSEG2E8FF_V_M1_TU */ 27312, /* PseudoVLSEG2E8FF_V_M2 */ 27318, /* PseudoVLSEG2E8FF_V_M2_MASK */ 27323, /* PseudoVLSEG2E8FF_V_M2_TU */ 27331, /* PseudoVLSEG2E8FF_V_M4 */ 27337, /* PseudoVLSEG2E8FF_V_M4_MASK */ 27342, /* PseudoVLSEG2E8FF_V_M4_TU */ 27350, /* PseudoVLSEG2E8FF_V_MF2 */ 27356, /* PseudoVLSEG2E8FF_V_MF2_MASK */ 27361, /* PseudoVLSEG2E8FF_V_MF2_TU */ 27369, /* PseudoVLSEG2E8FF_V_MF4 */ 27375, /* PseudoVLSEG2E8FF_V_MF4_MASK */ 27380, /* PseudoVLSEG2E8FF_V_MF4_TU */ 27388, /* PseudoVLSEG2E8FF_V_MF8 */ 27394, /* PseudoVLSEG2E8FF_V_MF8_MASK */ 27399, /* PseudoVLSEG2E8FF_V_MF8_TU */ 27407, /* PseudoVLSEG2E8_V_M1 */ 27413, /* PseudoVLSEG2E8_V_M1_MASK */ 27417, /* PseudoVLSEG2E8_V_M1_TU */ 27424, /* PseudoVLSEG2E8_V_M2 */ 27429, /* PseudoVLSEG2E8_V_M2_MASK */ 27433, /* PseudoVLSEG2E8_V_M2_TU */ 27440, /* PseudoVLSEG2E8_V_M4 */ 27445, /* PseudoVLSEG2E8_V_M4_MASK */ 27449, /* PseudoVLSEG2E8_V_M4_TU */ 27456, /* PseudoVLSEG2E8_V_MF2 */ 27461, /* PseudoVLSEG2E8_V_MF2_MASK */ 27465, /* PseudoVLSEG2E8_V_MF2_TU */ 27472, /* PseudoVLSEG2E8_V_MF4 */ 27477, /* PseudoVLSEG2E8_V_MF4_MASK */ 27481, /* PseudoVLSEG2E8_V_MF4_TU */ 27488, /* PseudoVLSEG2E8_V_MF8 */ 27493, /* PseudoVLSEG2E8_V_MF8_MASK */ 27497, /* PseudoVLSEG2E8_V_MF8_TU */ 27504, /* PseudoVLSEG3E16FF_V_M1 */ 27509, /* PseudoVLSEG3E16FF_V_M1_MASK */ 27514, /* PseudoVLSEG3E16FF_V_M1_TU */ 27522, /* PseudoVLSEG3E16FF_V_M2 */ 27528, /* PseudoVLSEG3E16FF_V_M2_MASK */ 27533, /* PseudoVLSEG3E16FF_V_M2_TU */ 27541, /* PseudoVLSEG3E16FF_V_MF2 */ 27547, /* PseudoVLSEG3E16FF_V_MF2_MASK */ 27552, /* PseudoVLSEG3E16FF_V_MF2_TU */ 27560, /* PseudoVLSEG3E16FF_V_MF4 */ 27566, /* PseudoVLSEG3E16FF_V_MF4_MASK */ 27571, /* PseudoVLSEG3E16FF_V_MF4_TU */ 27579, /* PseudoVLSEG3E16_V_M1 */ 27585, /* PseudoVLSEG3E16_V_M1_MASK */ 27589, /* PseudoVLSEG3E16_V_M1_TU */ 27596, /* PseudoVLSEG3E16_V_M2 */ 27601, /* PseudoVLSEG3E16_V_M2_MASK */ 27605, /* PseudoVLSEG3E16_V_M2_TU */ 27612, /* PseudoVLSEG3E16_V_MF2 */ 27617, /* PseudoVLSEG3E16_V_MF2_MASK */ 27621, /* PseudoVLSEG3E16_V_MF2_TU */ 27628, /* PseudoVLSEG3E16_V_MF4 */ 27633, /* PseudoVLSEG3E16_V_MF4_MASK */ 27637, /* PseudoVLSEG3E16_V_MF4_TU */ 27644, /* PseudoVLSEG3E32FF_V_M1 */ 27649, /* PseudoVLSEG3E32FF_V_M1_MASK */ 27654, /* PseudoVLSEG3E32FF_V_M1_TU */ 27662, /* PseudoVLSEG3E32FF_V_M2 */ 27668, /* PseudoVLSEG3E32FF_V_M2_MASK */ 27673, /* PseudoVLSEG3E32FF_V_M2_TU */ 27681, /* PseudoVLSEG3E32FF_V_MF2 */ 27687, /* PseudoVLSEG3E32FF_V_MF2_MASK */ 27692, /* PseudoVLSEG3E32FF_V_MF2_TU */ 27700, /* PseudoVLSEG3E32_V_M1 */ 27706, /* PseudoVLSEG3E32_V_M1_MASK */ 27710, /* PseudoVLSEG3E32_V_M1_TU */ 27717, /* PseudoVLSEG3E32_V_M2 */ 27722, /* PseudoVLSEG3E32_V_M2_MASK */ 27726, /* PseudoVLSEG3E32_V_M2_TU */ 27733, /* PseudoVLSEG3E32_V_MF2 */ 27738, /* PseudoVLSEG3E32_V_MF2_MASK */ 27742, /* PseudoVLSEG3E32_V_MF2_TU */ 27749, /* PseudoVLSEG3E64FF_V_M1 */ 27754, /* PseudoVLSEG3E64FF_V_M1_MASK */ 27759, /* PseudoVLSEG3E64FF_V_M1_TU */ 27767, /* PseudoVLSEG3E64FF_V_M2 */ 27773, /* PseudoVLSEG3E64FF_V_M2_MASK */ 27778, /* PseudoVLSEG3E64FF_V_M2_TU */ 27786, /* PseudoVLSEG3E64_V_M1 */ 27792, /* PseudoVLSEG3E64_V_M1_MASK */ 27796, /* PseudoVLSEG3E64_V_M1_TU */ 27803, /* PseudoVLSEG3E64_V_M2 */ 27808, /* PseudoVLSEG3E64_V_M2_MASK */ 27812, /* PseudoVLSEG3E64_V_M2_TU */ 27819, /* PseudoVLSEG3E8FF_V_M1 */ 27824, /* PseudoVLSEG3E8FF_V_M1_MASK */ 27829, /* PseudoVLSEG3E8FF_V_M1_TU */ 27837, /* PseudoVLSEG3E8FF_V_M2 */ 27843, /* PseudoVLSEG3E8FF_V_M2_MASK */ 27848, /* PseudoVLSEG3E8FF_V_M2_TU */ 27856, /* PseudoVLSEG3E8FF_V_MF2 */ 27862, /* PseudoVLSEG3E8FF_V_MF2_MASK */ 27867, /* PseudoVLSEG3E8FF_V_MF2_TU */ 27875, /* PseudoVLSEG3E8FF_V_MF4 */ 27881, /* PseudoVLSEG3E8FF_V_MF4_MASK */ 27886, /* PseudoVLSEG3E8FF_V_MF4_TU */ 27894, /* PseudoVLSEG3E8FF_V_MF8 */ 27900, /* PseudoVLSEG3E8FF_V_MF8_MASK */ 27905, /* PseudoVLSEG3E8FF_V_MF8_TU */ 27913, /* PseudoVLSEG3E8_V_M1 */ 27919, /* PseudoVLSEG3E8_V_M1_MASK */ 27923, /* PseudoVLSEG3E8_V_M1_TU */ 27930, /* PseudoVLSEG3E8_V_M2 */ 27935, /* PseudoVLSEG3E8_V_M2_MASK */ 27939, /* PseudoVLSEG3E8_V_M2_TU */ 27946, /* PseudoVLSEG3E8_V_MF2 */ 27951, /* PseudoVLSEG3E8_V_MF2_MASK */ 27955, /* PseudoVLSEG3E8_V_MF2_TU */ 27962, /* PseudoVLSEG3E8_V_MF4 */ 27967, /* PseudoVLSEG3E8_V_MF4_MASK */ 27971, /* PseudoVLSEG3E8_V_MF4_TU */ 27978, /* PseudoVLSEG3E8_V_MF8 */ 27983, /* PseudoVLSEG3E8_V_MF8_MASK */ 27987, /* PseudoVLSEG3E8_V_MF8_TU */ 27994, /* PseudoVLSEG4E16FF_V_M1 */ 27999, /* PseudoVLSEG4E16FF_V_M1_MASK */ 28004, /* PseudoVLSEG4E16FF_V_M1_TU */ 28012, /* PseudoVLSEG4E16FF_V_M2 */ 28018, /* PseudoVLSEG4E16FF_V_M2_MASK */ 28023, /* PseudoVLSEG4E16FF_V_M2_TU */ 28031, /* PseudoVLSEG4E16FF_V_MF2 */ 28037, /* PseudoVLSEG4E16FF_V_MF2_MASK */ 28042, /* PseudoVLSEG4E16FF_V_MF2_TU */ 28050, /* PseudoVLSEG4E16FF_V_MF4 */ 28056, /* PseudoVLSEG4E16FF_V_MF4_MASK */ 28061, /* PseudoVLSEG4E16FF_V_MF4_TU */ 28069, /* PseudoVLSEG4E16_V_M1 */ 28075, /* PseudoVLSEG4E16_V_M1_MASK */ 28079, /* PseudoVLSEG4E16_V_M1_TU */ 28086, /* PseudoVLSEG4E16_V_M2 */ 28091, /* PseudoVLSEG4E16_V_M2_MASK */ 28095, /* PseudoVLSEG4E16_V_M2_TU */ 28102, /* PseudoVLSEG4E16_V_MF2 */ 28107, /* PseudoVLSEG4E16_V_MF2_MASK */ 28111, /* PseudoVLSEG4E16_V_MF2_TU */ 28118, /* PseudoVLSEG4E16_V_MF4 */ 28123, /* PseudoVLSEG4E16_V_MF4_MASK */ 28127, /* PseudoVLSEG4E16_V_MF4_TU */ 28134, /* PseudoVLSEG4E32FF_V_M1 */ 28139, /* PseudoVLSEG4E32FF_V_M1_MASK */ 28144, /* PseudoVLSEG4E32FF_V_M1_TU */ 28152, /* PseudoVLSEG4E32FF_V_M2 */ 28158, /* PseudoVLSEG4E32FF_V_M2_MASK */ 28163, /* PseudoVLSEG4E32FF_V_M2_TU */ 28171, /* PseudoVLSEG4E32FF_V_MF2 */ 28177, /* PseudoVLSEG4E32FF_V_MF2_MASK */ 28182, /* PseudoVLSEG4E32FF_V_MF2_TU */ 28190, /* PseudoVLSEG4E32_V_M1 */ 28196, /* PseudoVLSEG4E32_V_M1_MASK */ 28200, /* PseudoVLSEG4E32_V_M1_TU */ 28207, /* PseudoVLSEG4E32_V_M2 */ 28212, /* PseudoVLSEG4E32_V_M2_MASK */ 28216, /* PseudoVLSEG4E32_V_M2_TU */ 28223, /* PseudoVLSEG4E32_V_MF2 */ 28228, /* PseudoVLSEG4E32_V_MF2_MASK */ 28232, /* PseudoVLSEG4E32_V_MF2_TU */ 28239, /* PseudoVLSEG4E64FF_V_M1 */ 28244, /* PseudoVLSEG4E64FF_V_M1_MASK */ 28249, /* PseudoVLSEG4E64FF_V_M1_TU */ 28257, /* PseudoVLSEG4E64FF_V_M2 */ 28263, /* PseudoVLSEG4E64FF_V_M2_MASK */ 28268, /* PseudoVLSEG4E64FF_V_M2_TU */ 28276, /* PseudoVLSEG4E64_V_M1 */ 28282, /* PseudoVLSEG4E64_V_M1_MASK */ 28286, /* PseudoVLSEG4E64_V_M1_TU */ 28293, /* PseudoVLSEG4E64_V_M2 */ 28298, /* PseudoVLSEG4E64_V_M2_MASK */ 28302, /* PseudoVLSEG4E64_V_M2_TU */ 28309, /* PseudoVLSEG4E8FF_V_M1 */ 28314, /* PseudoVLSEG4E8FF_V_M1_MASK */ 28319, /* PseudoVLSEG4E8FF_V_M1_TU */ 28327, /* PseudoVLSEG4E8FF_V_M2 */ 28333, /* PseudoVLSEG4E8FF_V_M2_MASK */ 28338, /* PseudoVLSEG4E8FF_V_M2_TU */ 28346, /* PseudoVLSEG4E8FF_V_MF2 */ 28352, /* PseudoVLSEG4E8FF_V_MF2_MASK */ 28357, /* PseudoVLSEG4E8FF_V_MF2_TU */ 28365, /* PseudoVLSEG4E8FF_V_MF4 */ 28371, /* PseudoVLSEG4E8FF_V_MF4_MASK */ 28376, /* PseudoVLSEG4E8FF_V_MF4_TU */ 28384, /* PseudoVLSEG4E8FF_V_MF8 */ 28390, /* PseudoVLSEG4E8FF_V_MF8_MASK */ 28395, /* PseudoVLSEG4E8FF_V_MF8_TU */ 28403, /* PseudoVLSEG4E8_V_M1 */ 28409, /* PseudoVLSEG4E8_V_M1_MASK */ 28413, /* PseudoVLSEG4E8_V_M1_TU */ 28420, /* PseudoVLSEG4E8_V_M2 */ 28425, /* PseudoVLSEG4E8_V_M2_MASK */ 28429, /* PseudoVLSEG4E8_V_M2_TU */ 28436, /* PseudoVLSEG4E8_V_MF2 */ 28441, /* PseudoVLSEG4E8_V_MF2_MASK */ 28445, /* PseudoVLSEG4E8_V_MF2_TU */ 28452, /* PseudoVLSEG4E8_V_MF4 */ 28457, /* PseudoVLSEG4E8_V_MF4_MASK */ 28461, /* PseudoVLSEG4E8_V_MF4_TU */ 28468, /* PseudoVLSEG4E8_V_MF8 */ 28473, /* PseudoVLSEG4E8_V_MF8_MASK */ 28477, /* PseudoVLSEG4E8_V_MF8_TU */ 28484, /* PseudoVLSEG5E16FF_V_M1 */ 28489, /* PseudoVLSEG5E16FF_V_M1_MASK */ 28494, /* PseudoVLSEG5E16FF_V_M1_TU */ 28502, /* PseudoVLSEG5E16FF_V_MF2 */ 28508, /* PseudoVLSEG5E16FF_V_MF2_MASK */ 28513, /* PseudoVLSEG5E16FF_V_MF2_TU */ 28521, /* PseudoVLSEG5E16FF_V_MF4 */ 28527, /* PseudoVLSEG5E16FF_V_MF4_MASK */ 28532, /* PseudoVLSEG5E16FF_V_MF4_TU */ 28540, /* PseudoVLSEG5E16_V_M1 */ 28546, /* PseudoVLSEG5E16_V_M1_MASK */ 28550, /* PseudoVLSEG5E16_V_M1_TU */ 28557, /* PseudoVLSEG5E16_V_MF2 */ 28562, /* PseudoVLSEG5E16_V_MF2_MASK */ 28566, /* PseudoVLSEG5E16_V_MF2_TU */ 28573, /* PseudoVLSEG5E16_V_MF4 */ 28578, /* PseudoVLSEG5E16_V_MF4_MASK */ 28582, /* PseudoVLSEG5E16_V_MF4_TU */ 28589, /* PseudoVLSEG5E32FF_V_M1 */ 28594, /* PseudoVLSEG5E32FF_V_M1_MASK */ 28599, /* PseudoVLSEG5E32FF_V_M1_TU */ 28607, /* PseudoVLSEG5E32FF_V_MF2 */ 28613, /* PseudoVLSEG5E32FF_V_MF2_MASK */ 28618, /* PseudoVLSEG5E32FF_V_MF2_TU */ 28626, /* PseudoVLSEG5E32_V_M1 */ 28632, /* PseudoVLSEG5E32_V_M1_MASK */ 28636, /* PseudoVLSEG5E32_V_M1_TU */ 28643, /* PseudoVLSEG5E32_V_MF2 */ 28648, /* PseudoVLSEG5E32_V_MF2_MASK */ 28652, /* PseudoVLSEG5E32_V_MF2_TU */ 28659, /* PseudoVLSEG5E64FF_V_M1 */ 28664, /* PseudoVLSEG5E64FF_V_M1_MASK */ 28669, /* PseudoVLSEG5E64FF_V_M1_TU */ 28677, /* PseudoVLSEG5E64_V_M1 */ 28683, /* PseudoVLSEG5E64_V_M1_MASK */ 28687, /* PseudoVLSEG5E64_V_M1_TU */ 28694, /* PseudoVLSEG5E8FF_V_M1 */ 28699, /* PseudoVLSEG5E8FF_V_M1_MASK */ 28704, /* PseudoVLSEG5E8FF_V_M1_TU */ 28712, /* PseudoVLSEG5E8FF_V_MF2 */ 28718, /* PseudoVLSEG5E8FF_V_MF2_MASK */ 28723, /* PseudoVLSEG5E8FF_V_MF2_TU */ 28731, /* PseudoVLSEG5E8FF_V_MF4 */ 28737, /* PseudoVLSEG5E8FF_V_MF4_MASK */ 28742, /* PseudoVLSEG5E8FF_V_MF4_TU */ 28750, /* PseudoVLSEG5E8FF_V_MF8 */ 28756, /* PseudoVLSEG5E8FF_V_MF8_MASK */ 28761, /* PseudoVLSEG5E8FF_V_MF8_TU */ 28769, /* PseudoVLSEG5E8_V_M1 */ 28775, /* PseudoVLSEG5E8_V_M1_MASK */ 28779, /* PseudoVLSEG5E8_V_M1_TU */ 28786, /* PseudoVLSEG5E8_V_MF2 */ 28791, /* PseudoVLSEG5E8_V_MF2_MASK */ 28795, /* PseudoVLSEG5E8_V_MF2_TU */ 28802, /* PseudoVLSEG5E8_V_MF4 */ 28807, /* PseudoVLSEG5E8_V_MF4_MASK */ 28811, /* PseudoVLSEG5E8_V_MF4_TU */ 28818, /* PseudoVLSEG5E8_V_MF8 */ 28823, /* PseudoVLSEG5E8_V_MF8_MASK */ 28827, /* PseudoVLSEG5E8_V_MF8_TU */ 28834, /* PseudoVLSEG6E16FF_V_M1 */ 28839, /* PseudoVLSEG6E16FF_V_M1_MASK */ 28844, /* PseudoVLSEG6E16FF_V_M1_TU */ 28852, /* PseudoVLSEG6E16FF_V_MF2 */ 28858, /* PseudoVLSEG6E16FF_V_MF2_MASK */ 28863, /* PseudoVLSEG6E16FF_V_MF2_TU */ 28871, /* PseudoVLSEG6E16FF_V_MF4 */ 28877, /* PseudoVLSEG6E16FF_V_MF4_MASK */ 28882, /* PseudoVLSEG6E16FF_V_MF4_TU */ 28890, /* PseudoVLSEG6E16_V_M1 */ 28896, /* PseudoVLSEG6E16_V_M1_MASK */ 28900, /* PseudoVLSEG6E16_V_M1_TU */ 28907, /* PseudoVLSEG6E16_V_MF2 */ 28912, /* PseudoVLSEG6E16_V_MF2_MASK */ 28916, /* PseudoVLSEG6E16_V_MF2_TU */ 28923, /* PseudoVLSEG6E16_V_MF4 */ 28928, /* PseudoVLSEG6E16_V_MF4_MASK */ 28932, /* PseudoVLSEG6E16_V_MF4_TU */ 28939, /* PseudoVLSEG6E32FF_V_M1 */ 28944, /* PseudoVLSEG6E32FF_V_M1_MASK */ 28949, /* PseudoVLSEG6E32FF_V_M1_TU */ 28957, /* PseudoVLSEG6E32FF_V_MF2 */ 28963, /* PseudoVLSEG6E32FF_V_MF2_MASK */ 28968, /* PseudoVLSEG6E32FF_V_MF2_TU */ 28976, /* PseudoVLSEG6E32_V_M1 */ 28982, /* PseudoVLSEG6E32_V_M1_MASK */ 28986, /* PseudoVLSEG6E32_V_M1_TU */ 28993, /* PseudoVLSEG6E32_V_MF2 */ 28998, /* PseudoVLSEG6E32_V_MF2_MASK */ 29002, /* PseudoVLSEG6E32_V_MF2_TU */ 29009, /* PseudoVLSEG6E64FF_V_M1 */ 29014, /* PseudoVLSEG6E64FF_V_M1_MASK */ 29019, /* PseudoVLSEG6E64FF_V_M1_TU */ 29027, /* PseudoVLSEG6E64_V_M1 */ 29033, /* PseudoVLSEG6E64_V_M1_MASK */ 29037, /* PseudoVLSEG6E64_V_M1_TU */ 29044, /* PseudoVLSEG6E8FF_V_M1 */ 29049, /* PseudoVLSEG6E8FF_V_M1_MASK */ 29054, /* PseudoVLSEG6E8FF_V_M1_TU */ 29062, /* PseudoVLSEG6E8FF_V_MF2 */ 29068, /* PseudoVLSEG6E8FF_V_MF2_MASK */ 29073, /* PseudoVLSEG6E8FF_V_MF2_TU */ 29081, /* PseudoVLSEG6E8FF_V_MF4 */ 29087, /* PseudoVLSEG6E8FF_V_MF4_MASK */ 29092, /* PseudoVLSEG6E8FF_V_MF4_TU */ 29100, /* PseudoVLSEG6E8FF_V_MF8 */ 29106, /* PseudoVLSEG6E8FF_V_MF8_MASK */ 29111, /* PseudoVLSEG6E8FF_V_MF8_TU */ 29119, /* PseudoVLSEG6E8_V_M1 */ 29125, /* PseudoVLSEG6E8_V_M1_MASK */ 29129, /* PseudoVLSEG6E8_V_M1_TU */ 29136, /* PseudoVLSEG6E8_V_MF2 */ 29141, /* PseudoVLSEG6E8_V_MF2_MASK */ 29145, /* PseudoVLSEG6E8_V_MF2_TU */ 29152, /* PseudoVLSEG6E8_V_MF4 */ 29157, /* PseudoVLSEG6E8_V_MF4_MASK */ 29161, /* PseudoVLSEG6E8_V_MF4_TU */ 29168, /* PseudoVLSEG6E8_V_MF8 */ 29173, /* PseudoVLSEG6E8_V_MF8_MASK */ 29177, /* PseudoVLSEG6E8_V_MF8_TU */ 29184, /* PseudoVLSEG7E16FF_V_M1 */ 29189, /* PseudoVLSEG7E16FF_V_M1_MASK */ 29194, /* PseudoVLSEG7E16FF_V_M1_TU */ 29202, /* PseudoVLSEG7E16FF_V_MF2 */ 29208, /* PseudoVLSEG7E16FF_V_MF2_MASK */ 29213, /* PseudoVLSEG7E16FF_V_MF2_TU */ 29221, /* PseudoVLSEG7E16FF_V_MF4 */ 29227, /* PseudoVLSEG7E16FF_V_MF4_MASK */ 29232, /* PseudoVLSEG7E16FF_V_MF4_TU */ 29240, /* PseudoVLSEG7E16_V_M1 */ 29246, /* PseudoVLSEG7E16_V_M1_MASK */ 29250, /* PseudoVLSEG7E16_V_M1_TU */ 29257, /* PseudoVLSEG7E16_V_MF2 */ 29262, /* PseudoVLSEG7E16_V_MF2_MASK */ 29266, /* PseudoVLSEG7E16_V_MF2_TU */ 29273, /* PseudoVLSEG7E16_V_MF4 */ 29278, /* PseudoVLSEG7E16_V_MF4_MASK */ 29282, /* PseudoVLSEG7E16_V_MF4_TU */ 29289, /* PseudoVLSEG7E32FF_V_M1 */ 29294, /* PseudoVLSEG7E32FF_V_M1_MASK */ 29299, /* PseudoVLSEG7E32FF_V_M1_TU */ 29307, /* PseudoVLSEG7E32FF_V_MF2 */ 29313, /* PseudoVLSEG7E32FF_V_MF2_MASK */ 29318, /* PseudoVLSEG7E32FF_V_MF2_TU */ 29326, /* PseudoVLSEG7E32_V_M1 */ 29332, /* PseudoVLSEG7E32_V_M1_MASK */ 29336, /* PseudoVLSEG7E32_V_M1_TU */ 29343, /* PseudoVLSEG7E32_V_MF2 */ 29348, /* PseudoVLSEG7E32_V_MF2_MASK */ 29352, /* PseudoVLSEG7E32_V_MF2_TU */ 29359, /* PseudoVLSEG7E64FF_V_M1 */ 29364, /* PseudoVLSEG7E64FF_V_M1_MASK */ 29369, /* PseudoVLSEG7E64FF_V_M1_TU */ 29377, /* PseudoVLSEG7E64_V_M1 */ 29383, /* PseudoVLSEG7E64_V_M1_MASK */ 29387, /* PseudoVLSEG7E64_V_M1_TU */ 29394, /* PseudoVLSEG7E8FF_V_M1 */ 29399, /* PseudoVLSEG7E8FF_V_M1_MASK */ 29404, /* PseudoVLSEG7E8FF_V_M1_TU */ 29412, /* PseudoVLSEG7E8FF_V_MF2 */ 29418, /* PseudoVLSEG7E8FF_V_MF2_MASK */ 29423, /* PseudoVLSEG7E8FF_V_MF2_TU */ 29431, /* PseudoVLSEG7E8FF_V_MF4 */ 29437, /* PseudoVLSEG7E8FF_V_MF4_MASK */ 29442, /* PseudoVLSEG7E8FF_V_MF4_TU */ 29450, /* PseudoVLSEG7E8FF_V_MF8 */ 29456, /* PseudoVLSEG7E8FF_V_MF8_MASK */ 29461, /* PseudoVLSEG7E8FF_V_MF8_TU */ 29469, /* PseudoVLSEG7E8_V_M1 */ 29475, /* PseudoVLSEG7E8_V_M1_MASK */ 29479, /* PseudoVLSEG7E8_V_M1_TU */ 29486, /* PseudoVLSEG7E8_V_MF2 */ 29491, /* PseudoVLSEG7E8_V_MF2_MASK */ 29495, /* PseudoVLSEG7E8_V_MF2_TU */ 29502, /* PseudoVLSEG7E8_V_MF4 */ 29507, /* PseudoVLSEG7E8_V_MF4_MASK */ 29511, /* PseudoVLSEG7E8_V_MF4_TU */ 29518, /* PseudoVLSEG7E8_V_MF8 */ 29523, /* PseudoVLSEG7E8_V_MF8_MASK */ 29527, /* PseudoVLSEG7E8_V_MF8_TU */ 29534, /* PseudoVLSEG8E16FF_V_M1 */ 29539, /* PseudoVLSEG8E16FF_V_M1_MASK */ 29544, /* PseudoVLSEG8E16FF_V_M1_TU */ 29552, /* PseudoVLSEG8E16FF_V_MF2 */ 29558, /* PseudoVLSEG8E16FF_V_MF2_MASK */ 29563, /* PseudoVLSEG8E16FF_V_MF2_TU */ 29571, /* PseudoVLSEG8E16FF_V_MF4 */ 29577, /* PseudoVLSEG8E16FF_V_MF4_MASK */ 29582, /* PseudoVLSEG8E16FF_V_MF4_TU */ 29590, /* PseudoVLSEG8E16_V_M1 */ 29596, /* PseudoVLSEG8E16_V_M1_MASK */ 29600, /* PseudoVLSEG8E16_V_M1_TU */ 29607, /* PseudoVLSEG8E16_V_MF2 */ 29612, /* PseudoVLSEG8E16_V_MF2_MASK */ 29616, /* PseudoVLSEG8E16_V_MF2_TU */ 29623, /* PseudoVLSEG8E16_V_MF4 */ 29628, /* PseudoVLSEG8E16_V_MF4_MASK */ 29632, /* PseudoVLSEG8E16_V_MF4_TU */ 29639, /* PseudoVLSEG8E32FF_V_M1 */ 29644, /* PseudoVLSEG8E32FF_V_M1_MASK */ 29649, /* PseudoVLSEG8E32FF_V_M1_TU */ 29657, /* PseudoVLSEG8E32FF_V_MF2 */ 29663, /* PseudoVLSEG8E32FF_V_MF2_MASK */ 29668, /* PseudoVLSEG8E32FF_V_MF2_TU */ 29676, /* PseudoVLSEG8E32_V_M1 */ 29682, /* PseudoVLSEG8E32_V_M1_MASK */ 29686, /* PseudoVLSEG8E32_V_M1_TU */ 29693, /* PseudoVLSEG8E32_V_MF2 */ 29698, /* PseudoVLSEG8E32_V_MF2_MASK */ 29702, /* PseudoVLSEG8E32_V_MF2_TU */ 29709, /* PseudoVLSEG8E64FF_V_M1 */ 29714, /* PseudoVLSEG8E64FF_V_M1_MASK */ 29719, /* PseudoVLSEG8E64FF_V_M1_TU */ 29727, /* PseudoVLSEG8E64_V_M1 */ 29733, /* PseudoVLSEG8E64_V_M1_MASK */ 29737, /* PseudoVLSEG8E64_V_M1_TU */ 29744, /* PseudoVLSEG8E8FF_V_M1 */ 29749, /* PseudoVLSEG8E8FF_V_M1_MASK */ 29754, /* PseudoVLSEG8E8FF_V_M1_TU */ 29762, /* PseudoVLSEG8E8FF_V_MF2 */ 29768, /* PseudoVLSEG8E8FF_V_MF2_MASK */ 29773, /* PseudoVLSEG8E8FF_V_MF2_TU */ 29781, /* PseudoVLSEG8E8FF_V_MF4 */ 29787, /* PseudoVLSEG8E8FF_V_MF4_MASK */ 29792, /* PseudoVLSEG8E8FF_V_MF4_TU */ 29800, /* PseudoVLSEG8E8FF_V_MF8 */ 29806, /* PseudoVLSEG8E8FF_V_MF8_MASK */ 29811, /* PseudoVLSEG8E8FF_V_MF8_TU */ 29819, /* PseudoVLSEG8E8_V_M1 */ 29825, /* PseudoVLSEG8E8_V_M1_MASK */ 29829, /* PseudoVLSEG8E8_V_M1_TU */ 29836, /* PseudoVLSEG8E8_V_MF2 */ 29841, /* PseudoVLSEG8E8_V_MF2_MASK */ 29845, /* PseudoVLSEG8E8_V_MF2_TU */ 29852, /* PseudoVLSEG8E8_V_MF4 */ 29857, /* PseudoVLSEG8E8_V_MF4_MASK */ 29861, /* PseudoVLSEG8E8_V_MF4_TU */ 29868, /* PseudoVLSEG8E8_V_MF8 */ 29873, /* PseudoVLSEG8E8_V_MF8_MASK */ 29877, /* PseudoVLSEG8E8_V_MF8_TU */ 29884, /* PseudoVLSSEG2E16_V_M1 */ 29889, /* PseudoVLSSEG2E16_V_M1_MASK */ 29894, /* PseudoVLSSEG2E16_V_M1_TU */ 29902, /* PseudoVLSSEG2E16_V_M2 */ 29908, /* PseudoVLSSEG2E16_V_M2_MASK */ 29913, /* PseudoVLSSEG2E16_V_M2_TU */ 29921, /* PseudoVLSSEG2E16_V_M4 */ 29927, /* PseudoVLSSEG2E16_V_M4_MASK */ 29932, /* PseudoVLSSEG2E16_V_M4_TU */ 29940, /* PseudoVLSSEG2E16_V_MF2 */ 29946, /* PseudoVLSSEG2E16_V_MF2_MASK */ 29951, /* PseudoVLSSEG2E16_V_MF2_TU */ 29959, /* PseudoVLSSEG2E16_V_MF4 */ 29965, /* PseudoVLSSEG2E16_V_MF4_MASK */ 29970, /* PseudoVLSSEG2E16_V_MF4_TU */ 29978, /* PseudoVLSSEG2E32_V_M1 */ 29984, /* PseudoVLSSEG2E32_V_M1_MASK */ 29989, /* PseudoVLSSEG2E32_V_M1_TU */ 29997, /* PseudoVLSSEG2E32_V_M2 */ 30003, /* PseudoVLSSEG2E32_V_M2_MASK */ 30008, /* PseudoVLSSEG2E32_V_M2_TU */ 30016, /* PseudoVLSSEG2E32_V_M4 */ 30022, /* PseudoVLSSEG2E32_V_M4_MASK */ 30027, /* PseudoVLSSEG2E32_V_M4_TU */ 30035, /* PseudoVLSSEG2E32_V_MF2 */ 30041, /* PseudoVLSSEG2E32_V_MF2_MASK */ 30046, /* PseudoVLSSEG2E32_V_MF2_TU */ 30054, /* PseudoVLSSEG2E64_V_M1 */ 30060, /* PseudoVLSSEG2E64_V_M1_MASK */ 30065, /* PseudoVLSSEG2E64_V_M1_TU */ 30073, /* PseudoVLSSEG2E64_V_M2 */ 30079, /* PseudoVLSSEG2E64_V_M2_MASK */ 30084, /* PseudoVLSSEG2E64_V_M2_TU */ 30092, /* PseudoVLSSEG2E64_V_M4 */ 30098, /* PseudoVLSSEG2E64_V_M4_MASK */ 30103, /* PseudoVLSSEG2E64_V_M4_TU */ 30111, /* PseudoVLSSEG2E8_V_M1 */ 30117, /* PseudoVLSSEG2E8_V_M1_MASK */ 30122, /* PseudoVLSSEG2E8_V_M1_TU */ 30130, /* PseudoVLSSEG2E8_V_M2 */ 30136, /* PseudoVLSSEG2E8_V_M2_MASK */ 30141, /* PseudoVLSSEG2E8_V_M2_TU */ 30149, /* PseudoVLSSEG2E8_V_M4 */ 30155, /* PseudoVLSSEG2E8_V_M4_MASK */ 30160, /* PseudoVLSSEG2E8_V_M4_TU */ 30168, /* PseudoVLSSEG2E8_V_MF2 */ 30174, /* PseudoVLSSEG2E8_V_MF2_MASK */ 30179, /* PseudoVLSSEG2E8_V_MF2_TU */ 30187, /* PseudoVLSSEG2E8_V_MF4 */ 30193, /* PseudoVLSSEG2E8_V_MF4_MASK */ 30198, /* PseudoVLSSEG2E8_V_MF4_TU */ 30206, /* PseudoVLSSEG2E8_V_MF8 */ 30212, /* PseudoVLSSEG2E8_V_MF8_MASK */ 30217, /* PseudoVLSSEG2E8_V_MF8_TU */ 30225, /* PseudoVLSSEG3E16_V_M1 */ 30231, /* PseudoVLSSEG3E16_V_M1_MASK */ 30236, /* PseudoVLSSEG3E16_V_M1_TU */ 30244, /* PseudoVLSSEG3E16_V_M2 */ 30250, /* PseudoVLSSEG3E16_V_M2_MASK */ 30255, /* PseudoVLSSEG3E16_V_M2_TU */ 30263, /* PseudoVLSSEG3E16_V_MF2 */ 30269, /* PseudoVLSSEG3E16_V_MF2_MASK */ 30274, /* PseudoVLSSEG3E16_V_MF2_TU */ 30282, /* PseudoVLSSEG3E16_V_MF4 */ 30288, /* PseudoVLSSEG3E16_V_MF4_MASK */ 30293, /* PseudoVLSSEG3E16_V_MF4_TU */ 30301, /* PseudoVLSSEG3E32_V_M1 */ 30307, /* PseudoVLSSEG3E32_V_M1_MASK */ 30312, /* PseudoVLSSEG3E32_V_M1_TU */ 30320, /* PseudoVLSSEG3E32_V_M2 */ 30326, /* PseudoVLSSEG3E32_V_M2_MASK */ 30331, /* PseudoVLSSEG3E32_V_M2_TU */ 30339, /* PseudoVLSSEG3E32_V_MF2 */ 30345, /* PseudoVLSSEG3E32_V_MF2_MASK */ 30350, /* PseudoVLSSEG3E32_V_MF2_TU */ 30358, /* PseudoVLSSEG3E64_V_M1 */ 30364, /* PseudoVLSSEG3E64_V_M1_MASK */ 30369, /* PseudoVLSSEG3E64_V_M1_TU */ 30377, /* PseudoVLSSEG3E64_V_M2 */ 30383, /* PseudoVLSSEG3E64_V_M2_MASK */ 30388, /* PseudoVLSSEG3E64_V_M2_TU */ 30396, /* PseudoVLSSEG3E8_V_M1 */ 30402, /* PseudoVLSSEG3E8_V_M1_MASK */ 30407, /* PseudoVLSSEG3E8_V_M1_TU */ 30415, /* PseudoVLSSEG3E8_V_M2 */ 30421, /* PseudoVLSSEG3E8_V_M2_MASK */ 30426, /* PseudoVLSSEG3E8_V_M2_TU */ 30434, /* PseudoVLSSEG3E8_V_MF2 */ 30440, /* PseudoVLSSEG3E8_V_MF2_MASK */ 30445, /* PseudoVLSSEG3E8_V_MF2_TU */ 30453, /* PseudoVLSSEG3E8_V_MF4 */ 30459, /* PseudoVLSSEG3E8_V_MF4_MASK */ 30464, /* PseudoVLSSEG3E8_V_MF4_TU */ 30472, /* PseudoVLSSEG3E8_V_MF8 */ 30478, /* PseudoVLSSEG3E8_V_MF8_MASK */ 30483, /* PseudoVLSSEG3E8_V_MF8_TU */ 30491, /* PseudoVLSSEG4E16_V_M1 */ 30497, /* PseudoVLSSEG4E16_V_M1_MASK */ 30502, /* PseudoVLSSEG4E16_V_M1_TU */ 30510, /* PseudoVLSSEG4E16_V_M2 */ 30516, /* PseudoVLSSEG4E16_V_M2_MASK */ 30521, /* PseudoVLSSEG4E16_V_M2_TU */ 30529, /* PseudoVLSSEG4E16_V_MF2 */ 30535, /* PseudoVLSSEG4E16_V_MF2_MASK */ 30540, /* PseudoVLSSEG4E16_V_MF2_TU */ 30548, /* PseudoVLSSEG4E16_V_MF4 */ 30554, /* PseudoVLSSEG4E16_V_MF4_MASK */ 30559, /* PseudoVLSSEG4E16_V_MF4_TU */ 30567, /* PseudoVLSSEG4E32_V_M1 */ 30573, /* PseudoVLSSEG4E32_V_M1_MASK */ 30578, /* PseudoVLSSEG4E32_V_M1_TU */ 30586, /* PseudoVLSSEG4E32_V_M2 */ 30592, /* PseudoVLSSEG4E32_V_M2_MASK */ 30597, /* PseudoVLSSEG4E32_V_M2_TU */ 30605, /* PseudoVLSSEG4E32_V_MF2 */ 30611, /* PseudoVLSSEG4E32_V_MF2_MASK */ 30616, /* PseudoVLSSEG4E32_V_MF2_TU */ 30624, /* PseudoVLSSEG4E64_V_M1 */ 30630, /* PseudoVLSSEG4E64_V_M1_MASK */ 30635, /* PseudoVLSSEG4E64_V_M1_TU */ 30643, /* PseudoVLSSEG4E64_V_M2 */ 30649, /* PseudoVLSSEG4E64_V_M2_MASK */ 30654, /* PseudoVLSSEG4E64_V_M2_TU */ 30662, /* PseudoVLSSEG4E8_V_M1 */ 30668, /* PseudoVLSSEG4E8_V_M1_MASK */ 30673, /* PseudoVLSSEG4E8_V_M1_TU */ 30681, /* PseudoVLSSEG4E8_V_M2 */ 30687, /* PseudoVLSSEG4E8_V_M2_MASK */ 30692, /* PseudoVLSSEG4E8_V_M2_TU */ 30700, /* PseudoVLSSEG4E8_V_MF2 */ 30706, /* PseudoVLSSEG4E8_V_MF2_MASK */ 30711, /* PseudoVLSSEG4E8_V_MF2_TU */ 30719, /* PseudoVLSSEG4E8_V_MF4 */ 30725, /* PseudoVLSSEG4E8_V_MF4_MASK */ 30730, /* PseudoVLSSEG4E8_V_MF4_TU */ 30738, /* PseudoVLSSEG4E8_V_MF8 */ 30744, /* PseudoVLSSEG4E8_V_MF8_MASK */ 30749, /* PseudoVLSSEG4E8_V_MF8_TU */ 30757, /* PseudoVLSSEG5E16_V_M1 */ 30763, /* PseudoVLSSEG5E16_V_M1_MASK */ 30768, /* PseudoVLSSEG5E16_V_M1_TU */ 30776, /* PseudoVLSSEG5E16_V_MF2 */ 30782, /* PseudoVLSSEG5E16_V_MF2_MASK */ 30787, /* PseudoVLSSEG5E16_V_MF2_TU */ 30795, /* PseudoVLSSEG5E16_V_MF4 */ 30801, /* PseudoVLSSEG5E16_V_MF4_MASK */ 30806, /* PseudoVLSSEG5E16_V_MF4_TU */ 30814, /* PseudoVLSSEG5E32_V_M1 */ 30820, /* PseudoVLSSEG5E32_V_M1_MASK */ 30825, /* PseudoVLSSEG5E32_V_M1_TU */ 30833, /* PseudoVLSSEG5E32_V_MF2 */ 30839, /* PseudoVLSSEG5E32_V_MF2_MASK */ 30844, /* PseudoVLSSEG5E32_V_MF2_TU */ 30852, /* PseudoVLSSEG5E64_V_M1 */ 30858, /* PseudoVLSSEG5E64_V_M1_MASK */ 30863, /* PseudoVLSSEG5E64_V_M1_TU */ 30871, /* PseudoVLSSEG5E8_V_M1 */ 30877, /* PseudoVLSSEG5E8_V_M1_MASK */ 30882, /* PseudoVLSSEG5E8_V_M1_TU */ 30890, /* PseudoVLSSEG5E8_V_MF2 */ 30896, /* PseudoVLSSEG5E8_V_MF2_MASK */ 30901, /* PseudoVLSSEG5E8_V_MF2_TU */ 30909, /* PseudoVLSSEG5E8_V_MF4 */ 30915, /* PseudoVLSSEG5E8_V_MF4_MASK */ 30920, /* PseudoVLSSEG5E8_V_MF4_TU */ 30928, /* PseudoVLSSEG5E8_V_MF8 */ 30934, /* PseudoVLSSEG5E8_V_MF8_MASK */ 30939, /* PseudoVLSSEG5E8_V_MF8_TU */ 30947, /* PseudoVLSSEG6E16_V_M1 */ 30953, /* PseudoVLSSEG6E16_V_M1_MASK */ 30958, /* PseudoVLSSEG6E16_V_M1_TU */ 30966, /* PseudoVLSSEG6E16_V_MF2 */ 30972, /* PseudoVLSSEG6E16_V_MF2_MASK */ 30977, /* PseudoVLSSEG6E16_V_MF2_TU */ 30985, /* PseudoVLSSEG6E16_V_MF4 */ 30991, /* PseudoVLSSEG6E16_V_MF4_MASK */ 30996, /* PseudoVLSSEG6E16_V_MF4_TU */ 31004, /* PseudoVLSSEG6E32_V_M1 */ 31010, /* PseudoVLSSEG6E32_V_M1_MASK */ 31015, /* PseudoVLSSEG6E32_V_M1_TU */ 31023, /* PseudoVLSSEG6E32_V_MF2 */ 31029, /* PseudoVLSSEG6E32_V_MF2_MASK */ 31034, /* PseudoVLSSEG6E32_V_MF2_TU */ 31042, /* PseudoVLSSEG6E64_V_M1 */ 31048, /* PseudoVLSSEG6E64_V_M1_MASK */ 31053, /* PseudoVLSSEG6E64_V_M1_TU */ 31061, /* PseudoVLSSEG6E8_V_M1 */ 31067, /* PseudoVLSSEG6E8_V_M1_MASK */ 31072, /* PseudoVLSSEG6E8_V_M1_TU */ 31080, /* PseudoVLSSEG6E8_V_MF2 */ 31086, /* PseudoVLSSEG6E8_V_MF2_MASK */ 31091, /* PseudoVLSSEG6E8_V_MF2_TU */ 31099, /* PseudoVLSSEG6E8_V_MF4 */ 31105, /* PseudoVLSSEG6E8_V_MF4_MASK */ 31110, /* PseudoVLSSEG6E8_V_MF4_TU */ 31118, /* PseudoVLSSEG6E8_V_MF8 */ 31124, /* PseudoVLSSEG6E8_V_MF8_MASK */ 31129, /* PseudoVLSSEG6E8_V_MF8_TU */ 31137, /* PseudoVLSSEG7E16_V_M1 */ 31143, /* PseudoVLSSEG7E16_V_M1_MASK */ 31148, /* PseudoVLSSEG7E16_V_M1_TU */ 31156, /* PseudoVLSSEG7E16_V_MF2 */ 31162, /* PseudoVLSSEG7E16_V_MF2_MASK */ 31167, /* PseudoVLSSEG7E16_V_MF2_TU */ 31175, /* PseudoVLSSEG7E16_V_MF4 */ 31181, /* PseudoVLSSEG7E16_V_MF4_MASK */ 31186, /* PseudoVLSSEG7E16_V_MF4_TU */ 31194, /* PseudoVLSSEG7E32_V_M1 */ 31200, /* PseudoVLSSEG7E32_V_M1_MASK */ 31205, /* PseudoVLSSEG7E32_V_M1_TU */ 31213, /* PseudoVLSSEG7E32_V_MF2 */ 31219, /* PseudoVLSSEG7E32_V_MF2_MASK */ 31224, /* PseudoVLSSEG7E32_V_MF2_TU */ 31232, /* PseudoVLSSEG7E64_V_M1 */ 31238, /* PseudoVLSSEG7E64_V_M1_MASK */ 31243, /* PseudoVLSSEG7E64_V_M1_TU */ 31251, /* PseudoVLSSEG7E8_V_M1 */ 31257, /* PseudoVLSSEG7E8_V_M1_MASK */ 31262, /* PseudoVLSSEG7E8_V_M1_TU */ 31270, /* PseudoVLSSEG7E8_V_MF2 */ 31276, /* PseudoVLSSEG7E8_V_MF2_MASK */ 31281, /* PseudoVLSSEG7E8_V_MF2_TU */ 31289, /* PseudoVLSSEG7E8_V_MF4 */ 31295, /* PseudoVLSSEG7E8_V_MF4_MASK */ 31300, /* PseudoVLSSEG7E8_V_MF4_TU */ 31308, /* PseudoVLSSEG7E8_V_MF8 */ 31314, /* PseudoVLSSEG7E8_V_MF8_MASK */ 31319, /* PseudoVLSSEG7E8_V_MF8_TU */ 31327, /* PseudoVLSSEG8E16_V_M1 */ 31333, /* PseudoVLSSEG8E16_V_M1_MASK */ 31338, /* PseudoVLSSEG8E16_V_M1_TU */ 31346, /* PseudoVLSSEG8E16_V_MF2 */ 31352, /* PseudoVLSSEG8E16_V_MF2_MASK */ 31357, /* PseudoVLSSEG8E16_V_MF2_TU */ 31365, /* PseudoVLSSEG8E16_V_MF4 */ 31371, /* PseudoVLSSEG8E16_V_MF4_MASK */ 31376, /* PseudoVLSSEG8E16_V_MF4_TU */ 31384, /* PseudoVLSSEG8E32_V_M1 */ 31390, /* PseudoVLSSEG8E32_V_M1_MASK */ 31395, /* PseudoVLSSEG8E32_V_M1_TU */ 31403, /* PseudoVLSSEG8E32_V_MF2 */ 31409, /* PseudoVLSSEG8E32_V_MF2_MASK */ 31414, /* PseudoVLSSEG8E32_V_MF2_TU */ 31422, /* PseudoVLSSEG8E64_V_M1 */ 31428, /* PseudoVLSSEG8E64_V_M1_MASK */ 31433, /* PseudoVLSSEG8E64_V_M1_TU */ 31441, /* PseudoVLSSEG8E8_V_M1 */ 31447, /* PseudoVLSSEG8E8_V_M1_MASK */ 31452, /* PseudoVLSSEG8E8_V_M1_TU */ 31460, /* PseudoVLSSEG8E8_V_MF2 */ 31466, /* PseudoVLSSEG8E8_V_MF2_MASK */ 31471, /* PseudoVLSSEG8E8_V_MF2_TU */ 31479, /* PseudoVLSSEG8E8_V_MF4 */ 31485, /* PseudoVLSSEG8E8_V_MF4_MASK */ 31490, /* PseudoVLSSEG8E8_V_MF4_TU */ 31498, /* PseudoVLSSEG8E8_V_MF8 */ 31504, /* PseudoVLSSEG8E8_V_MF8_MASK */ 31509, /* PseudoVLSSEG8E8_V_MF8_TU */ 31517, /* PseudoVLUXEI16_V_M1_M1 */ 31523, /* PseudoVLUXEI16_V_M1_M1_MASK */ 31528, /* PseudoVLUXEI16_V_M1_M1_TU */ 31536, /* PseudoVLUXEI16_V_M1_M2 */ 31542, /* PseudoVLUXEI16_V_M1_M2_MASK */ 31547, /* PseudoVLUXEI16_V_M1_M2_TU */ 31555, /* PseudoVLUXEI16_V_M1_M4 */ 31561, /* PseudoVLUXEI16_V_M1_M4_MASK */ 31566, /* PseudoVLUXEI16_V_M1_M4_TU */ 31574, /* PseudoVLUXEI16_V_M1_MF2 */ 31580, /* PseudoVLUXEI16_V_M1_MF2_MASK */ 31585, /* PseudoVLUXEI16_V_M1_MF2_TU */ 31593, /* PseudoVLUXEI16_V_M2_M1 */ 31599, /* PseudoVLUXEI16_V_M2_M1_MASK */ 31604, /* PseudoVLUXEI16_V_M2_M1_TU */ 31612, /* PseudoVLUXEI16_V_M2_M2 */ 31618, /* PseudoVLUXEI16_V_M2_M2_MASK */ 31623, /* PseudoVLUXEI16_V_M2_M2_TU */ 31631, /* PseudoVLUXEI16_V_M2_M4 */ 31637, /* PseudoVLUXEI16_V_M2_M4_MASK */ 31642, /* PseudoVLUXEI16_V_M2_M4_TU */ 31650, /* PseudoVLUXEI16_V_M2_M8 */ 31656, /* PseudoVLUXEI16_V_M2_M8_MASK */ 31661, /* PseudoVLUXEI16_V_M2_M8_TU */ 31669, /* PseudoVLUXEI16_V_M4_M2 */ 31675, /* PseudoVLUXEI16_V_M4_M2_MASK */ 31680, /* PseudoVLUXEI16_V_M4_M2_TU */ 31688, /* PseudoVLUXEI16_V_M4_M4 */ 31694, /* PseudoVLUXEI16_V_M4_M4_MASK */ 31699, /* PseudoVLUXEI16_V_M4_M4_TU */ 31707, /* PseudoVLUXEI16_V_M4_M8 */ 31713, /* PseudoVLUXEI16_V_M4_M8_MASK */ 31718, /* PseudoVLUXEI16_V_M4_M8_TU */ 31726, /* PseudoVLUXEI16_V_M8_M4 */ 31732, /* PseudoVLUXEI16_V_M8_M4_MASK */ 31737, /* PseudoVLUXEI16_V_M8_M4_TU */ 31745, /* PseudoVLUXEI16_V_M8_M8 */ 31751, /* PseudoVLUXEI16_V_M8_M8_MASK */ 31756, /* PseudoVLUXEI16_V_M8_M8_TU */ 31764, /* PseudoVLUXEI16_V_MF2_M1 */ 31770, /* PseudoVLUXEI16_V_MF2_M1_MASK */ 31775, /* PseudoVLUXEI16_V_MF2_M1_TU */ 31783, /* PseudoVLUXEI16_V_MF2_M2 */ 31789, /* PseudoVLUXEI16_V_MF2_M2_MASK */ 31794, /* PseudoVLUXEI16_V_MF2_M2_TU */ 31802, /* PseudoVLUXEI16_V_MF2_MF2 */ 31808, /* PseudoVLUXEI16_V_MF2_MF2_MASK */ 31813, /* PseudoVLUXEI16_V_MF2_MF2_TU */ 31821, /* PseudoVLUXEI16_V_MF2_MF4 */ 31827, /* PseudoVLUXEI16_V_MF2_MF4_MASK */ 31832, /* PseudoVLUXEI16_V_MF2_MF4_TU */ 31840, /* PseudoVLUXEI16_V_MF4_M1 */ 31846, /* PseudoVLUXEI16_V_MF4_M1_MASK */ 31851, /* PseudoVLUXEI16_V_MF4_M1_TU */ 31859, /* PseudoVLUXEI16_V_MF4_MF2 */ 31865, /* PseudoVLUXEI16_V_MF4_MF2_MASK */ 31870, /* PseudoVLUXEI16_V_MF4_MF2_TU */ 31878, /* PseudoVLUXEI16_V_MF4_MF4 */ 31884, /* PseudoVLUXEI16_V_MF4_MF4_MASK */ 31889, /* PseudoVLUXEI16_V_MF4_MF4_TU */ 31897, /* PseudoVLUXEI16_V_MF4_MF8 */ 31903, /* PseudoVLUXEI16_V_MF4_MF8_MASK */ 31908, /* PseudoVLUXEI16_V_MF4_MF8_TU */ 31916, /* PseudoVLUXEI32_V_M1_M1 */ 31922, /* PseudoVLUXEI32_V_M1_M1_MASK */ 31927, /* PseudoVLUXEI32_V_M1_M1_TU */ 31935, /* PseudoVLUXEI32_V_M1_M2 */ 31941, /* PseudoVLUXEI32_V_M1_M2_MASK */ 31946, /* PseudoVLUXEI32_V_M1_M2_TU */ 31954, /* PseudoVLUXEI32_V_M1_MF2 */ 31960, /* PseudoVLUXEI32_V_M1_MF2_MASK */ 31965, /* PseudoVLUXEI32_V_M1_MF2_TU */ 31973, /* PseudoVLUXEI32_V_M1_MF4 */ 31979, /* PseudoVLUXEI32_V_M1_MF4_MASK */ 31984, /* PseudoVLUXEI32_V_M1_MF4_TU */ 31992, /* PseudoVLUXEI32_V_M2_M1 */ 31998, /* PseudoVLUXEI32_V_M2_M1_MASK */ 32003, /* PseudoVLUXEI32_V_M2_M1_TU */ 32011, /* PseudoVLUXEI32_V_M2_M2 */ 32017, /* PseudoVLUXEI32_V_M2_M2_MASK */ 32022, /* PseudoVLUXEI32_V_M2_M2_TU */ 32030, /* PseudoVLUXEI32_V_M2_M4 */ 32036, /* PseudoVLUXEI32_V_M2_M4_MASK */ 32041, /* PseudoVLUXEI32_V_M2_M4_TU */ 32049, /* PseudoVLUXEI32_V_M2_MF2 */ 32055, /* PseudoVLUXEI32_V_M2_MF2_MASK */ 32060, /* PseudoVLUXEI32_V_M2_MF2_TU */ 32068, /* PseudoVLUXEI32_V_M4_M1 */ 32074, /* PseudoVLUXEI32_V_M4_M1_MASK */ 32079, /* PseudoVLUXEI32_V_M4_M1_TU */ 32087, /* PseudoVLUXEI32_V_M4_M2 */ 32093, /* PseudoVLUXEI32_V_M4_M2_MASK */ 32098, /* PseudoVLUXEI32_V_M4_M2_TU */ 32106, /* PseudoVLUXEI32_V_M4_M4 */ 32112, /* PseudoVLUXEI32_V_M4_M4_MASK */ 32117, /* PseudoVLUXEI32_V_M4_M4_TU */ 32125, /* PseudoVLUXEI32_V_M4_M8 */ 32131, /* PseudoVLUXEI32_V_M4_M8_MASK */ 32136, /* PseudoVLUXEI32_V_M4_M8_TU */ 32144, /* PseudoVLUXEI32_V_M8_M2 */ 32150, /* PseudoVLUXEI32_V_M8_M2_MASK */ 32155, /* PseudoVLUXEI32_V_M8_M2_TU */ 32163, /* PseudoVLUXEI32_V_M8_M4 */ 32169, /* PseudoVLUXEI32_V_M8_M4_MASK */ 32174, /* PseudoVLUXEI32_V_M8_M4_TU */ 32182, /* PseudoVLUXEI32_V_M8_M8 */ 32188, /* PseudoVLUXEI32_V_M8_M8_MASK */ 32193, /* PseudoVLUXEI32_V_M8_M8_TU */ 32201, /* PseudoVLUXEI32_V_MF2_M1 */ 32207, /* PseudoVLUXEI32_V_MF2_M1_MASK */ 32212, /* PseudoVLUXEI32_V_MF2_M1_TU */ 32220, /* PseudoVLUXEI32_V_MF2_MF2 */ 32226, /* PseudoVLUXEI32_V_MF2_MF2_MASK */ 32231, /* PseudoVLUXEI32_V_MF2_MF2_TU */ 32239, /* PseudoVLUXEI32_V_MF2_MF4 */ 32245, /* PseudoVLUXEI32_V_MF2_MF4_MASK */ 32250, /* PseudoVLUXEI32_V_MF2_MF4_TU */ 32258, /* PseudoVLUXEI32_V_MF2_MF8 */ 32264, /* PseudoVLUXEI32_V_MF2_MF8_MASK */ 32269, /* PseudoVLUXEI32_V_MF2_MF8_TU */ 32277, /* PseudoVLUXEI64_V_M1_M1 */ 32283, /* PseudoVLUXEI64_V_M1_M1_MASK */ 32288, /* PseudoVLUXEI64_V_M1_M1_TU */ 32296, /* PseudoVLUXEI64_V_M1_MF2 */ 32302, /* PseudoVLUXEI64_V_M1_MF2_MASK */ 32307, /* PseudoVLUXEI64_V_M1_MF2_TU */ 32315, /* PseudoVLUXEI64_V_M1_MF4 */ 32321, /* PseudoVLUXEI64_V_M1_MF4_MASK */ 32326, /* PseudoVLUXEI64_V_M1_MF4_TU */ 32334, /* PseudoVLUXEI64_V_M1_MF8 */ 32340, /* PseudoVLUXEI64_V_M1_MF8_MASK */ 32345, /* PseudoVLUXEI64_V_M1_MF8_TU */ 32353, /* PseudoVLUXEI64_V_M2_M1 */ 32359, /* PseudoVLUXEI64_V_M2_M1_MASK */ 32364, /* PseudoVLUXEI64_V_M2_M1_TU */ 32372, /* PseudoVLUXEI64_V_M2_M2 */ 32378, /* PseudoVLUXEI64_V_M2_M2_MASK */ 32383, /* PseudoVLUXEI64_V_M2_M2_TU */ 32391, /* PseudoVLUXEI64_V_M2_MF2 */ 32397, /* PseudoVLUXEI64_V_M2_MF2_MASK */ 32402, /* PseudoVLUXEI64_V_M2_MF2_TU */ 32410, /* PseudoVLUXEI64_V_M2_MF4 */ 32416, /* PseudoVLUXEI64_V_M2_MF4_MASK */ 32421, /* PseudoVLUXEI64_V_M2_MF4_TU */ 32429, /* PseudoVLUXEI64_V_M4_M1 */ 32435, /* PseudoVLUXEI64_V_M4_M1_MASK */ 32440, /* PseudoVLUXEI64_V_M4_M1_TU */ 32448, /* PseudoVLUXEI64_V_M4_M2 */ 32454, /* PseudoVLUXEI64_V_M4_M2_MASK */ 32459, /* PseudoVLUXEI64_V_M4_M2_TU */ 32467, /* PseudoVLUXEI64_V_M4_M4 */ 32473, /* PseudoVLUXEI64_V_M4_M4_MASK */ 32478, /* PseudoVLUXEI64_V_M4_M4_TU */ 32486, /* PseudoVLUXEI64_V_M4_MF2 */ 32492, /* PseudoVLUXEI64_V_M4_MF2_MASK */ 32497, /* PseudoVLUXEI64_V_M4_MF2_TU */ 32505, /* PseudoVLUXEI64_V_M8_M1 */ 32511, /* PseudoVLUXEI64_V_M8_M1_MASK */ 32516, /* PseudoVLUXEI64_V_M8_M1_TU */ 32524, /* PseudoVLUXEI64_V_M8_M2 */ 32530, /* PseudoVLUXEI64_V_M8_M2_MASK */ 32535, /* PseudoVLUXEI64_V_M8_M2_TU */ 32543, /* PseudoVLUXEI64_V_M8_M4 */ 32549, /* PseudoVLUXEI64_V_M8_M4_MASK */ 32554, /* PseudoVLUXEI64_V_M8_M4_TU */ 32562, /* PseudoVLUXEI64_V_M8_M8 */ 32568, /* PseudoVLUXEI64_V_M8_M8_MASK */ 32573, /* PseudoVLUXEI64_V_M8_M8_TU */ 32581, /* PseudoVLUXEI8_V_M1_M1 */ 32587, /* PseudoVLUXEI8_V_M1_M1_MASK */ 32592, /* PseudoVLUXEI8_V_M1_M1_TU */ 32600, /* PseudoVLUXEI8_V_M1_M2 */ 32606, /* PseudoVLUXEI8_V_M1_M2_MASK */ 32611, /* PseudoVLUXEI8_V_M1_M2_TU */ 32619, /* PseudoVLUXEI8_V_M1_M4 */ 32625, /* PseudoVLUXEI8_V_M1_M4_MASK */ 32630, /* PseudoVLUXEI8_V_M1_M4_TU */ 32638, /* PseudoVLUXEI8_V_M1_M8 */ 32644, /* PseudoVLUXEI8_V_M1_M8_MASK */ 32649, /* PseudoVLUXEI8_V_M1_M8_TU */ 32657, /* PseudoVLUXEI8_V_M2_M2 */ 32663, /* PseudoVLUXEI8_V_M2_M2_MASK */ 32668, /* PseudoVLUXEI8_V_M2_M2_TU */ 32676, /* PseudoVLUXEI8_V_M2_M4 */ 32682, /* PseudoVLUXEI8_V_M2_M4_MASK */ 32687, /* PseudoVLUXEI8_V_M2_M4_TU */ 32695, /* PseudoVLUXEI8_V_M2_M8 */ 32701, /* PseudoVLUXEI8_V_M2_M8_MASK */ 32706, /* PseudoVLUXEI8_V_M2_M8_TU */ 32714, /* PseudoVLUXEI8_V_M4_M4 */ 32720, /* PseudoVLUXEI8_V_M4_M4_MASK */ 32725, /* PseudoVLUXEI8_V_M4_M4_TU */ 32733, /* PseudoVLUXEI8_V_M4_M8 */ 32739, /* PseudoVLUXEI8_V_M4_M8_MASK */ 32744, /* PseudoVLUXEI8_V_M4_M8_TU */ 32752, /* PseudoVLUXEI8_V_M8_M8 */ 32758, /* PseudoVLUXEI8_V_M8_M8_MASK */ 32763, /* PseudoVLUXEI8_V_M8_M8_TU */ 32771, /* PseudoVLUXEI8_V_MF2_M1 */ 32777, /* PseudoVLUXEI8_V_MF2_M1_MASK */ 32782, /* PseudoVLUXEI8_V_MF2_M1_TU */ 32790, /* PseudoVLUXEI8_V_MF2_M2 */ 32796, /* PseudoVLUXEI8_V_MF2_M2_MASK */ 32801, /* PseudoVLUXEI8_V_MF2_M2_TU */ 32809, /* PseudoVLUXEI8_V_MF2_M4 */ 32815, /* PseudoVLUXEI8_V_MF2_M4_MASK */ 32820, /* PseudoVLUXEI8_V_MF2_M4_TU */ 32828, /* PseudoVLUXEI8_V_MF2_MF2 */ 32834, /* PseudoVLUXEI8_V_MF2_MF2_MASK */ 32839, /* PseudoVLUXEI8_V_MF2_MF2_TU */ 32847, /* PseudoVLUXEI8_V_MF4_M1 */ 32853, /* PseudoVLUXEI8_V_MF4_M1_MASK */ 32858, /* PseudoVLUXEI8_V_MF4_M1_TU */ 32866, /* PseudoVLUXEI8_V_MF4_M2 */ 32872, /* PseudoVLUXEI8_V_MF4_M2_MASK */ 32877, /* PseudoVLUXEI8_V_MF4_M2_TU */ 32885, /* PseudoVLUXEI8_V_MF4_MF2 */ 32891, /* PseudoVLUXEI8_V_MF4_MF2_MASK */ 32896, /* PseudoVLUXEI8_V_MF4_MF2_TU */ 32904, /* PseudoVLUXEI8_V_MF4_MF4 */ 32910, /* PseudoVLUXEI8_V_MF4_MF4_MASK */ 32915, /* PseudoVLUXEI8_V_MF4_MF4_TU */ 32923, /* PseudoVLUXEI8_V_MF8_M1 */ 32929, /* PseudoVLUXEI8_V_MF8_M1_MASK */ 32934, /* PseudoVLUXEI8_V_MF8_M1_TU */ 32942, /* PseudoVLUXEI8_V_MF8_MF2 */ 32948, /* PseudoVLUXEI8_V_MF8_MF2_MASK */ 32953, /* PseudoVLUXEI8_V_MF8_MF2_TU */ 32961, /* PseudoVLUXEI8_V_MF8_MF4 */ 32967, /* PseudoVLUXEI8_V_MF8_MF4_MASK */ 32972, /* PseudoVLUXEI8_V_MF8_MF4_TU */ 32980, /* PseudoVLUXEI8_V_MF8_MF8 */ 32986, /* PseudoVLUXEI8_V_MF8_MF8_MASK */ 32991, /* PseudoVLUXEI8_V_MF8_MF8_TU */ 32999, /* PseudoVLUXSEG2EI16_V_M1_M1 */ 33005, /* PseudoVLUXSEG2EI16_V_M1_M1_MASK */ 33010, /* PseudoVLUXSEG2EI16_V_M1_M1_TU */ 33018, /* PseudoVLUXSEG2EI16_V_M1_M2 */ 33024, /* PseudoVLUXSEG2EI16_V_M1_M2_MASK */ 33029, /* PseudoVLUXSEG2EI16_V_M1_M2_TU */ 33037, /* PseudoVLUXSEG2EI16_V_M1_M4 */ 33043, /* PseudoVLUXSEG2EI16_V_M1_M4_MASK */ 33048, /* PseudoVLUXSEG2EI16_V_M1_M4_TU */ 33056, /* PseudoVLUXSEG2EI16_V_M1_MF2 */ 33062, /* PseudoVLUXSEG2EI16_V_M1_MF2_MASK */ 33067, /* PseudoVLUXSEG2EI16_V_M1_MF2_TU */ 33075, /* PseudoVLUXSEG2EI16_V_M2_M1 */ 33081, /* PseudoVLUXSEG2EI16_V_M2_M1_MASK */ 33086, /* PseudoVLUXSEG2EI16_V_M2_M1_TU */ 33094, /* PseudoVLUXSEG2EI16_V_M2_M2 */ 33100, /* PseudoVLUXSEG2EI16_V_M2_M2_MASK */ 33105, /* PseudoVLUXSEG2EI16_V_M2_M2_TU */ 33113, /* PseudoVLUXSEG2EI16_V_M2_M4 */ 33119, /* PseudoVLUXSEG2EI16_V_M2_M4_MASK */ 33124, /* PseudoVLUXSEG2EI16_V_M2_M4_TU */ 33132, /* PseudoVLUXSEG2EI16_V_M4_M2 */ 33138, /* PseudoVLUXSEG2EI16_V_M4_M2_MASK */ 33143, /* PseudoVLUXSEG2EI16_V_M4_M2_TU */ 33151, /* PseudoVLUXSEG2EI16_V_M4_M4 */ 33157, /* PseudoVLUXSEG2EI16_V_M4_M4_MASK */ 33162, /* PseudoVLUXSEG2EI16_V_M4_M4_TU */ 33170, /* PseudoVLUXSEG2EI16_V_M8_M4 */ 33176, /* PseudoVLUXSEG2EI16_V_M8_M4_MASK */ 33181, /* PseudoVLUXSEG2EI16_V_M8_M4_TU */ 33189, /* PseudoVLUXSEG2EI16_V_MF2_M1 */ 33195, /* PseudoVLUXSEG2EI16_V_MF2_M1_MASK */ 33200, /* PseudoVLUXSEG2EI16_V_MF2_M1_TU */ 33208, /* PseudoVLUXSEG2EI16_V_MF2_M2 */ 33214, /* PseudoVLUXSEG2EI16_V_MF2_M2_MASK */ 33219, /* PseudoVLUXSEG2EI16_V_MF2_M2_TU */ 33227, /* PseudoVLUXSEG2EI16_V_MF2_MF2 */ 33233, /* PseudoVLUXSEG2EI16_V_MF2_MF2_MASK */ 33238, /* PseudoVLUXSEG2EI16_V_MF2_MF2_TU */ 33246, /* PseudoVLUXSEG2EI16_V_MF2_MF4 */ 33252, /* PseudoVLUXSEG2EI16_V_MF2_MF4_MASK */ 33257, /* PseudoVLUXSEG2EI16_V_MF2_MF4_TU */ 33265, /* PseudoVLUXSEG2EI16_V_MF4_M1 */ 33271, /* PseudoVLUXSEG2EI16_V_MF4_M1_MASK */ 33276, /* PseudoVLUXSEG2EI16_V_MF4_M1_TU */ 33284, /* PseudoVLUXSEG2EI16_V_MF4_MF2 */ 33290, /* PseudoVLUXSEG2EI16_V_MF4_MF2_MASK */ 33295, /* PseudoVLUXSEG2EI16_V_MF4_MF2_TU */ 33303, /* PseudoVLUXSEG2EI16_V_MF4_MF4 */ 33309, /* PseudoVLUXSEG2EI16_V_MF4_MF4_MASK */ 33314, /* PseudoVLUXSEG2EI16_V_MF4_MF4_TU */ 33322, /* PseudoVLUXSEG2EI16_V_MF4_MF8 */ 33328, /* PseudoVLUXSEG2EI16_V_MF4_MF8_MASK */ 33333, /* PseudoVLUXSEG2EI16_V_MF4_MF8_TU */ 33341, /* PseudoVLUXSEG2EI32_V_M1_M1 */ 33347, /* PseudoVLUXSEG2EI32_V_M1_M1_MASK */ 33352, /* PseudoVLUXSEG2EI32_V_M1_M1_TU */ 33360, /* PseudoVLUXSEG2EI32_V_M1_M2 */ 33366, /* PseudoVLUXSEG2EI32_V_M1_M2_MASK */ 33371, /* PseudoVLUXSEG2EI32_V_M1_M2_TU */ 33379, /* PseudoVLUXSEG2EI32_V_M1_MF2 */ 33385, /* PseudoVLUXSEG2EI32_V_M1_MF2_MASK */ 33390, /* PseudoVLUXSEG2EI32_V_M1_MF2_TU */ 33398, /* PseudoVLUXSEG2EI32_V_M1_MF4 */ 33404, /* PseudoVLUXSEG2EI32_V_M1_MF4_MASK */ 33409, /* PseudoVLUXSEG2EI32_V_M1_MF4_TU */ 33417, /* PseudoVLUXSEG2EI32_V_M2_M1 */ 33423, /* PseudoVLUXSEG2EI32_V_M2_M1_MASK */ 33428, /* PseudoVLUXSEG2EI32_V_M2_M1_TU */ 33436, /* PseudoVLUXSEG2EI32_V_M2_M2 */ 33442, /* PseudoVLUXSEG2EI32_V_M2_M2_MASK */ 33447, /* PseudoVLUXSEG2EI32_V_M2_M2_TU */ 33455, /* PseudoVLUXSEG2EI32_V_M2_M4 */ 33461, /* PseudoVLUXSEG2EI32_V_M2_M4_MASK */ 33466, /* PseudoVLUXSEG2EI32_V_M2_M4_TU */ 33474, /* PseudoVLUXSEG2EI32_V_M2_MF2 */ 33480, /* PseudoVLUXSEG2EI32_V_M2_MF2_MASK */ 33485, /* PseudoVLUXSEG2EI32_V_M2_MF2_TU */ 33493, /* PseudoVLUXSEG2EI32_V_M4_M1 */ 33499, /* PseudoVLUXSEG2EI32_V_M4_M1_MASK */ 33504, /* PseudoVLUXSEG2EI32_V_M4_M1_TU */ 33512, /* PseudoVLUXSEG2EI32_V_M4_M2 */ 33518, /* PseudoVLUXSEG2EI32_V_M4_M2_MASK */ 33523, /* PseudoVLUXSEG2EI32_V_M4_M2_TU */ 33531, /* PseudoVLUXSEG2EI32_V_M4_M4 */ 33537, /* PseudoVLUXSEG2EI32_V_M4_M4_MASK */ 33542, /* PseudoVLUXSEG2EI32_V_M4_M4_TU */ 33550, /* PseudoVLUXSEG2EI32_V_M8_M2 */ 33556, /* PseudoVLUXSEG2EI32_V_M8_M2_MASK */ 33561, /* PseudoVLUXSEG2EI32_V_M8_M2_TU */ 33569, /* PseudoVLUXSEG2EI32_V_M8_M4 */ 33575, /* PseudoVLUXSEG2EI32_V_M8_M4_MASK */ 33580, /* PseudoVLUXSEG2EI32_V_M8_M4_TU */ 33588, /* PseudoVLUXSEG2EI32_V_MF2_M1 */ 33594, /* PseudoVLUXSEG2EI32_V_MF2_M1_MASK */ 33599, /* PseudoVLUXSEG2EI32_V_MF2_M1_TU */ 33607, /* PseudoVLUXSEG2EI32_V_MF2_MF2 */ 33613, /* PseudoVLUXSEG2EI32_V_MF2_MF2_MASK */ 33618, /* PseudoVLUXSEG2EI32_V_MF2_MF2_TU */ 33626, /* PseudoVLUXSEG2EI32_V_MF2_MF4 */ 33632, /* PseudoVLUXSEG2EI32_V_MF2_MF4_MASK */ 33637, /* PseudoVLUXSEG2EI32_V_MF2_MF4_TU */ 33645, /* PseudoVLUXSEG2EI32_V_MF2_MF8 */ 33651, /* PseudoVLUXSEG2EI32_V_MF2_MF8_MASK */ 33656, /* PseudoVLUXSEG2EI32_V_MF2_MF8_TU */ 33664, /* PseudoVLUXSEG2EI64_V_M1_M1 */ 33670, /* PseudoVLUXSEG2EI64_V_M1_M1_MASK */ 33675, /* PseudoVLUXSEG2EI64_V_M1_M1_TU */ 33683, /* PseudoVLUXSEG2EI64_V_M1_MF2 */ 33689, /* PseudoVLUXSEG2EI64_V_M1_MF2_MASK */ 33694, /* PseudoVLUXSEG2EI64_V_M1_MF2_TU */ 33702, /* PseudoVLUXSEG2EI64_V_M1_MF4 */ 33708, /* PseudoVLUXSEG2EI64_V_M1_MF4_MASK */ 33713, /* PseudoVLUXSEG2EI64_V_M1_MF4_TU */ 33721, /* PseudoVLUXSEG2EI64_V_M1_MF8 */ 33727, /* PseudoVLUXSEG2EI64_V_M1_MF8_MASK */ 33732, /* PseudoVLUXSEG2EI64_V_M1_MF8_TU */ 33740, /* PseudoVLUXSEG2EI64_V_M2_M1 */ 33746, /* PseudoVLUXSEG2EI64_V_M2_M1_MASK */ 33751, /* PseudoVLUXSEG2EI64_V_M2_M1_TU */ 33759, /* PseudoVLUXSEG2EI64_V_M2_M2 */ 33765, /* PseudoVLUXSEG2EI64_V_M2_M2_MASK */ 33770, /* PseudoVLUXSEG2EI64_V_M2_M2_TU */ 33778, /* PseudoVLUXSEG2EI64_V_M2_MF2 */ 33784, /* PseudoVLUXSEG2EI64_V_M2_MF2_MASK */ 33789, /* PseudoVLUXSEG2EI64_V_M2_MF2_TU */ 33797, /* PseudoVLUXSEG2EI64_V_M2_MF4 */ 33803, /* PseudoVLUXSEG2EI64_V_M2_MF4_MASK */ 33808, /* PseudoVLUXSEG2EI64_V_M2_MF4_TU */ 33816, /* PseudoVLUXSEG2EI64_V_M4_M1 */ 33822, /* PseudoVLUXSEG2EI64_V_M4_M1_MASK */ 33827, /* PseudoVLUXSEG2EI64_V_M4_M1_TU */ 33835, /* PseudoVLUXSEG2EI64_V_M4_M2 */ 33841, /* PseudoVLUXSEG2EI64_V_M4_M2_MASK */ 33846, /* PseudoVLUXSEG2EI64_V_M4_M2_TU */ 33854, /* PseudoVLUXSEG2EI64_V_M4_M4 */ 33860, /* PseudoVLUXSEG2EI64_V_M4_M4_MASK */ 33865, /* PseudoVLUXSEG2EI64_V_M4_M4_TU */ 33873, /* PseudoVLUXSEG2EI64_V_M4_MF2 */ 33879, /* PseudoVLUXSEG2EI64_V_M4_MF2_MASK */ 33884, /* PseudoVLUXSEG2EI64_V_M4_MF2_TU */ 33892, /* PseudoVLUXSEG2EI64_V_M8_M1 */ 33898, /* PseudoVLUXSEG2EI64_V_M8_M1_MASK */ 33903, /* PseudoVLUXSEG2EI64_V_M8_M1_TU */ 33911, /* PseudoVLUXSEG2EI64_V_M8_M2 */ 33917, /* PseudoVLUXSEG2EI64_V_M8_M2_MASK */ 33922, /* PseudoVLUXSEG2EI64_V_M8_M2_TU */ 33930, /* PseudoVLUXSEG2EI64_V_M8_M4 */ 33936, /* PseudoVLUXSEG2EI64_V_M8_M4_MASK */ 33941, /* PseudoVLUXSEG2EI64_V_M8_M4_TU */ 33949, /* PseudoVLUXSEG2EI8_V_M1_M1 */ 33955, /* PseudoVLUXSEG2EI8_V_M1_M1_MASK */ 33960, /* PseudoVLUXSEG2EI8_V_M1_M1_TU */ 33968, /* PseudoVLUXSEG2EI8_V_M1_M2 */ 33974, /* PseudoVLUXSEG2EI8_V_M1_M2_MASK */ 33979, /* PseudoVLUXSEG2EI8_V_M1_M2_TU */ 33987, /* PseudoVLUXSEG2EI8_V_M1_M4 */ 33993, /* PseudoVLUXSEG2EI8_V_M1_M4_MASK */ 33998, /* PseudoVLUXSEG2EI8_V_M1_M4_TU */ 34006, /* PseudoVLUXSEG2EI8_V_M2_M2 */ 34012, /* PseudoVLUXSEG2EI8_V_M2_M2_MASK */ 34017, /* PseudoVLUXSEG2EI8_V_M2_M2_TU */ 34025, /* PseudoVLUXSEG2EI8_V_M2_M4 */ 34031, /* PseudoVLUXSEG2EI8_V_M2_M4_MASK */ 34036, /* PseudoVLUXSEG2EI8_V_M2_M4_TU */ 34044, /* PseudoVLUXSEG2EI8_V_M4_M4 */ 34050, /* PseudoVLUXSEG2EI8_V_M4_M4_MASK */ 34055, /* PseudoVLUXSEG2EI8_V_M4_M4_TU */ 34063, /* PseudoVLUXSEG2EI8_V_MF2_M1 */ 34069, /* PseudoVLUXSEG2EI8_V_MF2_M1_MASK */ 34074, /* PseudoVLUXSEG2EI8_V_MF2_M1_TU */ 34082, /* PseudoVLUXSEG2EI8_V_MF2_M2 */ 34088, /* PseudoVLUXSEG2EI8_V_MF2_M2_MASK */ 34093, /* PseudoVLUXSEG2EI8_V_MF2_M2_TU */ 34101, /* PseudoVLUXSEG2EI8_V_MF2_M4 */ 34107, /* PseudoVLUXSEG2EI8_V_MF2_M4_MASK */ 34112, /* PseudoVLUXSEG2EI8_V_MF2_M4_TU */ 34120, /* PseudoVLUXSEG2EI8_V_MF2_MF2 */ 34126, /* PseudoVLUXSEG2EI8_V_MF2_MF2_MASK */ 34131, /* PseudoVLUXSEG2EI8_V_MF2_MF2_TU */ 34139, /* PseudoVLUXSEG2EI8_V_MF4_M1 */ 34145, /* PseudoVLUXSEG2EI8_V_MF4_M1_MASK */ 34150, /* PseudoVLUXSEG2EI8_V_MF4_M1_TU */ 34158, /* PseudoVLUXSEG2EI8_V_MF4_M2 */ 34164, /* PseudoVLUXSEG2EI8_V_MF4_M2_MASK */ 34169, /* PseudoVLUXSEG2EI8_V_MF4_M2_TU */ 34177, /* PseudoVLUXSEG2EI8_V_MF4_MF2 */ 34183, /* PseudoVLUXSEG2EI8_V_MF4_MF2_MASK */ 34188, /* PseudoVLUXSEG2EI8_V_MF4_MF2_TU */ 34196, /* PseudoVLUXSEG2EI8_V_MF4_MF4 */ 34202, /* PseudoVLUXSEG2EI8_V_MF4_MF4_MASK */ 34207, /* PseudoVLUXSEG2EI8_V_MF4_MF4_TU */ 34215, /* PseudoVLUXSEG2EI8_V_MF8_M1 */ 34221, /* PseudoVLUXSEG2EI8_V_MF8_M1_MASK */ 34226, /* PseudoVLUXSEG2EI8_V_MF8_M1_TU */ 34234, /* PseudoVLUXSEG2EI8_V_MF8_MF2 */ 34240, /* PseudoVLUXSEG2EI8_V_MF8_MF2_MASK */ 34245, /* PseudoVLUXSEG2EI8_V_MF8_MF2_TU */ 34253, /* PseudoVLUXSEG2EI8_V_MF8_MF4 */ 34259, /* PseudoVLUXSEG2EI8_V_MF8_MF4_MASK */ 34264, /* PseudoVLUXSEG2EI8_V_MF8_MF4_TU */ 34272, /* PseudoVLUXSEG2EI8_V_MF8_MF8 */ 34278, /* PseudoVLUXSEG2EI8_V_MF8_MF8_MASK */ 34283, /* PseudoVLUXSEG2EI8_V_MF8_MF8_TU */ 34291, /* PseudoVLUXSEG3EI16_V_M1_M1 */ 34297, /* PseudoVLUXSEG3EI16_V_M1_M1_MASK */ 34302, /* PseudoVLUXSEG3EI16_V_M1_M1_TU */ 34310, /* PseudoVLUXSEG3EI16_V_M1_M2 */ 34316, /* PseudoVLUXSEG3EI16_V_M1_M2_MASK */ 34321, /* PseudoVLUXSEG3EI16_V_M1_M2_TU */ 34329, /* PseudoVLUXSEG3EI16_V_M1_MF2 */ 34335, /* PseudoVLUXSEG3EI16_V_M1_MF2_MASK */ 34340, /* PseudoVLUXSEG3EI16_V_M1_MF2_TU */ 34348, /* PseudoVLUXSEG3EI16_V_M2_M1 */ 34354, /* PseudoVLUXSEG3EI16_V_M2_M1_MASK */ 34359, /* PseudoVLUXSEG3EI16_V_M2_M1_TU */ 34367, /* PseudoVLUXSEG3EI16_V_M2_M2 */ 34373, /* PseudoVLUXSEG3EI16_V_M2_M2_MASK */ 34378, /* PseudoVLUXSEG3EI16_V_M2_M2_TU */ 34386, /* PseudoVLUXSEG3EI16_V_M4_M2 */ 34392, /* PseudoVLUXSEG3EI16_V_M4_M2_MASK */ 34397, /* PseudoVLUXSEG3EI16_V_M4_M2_TU */ 34405, /* PseudoVLUXSEG3EI16_V_MF2_M1 */ 34411, /* PseudoVLUXSEG3EI16_V_MF2_M1_MASK */ 34416, /* PseudoVLUXSEG3EI16_V_MF2_M1_TU */ 34424, /* PseudoVLUXSEG3EI16_V_MF2_M2 */ 34430, /* PseudoVLUXSEG3EI16_V_MF2_M2_MASK */ 34435, /* PseudoVLUXSEG3EI16_V_MF2_M2_TU */ 34443, /* PseudoVLUXSEG3EI16_V_MF2_MF2 */ 34449, /* PseudoVLUXSEG3EI16_V_MF2_MF2_MASK */ 34454, /* PseudoVLUXSEG3EI16_V_MF2_MF2_TU */ 34462, /* PseudoVLUXSEG3EI16_V_MF2_MF4 */ 34468, /* PseudoVLUXSEG3EI16_V_MF2_MF4_MASK */ 34473, /* PseudoVLUXSEG3EI16_V_MF2_MF4_TU */ 34481, /* PseudoVLUXSEG3EI16_V_MF4_M1 */ 34487, /* PseudoVLUXSEG3EI16_V_MF4_M1_MASK */ 34492, /* PseudoVLUXSEG3EI16_V_MF4_M1_TU */ 34500, /* PseudoVLUXSEG3EI16_V_MF4_MF2 */ 34506, /* PseudoVLUXSEG3EI16_V_MF4_MF2_MASK */ 34511, /* PseudoVLUXSEG3EI16_V_MF4_MF2_TU */ 34519, /* PseudoVLUXSEG3EI16_V_MF4_MF4 */ 34525, /* PseudoVLUXSEG3EI16_V_MF4_MF4_MASK */ 34530, /* PseudoVLUXSEG3EI16_V_MF4_MF4_TU */ 34538, /* PseudoVLUXSEG3EI16_V_MF4_MF8 */ 34544, /* PseudoVLUXSEG3EI16_V_MF4_MF8_MASK */ 34549, /* PseudoVLUXSEG3EI16_V_MF4_MF8_TU */ 34557, /* PseudoVLUXSEG3EI32_V_M1_M1 */ 34563, /* PseudoVLUXSEG3EI32_V_M1_M1_MASK */ 34568, /* PseudoVLUXSEG3EI32_V_M1_M1_TU */ 34576, /* PseudoVLUXSEG3EI32_V_M1_M2 */ 34582, /* PseudoVLUXSEG3EI32_V_M1_M2_MASK */ 34587, /* PseudoVLUXSEG3EI32_V_M1_M2_TU */ 34595, /* PseudoVLUXSEG3EI32_V_M1_MF2 */ 34601, /* PseudoVLUXSEG3EI32_V_M1_MF2_MASK */ 34606, /* PseudoVLUXSEG3EI32_V_M1_MF2_TU */ 34614, /* PseudoVLUXSEG3EI32_V_M1_MF4 */ 34620, /* PseudoVLUXSEG3EI32_V_M1_MF4_MASK */ 34625, /* PseudoVLUXSEG3EI32_V_M1_MF4_TU */ 34633, /* PseudoVLUXSEG3EI32_V_M2_M1 */ 34639, /* PseudoVLUXSEG3EI32_V_M2_M1_MASK */ 34644, /* PseudoVLUXSEG3EI32_V_M2_M1_TU */ 34652, /* PseudoVLUXSEG3EI32_V_M2_M2 */ 34658, /* PseudoVLUXSEG3EI32_V_M2_M2_MASK */ 34663, /* PseudoVLUXSEG3EI32_V_M2_M2_TU */ 34671, /* PseudoVLUXSEG3EI32_V_M2_MF2 */ 34677, /* PseudoVLUXSEG3EI32_V_M2_MF2_MASK */ 34682, /* PseudoVLUXSEG3EI32_V_M2_MF2_TU */ 34690, /* PseudoVLUXSEG3EI32_V_M4_M1 */ 34696, /* PseudoVLUXSEG3EI32_V_M4_M1_MASK */ 34701, /* PseudoVLUXSEG3EI32_V_M4_M1_TU */ 34709, /* PseudoVLUXSEG3EI32_V_M4_M2 */ 34715, /* PseudoVLUXSEG3EI32_V_M4_M2_MASK */ 34720, /* PseudoVLUXSEG3EI32_V_M4_M2_TU */ 34728, /* PseudoVLUXSEG3EI32_V_M8_M2 */ 34734, /* PseudoVLUXSEG3EI32_V_M8_M2_MASK */ 34739, /* PseudoVLUXSEG3EI32_V_M8_M2_TU */ 34747, /* PseudoVLUXSEG3EI32_V_MF2_M1 */ 34753, /* PseudoVLUXSEG3EI32_V_MF2_M1_MASK */ 34758, /* PseudoVLUXSEG3EI32_V_MF2_M1_TU */ 34766, /* PseudoVLUXSEG3EI32_V_MF2_MF2 */ 34772, /* PseudoVLUXSEG3EI32_V_MF2_MF2_MASK */ 34777, /* PseudoVLUXSEG3EI32_V_MF2_MF2_TU */ 34785, /* PseudoVLUXSEG3EI32_V_MF2_MF4 */ 34791, /* PseudoVLUXSEG3EI32_V_MF2_MF4_MASK */ 34796, /* PseudoVLUXSEG3EI32_V_MF2_MF4_TU */ 34804, /* PseudoVLUXSEG3EI32_V_MF2_MF8 */ 34810, /* PseudoVLUXSEG3EI32_V_MF2_MF8_MASK */ 34815, /* PseudoVLUXSEG3EI32_V_MF2_MF8_TU */ 34823, /* PseudoVLUXSEG3EI64_V_M1_M1 */ 34829, /* PseudoVLUXSEG3EI64_V_M1_M1_MASK */ 34834, /* PseudoVLUXSEG3EI64_V_M1_M1_TU */ 34842, /* PseudoVLUXSEG3EI64_V_M1_MF2 */ 34848, /* PseudoVLUXSEG3EI64_V_M1_MF2_MASK */ 34853, /* PseudoVLUXSEG3EI64_V_M1_MF2_TU */ 34861, /* PseudoVLUXSEG3EI64_V_M1_MF4 */ 34867, /* PseudoVLUXSEG3EI64_V_M1_MF4_MASK */ 34872, /* PseudoVLUXSEG3EI64_V_M1_MF4_TU */ 34880, /* PseudoVLUXSEG3EI64_V_M1_MF8 */ 34886, /* PseudoVLUXSEG3EI64_V_M1_MF8_MASK */ 34891, /* PseudoVLUXSEG3EI64_V_M1_MF8_TU */ 34899, /* PseudoVLUXSEG3EI64_V_M2_M1 */ 34905, /* PseudoVLUXSEG3EI64_V_M2_M1_MASK */ 34910, /* PseudoVLUXSEG3EI64_V_M2_M1_TU */ 34918, /* PseudoVLUXSEG3EI64_V_M2_M2 */ 34924, /* PseudoVLUXSEG3EI64_V_M2_M2_MASK */ 34929, /* PseudoVLUXSEG3EI64_V_M2_M2_TU */ 34937, /* PseudoVLUXSEG3EI64_V_M2_MF2 */ 34943, /* PseudoVLUXSEG3EI64_V_M2_MF2_MASK */ 34948, /* PseudoVLUXSEG3EI64_V_M2_MF2_TU */ 34956, /* PseudoVLUXSEG3EI64_V_M2_MF4 */ 34962, /* PseudoVLUXSEG3EI64_V_M2_MF4_MASK */ 34967, /* PseudoVLUXSEG3EI64_V_M2_MF4_TU */ 34975, /* PseudoVLUXSEG3EI64_V_M4_M1 */ 34981, /* PseudoVLUXSEG3EI64_V_M4_M1_MASK */ 34986, /* PseudoVLUXSEG3EI64_V_M4_M1_TU */ 34994, /* PseudoVLUXSEG3EI64_V_M4_M2 */ 35000, /* PseudoVLUXSEG3EI64_V_M4_M2_MASK */ 35005, /* PseudoVLUXSEG3EI64_V_M4_M2_TU */ 35013, /* PseudoVLUXSEG3EI64_V_M4_MF2 */ 35019, /* PseudoVLUXSEG3EI64_V_M4_MF2_MASK */ 35024, /* PseudoVLUXSEG3EI64_V_M4_MF2_TU */ 35032, /* PseudoVLUXSEG3EI64_V_M8_M1 */ 35038, /* PseudoVLUXSEG3EI64_V_M8_M1_MASK */ 35043, /* PseudoVLUXSEG3EI64_V_M8_M1_TU */ 35051, /* PseudoVLUXSEG3EI64_V_M8_M2 */ 35057, /* PseudoVLUXSEG3EI64_V_M8_M2_MASK */ 35062, /* PseudoVLUXSEG3EI64_V_M8_M2_TU */ 35070, /* PseudoVLUXSEG3EI8_V_M1_M1 */ 35076, /* PseudoVLUXSEG3EI8_V_M1_M1_MASK */ 35081, /* PseudoVLUXSEG3EI8_V_M1_M1_TU */ 35089, /* PseudoVLUXSEG3EI8_V_M1_M2 */ 35095, /* PseudoVLUXSEG3EI8_V_M1_M2_MASK */ 35100, /* PseudoVLUXSEG3EI8_V_M1_M2_TU */ 35108, /* PseudoVLUXSEG3EI8_V_M2_M2 */ 35114, /* PseudoVLUXSEG3EI8_V_M2_M2_MASK */ 35119, /* PseudoVLUXSEG3EI8_V_M2_M2_TU */ 35127, /* PseudoVLUXSEG3EI8_V_MF2_M1 */ 35133, /* PseudoVLUXSEG3EI8_V_MF2_M1_MASK */ 35138, /* PseudoVLUXSEG3EI8_V_MF2_M1_TU */ 35146, /* PseudoVLUXSEG3EI8_V_MF2_M2 */ 35152, /* PseudoVLUXSEG3EI8_V_MF2_M2_MASK */ 35157, /* PseudoVLUXSEG3EI8_V_MF2_M2_TU */ 35165, /* PseudoVLUXSEG3EI8_V_MF2_MF2 */ 35171, /* PseudoVLUXSEG3EI8_V_MF2_MF2_MASK */ 35176, /* PseudoVLUXSEG3EI8_V_MF2_MF2_TU */ 35184, /* PseudoVLUXSEG3EI8_V_MF4_M1 */ 35190, /* PseudoVLUXSEG3EI8_V_MF4_M1_MASK */ 35195, /* PseudoVLUXSEG3EI8_V_MF4_M1_TU */ 35203, /* PseudoVLUXSEG3EI8_V_MF4_M2 */ 35209, /* PseudoVLUXSEG3EI8_V_MF4_M2_MASK */ 35214, /* PseudoVLUXSEG3EI8_V_MF4_M2_TU */ 35222, /* PseudoVLUXSEG3EI8_V_MF4_MF2 */ 35228, /* PseudoVLUXSEG3EI8_V_MF4_MF2_MASK */ 35233, /* PseudoVLUXSEG3EI8_V_MF4_MF2_TU */ 35241, /* PseudoVLUXSEG3EI8_V_MF4_MF4 */ 35247, /* PseudoVLUXSEG3EI8_V_MF4_MF4_MASK */ 35252, /* PseudoVLUXSEG3EI8_V_MF4_MF4_TU */ 35260, /* PseudoVLUXSEG3EI8_V_MF8_M1 */ 35266, /* PseudoVLUXSEG3EI8_V_MF8_M1_MASK */ 35271, /* PseudoVLUXSEG3EI8_V_MF8_M1_TU */ 35279, /* PseudoVLUXSEG3EI8_V_MF8_MF2 */ 35285, /* PseudoVLUXSEG3EI8_V_MF8_MF2_MASK */ 35290, /* PseudoVLUXSEG3EI8_V_MF8_MF2_TU */ 35298, /* PseudoVLUXSEG3EI8_V_MF8_MF4 */ 35304, /* PseudoVLUXSEG3EI8_V_MF8_MF4_MASK */ 35309, /* PseudoVLUXSEG3EI8_V_MF8_MF4_TU */ 35317, /* PseudoVLUXSEG3EI8_V_MF8_MF8 */ 35323, /* PseudoVLUXSEG3EI8_V_MF8_MF8_MASK */ 35328, /* PseudoVLUXSEG3EI8_V_MF8_MF8_TU */ 35336, /* PseudoVLUXSEG4EI16_V_M1_M1 */ 35342, /* PseudoVLUXSEG4EI16_V_M1_M1_MASK */ 35347, /* PseudoVLUXSEG4EI16_V_M1_M1_TU */ 35355, /* PseudoVLUXSEG4EI16_V_M1_M2 */ 35361, /* PseudoVLUXSEG4EI16_V_M1_M2_MASK */ 35366, /* PseudoVLUXSEG4EI16_V_M1_M2_TU */ 35374, /* PseudoVLUXSEG4EI16_V_M1_MF2 */ 35380, /* PseudoVLUXSEG4EI16_V_M1_MF2_MASK */ 35385, /* PseudoVLUXSEG4EI16_V_M1_MF2_TU */ 35393, /* PseudoVLUXSEG4EI16_V_M2_M1 */ 35399, /* PseudoVLUXSEG4EI16_V_M2_M1_MASK */ 35404, /* PseudoVLUXSEG4EI16_V_M2_M1_TU */ 35412, /* PseudoVLUXSEG4EI16_V_M2_M2 */ 35418, /* PseudoVLUXSEG4EI16_V_M2_M2_MASK */ 35423, /* PseudoVLUXSEG4EI16_V_M2_M2_TU */ 35431, /* PseudoVLUXSEG4EI16_V_M4_M2 */ 35437, /* PseudoVLUXSEG4EI16_V_M4_M2_MASK */ 35442, /* PseudoVLUXSEG4EI16_V_M4_M2_TU */ 35450, /* PseudoVLUXSEG4EI16_V_MF2_M1 */ 35456, /* PseudoVLUXSEG4EI16_V_MF2_M1_MASK */ 35461, /* PseudoVLUXSEG4EI16_V_MF2_M1_TU */ 35469, /* PseudoVLUXSEG4EI16_V_MF2_M2 */ 35475, /* PseudoVLUXSEG4EI16_V_MF2_M2_MASK */ 35480, /* PseudoVLUXSEG4EI16_V_MF2_M2_TU */ 35488, /* PseudoVLUXSEG4EI16_V_MF2_MF2 */ 35494, /* PseudoVLUXSEG4EI16_V_MF2_MF2_MASK */ 35499, /* PseudoVLUXSEG4EI16_V_MF2_MF2_TU */ 35507, /* PseudoVLUXSEG4EI16_V_MF2_MF4 */ 35513, /* PseudoVLUXSEG4EI16_V_MF2_MF4_MASK */ 35518, /* PseudoVLUXSEG4EI16_V_MF2_MF4_TU */ 35526, /* PseudoVLUXSEG4EI16_V_MF4_M1 */ 35532, /* PseudoVLUXSEG4EI16_V_MF4_M1_MASK */ 35537, /* PseudoVLUXSEG4EI16_V_MF4_M1_TU */ 35545, /* PseudoVLUXSEG4EI16_V_MF4_MF2 */ 35551, /* PseudoVLUXSEG4EI16_V_MF4_MF2_MASK */ 35556, /* PseudoVLUXSEG4EI16_V_MF4_MF2_TU */ 35564, /* PseudoVLUXSEG4EI16_V_MF4_MF4 */ 35570, /* PseudoVLUXSEG4EI16_V_MF4_MF4_MASK */ 35575, /* PseudoVLUXSEG4EI16_V_MF4_MF4_TU */ 35583, /* PseudoVLUXSEG4EI16_V_MF4_MF8 */ 35589, /* PseudoVLUXSEG4EI16_V_MF4_MF8_MASK */ 35594, /* PseudoVLUXSEG4EI16_V_MF4_MF8_TU */ 35602, /* PseudoVLUXSEG4EI32_V_M1_M1 */ 35608, /* PseudoVLUXSEG4EI32_V_M1_M1_MASK */ 35613, /* PseudoVLUXSEG4EI32_V_M1_M1_TU */ 35621, /* PseudoVLUXSEG4EI32_V_M1_M2 */ 35627, /* PseudoVLUXSEG4EI32_V_M1_M2_MASK */ 35632, /* PseudoVLUXSEG4EI32_V_M1_M2_TU */ 35640, /* PseudoVLUXSEG4EI32_V_M1_MF2 */ 35646, /* PseudoVLUXSEG4EI32_V_M1_MF2_MASK */ 35651, /* PseudoVLUXSEG4EI32_V_M1_MF2_TU */ 35659, /* PseudoVLUXSEG4EI32_V_M1_MF4 */ 35665, /* PseudoVLUXSEG4EI32_V_M1_MF4_MASK */ 35670, /* PseudoVLUXSEG4EI32_V_M1_MF4_TU */ 35678, /* PseudoVLUXSEG4EI32_V_M2_M1 */ 35684, /* PseudoVLUXSEG4EI32_V_M2_M1_MASK */ 35689, /* PseudoVLUXSEG4EI32_V_M2_M1_TU */ 35697, /* PseudoVLUXSEG4EI32_V_M2_M2 */ 35703, /* PseudoVLUXSEG4EI32_V_M2_M2_MASK */ 35708, /* PseudoVLUXSEG4EI32_V_M2_M2_TU */ 35716, /* PseudoVLUXSEG4EI32_V_M2_MF2 */ 35722, /* PseudoVLUXSEG4EI32_V_M2_MF2_MASK */ 35727, /* PseudoVLUXSEG4EI32_V_M2_MF2_TU */ 35735, /* PseudoVLUXSEG4EI32_V_M4_M1 */ 35741, /* PseudoVLUXSEG4EI32_V_M4_M1_MASK */ 35746, /* PseudoVLUXSEG4EI32_V_M4_M1_TU */ 35754, /* PseudoVLUXSEG4EI32_V_M4_M2 */ 35760, /* PseudoVLUXSEG4EI32_V_M4_M2_MASK */ 35765, /* PseudoVLUXSEG4EI32_V_M4_M2_TU */ 35773, /* PseudoVLUXSEG4EI32_V_M8_M2 */ 35779, /* PseudoVLUXSEG4EI32_V_M8_M2_MASK */ 35784, /* PseudoVLUXSEG4EI32_V_M8_M2_TU */ 35792, /* PseudoVLUXSEG4EI32_V_MF2_M1 */ 35798, /* PseudoVLUXSEG4EI32_V_MF2_M1_MASK */ 35803, /* PseudoVLUXSEG4EI32_V_MF2_M1_TU */ 35811, /* PseudoVLUXSEG4EI32_V_MF2_MF2 */ 35817, /* PseudoVLUXSEG4EI32_V_MF2_MF2_MASK */ 35822, /* PseudoVLUXSEG4EI32_V_MF2_MF2_TU */ 35830, /* PseudoVLUXSEG4EI32_V_MF2_MF4 */ 35836, /* PseudoVLUXSEG4EI32_V_MF2_MF4_MASK */ 35841, /* PseudoVLUXSEG4EI32_V_MF2_MF4_TU */ 35849, /* PseudoVLUXSEG4EI32_V_MF2_MF8 */ 35855, /* PseudoVLUXSEG4EI32_V_MF2_MF8_MASK */ 35860, /* PseudoVLUXSEG4EI32_V_MF2_MF8_TU */ 35868, /* PseudoVLUXSEG4EI64_V_M1_M1 */ 35874, /* PseudoVLUXSEG4EI64_V_M1_M1_MASK */ 35879, /* PseudoVLUXSEG4EI64_V_M1_M1_TU */ 35887, /* PseudoVLUXSEG4EI64_V_M1_MF2 */ 35893, /* PseudoVLUXSEG4EI64_V_M1_MF2_MASK */ 35898, /* PseudoVLUXSEG4EI64_V_M1_MF2_TU */ 35906, /* PseudoVLUXSEG4EI64_V_M1_MF4 */ 35912, /* PseudoVLUXSEG4EI64_V_M1_MF4_MASK */ 35917, /* PseudoVLUXSEG4EI64_V_M1_MF4_TU */ 35925, /* PseudoVLUXSEG4EI64_V_M1_MF8 */ 35931, /* PseudoVLUXSEG4EI64_V_M1_MF8_MASK */ 35936, /* PseudoVLUXSEG4EI64_V_M1_MF8_TU */ 35944, /* PseudoVLUXSEG4EI64_V_M2_M1 */ 35950, /* PseudoVLUXSEG4EI64_V_M2_M1_MASK */ 35955, /* PseudoVLUXSEG4EI64_V_M2_M1_TU */ 35963, /* PseudoVLUXSEG4EI64_V_M2_M2 */ 35969, /* PseudoVLUXSEG4EI64_V_M2_M2_MASK */ 35974, /* PseudoVLUXSEG4EI64_V_M2_M2_TU */ 35982, /* PseudoVLUXSEG4EI64_V_M2_MF2 */ 35988, /* PseudoVLUXSEG4EI64_V_M2_MF2_MASK */ 35993, /* PseudoVLUXSEG4EI64_V_M2_MF2_TU */ 36001, /* PseudoVLUXSEG4EI64_V_M2_MF4 */ 36007, /* PseudoVLUXSEG4EI64_V_M2_MF4_MASK */ 36012, /* PseudoVLUXSEG4EI64_V_M2_MF4_TU */ 36020, /* PseudoVLUXSEG4EI64_V_M4_M1 */ 36026, /* PseudoVLUXSEG4EI64_V_M4_M1_MASK */ 36031, /* PseudoVLUXSEG4EI64_V_M4_M1_TU */ 36039, /* PseudoVLUXSEG4EI64_V_M4_M2 */ 36045, /* PseudoVLUXSEG4EI64_V_M4_M2_MASK */ 36050, /* PseudoVLUXSEG4EI64_V_M4_M2_TU */ 36058, /* PseudoVLUXSEG4EI64_V_M4_MF2 */ 36064, /* PseudoVLUXSEG4EI64_V_M4_MF2_MASK */ 36069, /* PseudoVLUXSEG4EI64_V_M4_MF2_TU */ 36077, /* PseudoVLUXSEG4EI64_V_M8_M1 */ 36083, /* PseudoVLUXSEG4EI64_V_M8_M1_MASK */ 36088, /* PseudoVLUXSEG4EI64_V_M8_M1_TU */ 36096, /* PseudoVLUXSEG4EI64_V_M8_M2 */ 36102, /* PseudoVLUXSEG4EI64_V_M8_M2_MASK */ 36107, /* PseudoVLUXSEG4EI64_V_M8_M2_TU */ 36115, /* PseudoVLUXSEG4EI8_V_M1_M1 */ 36121, /* PseudoVLUXSEG4EI8_V_M1_M1_MASK */ 36126, /* PseudoVLUXSEG4EI8_V_M1_M1_TU */ 36134, /* PseudoVLUXSEG4EI8_V_M1_M2 */ 36140, /* PseudoVLUXSEG4EI8_V_M1_M2_MASK */ 36145, /* PseudoVLUXSEG4EI8_V_M1_M2_TU */ 36153, /* PseudoVLUXSEG4EI8_V_M2_M2 */ 36159, /* PseudoVLUXSEG4EI8_V_M2_M2_MASK */ 36164, /* PseudoVLUXSEG4EI8_V_M2_M2_TU */ 36172, /* PseudoVLUXSEG4EI8_V_MF2_M1 */ 36178, /* PseudoVLUXSEG4EI8_V_MF2_M1_MASK */ 36183, /* PseudoVLUXSEG4EI8_V_MF2_M1_TU */ 36191, /* PseudoVLUXSEG4EI8_V_MF2_M2 */ 36197, /* PseudoVLUXSEG4EI8_V_MF2_M2_MASK */ 36202, /* PseudoVLUXSEG4EI8_V_MF2_M2_TU */ 36210, /* PseudoVLUXSEG4EI8_V_MF2_MF2 */ 36216, /* PseudoVLUXSEG4EI8_V_MF2_MF2_MASK */ 36221, /* PseudoVLUXSEG4EI8_V_MF2_MF2_TU */ 36229, /* PseudoVLUXSEG4EI8_V_MF4_M1 */ 36235, /* PseudoVLUXSEG4EI8_V_MF4_M1_MASK */ 36240, /* PseudoVLUXSEG4EI8_V_MF4_M1_TU */ 36248, /* PseudoVLUXSEG4EI8_V_MF4_M2 */ 36254, /* PseudoVLUXSEG4EI8_V_MF4_M2_MASK */ 36259, /* PseudoVLUXSEG4EI8_V_MF4_M2_TU */ 36267, /* PseudoVLUXSEG4EI8_V_MF4_MF2 */ 36273, /* PseudoVLUXSEG4EI8_V_MF4_MF2_MASK */ 36278, /* PseudoVLUXSEG4EI8_V_MF4_MF2_TU */ 36286, /* PseudoVLUXSEG4EI8_V_MF4_MF4 */ 36292, /* PseudoVLUXSEG4EI8_V_MF4_MF4_MASK */ 36297, /* PseudoVLUXSEG4EI8_V_MF4_MF4_TU */ 36305, /* PseudoVLUXSEG4EI8_V_MF8_M1 */ 36311, /* PseudoVLUXSEG4EI8_V_MF8_M1_MASK */ 36316, /* PseudoVLUXSEG4EI8_V_MF8_M1_TU */ 36324, /* PseudoVLUXSEG4EI8_V_MF8_MF2 */ 36330, /* PseudoVLUXSEG4EI8_V_MF8_MF2_MASK */ 36335, /* PseudoVLUXSEG4EI8_V_MF8_MF2_TU */ 36343, /* PseudoVLUXSEG4EI8_V_MF8_MF4 */ 36349, /* PseudoVLUXSEG4EI8_V_MF8_MF4_MASK */ 36354, /* PseudoVLUXSEG4EI8_V_MF8_MF4_TU */ 36362, /* PseudoVLUXSEG4EI8_V_MF8_MF8 */ 36368, /* PseudoVLUXSEG4EI8_V_MF8_MF8_MASK */ 36373, /* PseudoVLUXSEG4EI8_V_MF8_MF8_TU */ 36381, /* PseudoVLUXSEG5EI16_V_M1_M1 */ 36387, /* PseudoVLUXSEG5EI16_V_M1_M1_MASK */ 36392, /* PseudoVLUXSEG5EI16_V_M1_M1_TU */ 36400, /* PseudoVLUXSEG5EI16_V_M1_MF2 */ 36406, /* PseudoVLUXSEG5EI16_V_M1_MF2_MASK */ 36411, /* PseudoVLUXSEG5EI16_V_M1_MF2_TU */ 36419, /* PseudoVLUXSEG5EI16_V_M2_M1 */ 36425, /* PseudoVLUXSEG5EI16_V_M2_M1_MASK */ 36430, /* PseudoVLUXSEG5EI16_V_M2_M1_TU */ 36438, /* PseudoVLUXSEG5EI16_V_MF2_M1 */ 36444, /* PseudoVLUXSEG5EI16_V_MF2_M1_MASK */ 36449, /* PseudoVLUXSEG5EI16_V_MF2_M1_TU */ 36457, /* PseudoVLUXSEG5EI16_V_MF2_MF2 */ 36463, /* PseudoVLUXSEG5EI16_V_MF2_MF2_MASK */ 36468, /* PseudoVLUXSEG5EI16_V_MF2_MF2_TU */ 36476, /* PseudoVLUXSEG5EI16_V_MF2_MF4 */ 36482, /* PseudoVLUXSEG5EI16_V_MF2_MF4_MASK */ 36487, /* PseudoVLUXSEG5EI16_V_MF2_MF4_TU */ 36495, /* PseudoVLUXSEG5EI16_V_MF4_M1 */ 36501, /* PseudoVLUXSEG5EI16_V_MF4_M1_MASK */ 36506, /* PseudoVLUXSEG5EI16_V_MF4_M1_TU */ 36514, /* PseudoVLUXSEG5EI16_V_MF4_MF2 */ 36520, /* PseudoVLUXSEG5EI16_V_MF4_MF2_MASK */ 36525, /* PseudoVLUXSEG5EI16_V_MF4_MF2_TU */ 36533, /* PseudoVLUXSEG5EI16_V_MF4_MF4 */ 36539, /* PseudoVLUXSEG5EI16_V_MF4_MF4_MASK */ 36544, /* PseudoVLUXSEG5EI16_V_MF4_MF4_TU */ 36552, /* PseudoVLUXSEG5EI16_V_MF4_MF8 */ 36558, /* PseudoVLUXSEG5EI16_V_MF4_MF8_MASK */ 36563, /* PseudoVLUXSEG5EI16_V_MF4_MF8_TU */ 36571, /* PseudoVLUXSEG5EI32_V_M1_M1 */ 36577, /* PseudoVLUXSEG5EI32_V_M1_M1_MASK */ 36582, /* PseudoVLUXSEG5EI32_V_M1_M1_TU */ 36590, /* PseudoVLUXSEG5EI32_V_M1_MF2 */ 36596, /* PseudoVLUXSEG5EI32_V_M1_MF2_MASK */ 36601, /* PseudoVLUXSEG5EI32_V_M1_MF2_TU */ 36609, /* PseudoVLUXSEG5EI32_V_M1_MF4 */ 36615, /* PseudoVLUXSEG5EI32_V_M1_MF4_MASK */ 36620, /* PseudoVLUXSEG5EI32_V_M1_MF4_TU */ 36628, /* PseudoVLUXSEG5EI32_V_M2_M1 */ 36634, /* PseudoVLUXSEG5EI32_V_M2_M1_MASK */ 36639, /* PseudoVLUXSEG5EI32_V_M2_M1_TU */ 36647, /* PseudoVLUXSEG5EI32_V_M2_MF2 */ 36653, /* PseudoVLUXSEG5EI32_V_M2_MF2_MASK */ 36658, /* PseudoVLUXSEG5EI32_V_M2_MF2_TU */ 36666, /* PseudoVLUXSEG5EI32_V_M4_M1 */ 36672, /* PseudoVLUXSEG5EI32_V_M4_M1_MASK */ 36677, /* PseudoVLUXSEG5EI32_V_M4_M1_TU */ 36685, /* PseudoVLUXSEG5EI32_V_MF2_M1 */ 36691, /* PseudoVLUXSEG5EI32_V_MF2_M1_MASK */ 36696, /* PseudoVLUXSEG5EI32_V_MF2_M1_TU */ 36704, /* PseudoVLUXSEG5EI32_V_MF2_MF2 */ 36710, /* PseudoVLUXSEG5EI32_V_MF2_MF2_MASK */ 36715, /* PseudoVLUXSEG5EI32_V_MF2_MF2_TU */ 36723, /* PseudoVLUXSEG5EI32_V_MF2_MF4 */ 36729, /* PseudoVLUXSEG5EI32_V_MF2_MF4_MASK */ 36734, /* PseudoVLUXSEG5EI32_V_MF2_MF4_TU */ 36742, /* PseudoVLUXSEG5EI32_V_MF2_MF8 */ 36748, /* PseudoVLUXSEG5EI32_V_MF2_MF8_MASK */ 36753, /* PseudoVLUXSEG5EI32_V_MF2_MF8_TU */ 36761, /* PseudoVLUXSEG5EI64_V_M1_M1 */ 36767, /* PseudoVLUXSEG5EI64_V_M1_M1_MASK */ 36772, /* PseudoVLUXSEG5EI64_V_M1_M1_TU */ 36780, /* PseudoVLUXSEG5EI64_V_M1_MF2 */ 36786, /* PseudoVLUXSEG5EI64_V_M1_MF2_MASK */ 36791, /* PseudoVLUXSEG5EI64_V_M1_MF2_TU */ 36799, /* PseudoVLUXSEG5EI64_V_M1_MF4 */ 36805, /* PseudoVLUXSEG5EI64_V_M1_MF4_MASK */ 36810, /* PseudoVLUXSEG5EI64_V_M1_MF4_TU */ 36818, /* PseudoVLUXSEG5EI64_V_M1_MF8 */ 36824, /* PseudoVLUXSEG5EI64_V_M1_MF8_MASK */ 36829, /* PseudoVLUXSEG5EI64_V_M1_MF8_TU */ 36837, /* PseudoVLUXSEG5EI64_V_M2_M1 */ 36843, /* PseudoVLUXSEG5EI64_V_M2_M1_MASK */ 36848, /* PseudoVLUXSEG5EI64_V_M2_M1_TU */ 36856, /* PseudoVLUXSEG5EI64_V_M2_MF2 */ 36862, /* PseudoVLUXSEG5EI64_V_M2_MF2_MASK */ 36867, /* PseudoVLUXSEG5EI64_V_M2_MF2_TU */ 36875, /* PseudoVLUXSEG5EI64_V_M2_MF4 */ 36881, /* PseudoVLUXSEG5EI64_V_M2_MF4_MASK */ 36886, /* PseudoVLUXSEG5EI64_V_M2_MF4_TU */ 36894, /* PseudoVLUXSEG5EI64_V_M4_M1 */ 36900, /* PseudoVLUXSEG5EI64_V_M4_M1_MASK */ 36905, /* PseudoVLUXSEG5EI64_V_M4_M1_TU */ 36913, /* PseudoVLUXSEG5EI64_V_M4_MF2 */ 36919, /* PseudoVLUXSEG5EI64_V_M4_MF2_MASK */ 36924, /* PseudoVLUXSEG5EI64_V_M4_MF2_TU */ 36932, /* PseudoVLUXSEG5EI64_V_M8_M1 */ 36938, /* PseudoVLUXSEG5EI64_V_M8_M1_MASK */ 36943, /* PseudoVLUXSEG5EI64_V_M8_M1_TU */ 36951, /* PseudoVLUXSEG5EI8_V_M1_M1 */ 36957, /* PseudoVLUXSEG5EI8_V_M1_M1_MASK */ 36962, /* PseudoVLUXSEG5EI8_V_M1_M1_TU */ 36970, /* PseudoVLUXSEG5EI8_V_MF2_M1 */ 36976, /* PseudoVLUXSEG5EI8_V_MF2_M1_MASK */ 36981, /* PseudoVLUXSEG5EI8_V_MF2_M1_TU */ 36989, /* PseudoVLUXSEG5EI8_V_MF2_MF2 */ 36995, /* PseudoVLUXSEG5EI8_V_MF2_MF2_MASK */ 37000, /* PseudoVLUXSEG5EI8_V_MF2_MF2_TU */ 37008, /* PseudoVLUXSEG5EI8_V_MF4_M1 */ 37014, /* PseudoVLUXSEG5EI8_V_MF4_M1_MASK */ 37019, /* PseudoVLUXSEG5EI8_V_MF4_M1_TU */ 37027, /* PseudoVLUXSEG5EI8_V_MF4_MF2 */ 37033, /* PseudoVLUXSEG5EI8_V_MF4_MF2_MASK */ 37038, /* PseudoVLUXSEG5EI8_V_MF4_MF2_TU */ 37046, /* PseudoVLUXSEG5EI8_V_MF4_MF4 */ 37052, /* PseudoVLUXSEG5EI8_V_MF4_MF4_MASK */ 37057, /* PseudoVLUXSEG5EI8_V_MF4_MF4_TU */ 37065, /* PseudoVLUXSEG5EI8_V_MF8_M1 */ 37071, /* PseudoVLUXSEG5EI8_V_MF8_M1_MASK */ 37076, /* PseudoVLUXSEG5EI8_V_MF8_M1_TU */ 37084, /* PseudoVLUXSEG5EI8_V_MF8_MF2 */ 37090, /* PseudoVLUXSEG5EI8_V_MF8_MF2_MASK */ 37095, /* PseudoVLUXSEG5EI8_V_MF8_MF2_TU */ 37103, /* PseudoVLUXSEG5EI8_V_MF8_MF4 */ 37109, /* PseudoVLUXSEG5EI8_V_MF8_MF4_MASK */ 37114, /* PseudoVLUXSEG5EI8_V_MF8_MF4_TU */ 37122, /* PseudoVLUXSEG5EI8_V_MF8_MF8 */ 37128, /* PseudoVLUXSEG5EI8_V_MF8_MF8_MASK */ 37133, /* PseudoVLUXSEG5EI8_V_MF8_MF8_TU */ 37141, /* PseudoVLUXSEG6EI16_V_M1_M1 */ 37147, /* PseudoVLUXSEG6EI16_V_M1_M1_MASK */ 37152, /* PseudoVLUXSEG6EI16_V_M1_M1_TU */ 37160, /* PseudoVLUXSEG6EI16_V_M1_MF2 */ 37166, /* PseudoVLUXSEG6EI16_V_M1_MF2_MASK */ 37171, /* PseudoVLUXSEG6EI16_V_M1_MF2_TU */ 37179, /* PseudoVLUXSEG6EI16_V_M2_M1 */ 37185, /* PseudoVLUXSEG6EI16_V_M2_M1_MASK */ 37190, /* PseudoVLUXSEG6EI16_V_M2_M1_TU */ 37198, /* PseudoVLUXSEG6EI16_V_MF2_M1 */ 37204, /* PseudoVLUXSEG6EI16_V_MF2_M1_MASK */ 37209, /* PseudoVLUXSEG6EI16_V_MF2_M1_TU */ 37217, /* PseudoVLUXSEG6EI16_V_MF2_MF2 */ 37223, /* PseudoVLUXSEG6EI16_V_MF2_MF2_MASK */ 37228, /* PseudoVLUXSEG6EI16_V_MF2_MF2_TU */ 37236, /* PseudoVLUXSEG6EI16_V_MF2_MF4 */ 37242, /* PseudoVLUXSEG6EI16_V_MF2_MF4_MASK */ 37247, /* PseudoVLUXSEG6EI16_V_MF2_MF4_TU */ 37255, /* PseudoVLUXSEG6EI16_V_MF4_M1 */ 37261, /* PseudoVLUXSEG6EI16_V_MF4_M1_MASK */ 37266, /* PseudoVLUXSEG6EI16_V_MF4_M1_TU */ 37274, /* PseudoVLUXSEG6EI16_V_MF4_MF2 */ 37280, /* PseudoVLUXSEG6EI16_V_MF4_MF2_MASK */ 37285, /* PseudoVLUXSEG6EI16_V_MF4_MF2_TU */ 37293, /* PseudoVLUXSEG6EI16_V_MF4_MF4 */ 37299, /* PseudoVLUXSEG6EI16_V_MF4_MF4_MASK */ 37304, /* PseudoVLUXSEG6EI16_V_MF4_MF4_TU */ 37312, /* PseudoVLUXSEG6EI16_V_MF4_MF8 */ 37318, /* PseudoVLUXSEG6EI16_V_MF4_MF8_MASK */ 37323, /* PseudoVLUXSEG6EI16_V_MF4_MF8_TU */ 37331, /* PseudoVLUXSEG6EI32_V_M1_M1 */ 37337, /* PseudoVLUXSEG6EI32_V_M1_M1_MASK */ 37342, /* PseudoVLUXSEG6EI32_V_M1_M1_TU */ 37350, /* PseudoVLUXSEG6EI32_V_M1_MF2 */ 37356, /* PseudoVLUXSEG6EI32_V_M1_MF2_MASK */ 37361, /* PseudoVLUXSEG6EI32_V_M1_MF2_TU */ 37369, /* PseudoVLUXSEG6EI32_V_M1_MF4 */ 37375, /* PseudoVLUXSEG6EI32_V_M1_MF4_MASK */ 37380, /* PseudoVLUXSEG6EI32_V_M1_MF4_TU */ 37388, /* PseudoVLUXSEG6EI32_V_M2_M1 */ 37394, /* PseudoVLUXSEG6EI32_V_M2_M1_MASK */ 37399, /* PseudoVLUXSEG6EI32_V_M2_M1_TU */ 37407, /* PseudoVLUXSEG6EI32_V_M2_MF2 */ 37413, /* PseudoVLUXSEG6EI32_V_M2_MF2_MASK */ 37418, /* PseudoVLUXSEG6EI32_V_M2_MF2_TU */ 37426, /* PseudoVLUXSEG6EI32_V_M4_M1 */ 37432, /* PseudoVLUXSEG6EI32_V_M4_M1_MASK */ 37437, /* PseudoVLUXSEG6EI32_V_M4_M1_TU */ 37445, /* PseudoVLUXSEG6EI32_V_MF2_M1 */ 37451, /* PseudoVLUXSEG6EI32_V_MF2_M1_MASK */ 37456, /* PseudoVLUXSEG6EI32_V_MF2_M1_TU */ 37464, /* PseudoVLUXSEG6EI32_V_MF2_MF2 */ 37470, /* PseudoVLUXSEG6EI32_V_MF2_MF2_MASK */ 37475, /* PseudoVLUXSEG6EI32_V_MF2_MF2_TU */ 37483, /* PseudoVLUXSEG6EI32_V_MF2_MF4 */ 37489, /* PseudoVLUXSEG6EI32_V_MF2_MF4_MASK */ 37494, /* PseudoVLUXSEG6EI32_V_MF2_MF4_TU */ 37502, /* PseudoVLUXSEG6EI32_V_MF2_MF8 */ 37508, /* PseudoVLUXSEG6EI32_V_MF2_MF8_MASK */ 37513, /* PseudoVLUXSEG6EI32_V_MF2_MF8_TU */ 37521, /* PseudoVLUXSEG6EI64_V_M1_M1 */ 37527, /* PseudoVLUXSEG6EI64_V_M1_M1_MASK */ 37532, /* PseudoVLUXSEG6EI64_V_M1_M1_TU */ 37540, /* PseudoVLUXSEG6EI64_V_M1_MF2 */ 37546, /* PseudoVLUXSEG6EI64_V_M1_MF2_MASK */ 37551, /* PseudoVLUXSEG6EI64_V_M1_MF2_TU */ 37559, /* PseudoVLUXSEG6EI64_V_M1_MF4 */ 37565, /* PseudoVLUXSEG6EI64_V_M1_MF4_MASK */ 37570, /* PseudoVLUXSEG6EI64_V_M1_MF4_TU */ 37578, /* PseudoVLUXSEG6EI64_V_M1_MF8 */ 37584, /* PseudoVLUXSEG6EI64_V_M1_MF8_MASK */ 37589, /* PseudoVLUXSEG6EI64_V_M1_MF8_TU */ 37597, /* PseudoVLUXSEG6EI64_V_M2_M1 */ 37603, /* PseudoVLUXSEG6EI64_V_M2_M1_MASK */ 37608, /* PseudoVLUXSEG6EI64_V_M2_M1_TU */ 37616, /* PseudoVLUXSEG6EI64_V_M2_MF2 */ 37622, /* PseudoVLUXSEG6EI64_V_M2_MF2_MASK */ 37627, /* PseudoVLUXSEG6EI64_V_M2_MF2_TU */ 37635, /* PseudoVLUXSEG6EI64_V_M2_MF4 */ 37641, /* PseudoVLUXSEG6EI64_V_M2_MF4_MASK */ 37646, /* PseudoVLUXSEG6EI64_V_M2_MF4_TU */ 37654, /* PseudoVLUXSEG6EI64_V_M4_M1 */ 37660, /* PseudoVLUXSEG6EI64_V_M4_M1_MASK */ 37665, /* PseudoVLUXSEG6EI64_V_M4_M1_TU */ 37673, /* PseudoVLUXSEG6EI64_V_M4_MF2 */ 37679, /* PseudoVLUXSEG6EI64_V_M4_MF2_MASK */ 37684, /* PseudoVLUXSEG6EI64_V_M4_MF2_TU */ 37692, /* PseudoVLUXSEG6EI64_V_M8_M1 */ 37698, /* PseudoVLUXSEG6EI64_V_M8_M1_MASK */ 37703, /* PseudoVLUXSEG6EI64_V_M8_M1_TU */ 37711, /* PseudoVLUXSEG6EI8_V_M1_M1 */ 37717, /* PseudoVLUXSEG6EI8_V_M1_M1_MASK */ 37722, /* PseudoVLUXSEG6EI8_V_M1_M1_TU */ 37730, /* PseudoVLUXSEG6EI8_V_MF2_M1 */ 37736, /* PseudoVLUXSEG6EI8_V_MF2_M1_MASK */ 37741, /* PseudoVLUXSEG6EI8_V_MF2_M1_TU */ 37749, /* PseudoVLUXSEG6EI8_V_MF2_MF2 */ 37755, /* PseudoVLUXSEG6EI8_V_MF2_MF2_MASK */ 37760, /* PseudoVLUXSEG6EI8_V_MF2_MF2_TU */ 37768, /* PseudoVLUXSEG6EI8_V_MF4_M1 */ 37774, /* PseudoVLUXSEG6EI8_V_MF4_M1_MASK */ 37779, /* PseudoVLUXSEG6EI8_V_MF4_M1_TU */ 37787, /* PseudoVLUXSEG6EI8_V_MF4_MF2 */ 37793, /* PseudoVLUXSEG6EI8_V_MF4_MF2_MASK */ 37798, /* PseudoVLUXSEG6EI8_V_MF4_MF2_TU */ 37806, /* PseudoVLUXSEG6EI8_V_MF4_MF4 */ 37812, /* PseudoVLUXSEG6EI8_V_MF4_MF4_MASK */ 37817, /* PseudoVLUXSEG6EI8_V_MF4_MF4_TU */ 37825, /* PseudoVLUXSEG6EI8_V_MF8_M1 */ 37831, /* PseudoVLUXSEG6EI8_V_MF8_M1_MASK */ 37836, /* PseudoVLUXSEG6EI8_V_MF8_M1_TU */ 37844, /* PseudoVLUXSEG6EI8_V_MF8_MF2 */ 37850, /* PseudoVLUXSEG6EI8_V_MF8_MF2_MASK */ 37855, /* PseudoVLUXSEG6EI8_V_MF8_MF2_TU */ 37863, /* PseudoVLUXSEG6EI8_V_MF8_MF4 */ 37869, /* PseudoVLUXSEG6EI8_V_MF8_MF4_MASK */ 37874, /* PseudoVLUXSEG6EI8_V_MF8_MF4_TU */ 37882, /* PseudoVLUXSEG6EI8_V_MF8_MF8 */ 37888, /* PseudoVLUXSEG6EI8_V_MF8_MF8_MASK */ 37893, /* PseudoVLUXSEG6EI8_V_MF8_MF8_TU */ 37901, /* PseudoVLUXSEG7EI16_V_M1_M1 */ 37907, /* PseudoVLUXSEG7EI16_V_M1_M1_MASK */ 37912, /* PseudoVLUXSEG7EI16_V_M1_M1_TU */ 37920, /* PseudoVLUXSEG7EI16_V_M1_MF2 */ 37926, /* PseudoVLUXSEG7EI16_V_M1_MF2_MASK */ 37931, /* PseudoVLUXSEG7EI16_V_M1_MF2_TU */ 37939, /* PseudoVLUXSEG7EI16_V_M2_M1 */ 37945, /* PseudoVLUXSEG7EI16_V_M2_M1_MASK */ 37950, /* PseudoVLUXSEG7EI16_V_M2_M1_TU */ 37958, /* PseudoVLUXSEG7EI16_V_MF2_M1 */ 37964, /* PseudoVLUXSEG7EI16_V_MF2_M1_MASK */ 37969, /* PseudoVLUXSEG7EI16_V_MF2_M1_TU */ 37977, /* PseudoVLUXSEG7EI16_V_MF2_MF2 */ 37983, /* PseudoVLUXSEG7EI16_V_MF2_MF2_MASK */ 37988, /* PseudoVLUXSEG7EI16_V_MF2_MF2_TU */ 37996, /* PseudoVLUXSEG7EI16_V_MF2_MF4 */ 38002, /* PseudoVLUXSEG7EI16_V_MF2_MF4_MASK */ 38007, /* PseudoVLUXSEG7EI16_V_MF2_MF4_TU */ 38015, /* PseudoVLUXSEG7EI16_V_MF4_M1 */ 38021, /* PseudoVLUXSEG7EI16_V_MF4_M1_MASK */ 38026, /* PseudoVLUXSEG7EI16_V_MF4_M1_TU */ 38034, /* PseudoVLUXSEG7EI16_V_MF4_MF2 */ 38040, /* PseudoVLUXSEG7EI16_V_MF4_MF2_MASK */ 38045, /* PseudoVLUXSEG7EI16_V_MF4_MF2_TU */ 38053, /* PseudoVLUXSEG7EI16_V_MF4_MF4 */ 38059, /* PseudoVLUXSEG7EI16_V_MF4_MF4_MASK */ 38064, /* PseudoVLUXSEG7EI16_V_MF4_MF4_TU */ 38072, /* PseudoVLUXSEG7EI16_V_MF4_MF8 */ 38078, /* PseudoVLUXSEG7EI16_V_MF4_MF8_MASK */ 38083, /* PseudoVLUXSEG7EI16_V_MF4_MF8_TU */ 38091, /* PseudoVLUXSEG7EI32_V_M1_M1 */ 38097, /* PseudoVLUXSEG7EI32_V_M1_M1_MASK */ 38102, /* PseudoVLUXSEG7EI32_V_M1_M1_TU */ 38110, /* PseudoVLUXSEG7EI32_V_M1_MF2 */ 38116, /* PseudoVLUXSEG7EI32_V_M1_MF2_MASK */ 38121, /* PseudoVLUXSEG7EI32_V_M1_MF2_TU */ 38129, /* PseudoVLUXSEG7EI32_V_M1_MF4 */ 38135, /* PseudoVLUXSEG7EI32_V_M1_MF4_MASK */ 38140, /* PseudoVLUXSEG7EI32_V_M1_MF4_TU */ 38148, /* PseudoVLUXSEG7EI32_V_M2_M1 */ 38154, /* PseudoVLUXSEG7EI32_V_M2_M1_MASK */ 38159, /* PseudoVLUXSEG7EI32_V_M2_M1_TU */ 38167, /* PseudoVLUXSEG7EI32_V_M2_MF2 */ 38173, /* PseudoVLUXSEG7EI32_V_M2_MF2_MASK */ 38178, /* PseudoVLUXSEG7EI32_V_M2_MF2_TU */ 38186, /* PseudoVLUXSEG7EI32_V_M4_M1 */ 38192, /* PseudoVLUXSEG7EI32_V_M4_M1_MASK */ 38197, /* PseudoVLUXSEG7EI32_V_M4_M1_TU */ 38205, /* PseudoVLUXSEG7EI32_V_MF2_M1 */ 38211, /* PseudoVLUXSEG7EI32_V_MF2_M1_MASK */ 38216, /* PseudoVLUXSEG7EI32_V_MF2_M1_TU */ 38224, /* PseudoVLUXSEG7EI32_V_MF2_MF2 */ 38230, /* PseudoVLUXSEG7EI32_V_MF2_MF2_MASK */ 38235, /* PseudoVLUXSEG7EI32_V_MF2_MF2_TU */ 38243, /* PseudoVLUXSEG7EI32_V_MF2_MF4 */ 38249, /* PseudoVLUXSEG7EI32_V_MF2_MF4_MASK */ 38254, /* PseudoVLUXSEG7EI32_V_MF2_MF4_TU */ 38262, /* PseudoVLUXSEG7EI32_V_MF2_MF8 */ 38268, /* PseudoVLUXSEG7EI32_V_MF2_MF8_MASK */ 38273, /* PseudoVLUXSEG7EI32_V_MF2_MF8_TU */ 38281, /* PseudoVLUXSEG7EI64_V_M1_M1 */ 38287, /* PseudoVLUXSEG7EI64_V_M1_M1_MASK */ 38292, /* PseudoVLUXSEG7EI64_V_M1_M1_TU */ 38300, /* PseudoVLUXSEG7EI64_V_M1_MF2 */ 38306, /* PseudoVLUXSEG7EI64_V_M1_MF2_MASK */ 38311, /* PseudoVLUXSEG7EI64_V_M1_MF2_TU */ 38319, /* PseudoVLUXSEG7EI64_V_M1_MF4 */ 38325, /* PseudoVLUXSEG7EI64_V_M1_MF4_MASK */ 38330, /* PseudoVLUXSEG7EI64_V_M1_MF4_TU */ 38338, /* PseudoVLUXSEG7EI64_V_M1_MF8 */ 38344, /* PseudoVLUXSEG7EI64_V_M1_MF8_MASK */ 38349, /* PseudoVLUXSEG7EI64_V_M1_MF8_TU */ 38357, /* PseudoVLUXSEG7EI64_V_M2_M1 */ 38363, /* PseudoVLUXSEG7EI64_V_M2_M1_MASK */ 38368, /* PseudoVLUXSEG7EI64_V_M2_M1_TU */ 38376, /* PseudoVLUXSEG7EI64_V_M2_MF2 */ 38382, /* PseudoVLUXSEG7EI64_V_M2_MF2_MASK */ 38387, /* PseudoVLUXSEG7EI64_V_M2_MF2_TU */ 38395, /* PseudoVLUXSEG7EI64_V_M2_MF4 */ 38401, /* PseudoVLUXSEG7EI64_V_M2_MF4_MASK */ 38406, /* PseudoVLUXSEG7EI64_V_M2_MF4_TU */ 38414, /* PseudoVLUXSEG7EI64_V_M4_M1 */ 38420, /* PseudoVLUXSEG7EI64_V_M4_M1_MASK */ 38425, /* PseudoVLUXSEG7EI64_V_M4_M1_TU */ 38433, /* PseudoVLUXSEG7EI64_V_M4_MF2 */ 38439, /* PseudoVLUXSEG7EI64_V_M4_MF2_MASK */ 38444, /* PseudoVLUXSEG7EI64_V_M4_MF2_TU */ 38452, /* PseudoVLUXSEG7EI64_V_M8_M1 */ 38458, /* PseudoVLUXSEG7EI64_V_M8_M1_MASK */ 38463, /* PseudoVLUXSEG7EI64_V_M8_M1_TU */ 38471, /* PseudoVLUXSEG7EI8_V_M1_M1 */ 38477, /* PseudoVLUXSEG7EI8_V_M1_M1_MASK */ 38482, /* PseudoVLUXSEG7EI8_V_M1_M1_TU */ 38490, /* PseudoVLUXSEG7EI8_V_MF2_M1 */ 38496, /* PseudoVLUXSEG7EI8_V_MF2_M1_MASK */ 38501, /* PseudoVLUXSEG7EI8_V_MF2_M1_TU */ 38509, /* PseudoVLUXSEG7EI8_V_MF2_MF2 */ 38515, /* PseudoVLUXSEG7EI8_V_MF2_MF2_MASK */ 38520, /* PseudoVLUXSEG7EI8_V_MF2_MF2_TU */ 38528, /* PseudoVLUXSEG7EI8_V_MF4_M1 */ 38534, /* PseudoVLUXSEG7EI8_V_MF4_M1_MASK */ 38539, /* PseudoVLUXSEG7EI8_V_MF4_M1_TU */ 38547, /* PseudoVLUXSEG7EI8_V_MF4_MF2 */ 38553, /* PseudoVLUXSEG7EI8_V_MF4_MF2_MASK */ 38558, /* PseudoVLUXSEG7EI8_V_MF4_MF2_TU */ 38566, /* PseudoVLUXSEG7EI8_V_MF4_MF4 */ 38572, /* PseudoVLUXSEG7EI8_V_MF4_MF4_MASK */ 38577, /* PseudoVLUXSEG7EI8_V_MF4_MF4_TU */ 38585, /* PseudoVLUXSEG7EI8_V_MF8_M1 */ 38591, /* PseudoVLUXSEG7EI8_V_MF8_M1_MASK */ 38596, /* PseudoVLUXSEG7EI8_V_MF8_M1_TU */ 38604, /* PseudoVLUXSEG7EI8_V_MF8_MF2 */ 38610, /* PseudoVLUXSEG7EI8_V_MF8_MF2_MASK */ 38615, /* PseudoVLUXSEG7EI8_V_MF8_MF2_TU */ 38623, /* PseudoVLUXSEG7EI8_V_MF8_MF4 */ 38629, /* PseudoVLUXSEG7EI8_V_MF8_MF4_MASK */ 38634, /* PseudoVLUXSEG7EI8_V_MF8_MF4_TU */ 38642, /* PseudoVLUXSEG7EI8_V_MF8_MF8 */ 38648, /* PseudoVLUXSEG7EI8_V_MF8_MF8_MASK */ 38653, /* PseudoVLUXSEG7EI8_V_MF8_MF8_TU */ 38661, /* PseudoVLUXSEG8EI16_V_M1_M1 */ 38667, /* PseudoVLUXSEG8EI16_V_M1_M1_MASK */ 38672, /* PseudoVLUXSEG8EI16_V_M1_M1_TU */ 38680, /* PseudoVLUXSEG8EI16_V_M1_MF2 */ 38686, /* PseudoVLUXSEG8EI16_V_M1_MF2_MASK */ 38691, /* PseudoVLUXSEG8EI16_V_M1_MF2_TU */ 38699, /* PseudoVLUXSEG8EI16_V_M2_M1 */ 38705, /* PseudoVLUXSEG8EI16_V_M2_M1_MASK */ 38710, /* PseudoVLUXSEG8EI16_V_M2_M1_TU */ 38718, /* PseudoVLUXSEG8EI16_V_MF2_M1 */ 38724, /* PseudoVLUXSEG8EI16_V_MF2_M1_MASK */ 38729, /* PseudoVLUXSEG8EI16_V_MF2_M1_TU */ 38737, /* PseudoVLUXSEG8EI16_V_MF2_MF2 */ 38743, /* PseudoVLUXSEG8EI16_V_MF2_MF2_MASK */ 38748, /* PseudoVLUXSEG8EI16_V_MF2_MF2_TU */ 38756, /* PseudoVLUXSEG8EI16_V_MF2_MF4 */ 38762, /* PseudoVLUXSEG8EI16_V_MF2_MF4_MASK */ 38767, /* PseudoVLUXSEG8EI16_V_MF2_MF4_TU */ 38775, /* PseudoVLUXSEG8EI16_V_MF4_M1 */ 38781, /* PseudoVLUXSEG8EI16_V_MF4_M1_MASK */ 38786, /* PseudoVLUXSEG8EI16_V_MF4_M1_TU */ 38794, /* PseudoVLUXSEG8EI16_V_MF4_MF2 */ 38800, /* PseudoVLUXSEG8EI16_V_MF4_MF2_MASK */ 38805, /* PseudoVLUXSEG8EI16_V_MF4_MF2_TU */ 38813, /* PseudoVLUXSEG8EI16_V_MF4_MF4 */ 38819, /* PseudoVLUXSEG8EI16_V_MF4_MF4_MASK */ 38824, /* PseudoVLUXSEG8EI16_V_MF4_MF4_TU */ 38832, /* PseudoVLUXSEG8EI16_V_MF4_MF8 */ 38838, /* PseudoVLUXSEG8EI16_V_MF4_MF8_MASK */ 38843, /* PseudoVLUXSEG8EI16_V_MF4_MF8_TU */ 38851, /* PseudoVLUXSEG8EI32_V_M1_M1 */ 38857, /* PseudoVLUXSEG8EI32_V_M1_M1_MASK */ 38862, /* PseudoVLUXSEG8EI32_V_M1_M1_TU */ 38870, /* PseudoVLUXSEG8EI32_V_M1_MF2 */ 38876, /* PseudoVLUXSEG8EI32_V_M1_MF2_MASK */ 38881, /* PseudoVLUXSEG8EI32_V_M1_MF2_TU */ 38889, /* PseudoVLUXSEG8EI32_V_M1_MF4 */ 38895, /* PseudoVLUXSEG8EI32_V_M1_MF4_MASK */ 38900, /* PseudoVLUXSEG8EI32_V_M1_MF4_TU */ 38908, /* PseudoVLUXSEG8EI32_V_M2_M1 */ 38914, /* PseudoVLUXSEG8EI32_V_M2_M1_MASK */ 38919, /* PseudoVLUXSEG8EI32_V_M2_M1_TU */ 38927, /* PseudoVLUXSEG8EI32_V_M2_MF2 */ 38933, /* PseudoVLUXSEG8EI32_V_M2_MF2_MASK */ 38938, /* PseudoVLUXSEG8EI32_V_M2_MF2_TU */ 38946, /* PseudoVLUXSEG8EI32_V_M4_M1 */ 38952, /* PseudoVLUXSEG8EI32_V_M4_M1_MASK */ 38957, /* PseudoVLUXSEG8EI32_V_M4_M1_TU */ 38965, /* PseudoVLUXSEG8EI32_V_MF2_M1 */ 38971, /* PseudoVLUXSEG8EI32_V_MF2_M1_MASK */ 38976, /* PseudoVLUXSEG8EI32_V_MF2_M1_TU */ 38984, /* PseudoVLUXSEG8EI32_V_MF2_MF2 */ 38990, /* PseudoVLUXSEG8EI32_V_MF2_MF2_MASK */ 38995, /* PseudoVLUXSEG8EI32_V_MF2_MF2_TU */ 39003, /* PseudoVLUXSEG8EI32_V_MF2_MF4 */ 39009, /* PseudoVLUXSEG8EI32_V_MF2_MF4_MASK */ 39014, /* PseudoVLUXSEG8EI32_V_MF2_MF4_TU */ 39022, /* PseudoVLUXSEG8EI32_V_MF2_MF8 */ 39028, /* PseudoVLUXSEG8EI32_V_MF2_MF8_MASK */ 39033, /* PseudoVLUXSEG8EI32_V_MF2_MF8_TU */ 39041, /* PseudoVLUXSEG8EI64_V_M1_M1 */ 39047, /* PseudoVLUXSEG8EI64_V_M1_M1_MASK */ 39052, /* PseudoVLUXSEG8EI64_V_M1_M1_TU */ 39060, /* PseudoVLUXSEG8EI64_V_M1_MF2 */ 39066, /* PseudoVLUXSEG8EI64_V_M1_MF2_MASK */ 39071, /* PseudoVLUXSEG8EI64_V_M1_MF2_TU */ 39079, /* PseudoVLUXSEG8EI64_V_M1_MF4 */ 39085, /* PseudoVLUXSEG8EI64_V_M1_MF4_MASK */ 39090, /* PseudoVLUXSEG8EI64_V_M1_MF4_TU */ 39098, /* PseudoVLUXSEG8EI64_V_M1_MF8 */ 39104, /* PseudoVLUXSEG8EI64_V_M1_MF8_MASK */ 39109, /* PseudoVLUXSEG8EI64_V_M1_MF8_TU */ 39117, /* PseudoVLUXSEG8EI64_V_M2_M1 */ 39123, /* PseudoVLUXSEG8EI64_V_M2_M1_MASK */ 39128, /* PseudoVLUXSEG8EI64_V_M2_M1_TU */ 39136, /* PseudoVLUXSEG8EI64_V_M2_MF2 */ 39142, /* PseudoVLUXSEG8EI64_V_M2_MF2_MASK */ 39147, /* PseudoVLUXSEG8EI64_V_M2_MF2_TU */ 39155, /* PseudoVLUXSEG8EI64_V_M2_MF4 */ 39161, /* PseudoVLUXSEG8EI64_V_M2_MF4_MASK */ 39166, /* PseudoVLUXSEG8EI64_V_M2_MF4_TU */ 39174, /* PseudoVLUXSEG8EI64_V_M4_M1 */ 39180, /* PseudoVLUXSEG8EI64_V_M4_M1_MASK */ 39185, /* PseudoVLUXSEG8EI64_V_M4_M1_TU */ 39193, /* PseudoVLUXSEG8EI64_V_M4_MF2 */ 39199, /* PseudoVLUXSEG8EI64_V_M4_MF2_MASK */ 39204, /* PseudoVLUXSEG8EI64_V_M4_MF2_TU */ 39212, /* PseudoVLUXSEG8EI64_V_M8_M1 */ 39218, /* PseudoVLUXSEG8EI64_V_M8_M1_MASK */ 39223, /* PseudoVLUXSEG8EI64_V_M8_M1_TU */ 39231, /* PseudoVLUXSEG8EI8_V_M1_M1 */ 39237, /* PseudoVLUXSEG8EI8_V_M1_M1_MASK */ 39242, /* PseudoVLUXSEG8EI8_V_M1_M1_TU */ 39250, /* PseudoVLUXSEG8EI8_V_MF2_M1 */ 39256, /* PseudoVLUXSEG8EI8_V_MF2_M1_MASK */ 39261, /* PseudoVLUXSEG8EI8_V_MF2_M1_TU */ 39269, /* PseudoVLUXSEG8EI8_V_MF2_MF2 */ 39275, /* PseudoVLUXSEG8EI8_V_MF2_MF2_MASK */ 39280, /* PseudoVLUXSEG8EI8_V_MF2_MF2_TU */ 39288, /* PseudoVLUXSEG8EI8_V_MF4_M1 */ 39294, /* PseudoVLUXSEG8EI8_V_MF4_M1_MASK */ 39299, /* PseudoVLUXSEG8EI8_V_MF4_M1_TU */ 39307, /* PseudoVLUXSEG8EI8_V_MF4_MF2 */ 39313, /* PseudoVLUXSEG8EI8_V_MF4_MF2_MASK */ 39318, /* PseudoVLUXSEG8EI8_V_MF4_MF2_TU */ 39326, /* PseudoVLUXSEG8EI8_V_MF4_MF4 */ 39332, /* PseudoVLUXSEG8EI8_V_MF4_MF4_MASK */ 39337, /* PseudoVLUXSEG8EI8_V_MF4_MF4_TU */ 39345, /* PseudoVLUXSEG8EI8_V_MF8_M1 */ 39351, /* PseudoVLUXSEG8EI8_V_MF8_M1_MASK */ 39356, /* PseudoVLUXSEG8EI8_V_MF8_M1_TU */ 39364, /* PseudoVLUXSEG8EI8_V_MF8_MF2 */ 39370, /* PseudoVLUXSEG8EI8_V_MF8_MF2_MASK */ 39375, /* PseudoVLUXSEG8EI8_V_MF8_MF2_TU */ 39383, /* PseudoVLUXSEG8EI8_V_MF8_MF4 */ 39389, /* PseudoVLUXSEG8EI8_V_MF8_MF4_MASK */ 39394, /* PseudoVLUXSEG8EI8_V_MF8_MF4_TU */ 39402, /* PseudoVLUXSEG8EI8_V_MF8_MF8 */ 39408, /* PseudoVLUXSEG8EI8_V_MF8_MF8_MASK */ 39413, /* PseudoVLUXSEG8EI8_V_MF8_MF8_TU */ 39421, /* PseudoVMACC_VV_M1 */ 39427, /* PseudoVMACC_VV_M1_MASK */ 39434, /* PseudoVMACC_VV_M2 */ 39442, /* PseudoVMACC_VV_M2_MASK */ 39449, /* PseudoVMACC_VV_M4 */ 39457, /* PseudoVMACC_VV_M4_MASK */ 39464, /* PseudoVMACC_VV_M8 */ 39472, /* PseudoVMACC_VV_M8_MASK */ 39479, /* PseudoVMACC_VV_MF2 */ 39487, /* PseudoVMACC_VV_MF2_MASK */ 39494, /* PseudoVMACC_VV_MF4 */ 39502, /* PseudoVMACC_VV_MF4_MASK */ 39509, /* PseudoVMACC_VV_MF8 */ 39517, /* PseudoVMACC_VV_MF8_MASK */ 39524, /* PseudoVMACC_VX_M1 */ 39532, /* PseudoVMACC_VX_M1_MASK */ 39539, /* PseudoVMACC_VX_M2 */ 39547, /* PseudoVMACC_VX_M2_MASK */ 39554, /* PseudoVMACC_VX_M4 */ 39562, /* PseudoVMACC_VX_M4_MASK */ 39569, /* PseudoVMACC_VX_M8 */ 39577, /* PseudoVMACC_VX_M8_MASK */ 39584, /* PseudoVMACC_VX_MF2 */ 39592, /* PseudoVMACC_VX_MF2_MASK */ 39599, /* PseudoVMACC_VX_MF4 */ 39607, /* PseudoVMACC_VX_MF4_MASK */ 39614, /* PseudoVMACC_VX_MF8 */ 39622, /* PseudoVMACC_VX_MF8_MASK */ 39629, /* PseudoVMADC_VIM_M1 */ 39637, /* PseudoVMADC_VIM_M2 */ 39643, /* PseudoVMADC_VIM_M4 */ 39649, /* PseudoVMADC_VIM_M8 */ 39655, /* PseudoVMADC_VIM_MF2 */ 39661, /* PseudoVMADC_VIM_MF4 */ 39667, /* PseudoVMADC_VIM_MF8 */ 39673, /* PseudoVMADC_VI_M1 */ 39679, /* PseudoVMADC_VI_M2 */ 39684, /* PseudoVMADC_VI_M4 */ 39689, /* PseudoVMADC_VI_M8 */ 39694, /* PseudoVMADC_VI_MF2 */ 39699, /* PseudoVMADC_VI_MF4 */ 39704, /* PseudoVMADC_VI_MF8 */ 39709, /* PseudoVMADC_VVM_M1 */ 39714, /* PseudoVMADC_VVM_M2 */ 39720, /* PseudoVMADC_VVM_M4 */ 39726, /* PseudoVMADC_VVM_M8 */ 39732, /* PseudoVMADC_VVM_MF2 */ 39738, /* PseudoVMADC_VVM_MF4 */ 39744, /* PseudoVMADC_VVM_MF8 */ 39750, /* PseudoVMADC_VV_M1 */ 39756, /* PseudoVMADC_VV_M2 */ 39761, /* PseudoVMADC_VV_M4 */ 39766, /* PseudoVMADC_VV_M8 */ 39771, /* PseudoVMADC_VV_MF2 */ 39776, /* PseudoVMADC_VV_MF4 */ 39781, /* PseudoVMADC_VV_MF8 */ 39786, /* PseudoVMADC_VXM_M1 */ 39791, /* PseudoVMADC_VXM_M2 */ 39797, /* PseudoVMADC_VXM_M4 */ 39803, /* PseudoVMADC_VXM_M8 */ 39809, /* PseudoVMADC_VXM_MF2 */ 39815, /* PseudoVMADC_VXM_MF4 */ 39821, /* PseudoVMADC_VXM_MF8 */ 39827, /* PseudoVMADC_VX_M1 */ 39833, /* PseudoVMADC_VX_M2 */ 39838, /* PseudoVMADC_VX_M4 */ 39843, /* PseudoVMADC_VX_M8 */ 39848, /* PseudoVMADC_VX_MF2 */ 39853, /* PseudoVMADC_VX_MF4 */ 39858, /* PseudoVMADC_VX_MF8 */ 39863, /* PseudoVMADD_VV_M1 */ 39868, /* PseudoVMADD_VV_M1_MASK */ 39875, /* PseudoVMADD_VV_M2 */ 39883, /* PseudoVMADD_VV_M2_MASK */ 39890, /* PseudoVMADD_VV_M4 */ 39898, /* PseudoVMADD_VV_M4_MASK */ 39905, /* PseudoVMADD_VV_M8 */ 39913, /* PseudoVMADD_VV_M8_MASK */ 39920, /* PseudoVMADD_VV_MF2 */ 39928, /* PseudoVMADD_VV_MF2_MASK */ 39935, /* PseudoVMADD_VV_MF4 */ 39943, /* PseudoVMADD_VV_MF4_MASK */ 39950, /* PseudoVMADD_VV_MF8 */ 39958, /* PseudoVMADD_VV_MF8_MASK */ 39965, /* PseudoVMADD_VX_M1 */ 39973, /* PseudoVMADD_VX_M1_MASK */ 39980, /* PseudoVMADD_VX_M2 */ 39988, /* PseudoVMADD_VX_M2_MASK */ 39995, /* PseudoVMADD_VX_M4 */ 40003, /* PseudoVMADD_VX_M4_MASK */ 40010, /* PseudoVMADD_VX_M8 */ 40018, /* PseudoVMADD_VX_M8_MASK */ 40025, /* PseudoVMADD_VX_MF2 */ 40033, /* PseudoVMADD_VX_MF2_MASK */ 40040, /* PseudoVMADD_VX_MF4 */ 40048, /* PseudoVMADD_VX_MF4_MASK */ 40055, /* PseudoVMADD_VX_MF8 */ 40063, /* PseudoVMADD_VX_MF8_MASK */ 40070, /* PseudoVMANDN_MM_M1 */ 40078, /* PseudoVMANDN_MM_M2 */ 40083, /* PseudoVMANDN_MM_M4 */ 40088, /* PseudoVMANDN_MM_M8 */ 40093, /* PseudoVMANDN_MM_MF2 */ 40098, /* PseudoVMANDN_MM_MF4 */ 40103, /* PseudoVMANDN_MM_MF8 */ 40108, /* PseudoVMAND_MM_M1 */ 40113, /* PseudoVMAND_MM_M2 */ 40118, /* PseudoVMAND_MM_M4 */ 40123, /* PseudoVMAND_MM_M8 */ 40128, /* PseudoVMAND_MM_MF2 */ 40133, /* PseudoVMAND_MM_MF4 */ 40138, /* PseudoVMAND_MM_MF8 */ 40143, /* PseudoVMAXU_VV_M1 */ 40148, /* PseudoVMAXU_VV_M1_MASK */ 40153, /* PseudoVMAXU_VV_M1_TU */ 40161, /* PseudoVMAXU_VV_M2 */ 40167, /* PseudoVMAXU_VV_M2_MASK */ 40172, /* PseudoVMAXU_VV_M2_TU */ 40180, /* PseudoVMAXU_VV_M4 */ 40186, /* PseudoVMAXU_VV_M4_MASK */ 40191, /* PseudoVMAXU_VV_M4_TU */ 40199, /* PseudoVMAXU_VV_M8 */ 40205, /* PseudoVMAXU_VV_M8_MASK */ 40210, /* PseudoVMAXU_VV_M8_TU */ 40218, /* PseudoVMAXU_VV_MF2 */ 40224, /* PseudoVMAXU_VV_MF2_MASK */ 40229, /* PseudoVMAXU_VV_MF2_TU */ 40237, /* PseudoVMAXU_VV_MF4 */ 40243, /* PseudoVMAXU_VV_MF4_MASK */ 40248, /* PseudoVMAXU_VV_MF4_TU */ 40256, /* PseudoVMAXU_VV_MF8 */ 40262, /* PseudoVMAXU_VV_MF8_MASK */ 40267, /* PseudoVMAXU_VV_MF8_TU */ 40275, /* PseudoVMAXU_VX_M1 */ 40281, /* PseudoVMAXU_VX_M1_MASK */ 40286, /* PseudoVMAXU_VX_M1_TU */ 40294, /* PseudoVMAXU_VX_M2 */ 40300, /* PseudoVMAXU_VX_M2_MASK */ 40305, /* PseudoVMAXU_VX_M2_TU */ 40313, /* PseudoVMAXU_VX_M4 */ 40319, /* PseudoVMAXU_VX_M4_MASK */ 40324, /* PseudoVMAXU_VX_M4_TU */ 40332, /* PseudoVMAXU_VX_M8 */ 40338, /* PseudoVMAXU_VX_M8_MASK */ 40343, /* PseudoVMAXU_VX_M8_TU */ 40351, /* PseudoVMAXU_VX_MF2 */ 40357, /* PseudoVMAXU_VX_MF2_MASK */ 40362, /* PseudoVMAXU_VX_MF2_TU */ 40370, /* PseudoVMAXU_VX_MF4 */ 40376, /* PseudoVMAXU_VX_MF4_MASK */ 40381, /* PseudoVMAXU_VX_MF4_TU */ 40389, /* PseudoVMAXU_VX_MF8 */ 40395, /* PseudoVMAXU_VX_MF8_MASK */ 40400, /* PseudoVMAXU_VX_MF8_TU */ 40408, /* PseudoVMAX_VV_M1 */ 40414, /* PseudoVMAX_VV_M1_MASK */ 40419, /* PseudoVMAX_VV_M1_TU */ 40427, /* PseudoVMAX_VV_M2 */ 40433, /* PseudoVMAX_VV_M2_MASK */ 40438, /* PseudoVMAX_VV_M2_TU */ 40446, /* PseudoVMAX_VV_M4 */ 40452, /* PseudoVMAX_VV_M4_MASK */ 40457, /* PseudoVMAX_VV_M4_TU */ 40465, /* PseudoVMAX_VV_M8 */ 40471, /* PseudoVMAX_VV_M8_MASK */ 40476, /* PseudoVMAX_VV_M8_TU */ 40484, /* PseudoVMAX_VV_MF2 */ 40490, /* PseudoVMAX_VV_MF2_MASK */ 40495, /* PseudoVMAX_VV_MF2_TU */ 40503, /* PseudoVMAX_VV_MF4 */ 40509, /* PseudoVMAX_VV_MF4_MASK */ 40514, /* PseudoVMAX_VV_MF4_TU */ 40522, /* PseudoVMAX_VV_MF8 */ 40528, /* PseudoVMAX_VV_MF8_MASK */ 40533, /* PseudoVMAX_VV_MF8_TU */ 40541, /* PseudoVMAX_VX_M1 */ 40547, /* PseudoVMAX_VX_M1_MASK */ 40552, /* PseudoVMAX_VX_M1_TU */ 40560, /* PseudoVMAX_VX_M2 */ 40566, /* PseudoVMAX_VX_M2_MASK */ 40571, /* PseudoVMAX_VX_M2_TU */ 40579, /* PseudoVMAX_VX_M4 */ 40585, /* PseudoVMAX_VX_M4_MASK */ 40590, /* PseudoVMAX_VX_M4_TU */ 40598, /* PseudoVMAX_VX_M8 */ 40604, /* PseudoVMAX_VX_M8_MASK */ 40609, /* PseudoVMAX_VX_M8_TU */ 40617, /* PseudoVMAX_VX_MF2 */ 40623, /* PseudoVMAX_VX_MF2_MASK */ 40628, /* PseudoVMAX_VX_MF2_TU */ 40636, /* PseudoVMAX_VX_MF4 */ 40642, /* PseudoVMAX_VX_MF4_MASK */ 40647, /* PseudoVMAX_VX_MF4_TU */ 40655, /* PseudoVMAX_VX_MF8 */ 40661, /* PseudoVMAX_VX_MF8_MASK */ 40666, /* PseudoVMAX_VX_MF8_TU */ 40674, /* PseudoVMCLR_M_B1 */ 40680, /* PseudoVMCLR_M_B16 */ 40683, /* PseudoVMCLR_M_B2 */ 40686, /* PseudoVMCLR_M_B32 */ 40689, /* PseudoVMCLR_M_B4 */ 40692, /* PseudoVMCLR_M_B64 */ 40695, /* PseudoVMCLR_M_B8 */ 40698, /* PseudoVMERGE_VIM_M1 */ 40701, /* PseudoVMERGE_VIM_M1_TU */ 40707, /* PseudoVMERGE_VIM_M2 */ 40714, /* PseudoVMERGE_VIM_M2_TU */ 40720, /* PseudoVMERGE_VIM_M4 */ 40727, /* PseudoVMERGE_VIM_M4_TU */ 40733, /* PseudoVMERGE_VIM_M8 */ 40740, /* PseudoVMERGE_VIM_M8_TU */ 40746, /* PseudoVMERGE_VIM_MF2 */ 40753, /* PseudoVMERGE_VIM_MF2_TU */ 40759, /* PseudoVMERGE_VIM_MF4 */ 40766, /* PseudoVMERGE_VIM_MF4_TU */ 40772, /* PseudoVMERGE_VIM_MF8 */ 40779, /* PseudoVMERGE_VIM_MF8_TU */ 40785, /* PseudoVMERGE_VVM_M1 */ 40792, /* PseudoVMERGE_VVM_M1_TU */ 40798, /* PseudoVMERGE_VVM_M2 */ 40805, /* PseudoVMERGE_VVM_M2_TU */ 40811, /* PseudoVMERGE_VVM_M4 */ 40818, /* PseudoVMERGE_VVM_M4_TU */ 40824, /* PseudoVMERGE_VVM_M8 */ 40831, /* PseudoVMERGE_VVM_M8_TU */ 40837, /* PseudoVMERGE_VVM_MF2 */ 40844, /* PseudoVMERGE_VVM_MF2_TU */ 40850, /* PseudoVMERGE_VVM_MF4 */ 40857, /* PseudoVMERGE_VVM_MF4_TU */ 40863, /* PseudoVMERGE_VVM_MF8 */ 40870, /* PseudoVMERGE_VVM_MF8_TU */ 40876, /* PseudoVMERGE_VXM_M1 */ 40883, /* PseudoVMERGE_VXM_M1_TU */ 40889, /* PseudoVMERGE_VXM_M2 */ 40896, /* PseudoVMERGE_VXM_M2_TU */ 40902, /* PseudoVMERGE_VXM_M4 */ 40909, /* PseudoVMERGE_VXM_M4_TU */ 40915, /* PseudoVMERGE_VXM_M8 */ 40922, /* PseudoVMERGE_VXM_M8_TU */ 40928, /* PseudoVMERGE_VXM_MF2 */ 40935, /* PseudoVMERGE_VXM_MF2_TU */ 40941, /* PseudoVMERGE_VXM_MF4 */ 40948, /* PseudoVMERGE_VXM_MF4_TU */ 40954, /* PseudoVMERGE_VXM_MF8 */ 40961, /* PseudoVMERGE_VXM_MF8_TU */ 40967, /* PseudoVMFEQ_VF16_M1 */ 40974, /* PseudoVMFEQ_VF16_M1_MASK */ 40979, /* PseudoVMFEQ_VF16_M2 */ 40986, /* PseudoVMFEQ_VF16_M2_MASK */ 40991, /* PseudoVMFEQ_VF16_M4 */ 40998, /* PseudoVMFEQ_VF16_M4_MASK */ 41003, /* PseudoVMFEQ_VF16_M8 */ 41010, /* PseudoVMFEQ_VF16_M8_MASK */ 41015, /* PseudoVMFEQ_VF16_MF2 */ 41022, /* PseudoVMFEQ_VF16_MF2_MASK */ 41027, /* PseudoVMFEQ_VF16_MF4 */ 41034, /* PseudoVMFEQ_VF16_MF4_MASK */ 41039, /* PseudoVMFEQ_VF32_M1 */ 41046, /* PseudoVMFEQ_VF32_M1_MASK */ 41051, /* PseudoVMFEQ_VF32_M2 */ 41058, /* PseudoVMFEQ_VF32_M2_MASK */ 41063, /* PseudoVMFEQ_VF32_M4 */ 41070, /* PseudoVMFEQ_VF32_M4_MASK */ 41075, /* PseudoVMFEQ_VF32_M8 */ 41082, /* PseudoVMFEQ_VF32_M8_MASK */ 41087, /* PseudoVMFEQ_VF32_MF2 */ 41094, /* PseudoVMFEQ_VF32_MF2_MASK */ 41099, /* PseudoVMFEQ_VF64_M1 */ 41106, /* PseudoVMFEQ_VF64_M1_MASK */ 41111, /* PseudoVMFEQ_VF64_M2 */ 41118, /* PseudoVMFEQ_VF64_M2_MASK */ 41123, /* PseudoVMFEQ_VF64_M4 */ 41130, /* PseudoVMFEQ_VF64_M4_MASK */ 41135, /* PseudoVMFEQ_VF64_M8 */ 41142, /* PseudoVMFEQ_VF64_M8_MASK */ 41147, /* PseudoVMFEQ_VV_M1 */ 41154, /* PseudoVMFEQ_VV_M1_MASK */ 41159, /* PseudoVMFEQ_VV_M2 */ 41166, /* PseudoVMFEQ_VV_M2_MASK */ 41171, /* PseudoVMFEQ_VV_M4 */ 41178, /* PseudoVMFEQ_VV_M4_MASK */ 41183, /* PseudoVMFEQ_VV_M8 */ 41190, /* PseudoVMFEQ_VV_M8_MASK */ 41195, /* PseudoVMFEQ_VV_MF2 */ 41202, /* PseudoVMFEQ_VV_MF2_MASK */ 41207, /* PseudoVMFEQ_VV_MF4 */ 41214, /* PseudoVMFEQ_VV_MF4_MASK */ 41219, /* PseudoVMFGE_VF16_M1 */ 41226, /* PseudoVMFGE_VF16_M1_MASK */ 41231, /* PseudoVMFGE_VF16_M2 */ 41238, /* PseudoVMFGE_VF16_M2_MASK */ 41243, /* PseudoVMFGE_VF16_M4 */ 41250, /* PseudoVMFGE_VF16_M4_MASK */ 41255, /* PseudoVMFGE_VF16_M8 */ 41262, /* PseudoVMFGE_VF16_M8_MASK */ 41267, /* PseudoVMFGE_VF16_MF2 */ 41274, /* PseudoVMFGE_VF16_MF2_MASK */ 41279, /* PseudoVMFGE_VF16_MF4 */ 41286, /* PseudoVMFGE_VF16_MF4_MASK */ 41291, /* PseudoVMFGE_VF32_M1 */ 41298, /* PseudoVMFGE_VF32_M1_MASK */ 41303, /* PseudoVMFGE_VF32_M2 */ 41310, /* PseudoVMFGE_VF32_M2_MASK */ 41315, /* PseudoVMFGE_VF32_M4 */ 41322, /* PseudoVMFGE_VF32_M4_MASK */ 41327, /* PseudoVMFGE_VF32_M8 */ 41334, /* PseudoVMFGE_VF32_M8_MASK */ 41339, /* PseudoVMFGE_VF32_MF2 */ 41346, /* PseudoVMFGE_VF32_MF2_MASK */ 41351, /* PseudoVMFGE_VF64_M1 */ 41358, /* PseudoVMFGE_VF64_M1_MASK */ 41363, /* PseudoVMFGE_VF64_M2 */ 41370, /* PseudoVMFGE_VF64_M2_MASK */ 41375, /* PseudoVMFGE_VF64_M4 */ 41382, /* PseudoVMFGE_VF64_M4_MASK */ 41387, /* PseudoVMFGE_VF64_M8 */ 41394, /* PseudoVMFGE_VF64_M8_MASK */ 41399, /* PseudoVMFGT_VF16_M1 */ 41406, /* PseudoVMFGT_VF16_M1_MASK */ 41411, /* PseudoVMFGT_VF16_M2 */ 41418, /* PseudoVMFGT_VF16_M2_MASK */ 41423, /* PseudoVMFGT_VF16_M4 */ 41430, /* PseudoVMFGT_VF16_M4_MASK */ 41435, /* PseudoVMFGT_VF16_M8 */ 41442, /* PseudoVMFGT_VF16_M8_MASK */ 41447, /* PseudoVMFGT_VF16_MF2 */ 41454, /* PseudoVMFGT_VF16_MF2_MASK */ 41459, /* PseudoVMFGT_VF16_MF4 */ 41466, /* PseudoVMFGT_VF16_MF4_MASK */ 41471, /* PseudoVMFGT_VF32_M1 */ 41478, /* PseudoVMFGT_VF32_M1_MASK */ 41483, /* PseudoVMFGT_VF32_M2 */ 41490, /* PseudoVMFGT_VF32_M2_MASK */ 41495, /* PseudoVMFGT_VF32_M4 */ 41502, /* PseudoVMFGT_VF32_M4_MASK */ 41507, /* PseudoVMFGT_VF32_M8 */ 41514, /* PseudoVMFGT_VF32_M8_MASK */ 41519, /* PseudoVMFGT_VF32_MF2 */ 41526, /* PseudoVMFGT_VF32_MF2_MASK */ 41531, /* PseudoVMFGT_VF64_M1 */ 41538, /* PseudoVMFGT_VF64_M1_MASK */ 41543, /* PseudoVMFGT_VF64_M2 */ 41550, /* PseudoVMFGT_VF64_M2_MASK */ 41555, /* PseudoVMFGT_VF64_M4 */ 41562, /* PseudoVMFGT_VF64_M4_MASK */ 41567, /* PseudoVMFGT_VF64_M8 */ 41574, /* PseudoVMFGT_VF64_M8_MASK */ 41579, /* PseudoVMFLE_VF16_M1 */ 41586, /* PseudoVMFLE_VF16_M1_MASK */ 41591, /* PseudoVMFLE_VF16_M2 */ 41598, /* PseudoVMFLE_VF16_M2_MASK */ 41603, /* PseudoVMFLE_VF16_M4 */ 41610, /* PseudoVMFLE_VF16_M4_MASK */ 41615, /* PseudoVMFLE_VF16_M8 */ 41622, /* PseudoVMFLE_VF16_M8_MASK */ 41627, /* PseudoVMFLE_VF16_MF2 */ 41634, /* PseudoVMFLE_VF16_MF2_MASK */ 41639, /* PseudoVMFLE_VF16_MF4 */ 41646, /* PseudoVMFLE_VF16_MF4_MASK */ 41651, /* PseudoVMFLE_VF32_M1 */ 41658, /* PseudoVMFLE_VF32_M1_MASK */ 41663, /* PseudoVMFLE_VF32_M2 */ 41670, /* PseudoVMFLE_VF32_M2_MASK */ 41675, /* PseudoVMFLE_VF32_M4 */ 41682, /* PseudoVMFLE_VF32_M4_MASK */ 41687, /* PseudoVMFLE_VF32_M8 */ 41694, /* PseudoVMFLE_VF32_M8_MASK */ 41699, /* PseudoVMFLE_VF32_MF2 */ 41706, /* PseudoVMFLE_VF32_MF2_MASK */ 41711, /* PseudoVMFLE_VF64_M1 */ 41718, /* PseudoVMFLE_VF64_M1_MASK */ 41723, /* PseudoVMFLE_VF64_M2 */ 41730, /* PseudoVMFLE_VF64_M2_MASK */ 41735, /* PseudoVMFLE_VF64_M4 */ 41742, /* PseudoVMFLE_VF64_M4_MASK */ 41747, /* PseudoVMFLE_VF64_M8 */ 41754, /* PseudoVMFLE_VF64_M8_MASK */ 41759, /* PseudoVMFLE_VV_M1 */ 41766, /* PseudoVMFLE_VV_M1_MASK */ 41771, /* PseudoVMFLE_VV_M2 */ 41778, /* PseudoVMFLE_VV_M2_MASK */ 41783, /* PseudoVMFLE_VV_M4 */ 41790, /* PseudoVMFLE_VV_M4_MASK */ 41795, /* PseudoVMFLE_VV_M8 */ 41802, /* PseudoVMFLE_VV_M8_MASK */ 41807, /* PseudoVMFLE_VV_MF2 */ 41814, /* PseudoVMFLE_VV_MF2_MASK */ 41819, /* PseudoVMFLE_VV_MF4 */ 41826, /* PseudoVMFLE_VV_MF4_MASK */ 41831, /* PseudoVMFLT_VF16_M1 */ 41838, /* PseudoVMFLT_VF16_M1_MASK */ 41843, /* PseudoVMFLT_VF16_M2 */ 41850, /* PseudoVMFLT_VF16_M2_MASK */ 41855, /* PseudoVMFLT_VF16_M4 */ 41862, /* PseudoVMFLT_VF16_M4_MASK */ 41867, /* PseudoVMFLT_VF16_M8 */ 41874, /* PseudoVMFLT_VF16_M8_MASK */ 41879, /* PseudoVMFLT_VF16_MF2 */ 41886, /* PseudoVMFLT_VF16_MF2_MASK */ 41891, /* PseudoVMFLT_VF16_MF4 */ 41898, /* PseudoVMFLT_VF16_MF4_MASK */ 41903, /* PseudoVMFLT_VF32_M1 */ 41910, /* PseudoVMFLT_VF32_M1_MASK */ 41915, /* PseudoVMFLT_VF32_M2 */ 41922, /* PseudoVMFLT_VF32_M2_MASK */ 41927, /* PseudoVMFLT_VF32_M4 */ 41934, /* PseudoVMFLT_VF32_M4_MASK */ 41939, /* PseudoVMFLT_VF32_M8 */ 41946, /* PseudoVMFLT_VF32_M8_MASK */ 41951, /* PseudoVMFLT_VF32_MF2 */ 41958, /* PseudoVMFLT_VF32_MF2_MASK */ 41963, /* PseudoVMFLT_VF64_M1 */ 41970, /* PseudoVMFLT_VF64_M1_MASK */ 41975, /* PseudoVMFLT_VF64_M2 */ 41982, /* PseudoVMFLT_VF64_M2_MASK */ 41987, /* PseudoVMFLT_VF64_M4 */ 41994, /* PseudoVMFLT_VF64_M4_MASK */ 41999, /* PseudoVMFLT_VF64_M8 */ 42006, /* PseudoVMFLT_VF64_M8_MASK */ 42011, /* PseudoVMFLT_VV_M1 */ 42018, /* PseudoVMFLT_VV_M1_MASK */ 42023, /* PseudoVMFLT_VV_M2 */ 42030, /* PseudoVMFLT_VV_M2_MASK */ 42035, /* PseudoVMFLT_VV_M4 */ 42042, /* PseudoVMFLT_VV_M4_MASK */ 42047, /* PseudoVMFLT_VV_M8 */ 42054, /* PseudoVMFLT_VV_M8_MASK */ 42059, /* PseudoVMFLT_VV_MF2 */ 42066, /* PseudoVMFLT_VV_MF2_MASK */ 42071, /* PseudoVMFLT_VV_MF4 */ 42078, /* PseudoVMFLT_VV_MF4_MASK */ 42083, /* PseudoVMFNE_VF16_M1 */ 42090, /* PseudoVMFNE_VF16_M1_MASK */ 42095, /* PseudoVMFNE_VF16_M2 */ 42102, /* PseudoVMFNE_VF16_M2_MASK */ 42107, /* PseudoVMFNE_VF16_M4 */ 42114, /* PseudoVMFNE_VF16_M4_MASK */ 42119, /* PseudoVMFNE_VF16_M8 */ 42126, /* PseudoVMFNE_VF16_M8_MASK */ 42131, /* PseudoVMFNE_VF16_MF2 */ 42138, /* PseudoVMFNE_VF16_MF2_MASK */ 42143, /* PseudoVMFNE_VF16_MF4 */ 42150, /* PseudoVMFNE_VF16_MF4_MASK */ 42155, /* PseudoVMFNE_VF32_M1 */ 42162, /* PseudoVMFNE_VF32_M1_MASK */ 42167, /* PseudoVMFNE_VF32_M2 */ 42174, /* PseudoVMFNE_VF32_M2_MASK */ 42179, /* PseudoVMFNE_VF32_M4 */ 42186, /* PseudoVMFNE_VF32_M4_MASK */ 42191, /* PseudoVMFNE_VF32_M8 */ 42198, /* PseudoVMFNE_VF32_M8_MASK */ 42203, /* PseudoVMFNE_VF32_MF2 */ 42210, /* PseudoVMFNE_VF32_MF2_MASK */ 42215, /* PseudoVMFNE_VF64_M1 */ 42222, /* PseudoVMFNE_VF64_M1_MASK */ 42227, /* PseudoVMFNE_VF64_M2 */ 42234, /* PseudoVMFNE_VF64_M2_MASK */ 42239, /* PseudoVMFNE_VF64_M4 */ 42246, /* PseudoVMFNE_VF64_M4_MASK */ 42251, /* PseudoVMFNE_VF64_M8 */ 42258, /* PseudoVMFNE_VF64_M8_MASK */ 42263, /* PseudoVMFNE_VV_M1 */ 42270, /* PseudoVMFNE_VV_M1_MASK */ 42275, /* PseudoVMFNE_VV_M2 */ 42282, /* PseudoVMFNE_VV_M2_MASK */ 42287, /* PseudoVMFNE_VV_M4 */ 42294, /* PseudoVMFNE_VV_M4_MASK */ 42299, /* PseudoVMFNE_VV_M8 */ 42306, /* PseudoVMFNE_VV_M8_MASK */ 42311, /* PseudoVMFNE_VV_MF2 */ 42318, /* PseudoVMFNE_VV_MF2_MASK */ 42323, /* PseudoVMFNE_VV_MF4 */ 42330, /* PseudoVMFNE_VV_MF4_MASK */ 42335, /* PseudoVMINU_VV_M1 */ 42342, /* PseudoVMINU_VV_M1_MASK */ 42347, /* PseudoVMINU_VV_M1_TU */ 42355, /* PseudoVMINU_VV_M2 */ 42361, /* PseudoVMINU_VV_M2_MASK */ 42366, /* PseudoVMINU_VV_M2_TU */ 42374, /* PseudoVMINU_VV_M4 */ 42380, /* PseudoVMINU_VV_M4_MASK */ 42385, /* PseudoVMINU_VV_M4_TU */ 42393, /* PseudoVMINU_VV_M8 */ 42399, /* PseudoVMINU_VV_M8_MASK */ 42404, /* PseudoVMINU_VV_M8_TU */ 42412, /* PseudoVMINU_VV_MF2 */ 42418, /* PseudoVMINU_VV_MF2_MASK */ 42423, /* PseudoVMINU_VV_MF2_TU */ 42431, /* PseudoVMINU_VV_MF4 */ 42437, /* PseudoVMINU_VV_MF4_MASK */ 42442, /* PseudoVMINU_VV_MF4_TU */ 42450, /* PseudoVMINU_VV_MF8 */ 42456, /* PseudoVMINU_VV_MF8_MASK */ 42461, /* PseudoVMINU_VV_MF8_TU */ 42469, /* PseudoVMINU_VX_M1 */ 42475, /* PseudoVMINU_VX_M1_MASK */ 42480, /* PseudoVMINU_VX_M1_TU */ 42488, /* PseudoVMINU_VX_M2 */ 42494, /* PseudoVMINU_VX_M2_MASK */ 42499, /* PseudoVMINU_VX_M2_TU */ 42507, /* PseudoVMINU_VX_M4 */ 42513, /* PseudoVMINU_VX_M4_MASK */ 42518, /* PseudoVMINU_VX_M4_TU */ 42526, /* PseudoVMINU_VX_M8 */ 42532, /* PseudoVMINU_VX_M8_MASK */ 42537, /* PseudoVMINU_VX_M8_TU */ 42545, /* PseudoVMINU_VX_MF2 */ 42551, /* PseudoVMINU_VX_MF2_MASK */ 42556, /* PseudoVMINU_VX_MF2_TU */ 42564, /* PseudoVMINU_VX_MF4 */ 42570, /* PseudoVMINU_VX_MF4_MASK */ 42575, /* PseudoVMINU_VX_MF4_TU */ 42583, /* PseudoVMINU_VX_MF8 */ 42589, /* PseudoVMINU_VX_MF8_MASK */ 42594, /* PseudoVMINU_VX_MF8_TU */ 42602, /* PseudoVMIN_VV_M1 */ 42608, /* PseudoVMIN_VV_M1_MASK */ 42613, /* PseudoVMIN_VV_M1_TU */ 42621, /* PseudoVMIN_VV_M2 */ 42627, /* PseudoVMIN_VV_M2_MASK */ 42632, /* PseudoVMIN_VV_M2_TU */ 42640, /* PseudoVMIN_VV_M4 */ 42646, /* PseudoVMIN_VV_M4_MASK */ 42651, /* PseudoVMIN_VV_M4_TU */ 42659, /* PseudoVMIN_VV_M8 */ 42665, /* PseudoVMIN_VV_M8_MASK */ 42670, /* PseudoVMIN_VV_M8_TU */ 42678, /* PseudoVMIN_VV_MF2 */ 42684, /* PseudoVMIN_VV_MF2_MASK */ 42689, /* PseudoVMIN_VV_MF2_TU */ 42697, /* PseudoVMIN_VV_MF4 */ 42703, /* PseudoVMIN_VV_MF4_MASK */ 42708, /* PseudoVMIN_VV_MF4_TU */ 42716, /* PseudoVMIN_VV_MF8 */ 42722, /* PseudoVMIN_VV_MF8_MASK */ 42727, /* PseudoVMIN_VV_MF8_TU */ 42735, /* PseudoVMIN_VX_M1 */ 42741, /* PseudoVMIN_VX_M1_MASK */ 42746, /* PseudoVMIN_VX_M1_TU */ 42754, /* PseudoVMIN_VX_M2 */ 42760, /* PseudoVMIN_VX_M2_MASK */ 42765, /* PseudoVMIN_VX_M2_TU */ 42773, /* PseudoVMIN_VX_M4 */ 42779, /* PseudoVMIN_VX_M4_MASK */ 42784, /* PseudoVMIN_VX_M4_TU */ 42792, /* PseudoVMIN_VX_M8 */ 42798, /* PseudoVMIN_VX_M8_MASK */ 42803, /* PseudoVMIN_VX_M8_TU */ 42811, /* PseudoVMIN_VX_MF2 */ 42817, /* PseudoVMIN_VX_MF2_MASK */ 42822, /* PseudoVMIN_VX_MF2_TU */ 42830, /* PseudoVMIN_VX_MF4 */ 42836, /* PseudoVMIN_VX_MF4_MASK */ 42841, /* PseudoVMIN_VX_MF4_TU */ 42849, /* PseudoVMIN_VX_MF8 */ 42855, /* PseudoVMIN_VX_MF8_MASK */ 42860, /* PseudoVMIN_VX_MF8_TU */ 42868, /* PseudoVMNAND_MM_M1 */ 42874, /* PseudoVMNAND_MM_M2 */ 42879, /* PseudoVMNAND_MM_M4 */ 42884, /* PseudoVMNAND_MM_M8 */ 42889, /* PseudoVMNAND_MM_MF2 */ 42894, /* PseudoVMNAND_MM_MF4 */ 42899, /* PseudoVMNAND_MM_MF8 */ 42904, /* PseudoVMNOR_MM_M1 */ 42909, /* PseudoVMNOR_MM_M2 */ 42914, /* PseudoVMNOR_MM_M4 */ 42919, /* PseudoVMNOR_MM_M8 */ 42924, /* PseudoVMNOR_MM_MF2 */ 42929, /* PseudoVMNOR_MM_MF4 */ 42934, /* PseudoVMNOR_MM_MF8 */ 42939, /* PseudoVMORN_MM_M1 */ 42944, /* PseudoVMORN_MM_M2 */ 42949, /* PseudoVMORN_MM_M4 */ 42954, /* PseudoVMORN_MM_M8 */ 42959, /* PseudoVMORN_MM_MF2 */ 42964, /* PseudoVMORN_MM_MF4 */ 42969, /* PseudoVMORN_MM_MF8 */ 42974, /* PseudoVMOR_MM_M1 */ 42979, /* PseudoVMOR_MM_M2 */ 42984, /* PseudoVMOR_MM_M4 */ 42989, /* PseudoVMOR_MM_M8 */ 42994, /* PseudoVMOR_MM_MF2 */ 42999, /* PseudoVMOR_MM_MF4 */ 43004, /* PseudoVMOR_MM_MF8 */ 43009, /* PseudoVMSBC_VVM_M1 */ 43014, /* PseudoVMSBC_VVM_M2 */ 43020, /* PseudoVMSBC_VVM_M4 */ 43026, /* PseudoVMSBC_VVM_M8 */ 43032, /* PseudoVMSBC_VVM_MF2 */ 43038, /* PseudoVMSBC_VVM_MF4 */ 43044, /* PseudoVMSBC_VVM_MF8 */ 43050, /* PseudoVMSBC_VV_M1 */ 43056, /* PseudoVMSBC_VV_M2 */ 43061, /* PseudoVMSBC_VV_M4 */ 43066, /* PseudoVMSBC_VV_M8 */ 43071, /* PseudoVMSBC_VV_MF2 */ 43076, /* PseudoVMSBC_VV_MF4 */ 43081, /* PseudoVMSBC_VV_MF8 */ 43086, /* PseudoVMSBC_VXM_M1 */ 43091, /* PseudoVMSBC_VXM_M2 */ 43097, /* PseudoVMSBC_VXM_M4 */ 43103, /* PseudoVMSBC_VXM_M8 */ 43109, /* PseudoVMSBC_VXM_MF2 */ 43115, /* PseudoVMSBC_VXM_MF4 */ 43121, /* PseudoVMSBC_VXM_MF8 */ 43127, /* PseudoVMSBC_VX_M1 */ 43133, /* PseudoVMSBC_VX_M2 */ 43138, /* PseudoVMSBC_VX_M4 */ 43143, /* PseudoVMSBC_VX_M8 */ 43148, /* PseudoVMSBC_VX_MF2 */ 43153, /* PseudoVMSBC_VX_MF4 */ 43158, /* PseudoVMSBC_VX_MF8 */ 43163, /* PseudoVMSBF_M_B1 */ 43168, /* PseudoVMSBF_M_B16 */ 43172, /* PseudoVMSBF_M_B16_MASK */ 43176, /* PseudoVMSBF_M_B1_MASK */ 43182, /* PseudoVMSBF_M_B2 */ 43188, /* PseudoVMSBF_M_B2_MASK */ 43192, /* PseudoVMSBF_M_B32 */ 43198, /* PseudoVMSBF_M_B32_MASK */ 43202, /* PseudoVMSBF_M_B4 */ 43208, /* PseudoVMSBF_M_B4_MASK */ 43212, /* PseudoVMSBF_M_B64 */ 43218, /* PseudoVMSBF_M_B64_MASK */ 43222, /* PseudoVMSBF_M_B8 */ 43228, /* PseudoVMSBF_M_B8_MASK */ 43232, /* PseudoVMSEQ_VI_M1 */ 43238, /* PseudoVMSEQ_VI_M1_MASK */ 43243, /* PseudoVMSEQ_VI_M2 */ 43250, /* PseudoVMSEQ_VI_M2_MASK */ 43255, /* PseudoVMSEQ_VI_M4 */ 43262, /* PseudoVMSEQ_VI_M4_MASK */ 43267, /* PseudoVMSEQ_VI_M8 */ 43274, /* PseudoVMSEQ_VI_M8_MASK */ 43279, /* PseudoVMSEQ_VI_MF2 */ 43286, /* PseudoVMSEQ_VI_MF2_MASK */ 43291, /* PseudoVMSEQ_VI_MF4 */ 43298, /* PseudoVMSEQ_VI_MF4_MASK */ 43303, /* PseudoVMSEQ_VI_MF8 */ 43310, /* PseudoVMSEQ_VI_MF8_MASK */ 43315, /* PseudoVMSEQ_VV_M1 */ 43322, /* PseudoVMSEQ_VV_M1_MASK */ 43327, /* PseudoVMSEQ_VV_M2 */ 43334, /* PseudoVMSEQ_VV_M2_MASK */ 43339, /* PseudoVMSEQ_VV_M4 */ 43346, /* PseudoVMSEQ_VV_M4_MASK */ 43351, /* PseudoVMSEQ_VV_M8 */ 43358, /* PseudoVMSEQ_VV_M8_MASK */ 43363, /* PseudoVMSEQ_VV_MF2 */ 43370, /* PseudoVMSEQ_VV_MF2_MASK */ 43375, /* PseudoVMSEQ_VV_MF4 */ 43382, /* PseudoVMSEQ_VV_MF4_MASK */ 43387, /* PseudoVMSEQ_VV_MF8 */ 43394, /* PseudoVMSEQ_VV_MF8_MASK */ 43399, /* PseudoVMSEQ_VX_M1 */ 43406, /* PseudoVMSEQ_VX_M1_MASK */ 43411, /* PseudoVMSEQ_VX_M2 */ 43418, /* PseudoVMSEQ_VX_M2_MASK */ 43423, /* PseudoVMSEQ_VX_M4 */ 43430, /* PseudoVMSEQ_VX_M4_MASK */ 43435, /* PseudoVMSEQ_VX_M8 */ 43442, /* PseudoVMSEQ_VX_M8_MASK */ 43447, /* PseudoVMSEQ_VX_MF2 */ 43454, /* PseudoVMSEQ_VX_MF2_MASK */ 43459, /* PseudoVMSEQ_VX_MF4 */ 43466, /* PseudoVMSEQ_VX_MF4_MASK */ 43471, /* PseudoVMSEQ_VX_MF8 */ 43478, /* PseudoVMSEQ_VX_MF8_MASK */ 43483, /* PseudoVMSET_M_B1 */ 43490, /* PseudoVMSET_M_B16 */ 43493, /* PseudoVMSET_M_B2 */ 43496, /* PseudoVMSET_M_B32 */ 43499, /* PseudoVMSET_M_B4 */ 43502, /* PseudoVMSET_M_B64 */ 43505, /* PseudoVMSET_M_B8 */ 43508, /* PseudoVMSGEU_VI */ 43511, /* PseudoVMSGEU_VX */ 43515, /* PseudoVMSGEU_VX_M */ 43518, /* PseudoVMSGEU_VX_M_T */ 43522, /* PseudoVMSGE_VI */ 43527, /* PseudoVMSGE_VX */ 43531, /* PseudoVMSGE_VX_M */ 43534, /* PseudoVMSGE_VX_M_T */ 43538, /* PseudoVMSGTU_VI_M1 */ 43543, /* PseudoVMSGTU_VI_M1_MASK */ 43548, /* PseudoVMSGTU_VI_M2 */ 43555, /* PseudoVMSGTU_VI_M2_MASK */ 43560, /* PseudoVMSGTU_VI_M4 */ 43567, /* PseudoVMSGTU_VI_M4_MASK */ 43572, /* PseudoVMSGTU_VI_M8 */ 43579, /* PseudoVMSGTU_VI_M8_MASK */ 43584, /* PseudoVMSGTU_VI_MF2 */ 43591, /* PseudoVMSGTU_VI_MF2_MASK */ 43596, /* PseudoVMSGTU_VI_MF4 */ 43603, /* PseudoVMSGTU_VI_MF4_MASK */ 43608, /* PseudoVMSGTU_VI_MF8 */ 43615, /* PseudoVMSGTU_VI_MF8_MASK */ 43620, /* PseudoVMSGTU_VX_M1 */ 43627, /* PseudoVMSGTU_VX_M1_MASK */ 43632, /* PseudoVMSGTU_VX_M2 */ 43639, /* PseudoVMSGTU_VX_M2_MASK */ 43644, /* PseudoVMSGTU_VX_M4 */ 43651, /* PseudoVMSGTU_VX_M4_MASK */ 43656, /* PseudoVMSGTU_VX_M8 */ 43663, /* PseudoVMSGTU_VX_M8_MASK */ 43668, /* PseudoVMSGTU_VX_MF2 */ 43675, /* PseudoVMSGTU_VX_MF2_MASK */ 43680, /* PseudoVMSGTU_VX_MF4 */ 43687, /* PseudoVMSGTU_VX_MF4_MASK */ 43692, /* PseudoVMSGTU_VX_MF8 */ 43699, /* PseudoVMSGTU_VX_MF8_MASK */ 43704, /* PseudoVMSGT_VI_M1 */ 43711, /* PseudoVMSGT_VI_M1_MASK */ 43716, /* PseudoVMSGT_VI_M2 */ 43723, /* PseudoVMSGT_VI_M2_MASK */ 43728, /* PseudoVMSGT_VI_M4 */ 43735, /* PseudoVMSGT_VI_M4_MASK */ 43740, /* PseudoVMSGT_VI_M8 */ 43747, /* PseudoVMSGT_VI_M8_MASK */ 43752, /* PseudoVMSGT_VI_MF2 */ 43759, /* PseudoVMSGT_VI_MF2_MASK */ 43764, /* PseudoVMSGT_VI_MF4 */ 43771, /* PseudoVMSGT_VI_MF4_MASK */ 43776, /* PseudoVMSGT_VI_MF8 */ 43783, /* PseudoVMSGT_VI_MF8_MASK */ 43788, /* PseudoVMSGT_VX_M1 */ 43795, /* PseudoVMSGT_VX_M1_MASK */ 43800, /* PseudoVMSGT_VX_M2 */ 43807, /* PseudoVMSGT_VX_M2_MASK */ 43812, /* PseudoVMSGT_VX_M4 */ 43819, /* PseudoVMSGT_VX_M4_MASK */ 43824, /* PseudoVMSGT_VX_M8 */ 43831, /* PseudoVMSGT_VX_M8_MASK */ 43836, /* PseudoVMSGT_VX_MF2 */ 43843, /* PseudoVMSGT_VX_MF2_MASK */ 43848, /* PseudoVMSGT_VX_MF4 */ 43855, /* PseudoVMSGT_VX_MF4_MASK */ 43860, /* PseudoVMSGT_VX_MF8 */ 43867, /* PseudoVMSGT_VX_MF8_MASK */ 43872, /* PseudoVMSIF_M_B1 */ 43879, /* PseudoVMSIF_M_B16 */ 43883, /* PseudoVMSIF_M_B16_MASK */ 43887, /* PseudoVMSIF_M_B1_MASK */ 43893, /* PseudoVMSIF_M_B2 */ 43899, /* PseudoVMSIF_M_B2_MASK */ 43903, /* PseudoVMSIF_M_B32 */ 43909, /* PseudoVMSIF_M_B32_MASK */ 43913, /* PseudoVMSIF_M_B4 */ 43919, /* PseudoVMSIF_M_B4_MASK */ 43923, /* PseudoVMSIF_M_B64 */ 43929, /* PseudoVMSIF_M_B64_MASK */ 43933, /* PseudoVMSIF_M_B8 */ 43939, /* PseudoVMSIF_M_B8_MASK */ 43943, /* PseudoVMSLEU_VI_M1 */ 43949, /* PseudoVMSLEU_VI_M1_MASK */ 43954, /* PseudoVMSLEU_VI_M2 */ 43961, /* PseudoVMSLEU_VI_M2_MASK */ 43966, /* PseudoVMSLEU_VI_M4 */ 43973, /* PseudoVMSLEU_VI_M4_MASK */ 43978, /* PseudoVMSLEU_VI_M8 */ 43985, /* PseudoVMSLEU_VI_M8_MASK */ 43990, /* PseudoVMSLEU_VI_MF2 */ 43997, /* PseudoVMSLEU_VI_MF2_MASK */ 44002, /* PseudoVMSLEU_VI_MF4 */ 44009, /* PseudoVMSLEU_VI_MF4_MASK */ 44014, /* PseudoVMSLEU_VI_MF8 */ 44021, /* PseudoVMSLEU_VI_MF8_MASK */ 44026, /* PseudoVMSLEU_VV_M1 */ 44033, /* PseudoVMSLEU_VV_M1_MASK */ 44038, /* PseudoVMSLEU_VV_M2 */ 44045, /* PseudoVMSLEU_VV_M2_MASK */ 44050, /* PseudoVMSLEU_VV_M4 */ 44057, /* PseudoVMSLEU_VV_M4_MASK */ 44062, /* PseudoVMSLEU_VV_M8 */ 44069, /* PseudoVMSLEU_VV_M8_MASK */ 44074, /* PseudoVMSLEU_VV_MF2 */ 44081, /* PseudoVMSLEU_VV_MF2_MASK */ 44086, /* PseudoVMSLEU_VV_MF4 */ 44093, /* PseudoVMSLEU_VV_MF4_MASK */ 44098, /* PseudoVMSLEU_VV_MF8 */ 44105, /* PseudoVMSLEU_VV_MF8_MASK */ 44110, /* PseudoVMSLEU_VX_M1 */ 44117, /* PseudoVMSLEU_VX_M1_MASK */ 44122, /* PseudoVMSLEU_VX_M2 */ 44129, /* PseudoVMSLEU_VX_M2_MASK */ 44134, /* PseudoVMSLEU_VX_M4 */ 44141, /* PseudoVMSLEU_VX_M4_MASK */ 44146, /* PseudoVMSLEU_VX_M8 */ 44153, /* PseudoVMSLEU_VX_M8_MASK */ 44158, /* PseudoVMSLEU_VX_MF2 */ 44165, /* PseudoVMSLEU_VX_MF2_MASK */ 44170, /* PseudoVMSLEU_VX_MF4 */ 44177, /* PseudoVMSLEU_VX_MF4_MASK */ 44182, /* PseudoVMSLEU_VX_MF8 */ 44189, /* PseudoVMSLEU_VX_MF8_MASK */ 44194, /* PseudoVMSLE_VI_M1 */ 44201, /* PseudoVMSLE_VI_M1_MASK */ 44206, /* PseudoVMSLE_VI_M2 */ 44213, /* PseudoVMSLE_VI_M2_MASK */ 44218, /* PseudoVMSLE_VI_M4 */ 44225, /* PseudoVMSLE_VI_M4_MASK */ 44230, /* PseudoVMSLE_VI_M8 */ 44237, /* PseudoVMSLE_VI_M8_MASK */ 44242, /* PseudoVMSLE_VI_MF2 */ 44249, /* PseudoVMSLE_VI_MF2_MASK */ 44254, /* PseudoVMSLE_VI_MF4 */ 44261, /* PseudoVMSLE_VI_MF4_MASK */ 44266, /* PseudoVMSLE_VI_MF8 */ 44273, /* PseudoVMSLE_VI_MF8_MASK */ 44278, /* PseudoVMSLE_VV_M1 */ 44285, /* PseudoVMSLE_VV_M1_MASK */ 44290, /* PseudoVMSLE_VV_M2 */ 44297, /* PseudoVMSLE_VV_M2_MASK */ 44302, /* PseudoVMSLE_VV_M4 */ 44309, /* PseudoVMSLE_VV_M4_MASK */ 44314, /* PseudoVMSLE_VV_M8 */ 44321, /* PseudoVMSLE_VV_M8_MASK */ 44326, /* PseudoVMSLE_VV_MF2 */ 44333, /* PseudoVMSLE_VV_MF2_MASK */ 44338, /* PseudoVMSLE_VV_MF4 */ 44345, /* PseudoVMSLE_VV_MF4_MASK */ 44350, /* PseudoVMSLE_VV_MF8 */ 44357, /* PseudoVMSLE_VV_MF8_MASK */ 44362, /* PseudoVMSLE_VX_M1 */ 44369, /* PseudoVMSLE_VX_M1_MASK */ 44374, /* PseudoVMSLE_VX_M2 */ 44381, /* PseudoVMSLE_VX_M2_MASK */ 44386, /* PseudoVMSLE_VX_M4 */ 44393, /* PseudoVMSLE_VX_M4_MASK */ 44398, /* PseudoVMSLE_VX_M8 */ 44405, /* PseudoVMSLE_VX_M8_MASK */ 44410, /* PseudoVMSLE_VX_MF2 */ 44417, /* PseudoVMSLE_VX_MF2_MASK */ 44422, /* PseudoVMSLE_VX_MF4 */ 44429, /* PseudoVMSLE_VX_MF4_MASK */ 44434, /* PseudoVMSLE_VX_MF8 */ 44441, /* PseudoVMSLE_VX_MF8_MASK */ 44446, /* PseudoVMSLTU_VI */ 44453, /* PseudoVMSLTU_VV_M1 */ 44457, /* PseudoVMSLTU_VV_M1_MASK */ 44462, /* PseudoVMSLTU_VV_M2 */ 44469, /* PseudoVMSLTU_VV_M2_MASK */ 44474, /* PseudoVMSLTU_VV_M4 */ 44481, /* PseudoVMSLTU_VV_M4_MASK */ 44486, /* PseudoVMSLTU_VV_M8 */ 44493, /* PseudoVMSLTU_VV_M8_MASK */ 44498, /* PseudoVMSLTU_VV_MF2 */ 44505, /* PseudoVMSLTU_VV_MF2_MASK */ 44510, /* PseudoVMSLTU_VV_MF4 */ 44517, /* PseudoVMSLTU_VV_MF4_MASK */ 44522, /* PseudoVMSLTU_VV_MF8 */ 44529, /* PseudoVMSLTU_VV_MF8_MASK */ 44534, /* PseudoVMSLTU_VX_M1 */ 44541, /* PseudoVMSLTU_VX_M1_MASK */ 44546, /* PseudoVMSLTU_VX_M2 */ 44553, /* PseudoVMSLTU_VX_M2_MASK */ 44558, /* PseudoVMSLTU_VX_M4 */ 44565, /* PseudoVMSLTU_VX_M4_MASK */ 44570, /* PseudoVMSLTU_VX_M8 */ 44577, /* PseudoVMSLTU_VX_M8_MASK */ 44582, /* PseudoVMSLTU_VX_MF2 */ 44589, /* PseudoVMSLTU_VX_MF2_MASK */ 44594, /* PseudoVMSLTU_VX_MF4 */ 44601, /* PseudoVMSLTU_VX_MF4_MASK */ 44606, /* PseudoVMSLTU_VX_MF8 */ 44613, /* PseudoVMSLTU_VX_MF8_MASK */ 44618, /* PseudoVMSLT_VI */ 44625, /* PseudoVMSLT_VV_M1 */ 44629, /* PseudoVMSLT_VV_M1_MASK */ 44634, /* PseudoVMSLT_VV_M2 */ 44641, /* PseudoVMSLT_VV_M2_MASK */ 44646, /* PseudoVMSLT_VV_M4 */ 44653, /* PseudoVMSLT_VV_M4_MASK */ 44658, /* PseudoVMSLT_VV_M8 */ 44665, /* PseudoVMSLT_VV_M8_MASK */ 44670, /* PseudoVMSLT_VV_MF2 */ 44677, /* PseudoVMSLT_VV_MF2_MASK */ 44682, /* PseudoVMSLT_VV_MF4 */ 44689, /* PseudoVMSLT_VV_MF4_MASK */ 44694, /* PseudoVMSLT_VV_MF8 */ 44701, /* PseudoVMSLT_VV_MF8_MASK */ 44706, /* PseudoVMSLT_VX_M1 */ 44713, /* PseudoVMSLT_VX_M1_MASK */ 44718, /* PseudoVMSLT_VX_M2 */ 44725, /* PseudoVMSLT_VX_M2_MASK */ 44730, /* PseudoVMSLT_VX_M4 */ 44737, /* PseudoVMSLT_VX_M4_MASK */ 44742, /* PseudoVMSLT_VX_M8 */ 44749, /* PseudoVMSLT_VX_M8_MASK */ 44754, /* PseudoVMSLT_VX_MF2 */ 44761, /* PseudoVMSLT_VX_MF2_MASK */ 44766, /* PseudoVMSLT_VX_MF4 */ 44773, /* PseudoVMSLT_VX_MF4_MASK */ 44778, /* PseudoVMSLT_VX_MF8 */ 44785, /* PseudoVMSLT_VX_MF8_MASK */ 44790, /* PseudoVMSNE_VI_M1 */ 44797, /* PseudoVMSNE_VI_M1_MASK */ 44802, /* PseudoVMSNE_VI_M2 */ 44809, /* PseudoVMSNE_VI_M2_MASK */ 44814, /* PseudoVMSNE_VI_M4 */ 44821, /* PseudoVMSNE_VI_M4_MASK */ 44826, /* PseudoVMSNE_VI_M8 */ 44833, /* PseudoVMSNE_VI_M8_MASK */ 44838, /* PseudoVMSNE_VI_MF2 */ 44845, /* PseudoVMSNE_VI_MF2_MASK */ 44850, /* PseudoVMSNE_VI_MF4 */ 44857, /* PseudoVMSNE_VI_MF4_MASK */ 44862, /* PseudoVMSNE_VI_MF8 */ 44869, /* PseudoVMSNE_VI_MF8_MASK */ 44874, /* PseudoVMSNE_VV_M1 */ 44881, /* PseudoVMSNE_VV_M1_MASK */ 44886, /* PseudoVMSNE_VV_M2 */ 44893, /* PseudoVMSNE_VV_M2_MASK */ 44898, /* PseudoVMSNE_VV_M4 */ 44905, /* PseudoVMSNE_VV_M4_MASK */ 44910, /* PseudoVMSNE_VV_M8 */ 44917, /* PseudoVMSNE_VV_M8_MASK */ 44922, /* PseudoVMSNE_VV_MF2 */ 44929, /* PseudoVMSNE_VV_MF2_MASK */ 44934, /* PseudoVMSNE_VV_MF4 */ 44941, /* PseudoVMSNE_VV_MF4_MASK */ 44946, /* PseudoVMSNE_VV_MF8 */ 44953, /* PseudoVMSNE_VV_MF8_MASK */ 44958, /* PseudoVMSNE_VX_M1 */ 44965, /* PseudoVMSNE_VX_M1_MASK */ 44970, /* PseudoVMSNE_VX_M2 */ 44977, /* PseudoVMSNE_VX_M2_MASK */ 44982, /* PseudoVMSNE_VX_M4 */ 44989, /* PseudoVMSNE_VX_M4_MASK */ 44994, /* PseudoVMSNE_VX_M8 */ 45001, /* PseudoVMSNE_VX_M8_MASK */ 45006, /* PseudoVMSNE_VX_MF2 */ 45013, /* PseudoVMSNE_VX_MF2_MASK */ 45018, /* PseudoVMSNE_VX_MF4 */ 45025, /* PseudoVMSNE_VX_MF4_MASK */ 45030, /* PseudoVMSNE_VX_MF8 */ 45037, /* PseudoVMSNE_VX_MF8_MASK */ 45042, /* PseudoVMSOF_M_B1 */ 45049, /* PseudoVMSOF_M_B16 */ 45053, /* PseudoVMSOF_M_B16_MASK */ 45057, /* PseudoVMSOF_M_B1_MASK */ 45063, /* PseudoVMSOF_M_B2 */ 45069, /* PseudoVMSOF_M_B2_MASK */ 45073, /* PseudoVMSOF_M_B32 */ 45079, /* PseudoVMSOF_M_B32_MASK */ 45083, /* PseudoVMSOF_M_B4 */ 45089, /* PseudoVMSOF_M_B4_MASK */ 45093, /* PseudoVMSOF_M_B64 */ 45099, /* PseudoVMSOF_M_B64_MASK */ 45103, /* PseudoVMSOF_M_B8 */ 45109, /* PseudoVMSOF_M_B8_MASK */ 45113, /* PseudoVMULHSU_VV_M1 */ 45119, /* PseudoVMULHSU_VV_M1_MASK */ 45124, /* PseudoVMULHSU_VV_M1_TU */ 45132, /* PseudoVMULHSU_VV_M2 */ 45138, /* PseudoVMULHSU_VV_M2_MASK */ 45143, /* PseudoVMULHSU_VV_M2_TU */ 45151, /* PseudoVMULHSU_VV_M4 */ 45157, /* PseudoVMULHSU_VV_M4_MASK */ 45162, /* PseudoVMULHSU_VV_M4_TU */ 45170, /* PseudoVMULHSU_VV_M8 */ 45176, /* PseudoVMULHSU_VV_M8_MASK */ 45181, /* PseudoVMULHSU_VV_M8_TU */ 45189, /* PseudoVMULHSU_VV_MF2 */ 45195, /* PseudoVMULHSU_VV_MF2_MASK */ 45200, /* PseudoVMULHSU_VV_MF2_TU */ 45208, /* PseudoVMULHSU_VV_MF4 */ 45214, /* PseudoVMULHSU_VV_MF4_MASK */ 45219, /* PseudoVMULHSU_VV_MF4_TU */ 45227, /* PseudoVMULHSU_VV_MF8 */ 45233, /* PseudoVMULHSU_VV_MF8_MASK */ 45238, /* PseudoVMULHSU_VV_MF8_TU */ 45246, /* PseudoVMULHSU_VX_M1 */ 45252, /* PseudoVMULHSU_VX_M1_MASK */ 45257, /* PseudoVMULHSU_VX_M1_TU */ 45265, /* PseudoVMULHSU_VX_M2 */ 45271, /* PseudoVMULHSU_VX_M2_MASK */ 45276, /* PseudoVMULHSU_VX_M2_TU */ 45284, /* PseudoVMULHSU_VX_M4 */ 45290, /* PseudoVMULHSU_VX_M4_MASK */ 45295, /* PseudoVMULHSU_VX_M4_TU */ 45303, /* PseudoVMULHSU_VX_M8 */ 45309, /* PseudoVMULHSU_VX_M8_MASK */ 45314, /* PseudoVMULHSU_VX_M8_TU */ 45322, /* PseudoVMULHSU_VX_MF2 */ 45328, /* PseudoVMULHSU_VX_MF2_MASK */ 45333, /* PseudoVMULHSU_VX_MF2_TU */ 45341, /* PseudoVMULHSU_VX_MF4 */ 45347, /* PseudoVMULHSU_VX_MF4_MASK */ 45352, /* PseudoVMULHSU_VX_MF4_TU */ 45360, /* PseudoVMULHSU_VX_MF8 */ 45366, /* PseudoVMULHSU_VX_MF8_MASK */ 45371, /* PseudoVMULHSU_VX_MF8_TU */ 45379, /* PseudoVMULHU_VV_M1 */ 45385, /* PseudoVMULHU_VV_M1_MASK */ 45390, /* PseudoVMULHU_VV_M1_TU */ 45398, /* PseudoVMULHU_VV_M2 */ 45404, /* PseudoVMULHU_VV_M2_MASK */ 45409, /* PseudoVMULHU_VV_M2_TU */ 45417, /* PseudoVMULHU_VV_M4 */ 45423, /* PseudoVMULHU_VV_M4_MASK */ 45428, /* PseudoVMULHU_VV_M4_TU */ 45436, /* PseudoVMULHU_VV_M8 */ 45442, /* PseudoVMULHU_VV_M8_MASK */ 45447, /* PseudoVMULHU_VV_M8_TU */ 45455, /* PseudoVMULHU_VV_MF2 */ 45461, /* PseudoVMULHU_VV_MF2_MASK */ 45466, /* PseudoVMULHU_VV_MF2_TU */ 45474, /* PseudoVMULHU_VV_MF4 */ 45480, /* PseudoVMULHU_VV_MF4_MASK */ 45485, /* PseudoVMULHU_VV_MF4_TU */ 45493, /* PseudoVMULHU_VV_MF8 */ 45499, /* PseudoVMULHU_VV_MF8_MASK */ 45504, /* PseudoVMULHU_VV_MF8_TU */ 45512, /* PseudoVMULHU_VX_M1 */ 45518, /* PseudoVMULHU_VX_M1_MASK */ 45523, /* PseudoVMULHU_VX_M1_TU */ 45531, /* PseudoVMULHU_VX_M2 */ 45537, /* PseudoVMULHU_VX_M2_MASK */ 45542, /* PseudoVMULHU_VX_M2_TU */ 45550, /* PseudoVMULHU_VX_M4 */ 45556, /* PseudoVMULHU_VX_M4_MASK */ 45561, /* PseudoVMULHU_VX_M4_TU */ 45569, /* PseudoVMULHU_VX_M8 */ 45575, /* PseudoVMULHU_VX_M8_MASK */ 45580, /* PseudoVMULHU_VX_M8_TU */ 45588, /* PseudoVMULHU_VX_MF2 */ 45594, /* PseudoVMULHU_VX_MF2_MASK */ 45599, /* PseudoVMULHU_VX_MF2_TU */ 45607, /* PseudoVMULHU_VX_MF4 */ 45613, /* PseudoVMULHU_VX_MF4_MASK */ 45618, /* PseudoVMULHU_VX_MF4_TU */ 45626, /* PseudoVMULHU_VX_MF8 */ 45632, /* PseudoVMULHU_VX_MF8_MASK */ 45637, /* PseudoVMULHU_VX_MF8_TU */ 45645, /* PseudoVMULH_VV_M1 */ 45651, /* PseudoVMULH_VV_M1_MASK */ 45656, /* PseudoVMULH_VV_M1_TU */ 45664, /* PseudoVMULH_VV_M2 */ 45670, /* PseudoVMULH_VV_M2_MASK */ 45675, /* PseudoVMULH_VV_M2_TU */ 45683, /* PseudoVMULH_VV_M4 */ 45689, /* PseudoVMULH_VV_M4_MASK */ 45694, /* PseudoVMULH_VV_M4_TU */ 45702, /* PseudoVMULH_VV_M8 */ 45708, /* PseudoVMULH_VV_M8_MASK */ 45713, /* PseudoVMULH_VV_M8_TU */ 45721, /* PseudoVMULH_VV_MF2 */ 45727, /* PseudoVMULH_VV_MF2_MASK */ 45732, /* PseudoVMULH_VV_MF2_TU */ 45740, /* PseudoVMULH_VV_MF4 */ 45746, /* PseudoVMULH_VV_MF4_MASK */ 45751, /* PseudoVMULH_VV_MF4_TU */ 45759, /* PseudoVMULH_VV_MF8 */ 45765, /* PseudoVMULH_VV_MF8_MASK */ 45770, /* PseudoVMULH_VV_MF8_TU */ 45778, /* PseudoVMULH_VX_M1 */ 45784, /* PseudoVMULH_VX_M1_MASK */ 45789, /* PseudoVMULH_VX_M1_TU */ 45797, /* PseudoVMULH_VX_M2 */ 45803, /* PseudoVMULH_VX_M2_MASK */ 45808, /* PseudoVMULH_VX_M2_TU */ 45816, /* PseudoVMULH_VX_M4 */ 45822, /* PseudoVMULH_VX_M4_MASK */ 45827, /* PseudoVMULH_VX_M4_TU */ 45835, /* PseudoVMULH_VX_M8 */ 45841, /* PseudoVMULH_VX_M8_MASK */ 45846, /* PseudoVMULH_VX_M8_TU */ 45854, /* PseudoVMULH_VX_MF2 */ 45860, /* PseudoVMULH_VX_MF2_MASK */ 45865, /* PseudoVMULH_VX_MF2_TU */ 45873, /* PseudoVMULH_VX_MF4 */ 45879, /* PseudoVMULH_VX_MF4_MASK */ 45884, /* PseudoVMULH_VX_MF4_TU */ 45892, /* PseudoVMULH_VX_MF8 */ 45898, /* PseudoVMULH_VX_MF8_MASK */ 45903, /* PseudoVMULH_VX_MF8_TU */ 45911, /* PseudoVMUL_VV_M1 */ 45917, /* PseudoVMUL_VV_M1_MASK */ 45922, /* PseudoVMUL_VV_M1_TU */ 45930, /* PseudoVMUL_VV_M2 */ 45936, /* PseudoVMUL_VV_M2_MASK */ 45941, /* PseudoVMUL_VV_M2_TU */ 45949, /* PseudoVMUL_VV_M4 */ 45955, /* PseudoVMUL_VV_M4_MASK */ 45960, /* PseudoVMUL_VV_M4_TU */ 45968, /* PseudoVMUL_VV_M8 */ 45974, /* PseudoVMUL_VV_M8_MASK */ 45979, /* PseudoVMUL_VV_M8_TU */ 45987, /* PseudoVMUL_VV_MF2 */ 45993, /* PseudoVMUL_VV_MF2_MASK */ 45998, /* PseudoVMUL_VV_MF2_TU */ 46006, /* PseudoVMUL_VV_MF4 */ 46012, /* PseudoVMUL_VV_MF4_MASK */ 46017, /* PseudoVMUL_VV_MF4_TU */ 46025, /* PseudoVMUL_VV_MF8 */ 46031, /* PseudoVMUL_VV_MF8_MASK */ 46036, /* PseudoVMUL_VV_MF8_TU */ 46044, /* PseudoVMUL_VX_M1 */ 46050, /* PseudoVMUL_VX_M1_MASK */ 46055, /* PseudoVMUL_VX_M1_TU */ 46063, /* PseudoVMUL_VX_M2 */ 46069, /* PseudoVMUL_VX_M2_MASK */ 46074, /* PseudoVMUL_VX_M2_TU */ 46082, /* PseudoVMUL_VX_M4 */ 46088, /* PseudoVMUL_VX_M4_MASK */ 46093, /* PseudoVMUL_VX_M4_TU */ 46101, /* PseudoVMUL_VX_M8 */ 46107, /* PseudoVMUL_VX_M8_MASK */ 46112, /* PseudoVMUL_VX_M8_TU */ 46120, /* PseudoVMUL_VX_MF2 */ 46126, /* PseudoVMUL_VX_MF2_MASK */ 46131, /* PseudoVMUL_VX_MF2_TU */ 46139, /* PseudoVMUL_VX_MF4 */ 46145, /* PseudoVMUL_VX_MF4_MASK */ 46150, /* PseudoVMUL_VX_MF4_TU */ 46158, /* PseudoVMUL_VX_MF8 */ 46164, /* PseudoVMUL_VX_MF8_MASK */ 46169, /* PseudoVMUL_VX_MF8_TU */ 46177, /* PseudoVMV_S_X_M1 */ 46183, /* PseudoVMV_S_X_M2 */ 46188, /* PseudoVMV_S_X_M4 */ 46193, /* PseudoVMV_S_X_M8 */ 46198, /* PseudoVMV_S_X_MF2 */ 46203, /* PseudoVMV_S_X_MF4 */ 46208, /* PseudoVMV_S_X_MF8 */ 46213, /* PseudoVMV_V_I_M1 */ 46218, /* PseudoVMV_V_I_M1_TU */ 46222, /* PseudoVMV_V_I_M2 */ 46227, /* PseudoVMV_V_I_M2_TU */ 46231, /* PseudoVMV_V_I_M4 */ 46236, /* PseudoVMV_V_I_M4_TU */ 46240, /* PseudoVMV_V_I_M8 */ 46245, /* PseudoVMV_V_I_M8_TU */ 46249, /* PseudoVMV_V_I_MF2 */ 46254, /* PseudoVMV_V_I_MF2_TU */ 46258, /* PseudoVMV_V_I_MF4 */ 46263, /* PseudoVMV_V_I_MF4_TU */ 46267, /* PseudoVMV_V_I_MF8 */ 46272, /* PseudoVMV_V_I_MF8_TU */ 46276, /* PseudoVMV_V_V_M1 */ 46281, /* PseudoVMV_V_V_M1_TU */ 46285, /* PseudoVMV_V_V_M2 */ 46290, /* PseudoVMV_V_V_M2_TU */ 46294, /* PseudoVMV_V_V_M4 */ 46299, /* PseudoVMV_V_V_M4_TU */ 46303, /* PseudoVMV_V_V_M8 */ 46308, /* PseudoVMV_V_V_M8_TU */ 46312, /* PseudoVMV_V_V_MF2 */ 46317, /* PseudoVMV_V_V_MF2_TU */ 46321, /* PseudoVMV_V_V_MF4 */ 46326, /* PseudoVMV_V_V_MF4_TU */ 46330, /* PseudoVMV_V_V_MF8 */ 46335, /* PseudoVMV_V_V_MF8_TU */ 46339, /* PseudoVMV_V_X_M1 */ 46344, /* PseudoVMV_V_X_M1_TU */ 46348, /* PseudoVMV_V_X_M2 */ 46353, /* PseudoVMV_V_X_M2_TU */ 46357, /* PseudoVMV_V_X_M4 */ 46362, /* PseudoVMV_V_X_M4_TU */ 46366, /* PseudoVMV_V_X_M8 */ 46371, /* PseudoVMV_V_X_M8_TU */ 46375, /* PseudoVMV_V_X_MF2 */ 46380, /* PseudoVMV_V_X_MF2_TU */ 46384, /* PseudoVMV_V_X_MF4 */ 46389, /* PseudoVMV_V_X_MF4_TU */ 46393, /* PseudoVMV_V_X_MF8 */ 46398, /* PseudoVMV_V_X_MF8_TU */ 46402, /* PseudoVMV_X_S_M1 */ 46407, /* PseudoVMV_X_S_M2 */ 46410, /* PseudoVMV_X_S_M4 */ 46413, /* PseudoVMV_X_S_M8 */ 46416, /* PseudoVMV_X_S_MF2 */ 46419, /* PseudoVMV_X_S_MF4 */ 46422, /* PseudoVMV_X_S_MF8 */ 46425, /* PseudoVMXNOR_MM_M1 */ 46428, /* PseudoVMXNOR_MM_M2 */ 46433, /* PseudoVMXNOR_MM_M4 */ 46438, /* PseudoVMXNOR_MM_M8 */ 46443, /* PseudoVMXNOR_MM_MF2 */ 46448, /* PseudoVMXNOR_MM_MF4 */ 46453, /* PseudoVMXNOR_MM_MF8 */ 46458, /* PseudoVMXOR_MM_M1 */ 46463, /* PseudoVMXOR_MM_M2 */ 46468, /* PseudoVMXOR_MM_M4 */ 46473, /* PseudoVMXOR_MM_M8 */ 46478, /* PseudoVMXOR_MM_MF2 */ 46483, /* PseudoVMXOR_MM_MF4 */ 46488, /* PseudoVMXOR_MM_MF8 */ 46493, /* PseudoVNCLIPU_WI_M1 */ 46498, /* PseudoVNCLIPU_WI_M1_MASK */ 46503, /* PseudoVNCLIPU_WI_M1_TU */ 46511, /* PseudoVNCLIPU_WI_M2 */ 46517, /* PseudoVNCLIPU_WI_M2_MASK */ 46522, /* PseudoVNCLIPU_WI_M2_TU */ 46530, /* PseudoVNCLIPU_WI_M4 */ 46536, /* PseudoVNCLIPU_WI_M4_MASK */ 46541, /* PseudoVNCLIPU_WI_M4_TU */ 46549, /* PseudoVNCLIPU_WI_MF2 */ 46555, /* PseudoVNCLIPU_WI_MF2_MASK */ 46560, /* PseudoVNCLIPU_WI_MF2_TU */ 46568, /* PseudoVNCLIPU_WI_MF4 */ 46574, /* PseudoVNCLIPU_WI_MF4_MASK */ 46579, /* PseudoVNCLIPU_WI_MF4_TU */ 46587, /* PseudoVNCLIPU_WI_MF8 */ 46593, /* PseudoVNCLIPU_WI_MF8_MASK */ 46598, /* PseudoVNCLIPU_WI_MF8_TU */ 46606, /* PseudoVNCLIPU_WV_M1 */ 46612, /* PseudoVNCLIPU_WV_M1_MASK */ 46617, /* PseudoVNCLIPU_WV_M1_TU */ 46625, /* PseudoVNCLIPU_WV_M2 */ 46631, /* PseudoVNCLIPU_WV_M2_MASK */ 46636, /* PseudoVNCLIPU_WV_M2_TU */ 46644, /* PseudoVNCLIPU_WV_M4 */ 46650, /* PseudoVNCLIPU_WV_M4_MASK */ 46655, /* PseudoVNCLIPU_WV_M4_TU */ 46663, /* PseudoVNCLIPU_WV_MF2 */ 46669, /* PseudoVNCLIPU_WV_MF2_MASK */ 46674, /* PseudoVNCLIPU_WV_MF2_TU */ 46682, /* PseudoVNCLIPU_WV_MF4 */ 46688, /* PseudoVNCLIPU_WV_MF4_MASK */ 46693, /* PseudoVNCLIPU_WV_MF4_TU */ 46701, /* PseudoVNCLIPU_WV_MF8 */ 46707, /* PseudoVNCLIPU_WV_MF8_MASK */ 46712, /* PseudoVNCLIPU_WV_MF8_TU */ 46720, /* PseudoVNCLIPU_WX_M1 */ 46726, /* PseudoVNCLIPU_WX_M1_MASK */ 46731, /* PseudoVNCLIPU_WX_M1_TU */ 46739, /* PseudoVNCLIPU_WX_M2 */ 46745, /* PseudoVNCLIPU_WX_M2_MASK */ 46750, /* PseudoVNCLIPU_WX_M2_TU */ 46758, /* PseudoVNCLIPU_WX_M4 */ 46764, /* PseudoVNCLIPU_WX_M4_MASK */ 46769, /* PseudoVNCLIPU_WX_M4_TU */ 46777, /* PseudoVNCLIPU_WX_MF2 */ 46783, /* PseudoVNCLIPU_WX_MF2_MASK */ 46788, /* PseudoVNCLIPU_WX_MF2_TU */ 46796, /* PseudoVNCLIPU_WX_MF4 */ 46802, /* PseudoVNCLIPU_WX_MF4_MASK */ 46807, /* PseudoVNCLIPU_WX_MF4_TU */ 46815, /* PseudoVNCLIPU_WX_MF8 */ 46821, /* PseudoVNCLIPU_WX_MF8_MASK */ 46826, /* PseudoVNCLIPU_WX_MF8_TU */ 46834, /* PseudoVNCLIP_WI_M1 */ 46840, /* PseudoVNCLIP_WI_M1_MASK */ 46845, /* PseudoVNCLIP_WI_M1_TU */ 46853, /* PseudoVNCLIP_WI_M2 */ 46859, /* PseudoVNCLIP_WI_M2_MASK */ 46864, /* PseudoVNCLIP_WI_M2_TU */ 46872, /* PseudoVNCLIP_WI_M4 */ 46878, /* PseudoVNCLIP_WI_M4_MASK */ 46883, /* PseudoVNCLIP_WI_M4_TU */ 46891, /* PseudoVNCLIP_WI_MF2 */ 46897, /* PseudoVNCLIP_WI_MF2_MASK */ 46902, /* PseudoVNCLIP_WI_MF2_TU */ 46910, /* PseudoVNCLIP_WI_MF4 */ 46916, /* PseudoVNCLIP_WI_MF4_MASK */ 46921, /* PseudoVNCLIP_WI_MF4_TU */ 46929, /* PseudoVNCLIP_WI_MF8 */ 46935, /* PseudoVNCLIP_WI_MF8_MASK */ 46940, /* PseudoVNCLIP_WI_MF8_TU */ 46948, /* PseudoVNCLIP_WV_M1 */ 46954, /* PseudoVNCLIP_WV_M1_MASK */ 46959, /* PseudoVNCLIP_WV_M1_TU */ 46967, /* PseudoVNCLIP_WV_M2 */ 46973, /* PseudoVNCLIP_WV_M2_MASK */ 46978, /* PseudoVNCLIP_WV_M2_TU */ 46986, /* PseudoVNCLIP_WV_M4 */ 46992, /* PseudoVNCLIP_WV_M4_MASK */ 46997, /* PseudoVNCLIP_WV_M4_TU */ 47005, /* PseudoVNCLIP_WV_MF2 */ 47011, /* PseudoVNCLIP_WV_MF2_MASK */ 47016, /* PseudoVNCLIP_WV_MF2_TU */ 47024, /* PseudoVNCLIP_WV_MF4 */ 47030, /* PseudoVNCLIP_WV_MF4_MASK */ 47035, /* PseudoVNCLIP_WV_MF4_TU */ 47043, /* PseudoVNCLIP_WV_MF8 */ 47049, /* PseudoVNCLIP_WV_MF8_MASK */ 47054, /* PseudoVNCLIP_WV_MF8_TU */ 47062, /* PseudoVNCLIP_WX_M1 */ 47068, /* PseudoVNCLIP_WX_M1_MASK */ 47073, /* PseudoVNCLIP_WX_M1_TU */ 47081, /* PseudoVNCLIP_WX_M2 */ 47087, /* PseudoVNCLIP_WX_M2_MASK */ 47092, /* PseudoVNCLIP_WX_M2_TU */ 47100, /* PseudoVNCLIP_WX_M4 */ 47106, /* PseudoVNCLIP_WX_M4_MASK */ 47111, /* PseudoVNCLIP_WX_M4_TU */ 47119, /* PseudoVNCLIP_WX_MF2 */ 47125, /* PseudoVNCLIP_WX_MF2_MASK */ 47130, /* PseudoVNCLIP_WX_MF2_TU */ 47138, /* PseudoVNCLIP_WX_MF4 */ 47144, /* PseudoVNCLIP_WX_MF4_MASK */ 47149, /* PseudoVNCLIP_WX_MF4_TU */ 47157, /* PseudoVNCLIP_WX_MF8 */ 47163, /* PseudoVNCLIP_WX_MF8_MASK */ 47168, /* PseudoVNCLIP_WX_MF8_TU */ 47176, /* PseudoVNMSAC_VV_M1 */ 47182, /* PseudoVNMSAC_VV_M1_MASK */ 47189, /* PseudoVNMSAC_VV_M2 */ 47197, /* PseudoVNMSAC_VV_M2_MASK */ 47204, /* PseudoVNMSAC_VV_M4 */ 47212, /* PseudoVNMSAC_VV_M4_MASK */ 47219, /* PseudoVNMSAC_VV_M8 */ 47227, /* PseudoVNMSAC_VV_M8_MASK */ 47234, /* PseudoVNMSAC_VV_MF2 */ 47242, /* PseudoVNMSAC_VV_MF2_MASK */ 47249, /* PseudoVNMSAC_VV_MF4 */ 47257, /* PseudoVNMSAC_VV_MF4_MASK */ 47264, /* PseudoVNMSAC_VV_MF8 */ 47272, /* PseudoVNMSAC_VV_MF8_MASK */ 47279, /* PseudoVNMSAC_VX_M1 */ 47287, /* PseudoVNMSAC_VX_M1_MASK */ 47294, /* PseudoVNMSAC_VX_M2 */ 47302, /* PseudoVNMSAC_VX_M2_MASK */ 47309, /* PseudoVNMSAC_VX_M4 */ 47317, /* PseudoVNMSAC_VX_M4_MASK */ 47324, /* PseudoVNMSAC_VX_M8 */ 47332, /* PseudoVNMSAC_VX_M8_MASK */ 47339, /* PseudoVNMSAC_VX_MF2 */ 47347, /* PseudoVNMSAC_VX_MF2_MASK */ 47354, /* PseudoVNMSAC_VX_MF4 */ 47362, /* PseudoVNMSAC_VX_MF4_MASK */ 47369, /* PseudoVNMSAC_VX_MF8 */ 47377, /* PseudoVNMSAC_VX_MF8_MASK */ 47384, /* PseudoVNMSUB_VV_M1 */ 47392, /* PseudoVNMSUB_VV_M1_MASK */ 47399, /* PseudoVNMSUB_VV_M2 */ 47407, /* PseudoVNMSUB_VV_M2_MASK */ 47414, /* PseudoVNMSUB_VV_M4 */ 47422, /* PseudoVNMSUB_VV_M4_MASK */ 47429, /* PseudoVNMSUB_VV_M8 */ 47437, /* PseudoVNMSUB_VV_M8_MASK */ 47444, /* PseudoVNMSUB_VV_MF2 */ 47452, /* PseudoVNMSUB_VV_MF2_MASK */ 47459, /* PseudoVNMSUB_VV_MF4 */ 47467, /* PseudoVNMSUB_VV_MF4_MASK */ 47474, /* PseudoVNMSUB_VV_MF8 */ 47482, /* PseudoVNMSUB_VV_MF8_MASK */ 47489, /* PseudoVNMSUB_VX_M1 */ 47497, /* PseudoVNMSUB_VX_M1_MASK */ 47504, /* PseudoVNMSUB_VX_M2 */ 47512, /* PseudoVNMSUB_VX_M2_MASK */ 47519, /* PseudoVNMSUB_VX_M4 */ 47527, /* PseudoVNMSUB_VX_M4_MASK */ 47534, /* PseudoVNMSUB_VX_M8 */ 47542, /* PseudoVNMSUB_VX_M8_MASK */ 47549, /* PseudoVNMSUB_VX_MF2 */ 47557, /* PseudoVNMSUB_VX_MF2_MASK */ 47564, /* PseudoVNMSUB_VX_MF4 */ 47572, /* PseudoVNMSUB_VX_MF4_MASK */ 47579, /* PseudoVNMSUB_VX_MF8 */ 47587, /* PseudoVNMSUB_VX_MF8_MASK */ 47594, /* PseudoVNSRA_WI_M1 */ 47602, /* PseudoVNSRA_WI_M1_MASK */ 47607, /* PseudoVNSRA_WI_M1_TU */ 47615, /* PseudoVNSRA_WI_M2 */ 47621, /* PseudoVNSRA_WI_M2_MASK */ 47626, /* PseudoVNSRA_WI_M2_TU */ 47634, /* PseudoVNSRA_WI_M4 */ 47640, /* PseudoVNSRA_WI_M4_MASK */ 47645, /* PseudoVNSRA_WI_M4_TU */ 47653, /* PseudoVNSRA_WI_MF2 */ 47659, /* PseudoVNSRA_WI_MF2_MASK */ 47664, /* PseudoVNSRA_WI_MF2_TU */ 47672, /* PseudoVNSRA_WI_MF4 */ 47678, /* PseudoVNSRA_WI_MF4_MASK */ 47683, /* PseudoVNSRA_WI_MF4_TU */ 47691, /* PseudoVNSRA_WI_MF8 */ 47697, /* PseudoVNSRA_WI_MF8_MASK */ 47702, /* PseudoVNSRA_WI_MF8_TU */ 47710, /* PseudoVNSRA_WV_M1 */ 47716, /* PseudoVNSRA_WV_M1_MASK */ 47721, /* PseudoVNSRA_WV_M1_TU */ 47729, /* PseudoVNSRA_WV_M2 */ 47735, /* PseudoVNSRA_WV_M2_MASK */ 47740, /* PseudoVNSRA_WV_M2_TU */ 47748, /* PseudoVNSRA_WV_M4 */ 47754, /* PseudoVNSRA_WV_M4_MASK */ 47759, /* PseudoVNSRA_WV_M4_TU */ 47767, /* PseudoVNSRA_WV_MF2 */ 47773, /* PseudoVNSRA_WV_MF2_MASK */ 47778, /* PseudoVNSRA_WV_MF2_TU */ 47786, /* PseudoVNSRA_WV_MF4 */ 47792, /* PseudoVNSRA_WV_MF4_MASK */ 47797, /* PseudoVNSRA_WV_MF4_TU */ 47805, /* PseudoVNSRA_WV_MF8 */ 47811, /* PseudoVNSRA_WV_MF8_MASK */ 47816, /* PseudoVNSRA_WV_MF8_TU */ 47824, /* PseudoVNSRA_WX_M1 */ 47830, /* PseudoVNSRA_WX_M1_MASK */ 47835, /* PseudoVNSRA_WX_M1_TU */ 47843, /* PseudoVNSRA_WX_M2 */ 47849, /* PseudoVNSRA_WX_M2_MASK */ 47854, /* PseudoVNSRA_WX_M2_TU */ 47862, /* PseudoVNSRA_WX_M4 */ 47868, /* PseudoVNSRA_WX_M4_MASK */ 47873, /* PseudoVNSRA_WX_M4_TU */ 47881, /* PseudoVNSRA_WX_MF2 */ 47887, /* PseudoVNSRA_WX_MF2_MASK */ 47892, /* PseudoVNSRA_WX_MF2_TU */ 47900, /* PseudoVNSRA_WX_MF4 */ 47906, /* PseudoVNSRA_WX_MF4_MASK */ 47911, /* PseudoVNSRA_WX_MF4_TU */ 47919, /* PseudoVNSRA_WX_MF8 */ 47925, /* PseudoVNSRA_WX_MF8_MASK */ 47930, /* PseudoVNSRA_WX_MF8_TU */ 47938, /* PseudoVNSRL_WI_M1 */ 47944, /* PseudoVNSRL_WI_M1_MASK */ 47949, /* PseudoVNSRL_WI_M1_TU */ 47957, /* PseudoVNSRL_WI_M2 */ 47963, /* PseudoVNSRL_WI_M2_MASK */ 47968, /* PseudoVNSRL_WI_M2_TU */ 47976, /* PseudoVNSRL_WI_M4 */ 47982, /* PseudoVNSRL_WI_M4_MASK */ 47987, /* PseudoVNSRL_WI_M4_TU */ 47995, /* PseudoVNSRL_WI_MF2 */ 48001, /* PseudoVNSRL_WI_MF2_MASK */ 48006, /* PseudoVNSRL_WI_MF2_TU */ 48014, /* PseudoVNSRL_WI_MF4 */ 48020, /* PseudoVNSRL_WI_MF4_MASK */ 48025, /* PseudoVNSRL_WI_MF4_TU */ 48033, /* PseudoVNSRL_WI_MF8 */ 48039, /* PseudoVNSRL_WI_MF8_MASK */ 48044, /* PseudoVNSRL_WI_MF8_TU */ 48052, /* PseudoVNSRL_WV_M1 */ 48058, /* PseudoVNSRL_WV_M1_MASK */ 48063, /* PseudoVNSRL_WV_M1_TU */ 48071, /* PseudoVNSRL_WV_M2 */ 48077, /* PseudoVNSRL_WV_M2_MASK */ 48082, /* PseudoVNSRL_WV_M2_TU */ 48090, /* PseudoVNSRL_WV_M4 */ 48096, /* PseudoVNSRL_WV_M4_MASK */ 48101, /* PseudoVNSRL_WV_M4_TU */ 48109, /* PseudoVNSRL_WV_MF2 */ 48115, /* PseudoVNSRL_WV_MF2_MASK */ 48120, /* PseudoVNSRL_WV_MF2_TU */ 48128, /* PseudoVNSRL_WV_MF4 */ 48134, /* PseudoVNSRL_WV_MF4_MASK */ 48139, /* PseudoVNSRL_WV_MF4_TU */ 48147, /* PseudoVNSRL_WV_MF8 */ 48153, /* PseudoVNSRL_WV_MF8_MASK */ 48158, /* PseudoVNSRL_WV_MF8_TU */ 48166, /* PseudoVNSRL_WX_M1 */ 48172, /* PseudoVNSRL_WX_M1_MASK */ 48177, /* PseudoVNSRL_WX_M1_TU */ 48185, /* PseudoVNSRL_WX_M2 */ 48191, /* PseudoVNSRL_WX_M2_MASK */ 48196, /* PseudoVNSRL_WX_M2_TU */ 48204, /* PseudoVNSRL_WX_M4 */ 48210, /* PseudoVNSRL_WX_M4_MASK */ 48215, /* PseudoVNSRL_WX_M4_TU */ 48223, /* PseudoVNSRL_WX_MF2 */ 48229, /* PseudoVNSRL_WX_MF2_MASK */ 48234, /* PseudoVNSRL_WX_MF2_TU */ 48242, /* PseudoVNSRL_WX_MF4 */ 48248, /* PseudoVNSRL_WX_MF4_MASK */ 48253, /* PseudoVNSRL_WX_MF4_TU */ 48261, /* PseudoVNSRL_WX_MF8 */ 48267, /* PseudoVNSRL_WX_MF8_MASK */ 48272, /* PseudoVNSRL_WX_MF8_TU */ 48280, /* PseudoVOR_VI_M1 */ 48286, /* PseudoVOR_VI_M1_MASK */ 48291, /* PseudoVOR_VI_M1_TU */ 48299, /* PseudoVOR_VI_M2 */ 48305, /* PseudoVOR_VI_M2_MASK */ 48310, /* PseudoVOR_VI_M2_TU */ 48318, /* PseudoVOR_VI_M4 */ 48324, /* PseudoVOR_VI_M4_MASK */ 48329, /* PseudoVOR_VI_M4_TU */ 48337, /* PseudoVOR_VI_M8 */ 48343, /* PseudoVOR_VI_M8_MASK */ 48348, /* PseudoVOR_VI_M8_TU */ 48356, /* PseudoVOR_VI_MF2 */ 48362, /* PseudoVOR_VI_MF2_MASK */ 48367, /* PseudoVOR_VI_MF2_TU */ 48375, /* PseudoVOR_VI_MF4 */ 48381, /* PseudoVOR_VI_MF4_MASK */ 48386, /* PseudoVOR_VI_MF4_TU */ 48394, /* PseudoVOR_VI_MF8 */ 48400, /* PseudoVOR_VI_MF8_MASK */ 48405, /* PseudoVOR_VI_MF8_TU */ 48413, /* PseudoVOR_VV_M1 */ 48419, /* PseudoVOR_VV_M1_MASK */ 48424, /* PseudoVOR_VV_M1_TU */ 48432, /* PseudoVOR_VV_M2 */ 48438, /* PseudoVOR_VV_M2_MASK */ 48443, /* PseudoVOR_VV_M2_TU */ 48451, /* PseudoVOR_VV_M4 */ 48457, /* PseudoVOR_VV_M4_MASK */ 48462, /* PseudoVOR_VV_M4_TU */ 48470, /* PseudoVOR_VV_M8 */ 48476, /* PseudoVOR_VV_M8_MASK */ 48481, /* PseudoVOR_VV_M8_TU */ 48489, /* PseudoVOR_VV_MF2 */ 48495, /* PseudoVOR_VV_MF2_MASK */ 48500, /* PseudoVOR_VV_MF2_TU */ 48508, /* PseudoVOR_VV_MF4 */ 48514, /* PseudoVOR_VV_MF4_MASK */ 48519, /* PseudoVOR_VV_MF4_TU */ 48527, /* PseudoVOR_VV_MF8 */ 48533, /* PseudoVOR_VV_MF8_MASK */ 48538, /* PseudoVOR_VV_MF8_TU */ 48546, /* PseudoVOR_VX_M1 */ 48552, /* PseudoVOR_VX_M1_MASK */ 48557, /* PseudoVOR_VX_M1_TU */ 48565, /* PseudoVOR_VX_M2 */ 48571, /* PseudoVOR_VX_M2_MASK */ 48576, /* PseudoVOR_VX_M2_TU */ 48584, /* PseudoVOR_VX_M4 */ 48590, /* PseudoVOR_VX_M4_MASK */ 48595, /* PseudoVOR_VX_M4_TU */ 48603, /* PseudoVOR_VX_M8 */ 48609, /* PseudoVOR_VX_M8_MASK */ 48614, /* PseudoVOR_VX_M8_TU */ 48622, /* PseudoVOR_VX_MF2 */ 48628, /* PseudoVOR_VX_MF2_MASK */ 48633, /* PseudoVOR_VX_MF2_TU */ 48641, /* PseudoVOR_VX_MF4 */ 48647, /* PseudoVOR_VX_MF4_MASK */ 48652, /* PseudoVOR_VX_MF4_TU */ 48660, /* PseudoVOR_VX_MF8 */ 48666, /* PseudoVOR_VX_MF8_MASK */ 48671, /* PseudoVOR_VX_MF8_TU */ 48679, /* PseudoVREDAND_VS_M1 */ 48685, /* PseudoVREDAND_VS_M1_MASK */ 48691, /* PseudoVREDAND_VS_M2 */ 48698, /* PseudoVREDAND_VS_M2_MASK */ 48704, /* PseudoVREDAND_VS_M4 */ 48711, /* PseudoVREDAND_VS_M4_MASK */ 48717, /* PseudoVREDAND_VS_M8 */ 48724, /* PseudoVREDAND_VS_M8_MASK */ 48730, /* PseudoVREDAND_VS_MF2 */ 48737, /* PseudoVREDAND_VS_MF2_MASK */ 48743, /* PseudoVREDAND_VS_MF4 */ 48750, /* PseudoVREDAND_VS_MF4_MASK */ 48756, /* PseudoVREDAND_VS_MF8 */ 48763, /* PseudoVREDAND_VS_MF8_MASK */ 48769, /* PseudoVREDMAXU_VS_M1 */ 48776, /* PseudoVREDMAXU_VS_M1_MASK */ 48782, /* PseudoVREDMAXU_VS_M2 */ 48789, /* PseudoVREDMAXU_VS_M2_MASK */ 48795, /* PseudoVREDMAXU_VS_M4 */ 48802, /* PseudoVREDMAXU_VS_M4_MASK */ 48808, /* PseudoVREDMAXU_VS_M8 */ 48815, /* PseudoVREDMAXU_VS_M8_MASK */ 48821, /* PseudoVREDMAXU_VS_MF2 */ 48828, /* PseudoVREDMAXU_VS_MF2_MASK */ 48834, /* PseudoVREDMAXU_VS_MF4 */ 48841, /* PseudoVREDMAXU_VS_MF4_MASK */ 48847, /* PseudoVREDMAXU_VS_MF8 */ 48854, /* PseudoVREDMAXU_VS_MF8_MASK */ 48860, /* PseudoVREDMAX_VS_M1 */ 48867, /* PseudoVREDMAX_VS_M1_MASK */ 48873, /* PseudoVREDMAX_VS_M2 */ 48880, /* PseudoVREDMAX_VS_M2_MASK */ 48886, /* PseudoVREDMAX_VS_M4 */ 48893, /* PseudoVREDMAX_VS_M4_MASK */ 48899, /* PseudoVREDMAX_VS_M8 */ 48906, /* PseudoVREDMAX_VS_M8_MASK */ 48912, /* PseudoVREDMAX_VS_MF2 */ 48919, /* PseudoVREDMAX_VS_MF2_MASK */ 48925, /* PseudoVREDMAX_VS_MF4 */ 48932, /* PseudoVREDMAX_VS_MF4_MASK */ 48938, /* PseudoVREDMAX_VS_MF8 */ 48945, /* PseudoVREDMAX_VS_MF8_MASK */ 48951, /* PseudoVREDMINU_VS_M1 */ 48958, /* PseudoVREDMINU_VS_M1_MASK */ 48964, /* PseudoVREDMINU_VS_M2 */ 48971, /* PseudoVREDMINU_VS_M2_MASK */ 48977, /* PseudoVREDMINU_VS_M4 */ 48984, /* PseudoVREDMINU_VS_M4_MASK */ 48990, /* PseudoVREDMINU_VS_M8 */ 48997, /* PseudoVREDMINU_VS_M8_MASK */ 49003, /* PseudoVREDMINU_VS_MF2 */ 49010, /* PseudoVREDMINU_VS_MF2_MASK */ 49016, /* PseudoVREDMINU_VS_MF4 */ 49023, /* PseudoVREDMINU_VS_MF4_MASK */ 49029, /* PseudoVREDMINU_VS_MF8 */ 49036, /* PseudoVREDMINU_VS_MF8_MASK */ 49042, /* PseudoVREDMIN_VS_M1 */ 49049, /* PseudoVREDMIN_VS_M1_MASK */ 49055, /* PseudoVREDMIN_VS_M2 */ 49062, /* PseudoVREDMIN_VS_M2_MASK */ 49068, /* PseudoVREDMIN_VS_M4 */ 49075, /* PseudoVREDMIN_VS_M4_MASK */ 49081, /* PseudoVREDMIN_VS_M8 */ 49088, /* PseudoVREDMIN_VS_M8_MASK */ 49094, /* PseudoVREDMIN_VS_MF2 */ 49101, /* PseudoVREDMIN_VS_MF2_MASK */ 49107, /* PseudoVREDMIN_VS_MF4 */ 49114, /* PseudoVREDMIN_VS_MF4_MASK */ 49120, /* PseudoVREDMIN_VS_MF8 */ 49127, /* PseudoVREDMIN_VS_MF8_MASK */ 49133, /* PseudoVREDOR_VS_M1 */ 49140, /* PseudoVREDOR_VS_M1_MASK */ 49146, /* PseudoVREDOR_VS_M2 */ 49153, /* PseudoVREDOR_VS_M2_MASK */ 49159, /* PseudoVREDOR_VS_M4 */ 49166, /* PseudoVREDOR_VS_M4_MASK */ 49172, /* PseudoVREDOR_VS_M8 */ 49179, /* PseudoVREDOR_VS_M8_MASK */ 49185, /* PseudoVREDOR_VS_MF2 */ 49192, /* PseudoVREDOR_VS_MF2_MASK */ 49198, /* PseudoVREDOR_VS_MF4 */ 49205, /* PseudoVREDOR_VS_MF4_MASK */ 49211, /* PseudoVREDOR_VS_MF8 */ 49218, /* PseudoVREDOR_VS_MF8_MASK */ 49224, /* PseudoVREDSUM_VS_M1 */ 49231, /* PseudoVREDSUM_VS_M1_MASK */ 49237, /* PseudoVREDSUM_VS_M2 */ 49244, /* PseudoVREDSUM_VS_M2_MASK */ 49250, /* PseudoVREDSUM_VS_M4 */ 49257, /* PseudoVREDSUM_VS_M4_MASK */ 49263, /* PseudoVREDSUM_VS_M8 */ 49270, /* PseudoVREDSUM_VS_M8_MASK */ 49276, /* PseudoVREDSUM_VS_MF2 */ 49283, /* PseudoVREDSUM_VS_MF2_MASK */ 49289, /* PseudoVREDSUM_VS_MF4 */ 49296, /* PseudoVREDSUM_VS_MF4_MASK */ 49302, /* PseudoVREDSUM_VS_MF8 */ 49309, /* PseudoVREDSUM_VS_MF8_MASK */ 49315, /* PseudoVREDXOR_VS_M1 */ 49322, /* PseudoVREDXOR_VS_M1_MASK */ 49328, /* PseudoVREDXOR_VS_M2 */ 49335, /* PseudoVREDXOR_VS_M2_MASK */ 49341, /* PseudoVREDXOR_VS_M4 */ 49348, /* PseudoVREDXOR_VS_M4_MASK */ 49354, /* PseudoVREDXOR_VS_M8 */ 49361, /* PseudoVREDXOR_VS_M8_MASK */ 49367, /* PseudoVREDXOR_VS_MF2 */ 49374, /* PseudoVREDXOR_VS_MF2_MASK */ 49380, /* PseudoVREDXOR_VS_MF4 */ 49387, /* PseudoVREDXOR_VS_MF4_MASK */ 49393, /* PseudoVREDXOR_VS_MF8 */ 49400, /* PseudoVREDXOR_VS_MF8_MASK */ 49406, /* PseudoVRELOAD2_M1 */ 49413, /* PseudoVRELOAD2_M2 */ 49415, /* PseudoVRELOAD2_M4 */ 49417, /* PseudoVRELOAD2_MF2 */ 49419, /* PseudoVRELOAD2_MF4 */ 49421, /* PseudoVRELOAD2_MF8 */ 49423, /* PseudoVRELOAD3_M1 */ 49425, /* PseudoVRELOAD3_M2 */ 49427, /* PseudoVRELOAD3_MF2 */ 49429, /* PseudoVRELOAD3_MF4 */ 49431, /* PseudoVRELOAD3_MF8 */ 49433, /* PseudoVRELOAD4_M1 */ 49435, /* PseudoVRELOAD4_M2 */ 49437, /* PseudoVRELOAD4_MF2 */ 49439, /* PseudoVRELOAD4_MF4 */ 49441, /* PseudoVRELOAD4_MF8 */ 49443, /* PseudoVRELOAD5_M1 */ 49445, /* PseudoVRELOAD5_MF2 */ 49447, /* PseudoVRELOAD5_MF4 */ 49449, /* PseudoVRELOAD5_MF8 */ 49451, /* PseudoVRELOAD6_M1 */ 49453, /* PseudoVRELOAD6_MF2 */ 49455, /* PseudoVRELOAD6_MF4 */ 49457, /* PseudoVRELOAD6_MF8 */ 49459, /* PseudoVRELOAD7_M1 */ 49461, /* PseudoVRELOAD7_MF2 */ 49463, /* PseudoVRELOAD7_MF4 */ 49465, /* PseudoVRELOAD7_MF8 */ 49467, /* PseudoVRELOAD8_M1 */ 49469, /* PseudoVRELOAD8_MF2 */ 49471, /* PseudoVRELOAD8_MF4 */ 49473, /* PseudoVRELOAD8_MF8 */ 49475, /* PseudoVREMU_VV_M1 */ 49477, /* PseudoVREMU_VV_M1_MASK */ 49482, /* PseudoVREMU_VV_M1_TU */ 49490, /* PseudoVREMU_VV_M2 */ 49496, /* PseudoVREMU_VV_M2_MASK */ 49501, /* PseudoVREMU_VV_M2_TU */ 49509, /* PseudoVREMU_VV_M4 */ 49515, /* PseudoVREMU_VV_M4_MASK */ 49520, /* PseudoVREMU_VV_M4_TU */ 49528, /* PseudoVREMU_VV_M8 */ 49534, /* PseudoVREMU_VV_M8_MASK */ 49539, /* PseudoVREMU_VV_M8_TU */ 49547, /* PseudoVREMU_VV_MF2 */ 49553, /* PseudoVREMU_VV_MF2_MASK */ 49558, /* PseudoVREMU_VV_MF2_TU */ 49566, /* PseudoVREMU_VV_MF4 */ 49572, /* PseudoVREMU_VV_MF4_MASK */ 49577, /* PseudoVREMU_VV_MF4_TU */ 49585, /* PseudoVREMU_VV_MF8 */ 49591, /* PseudoVREMU_VV_MF8_MASK */ 49596, /* PseudoVREMU_VV_MF8_TU */ 49604, /* PseudoVREMU_VX_M1 */ 49610, /* PseudoVREMU_VX_M1_MASK */ 49615, /* PseudoVREMU_VX_M1_TU */ 49623, /* PseudoVREMU_VX_M2 */ 49629, /* PseudoVREMU_VX_M2_MASK */ 49634, /* PseudoVREMU_VX_M2_TU */ 49642, /* PseudoVREMU_VX_M4 */ 49648, /* PseudoVREMU_VX_M4_MASK */ 49653, /* PseudoVREMU_VX_M4_TU */ 49661, /* PseudoVREMU_VX_M8 */ 49667, /* PseudoVREMU_VX_M8_MASK */ 49672, /* PseudoVREMU_VX_M8_TU */ 49680, /* PseudoVREMU_VX_MF2 */ 49686, /* PseudoVREMU_VX_MF2_MASK */ 49691, /* PseudoVREMU_VX_MF2_TU */ 49699, /* PseudoVREMU_VX_MF4 */ 49705, /* PseudoVREMU_VX_MF4_MASK */ 49710, /* PseudoVREMU_VX_MF4_TU */ 49718, /* PseudoVREMU_VX_MF8 */ 49724, /* PseudoVREMU_VX_MF8_MASK */ 49729, /* PseudoVREMU_VX_MF8_TU */ 49737, /* PseudoVREM_VV_M1 */ 49743, /* PseudoVREM_VV_M1_MASK */ 49748, /* PseudoVREM_VV_M1_TU */ 49756, /* PseudoVREM_VV_M2 */ 49762, /* PseudoVREM_VV_M2_MASK */ 49767, /* PseudoVREM_VV_M2_TU */ 49775, /* PseudoVREM_VV_M4 */ 49781, /* PseudoVREM_VV_M4_MASK */ 49786, /* PseudoVREM_VV_M4_TU */ 49794, /* PseudoVREM_VV_M8 */ 49800, /* PseudoVREM_VV_M8_MASK */ 49805, /* PseudoVREM_VV_M8_TU */ 49813, /* PseudoVREM_VV_MF2 */ 49819, /* PseudoVREM_VV_MF2_MASK */ 49824, /* PseudoVREM_VV_MF2_TU */ 49832, /* PseudoVREM_VV_MF4 */ 49838, /* PseudoVREM_VV_MF4_MASK */ 49843, /* PseudoVREM_VV_MF4_TU */ 49851, /* PseudoVREM_VV_MF8 */ 49857, /* PseudoVREM_VV_MF8_MASK */ 49862, /* PseudoVREM_VV_MF8_TU */ 49870, /* PseudoVREM_VX_M1 */ 49876, /* PseudoVREM_VX_M1_MASK */ 49881, /* PseudoVREM_VX_M1_TU */ 49889, /* PseudoVREM_VX_M2 */ 49895, /* PseudoVREM_VX_M2_MASK */ 49900, /* PseudoVREM_VX_M2_TU */ 49908, /* PseudoVREM_VX_M4 */ 49914, /* PseudoVREM_VX_M4_MASK */ 49919, /* PseudoVREM_VX_M4_TU */ 49927, /* PseudoVREM_VX_M8 */ 49933, /* PseudoVREM_VX_M8_MASK */ 49938, /* PseudoVREM_VX_M8_TU */ 49946, /* PseudoVREM_VX_MF2 */ 49952, /* PseudoVREM_VX_MF2_MASK */ 49957, /* PseudoVREM_VX_MF2_TU */ 49965, /* PseudoVREM_VX_MF4 */ 49971, /* PseudoVREM_VX_MF4_MASK */ 49976, /* PseudoVREM_VX_MF4_TU */ 49984, /* PseudoVREM_VX_MF8 */ 49990, /* PseudoVREM_VX_MF8_MASK */ 49995, /* PseudoVREM_VX_MF8_TU */ 50003, /* PseudoVRGATHEREI16_VV_M1_M1 */ 50009, /* PseudoVRGATHEREI16_VV_M1_M1_MASK */ 50014, /* PseudoVRGATHEREI16_VV_M1_M1_TU */ 50022, /* PseudoVRGATHEREI16_VV_M1_M2 */ 50028, /* PseudoVRGATHEREI16_VV_M1_M2_MASK */ 50033, /* PseudoVRGATHEREI16_VV_M1_M2_TU */ 50041, /* PseudoVRGATHEREI16_VV_M1_MF2 */ 50047, /* PseudoVRGATHEREI16_VV_M1_MF2_MASK */ 50052, /* PseudoVRGATHEREI16_VV_M1_MF2_TU */ 50060, /* PseudoVRGATHEREI16_VV_M1_MF4 */ 50066, /* PseudoVRGATHEREI16_VV_M1_MF4_MASK */ 50071, /* PseudoVRGATHEREI16_VV_M1_MF4_TU */ 50079, /* PseudoVRGATHEREI16_VV_M2_M1 */ 50085, /* PseudoVRGATHEREI16_VV_M2_M1_MASK */ 50090, /* PseudoVRGATHEREI16_VV_M2_M1_TU */ 50098, /* PseudoVRGATHEREI16_VV_M2_M2 */ 50104, /* PseudoVRGATHEREI16_VV_M2_M2_MASK */ 50109, /* PseudoVRGATHEREI16_VV_M2_M2_TU */ 50117, /* PseudoVRGATHEREI16_VV_M2_M4 */ 50123, /* PseudoVRGATHEREI16_VV_M2_M4_MASK */ 50128, /* PseudoVRGATHEREI16_VV_M2_M4_TU */ 50136, /* PseudoVRGATHEREI16_VV_M2_MF2 */ 50142, /* PseudoVRGATHEREI16_VV_M2_MF2_MASK */ 50147, /* PseudoVRGATHEREI16_VV_M2_MF2_TU */ 50155, /* PseudoVRGATHEREI16_VV_M4_M1 */ 50161, /* PseudoVRGATHEREI16_VV_M4_M1_MASK */ 50166, /* PseudoVRGATHEREI16_VV_M4_M1_TU */ 50174, /* PseudoVRGATHEREI16_VV_M4_M2 */ 50180, /* PseudoVRGATHEREI16_VV_M4_M2_MASK */ 50185, /* PseudoVRGATHEREI16_VV_M4_M2_TU */ 50193, /* PseudoVRGATHEREI16_VV_M4_M4 */ 50199, /* PseudoVRGATHEREI16_VV_M4_M4_MASK */ 50204, /* PseudoVRGATHEREI16_VV_M4_M4_TU */ 50212, /* PseudoVRGATHEREI16_VV_M4_M8 */ 50218, /* PseudoVRGATHEREI16_VV_M4_M8_MASK */ 50223, /* PseudoVRGATHEREI16_VV_M4_M8_TU */ 50231, /* PseudoVRGATHEREI16_VV_M8_M2 */ 50237, /* PseudoVRGATHEREI16_VV_M8_M2_MASK */ 50242, /* PseudoVRGATHEREI16_VV_M8_M2_TU */ 50250, /* PseudoVRGATHEREI16_VV_M8_M4 */ 50256, /* PseudoVRGATHEREI16_VV_M8_M4_MASK */ 50261, /* PseudoVRGATHEREI16_VV_M8_M4_TU */ 50269, /* PseudoVRGATHEREI16_VV_M8_M8 */ 50275, /* PseudoVRGATHEREI16_VV_M8_M8_MASK */ 50280, /* PseudoVRGATHEREI16_VV_M8_M8_TU */ 50288, /* PseudoVRGATHEREI16_VV_MF2_M1 */ 50294, /* PseudoVRGATHEREI16_VV_MF2_M1_MASK */ 50299, /* PseudoVRGATHEREI16_VV_MF2_M1_TU */ 50307, /* PseudoVRGATHEREI16_VV_MF2_MF2 */ 50313, /* PseudoVRGATHEREI16_VV_MF2_MF2_MASK */ 50318, /* PseudoVRGATHEREI16_VV_MF2_MF2_TU */ 50326, /* PseudoVRGATHEREI16_VV_MF2_MF4 */ 50332, /* PseudoVRGATHEREI16_VV_MF2_MF4_MASK */ 50337, /* PseudoVRGATHEREI16_VV_MF2_MF4_TU */ 50345, /* PseudoVRGATHEREI16_VV_MF2_MF8 */ 50351, /* PseudoVRGATHEREI16_VV_MF2_MF8_MASK */ 50356, /* PseudoVRGATHEREI16_VV_MF2_MF8_TU */ 50364, /* PseudoVRGATHEREI16_VV_MF4_MF2 */ 50370, /* PseudoVRGATHEREI16_VV_MF4_MF2_MASK */ 50375, /* PseudoVRGATHEREI16_VV_MF4_MF2_TU */ 50383, /* PseudoVRGATHEREI16_VV_MF4_MF4 */ 50389, /* PseudoVRGATHEREI16_VV_MF4_MF4_MASK */ 50394, /* PseudoVRGATHEREI16_VV_MF4_MF4_TU */ 50402, /* PseudoVRGATHEREI16_VV_MF4_MF8 */ 50408, /* PseudoVRGATHEREI16_VV_MF4_MF8_MASK */ 50413, /* PseudoVRGATHEREI16_VV_MF4_MF8_TU */ 50421, /* PseudoVRGATHEREI16_VV_MF8_MF4 */ 50427, /* PseudoVRGATHEREI16_VV_MF8_MF4_MASK */ 50432, /* PseudoVRGATHEREI16_VV_MF8_MF4_TU */ 50440, /* PseudoVRGATHEREI16_VV_MF8_MF8 */ 50446, /* PseudoVRGATHEREI16_VV_MF8_MF8_MASK */ 50451, /* PseudoVRGATHEREI16_VV_MF8_MF8_TU */ 50459, /* PseudoVRGATHER_VI_M1 */ 50465, /* PseudoVRGATHER_VI_M1_MASK */ 50470, /* PseudoVRGATHER_VI_M1_TU */ 50478, /* PseudoVRGATHER_VI_M2 */ 50484, /* PseudoVRGATHER_VI_M2_MASK */ 50489, /* PseudoVRGATHER_VI_M2_TU */ 50497, /* PseudoVRGATHER_VI_M4 */ 50503, /* PseudoVRGATHER_VI_M4_MASK */ 50508, /* PseudoVRGATHER_VI_M4_TU */ 50516, /* PseudoVRGATHER_VI_M8 */ 50522, /* PseudoVRGATHER_VI_M8_MASK */ 50527, /* PseudoVRGATHER_VI_M8_TU */ 50535, /* PseudoVRGATHER_VI_MF2 */ 50541, /* PseudoVRGATHER_VI_MF2_MASK */ 50546, /* PseudoVRGATHER_VI_MF2_TU */ 50554, /* PseudoVRGATHER_VI_MF4 */ 50560, /* PseudoVRGATHER_VI_MF4_MASK */ 50565, /* PseudoVRGATHER_VI_MF4_TU */ 50573, /* PseudoVRGATHER_VI_MF8 */ 50579, /* PseudoVRGATHER_VI_MF8_MASK */ 50584, /* PseudoVRGATHER_VI_MF8_TU */ 50592, /* PseudoVRGATHER_VV_M1 */ 50598, /* PseudoVRGATHER_VV_M1_MASK */ 50603, /* PseudoVRGATHER_VV_M1_TU */ 50611, /* PseudoVRGATHER_VV_M2 */ 50617, /* PseudoVRGATHER_VV_M2_MASK */ 50622, /* PseudoVRGATHER_VV_M2_TU */ 50630, /* PseudoVRGATHER_VV_M4 */ 50636, /* PseudoVRGATHER_VV_M4_MASK */ 50641, /* PseudoVRGATHER_VV_M4_TU */ 50649, /* PseudoVRGATHER_VV_M8 */ 50655, /* PseudoVRGATHER_VV_M8_MASK */ 50660, /* PseudoVRGATHER_VV_M8_TU */ 50668, /* PseudoVRGATHER_VV_MF2 */ 50674, /* PseudoVRGATHER_VV_MF2_MASK */ 50679, /* PseudoVRGATHER_VV_MF2_TU */ 50687, /* PseudoVRGATHER_VV_MF4 */ 50693, /* PseudoVRGATHER_VV_MF4_MASK */ 50698, /* PseudoVRGATHER_VV_MF4_TU */ 50706, /* PseudoVRGATHER_VV_MF8 */ 50712, /* PseudoVRGATHER_VV_MF8_MASK */ 50717, /* PseudoVRGATHER_VV_MF8_TU */ 50725, /* PseudoVRGATHER_VX_M1 */ 50731, /* PseudoVRGATHER_VX_M1_MASK */ 50736, /* PseudoVRGATHER_VX_M1_TU */ 50744, /* PseudoVRGATHER_VX_M2 */ 50750, /* PseudoVRGATHER_VX_M2_MASK */ 50755, /* PseudoVRGATHER_VX_M2_TU */ 50763, /* PseudoVRGATHER_VX_M4 */ 50769, /* PseudoVRGATHER_VX_M4_MASK */ 50774, /* PseudoVRGATHER_VX_M4_TU */ 50782, /* PseudoVRGATHER_VX_M8 */ 50788, /* PseudoVRGATHER_VX_M8_MASK */ 50793, /* PseudoVRGATHER_VX_M8_TU */ 50801, /* PseudoVRGATHER_VX_MF2 */ 50807, /* PseudoVRGATHER_VX_MF2_MASK */ 50812, /* PseudoVRGATHER_VX_MF2_TU */ 50820, /* PseudoVRGATHER_VX_MF4 */ 50826, /* PseudoVRGATHER_VX_MF4_MASK */ 50831, /* PseudoVRGATHER_VX_MF4_TU */ 50839, /* PseudoVRGATHER_VX_MF8 */ 50845, /* PseudoVRGATHER_VX_MF8_MASK */ 50850, /* PseudoVRGATHER_VX_MF8_TU */ 50858, /* PseudoVRSUB_VI_M1 */ 50864, /* PseudoVRSUB_VI_M1_MASK */ 50869, /* PseudoVRSUB_VI_M1_TU */ 50877, /* PseudoVRSUB_VI_M2 */ 50883, /* PseudoVRSUB_VI_M2_MASK */ 50888, /* PseudoVRSUB_VI_M2_TU */ 50896, /* PseudoVRSUB_VI_M4 */ 50902, /* PseudoVRSUB_VI_M4_MASK */ 50907, /* PseudoVRSUB_VI_M4_TU */ 50915, /* PseudoVRSUB_VI_M8 */ 50921, /* PseudoVRSUB_VI_M8_MASK */ 50926, /* PseudoVRSUB_VI_M8_TU */ 50934, /* PseudoVRSUB_VI_MF2 */ 50940, /* PseudoVRSUB_VI_MF2_MASK */ 50945, /* PseudoVRSUB_VI_MF2_TU */ 50953, /* PseudoVRSUB_VI_MF4 */ 50959, /* PseudoVRSUB_VI_MF4_MASK */ 50964, /* PseudoVRSUB_VI_MF4_TU */ 50972, /* PseudoVRSUB_VI_MF8 */ 50978, /* PseudoVRSUB_VI_MF8_MASK */ 50983, /* PseudoVRSUB_VI_MF8_TU */ 50991, /* PseudoVRSUB_VX_M1 */ 50997, /* PseudoVRSUB_VX_M1_MASK */ 51002, /* PseudoVRSUB_VX_M1_TU */ 51010, /* PseudoVRSUB_VX_M2 */ 51016, /* PseudoVRSUB_VX_M2_MASK */ 51021, /* PseudoVRSUB_VX_M2_TU */ 51029, /* PseudoVRSUB_VX_M4 */ 51035, /* PseudoVRSUB_VX_M4_MASK */ 51040, /* PseudoVRSUB_VX_M4_TU */ 51048, /* PseudoVRSUB_VX_M8 */ 51054, /* PseudoVRSUB_VX_M8_MASK */ 51059, /* PseudoVRSUB_VX_M8_TU */ 51067, /* PseudoVRSUB_VX_MF2 */ 51073, /* PseudoVRSUB_VX_MF2_MASK */ 51078, /* PseudoVRSUB_VX_MF2_TU */ 51086, /* PseudoVRSUB_VX_MF4 */ 51092, /* PseudoVRSUB_VX_MF4_MASK */ 51097, /* PseudoVRSUB_VX_MF4_TU */ 51105, /* PseudoVRSUB_VX_MF8 */ 51111, /* PseudoVRSUB_VX_MF8_MASK */ 51116, /* PseudoVRSUB_VX_MF8_TU */ 51124, /* PseudoVSADDU_VI_M1 */ 51130, /* PseudoVSADDU_VI_M1_MASK */ 51135, /* PseudoVSADDU_VI_M1_TU */ 51143, /* PseudoVSADDU_VI_M2 */ 51149, /* PseudoVSADDU_VI_M2_MASK */ 51154, /* PseudoVSADDU_VI_M2_TU */ 51162, /* PseudoVSADDU_VI_M4 */ 51168, /* PseudoVSADDU_VI_M4_MASK */ 51173, /* PseudoVSADDU_VI_M4_TU */ 51181, /* PseudoVSADDU_VI_M8 */ 51187, /* PseudoVSADDU_VI_M8_MASK */ 51192, /* PseudoVSADDU_VI_M8_TU */ 51200, /* PseudoVSADDU_VI_MF2 */ 51206, /* PseudoVSADDU_VI_MF2_MASK */ 51211, /* PseudoVSADDU_VI_MF2_TU */ 51219, /* PseudoVSADDU_VI_MF4 */ 51225, /* PseudoVSADDU_VI_MF4_MASK */ 51230, /* PseudoVSADDU_VI_MF4_TU */ 51238, /* PseudoVSADDU_VI_MF8 */ 51244, /* PseudoVSADDU_VI_MF8_MASK */ 51249, /* PseudoVSADDU_VI_MF8_TU */ 51257, /* PseudoVSADDU_VV_M1 */ 51263, /* PseudoVSADDU_VV_M1_MASK */ 51268, /* PseudoVSADDU_VV_M1_TU */ 51276, /* PseudoVSADDU_VV_M2 */ 51282, /* PseudoVSADDU_VV_M2_MASK */ 51287, /* PseudoVSADDU_VV_M2_TU */ 51295, /* PseudoVSADDU_VV_M4 */ 51301, /* PseudoVSADDU_VV_M4_MASK */ 51306, /* PseudoVSADDU_VV_M4_TU */ 51314, /* PseudoVSADDU_VV_M8 */ 51320, /* PseudoVSADDU_VV_M8_MASK */ 51325, /* PseudoVSADDU_VV_M8_TU */ 51333, /* PseudoVSADDU_VV_MF2 */ 51339, /* PseudoVSADDU_VV_MF2_MASK */ 51344, /* PseudoVSADDU_VV_MF2_TU */ 51352, /* PseudoVSADDU_VV_MF4 */ 51358, /* PseudoVSADDU_VV_MF4_MASK */ 51363, /* PseudoVSADDU_VV_MF4_TU */ 51371, /* PseudoVSADDU_VV_MF8 */ 51377, /* PseudoVSADDU_VV_MF8_MASK */ 51382, /* PseudoVSADDU_VV_MF8_TU */ 51390, /* PseudoVSADDU_VX_M1 */ 51396, /* PseudoVSADDU_VX_M1_MASK */ 51401, /* PseudoVSADDU_VX_M1_TU */ 51409, /* PseudoVSADDU_VX_M2 */ 51415, /* PseudoVSADDU_VX_M2_MASK */ 51420, /* PseudoVSADDU_VX_M2_TU */ 51428, /* PseudoVSADDU_VX_M4 */ 51434, /* PseudoVSADDU_VX_M4_MASK */ 51439, /* PseudoVSADDU_VX_M4_TU */ 51447, /* PseudoVSADDU_VX_M8 */ 51453, /* PseudoVSADDU_VX_M8_MASK */ 51458, /* PseudoVSADDU_VX_M8_TU */ 51466, /* PseudoVSADDU_VX_MF2 */ 51472, /* PseudoVSADDU_VX_MF2_MASK */ 51477, /* PseudoVSADDU_VX_MF2_TU */ 51485, /* PseudoVSADDU_VX_MF4 */ 51491, /* PseudoVSADDU_VX_MF4_MASK */ 51496, /* PseudoVSADDU_VX_MF4_TU */ 51504, /* PseudoVSADDU_VX_MF8 */ 51510, /* PseudoVSADDU_VX_MF8_MASK */ 51515, /* PseudoVSADDU_VX_MF8_TU */ 51523, /* PseudoVSADD_VI_M1 */ 51529, /* PseudoVSADD_VI_M1_MASK */ 51534, /* PseudoVSADD_VI_M1_TU */ 51542, /* PseudoVSADD_VI_M2 */ 51548, /* PseudoVSADD_VI_M2_MASK */ 51553, /* PseudoVSADD_VI_M2_TU */ 51561, /* PseudoVSADD_VI_M4 */ 51567, /* PseudoVSADD_VI_M4_MASK */ 51572, /* PseudoVSADD_VI_M4_TU */ 51580, /* PseudoVSADD_VI_M8 */ 51586, /* PseudoVSADD_VI_M8_MASK */ 51591, /* PseudoVSADD_VI_M8_TU */ 51599, /* PseudoVSADD_VI_MF2 */ 51605, /* PseudoVSADD_VI_MF2_MASK */ 51610, /* PseudoVSADD_VI_MF2_TU */ 51618, /* PseudoVSADD_VI_MF4 */ 51624, /* PseudoVSADD_VI_MF4_MASK */ 51629, /* PseudoVSADD_VI_MF4_TU */ 51637, /* PseudoVSADD_VI_MF8 */ 51643, /* PseudoVSADD_VI_MF8_MASK */ 51648, /* PseudoVSADD_VI_MF8_TU */ 51656, /* PseudoVSADD_VV_M1 */ 51662, /* PseudoVSADD_VV_M1_MASK */ 51667, /* PseudoVSADD_VV_M1_TU */ 51675, /* PseudoVSADD_VV_M2 */ 51681, /* PseudoVSADD_VV_M2_MASK */ 51686, /* PseudoVSADD_VV_M2_TU */ 51694, /* PseudoVSADD_VV_M4 */ 51700, /* PseudoVSADD_VV_M4_MASK */ 51705, /* PseudoVSADD_VV_M4_TU */ 51713, /* PseudoVSADD_VV_M8 */ 51719, /* PseudoVSADD_VV_M8_MASK */ 51724, /* PseudoVSADD_VV_M8_TU */ 51732, /* PseudoVSADD_VV_MF2 */ 51738, /* PseudoVSADD_VV_MF2_MASK */ 51743, /* PseudoVSADD_VV_MF2_TU */ 51751, /* PseudoVSADD_VV_MF4 */ 51757, /* PseudoVSADD_VV_MF4_MASK */ 51762, /* PseudoVSADD_VV_MF4_TU */ 51770, /* PseudoVSADD_VV_MF8 */ 51776, /* PseudoVSADD_VV_MF8_MASK */ 51781, /* PseudoVSADD_VV_MF8_TU */ 51789, /* PseudoVSADD_VX_M1 */ 51795, /* PseudoVSADD_VX_M1_MASK */ 51800, /* PseudoVSADD_VX_M1_TU */ 51808, /* PseudoVSADD_VX_M2 */ 51814, /* PseudoVSADD_VX_M2_MASK */ 51819, /* PseudoVSADD_VX_M2_TU */ 51827, /* PseudoVSADD_VX_M4 */ 51833, /* PseudoVSADD_VX_M4_MASK */ 51838, /* PseudoVSADD_VX_M4_TU */ 51846, /* PseudoVSADD_VX_M8 */ 51852, /* PseudoVSADD_VX_M8_MASK */ 51857, /* PseudoVSADD_VX_M8_TU */ 51865, /* PseudoVSADD_VX_MF2 */ 51871, /* PseudoVSADD_VX_MF2_MASK */ 51876, /* PseudoVSADD_VX_MF2_TU */ 51884, /* PseudoVSADD_VX_MF4 */ 51890, /* PseudoVSADD_VX_MF4_MASK */ 51895, /* PseudoVSADD_VX_MF4_TU */ 51903, /* PseudoVSADD_VX_MF8 */ 51909, /* PseudoVSADD_VX_MF8_MASK */ 51914, /* PseudoVSADD_VX_MF8_TU */ 51922, /* PseudoVSBC_VVM_M1 */ 51928, /* PseudoVSBC_VVM_M1_TU */ 51934, /* PseudoVSBC_VVM_M2 */ 51941, /* PseudoVSBC_VVM_M2_TU */ 51947, /* PseudoVSBC_VVM_M4 */ 51954, /* PseudoVSBC_VVM_M4_TU */ 51960, /* PseudoVSBC_VVM_M8 */ 51967, /* PseudoVSBC_VVM_M8_TU */ 51973, /* PseudoVSBC_VVM_MF2 */ 51980, /* PseudoVSBC_VVM_MF2_TU */ 51986, /* PseudoVSBC_VVM_MF4 */ 51993, /* PseudoVSBC_VVM_MF4_TU */ 51999, /* PseudoVSBC_VVM_MF8 */ 52006, /* PseudoVSBC_VVM_MF8_TU */ 52012, /* PseudoVSBC_VXM_M1 */ 52019, /* PseudoVSBC_VXM_M1_TU */ 52025, /* PseudoVSBC_VXM_M2 */ 52032, /* PseudoVSBC_VXM_M2_TU */ 52038, /* PseudoVSBC_VXM_M4 */ 52045, /* PseudoVSBC_VXM_M4_TU */ 52051, /* PseudoVSBC_VXM_M8 */ 52058, /* PseudoVSBC_VXM_M8_TU */ 52064, /* PseudoVSBC_VXM_MF2 */ 52071, /* PseudoVSBC_VXM_MF2_TU */ 52077, /* PseudoVSBC_VXM_MF4 */ 52084, /* PseudoVSBC_VXM_MF4_TU */ 52090, /* PseudoVSBC_VXM_MF8 */ 52097, /* PseudoVSBC_VXM_MF8_TU */ 52103, /* PseudoVSE16_V_M1 */ 52110, /* PseudoVSE16_V_M1_MASK */ 52114, /* PseudoVSE16_V_M2 */ 52119, /* PseudoVSE16_V_M2_MASK */ 52123, /* PseudoVSE16_V_M4 */ 52128, /* PseudoVSE16_V_M4_MASK */ 52132, /* PseudoVSE16_V_M8 */ 52137, /* PseudoVSE16_V_M8_MASK */ 52141, /* PseudoVSE16_V_MF2 */ 52146, /* PseudoVSE16_V_MF2_MASK */ 52150, /* PseudoVSE16_V_MF4 */ 52155, /* PseudoVSE16_V_MF4_MASK */ 52159, /* PseudoVSE32_V_M1 */ 52164, /* PseudoVSE32_V_M1_MASK */ 52168, /* PseudoVSE32_V_M2 */ 52173, /* PseudoVSE32_V_M2_MASK */ 52177, /* PseudoVSE32_V_M4 */ 52182, /* PseudoVSE32_V_M4_MASK */ 52186, /* PseudoVSE32_V_M8 */ 52191, /* PseudoVSE32_V_M8_MASK */ 52195, /* PseudoVSE32_V_MF2 */ 52200, /* PseudoVSE32_V_MF2_MASK */ 52204, /* PseudoVSE64_V_M1 */ 52209, /* PseudoVSE64_V_M1_MASK */ 52213, /* PseudoVSE64_V_M2 */ 52218, /* PseudoVSE64_V_M2_MASK */ 52222, /* PseudoVSE64_V_M4 */ 52227, /* PseudoVSE64_V_M4_MASK */ 52231, /* PseudoVSE64_V_M8 */ 52236, /* PseudoVSE64_V_M8_MASK */ 52240, /* PseudoVSE8_V_M1 */ 52245, /* PseudoVSE8_V_M1_MASK */ 52249, /* PseudoVSE8_V_M2 */ 52254, /* PseudoVSE8_V_M2_MASK */ 52258, /* PseudoVSE8_V_M4 */ 52263, /* PseudoVSE8_V_M4_MASK */ 52267, /* PseudoVSE8_V_M8 */ 52272, /* PseudoVSE8_V_M8_MASK */ 52276, /* PseudoVSE8_V_MF2 */ 52281, /* PseudoVSE8_V_MF2_MASK */ 52285, /* PseudoVSE8_V_MF4 */ 52290, /* PseudoVSE8_V_MF4_MASK */ 52294, /* PseudoVSE8_V_MF8 */ 52299, /* PseudoVSE8_V_MF8_MASK */ 52303, /* PseudoVSETIVLI */ 52308, /* PseudoVSETVLI */ 52311, /* PseudoVSETVLIX0 */ 52314, /* PseudoVSEXT_VF2_M1 */ 52317, /* PseudoVSEXT_VF2_M1_MASK */ 52321, /* PseudoVSEXT_VF2_M1_TU */ 52328, /* PseudoVSEXT_VF2_M2 */ 52333, /* PseudoVSEXT_VF2_M2_MASK */ 52337, /* PseudoVSEXT_VF2_M2_TU */ 52344, /* PseudoVSEXT_VF2_M4 */ 52349, /* PseudoVSEXT_VF2_M4_MASK */ 52353, /* PseudoVSEXT_VF2_M4_TU */ 52360, /* PseudoVSEXT_VF2_M8 */ 52365, /* PseudoVSEXT_VF2_M8_MASK */ 52369, /* PseudoVSEXT_VF2_M8_TU */ 52376, /* PseudoVSEXT_VF2_MF2 */ 52381, /* PseudoVSEXT_VF2_MF2_MASK */ 52385, /* PseudoVSEXT_VF2_MF2_TU */ 52392, /* PseudoVSEXT_VF2_MF4 */ 52397, /* PseudoVSEXT_VF2_MF4_MASK */ 52401, /* PseudoVSEXT_VF2_MF4_TU */ 52408, /* PseudoVSEXT_VF4_M1 */ 52413, /* PseudoVSEXT_VF4_M1_MASK */ 52417, /* PseudoVSEXT_VF4_M1_TU */ 52424, /* PseudoVSEXT_VF4_M2 */ 52429, /* PseudoVSEXT_VF4_M2_MASK */ 52433, /* PseudoVSEXT_VF4_M2_TU */ 52440, /* PseudoVSEXT_VF4_M4 */ 52445, /* PseudoVSEXT_VF4_M4_MASK */ 52449, /* PseudoVSEXT_VF4_M4_TU */ 52456, /* PseudoVSEXT_VF4_M8 */ 52461, /* PseudoVSEXT_VF4_M8_MASK */ 52465, /* PseudoVSEXT_VF4_M8_TU */ 52472, /* PseudoVSEXT_VF4_MF2 */ 52477, /* PseudoVSEXT_VF4_MF2_MASK */ 52481, /* PseudoVSEXT_VF4_MF2_TU */ 52488, /* PseudoVSEXT_VF8_M1 */ 52493, /* PseudoVSEXT_VF8_M1_MASK */ 52497, /* PseudoVSEXT_VF8_M1_TU */ 52504, /* PseudoVSEXT_VF8_M2 */ 52509, /* PseudoVSEXT_VF8_M2_MASK */ 52513, /* PseudoVSEXT_VF8_M2_TU */ 52520, /* PseudoVSEXT_VF8_M4 */ 52525, /* PseudoVSEXT_VF8_M4_MASK */ 52529, /* PseudoVSEXT_VF8_M4_TU */ 52536, /* PseudoVSEXT_VF8_M8 */ 52541, /* PseudoVSEXT_VF8_M8_MASK */ 52545, /* PseudoVSEXT_VF8_M8_TU */ 52552, /* PseudoVSLIDE1DOWN_VX_M1 */ 52557, /* PseudoVSLIDE1DOWN_VX_M1_MASK */ 52562, /* PseudoVSLIDE1DOWN_VX_M1_TU */ 52570, /* PseudoVSLIDE1DOWN_VX_M2 */ 52576, /* PseudoVSLIDE1DOWN_VX_M2_MASK */ 52581, /* PseudoVSLIDE1DOWN_VX_M2_TU */ 52589, /* PseudoVSLIDE1DOWN_VX_M4 */ 52595, /* PseudoVSLIDE1DOWN_VX_M4_MASK */ 52600, /* PseudoVSLIDE1DOWN_VX_M4_TU */ 52608, /* PseudoVSLIDE1DOWN_VX_M8 */ 52614, /* PseudoVSLIDE1DOWN_VX_M8_MASK */ 52619, /* PseudoVSLIDE1DOWN_VX_M8_TU */ 52627, /* PseudoVSLIDE1DOWN_VX_MF2 */ 52633, /* PseudoVSLIDE1DOWN_VX_MF2_MASK */ 52638, /* PseudoVSLIDE1DOWN_VX_MF2_TU */ 52646, /* PseudoVSLIDE1DOWN_VX_MF4 */ 52652, /* PseudoVSLIDE1DOWN_VX_MF4_MASK */ 52657, /* PseudoVSLIDE1DOWN_VX_MF4_TU */ 52665, /* PseudoVSLIDE1DOWN_VX_MF8 */ 52671, /* PseudoVSLIDE1DOWN_VX_MF8_MASK */ 52676, /* PseudoVSLIDE1DOWN_VX_MF8_TU */ 52684, /* PseudoVSLIDE1UP_VX_M1 */ 52690, /* PseudoVSLIDE1UP_VX_M1_MASK */ 52695, /* PseudoVSLIDE1UP_VX_M1_TU */ 52703, /* PseudoVSLIDE1UP_VX_M2 */ 52709, /* PseudoVSLIDE1UP_VX_M2_MASK */ 52714, /* PseudoVSLIDE1UP_VX_M2_TU */ 52722, /* PseudoVSLIDE1UP_VX_M4 */ 52728, /* PseudoVSLIDE1UP_VX_M4_MASK */ 52733, /* PseudoVSLIDE1UP_VX_M4_TU */ 52741, /* PseudoVSLIDE1UP_VX_M8 */ 52747, /* PseudoVSLIDE1UP_VX_M8_MASK */ 52752, /* PseudoVSLIDE1UP_VX_M8_TU */ 52760, /* PseudoVSLIDE1UP_VX_MF2 */ 52766, /* PseudoVSLIDE1UP_VX_MF2_MASK */ 52771, /* PseudoVSLIDE1UP_VX_MF2_TU */ 52779, /* PseudoVSLIDE1UP_VX_MF4 */ 52785, /* PseudoVSLIDE1UP_VX_MF4_MASK */ 52790, /* PseudoVSLIDE1UP_VX_MF4_TU */ 52798, /* PseudoVSLIDE1UP_VX_MF8 */ 52804, /* PseudoVSLIDE1UP_VX_MF8_MASK */ 52809, /* PseudoVSLIDE1UP_VX_MF8_TU */ 52817, /* PseudoVSLIDEDOWN_VI_M1 */ 52823, /* PseudoVSLIDEDOWN_VI_M1_MASK */ 52830, /* PseudoVSLIDEDOWN_VI_M2 */ 52838, /* PseudoVSLIDEDOWN_VI_M2_MASK */ 52845, /* PseudoVSLIDEDOWN_VI_M4 */ 52853, /* PseudoVSLIDEDOWN_VI_M4_MASK */ 52860, /* PseudoVSLIDEDOWN_VI_M8 */ 52868, /* PseudoVSLIDEDOWN_VI_M8_MASK */ 52875, /* PseudoVSLIDEDOWN_VI_MF2 */ 52883, /* PseudoVSLIDEDOWN_VI_MF2_MASK */ 52890, /* PseudoVSLIDEDOWN_VI_MF4 */ 52898, /* PseudoVSLIDEDOWN_VI_MF4_MASK */ 52905, /* PseudoVSLIDEDOWN_VI_MF8 */ 52913, /* PseudoVSLIDEDOWN_VI_MF8_MASK */ 52920, /* PseudoVSLIDEDOWN_VX_M1 */ 52928, /* PseudoVSLIDEDOWN_VX_M1_MASK */ 52935, /* PseudoVSLIDEDOWN_VX_M2 */ 52943, /* PseudoVSLIDEDOWN_VX_M2_MASK */ 52950, /* PseudoVSLIDEDOWN_VX_M4 */ 52958, /* PseudoVSLIDEDOWN_VX_M4_MASK */ 52965, /* PseudoVSLIDEDOWN_VX_M8 */ 52973, /* PseudoVSLIDEDOWN_VX_M8_MASK */ 52980, /* PseudoVSLIDEDOWN_VX_MF2 */ 52988, /* PseudoVSLIDEDOWN_VX_MF2_MASK */ 52995, /* PseudoVSLIDEDOWN_VX_MF4 */ 53003, /* PseudoVSLIDEDOWN_VX_MF4_MASK */ 53010, /* PseudoVSLIDEDOWN_VX_MF8 */ 53018, /* PseudoVSLIDEDOWN_VX_MF8_MASK */ 53025, /* PseudoVSLIDEUP_VI_M1 */ 53033, /* PseudoVSLIDEUP_VI_M1_MASK */ 53040, /* PseudoVSLIDEUP_VI_M2 */ 53048, /* PseudoVSLIDEUP_VI_M2_MASK */ 53055, /* PseudoVSLIDEUP_VI_M4 */ 53063, /* PseudoVSLIDEUP_VI_M4_MASK */ 53070, /* PseudoVSLIDEUP_VI_M8 */ 53078, /* PseudoVSLIDEUP_VI_M8_MASK */ 53085, /* PseudoVSLIDEUP_VI_MF2 */ 53093, /* PseudoVSLIDEUP_VI_MF2_MASK */ 53100, /* PseudoVSLIDEUP_VI_MF4 */ 53108, /* PseudoVSLIDEUP_VI_MF4_MASK */ 53115, /* PseudoVSLIDEUP_VI_MF8 */ 53123, /* PseudoVSLIDEUP_VI_MF8_MASK */ 53130, /* PseudoVSLIDEUP_VX_M1 */ 53138, /* PseudoVSLIDEUP_VX_M1_MASK */ 53145, /* PseudoVSLIDEUP_VX_M2 */ 53153, /* PseudoVSLIDEUP_VX_M2_MASK */ 53160, /* PseudoVSLIDEUP_VX_M4 */ 53168, /* PseudoVSLIDEUP_VX_M4_MASK */ 53175, /* PseudoVSLIDEUP_VX_M8 */ 53183, /* PseudoVSLIDEUP_VX_M8_MASK */ 53190, /* PseudoVSLIDEUP_VX_MF2 */ 53198, /* PseudoVSLIDEUP_VX_MF2_MASK */ 53205, /* PseudoVSLIDEUP_VX_MF4 */ 53213, /* PseudoVSLIDEUP_VX_MF4_MASK */ 53220, /* PseudoVSLIDEUP_VX_MF8 */ 53228, /* PseudoVSLIDEUP_VX_MF8_MASK */ 53235, /* PseudoVSLL_VI_M1 */ 53243, /* PseudoVSLL_VI_M1_MASK */ 53248, /* PseudoVSLL_VI_M1_TU */ 53256, /* PseudoVSLL_VI_M2 */ 53262, /* PseudoVSLL_VI_M2_MASK */ 53267, /* PseudoVSLL_VI_M2_TU */ 53275, /* PseudoVSLL_VI_M4 */ 53281, /* PseudoVSLL_VI_M4_MASK */ 53286, /* PseudoVSLL_VI_M4_TU */ 53294, /* PseudoVSLL_VI_M8 */ 53300, /* PseudoVSLL_VI_M8_MASK */ 53305, /* PseudoVSLL_VI_M8_TU */ 53313, /* PseudoVSLL_VI_MF2 */ 53319, /* PseudoVSLL_VI_MF2_MASK */ 53324, /* PseudoVSLL_VI_MF2_TU */ 53332, /* PseudoVSLL_VI_MF4 */ 53338, /* PseudoVSLL_VI_MF4_MASK */ 53343, /* PseudoVSLL_VI_MF4_TU */ 53351, /* PseudoVSLL_VI_MF8 */ 53357, /* PseudoVSLL_VI_MF8_MASK */ 53362, /* PseudoVSLL_VI_MF8_TU */ 53370, /* PseudoVSLL_VV_M1 */ 53376, /* PseudoVSLL_VV_M1_MASK */ 53381, /* PseudoVSLL_VV_M1_TU */ 53389, /* PseudoVSLL_VV_M2 */ 53395, /* PseudoVSLL_VV_M2_MASK */ 53400, /* PseudoVSLL_VV_M2_TU */ 53408, /* PseudoVSLL_VV_M4 */ 53414, /* PseudoVSLL_VV_M4_MASK */ 53419, /* PseudoVSLL_VV_M4_TU */ 53427, /* PseudoVSLL_VV_M8 */ 53433, /* PseudoVSLL_VV_M8_MASK */ 53438, /* PseudoVSLL_VV_M8_TU */ 53446, /* PseudoVSLL_VV_MF2 */ 53452, /* PseudoVSLL_VV_MF2_MASK */ 53457, /* PseudoVSLL_VV_MF2_TU */ 53465, /* PseudoVSLL_VV_MF4 */ 53471, /* PseudoVSLL_VV_MF4_MASK */ 53476, /* PseudoVSLL_VV_MF4_TU */ 53484, /* PseudoVSLL_VV_MF8 */ 53490, /* PseudoVSLL_VV_MF8_MASK */ 53495, /* PseudoVSLL_VV_MF8_TU */ 53503, /* PseudoVSLL_VX_M1 */ 53509, /* PseudoVSLL_VX_M1_MASK */ 53514, /* PseudoVSLL_VX_M1_TU */ 53522, /* PseudoVSLL_VX_M2 */ 53528, /* PseudoVSLL_VX_M2_MASK */ 53533, /* PseudoVSLL_VX_M2_TU */ 53541, /* PseudoVSLL_VX_M4 */ 53547, /* PseudoVSLL_VX_M4_MASK */ 53552, /* PseudoVSLL_VX_M4_TU */ 53560, /* PseudoVSLL_VX_M8 */ 53566, /* PseudoVSLL_VX_M8_MASK */ 53571, /* PseudoVSLL_VX_M8_TU */ 53579, /* PseudoVSLL_VX_MF2 */ 53585, /* PseudoVSLL_VX_MF2_MASK */ 53590, /* PseudoVSLL_VX_MF2_TU */ 53598, /* PseudoVSLL_VX_MF4 */ 53604, /* PseudoVSLL_VX_MF4_MASK */ 53609, /* PseudoVSLL_VX_MF4_TU */ 53617, /* PseudoVSLL_VX_MF8 */ 53623, /* PseudoVSLL_VX_MF8_MASK */ 53628, /* PseudoVSLL_VX_MF8_TU */ 53636, /* PseudoVSMUL_VV_M1 */ 53642, /* PseudoVSMUL_VV_M1_MASK */ 53647, /* PseudoVSMUL_VV_M1_TU */ 53655, /* PseudoVSMUL_VV_M2 */ 53661, /* PseudoVSMUL_VV_M2_MASK */ 53666, /* PseudoVSMUL_VV_M2_TU */ 53674, /* PseudoVSMUL_VV_M4 */ 53680, /* PseudoVSMUL_VV_M4_MASK */ 53685, /* PseudoVSMUL_VV_M4_TU */ 53693, /* PseudoVSMUL_VV_M8 */ 53699, /* PseudoVSMUL_VV_M8_MASK */ 53704, /* PseudoVSMUL_VV_M8_TU */ 53712, /* PseudoVSMUL_VV_MF2 */ 53718, /* PseudoVSMUL_VV_MF2_MASK */ 53723, /* PseudoVSMUL_VV_MF2_TU */ 53731, /* PseudoVSMUL_VV_MF4 */ 53737, /* PseudoVSMUL_VV_MF4_MASK */ 53742, /* PseudoVSMUL_VV_MF4_TU */ 53750, /* PseudoVSMUL_VV_MF8 */ 53756, /* PseudoVSMUL_VV_MF8_MASK */ 53761, /* PseudoVSMUL_VV_MF8_TU */ 53769, /* PseudoVSMUL_VX_M1 */ 53775, /* PseudoVSMUL_VX_M1_MASK */ 53780, /* PseudoVSMUL_VX_M1_TU */ 53788, /* PseudoVSMUL_VX_M2 */ 53794, /* PseudoVSMUL_VX_M2_MASK */ 53799, /* PseudoVSMUL_VX_M2_TU */ 53807, /* PseudoVSMUL_VX_M4 */ 53813, /* PseudoVSMUL_VX_M4_MASK */ 53818, /* PseudoVSMUL_VX_M4_TU */ 53826, /* PseudoVSMUL_VX_M8 */ 53832, /* PseudoVSMUL_VX_M8_MASK */ 53837, /* PseudoVSMUL_VX_M8_TU */ 53845, /* PseudoVSMUL_VX_MF2 */ 53851, /* PseudoVSMUL_VX_MF2_MASK */ 53856, /* PseudoVSMUL_VX_MF2_TU */ 53864, /* PseudoVSMUL_VX_MF4 */ 53870, /* PseudoVSMUL_VX_MF4_MASK */ 53875, /* PseudoVSMUL_VX_MF4_TU */ 53883, /* PseudoVSMUL_VX_MF8 */ 53889, /* PseudoVSMUL_VX_MF8_MASK */ 53894, /* PseudoVSMUL_VX_MF8_TU */ 53902, /* PseudoVSM_V_B1 */ 53908, /* PseudoVSM_V_B16 */ 53912, /* PseudoVSM_V_B2 */ 53916, /* PseudoVSM_V_B32 */ 53920, /* PseudoVSM_V_B4 */ 53924, /* PseudoVSM_V_B64 */ 53928, /* PseudoVSM_V_B8 */ 53932, /* PseudoVSOXEI16_V_M1_M1 */ 53936, /* PseudoVSOXEI16_V_M1_M1_MASK */ 53941, /* PseudoVSOXEI16_V_M1_M2 */ 53947, /* PseudoVSOXEI16_V_M1_M2_MASK */ 53952, /* PseudoVSOXEI16_V_M1_M4 */ 53958, /* PseudoVSOXEI16_V_M1_M4_MASK */ 53963, /* PseudoVSOXEI16_V_M1_MF2 */ 53969, /* PseudoVSOXEI16_V_M1_MF2_MASK */ 53974, /* PseudoVSOXEI16_V_M2_M1 */ 53980, /* PseudoVSOXEI16_V_M2_M1_MASK */ 53985, /* PseudoVSOXEI16_V_M2_M2 */ 53991, /* PseudoVSOXEI16_V_M2_M2_MASK */ 53996, /* PseudoVSOXEI16_V_M2_M4 */ 54002, /* PseudoVSOXEI16_V_M2_M4_MASK */ 54007, /* PseudoVSOXEI16_V_M2_M8 */ 54013, /* PseudoVSOXEI16_V_M2_M8_MASK */ 54018, /* PseudoVSOXEI16_V_M4_M2 */ 54024, /* PseudoVSOXEI16_V_M4_M2_MASK */ 54029, /* PseudoVSOXEI16_V_M4_M4 */ 54035, /* PseudoVSOXEI16_V_M4_M4_MASK */ 54040, /* PseudoVSOXEI16_V_M4_M8 */ 54046, /* PseudoVSOXEI16_V_M4_M8_MASK */ 54051, /* PseudoVSOXEI16_V_M8_M4 */ 54057, /* PseudoVSOXEI16_V_M8_M4_MASK */ 54062, /* PseudoVSOXEI16_V_M8_M8 */ 54068, /* PseudoVSOXEI16_V_M8_M8_MASK */ 54073, /* PseudoVSOXEI16_V_MF2_M1 */ 54079, /* PseudoVSOXEI16_V_MF2_M1_MASK */ 54084, /* PseudoVSOXEI16_V_MF2_M2 */ 54090, /* PseudoVSOXEI16_V_MF2_M2_MASK */ 54095, /* PseudoVSOXEI16_V_MF2_MF2 */ 54101, /* PseudoVSOXEI16_V_MF2_MF2_MASK */ 54106, /* PseudoVSOXEI16_V_MF2_MF4 */ 54112, /* PseudoVSOXEI16_V_MF2_MF4_MASK */ 54117, /* PseudoVSOXEI16_V_MF4_M1 */ 54123, /* PseudoVSOXEI16_V_MF4_M1_MASK */ 54128, /* PseudoVSOXEI16_V_MF4_MF2 */ 54134, /* PseudoVSOXEI16_V_MF4_MF2_MASK */ 54139, /* PseudoVSOXEI16_V_MF4_MF4 */ 54145, /* PseudoVSOXEI16_V_MF4_MF4_MASK */ 54150, /* PseudoVSOXEI16_V_MF4_MF8 */ 54156, /* PseudoVSOXEI16_V_MF4_MF8_MASK */ 54161, /* PseudoVSOXEI32_V_M1_M1 */ 54167, /* PseudoVSOXEI32_V_M1_M1_MASK */ 54172, /* PseudoVSOXEI32_V_M1_M2 */ 54178, /* PseudoVSOXEI32_V_M1_M2_MASK */ 54183, /* PseudoVSOXEI32_V_M1_MF2 */ 54189, /* PseudoVSOXEI32_V_M1_MF2_MASK */ 54194, /* PseudoVSOXEI32_V_M1_MF4 */ 54200, /* PseudoVSOXEI32_V_M1_MF4_MASK */ 54205, /* PseudoVSOXEI32_V_M2_M1 */ 54211, /* PseudoVSOXEI32_V_M2_M1_MASK */ 54216, /* PseudoVSOXEI32_V_M2_M2 */ 54222, /* PseudoVSOXEI32_V_M2_M2_MASK */ 54227, /* PseudoVSOXEI32_V_M2_M4 */ 54233, /* PseudoVSOXEI32_V_M2_M4_MASK */ 54238, /* PseudoVSOXEI32_V_M2_MF2 */ 54244, /* PseudoVSOXEI32_V_M2_MF2_MASK */ 54249, /* PseudoVSOXEI32_V_M4_M1 */ 54255, /* PseudoVSOXEI32_V_M4_M1_MASK */ 54260, /* PseudoVSOXEI32_V_M4_M2 */ 54266, /* PseudoVSOXEI32_V_M4_M2_MASK */ 54271, /* PseudoVSOXEI32_V_M4_M4 */ 54277, /* PseudoVSOXEI32_V_M4_M4_MASK */ 54282, /* PseudoVSOXEI32_V_M4_M8 */ 54288, /* PseudoVSOXEI32_V_M4_M8_MASK */ 54293, /* PseudoVSOXEI32_V_M8_M2 */ 54299, /* PseudoVSOXEI32_V_M8_M2_MASK */ 54304, /* PseudoVSOXEI32_V_M8_M4 */ 54310, /* PseudoVSOXEI32_V_M8_M4_MASK */ 54315, /* PseudoVSOXEI32_V_M8_M8 */ 54321, /* PseudoVSOXEI32_V_M8_M8_MASK */ 54326, /* PseudoVSOXEI32_V_MF2_M1 */ 54332, /* PseudoVSOXEI32_V_MF2_M1_MASK */ 54337, /* PseudoVSOXEI32_V_MF2_MF2 */ 54343, /* PseudoVSOXEI32_V_MF2_MF2_MASK */ 54348, /* PseudoVSOXEI32_V_MF2_MF4 */ 54354, /* PseudoVSOXEI32_V_MF2_MF4_MASK */ 54359, /* PseudoVSOXEI32_V_MF2_MF8 */ 54365, /* PseudoVSOXEI32_V_MF2_MF8_MASK */ 54370, /* PseudoVSOXEI64_V_M1_M1 */ 54376, /* PseudoVSOXEI64_V_M1_M1_MASK */ 54381, /* PseudoVSOXEI64_V_M1_MF2 */ 54387, /* PseudoVSOXEI64_V_M1_MF2_MASK */ 54392, /* PseudoVSOXEI64_V_M1_MF4 */ 54398, /* PseudoVSOXEI64_V_M1_MF4_MASK */ 54403, /* PseudoVSOXEI64_V_M1_MF8 */ 54409, /* PseudoVSOXEI64_V_M1_MF8_MASK */ 54414, /* PseudoVSOXEI64_V_M2_M1 */ 54420, /* PseudoVSOXEI64_V_M2_M1_MASK */ 54425, /* PseudoVSOXEI64_V_M2_M2 */ 54431, /* PseudoVSOXEI64_V_M2_M2_MASK */ 54436, /* PseudoVSOXEI64_V_M2_MF2 */ 54442, /* PseudoVSOXEI64_V_M2_MF2_MASK */ 54447, /* PseudoVSOXEI64_V_M2_MF4 */ 54453, /* PseudoVSOXEI64_V_M2_MF4_MASK */ 54458, /* PseudoVSOXEI64_V_M4_M1 */ 54464, /* PseudoVSOXEI64_V_M4_M1_MASK */ 54469, /* PseudoVSOXEI64_V_M4_M2 */ 54475, /* PseudoVSOXEI64_V_M4_M2_MASK */ 54480, /* PseudoVSOXEI64_V_M4_M4 */ 54486, /* PseudoVSOXEI64_V_M4_M4_MASK */ 54491, /* PseudoVSOXEI64_V_M4_MF2 */ 54497, /* PseudoVSOXEI64_V_M4_MF2_MASK */ 54502, /* PseudoVSOXEI64_V_M8_M1 */ 54508, /* PseudoVSOXEI64_V_M8_M1_MASK */ 54513, /* PseudoVSOXEI64_V_M8_M2 */ 54519, /* PseudoVSOXEI64_V_M8_M2_MASK */ 54524, /* PseudoVSOXEI64_V_M8_M4 */ 54530, /* PseudoVSOXEI64_V_M8_M4_MASK */ 54535, /* PseudoVSOXEI64_V_M8_M8 */ 54541, /* PseudoVSOXEI64_V_M8_M8_MASK */ 54546, /* PseudoVSOXEI8_V_M1_M1 */ 54552, /* PseudoVSOXEI8_V_M1_M1_MASK */ 54557, /* PseudoVSOXEI8_V_M1_M2 */ 54563, /* PseudoVSOXEI8_V_M1_M2_MASK */ 54568, /* PseudoVSOXEI8_V_M1_M4 */ 54574, /* PseudoVSOXEI8_V_M1_M4_MASK */ 54579, /* PseudoVSOXEI8_V_M1_M8 */ 54585, /* PseudoVSOXEI8_V_M1_M8_MASK */ 54590, /* PseudoVSOXEI8_V_M2_M2 */ 54596, /* PseudoVSOXEI8_V_M2_M2_MASK */ 54601, /* PseudoVSOXEI8_V_M2_M4 */ 54607, /* PseudoVSOXEI8_V_M2_M4_MASK */ 54612, /* PseudoVSOXEI8_V_M2_M8 */ 54618, /* PseudoVSOXEI8_V_M2_M8_MASK */ 54623, /* PseudoVSOXEI8_V_M4_M4 */ 54629, /* PseudoVSOXEI8_V_M4_M4_MASK */ 54634, /* PseudoVSOXEI8_V_M4_M8 */ 54640, /* PseudoVSOXEI8_V_M4_M8_MASK */ 54645, /* PseudoVSOXEI8_V_M8_M8 */ 54651, /* PseudoVSOXEI8_V_M8_M8_MASK */ 54656, /* PseudoVSOXEI8_V_MF2_M1 */ 54662, /* PseudoVSOXEI8_V_MF2_M1_MASK */ 54667, /* PseudoVSOXEI8_V_MF2_M2 */ 54673, /* PseudoVSOXEI8_V_MF2_M2_MASK */ 54678, /* PseudoVSOXEI8_V_MF2_M4 */ 54684, /* PseudoVSOXEI8_V_MF2_M4_MASK */ 54689, /* PseudoVSOXEI8_V_MF2_MF2 */ 54695, /* PseudoVSOXEI8_V_MF2_MF2_MASK */ 54700, /* PseudoVSOXEI8_V_MF4_M1 */ 54706, /* PseudoVSOXEI8_V_MF4_M1_MASK */ 54711, /* PseudoVSOXEI8_V_MF4_M2 */ 54717, /* PseudoVSOXEI8_V_MF4_M2_MASK */ 54722, /* PseudoVSOXEI8_V_MF4_MF2 */ 54728, /* PseudoVSOXEI8_V_MF4_MF2_MASK */ 54733, /* PseudoVSOXEI8_V_MF4_MF4 */ 54739, /* PseudoVSOXEI8_V_MF4_MF4_MASK */ 54744, /* PseudoVSOXEI8_V_MF8_M1 */ 54750, /* PseudoVSOXEI8_V_MF8_M1_MASK */ 54755, /* PseudoVSOXEI8_V_MF8_MF2 */ 54761, /* PseudoVSOXEI8_V_MF8_MF2_MASK */ 54766, /* PseudoVSOXEI8_V_MF8_MF4 */ 54772, /* PseudoVSOXEI8_V_MF8_MF4_MASK */ 54777, /* PseudoVSOXEI8_V_MF8_MF8 */ 54783, /* PseudoVSOXEI8_V_MF8_MF8_MASK */ 54788, /* PseudoVSOXSEG2EI16_V_M1_M1 */ 54794, /* PseudoVSOXSEG2EI16_V_M1_M1_MASK */ 54799, /* PseudoVSOXSEG2EI16_V_M1_M2 */ 54805, /* PseudoVSOXSEG2EI16_V_M1_M2_MASK */ 54810, /* PseudoVSOXSEG2EI16_V_M1_M4 */ 54816, /* PseudoVSOXSEG2EI16_V_M1_M4_MASK */ 54821, /* PseudoVSOXSEG2EI16_V_M1_MF2 */ 54827, /* PseudoVSOXSEG2EI16_V_M1_MF2_MASK */ 54832, /* PseudoVSOXSEG2EI16_V_M2_M1 */ 54838, /* PseudoVSOXSEG2EI16_V_M2_M1_MASK */ 54843, /* PseudoVSOXSEG2EI16_V_M2_M2 */ 54849, /* PseudoVSOXSEG2EI16_V_M2_M2_MASK */ 54854, /* PseudoVSOXSEG2EI16_V_M2_M4 */ 54860, /* PseudoVSOXSEG2EI16_V_M2_M4_MASK */ 54865, /* PseudoVSOXSEG2EI16_V_M4_M2 */ 54871, /* PseudoVSOXSEG2EI16_V_M4_M2_MASK */ 54876, /* PseudoVSOXSEG2EI16_V_M4_M4 */ 54882, /* PseudoVSOXSEG2EI16_V_M4_M4_MASK */ 54887, /* PseudoVSOXSEG2EI16_V_M8_M4 */ 54893, /* PseudoVSOXSEG2EI16_V_M8_M4_MASK */ 54898, /* PseudoVSOXSEG2EI16_V_MF2_M1 */ 54904, /* PseudoVSOXSEG2EI16_V_MF2_M1_MASK */ 54909, /* PseudoVSOXSEG2EI16_V_MF2_M2 */ 54915, /* PseudoVSOXSEG2EI16_V_MF2_M2_MASK */ 54920, /* PseudoVSOXSEG2EI16_V_MF2_MF2 */ 54926, /* PseudoVSOXSEG2EI16_V_MF2_MF2_MASK */ 54931, /* PseudoVSOXSEG2EI16_V_MF2_MF4 */ 54937, /* PseudoVSOXSEG2EI16_V_MF2_MF4_MASK */ 54942, /* PseudoVSOXSEG2EI16_V_MF4_M1 */ 54948, /* PseudoVSOXSEG2EI16_V_MF4_M1_MASK */ 54953, /* PseudoVSOXSEG2EI16_V_MF4_MF2 */ 54959, /* PseudoVSOXSEG2EI16_V_MF4_MF2_MASK */ 54964, /* PseudoVSOXSEG2EI16_V_MF4_MF4 */ 54970, /* PseudoVSOXSEG2EI16_V_MF4_MF4_MASK */ 54975, /* PseudoVSOXSEG2EI16_V_MF4_MF8 */ 54981, /* PseudoVSOXSEG2EI16_V_MF4_MF8_MASK */ 54986, /* PseudoVSOXSEG2EI32_V_M1_M1 */ 54992, /* PseudoVSOXSEG2EI32_V_M1_M1_MASK */ 54997, /* PseudoVSOXSEG2EI32_V_M1_M2 */ 55003, /* PseudoVSOXSEG2EI32_V_M1_M2_MASK */ 55008, /* PseudoVSOXSEG2EI32_V_M1_MF2 */ 55014, /* PseudoVSOXSEG2EI32_V_M1_MF2_MASK */ 55019, /* PseudoVSOXSEG2EI32_V_M1_MF4 */ 55025, /* PseudoVSOXSEG2EI32_V_M1_MF4_MASK */ 55030, /* PseudoVSOXSEG2EI32_V_M2_M1 */ 55036, /* PseudoVSOXSEG2EI32_V_M2_M1_MASK */ 55041, /* PseudoVSOXSEG2EI32_V_M2_M2 */ 55047, /* PseudoVSOXSEG2EI32_V_M2_M2_MASK */ 55052, /* PseudoVSOXSEG2EI32_V_M2_M4 */ 55058, /* PseudoVSOXSEG2EI32_V_M2_M4_MASK */ 55063, /* PseudoVSOXSEG2EI32_V_M2_MF2 */ 55069, /* PseudoVSOXSEG2EI32_V_M2_MF2_MASK */ 55074, /* PseudoVSOXSEG2EI32_V_M4_M1 */ 55080, /* PseudoVSOXSEG2EI32_V_M4_M1_MASK */ 55085, /* PseudoVSOXSEG2EI32_V_M4_M2 */ 55091, /* PseudoVSOXSEG2EI32_V_M4_M2_MASK */ 55096, /* PseudoVSOXSEG2EI32_V_M4_M4 */ 55102, /* PseudoVSOXSEG2EI32_V_M4_M4_MASK */ 55107, /* PseudoVSOXSEG2EI32_V_M8_M2 */ 55113, /* PseudoVSOXSEG2EI32_V_M8_M2_MASK */ 55118, /* PseudoVSOXSEG2EI32_V_M8_M4 */ 55124, /* PseudoVSOXSEG2EI32_V_M8_M4_MASK */ 55129, /* PseudoVSOXSEG2EI32_V_MF2_M1 */ 55135, /* PseudoVSOXSEG2EI32_V_MF2_M1_MASK */ 55140, /* PseudoVSOXSEG2EI32_V_MF2_MF2 */ 55146, /* PseudoVSOXSEG2EI32_V_MF2_MF2_MASK */ 55151, /* PseudoVSOXSEG2EI32_V_MF2_MF4 */ 55157, /* PseudoVSOXSEG2EI32_V_MF2_MF4_MASK */ 55162, /* PseudoVSOXSEG2EI32_V_MF2_MF8 */ 55168, /* PseudoVSOXSEG2EI32_V_MF2_MF8_MASK */ 55173, /* PseudoVSOXSEG2EI64_V_M1_M1 */ 55179, /* PseudoVSOXSEG2EI64_V_M1_M1_MASK */ 55184, /* PseudoVSOXSEG2EI64_V_M1_MF2 */ 55190, /* PseudoVSOXSEG2EI64_V_M1_MF2_MASK */ 55195, /* PseudoVSOXSEG2EI64_V_M1_MF4 */ 55201, /* PseudoVSOXSEG2EI64_V_M1_MF4_MASK */ 55206, /* PseudoVSOXSEG2EI64_V_M1_MF8 */ 55212, /* PseudoVSOXSEG2EI64_V_M1_MF8_MASK */ 55217, /* PseudoVSOXSEG2EI64_V_M2_M1 */ 55223, /* PseudoVSOXSEG2EI64_V_M2_M1_MASK */ 55228, /* PseudoVSOXSEG2EI64_V_M2_M2 */ 55234, /* PseudoVSOXSEG2EI64_V_M2_M2_MASK */ 55239, /* PseudoVSOXSEG2EI64_V_M2_MF2 */ 55245, /* PseudoVSOXSEG2EI64_V_M2_MF2_MASK */ 55250, /* PseudoVSOXSEG2EI64_V_M2_MF4 */ 55256, /* PseudoVSOXSEG2EI64_V_M2_MF4_MASK */ 55261, /* PseudoVSOXSEG2EI64_V_M4_M1 */ 55267, /* PseudoVSOXSEG2EI64_V_M4_M1_MASK */ 55272, /* PseudoVSOXSEG2EI64_V_M4_M2 */ 55278, /* PseudoVSOXSEG2EI64_V_M4_M2_MASK */ 55283, /* PseudoVSOXSEG2EI64_V_M4_M4 */ 55289, /* PseudoVSOXSEG2EI64_V_M4_M4_MASK */ 55294, /* PseudoVSOXSEG2EI64_V_M4_MF2 */ 55300, /* PseudoVSOXSEG2EI64_V_M4_MF2_MASK */ 55305, /* PseudoVSOXSEG2EI64_V_M8_M1 */ 55311, /* PseudoVSOXSEG2EI64_V_M8_M1_MASK */ 55316, /* PseudoVSOXSEG2EI64_V_M8_M2 */ 55322, /* PseudoVSOXSEG2EI64_V_M8_M2_MASK */ 55327, /* PseudoVSOXSEG2EI64_V_M8_M4 */ 55333, /* PseudoVSOXSEG2EI64_V_M8_M4_MASK */ 55338, /* PseudoVSOXSEG2EI8_V_M1_M1 */ 55344, /* PseudoVSOXSEG2EI8_V_M1_M1_MASK */ 55349, /* PseudoVSOXSEG2EI8_V_M1_M2 */ 55355, /* PseudoVSOXSEG2EI8_V_M1_M2_MASK */ 55360, /* PseudoVSOXSEG2EI8_V_M1_M4 */ 55366, /* PseudoVSOXSEG2EI8_V_M1_M4_MASK */ 55371, /* PseudoVSOXSEG2EI8_V_M2_M2 */ 55377, /* PseudoVSOXSEG2EI8_V_M2_M2_MASK */ 55382, /* PseudoVSOXSEG2EI8_V_M2_M4 */ 55388, /* PseudoVSOXSEG2EI8_V_M2_M4_MASK */ 55393, /* PseudoVSOXSEG2EI8_V_M4_M4 */ 55399, /* PseudoVSOXSEG2EI8_V_M4_M4_MASK */ 55404, /* PseudoVSOXSEG2EI8_V_MF2_M1 */ 55410, /* PseudoVSOXSEG2EI8_V_MF2_M1_MASK */ 55415, /* PseudoVSOXSEG2EI8_V_MF2_M2 */ 55421, /* PseudoVSOXSEG2EI8_V_MF2_M2_MASK */ 55426, /* PseudoVSOXSEG2EI8_V_MF2_M4 */ 55432, /* PseudoVSOXSEG2EI8_V_MF2_M4_MASK */ 55437, /* PseudoVSOXSEG2EI8_V_MF2_MF2 */ 55443, /* PseudoVSOXSEG2EI8_V_MF2_MF2_MASK */ 55448, /* PseudoVSOXSEG2EI8_V_MF4_M1 */ 55454, /* PseudoVSOXSEG2EI8_V_MF4_M1_MASK */ 55459, /* PseudoVSOXSEG2EI8_V_MF4_M2 */ 55465, /* PseudoVSOXSEG2EI8_V_MF4_M2_MASK */ 55470, /* PseudoVSOXSEG2EI8_V_MF4_MF2 */ 55476, /* PseudoVSOXSEG2EI8_V_MF4_MF2_MASK */ 55481, /* PseudoVSOXSEG2EI8_V_MF4_MF4 */ 55487, /* PseudoVSOXSEG2EI8_V_MF4_MF4_MASK */ 55492, /* PseudoVSOXSEG2EI8_V_MF8_M1 */ 55498, /* PseudoVSOXSEG2EI8_V_MF8_M1_MASK */ 55503, /* PseudoVSOXSEG2EI8_V_MF8_MF2 */ 55509, /* PseudoVSOXSEG2EI8_V_MF8_MF2_MASK */ 55514, /* PseudoVSOXSEG2EI8_V_MF8_MF4 */ 55520, /* PseudoVSOXSEG2EI8_V_MF8_MF4_MASK */ 55525, /* PseudoVSOXSEG2EI8_V_MF8_MF8 */ 55531, /* PseudoVSOXSEG2EI8_V_MF8_MF8_MASK */ 55536, /* PseudoVSOXSEG3EI16_V_M1_M1 */ 55542, /* PseudoVSOXSEG3EI16_V_M1_M1_MASK */ 55547, /* PseudoVSOXSEG3EI16_V_M1_M2 */ 55553, /* PseudoVSOXSEG3EI16_V_M1_M2_MASK */ 55558, /* PseudoVSOXSEG3EI16_V_M1_MF2 */ 55564, /* PseudoVSOXSEG3EI16_V_M1_MF2_MASK */ 55569, /* PseudoVSOXSEG3EI16_V_M2_M1 */ 55575, /* PseudoVSOXSEG3EI16_V_M2_M1_MASK */ 55580, /* PseudoVSOXSEG3EI16_V_M2_M2 */ 55586, /* PseudoVSOXSEG3EI16_V_M2_M2_MASK */ 55591, /* PseudoVSOXSEG3EI16_V_M4_M2 */ 55597, /* PseudoVSOXSEG3EI16_V_M4_M2_MASK */ 55602, /* PseudoVSOXSEG3EI16_V_MF2_M1 */ 55608, /* PseudoVSOXSEG3EI16_V_MF2_M1_MASK */ 55613, /* PseudoVSOXSEG3EI16_V_MF2_M2 */ 55619, /* PseudoVSOXSEG3EI16_V_MF2_M2_MASK */ 55624, /* PseudoVSOXSEG3EI16_V_MF2_MF2 */ 55630, /* PseudoVSOXSEG3EI16_V_MF2_MF2_MASK */ 55635, /* PseudoVSOXSEG3EI16_V_MF2_MF4 */ 55641, /* PseudoVSOXSEG3EI16_V_MF2_MF4_MASK */ 55646, /* PseudoVSOXSEG3EI16_V_MF4_M1 */ 55652, /* PseudoVSOXSEG3EI16_V_MF4_M1_MASK */ 55657, /* PseudoVSOXSEG3EI16_V_MF4_MF2 */ 55663, /* PseudoVSOXSEG3EI16_V_MF4_MF2_MASK */ 55668, /* PseudoVSOXSEG3EI16_V_MF4_MF4 */ 55674, /* PseudoVSOXSEG3EI16_V_MF4_MF4_MASK */ 55679, /* PseudoVSOXSEG3EI16_V_MF4_MF8 */ 55685, /* PseudoVSOXSEG3EI16_V_MF4_MF8_MASK */ 55690, /* PseudoVSOXSEG3EI32_V_M1_M1 */ 55696, /* PseudoVSOXSEG3EI32_V_M1_M1_MASK */ 55701, /* PseudoVSOXSEG3EI32_V_M1_M2 */ 55707, /* PseudoVSOXSEG3EI32_V_M1_M2_MASK */ 55712, /* PseudoVSOXSEG3EI32_V_M1_MF2 */ 55718, /* PseudoVSOXSEG3EI32_V_M1_MF2_MASK */ 55723, /* PseudoVSOXSEG3EI32_V_M1_MF4 */ 55729, /* PseudoVSOXSEG3EI32_V_M1_MF4_MASK */ 55734, /* PseudoVSOXSEG3EI32_V_M2_M1 */ 55740, /* PseudoVSOXSEG3EI32_V_M2_M1_MASK */ 55745, /* PseudoVSOXSEG3EI32_V_M2_M2 */ 55751, /* PseudoVSOXSEG3EI32_V_M2_M2_MASK */ 55756, /* PseudoVSOXSEG3EI32_V_M2_MF2 */ 55762, /* PseudoVSOXSEG3EI32_V_M2_MF2_MASK */ 55767, /* PseudoVSOXSEG3EI32_V_M4_M1 */ 55773, /* PseudoVSOXSEG3EI32_V_M4_M1_MASK */ 55778, /* PseudoVSOXSEG3EI32_V_M4_M2 */ 55784, /* PseudoVSOXSEG3EI32_V_M4_M2_MASK */ 55789, /* PseudoVSOXSEG3EI32_V_M8_M2 */ 55795, /* PseudoVSOXSEG3EI32_V_M8_M2_MASK */ 55800, /* PseudoVSOXSEG3EI32_V_MF2_M1 */ 55806, /* PseudoVSOXSEG3EI32_V_MF2_M1_MASK */ 55811, /* PseudoVSOXSEG3EI32_V_MF2_MF2 */ 55817, /* PseudoVSOXSEG3EI32_V_MF2_MF2_MASK */ 55822, /* PseudoVSOXSEG3EI32_V_MF2_MF4 */ 55828, /* PseudoVSOXSEG3EI32_V_MF2_MF4_MASK */ 55833, /* PseudoVSOXSEG3EI32_V_MF2_MF8 */ 55839, /* PseudoVSOXSEG3EI32_V_MF2_MF8_MASK */ 55844, /* PseudoVSOXSEG3EI64_V_M1_M1 */ 55850, /* PseudoVSOXSEG3EI64_V_M1_M1_MASK */ 55855, /* PseudoVSOXSEG3EI64_V_M1_MF2 */ 55861, /* PseudoVSOXSEG3EI64_V_M1_MF2_MASK */ 55866, /* PseudoVSOXSEG3EI64_V_M1_MF4 */ 55872, /* PseudoVSOXSEG3EI64_V_M1_MF4_MASK */ 55877, /* PseudoVSOXSEG3EI64_V_M1_MF8 */ 55883, /* PseudoVSOXSEG3EI64_V_M1_MF8_MASK */ 55888, /* PseudoVSOXSEG3EI64_V_M2_M1 */ 55894, /* PseudoVSOXSEG3EI64_V_M2_M1_MASK */ 55899, /* PseudoVSOXSEG3EI64_V_M2_M2 */ 55905, /* PseudoVSOXSEG3EI64_V_M2_M2_MASK */ 55910, /* PseudoVSOXSEG3EI64_V_M2_MF2 */ 55916, /* PseudoVSOXSEG3EI64_V_M2_MF2_MASK */ 55921, /* PseudoVSOXSEG3EI64_V_M2_MF4 */ 55927, /* PseudoVSOXSEG3EI64_V_M2_MF4_MASK */ 55932, /* PseudoVSOXSEG3EI64_V_M4_M1 */ 55938, /* PseudoVSOXSEG3EI64_V_M4_M1_MASK */ 55943, /* PseudoVSOXSEG3EI64_V_M4_M2 */ 55949, /* PseudoVSOXSEG3EI64_V_M4_M2_MASK */ 55954, /* PseudoVSOXSEG3EI64_V_M4_MF2 */ 55960, /* PseudoVSOXSEG3EI64_V_M4_MF2_MASK */ 55965, /* PseudoVSOXSEG3EI64_V_M8_M1 */ 55971, /* PseudoVSOXSEG3EI64_V_M8_M1_MASK */ 55976, /* PseudoVSOXSEG3EI64_V_M8_M2 */ 55982, /* PseudoVSOXSEG3EI64_V_M8_M2_MASK */ 55987, /* PseudoVSOXSEG3EI8_V_M1_M1 */ 55993, /* PseudoVSOXSEG3EI8_V_M1_M1_MASK */ 55998, /* PseudoVSOXSEG3EI8_V_M1_M2 */ 56004, /* PseudoVSOXSEG3EI8_V_M1_M2_MASK */ 56009, /* PseudoVSOXSEG3EI8_V_M2_M2 */ 56015, /* PseudoVSOXSEG3EI8_V_M2_M2_MASK */ 56020, /* PseudoVSOXSEG3EI8_V_MF2_M1 */ 56026, /* PseudoVSOXSEG3EI8_V_MF2_M1_MASK */ 56031, /* PseudoVSOXSEG3EI8_V_MF2_M2 */ 56037, /* PseudoVSOXSEG3EI8_V_MF2_M2_MASK */ 56042, /* PseudoVSOXSEG3EI8_V_MF2_MF2 */ 56048, /* PseudoVSOXSEG3EI8_V_MF2_MF2_MASK */ 56053, /* PseudoVSOXSEG3EI8_V_MF4_M1 */ 56059, /* PseudoVSOXSEG3EI8_V_MF4_M1_MASK */ 56064, /* PseudoVSOXSEG3EI8_V_MF4_M2 */ 56070, /* PseudoVSOXSEG3EI8_V_MF4_M2_MASK */ 56075, /* PseudoVSOXSEG3EI8_V_MF4_MF2 */ 56081, /* PseudoVSOXSEG3EI8_V_MF4_MF2_MASK */ 56086, /* PseudoVSOXSEG3EI8_V_MF4_MF4 */ 56092, /* PseudoVSOXSEG3EI8_V_MF4_MF4_MASK */ 56097, /* PseudoVSOXSEG3EI8_V_MF8_M1 */ 56103, /* PseudoVSOXSEG3EI8_V_MF8_M1_MASK */ 56108, /* PseudoVSOXSEG3EI8_V_MF8_MF2 */ 56114, /* PseudoVSOXSEG3EI8_V_MF8_MF2_MASK */ 56119, /* PseudoVSOXSEG3EI8_V_MF8_MF4 */ 56125, /* PseudoVSOXSEG3EI8_V_MF8_MF4_MASK */ 56130, /* PseudoVSOXSEG3EI8_V_MF8_MF8 */ 56136, /* PseudoVSOXSEG3EI8_V_MF8_MF8_MASK */ 56141, /* PseudoVSOXSEG4EI16_V_M1_M1 */ 56147, /* PseudoVSOXSEG4EI16_V_M1_M1_MASK */ 56152, /* PseudoVSOXSEG4EI16_V_M1_M2 */ 56158, /* PseudoVSOXSEG4EI16_V_M1_M2_MASK */ 56163, /* PseudoVSOXSEG4EI16_V_M1_MF2 */ 56169, /* PseudoVSOXSEG4EI16_V_M1_MF2_MASK */ 56174, /* PseudoVSOXSEG4EI16_V_M2_M1 */ 56180, /* PseudoVSOXSEG4EI16_V_M2_M1_MASK */ 56185, /* PseudoVSOXSEG4EI16_V_M2_M2 */ 56191, /* PseudoVSOXSEG4EI16_V_M2_M2_MASK */ 56196, /* PseudoVSOXSEG4EI16_V_M4_M2 */ 56202, /* PseudoVSOXSEG4EI16_V_M4_M2_MASK */ 56207, /* PseudoVSOXSEG4EI16_V_MF2_M1 */ 56213, /* PseudoVSOXSEG4EI16_V_MF2_M1_MASK */ 56218, /* PseudoVSOXSEG4EI16_V_MF2_M2 */ 56224, /* PseudoVSOXSEG4EI16_V_MF2_M2_MASK */ 56229, /* PseudoVSOXSEG4EI16_V_MF2_MF2 */ 56235, /* PseudoVSOXSEG4EI16_V_MF2_MF2_MASK */ 56240, /* PseudoVSOXSEG4EI16_V_MF2_MF4 */ 56246, /* PseudoVSOXSEG4EI16_V_MF2_MF4_MASK */ 56251, /* PseudoVSOXSEG4EI16_V_MF4_M1 */ 56257, /* PseudoVSOXSEG4EI16_V_MF4_M1_MASK */ 56262, /* PseudoVSOXSEG4EI16_V_MF4_MF2 */ 56268, /* PseudoVSOXSEG4EI16_V_MF4_MF2_MASK */ 56273, /* PseudoVSOXSEG4EI16_V_MF4_MF4 */ 56279, /* PseudoVSOXSEG4EI16_V_MF4_MF4_MASK */ 56284, /* PseudoVSOXSEG4EI16_V_MF4_MF8 */ 56290, /* PseudoVSOXSEG4EI16_V_MF4_MF8_MASK */ 56295, /* PseudoVSOXSEG4EI32_V_M1_M1 */ 56301, /* PseudoVSOXSEG4EI32_V_M1_M1_MASK */ 56306, /* PseudoVSOXSEG4EI32_V_M1_M2 */ 56312, /* PseudoVSOXSEG4EI32_V_M1_M2_MASK */ 56317, /* PseudoVSOXSEG4EI32_V_M1_MF2 */ 56323, /* PseudoVSOXSEG4EI32_V_M1_MF2_MASK */ 56328, /* PseudoVSOXSEG4EI32_V_M1_MF4 */ 56334, /* PseudoVSOXSEG4EI32_V_M1_MF4_MASK */ 56339, /* PseudoVSOXSEG4EI32_V_M2_M1 */ 56345, /* PseudoVSOXSEG4EI32_V_M2_M1_MASK */ 56350, /* PseudoVSOXSEG4EI32_V_M2_M2 */ 56356, /* PseudoVSOXSEG4EI32_V_M2_M2_MASK */ 56361, /* PseudoVSOXSEG4EI32_V_M2_MF2 */ 56367, /* PseudoVSOXSEG4EI32_V_M2_MF2_MASK */ 56372, /* PseudoVSOXSEG4EI32_V_M4_M1 */ 56378, /* PseudoVSOXSEG4EI32_V_M4_M1_MASK */ 56383, /* PseudoVSOXSEG4EI32_V_M4_M2 */ 56389, /* PseudoVSOXSEG4EI32_V_M4_M2_MASK */ 56394, /* PseudoVSOXSEG4EI32_V_M8_M2 */ 56400, /* PseudoVSOXSEG4EI32_V_M8_M2_MASK */ 56405, /* PseudoVSOXSEG4EI32_V_MF2_M1 */ 56411, /* PseudoVSOXSEG4EI32_V_MF2_M1_MASK */ 56416, /* PseudoVSOXSEG4EI32_V_MF2_MF2 */ 56422, /* PseudoVSOXSEG4EI32_V_MF2_MF2_MASK */ 56427, /* PseudoVSOXSEG4EI32_V_MF2_MF4 */ 56433, /* PseudoVSOXSEG4EI32_V_MF2_MF4_MASK */ 56438, /* PseudoVSOXSEG4EI32_V_MF2_MF8 */ 56444, /* PseudoVSOXSEG4EI32_V_MF2_MF8_MASK */ 56449, /* PseudoVSOXSEG4EI64_V_M1_M1 */ 56455, /* PseudoVSOXSEG4EI64_V_M1_M1_MASK */ 56460, /* PseudoVSOXSEG4EI64_V_M1_MF2 */ 56466, /* PseudoVSOXSEG4EI64_V_M1_MF2_MASK */ 56471, /* PseudoVSOXSEG4EI64_V_M1_MF4 */ 56477, /* PseudoVSOXSEG4EI64_V_M1_MF4_MASK */ 56482, /* PseudoVSOXSEG4EI64_V_M1_MF8 */ 56488, /* PseudoVSOXSEG4EI64_V_M1_MF8_MASK */ 56493, /* PseudoVSOXSEG4EI64_V_M2_M1 */ 56499, /* PseudoVSOXSEG4EI64_V_M2_M1_MASK */ 56504, /* PseudoVSOXSEG4EI64_V_M2_M2 */ 56510, /* PseudoVSOXSEG4EI64_V_M2_M2_MASK */ 56515, /* PseudoVSOXSEG4EI64_V_M2_MF2 */ 56521, /* PseudoVSOXSEG4EI64_V_M2_MF2_MASK */ 56526, /* PseudoVSOXSEG4EI64_V_M2_MF4 */ 56532, /* PseudoVSOXSEG4EI64_V_M2_MF4_MASK */ 56537, /* PseudoVSOXSEG4EI64_V_M4_M1 */ 56543, /* PseudoVSOXSEG4EI64_V_M4_M1_MASK */ 56548, /* PseudoVSOXSEG4EI64_V_M4_M2 */ 56554, /* PseudoVSOXSEG4EI64_V_M4_M2_MASK */ 56559, /* PseudoVSOXSEG4EI64_V_M4_MF2 */ 56565, /* PseudoVSOXSEG4EI64_V_M4_MF2_MASK */ 56570, /* PseudoVSOXSEG4EI64_V_M8_M1 */ 56576, /* PseudoVSOXSEG4EI64_V_M8_M1_MASK */ 56581, /* PseudoVSOXSEG4EI64_V_M8_M2 */ 56587, /* PseudoVSOXSEG4EI64_V_M8_M2_MASK */ 56592, /* PseudoVSOXSEG4EI8_V_M1_M1 */ 56598, /* PseudoVSOXSEG4EI8_V_M1_M1_MASK */ 56603, /* PseudoVSOXSEG4EI8_V_M1_M2 */ 56609, /* PseudoVSOXSEG4EI8_V_M1_M2_MASK */ 56614, /* PseudoVSOXSEG4EI8_V_M2_M2 */ 56620, /* PseudoVSOXSEG4EI8_V_M2_M2_MASK */ 56625, /* PseudoVSOXSEG4EI8_V_MF2_M1 */ 56631, /* PseudoVSOXSEG4EI8_V_MF2_M1_MASK */ 56636, /* PseudoVSOXSEG4EI8_V_MF2_M2 */ 56642, /* PseudoVSOXSEG4EI8_V_MF2_M2_MASK */ 56647, /* PseudoVSOXSEG4EI8_V_MF2_MF2 */ 56653, /* PseudoVSOXSEG4EI8_V_MF2_MF2_MASK */ 56658, /* PseudoVSOXSEG4EI8_V_MF4_M1 */ 56664, /* PseudoVSOXSEG4EI8_V_MF4_M1_MASK */ 56669, /* PseudoVSOXSEG4EI8_V_MF4_M2 */ 56675, /* PseudoVSOXSEG4EI8_V_MF4_M2_MASK */ 56680, /* PseudoVSOXSEG4EI8_V_MF4_MF2 */ 56686, /* PseudoVSOXSEG4EI8_V_MF4_MF2_MASK */ 56691, /* PseudoVSOXSEG4EI8_V_MF4_MF4 */ 56697, /* PseudoVSOXSEG4EI8_V_MF4_MF4_MASK */ 56702, /* PseudoVSOXSEG4EI8_V_MF8_M1 */ 56708, /* PseudoVSOXSEG4EI8_V_MF8_M1_MASK */ 56713, /* PseudoVSOXSEG4EI8_V_MF8_MF2 */ 56719, /* PseudoVSOXSEG4EI8_V_MF8_MF2_MASK */ 56724, /* PseudoVSOXSEG4EI8_V_MF8_MF4 */ 56730, /* PseudoVSOXSEG4EI8_V_MF8_MF4_MASK */ 56735, /* PseudoVSOXSEG4EI8_V_MF8_MF8 */ 56741, /* PseudoVSOXSEG4EI8_V_MF8_MF8_MASK */ 56746, /* PseudoVSOXSEG5EI16_V_M1_M1 */ 56752, /* PseudoVSOXSEG5EI16_V_M1_M1_MASK */ 56757, /* PseudoVSOXSEG5EI16_V_M1_MF2 */ 56763, /* PseudoVSOXSEG5EI16_V_M1_MF2_MASK */ 56768, /* PseudoVSOXSEG5EI16_V_M2_M1 */ 56774, /* PseudoVSOXSEG5EI16_V_M2_M1_MASK */ 56779, /* PseudoVSOXSEG5EI16_V_MF2_M1 */ 56785, /* PseudoVSOXSEG5EI16_V_MF2_M1_MASK */ 56790, /* PseudoVSOXSEG5EI16_V_MF2_MF2 */ 56796, /* PseudoVSOXSEG5EI16_V_MF2_MF2_MASK */ 56801, /* PseudoVSOXSEG5EI16_V_MF2_MF4 */ 56807, /* PseudoVSOXSEG5EI16_V_MF2_MF4_MASK */ 56812, /* PseudoVSOXSEG5EI16_V_MF4_M1 */ 56818, /* PseudoVSOXSEG5EI16_V_MF4_M1_MASK */ 56823, /* PseudoVSOXSEG5EI16_V_MF4_MF2 */ 56829, /* PseudoVSOXSEG5EI16_V_MF4_MF2_MASK */ 56834, /* PseudoVSOXSEG5EI16_V_MF4_MF4 */ 56840, /* PseudoVSOXSEG5EI16_V_MF4_MF4_MASK */ 56845, /* PseudoVSOXSEG5EI16_V_MF4_MF8 */ 56851, /* PseudoVSOXSEG5EI16_V_MF4_MF8_MASK */ 56856, /* PseudoVSOXSEG5EI32_V_M1_M1 */ 56862, /* PseudoVSOXSEG5EI32_V_M1_M1_MASK */ 56867, /* PseudoVSOXSEG5EI32_V_M1_MF2 */ 56873, /* PseudoVSOXSEG5EI32_V_M1_MF2_MASK */ 56878, /* PseudoVSOXSEG5EI32_V_M1_MF4 */ 56884, /* PseudoVSOXSEG5EI32_V_M1_MF4_MASK */ 56889, /* PseudoVSOXSEG5EI32_V_M2_M1 */ 56895, /* PseudoVSOXSEG5EI32_V_M2_M1_MASK */ 56900, /* PseudoVSOXSEG5EI32_V_M2_MF2 */ 56906, /* PseudoVSOXSEG5EI32_V_M2_MF2_MASK */ 56911, /* PseudoVSOXSEG5EI32_V_M4_M1 */ 56917, /* PseudoVSOXSEG5EI32_V_M4_M1_MASK */ 56922, /* PseudoVSOXSEG5EI32_V_MF2_M1 */ 56928, /* PseudoVSOXSEG5EI32_V_MF2_M1_MASK */ 56933, /* PseudoVSOXSEG5EI32_V_MF2_MF2 */ 56939, /* PseudoVSOXSEG5EI32_V_MF2_MF2_MASK */ 56944, /* PseudoVSOXSEG5EI32_V_MF2_MF4 */ 56950, /* PseudoVSOXSEG5EI32_V_MF2_MF4_MASK */ 56955, /* PseudoVSOXSEG5EI32_V_MF2_MF8 */ 56961, /* PseudoVSOXSEG5EI32_V_MF2_MF8_MASK */ 56966, /* PseudoVSOXSEG5EI64_V_M1_M1 */ 56972, /* PseudoVSOXSEG5EI64_V_M1_M1_MASK */ 56977, /* PseudoVSOXSEG5EI64_V_M1_MF2 */ 56983, /* PseudoVSOXSEG5EI64_V_M1_MF2_MASK */ 56988, /* PseudoVSOXSEG5EI64_V_M1_MF4 */ 56994, /* PseudoVSOXSEG5EI64_V_M1_MF4_MASK */ 56999, /* PseudoVSOXSEG5EI64_V_M1_MF8 */ 57005, /* PseudoVSOXSEG5EI64_V_M1_MF8_MASK */ 57010, /* PseudoVSOXSEG5EI64_V_M2_M1 */ 57016, /* PseudoVSOXSEG5EI64_V_M2_M1_MASK */ 57021, /* PseudoVSOXSEG5EI64_V_M2_MF2 */ 57027, /* PseudoVSOXSEG5EI64_V_M2_MF2_MASK */ 57032, /* PseudoVSOXSEG5EI64_V_M2_MF4 */ 57038, /* PseudoVSOXSEG5EI64_V_M2_MF4_MASK */ 57043, /* PseudoVSOXSEG5EI64_V_M4_M1 */ 57049, /* PseudoVSOXSEG5EI64_V_M4_M1_MASK */ 57054, /* PseudoVSOXSEG5EI64_V_M4_MF2 */ 57060, /* PseudoVSOXSEG5EI64_V_M4_MF2_MASK */ 57065, /* PseudoVSOXSEG5EI64_V_M8_M1 */ 57071, /* PseudoVSOXSEG5EI64_V_M8_M1_MASK */ 57076, /* PseudoVSOXSEG5EI8_V_M1_M1 */ 57082, /* PseudoVSOXSEG5EI8_V_M1_M1_MASK */ 57087, /* PseudoVSOXSEG5EI8_V_MF2_M1 */ 57093, /* PseudoVSOXSEG5EI8_V_MF2_M1_MASK */ 57098, /* PseudoVSOXSEG5EI8_V_MF2_MF2 */ 57104, /* PseudoVSOXSEG5EI8_V_MF2_MF2_MASK */ 57109, /* PseudoVSOXSEG5EI8_V_MF4_M1 */ 57115, /* PseudoVSOXSEG5EI8_V_MF4_M1_MASK */ 57120, /* PseudoVSOXSEG5EI8_V_MF4_MF2 */ 57126, /* PseudoVSOXSEG5EI8_V_MF4_MF2_MASK */ 57131, /* PseudoVSOXSEG5EI8_V_MF4_MF4 */ 57137, /* PseudoVSOXSEG5EI8_V_MF4_MF4_MASK */ 57142, /* PseudoVSOXSEG5EI8_V_MF8_M1 */ 57148, /* PseudoVSOXSEG5EI8_V_MF8_M1_MASK */ 57153, /* PseudoVSOXSEG5EI8_V_MF8_MF2 */ 57159, /* PseudoVSOXSEG5EI8_V_MF8_MF2_MASK */ 57164, /* PseudoVSOXSEG5EI8_V_MF8_MF4 */ 57170, /* PseudoVSOXSEG5EI8_V_MF8_MF4_MASK */ 57175, /* PseudoVSOXSEG5EI8_V_MF8_MF8 */ 57181, /* PseudoVSOXSEG5EI8_V_MF8_MF8_MASK */ 57186, /* PseudoVSOXSEG6EI16_V_M1_M1 */ 57192, /* PseudoVSOXSEG6EI16_V_M1_M1_MASK */ 57197, /* PseudoVSOXSEG6EI16_V_M1_MF2 */ 57203, /* PseudoVSOXSEG6EI16_V_M1_MF2_MASK */ 57208, /* PseudoVSOXSEG6EI16_V_M2_M1 */ 57214, /* PseudoVSOXSEG6EI16_V_M2_M1_MASK */ 57219, /* PseudoVSOXSEG6EI16_V_MF2_M1 */ 57225, /* PseudoVSOXSEG6EI16_V_MF2_M1_MASK */ 57230, /* PseudoVSOXSEG6EI16_V_MF2_MF2 */ 57236, /* PseudoVSOXSEG6EI16_V_MF2_MF2_MASK */ 57241, /* PseudoVSOXSEG6EI16_V_MF2_MF4 */ 57247, /* PseudoVSOXSEG6EI16_V_MF2_MF4_MASK */ 57252, /* PseudoVSOXSEG6EI16_V_MF4_M1 */ 57258, /* PseudoVSOXSEG6EI16_V_MF4_M1_MASK */ 57263, /* PseudoVSOXSEG6EI16_V_MF4_MF2 */ 57269, /* PseudoVSOXSEG6EI16_V_MF4_MF2_MASK */ 57274, /* PseudoVSOXSEG6EI16_V_MF4_MF4 */ 57280, /* PseudoVSOXSEG6EI16_V_MF4_MF4_MASK */ 57285, /* PseudoVSOXSEG6EI16_V_MF4_MF8 */ 57291, /* PseudoVSOXSEG6EI16_V_MF4_MF8_MASK */ 57296, /* PseudoVSOXSEG6EI32_V_M1_M1 */ 57302, /* PseudoVSOXSEG6EI32_V_M1_M1_MASK */ 57307, /* PseudoVSOXSEG6EI32_V_M1_MF2 */ 57313, /* PseudoVSOXSEG6EI32_V_M1_MF2_MASK */ 57318, /* PseudoVSOXSEG6EI32_V_M1_MF4 */ 57324, /* PseudoVSOXSEG6EI32_V_M1_MF4_MASK */ 57329, /* PseudoVSOXSEG6EI32_V_M2_M1 */ 57335, /* PseudoVSOXSEG6EI32_V_M2_M1_MASK */ 57340, /* PseudoVSOXSEG6EI32_V_M2_MF2 */ 57346, /* PseudoVSOXSEG6EI32_V_M2_MF2_MASK */ 57351, /* PseudoVSOXSEG6EI32_V_M4_M1 */ 57357, /* PseudoVSOXSEG6EI32_V_M4_M1_MASK */ 57362, /* PseudoVSOXSEG6EI32_V_MF2_M1 */ 57368, /* PseudoVSOXSEG6EI32_V_MF2_M1_MASK */ 57373, /* PseudoVSOXSEG6EI32_V_MF2_MF2 */ 57379, /* PseudoVSOXSEG6EI32_V_MF2_MF2_MASK */ 57384, /* PseudoVSOXSEG6EI32_V_MF2_MF4 */ 57390, /* PseudoVSOXSEG6EI32_V_MF2_MF4_MASK */ 57395, /* PseudoVSOXSEG6EI32_V_MF2_MF8 */ 57401, /* PseudoVSOXSEG6EI32_V_MF2_MF8_MASK */ 57406, /* PseudoVSOXSEG6EI64_V_M1_M1 */ 57412, /* PseudoVSOXSEG6EI64_V_M1_M1_MASK */ 57417, /* PseudoVSOXSEG6EI64_V_M1_MF2 */ 57423, /* PseudoVSOXSEG6EI64_V_M1_MF2_MASK */ 57428, /* PseudoVSOXSEG6EI64_V_M1_MF4 */ 57434, /* PseudoVSOXSEG6EI64_V_M1_MF4_MASK */ 57439, /* PseudoVSOXSEG6EI64_V_M1_MF8 */ 57445, /* PseudoVSOXSEG6EI64_V_M1_MF8_MASK */ 57450, /* PseudoVSOXSEG6EI64_V_M2_M1 */ 57456, /* PseudoVSOXSEG6EI64_V_M2_M1_MASK */ 57461, /* PseudoVSOXSEG6EI64_V_M2_MF2 */ 57467, /* PseudoVSOXSEG6EI64_V_M2_MF2_MASK */ 57472, /* PseudoVSOXSEG6EI64_V_M2_MF4 */ 57478, /* PseudoVSOXSEG6EI64_V_M2_MF4_MASK */ 57483, /* PseudoVSOXSEG6EI64_V_M4_M1 */ 57489, /* PseudoVSOXSEG6EI64_V_M4_M1_MASK */ 57494, /* PseudoVSOXSEG6EI64_V_M4_MF2 */ 57500, /* PseudoVSOXSEG6EI64_V_M4_MF2_MASK */ 57505, /* PseudoVSOXSEG6EI64_V_M8_M1 */ 57511, /* PseudoVSOXSEG6EI64_V_M8_M1_MASK */ 57516, /* PseudoVSOXSEG6EI8_V_M1_M1 */ 57522, /* PseudoVSOXSEG6EI8_V_M1_M1_MASK */ 57527, /* PseudoVSOXSEG6EI8_V_MF2_M1 */ 57533, /* PseudoVSOXSEG6EI8_V_MF2_M1_MASK */ 57538, /* PseudoVSOXSEG6EI8_V_MF2_MF2 */ 57544, /* PseudoVSOXSEG6EI8_V_MF2_MF2_MASK */ 57549, /* PseudoVSOXSEG6EI8_V_MF4_M1 */ 57555, /* PseudoVSOXSEG6EI8_V_MF4_M1_MASK */ 57560, /* PseudoVSOXSEG6EI8_V_MF4_MF2 */ 57566, /* PseudoVSOXSEG6EI8_V_MF4_MF2_MASK */ 57571, /* PseudoVSOXSEG6EI8_V_MF4_MF4 */ 57577, /* PseudoVSOXSEG6EI8_V_MF4_MF4_MASK */ 57582, /* PseudoVSOXSEG6EI8_V_MF8_M1 */ 57588, /* PseudoVSOXSEG6EI8_V_MF8_M1_MASK */ 57593, /* PseudoVSOXSEG6EI8_V_MF8_MF2 */ 57599, /* PseudoVSOXSEG6EI8_V_MF8_MF2_MASK */ 57604, /* PseudoVSOXSEG6EI8_V_MF8_MF4 */ 57610, /* PseudoVSOXSEG6EI8_V_MF8_MF4_MASK */ 57615, /* PseudoVSOXSEG6EI8_V_MF8_MF8 */ 57621, /* PseudoVSOXSEG6EI8_V_MF8_MF8_MASK */ 57626, /* PseudoVSOXSEG7EI16_V_M1_M1 */ 57632, /* PseudoVSOXSEG7EI16_V_M1_M1_MASK */ 57637, /* PseudoVSOXSEG7EI16_V_M1_MF2 */ 57643, /* PseudoVSOXSEG7EI16_V_M1_MF2_MASK */ 57648, /* PseudoVSOXSEG7EI16_V_M2_M1 */ 57654, /* PseudoVSOXSEG7EI16_V_M2_M1_MASK */ 57659, /* PseudoVSOXSEG7EI16_V_MF2_M1 */ 57665, /* PseudoVSOXSEG7EI16_V_MF2_M1_MASK */ 57670, /* PseudoVSOXSEG7EI16_V_MF2_MF2 */ 57676, /* PseudoVSOXSEG7EI16_V_MF2_MF2_MASK */ 57681, /* PseudoVSOXSEG7EI16_V_MF2_MF4 */ 57687, /* PseudoVSOXSEG7EI16_V_MF2_MF4_MASK */ 57692, /* PseudoVSOXSEG7EI16_V_MF4_M1 */ 57698, /* PseudoVSOXSEG7EI16_V_MF4_M1_MASK */ 57703, /* PseudoVSOXSEG7EI16_V_MF4_MF2 */ 57709, /* PseudoVSOXSEG7EI16_V_MF4_MF2_MASK */ 57714, /* PseudoVSOXSEG7EI16_V_MF4_MF4 */ 57720, /* PseudoVSOXSEG7EI16_V_MF4_MF4_MASK */ 57725, /* PseudoVSOXSEG7EI16_V_MF4_MF8 */ 57731, /* PseudoVSOXSEG7EI16_V_MF4_MF8_MASK */ 57736, /* PseudoVSOXSEG7EI32_V_M1_M1 */ 57742, /* PseudoVSOXSEG7EI32_V_M1_M1_MASK */ 57747, /* PseudoVSOXSEG7EI32_V_M1_MF2 */ 57753, /* PseudoVSOXSEG7EI32_V_M1_MF2_MASK */ 57758, /* PseudoVSOXSEG7EI32_V_M1_MF4 */ 57764, /* PseudoVSOXSEG7EI32_V_M1_MF4_MASK */ 57769, /* PseudoVSOXSEG7EI32_V_M2_M1 */ 57775, /* PseudoVSOXSEG7EI32_V_M2_M1_MASK */ 57780, /* PseudoVSOXSEG7EI32_V_M2_MF2 */ 57786, /* PseudoVSOXSEG7EI32_V_M2_MF2_MASK */ 57791, /* PseudoVSOXSEG7EI32_V_M4_M1 */ 57797, /* PseudoVSOXSEG7EI32_V_M4_M1_MASK */ 57802, /* PseudoVSOXSEG7EI32_V_MF2_M1 */ 57808, /* PseudoVSOXSEG7EI32_V_MF2_M1_MASK */ 57813, /* PseudoVSOXSEG7EI32_V_MF2_MF2 */ 57819, /* PseudoVSOXSEG7EI32_V_MF2_MF2_MASK */ 57824, /* PseudoVSOXSEG7EI32_V_MF2_MF4 */ 57830, /* PseudoVSOXSEG7EI32_V_MF2_MF4_MASK */ 57835, /* PseudoVSOXSEG7EI32_V_MF2_MF8 */ 57841, /* PseudoVSOXSEG7EI32_V_MF2_MF8_MASK */ 57846, /* PseudoVSOXSEG7EI64_V_M1_M1 */ 57852, /* PseudoVSOXSEG7EI64_V_M1_M1_MASK */ 57857, /* PseudoVSOXSEG7EI64_V_M1_MF2 */ 57863, /* PseudoVSOXSEG7EI64_V_M1_MF2_MASK */ 57868, /* PseudoVSOXSEG7EI64_V_M1_MF4 */ 57874, /* PseudoVSOXSEG7EI64_V_M1_MF4_MASK */ 57879, /* PseudoVSOXSEG7EI64_V_M1_MF8 */ 57885, /* PseudoVSOXSEG7EI64_V_M1_MF8_MASK */ 57890, /* PseudoVSOXSEG7EI64_V_M2_M1 */ 57896, /* PseudoVSOXSEG7EI64_V_M2_M1_MASK */ 57901, /* PseudoVSOXSEG7EI64_V_M2_MF2 */ 57907, /* PseudoVSOXSEG7EI64_V_M2_MF2_MASK */ 57912, /* PseudoVSOXSEG7EI64_V_M2_MF4 */ 57918, /* PseudoVSOXSEG7EI64_V_M2_MF4_MASK */ 57923, /* PseudoVSOXSEG7EI64_V_M4_M1 */ 57929, /* PseudoVSOXSEG7EI64_V_M4_M1_MASK */ 57934, /* PseudoVSOXSEG7EI64_V_M4_MF2 */ 57940, /* PseudoVSOXSEG7EI64_V_M4_MF2_MASK */ 57945, /* PseudoVSOXSEG7EI64_V_M8_M1 */ 57951, /* PseudoVSOXSEG7EI64_V_M8_M1_MASK */ 57956, /* PseudoVSOXSEG7EI8_V_M1_M1 */ 57962, /* PseudoVSOXSEG7EI8_V_M1_M1_MASK */ 57967, /* PseudoVSOXSEG7EI8_V_MF2_M1 */ 57973, /* PseudoVSOXSEG7EI8_V_MF2_M1_MASK */ 57978, /* PseudoVSOXSEG7EI8_V_MF2_MF2 */ 57984, /* PseudoVSOXSEG7EI8_V_MF2_MF2_MASK */ 57989, /* PseudoVSOXSEG7EI8_V_MF4_M1 */ 57995, /* PseudoVSOXSEG7EI8_V_MF4_M1_MASK */ 58000, /* PseudoVSOXSEG7EI8_V_MF4_MF2 */ 58006, /* PseudoVSOXSEG7EI8_V_MF4_MF2_MASK */ 58011, /* PseudoVSOXSEG7EI8_V_MF4_MF4 */ 58017, /* PseudoVSOXSEG7EI8_V_MF4_MF4_MASK */ 58022, /* PseudoVSOXSEG7EI8_V_MF8_M1 */ 58028, /* PseudoVSOXSEG7EI8_V_MF8_M1_MASK */ 58033, /* PseudoVSOXSEG7EI8_V_MF8_MF2 */ 58039, /* PseudoVSOXSEG7EI8_V_MF8_MF2_MASK */ 58044, /* PseudoVSOXSEG7EI8_V_MF8_MF4 */ 58050, /* PseudoVSOXSEG7EI8_V_MF8_MF4_MASK */ 58055, /* PseudoVSOXSEG7EI8_V_MF8_MF8 */ 58061, /* PseudoVSOXSEG7EI8_V_MF8_MF8_MASK */ 58066, /* PseudoVSOXSEG8EI16_V_M1_M1 */ 58072, /* PseudoVSOXSEG8EI16_V_M1_M1_MASK */ 58077, /* PseudoVSOXSEG8EI16_V_M1_MF2 */ 58083, /* PseudoVSOXSEG8EI16_V_M1_MF2_MASK */ 58088, /* PseudoVSOXSEG8EI16_V_M2_M1 */ 58094, /* PseudoVSOXSEG8EI16_V_M2_M1_MASK */ 58099, /* PseudoVSOXSEG8EI16_V_MF2_M1 */ 58105, /* PseudoVSOXSEG8EI16_V_MF2_M1_MASK */ 58110, /* PseudoVSOXSEG8EI16_V_MF2_MF2 */ 58116, /* PseudoVSOXSEG8EI16_V_MF2_MF2_MASK */ 58121, /* PseudoVSOXSEG8EI16_V_MF2_MF4 */ 58127, /* PseudoVSOXSEG8EI16_V_MF2_MF4_MASK */ 58132, /* PseudoVSOXSEG8EI16_V_MF4_M1 */ 58138, /* PseudoVSOXSEG8EI16_V_MF4_M1_MASK */ 58143, /* PseudoVSOXSEG8EI16_V_MF4_MF2 */ 58149, /* PseudoVSOXSEG8EI16_V_MF4_MF2_MASK */ 58154, /* PseudoVSOXSEG8EI16_V_MF4_MF4 */ 58160, /* PseudoVSOXSEG8EI16_V_MF4_MF4_MASK */ 58165, /* PseudoVSOXSEG8EI16_V_MF4_MF8 */ 58171, /* PseudoVSOXSEG8EI16_V_MF4_MF8_MASK */ 58176, /* PseudoVSOXSEG8EI32_V_M1_M1 */ 58182, /* PseudoVSOXSEG8EI32_V_M1_M1_MASK */ 58187, /* PseudoVSOXSEG8EI32_V_M1_MF2 */ 58193, /* PseudoVSOXSEG8EI32_V_M1_MF2_MASK */ 58198, /* PseudoVSOXSEG8EI32_V_M1_MF4 */ 58204, /* PseudoVSOXSEG8EI32_V_M1_MF4_MASK */ 58209, /* PseudoVSOXSEG8EI32_V_M2_M1 */ 58215, /* PseudoVSOXSEG8EI32_V_M2_M1_MASK */ 58220, /* PseudoVSOXSEG8EI32_V_M2_MF2 */ 58226, /* PseudoVSOXSEG8EI32_V_M2_MF2_MASK */ 58231, /* PseudoVSOXSEG8EI32_V_M4_M1 */ 58237, /* PseudoVSOXSEG8EI32_V_M4_M1_MASK */ 58242, /* PseudoVSOXSEG8EI32_V_MF2_M1 */ 58248, /* PseudoVSOXSEG8EI32_V_MF2_M1_MASK */ 58253, /* PseudoVSOXSEG8EI32_V_MF2_MF2 */ 58259, /* PseudoVSOXSEG8EI32_V_MF2_MF2_MASK */ 58264, /* PseudoVSOXSEG8EI32_V_MF2_MF4 */ 58270, /* PseudoVSOXSEG8EI32_V_MF2_MF4_MASK */ 58275, /* PseudoVSOXSEG8EI32_V_MF2_MF8 */ 58281, /* PseudoVSOXSEG8EI32_V_MF2_MF8_MASK */ 58286, /* PseudoVSOXSEG8EI64_V_M1_M1 */ 58292, /* PseudoVSOXSEG8EI64_V_M1_M1_MASK */ 58297, /* PseudoVSOXSEG8EI64_V_M1_MF2 */ 58303, /* PseudoVSOXSEG8EI64_V_M1_MF2_MASK */ 58308, /* PseudoVSOXSEG8EI64_V_M1_MF4 */ 58314, /* PseudoVSOXSEG8EI64_V_M1_MF4_MASK */ 58319, /* PseudoVSOXSEG8EI64_V_M1_MF8 */ 58325, /* PseudoVSOXSEG8EI64_V_M1_MF8_MASK */ 58330, /* PseudoVSOXSEG8EI64_V_M2_M1 */ 58336, /* PseudoVSOXSEG8EI64_V_M2_M1_MASK */ 58341, /* PseudoVSOXSEG8EI64_V_M2_MF2 */ 58347, /* PseudoVSOXSEG8EI64_V_M2_MF2_MASK */ 58352, /* PseudoVSOXSEG8EI64_V_M2_MF4 */ 58358, /* PseudoVSOXSEG8EI64_V_M2_MF4_MASK */ 58363, /* PseudoVSOXSEG8EI64_V_M4_M1 */ 58369, /* PseudoVSOXSEG8EI64_V_M4_M1_MASK */ 58374, /* PseudoVSOXSEG8EI64_V_M4_MF2 */ 58380, /* PseudoVSOXSEG8EI64_V_M4_MF2_MASK */ 58385, /* PseudoVSOXSEG8EI64_V_M8_M1 */ 58391, /* PseudoVSOXSEG8EI64_V_M8_M1_MASK */ 58396, /* PseudoVSOXSEG8EI8_V_M1_M1 */ 58402, /* PseudoVSOXSEG8EI8_V_M1_M1_MASK */ 58407, /* PseudoVSOXSEG8EI8_V_MF2_M1 */ 58413, /* PseudoVSOXSEG8EI8_V_MF2_M1_MASK */ 58418, /* PseudoVSOXSEG8EI8_V_MF2_MF2 */ 58424, /* PseudoVSOXSEG8EI8_V_MF2_MF2_MASK */ 58429, /* PseudoVSOXSEG8EI8_V_MF4_M1 */ 58435, /* PseudoVSOXSEG8EI8_V_MF4_M1_MASK */ 58440, /* PseudoVSOXSEG8EI8_V_MF4_MF2 */ 58446, /* PseudoVSOXSEG8EI8_V_MF4_MF2_MASK */ 58451, /* PseudoVSOXSEG8EI8_V_MF4_MF4 */ 58457, /* PseudoVSOXSEG8EI8_V_MF4_MF4_MASK */ 58462, /* PseudoVSOXSEG8EI8_V_MF8_M1 */ 58468, /* PseudoVSOXSEG8EI8_V_MF8_M1_MASK */ 58473, /* PseudoVSOXSEG8EI8_V_MF8_MF2 */ 58479, /* PseudoVSOXSEG8EI8_V_MF8_MF2_MASK */ 58484, /* PseudoVSOXSEG8EI8_V_MF8_MF4 */ 58490, /* PseudoVSOXSEG8EI8_V_MF8_MF4_MASK */ 58495, /* PseudoVSOXSEG8EI8_V_MF8_MF8 */ 58501, /* PseudoVSOXSEG8EI8_V_MF8_MF8_MASK */ 58506, /* PseudoVSPILL2_M1 */ 58512, /* PseudoVSPILL2_M2 */ 58514, /* PseudoVSPILL2_M4 */ 58516, /* PseudoVSPILL2_MF2 */ 58518, /* PseudoVSPILL2_MF4 */ 58520, /* PseudoVSPILL2_MF8 */ 58522, /* PseudoVSPILL3_M1 */ 58524, /* PseudoVSPILL3_M2 */ 58526, /* PseudoVSPILL3_MF2 */ 58528, /* PseudoVSPILL3_MF4 */ 58530, /* PseudoVSPILL3_MF8 */ 58532, /* PseudoVSPILL4_M1 */ 58534, /* PseudoVSPILL4_M2 */ 58536, /* PseudoVSPILL4_MF2 */ 58538, /* PseudoVSPILL4_MF4 */ 58540, /* PseudoVSPILL4_MF8 */ 58542, /* PseudoVSPILL5_M1 */ 58544, /* PseudoVSPILL5_MF2 */ 58546, /* PseudoVSPILL5_MF4 */ 58548, /* PseudoVSPILL5_MF8 */ 58550, /* PseudoVSPILL6_M1 */ 58552, /* PseudoVSPILL6_MF2 */ 58554, /* PseudoVSPILL6_MF4 */ 58556, /* PseudoVSPILL6_MF8 */ 58558, /* PseudoVSPILL7_M1 */ 58560, /* PseudoVSPILL7_MF2 */ 58562, /* PseudoVSPILL7_MF4 */ 58564, /* PseudoVSPILL7_MF8 */ 58566, /* PseudoVSPILL8_M1 */ 58568, /* PseudoVSPILL8_MF2 */ 58570, /* PseudoVSPILL8_MF4 */ 58572, /* PseudoVSPILL8_MF8 */ 58574, /* PseudoVSRA_VI_M1 */ 58576, /* PseudoVSRA_VI_M1_MASK */ 58581, /* PseudoVSRA_VI_M1_TU */ 58589, /* PseudoVSRA_VI_M2 */ 58595, /* PseudoVSRA_VI_M2_MASK */ 58600, /* PseudoVSRA_VI_M2_TU */ 58608, /* PseudoVSRA_VI_M4 */ 58614, /* PseudoVSRA_VI_M4_MASK */ 58619, /* PseudoVSRA_VI_M4_TU */ 58627, /* PseudoVSRA_VI_M8 */ 58633, /* PseudoVSRA_VI_M8_MASK */ 58638, /* PseudoVSRA_VI_M8_TU */ 58646, /* PseudoVSRA_VI_MF2 */ 58652, /* PseudoVSRA_VI_MF2_MASK */ 58657, /* PseudoVSRA_VI_MF2_TU */ 58665, /* PseudoVSRA_VI_MF4 */ 58671, /* PseudoVSRA_VI_MF4_MASK */ 58676, /* PseudoVSRA_VI_MF4_TU */ 58684, /* PseudoVSRA_VI_MF8 */ 58690, /* PseudoVSRA_VI_MF8_MASK */ 58695, /* PseudoVSRA_VI_MF8_TU */ 58703, /* PseudoVSRA_VV_M1 */ 58709, /* PseudoVSRA_VV_M1_MASK */ 58714, /* PseudoVSRA_VV_M1_TU */ 58722, /* PseudoVSRA_VV_M2 */ 58728, /* PseudoVSRA_VV_M2_MASK */ 58733, /* PseudoVSRA_VV_M2_TU */ 58741, /* PseudoVSRA_VV_M4 */ 58747, /* PseudoVSRA_VV_M4_MASK */ 58752, /* PseudoVSRA_VV_M4_TU */ 58760, /* PseudoVSRA_VV_M8 */ 58766, /* PseudoVSRA_VV_M8_MASK */ 58771, /* PseudoVSRA_VV_M8_TU */ 58779, /* PseudoVSRA_VV_MF2 */ 58785, /* PseudoVSRA_VV_MF2_MASK */ 58790, /* PseudoVSRA_VV_MF2_TU */ 58798, /* PseudoVSRA_VV_MF4 */ 58804, /* PseudoVSRA_VV_MF4_MASK */ 58809, /* PseudoVSRA_VV_MF4_TU */ 58817, /* PseudoVSRA_VV_MF8 */ 58823, /* PseudoVSRA_VV_MF8_MASK */ 58828, /* PseudoVSRA_VV_MF8_TU */ 58836, /* PseudoVSRA_VX_M1 */ 58842, /* PseudoVSRA_VX_M1_MASK */ 58847, /* PseudoVSRA_VX_M1_TU */ 58855, /* PseudoVSRA_VX_M2 */ 58861, /* PseudoVSRA_VX_M2_MASK */ 58866, /* PseudoVSRA_VX_M2_TU */ 58874, /* PseudoVSRA_VX_M4 */ 58880, /* PseudoVSRA_VX_M4_MASK */ 58885, /* PseudoVSRA_VX_M4_TU */ 58893, /* PseudoVSRA_VX_M8 */ 58899, /* PseudoVSRA_VX_M8_MASK */ 58904, /* PseudoVSRA_VX_M8_TU */ 58912, /* PseudoVSRA_VX_MF2 */ 58918, /* PseudoVSRA_VX_MF2_MASK */ 58923, /* PseudoVSRA_VX_MF2_TU */ 58931, /* PseudoVSRA_VX_MF4 */ 58937, /* PseudoVSRA_VX_MF4_MASK */ 58942, /* PseudoVSRA_VX_MF4_TU */ 58950, /* PseudoVSRA_VX_MF8 */ 58956, /* PseudoVSRA_VX_MF8_MASK */ 58961, /* PseudoVSRA_VX_MF8_TU */ 58969, /* PseudoVSRL_VI_M1 */ 58975, /* PseudoVSRL_VI_M1_MASK */ 58980, /* PseudoVSRL_VI_M1_TU */ 58988, /* PseudoVSRL_VI_M2 */ 58994, /* PseudoVSRL_VI_M2_MASK */ 58999, /* PseudoVSRL_VI_M2_TU */ 59007, /* PseudoVSRL_VI_M4 */ 59013, /* PseudoVSRL_VI_M4_MASK */ 59018, /* PseudoVSRL_VI_M4_TU */ 59026, /* PseudoVSRL_VI_M8 */ 59032, /* PseudoVSRL_VI_M8_MASK */ 59037, /* PseudoVSRL_VI_M8_TU */ 59045, /* PseudoVSRL_VI_MF2 */ 59051, /* PseudoVSRL_VI_MF2_MASK */ 59056, /* PseudoVSRL_VI_MF2_TU */ 59064, /* PseudoVSRL_VI_MF4 */ 59070, /* PseudoVSRL_VI_MF4_MASK */ 59075, /* PseudoVSRL_VI_MF4_TU */ 59083, /* PseudoVSRL_VI_MF8 */ 59089, /* PseudoVSRL_VI_MF8_MASK */ 59094, /* PseudoVSRL_VI_MF8_TU */ 59102, /* PseudoVSRL_VV_M1 */ 59108, /* PseudoVSRL_VV_M1_MASK */ 59113, /* PseudoVSRL_VV_M1_TU */ 59121, /* PseudoVSRL_VV_M2 */ 59127, /* PseudoVSRL_VV_M2_MASK */ 59132, /* PseudoVSRL_VV_M2_TU */ 59140, /* PseudoVSRL_VV_M4 */ 59146, /* PseudoVSRL_VV_M4_MASK */ 59151, /* PseudoVSRL_VV_M4_TU */ 59159, /* PseudoVSRL_VV_M8 */ 59165, /* PseudoVSRL_VV_M8_MASK */ 59170, /* PseudoVSRL_VV_M8_TU */ 59178, /* PseudoVSRL_VV_MF2 */ 59184, /* PseudoVSRL_VV_MF2_MASK */ 59189, /* PseudoVSRL_VV_MF2_TU */ 59197, /* PseudoVSRL_VV_MF4 */ 59203, /* PseudoVSRL_VV_MF4_MASK */ 59208, /* PseudoVSRL_VV_MF4_TU */ 59216, /* PseudoVSRL_VV_MF8 */ 59222, /* PseudoVSRL_VV_MF8_MASK */ 59227, /* PseudoVSRL_VV_MF8_TU */ 59235, /* PseudoVSRL_VX_M1 */ 59241, /* PseudoVSRL_VX_M1_MASK */ 59246, /* PseudoVSRL_VX_M1_TU */ 59254, /* PseudoVSRL_VX_M2 */ 59260, /* PseudoVSRL_VX_M2_MASK */ 59265, /* PseudoVSRL_VX_M2_TU */ 59273, /* PseudoVSRL_VX_M4 */ 59279, /* PseudoVSRL_VX_M4_MASK */ 59284, /* PseudoVSRL_VX_M4_TU */ 59292, /* PseudoVSRL_VX_M8 */ 59298, /* PseudoVSRL_VX_M8_MASK */ 59303, /* PseudoVSRL_VX_M8_TU */ 59311, /* PseudoVSRL_VX_MF2 */ 59317, /* PseudoVSRL_VX_MF2_MASK */ 59322, /* PseudoVSRL_VX_MF2_TU */ 59330, /* PseudoVSRL_VX_MF4 */ 59336, /* PseudoVSRL_VX_MF4_MASK */ 59341, /* PseudoVSRL_VX_MF4_TU */ 59349, /* PseudoVSRL_VX_MF8 */ 59355, /* PseudoVSRL_VX_MF8_MASK */ 59360, /* PseudoVSRL_VX_MF8_TU */ 59368, /* PseudoVSSE16_V_M1 */ 59374, /* PseudoVSSE16_V_M1_MASK */ 59379, /* PseudoVSSE16_V_M2 */ 59385, /* PseudoVSSE16_V_M2_MASK */ 59390, /* PseudoVSSE16_V_M4 */ 59396, /* PseudoVSSE16_V_M4_MASK */ 59401, /* PseudoVSSE16_V_M8 */ 59407, /* PseudoVSSE16_V_M8_MASK */ 59412, /* PseudoVSSE16_V_MF2 */ 59418, /* PseudoVSSE16_V_MF2_MASK */ 59423, /* PseudoVSSE16_V_MF4 */ 59429, /* PseudoVSSE16_V_MF4_MASK */ 59434, /* PseudoVSSE32_V_M1 */ 59440, /* PseudoVSSE32_V_M1_MASK */ 59445, /* PseudoVSSE32_V_M2 */ 59451, /* PseudoVSSE32_V_M2_MASK */ 59456, /* PseudoVSSE32_V_M4 */ 59462, /* PseudoVSSE32_V_M4_MASK */ 59467, /* PseudoVSSE32_V_M8 */ 59473, /* PseudoVSSE32_V_M8_MASK */ 59478, /* PseudoVSSE32_V_MF2 */ 59484, /* PseudoVSSE32_V_MF2_MASK */ 59489, /* PseudoVSSE64_V_M1 */ 59495, /* PseudoVSSE64_V_M1_MASK */ 59500, /* PseudoVSSE64_V_M2 */ 59506, /* PseudoVSSE64_V_M2_MASK */ 59511, /* PseudoVSSE64_V_M4 */ 59517, /* PseudoVSSE64_V_M4_MASK */ 59522, /* PseudoVSSE64_V_M8 */ 59528, /* PseudoVSSE64_V_M8_MASK */ 59533, /* PseudoVSSE8_V_M1 */ 59539, /* PseudoVSSE8_V_M1_MASK */ 59544, /* PseudoVSSE8_V_M2 */ 59550, /* PseudoVSSE8_V_M2_MASK */ 59555, /* PseudoVSSE8_V_M4 */ 59561, /* PseudoVSSE8_V_M4_MASK */ 59566, /* PseudoVSSE8_V_M8 */ 59572, /* PseudoVSSE8_V_M8_MASK */ 59577, /* PseudoVSSE8_V_MF2 */ 59583, /* PseudoVSSE8_V_MF2_MASK */ 59588, /* PseudoVSSE8_V_MF4 */ 59594, /* PseudoVSSE8_V_MF4_MASK */ 59599, /* PseudoVSSE8_V_MF8 */ 59605, /* PseudoVSSE8_V_MF8_MASK */ 59610, /* PseudoVSSEG2E16_V_M1 */ 59616, /* PseudoVSSEG2E16_V_M1_MASK */ 59620, /* PseudoVSSEG2E16_V_M2 */ 59625, /* PseudoVSSEG2E16_V_M2_MASK */ 59629, /* PseudoVSSEG2E16_V_M4 */ 59634, /* PseudoVSSEG2E16_V_M4_MASK */ 59638, /* PseudoVSSEG2E16_V_MF2 */ 59643, /* PseudoVSSEG2E16_V_MF2_MASK */ 59647, /* PseudoVSSEG2E16_V_MF4 */ 59652, /* PseudoVSSEG2E16_V_MF4_MASK */ 59656, /* PseudoVSSEG2E32_V_M1 */ 59661, /* PseudoVSSEG2E32_V_M1_MASK */ 59665, /* PseudoVSSEG2E32_V_M2 */ 59670, /* PseudoVSSEG2E32_V_M2_MASK */ 59674, /* PseudoVSSEG2E32_V_M4 */ 59679, /* PseudoVSSEG2E32_V_M4_MASK */ 59683, /* PseudoVSSEG2E32_V_MF2 */ 59688, /* PseudoVSSEG2E32_V_MF2_MASK */ 59692, /* PseudoVSSEG2E64_V_M1 */ 59697, /* PseudoVSSEG2E64_V_M1_MASK */ 59701, /* PseudoVSSEG2E64_V_M2 */ 59706, /* PseudoVSSEG2E64_V_M2_MASK */ 59710, /* PseudoVSSEG2E64_V_M4 */ 59715, /* PseudoVSSEG2E64_V_M4_MASK */ 59719, /* PseudoVSSEG2E8_V_M1 */ 59724, /* PseudoVSSEG2E8_V_M1_MASK */ 59728, /* PseudoVSSEG2E8_V_M2 */ 59733, /* PseudoVSSEG2E8_V_M2_MASK */ 59737, /* PseudoVSSEG2E8_V_M4 */ 59742, /* PseudoVSSEG2E8_V_M4_MASK */ 59746, /* PseudoVSSEG2E8_V_MF2 */ 59751, /* PseudoVSSEG2E8_V_MF2_MASK */ 59755, /* PseudoVSSEG2E8_V_MF4 */ 59760, /* PseudoVSSEG2E8_V_MF4_MASK */ 59764, /* PseudoVSSEG2E8_V_MF8 */ 59769, /* PseudoVSSEG2E8_V_MF8_MASK */ 59773, /* PseudoVSSEG3E16_V_M1 */ 59778, /* PseudoVSSEG3E16_V_M1_MASK */ 59782, /* PseudoVSSEG3E16_V_M2 */ 59787, /* PseudoVSSEG3E16_V_M2_MASK */ 59791, /* PseudoVSSEG3E16_V_MF2 */ 59796, /* PseudoVSSEG3E16_V_MF2_MASK */ 59800, /* PseudoVSSEG3E16_V_MF4 */ 59805, /* PseudoVSSEG3E16_V_MF4_MASK */ 59809, /* PseudoVSSEG3E32_V_M1 */ 59814, /* PseudoVSSEG3E32_V_M1_MASK */ 59818, /* PseudoVSSEG3E32_V_M2 */ 59823, /* PseudoVSSEG3E32_V_M2_MASK */ 59827, /* PseudoVSSEG3E32_V_MF2 */ 59832, /* PseudoVSSEG3E32_V_MF2_MASK */ 59836, /* PseudoVSSEG3E64_V_M1 */ 59841, /* PseudoVSSEG3E64_V_M1_MASK */ 59845, /* PseudoVSSEG3E64_V_M2 */ 59850, /* PseudoVSSEG3E64_V_M2_MASK */ 59854, /* PseudoVSSEG3E8_V_M1 */ 59859, /* PseudoVSSEG3E8_V_M1_MASK */ 59863, /* PseudoVSSEG3E8_V_M2 */ 59868, /* PseudoVSSEG3E8_V_M2_MASK */ 59872, /* PseudoVSSEG3E8_V_MF2 */ 59877, /* PseudoVSSEG3E8_V_MF2_MASK */ 59881, /* PseudoVSSEG3E8_V_MF4 */ 59886, /* PseudoVSSEG3E8_V_MF4_MASK */ 59890, /* PseudoVSSEG3E8_V_MF8 */ 59895, /* PseudoVSSEG3E8_V_MF8_MASK */ 59899, /* PseudoVSSEG4E16_V_M1 */ 59904, /* PseudoVSSEG4E16_V_M1_MASK */ 59908, /* PseudoVSSEG4E16_V_M2 */ 59913, /* PseudoVSSEG4E16_V_M2_MASK */ 59917, /* PseudoVSSEG4E16_V_MF2 */ 59922, /* PseudoVSSEG4E16_V_MF2_MASK */ 59926, /* PseudoVSSEG4E16_V_MF4 */ 59931, /* PseudoVSSEG4E16_V_MF4_MASK */ 59935, /* PseudoVSSEG4E32_V_M1 */ 59940, /* PseudoVSSEG4E32_V_M1_MASK */ 59944, /* PseudoVSSEG4E32_V_M2 */ 59949, /* PseudoVSSEG4E32_V_M2_MASK */ 59953, /* PseudoVSSEG4E32_V_MF2 */ 59958, /* PseudoVSSEG4E32_V_MF2_MASK */ 59962, /* PseudoVSSEG4E64_V_M1 */ 59967, /* PseudoVSSEG4E64_V_M1_MASK */ 59971, /* PseudoVSSEG4E64_V_M2 */ 59976, /* PseudoVSSEG4E64_V_M2_MASK */ 59980, /* PseudoVSSEG4E8_V_M1 */ 59985, /* PseudoVSSEG4E8_V_M1_MASK */ 59989, /* PseudoVSSEG4E8_V_M2 */ 59994, /* PseudoVSSEG4E8_V_M2_MASK */ 59998, /* PseudoVSSEG4E8_V_MF2 */ 60003, /* PseudoVSSEG4E8_V_MF2_MASK */ 60007, /* PseudoVSSEG4E8_V_MF4 */ 60012, /* PseudoVSSEG4E8_V_MF4_MASK */ 60016, /* PseudoVSSEG4E8_V_MF8 */ 60021, /* PseudoVSSEG4E8_V_MF8_MASK */ 60025, /* PseudoVSSEG5E16_V_M1 */ 60030, /* PseudoVSSEG5E16_V_M1_MASK */ 60034, /* PseudoVSSEG5E16_V_MF2 */ 60039, /* PseudoVSSEG5E16_V_MF2_MASK */ 60043, /* PseudoVSSEG5E16_V_MF4 */ 60048, /* PseudoVSSEG5E16_V_MF4_MASK */ 60052, /* PseudoVSSEG5E32_V_M1 */ 60057, /* PseudoVSSEG5E32_V_M1_MASK */ 60061, /* PseudoVSSEG5E32_V_MF2 */ 60066, /* PseudoVSSEG5E32_V_MF2_MASK */ 60070, /* PseudoVSSEG5E64_V_M1 */ 60075, /* PseudoVSSEG5E64_V_M1_MASK */ 60079, /* PseudoVSSEG5E8_V_M1 */ 60084, /* PseudoVSSEG5E8_V_M1_MASK */ 60088, /* PseudoVSSEG5E8_V_MF2 */ 60093, /* PseudoVSSEG5E8_V_MF2_MASK */ 60097, /* PseudoVSSEG5E8_V_MF4 */ 60102, /* PseudoVSSEG5E8_V_MF4_MASK */ 60106, /* PseudoVSSEG5E8_V_MF8 */ 60111, /* PseudoVSSEG5E8_V_MF8_MASK */ 60115, /* PseudoVSSEG6E16_V_M1 */ 60120, /* PseudoVSSEG6E16_V_M1_MASK */ 60124, /* PseudoVSSEG6E16_V_MF2 */ 60129, /* PseudoVSSEG6E16_V_MF2_MASK */ 60133, /* PseudoVSSEG6E16_V_MF4 */ 60138, /* PseudoVSSEG6E16_V_MF4_MASK */ 60142, /* PseudoVSSEG6E32_V_M1 */ 60147, /* PseudoVSSEG6E32_V_M1_MASK */ 60151, /* PseudoVSSEG6E32_V_MF2 */ 60156, /* PseudoVSSEG6E32_V_MF2_MASK */ 60160, /* PseudoVSSEG6E64_V_M1 */ 60165, /* PseudoVSSEG6E64_V_M1_MASK */ 60169, /* PseudoVSSEG6E8_V_M1 */ 60174, /* PseudoVSSEG6E8_V_M1_MASK */ 60178, /* PseudoVSSEG6E8_V_MF2 */ 60183, /* PseudoVSSEG6E8_V_MF2_MASK */ 60187, /* PseudoVSSEG6E8_V_MF4 */ 60192, /* PseudoVSSEG6E8_V_MF4_MASK */ 60196, /* PseudoVSSEG6E8_V_MF8 */ 60201, /* PseudoVSSEG6E8_V_MF8_MASK */ 60205, /* PseudoVSSEG7E16_V_M1 */ 60210, /* PseudoVSSEG7E16_V_M1_MASK */ 60214, /* PseudoVSSEG7E16_V_MF2 */ 60219, /* PseudoVSSEG7E16_V_MF2_MASK */ 60223, /* PseudoVSSEG7E16_V_MF4 */ 60228, /* PseudoVSSEG7E16_V_MF4_MASK */ 60232, /* PseudoVSSEG7E32_V_M1 */ 60237, /* PseudoVSSEG7E32_V_M1_MASK */ 60241, /* PseudoVSSEG7E32_V_MF2 */ 60246, /* PseudoVSSEG7E32_V_MF2_MASK */ 60250, /* PseudoVSSEG7E64_V_M1 */ 60255, /* PseudoVSSEG7E64_V_M1_MASK */ 60259, /* PseudoVSSEG7E8_V_M1 */ 60264, /* PseudoVSSEG7E8_V_M1_MASK */ 60268, /* PseudoVSSEG7E8_V_MF2 */ 60273, /* PseudoVSSEG7E8_V_MF2_MASK */ 60277, /* PseudoVSSEG7E8_V_MF4 */ 60282, /* PseudoVSSEG7E8_V_MF4_MASK */ 60286, /* PseudoVSSEG7E8_V_MF8 */ 60291, /* PseudoVSSEG7E8_V_MF8_MASK */ 60295, /* PseudoVSSEG8E16_V_M1 */ 60300, /* PseudoVSSEG8E16_V_M1_MASK */ 60304, /* PseudoVSSEG8E16_V_MF2 */ 60309, /* PseudoVSSEG8E16_V_MF2_MASK */ 60313, /* PseudoVSSEG8E16_V_MF4 */ 60318, /* PseudoVSSEG8E16_V_MF4_MASK */ 60322, /* PseudoVSSEG8E32_V_M1 */ 60327, /* PseudoVSSEG8E32_V_M1_MASK */ 60331, /* PseudoVSSEG8E32_V_MF2 */ 60336, /* PseudoVSSEG8E32_V_MF2_MASK */ 60340, /* PseudoVSSEG8E64_V_M1 */ 60345, /* PseudoVSSEG8E64_V_M1_MASK */ 60349, /* PseudoVSSEG8E8_V_M1 */ 60354, /* PseudoVSSEG8E8_V_M1_MASK */ 60358, /* PseudoVSSEG8E8_V_MF2 */ 60363, /* PseudoVSSEG8E8_V_MF2_MASK */ 60367, /* PseudoVSSEG8E8_V_MF4 */ 60372, /* PseudoVSSEG8E8_V_MF4_MASK */ 60376, /* PseudoVSSEG8E8_V_MF8 */ 60381, /* PseudoVSSEG8E8_V_MF8_MASK */ 60385, /* PseudoVSSRA_VI_M1 */ 60390, /* PseudoVSSRA_VI_M1_MASK */ 60395, /* PseudoVSSRA_VI_M1_TU */ 60403, /* PseudoVSSRA_VI_M2 */ 60409, /* PseudoVSSRA_VI_M2_MASK */ 60414, /* PseudoVSSRA_VI_M2_TU */ 60422, /* PseudoVSSRA_VI_M4 */ 60428, /* PseudoVSSRA_VI_M4_MASK */ 60433, /* PseudoVSSRA_VI_M4_TU */ 60441, /* PseudoVSSRA_VI_M8 */ 60447, /* PseudoVSSRA_VI_M8_MASK */ 60452, /* PseudoVSSRA_VI_M8_TU */ 60460, /* PseudoVSSRA_VI_MF2 */ 60466, /* PseudoVSSRA_VI_MF2_MASK */ 60471, /* PseudoVSSRA_VI_MF2_TU */ 60479, /* PseudoVSSRA_VI_MF4 */ 60485, /* PseudoVSSRA_VI_MF4_MASK */ 60490, /* PseudoVSSRA_VI_MF4_TU */ 60498, /* PseudoVSSRA_VI_MF8 */ 60504, /* PseudoVSSRA_VI_MF8_MASK */ 60509, /* PseudoVSSRA_VI_MF8_TU */ 60517, /* PseudoVSSRA_VV_M1 */ 60523, /* PseudoVSSRA_VV_M1_MASK */ 60528, /* PseudoVSSRA_VV_M1_TU */ 60536, /* PseudoVSSRA_VV_M2 */ 60542, /* PseudoVSSRA_VV_M2_MASK */ 60547, /* PseudoVSSRA_VV_M2_TU */ 60555, /* PseudoVSSRA_VV_M4 */ 60561, /* PseudoVSSRA_VV_M4_MASK */ 60566, /* PseudoVSSRA_VV_M4_TU */ 60574, /* PseudoVSSRA_VV_M8 */ 60580, /* PseudoVSSRA_VV_M8_MASK */ 60585, /* PseudoVSSRA_VV_M8_TU */ 60593, /* PseudoVSSRA_VV_MF2 */ 60599, /* PseudoVSSRA_VV_MF2_MASK */ 60604, /* PseudoVSSRA_VV_MF2_TU */ 60612, /* PseudoVSSRA_VV_MF4 */ 60618, /* PseudoVSSRA_VV_MF4_MASK */ 60623, /* PseudoVSSRA_VV_MF4_TU */ 60631, /* PseudoVSSRA_VV_MF8 */ 60637, /* PseudoVSSRA_VV_MF8_MASK */ 60642, /* PseudoVSSRA_VV_MF8_TU */ 60650, /* PseudoVSSRA_VX_M1 */ 60656, /* PseudoVSSRA_VX_M1_MASK */ 60661, /* PseudoVSSRA_VX_M1_TU */ 60669, /* PseudoVSSRA_VX_M2 */ 60675, /* PseudoVSSRA_VX_M2_MASK */ 60680, /* PseudoVSSRA_VX_M2_TU */ 60688, /* PseudoVSSRA_VX_M4 */ 60694, /* PseudoVSSRA_VX_M4_MASK */ 60699, /* PseudoVSSRA_VX_M4_TU */ 60707, /* PseudoVSSRA_VX_M8 */ 60713, /* PseudoVSSRA_VX_M8_MASK */ 60718, /* PseudoVSSRA_VX_M8_TU */ 60726, /* PseudoVSSRA_VX_MF2 */ 60732, /* PseudoVSSRA_VX_MF2_MASK */ 60737, /* PseudoVSSRA_VX_MF2_TU */ 60745, /* PseudoVSSRA_VX_MF4 */ 60751, /* PseudoVSSRA_VX_MF4_MASK */ 60756, /* PseudoVSSRA_VX_MF4_TU */ 60764, /* PseudoVSSRA_VX_MF8 */ 60770, /* PseudoVSSRA_VX_MF8_MASK */ 60775, /* PseudoVSSRA_VX_MF8_TU */ 60783, /* PseudoVSSRL_VI_M1 */ 60789, /* PseudoVSSRL_VI_M1_MASK */ 60794, /* PseudoVSSRL_VI_M1_TU */ 60802, /* PseudoVSSRL_VI_M2 */ 60808, /* PseudoVSSRL_VI_M2_MASK */ 60813, /* PseudoVSSRL_VI_M2_TU */ 60821, /* PseudoVSSRL_VI_M4 */ 60827, /* PseudoVSSRL_VI_M4_MASK */ 60832, /* PseudoVSSRL_VI_M4_TU */ 60840, /* PseudoVSSRL_VI_M8 */ 60846, /* PseudoVSSRL_VI_M8_MASK */ 60851, /* PseudoVSSRL_VI_M8_TU */ 60859, /* PseudoVSSRL_VI_MF2 */ 60865, /* PseudoVSSRL_VI_MF2_MASK */ 60870, /* PseudoVSSRL_VI_MF2_TU */ 60878, /* PseudoVSSRL_VI_MF4 */ 60884, /* PseudoVSSRL_VI_MF4_MASK */ 60889, /* PseudoVSSRL_VI_MF4_TU */ 60897, /* PseudoVSSRL_VI_MF8 */ 60903, /* PseudoVSSRL_VI_MF8_MASK */ 60908, /* PseudoVSSRL_VI_MF8_TU */ 60916, /* PseudoVSSRL_VV_M1 */ 60922, /* PseudoVSSRL_VV_M1_MASK */ 60927, /* PseudoVSSRL_VV_M1_TU */ 60935, /* PseudoVSSRL_VV_M2 */ 60941, /* PseudoVSSRL_VV_M2_MASK */ 60946, /* PseudoVSSRL_VV_M2_TU */ 60954, /* PseudoVSSRL_VV_M4 */ 60960, /* PseudoVSSRL_VV_M4_MASK */ 60965, /* PseudoVSSRL_VV_M4_TU */ 60973, /* PseudoVSSRL_VV_M8 */ 60979, /* PseudoVSSRL_VV_M8_MASK */ 60984, /* PseudoVSSRL_VV_M8_TU */ 60992, /* PseudoVSSRL_VV_MF2 */ 60998, /* PseudoVSSRL_VV_MF2_MASK */ 61003, /* PseudoVSSRL_VV_MF2_TU */ 61011, /* PseudoVSSRL_VV_MF4 */ 61017, /* PseudoVSSRL_VV_MF4_MASK */ 61022, /* PseudoVSSRL_VV_MF4_TU */ 61030, /* PseudoVSSRL_VV_MF8 */ 61036, /* PseudoVSSRL_VV_MF8_MASK */ 61041, /* PseudoVSSRL_VV_MF8_TU */ 61049, /* PseudoVSSRL_VX_M1 */ 61055, /* PseudoVSSRL_VX_M1_MASK */ 61060, /* PseudoVSSRL_VX_M1_TU */ 61068, /* PseudoVSSRL_VX_M2 */ 61074, /* PseudoVSSRL_VX_M2_MASK */ 61079, /* PseudoVSSRL_VX_M2_TU */ 61087, /* PseudoVSSRL_VX_M4 */ 61093, /* PseudoVSSRL_VX_M4_MASK */ 61098, /* PseudoVSSRL_VX_M4_TU */ 61106, /* PseudoVSSRL_VX_M8 */ 61112, /* PseudoVSSRL_VX_M8_MASK */ 61117, /* PseudoVSSRL_VX_M8_TU */ 61125, /* PseudoVSSRL_VX_MF2 */ 61131, /* PseudoVSSRL_VX_MF2_MASK */ 61136, /* PseudoVSSRL_VX_MF2_TU */ 61144, /* PseudoVSSRL_VX_MF4 */ 61150, /* PseudoVSSRL_VX_MF4_MASK */ 61155, /* PseudoVSSRL_VX_MF4_TU */ 61163, /* PseudoVSSRL_VX_MF8 */ 61169, /* PseudoVSSRL_VX_MF8_MASK */ 61174, /* PseudoVSSRL_VX_MF8_TU */ 61182, /* PseudoVSSSEG2E16_V_M1 */ 61188, /* PseudoVSSSEG2E16_V_M1_MASK */ 61193, /* PseudoVSSSEG2E16_V_M2 */ 61199, /* PseudoVSSSEG2E16_V_M2_MASK */ 61204, /* PseudoVSSSEG2E16_V_M4 */ 61210, /* PseudoVSSSEG2E16_V_M4_MASK */ 61215, /* PseudoVSSSEG2E16_V_MF2 */ 61221, /* PseudoVSSSEG2E16_V_MF2_MASK */ 61226, /* PseudoVSSSEG2E16_V_MF4 */ 61232, /* PseudoVSSSEG2E16_V_MF4_MASK */ 61237, /* PseudoVSSSEG2E32_V_M1 */ 61243, /* PseudoVSSSEG2E32_V_M1_MASK */ 61248, /* PseudoVSSSEG2E32_V_M2 */ 61254, /* PseudoVSSSEG2E32_V_M2_MASK */ 61259, /* PseudoVSSSEG2E32_V_M4 */ 61265, /* PseudoVSSSEG2E32_V_M4_MASK */ 61270, /* PseudoVSSSEG2E32_V_MF2 */ 61276, /* PseudoVSSSEG2E32_V_MF2_MASK */ 61281, /* PseudoVSSSEG2E64_V_M1 */ 61287, /* PseudoVSSSEG2E64_V_M1_MASK */ 61292, /* PseudoVSSSEG2E64_V_M2 */ 61298, /* PseudoVSSSEG2E64_V_M2_MASK */ 61303, /* PseudoVSSSEG2E64_V_M4 */ 61309, /* PseudoVSSSEG2E64_V_M4_MASK */ 61314, /* PseudoVSSSEG2E8_V_M1 */ 61320, /* PseudoVSSSEG2E8_V_M1_MASK */ 61325, /* PseudoVSSSEG2E8_V_M2 */ 61331, /* PseudoVSSSEG2E8_V_M2_MASK */ 61336, /* PseudoVSSSEG2E8_V_M4 */ 61342, /* PseudoVSSSEG2E8_V_M4_MASK */ 61347, /* PseudoVSSSEG2E8_V_MF2 */ 61353, /* PseudoVSSSEG2E8_V_MF2_MASK */ 61358, /* PseudoVSSSEG2E8_V_MF4 */ 61364, /* PseudoVSSSEG2E8_V_MF4_MASK */ 61369, /* PseudoVSSSEG2E8_V_MF8 */ 61375, /* PseudoVSSSEG2E8_V_MF8_MASK */ 61380, /* PseudoVSSSEG3E16_V_M1 */ 61386, /* PseudoVSSSEG3E16_V_M1_MASK */ 61391, /* PseudoVSSSEG3E16_V_M2 */ 61397, /* PseudoVSSSEG3E16_V_M2_MASK */ 61402, /* PseudoVSSSEG3E16_V_MF2 */ 61408, /* PseudoVSSSEG3E16_V_MF2_MASK */ 61413, /* PseudoVSSSEG3E16_V_MF4 */ 61419, /* PseudoVSSSEG3E16_V_MF4_MASK */ 61424, /* PseudoVSSSEG3E32_V_M1 */ 61430, /* PseudoVSSSEG3E32_V_M1_MASK */ 61435, /* PseudoVSSSEG3E32_V_M2 */ 61441, /* PseudoVSSSEG3E32_V_M2_MASK */ 61446, /* PseudoVSSSEG3E32_V_MF2 */ 61452, /* PseudoVSSSEG3E32_V_MF2_MASK */ 61457, /* PseudoVSSSEG3E64_V_M1 */ 61463, /* PseudoVSSSEG3E64_V_M1_MASK */ 61468, /* PseudoVSSSEG3E64_V_M2 */ 61474, /* PseudoVSSSEG3E64_V_M2_MASK */ 61479, /* PseudoVSSSEG3E8_V_M1 */ 61485, /* PseudoVSSSEG3E8_V_M1_MASK */ 61490, /* PseudoVSSSEG3E8_V_M2 */ 61496, /* PseudoVSSSEG3E8_V_M2_MASK */ 61501, /* PseudoVSSSEG3E8_V_MF2 */ 61507, /* PseudoVSSSEG3E8_V_MF2_MASK */ 61512, /* PseudoVSSSEG3E8_V_MF4 */ 61518, /* PseudoVSSSEG3E8_V_MF4_MASK */ 61523, /* PseudoVSSSEG3E8_V_MF8 */ 61529, /* PseudoVSSSEG3E8_V_MF8_MASK */ 61534, /* PseudoVSSSEG4E16_V_M1 */ 61540, /* PseudoVSSSEG4E16_V_M1_MASK */ 61545, /* PseudoVSSSEG4E16_V_M2 */ 61551, /* PseudoVSSSEG4E16_V_M2_MASK */ 61556, /* PseudoVSSSEG4E16_V_MF2 */ 61562, /* PseudoVSSSEG4E16_V_MF2_MASK */ 61567, /* PseudoVSSSEG4E16_V_MF4 */ 61573, /* PseudoVSSSEG4E16_V_MF4_MASK */ 61578, /* PseudoVSSSEG4E32_V_M1 */ 61584, /* PseudoVSSSEG4E32_V_M1_MASK */ 61589, /* PseudoVSSSEG4E32_V_M2 */ 61595, /* PseudoVSSSEG4E32_V_M2_MASK */ 61600, /* PseudoVSSSEG4E32_V_MF2 */ 61606, /* PseudoVSSSEG4E32_V_MF2_MASK */ 61611, /* PseudoVSSSEG4E64_V_M1 */ 61617, /* PseudoVSSSEG4E64_V_M1_MASK */ 61622, /* PseudoVSSSEG4E64_V_M2 */ 61628, /* PseudoVSSSEG4E64_V_M2_MASK */ 61633, /* PseudoVSSSEG4E8_V_M1 */ 61639, /* PseudoVSSSEG4E8_V_M1_MASK */ 61644, /* PseudoVSSSEG4E8_V_M2 */ 61650, /* PseudoVSSSEG4E8_V_M2_MASK */ 61655, /* PseudoVSSSEG4E8_V_MF2 */ 61661, /* PseudoVSSSEG4E8_V_MF2_MASK */ 61666, /* PseudoVSSSEG4E8_V_MF4 */ 61672, /* PseudoVSSSEG4E8_V_MF4_MASK */ 61677, /* PseudoVSSSEG4E8_V_MF8 */ 61683, /* PseudoVSSSEG4E8_V_MF8_MASK */ 61688, /* PseudoVSSSEG5E16_V_M1 */ 61694, /* PseudoVSSSEG5E16_V_M1_MASK */ 61699, /* PseudoVSSSEG5E16_V_MF2 */ 61705, /* PseudoVSSSEG5E16_V_MF2_MASK */ 61710, /* PseudoVSSSEG5E16_V_MF4 */ 61716, /* PseudoVSSSEG5E16_V_MF4_MASK */ 61721, /* PseudoVSSSEG5E32_V_M1 */ 61727, /* PseudoVSSSEG5E32_V_M1_MASK */ 61732, /* PseudoVSSSEG5E32_V_MF2 */ 61738, /* PseudoVSSSEG5E32_V_MF2_MASK */ 61743, /* PseudoVSSSEG5E64_V_M1 */ 61749, /* PseudoVSSSEG5E64_V_M1_MASK */ 61754, /* PseudoVSSSEG5E8_V_M1 */ 61760, /* PseudoVSSSEG5E8_V_M1_MASK */ 61765, /* PseudoVSSSEG5E8_V_MF2 */ 61771, /* PseudoVSSSEG5E8_V_MF2_MASK */ 61776, /* PseudoVSSSEG5E8_V_MF4 */ 61782, /* PseudoVSSSEG5E8_V_MF4_MASK */ 61787, /* PseudoVSSSEG5E8_V_MF8 */ 61793, /* PseudoVSSSEG5E8_V_MF8_MASK */ 61798, /* PseudoVSSSEG6E16_V_M1 */ 61804, /* PseudoVSSSEG6E16_V_M1_MASK */ 61809, /* PseudoVSSSEG6E16_V_MF2 */ 61815, /* PseudoVSSSEG6E16_V_MF2_MASK */ 61820, /* PseudoVSSSEG6E16_V_MF4 */ 61826, /* PseudoVSSSEG6E16_V_MF4_MASK */ 61831, /* PseudoVSSSEG6E32_V_M1 */ 61837, /* PseudoVSSSEG6E32_V_M1_MASK */ 61842, /* PseudoVSSSEG6E32_V_MF2 */ 61848, /* PseudoVSSSEG6E32_V_MF2_MASK */ 61853, /* PseudoVSSSEG6E64_V_M1 */ 61859, /* PseudoVSSSEG6E64_V_M1_MASK */ 61864, /* PseudoVSSSEG6E8_V_M1 */ 61870, /* PseudoVSSSEG6E8_V_M1_MASK */ 61875, /* PseudoVSSSEG6E8_V_MF2 */ 61881, /* PseudoVSSSEG6E8_V_MF2_MASK */ 61886, /* PseudoVSSSEG6E8_V_MF4 */ 61892, /* PseudoVSSSEG6E8_V_MF4_MASK */ 61897, /* PseudoVSSSEG6E8_V_MF8 */ 61903, /* PseudoVSSSEG6E8_V_MF8_MASK */ 61908, /* PseudoVSSSEG7E16_V_M1 */ 61914, /* PseudoVSSSEG7E16_V_M1_MASK */ 61919, /* PseudoVSSSEG7E16_V_MF2 */ 61925, /* PseudoVSSSEG7E16_V_MF2_MASK */ 61930, /* PseudoVSSSEG7E16_V_MF4 */ 61936, /* PseudoVSSSEG7E16_V_MF4_MASK */ 61941, /* PseudoVSSSEG7E32_V_M1 */ 61947, /* PseudoVSSSEG7E32_V_M1_MASK */ 61952, /* PseudoVSSSEG7E32_V_MF2 */ 61958, /* PseudoVSSSEG7E32_V_MF2_MASK */ 61963, /* PseudoVSSSEG7E64_V_M1 */ 61969, /* PseudoVSSSEG7E64_V_M1_MASK */ 61974, /* PseudoVSSSEG7E8_V_M1 */ 61980, /* PseudoVSSSEG7E8_V_M1_MASK */ 61985, /* PseudoVSSSEG7E8_V_MF2 */ 61991, /* PseudoVSSSEG7E8_V_MF2_MASK */ 61996, /* PseudoVSSSEG7E8_V_MF4 */ 62002, /* PseudoVSSSEG7E8_V_MF4_MASK */ 62007, /* PseudoVSSSEG7E8_V_MF8 */ 62013, /* PseudoVSSSEG7E8_V_MF8_MASK */ 62018, /* PseudoVSSSEG8E16_V_M1 */ 62024, /* PseudoVSSSEG8E16_V_M1_MASK */ 62029, /* PseudoVSSSEG8E16_V_MF2 */ 62035, /* PseudoVSSSEG8E16_V_MF2_MASK */ 62040, /* PseudoVSSSEG8E16_V_MF4 */ 62046, /* PseudoVSSSEG8E16_V_MF4_MASK */ 62051, /* PseudoVSSSEG8E32_V_M1 */ 62057, /* PseudoVSSSEG8E32_V_M1_MASK */ 62062, /* PseudoVSSSEG8E32_V_MF2 */ 62068, /* PseudoVSSSEG8E32_V_MF2_MASK */ 62073, /* PseudoVSSSEG8E64_V_M1 */ 62079, /* PseudoVSSSEG8E64_V_M1_MASK */ 62084, /* PseudoVSSSEG8E8_V_M1 */ 62090, /* PseudoVSSSEG8E8_V_M1_MASK */ 62095, /* PseudoVSSSEG8E8_V_MF2 */ 62101, /* PseudoVSSSEG8E8_V_MF2_MASK */ 62106, /* PseudoVSSSEG8E8_V_MF4 */ 62112, /* PseudoVSSSEG8E8_V_MF4_MASK */ 62117, /* PseudoVSSSEG8E8_V_MF8 */ 62123, /* PseudoVSSSEG8E8_V_MF8_MASK */ 62128, /* PseudoVSSUBU_VV_M1 */ 62134, /* PseudoVSSUBU_VV_M1_MASK */ 62139, /* PseudoVSSUBU_VV_M1_TU */ 62147, /* PseudoVSSUBU_VV_M2 */ 62153, /* PseudoVSSUBU_VV_M2_MASK */ 62158, /* PseudoVSSUBU_VV_M2_TU */ 62166, /* PseudoVSSUBU_VV_M4 */ 62172, /* PseudoVSSUBU_VV_M4_MASK */ 62177, /* PseudoVSSUBU_VV_M4_TU */ 62185, /* PseudoVSSUBU_VV_M8 */ 62191, /* PseudoVSSUBU_VV_M8_MASK */ 62196, /* PseudoVSSUBU_VV_M8_TU */ 62204, /* PseudoVSSUBU_VV_MF2 */ 62210, /* PseudoVSSUBU_VV_MF2_MASK */ 62215, /* PseudoVSSUBU_VV_MF2_TU */ 62223, /* PseudoVSSUBU_VV_MF4 */ 62229, /* PseudoVSSUBU_VV_MF4_MASK */ 62234, /* PseudoVSSUBU_VV_MF4_TU */ 62242, /* PseudoVSSUBU_VV_MF8 */ 62248, /* PseudoVSSUBU_VV_MF8_MASK */ 62253, /* PseudoVSSUBU_VV_MF8_TU */ 62261, /* PseudoVSSUBU_VX_M1 */ 62267, /* PseudoVSSUBU_VX_M1_MASK */ 62272, /* PseudoVSSUBU_VX_M1_TU */ 62280, /* PseudoVSSUBU_VX_M2 */ 62286, /* PseudoVSSUBU_VX_M2_MASK */ 62291, /* PseudoVSSUBU_VX_M2_TU */ 62299, /* PseudoVSSUBU_VX_M4 */ 62305, /* PseudoVSSUBU_VX_M4_MASK */ 62310, /* PseudoVSSUBU_VX_M4_TU */ 62318, /* PseudoVSSUBU_VX_M8 */ 62324, /* PseudoVSSUBU_VX_M8_MASK */ 62329, /* PseudoVSSUBU_VX_M8_TU */ 62337, /* PseudoVSSUBU_VX_MF2 */ 62343, /* PseudoVSSUBU_VX_MF2_MASK */ 62348, /* PseudoVSSUBU_VX_MF2_TU */ 62356, /* PseudoVSSUBU_VX_MF4 */ 62362, /* PseudoVSSUBU_VX_MF4_MASK */ 62367, /* PseudoVSSUBU_VX_MF4_TU */ 62375, /* PseudoVSSUBU_VX_MF8 */ 62381, /* PseudoVSSUBU_VX_MF8_MASK */ 62386, /* PseudoVSSUBU_VX_MF8_TU */ 62394, /* PseudoVSSUB_VV_M1 */ 62400, /* PseudoVSSUB_VV_M1_MASK */ 62405, /* PseudoVSSUB_VV_M1_TU */ 62413, /* PseudoVSSUB_VV_M2 */ 62419, /* PseudoVSSUB_VV_M2_MASK */ 62424, /* PseudoVSSUB_VV_M2_TU */ 62432, /* PseudoVSSUB_VV_M4 */ 62438, /* PseudoVSSUB_VV_M4_MASK */ 62443, /* PseudoVSSUB_VV_M4_TU */ 62451, /* PseudoVSSUB_VV_M8 */ 62457, /* PseudoVSSUB_VV_M8_MASK */ 62462, /* PseudoVSSUB_VV_M8_TU */ 62470, /* PseudoVSSUB_VV_MF2 */ 62476, /* PseudoVSSUB_VV_MF2_MASK */ 62481, /* PseudoVSSUB_VV_MF2_TU */ 62489, /* PseudoVSSUB_VV_MF4 */ 62495, /* PseudoVSSUB_VV_MF4_MASK */ 62500, /* PseudoVSSUB_VV_MF4_TU */ 62508, /* PseudoVSSUB_VV_MF8 */ 62514, /* PseudoVSSUB_VV_MF8_MASK */ 62519, /* PseudoVSSUB_VV_MF8_TU */ 62527, /* PseudoVSSUB_VX_M1 */ 62533, /* PseudoVSSUB_VX_M1_MASK */ 62538, /* PseudoVSSUB_VX_M1_TU */ 62546, /* PseudoVSSUB_VX_M2 */ 62552, /* PseudoVSSUB_VX_M2_MASK */ 62557, /* PseudoVSSUB_VX_M2_TU */ 62565, /* PseudoVSSUB_VX_M4 */ 62571, /* PseudoVSSUB_VX_M4_MASK */ 62576, /* PseudoVSSUB_VX_M4_TU */ 62584, /* PseudoVSSUB_VX_M8 */ 62590, /* PseudoVSSUB_VX_M8_MASK */ 62595, /* PseudoVSSUB_VX_M8_TU */ 62603, /* PseudoVSSUB_VX_MF2 */ 62609, /* PseudoVSSUB_VX_MF2_MASK */ 62614, /* PseudoVSSUB_VX_MF2_TU */ 62622, /* PseudoVSSUB_VX_MF4 */ 62628, /* PseudoVSSUB_VX_MF4_MASK */ 62633, /* PseudoVSSUB_VX_MF4_TU */ 62641, /* PseudoVSSUB_VX_MF8 */ 62647, /* PseudoVSSUB_VX_MF8_MASK */ 62652, /* PseudoVSSUB_VX_MF8_TU */ 62660, /* PseudoVSUB_VV_M1 */ 62666, /* PseudoVSUB_VV_M1_MASK */ 62671, /* PseudoVSUB_VV_M1_TU */ 62679, /* PseudoVSUB_VV_M2 */ 62685, /* PseudoVSUB_VV_M2_MASK */ 62690, /* PseudoVSUB_VV_M2_TU */ 62698, /* PseudoVSUB_VV_M4 */ 62704, /* PseudoVSUB_VV_M4_MASK */ 62709, /* PseudoVSUB_VV_M4_TU */ 62717, /* PseudoVSUB_VV_M8 */ 62723, /* PseudoVSUB_VV_M8_MASK */ 62728, /* PseudoVSUB_VV_M8_TU */ 62736, /* PseudoVSUB_VV_MF2 */ 62742, /* PseudoVSUB_VV_MF2_MASK */ 62747, /* PseudoVSUB_VV_MF2_TU */ 62755, /* PseudoVSUB_VV_MF4 */ 62761, /* PseudoVSUB_VV_MF4_MASK */ 62766, /* PseudoVSUB_VV_MF4_TU */ 62774, /* PseudoVSUB_VV_MF8 */ 62780, /* PseudoVSUB_VV_MF8_MASK */ 62785, /* PseudoVSUB_VV_MF8_TU */ 62793, /* PseudoVSUB_VX_M1 */ 62799, /* PseudoVSUB_VX_M1_MASK */ 62804, /* PseudoVSUB_VX_M1_TU */ 62812, /* PseudoVSUB_VX_M2 */ 62818, /* PseudoVSUB_VX_M2_MASK */ 62823, /* PseudoVSUB_VX_M2_TU */ 62831, /* PseudoVSUB_VX_M4 */ 62837, /* PseudoVSUB_VX_M4_MASK */ 62842, /* PseudoVSUB_VX_M4_TU */ 62850, /* PseudoVSUB_VX_M8 */ 62856, /* PseudoVSUB_VX_M8_MASK */ 62861, /* PseudoVSUB_VX_M8_TU */ 62869, /* PseudoVSUB_VX_MF2 */ 62875, /* PseudoVSUB_VX_MF2_MASK */ 62880, /* PseudoVSUB_VX_MF2_TU */ 62888, /* PseudoVSUB_VX_MF4 */ 62894, /* PseudoVSUB_VX_MF4_MASK */ 62899, /* PseudoVSUB_VX_MF4_TU */ 62907, /* PseudoVSUB_VX_MF8 */ 62913, /* PseudoVSUB_VX_MF8_MASK */ 62918, /* PseudoVSUB_VX_MF8_TU */ 62926, /* PseudoVSUXEI16_V_M1_M1 */ 62932, /* PseudoVSUXEI16_V_M1_M1_MASK */ 62937, /* PseudoVSUXEI16_V_M1_M2 */ 62943, /* PseudoVSUXEI16_V_M1_M2_MASK */ 62948, /* PseudoVSUXEI16_V_M1_M4 */ 62954, /* PseudoVSUXEI16_V_M1_M4_MASK */ 62959, /* PseudoVSUXEI16_V_M1_MF2 */ 62965, /* PseudoVSUXEI16_V_M1_MF2_MASK */ 62970, /* PseudoVSUXEI16_V_M2_M1 */ 62976, /* PseudoVSUXEI16_V_M2_M1_MASK */ 62981, /* PseudoVSUXEI16_V_M2_M2 */ 62987, /* PseudoVSUXEI16_V_M2_M2_MASK */ 62992, /* PseudoVSUXEI16_V_M2_M4 */ 62998, /* PseudoVSUXEI16_V_M2_M4_MASK */ 63003, /* PseudoVSUXEI16_V_M2_M8 */ 63009, /* PseudoVSUXEI16_V_M2_M8_MASK */ 63014, /* PseudoVSUXEI16_V_M4_M2 */ 63020, /* PseudoVSUXEI16_V_M4_M2_MASK */ 63025, /* PseudoVSUXEI16_V_M4_M4 */ 63031, /* PseudoVSUXEI16_V_M4_M4_MASK */ 63036, /* PseudoVSUXEI16_V_M4_M8 */ 63042, /* PseudoVSUXEI16_V_M4_M8_MASK */ 63047, /* PseudoVSUXEI16_V_M8_M4 */ 63053, /* PseudoVSUXEI16_V_M8_M4_MASK */ 63058, /* PseudoVSUXEI16_V_M8_M8 */ 63064, /* PseudoVSUXEI16_V_M8_M8_MASK */ 63069, /* PseudoVSUXEI16_V_MF2_M1 */ 63075, /* PseudoVSUXEI16_V_MF2_M1_MASK */ 63080, /* PseudoVSUXEI16_V_MF2_M2 */ 63086, /* PseudoVSUXEI16_V_MF2_M2_MASK */ 63091, /* PseudoVSUXEI16_V_MF2_MF2 */ 63097, /* PseudoVSUXEI16_V_MF2_MF2_MASK */ 63102, /* PseudoVSUXEI16_V_MF2_MF4 */ 63108, /* PseudoVSUXEI16_V_MF2_MF4_MASK */ 63113, /* PseudoVSUXEI16_V_MF4_M1 */ 63119, /* PseudoVSUXEI16_V_MF4_M1_MASK */ 63124, /* PseudoVSUXEI16_V_MF4_MF2 */ 63130, /* PseudoVSUXEI16_V_MF4_MF2_MASK */ 63135, /* PseudoVSUXEI16_V_MF4_MF4 */ 63141, /* PseudoVSUXEI16_V_MF4_MF4_MASK */ 63146, /* PseudoVSUXEI16_V_MF4_MF8 */ 63152, /* PseudoVSUXEI16_V_MF4_MF8_MASK */ 63157, /* PseudoVSUXEI32_V_M1_M1 */ 63163, /* PseudoVSUXEI32_V_M1_M1_MASK */ 63168, /* PseudoVSUXEI32_V_M1_M2 */ 63174, /* PseudoVSUXEI32_V_M1_M2_MASK */ 63179, /* PseudoVSUXEI32_V_M1_MF2 */ 63185, /* PseudoVSUXEI32_V_M1_MF2_MASK */ 63190, /* PseudoVSUXEI32_V_M1_MF4 */ 63196, /* PseudoVSUXEI32_V_M1_MF4_MASK */ 63201, /* PseudoVSUXEI32_V_M2_M1 */ 63207, /* PseudoVSUXEI32_V_M2_M1_MASK */ 63212, /* PseudoVSUXEI32_V_M2_M2 */ 63218, /* PseudoVSUXEI32_V_M2_M2_MASK */ 63223, /* PseudoVSUXEI32_V_M2_M4 */ 63229, /* PseudoVSUXEI32_V_M2_M4_MASK */ 63234, /* PseudoVSUXEI32_V_M2_MF2 */ 63240, /* PseudoVSUXEI32_V_M2_MF2_MASK */ 63245, /* PseudoVSUXEI32_V_M4_M1 */ 63251, /* PseudoVSUXEI32_V_M4_M1_MASK */ 63256, /* PseudoVSUXEI32_V_M4_M2 */ 63262, /* PseudoVSUXEI32_V_M4_M2_MASK */ 63267, /* PseudoVSUXEI32_V_M4_M4 */ 63273, /* PseudoVSUXEI32_V_M4_M4_MASK */ 63278, /* PseudoVSUXEI32_V_M4_M8 */ 63284, /* PseudoVSUXEI32_V_M4_M8_MASK */ 63289, /* PseudoVSUXEI32_V_M8_M2 */ 63295, /* PseudoVSUXEI32_V_M8_M2_MASK */ 63300, /* PseudoVSUXEI32_V_M8_M4 */ 63306, /* PseudoVSUXEI32_V_M8_M4_MASK */ 63311, /* PseudoVSUXEI32_V_M8_M8 */ 63317, /* PseudoVSUXEI32_V_M8_M8_MASK */ 63322, /* PseudoVSUXEI32_V_MF2_M1 */ 63328, /* PseudoVSUXEI32_V_MF2_M1_MASK */ 63333, /* PseudoVSUXEI32_V_MF2_MF2 */ 63339, /* PseudoVSUXEI32_V_MF2_MF2_MASK */ 63344, /* PseudoVSUXEI32_V_MF2_MF4 */ 63350, /* PseudoVSUXEI32_V_MF2_MF4_MASK */ 63355, /* PseudoVSUXEI32_V_MF2_MF8 */ 63361, /* PseudoVSUXEI32_V_MF2_MF8_MASK */ 63366, /* PseudoVSUXEI64_V_M1_M1 */ 63372, /* PseudoVSUXEI64_V_M1_M1_MASK */ 63377, /* PseudoVSUXEI64_V_M1_MF2 */ 63383, /* PseudoVSUXEI64_V_M1_MF2_MASK */ 63388, /* PseudoVSUXEI64_V_M1_MF4 */ 63394, /* PseudoVSUXEI64_V_M1_MF4_MASK */ 63399, /* PseudoVSUXEI64_V_M1_MF8 */ 63405, /* PseudoVSUXEI64_V_M1_MF8_MASK */ 63410, /* PseudoVSUXEI64_V_M2_M1 */ 63416, /* PseudoVSUXEI64_V_M2_M1_MASK */ 63421, /* PseudoVSUXEI64_V_M2_M2 */ 63427, /* PseudoVSUXEI64_V_M2_M2_MASK */ 63432, /* PseudoVSUXEI64_V_M2_MF2 */ 63438, /* PseudoVSUXEI64_V_M2_MF2_MASK */ 63443, /* PseudoVSUXEI64_V_M2_MF4 */ 63449, /* PseudoVSUXEI64_V_M2_MF4_MASK */ 63454, /* PseudoVSUXEI64_V_M4_M1 */ 63460, /* PseudoVSUXEI64_V_M4_M1_MASK */ 63465, /* PseudoVSUXEI64_V_M4_M2 */ 63471, /* PseudoVSUXEI64_V_M4_M2_MASK */ 63476, /* PseudoVSUXEI64_V_M4_M4 */ 63482, /* PseudoVSUXEI64_V_M4_M4_MASK */ 63487, /* PseudoVSUXEI64_V_M4_MF2 */ 63493, /* PseudoVSUXEI64_V_M4_MF2_MASK */ 63498, /* PseudoVSUXEI64_V_M8_M1 */ 63504, /* PseudoVSUXEI64_V_M8_M1_MASK */ 63509, /* PseudoVSUXEI64_V_M8_M2 */ 63515, /* PseudoVSUXEI64_V_M8_M2_MASK */ 63520, /* PseudoVSUXEI64_V_M8_M4 */ 63526, /* PseudoVSUXEI64_V_M8_M4_MASK */ 63531, /* PseudoVSUXEI64_V_M8_M8 */ 63537, /* PseudoVSUXEI64_V_M8_M8_MASK */ 63542, /* PseudoVSUXEI8_V_M1_M1 */ 63548, /* PseudoVSUXEI8_V_M1_M1_MASK */ 63553, /* PseudoVSUXEI8_V_M1_M2 */ 63559, /* PseudoVSUXEI8_V_M1_M2_MASK */ 63564, /* PseudoVSUXEI8_V_M1_M4 */ 63570, /* PseudoVSUXEI8_V_M1_M4_MASK */ 63575, /* PseudoVSUXEI8_V_M1_M8 */ 63581, /* PseudoVSUXEI8_V_M1_M8_MASK */ 63586, /* PseudoVSUXEI8_V_M2_M2 */ 63592, /* PseudoVSUXEI8_V_M2_M2_MASK */ 63597, /* PseudoVSUXEI8_V_M2_M4 */ 63603, /* PseudoVSUXEI8_V_M2_M4_MASK */ 63608, /* PseudoVSUXEI8_V_M2_M8 */ 63614, /* PseudoVSUXEI8_V_M2_M8_MASK */ 63619, /* PseudoVSUXEI8_V_M4_M4 */ 63625, /* PseudoVSUXEI8_V_M4_M4_MASK */ 63630, /* PseudoVSUXEI8_V_M4_M8 */ 63636, /* PseudoVSUXEI8_V_M4_M8_MASK */ 63641, /* PseudoVSUXEI8_V_M8_M8 */ 63647, /* PseudoVSUXEI8_V_M8_M8_MASK */ 63652, /* PseudoVSUXEI8_V_MF2_M1 */ 63658, /* PseudoVSUXEI8_V_MF2_M1_MASK */ 63663, /* PseudoVSUXEI8_V_MF2_M2 */ 63669, /* PseudoVSUXEI8_V_MF2_M2_MASK */ 63674, /* PseudoVSUXEI8_V_MF2_M4 */ 63680, /* PseudoVSUXEI8_V_MF2_M4_MASK */ 63685, /* PseudoVSUXEI8_V_MF2_MF2 */ 63691, /* PseudoVSUXEI8_V_MF2_MF2_MASK */ 63696, /* PseudoVSUXEI8_V_MF4_M1 */ 63702, /* PseudoVSUXEI8_V_MF4_M1_MASK */ 63707, /* PseudoVSUXEI8_V_MF4_M2 */ 63713, /* PseudoVSUXEI8_V_MF4_M2_MASK */ 63718, /* PseudoVSUXEI8_V_MF4_MF2 */ 63724, /* PseudoVSUXEI8_V_MF4_MF2_MASK */ 63729, /* PseudoVSUXEI8_V_MF4_MF4 */ 63735, /* PseudoVSUXEI8_V_MF4_MF4_MASK */ 63740, /* PseudoVSUXEI8_V_MF8_M1 */ 63746, /* PseudoVSUXEI8_V_MF8_M1_MASK */ 63751, /* PseudoVSUXEI8_V_MF8_MF2 */ 63757, /* PseudoVSUXEI8_V_MF8_MF2_MASK */ 63762, /* PseudoVSUXEI8_V_MF8_MF4 */ 63768, /* PseudoVSUXEI8_V_MF8_MF4_MASK */ 63773, /* PseudoVSUXEI8_V_MF8_MF8 */ 63779, /* PseudoVSUXEI8_V_MF8_MF8_MASK */ 63784, /* PseudoVSUXSEG2EI16_V_M1_M1 */ 63790, /* PseudoVSUXSEG2EI16_V_M1_M1_MASK */ 63795, /* PseudoVSUXSEG2EI16_V_M1_M2 */ 63801, /* PseudoVSUXSEG2EI16_V_M1_M2_MASK */ 63806, /* PseudoVSUXSEG2EI16_V_M1_M4 */ 63812, /* PseudoVSUXSEG2EI16_V_M1_M4_MASK */ 63817, /* PseudoVSUXSEG2EI16_V_M1_MF2 */ 63823, /* PseudoVSUXSEG2EI16_V_M1_MF2_MASK */ 63828, /* PseudoVSUXSEG2EI16_V_M2_M1 */ 63834, /* PseudoVSUXSEG2EI16_V_M2_M1_MASK */ 63839, /* PseudoVSUXSEG2EI16_V_M2_M2 */ 63845, /* PseudoVSUXSEG2EI16_V_M2_M2_MASK */ 63850, /* PseudoVSUXSEG2EI16_V_M2_M4 */ 63856, /* PseudoVSUXSEG2EI16_V_M2_M4_MASK */ 63861, /* PseudoVSUXSEG2EI16_V_M4_M2 */ 63867, /* PseudoVSUXSEG2EI16_V_M4_M2_MASK */ 63872, /* PseudoVSUXSEG2EI16_V_M4_M4 */ 63878, /* PseudoVSUXSEG2EI16_V_M4_M4_MASK */ 63883, /* PseudoVSUXSEG2EI16_V_M8_M4 */ 63889, /* PseudoVSUXSEG2EI16_V_M8_M4_MASK */ 63894, /* PseudoVSUXSEG2EI16_V_MF2_M1 */ 63900, /* PseudoVSUXSEG2EI16_V_MF2_M1_MASK */ 63905, /* PseudoVSUXSEG2EI16_V_MF2_M2 */ 63911, /* PseudoVSUXSEG2EI16_V_MF2_M2_MASK */ 63916, /* PseudoVSUXSEG2EI16_V_MF2_MF2 */ 63922, /* PseudoVSUXSEG2EI16_V_MF2_MF2_MASK */ 63927, /* PseudoVSUXSEG2EI16_V_MF2_MF4 */ 63933, /* PseudoVSUXSEG2EI16_V_MF2_MF4_MASK */ 63938, /* PseudoVSUXSEG2EI16_V_MF4_M1 */ 63944, /* PseudoVSUXSEG2EI16_V_MF4_M1_MASK */ 63949, /* PseudoVSUXSEG2EI16_V_MF4_MF2 */ 63955, /* PseudoVSUXSEG2EI16_V_MF4_MF2_MASK */ 63960, /* PseudoVSUXSEG2EI16_V_MF4_MF4 */ 63966, /* PseudoVSUXSEG2EI16_V_MF4_MF4_MASK */ 63971, /* PseudoVSUXSEG2EI16_V_MF4_MF8 */ 63977, /* PseudoVSUXSEG2EI16_V_MF4_MF8_MASK */ 63982, /* PseudoVSUXSEG2EI32_V_M1_M1 */ 63988, /* PseudoVSUXSEG2EI32_V_M1_M1_MASK */ 63993, /* PseudoVSUXSEG2EI32_V_M1_M2 */ 63999, /* PseudoVSUXSEG2EI32_V_M1_M2_MASK */ 64004, /* PseudoVSUXSEG2EI32_V_M1_MF2 */ 64010, /* PseudoVSUXSEG2EI32_V_M1_MF2_MASK */ 64015, /* PseudoVSUXSEG2EI32_V_M1_MF4 */ 64021, /* PseudoVSUXSEG2EI32_V_M1_MF4_MASK */ 64026, /* PseudoVSUXSEG2EI32_V_M2_M1 */ 64032, /* PseudoVSUXSEG2EI32_V_M2_M1_MASK */ 64037, /* PseudoVSUXSEG2EI32_V_M2_M2 */ 64043, /* PseudoVSUXSEG2EI32_V_M2_M2_MASK */ 64048, /* PseudoVSUXSEG2EI32_V_M2_M4 */ 64054, /* PseudoVSUXSEG2EI32_V_M2_M4_MASK */ 64059, /* PseudoVSUXSEG2EI32_V_M2_MF2 */ 64065, /* PseudoVSUXSEG2EI32_V_M2_MF2_MASK */ 64070, /* PseudoVSUXSEG2EI32_V_M4_M1 */ 64076, /* PseudoVSUXSEG2EI32_V_M4_M1_MASK */ 64081, /* PseudoVSUXSEG2EI32_V_M4_M2 */ 64087, /* PseudoVSUXSEG2EI32_V_M4_M2_MASK */ 64092, /* PseudoVSUXSEG2EI32_V_M4_M4 */ 64098, /* PseudoVSUXSEG2EI32_V_M4_M4_MASK */ 64103, /* PseudoVSUXSEG2EI32_V_M8_M2 */ 64109, /* PseudoVSUXSEG2EI32_V_M8_M2_MASK */ 64114, /* PseudoVSUXSEG2EI32_V_M8_M4 */ 64120, /* PseudoVSUXSEG2EI32_V_M8_M4_MASK */ 64125, /* PseudoVSUXSEG2EI32_V_MF2_M1 */ 64131, /* PseudoVSUXSEG2EI32_V_MF2_M1_MASK */ 64136, /* PseudoVSUXSEG2EI32_V_MF2_MF2 */ 64142, /* PseudoVSUXSEG2EI32_V_MF2_MF2_MASK */ 64147, /* PseudoVSUXSEG2EI32_V_MF2_MF4 */ 64153, /* PseudoVSUXSEG2EI32_V_MF2_MF4_MASK */ 64158, /* PseudoVSUXSEG2EI32_V_MF2_MF8 */ 64164, /* PseudoVSUXSEG2EI32_V_MF2_MF8_MASK */ 64169, /* PseudoVSUXSEG2EI64_V_M1_M1 */ 64175, /* PseudoVSUXSEG2EI64_V_M1_M1_MASK */ 64180, /* PseudoVSUXSEG2EI64_V_M1_MF2 */ 64186, /* PseudoVSUXSEG2EI64_V_M1_MF2_MASK */ 64191, /* PseudoVSUXSEG2EI64_V_M1_MF4 */ 64197, /* PseudoVSUXSEG2EI64_V_M1_MF4_MASK */ 64202, /* PseudoVSUXSEG2EI64_V_M1_MF8 */ 64208, /* PseudoVSUXSEG2EI64_V_M1_MF8_MASK */ 64213, /* PseudoVSUXSEG2EI64_V_M2_M1 */ 64219, /* PseudoVSUXSEG2EI64_V_M2_M1_MASK */ 64224, /* PseudoVSUXSEG2EI64_V_M2_M2 */ 64230, /* PseudoVSUXSEG2EI64_V_M2_M2_MASK */ 64235, /* PseudoVSUXSEG2EI64_V_M2_MF2 */ 64241, /* PseudoVSUXSEG2EI64_V_M2_MF2_MASK */ 64246, /* PseudoVSUXSEG2EI64_V_M2_MF4 */ 64252, /* PseudoVSUXSEG2EI64_V_M2_MF4_MASK */ 64257, /* PseudoVSUXSEG2EI64_V_M4_M1 */ 64263, /* PseudoVSUXSEG2EI64_V_M4_M1_MASK */ 64268, /* PseudoVSUXSEG2EI64_V_M4_M2 */ 64274, /* PseudoVSUXSEG2EI64_V_M4_M2_MASK */ 64279, /* PseudoVSUXSEG2EI64_V_M4_M4 */ 64285, /* PseudoVSUXSEG2EI64_V_M4_M4_MASK */ 64290, /* PseudoVSUXSEG2EI64_V_M4_MF2 */ 64296, /* PseudoVSUXSEG2EI64_V_M4_MF2_MASK */ 64301, /* PseudoVSUXSEG2EI64_V_M8_M1 */ 64307, /* PseudoVSUXSEG2EI64_V_M8_M1_MASK */ 64312, /* PseudoVSUXSEG2EI64_V_M8_M2 */ 64318, /* PseudoVSUXSEG2EI64_V_M8_M2_MASK */ 64323, /* PseudoVSUXSEG2EI64_V_M8_M4 */ 64329, /* PseudoVSUXSEG2EI64_V_M8_M4_MASK */ 64334, /* PseudoVSUXSEG2EI8_V_M1_M1 */ 64340, /* PseudoVSUXSEG2EI8_V_M1_M1_MASK */ 64345, /* PseudoVSUXSEG2EI8_V_M1_M2 */ 64351, /* PseudoVSUXSEG2EI8_V_M1_M2_MASK */ 64356, /* PseudoVSUXSEG2EI8_V_M1_M4 */ 64362, /* PseudoVSUXSEG2EI8_V_M1_M4_MASK */ 64367, /* PseudoVSUXSEG2EI8_V_M2_M2 */ 64373, /* PseudoVSUXSEG2EI8_V_M2_M2_MASK */ 64378, /* PseudoVSUXSEG2EI8_V_M2_M4 */ 64384, /* PseudoVSUXSEG2EI8_V_M2_M4_MASK */ 64389, /* PseudoVSUXSEG2EI8_V_M4_M4 */ 64395, /* PseudoVSUXSEG2EI8_V_M4_M4_MASK */ 64400, /* PseudoVSUXSEG2EI8_V_MF2_M1 */ 64406, /* PseudoVSUXSEG2EI8_V_MF2_M1_MASK */ 64411, /* PseudoVSUXSEG2EI8_V_MF2_M2 */ 64417, /* PseudoVSUXSEG2EI8_V_MF2_M2_MASK */ 64422, /* PseudoVSUXSEG2EI8_V_MF2_M4 */ 64428, /* PseudoVSUXSEG2EI8_V_MF2_M4_MASK */ 64433, /* PseudoVSUXSEG2EI8_V_MF2_MF2 */ 64439, /* PseudoVSUXSEG2EI8_V_MF2_MF2_MASK */ 64444, /* PseudoVSUXSEG2EI8_V_MF4_M1 */ 64450, /* PseudoVSUXSEG2EI8_V_MF4_M1_MASK */ 64455, /* PseudoVSUXSEG2EI8_V_MF4_M2 */ 64461, /* PseudoVSUXSEG2EI8_V_MF4_M2_MASK */ 64466, /* PseudoVSUXSEG2EI8_V_MF4_MF2 */ 64472, /* PseudoVSUXSEG2EI8_V_MF4_MF2_MASK */ 64477, /* PseudoVSUXSEG2EI8_V_MF4_MF4 */ 64483, /* PseudoVSUXSEG2EI8_V_MF4_MF4_MASK */ 64488, /* PseudoVSUXSEG2EI8_V_MF8_M1 */ 64494, /* PseudoVSUXSEG2EI8_V_MF8_M1_MASK */ 64499, /* PseudoVSUXSEG2EI8_V_MF8_MF2 */ 64505, /* PseudoVSUXSEG2EI8_V_MF8_MF2_MASK */ 64510, /* PseudoVSUXSEG2EI8_V_MF8_MF4 */ 64516, /* PseudoVSUXSEG2EI8_V_MF8_MF4_MASK */ 64521, /* PseudoVSUXSEG2EI8_V_MF8_MF8 */ 64527, /* PseudoVSUXSEG2EI8_V_MF8_MF8_MASK */ 64532, /* PseudoVSUXSEG3EI16_V_M1_M1 */ 64538, /* PseudoVSUXSEG3EI16_V_M1_M1_MASK */ 64543, /* PseudoVSUXSEG3EI16_V_M1_M2 */ 64549, /* PseudoVSUXSEG3EI16_V_M1_M2_MASK */ 64554, /* PseudoVSUXSEG3EI16_V_M1_MF2 */ 64560, /* PseudoVSUXSEG3EI16_V_M1_MF2_MASK */ 64565, /* PseudoVSUXSEG3EI16_V_M2_M1 */ 64571, /* PseudoVSUXSEG3EI16_V_M2_M1_MASK */ 64576, /* PseudoVSUXSEG3EI16_V_M2_M2 */ 64582, /* PseudoVSUXSEG3EI16_V_M2_M2_MASK */ 64587, /* PseudoVSUXSEG3EI16_V_M4_M2 */ 64593, /* PseudoVSUXSEG3EI16_V_M4_M2_MASK */ 64598, /* PseudoVSUXSEG3EI16_V_MF2_M1 */ 64604, /* PseudoVSUXSEG3EI16_V_MF2_M1_MASK */ 64609, /* PseudoVSUXSEG3EI16_V_MF2_M2 */ 64615, /* PseudoVSUXSEG3EI16_V_MF2_M2_MASK */ 64620, /* PseudoVSUXSEG3EI16_V_MF2_MF2 */ 64626, /* PseudoVSUXSEG3EI16_V_MF2_MF2_MASK */ 64631, /* PseudoVSUXSEG3EI16_V_MF2_MF4 */ 64637, /* PseudoVSUXSEG3EI16_V_MF2_MF4_MASK */ 64642, /* PseudoVSUXSEG3EI16_V_MF4_M1 */ 64648, /* PseudoVSUXSEG3EI16_V_MF4_M1_MASK */ 64653, /* PseudoVSUXSEG3EI16_V_MF4_MF2 */ 64659, /* PseudoVSUXSEG3EI16_V_MF4_MF2_MASK */ 64664, /* PseudoVSUXSEG3EI16_V_MF4_MF4 */ 64670, /* PseudoVSUXSEG3EI16_V_MF4_MF4_MASK */ 64675, /* PseudoVSUXSEG3EI16_V_MF4_MF8 */ 64681, /* PseudoVSUXSEG3EI16_V_MF4_MF8_MASK */ 64686, /* PseudoVSUXSEG3EI32_V_M1_M1 */ 64692, /* PseudoVSUXSEG3EI32_V_M1_M1_MASK */ 64697, /* PseudoVSUXSEG3EI32_V_M1_M2 */ 64703, /* PseudoVSUXSEG3EI32_V_M1_M2_MASK */ 64708, /* PseudoVSUXSEG3EI32_V_M1_MF2 */ 64714, /* PseudoVSUXSEG3EI32_V_M1_MF2_MASK */ 64719, /* PseudoVSUXSEG3EI32_V_M1_MF4 */ 64725, /* PseudoVSUXSEG3EI32_V_M1_MF4_MASK */ 64730, /* PseudoVSUXSEG3EI32_V_M2_M1 */ 64736, /* PseudoVSUXSEG3EI32_V_M2_M1_MASK */ 64741, /* PseudoVSUXSEG3EI32_V_M2_M2 */ 64747, /* PseudoVSUXSEG3EI32_V_M2_M2_MASK */ 64752, /* PseudoVSUXSEG3EI32_V_M2_MF2 */ 64758, /* PseudoVSUXSEG3EI32_V_M2_MF2_MASK */ 64763, /* PseudoVSUXSEG3EI32_V_M4_M1 */ 64769, /* PseudoVSUXSEG3EI32_V_M4_M1_MASK */ 64774, /* PseudoVSUXSEG3EI32_V_M4_M2 */ 64780, /* PseudoVSUXSEG3EI32_V_M4_M2_MASK */ 64785, /* PseudoVSUXSEG3EI32_V_M8_M2 */ 64791, /* PseudoVSUXSEG3EI32_V_M8_M2_MASK */ 64796, /* PseudoVSUXSEG3EI32_V_MF2_M1 */ 64802, /* PseudoVSUXSEG3EI32_V_MF2_M1_MASK */ 64807, /* PseudoVSUXSEG3EI32_V_MF2_MF2 */ 64813, /* PseudoVSUXSEG3EI32_V_MF2_MF2_MASK */ 64818, /* PseudoVSUXSEG3EI32_V_MF2_MF4 */ 64824, /* PseudoVSUXSEG3EI32_V_MF2_MF4_MASK */ 64829, /* PseudoVSUXSEG3EI32_V_MF2_MF8 */ 64835, /* PseudoVSUXSEG3EI32_V_MF2_MF8_MASK */ 64840, /* PseudoVSUXSEG3EI64_V_M1_M1 */ 64846, /* PseudoVSUXSEG3EI64_V_M1_M1_MASK */ 64851, /* PseudoVSUXSEG3EI64_V_M1_MF2 */ 64857, /* PseudoVSUXSEG3EI64_V_M1_MF2_MASK */ 64862, /* PseudoVSUXSEG3EI64_V_M1_MF4 */ 64868, /* PseudoVSUXSEG3EI64_V_M1_MF4_MASK */ 64873, /* PseudoVSUXSEG3EI64_V_M1_MF8 */ 64879, /* PseudoVSUXSEG3EI64_V_M1_MF8_MASK */ 64884, /* PseudoVSUXSEG3EI64_V_M2_M1 */ 64890, /* PseudoVSUXSEG3EI64_V_M2_M1_MASK */ 64895, /* PseudoVSUXSEG3EI64_V_M2_M2 */ 64901, /* PseudoVSUXSEG3EI64_V_M2_M2_MASK */ 64906, /* PseudoVSUXSEG3EI64_V_M2_MF2 */ 64912, /* PseudoVSUXSEG3EI64_V_M2_MF2_MASK */ 64917, /* PseudoVSUXSEG3EI64_V_M2_MF4 */ 64923, /* PseudoVSUXSEG3EI64_V_M2_MF4_MASK */ 64928, /* PseudoVSUXSEG3EI64_V_M4_M1 */ 64934, /* PseudoVSUXSEG3EI64_V_M4_M1_MASK */ 64939, /* PseudoVSUXSEG3EI64_V_M4_M2 */ 64945, /* PseudoVSUXSEG3EI64_V_M4_M2_MASK */ 64950, /* PseudoVSUXSEG3EI64_V_M4_MF2 */ 64956, /* PseudoVSUXSEG3EI64_V_M4_MF2_MASK */ 64961, /* PseudoVSUXSEG3EI64_V_M8_M1 */ 64967, /* PseudoVSUXSEG3EI64_V_M8_M1_MASK */ 64972, /* PseudoVSUXSEG3EI64_V_M8_M2 */ 64978, /* PseudoVSUXSEG3EI64_V_M8_M2_MASK */ 64983, /* PseudoVSUXSEG3EI8_V_M1_M1 */ 64989, /* PseudoVSUXSEG3EI8_V_M1_M1_MASK */ 64994, /* PseudoVSUXSEG3EI8_V_M1_M2 */ 65000, /* PseudoVSUXSEG3EI8_V_M1_M2_MASK */ 65005, /* PseudoVSUXSEG3EI8_V_M2_M2 */ 65011, /* PseudoVSUXSEG3EI8_V_M2_M2_MASK */ 65016, /* PseudoVSUXSEG3EI8_V_MF2_M1 */ 65022, /* PseudoVSUXSEG3EI8_V_MF2_M1_MASK */ 65027, /* PseudoVSUXSEG3EI8_V_MF2_M2 */ 65033, /* PseudoVSUXSEG3EI8_V_MF2_M2_MASK */ 65038, /* PseudoVSUXSEG3EI8_V_MF2_MF2 */ 65044, /* PseudoVSUXSEG3EI8_V_MF2_MF2_MASK */ 65049, /* PseudoVSUXSEG3EI8_V_MF4_M1 */ 65055, /* PseudoVSUXSEG3EI8_V_MF4_M1_MASK */ 65060, /* PseudoVSUXSEG3EI8_V_MF4_M2 */ 65066, /* PseudoVSUXSEG3EI8_V_MF4_M2_MASK */ 65071, /* PseudoVSUXSEG3EI8_V_MF4_MF2 */ 65077, /* PseudoVSUXSEG3EI8_V_MF4_MF2_MASK */ 65082, /* PseudoVSUXSEG3EI8_V_MF4_MF4 */ 65088, /* PseudoVSUXSEG3EI8_V_MF4_MF4_MASK */ 65093, /* PseudoVSUXSEG3EI8_V_MF8_M1 */ 65099, /* PseudoVSUXSEG3EI8_V_MF8_M1_MASK */ 65104, /* PseudoVSUXSEG3EI8_V_MF8_MF2 */ 65110, /* PseudoVSUXSEG3EI8_V_MF8_MF2_MASK */ 65115, /* PseudoVSUXSEG3EI8_V_MF8_MF4 */ 65121, /* PseudoVSUXSEG3EI8_V_MF8_MF4_MASK */ 65126, /* PseudoVSUXSEG3EI8_V_MF8_MF8 */ 65132, /* PseudoVSUXSEG3EI8_V_MF8_MF8_MASK */ 65137, /* PseudoVSUXSEG4EI16_V_M1_M1 */ 65143, /* PseudoVSUXSEG4EI16_V_M1_M1_MASK */ 65148, /* PseudoVSUXSEG4EI16_V_M1_M2 */ 65154, /* PseudoVSUXSEG4EI16_V_M1_M2_MASK */ 65159, /* PseudoVSUXSEG4EI16_V_M1_MF2 */ 65165, /* PseudoVSUXSEG4EI16_V_M1_MF2_MASK */ 65170, /* PseudoVSUXSEG4EI16_V_M2_M1 */ 65176, /* PseudoVSUXSEG4EI16_V_M2_M1_MASK */ 65181, /* PseudoVSUXSEG4EI16_V_M2_M2 */ 65187, /* PseudoVSUXSEG4EI16_V_M2_M2_MASK */ 65192, /* PseudoVSUXSEG4EI16_V_M4_M2 */ 65198, /* PseudoVSUXSEG4EI16_V_M4_M2_MASK */ 65203, /* PseudoVSUXSEG4EI16_V_MF2_M1 */ 65209, /* PseudoVSUXSEG4EI16_V_MF2_M1_MASK */ 65214, /* PseudoVSUXSEG4EI16_V_MF2_M2 */ 65220, /* PseudoVSUXSEG4EI16_V_MF2_M2_MASK */ 65225, /* PseudoVSUXSEG4EI16_V_MF2_MF2 */ 65231, /* PseudoVSUXSEG4EI16_V_MF2_MF2_MASK */ 65236, /* PseudoVSUXSEG4EI16_V_MF2_MF4 */ 65242, /* PseudoVSUXSEG4EI16_V_MF2_MF4_MASK */ 65247, /* PseudoVSUXSEG4EI16_V_MF4_M1 */ 65253, /* PseudoVSUXSEG4EI16_V_MF4_M1_MASK */ 65258, /* PseudoVSUXSEG4EI16_V_MF4_MF2 */ 65264, /* PseudoVSUXSEG4EI16_V_MF4_MF2_MASK */ 65269, /* PseudoVSUXSEG4EI16_V_MF4_MF4 */ 65275, /* PseudoVSUXSEG4EI16_V_MF4_MF4_MASK */ 65280, /* PseudoVSUXSEG4EI16_V_MF4_MF8 */ 65286, /* PseudoVSUXSEG4EI16_V_MF4_MF8_MASK */ 65291, /* PseudoVSUXSEG4EI32_V_M1_M1 */ 65297, /* PseudoVSUXSEG4EI32_V_M1_M1_MASK */ 65302, /* PseudoVSUXSEG4EI32_V_M1_M2 */ 65308, /* PseudoVSUXSEG4EI32_V_M1_M2_MASK */ 65313, /* PseudoVSUXSEG4EI32_V_M1_MF2 */ 65319, /* PseudoVSUXSEG4EI32_V_M1_MF2_MASK */ 65324, /* PseudoVSUXSEG4EI32_V_M1_MF4 */ 65330, /* PseudoVSUXSEG4EI32_V_M1_MF4_MASK */ 65335, /* PseudoVSUXSEG4EI32_V_M2_M1 */ 65341, /* PseudoVSUXSEG4EI32_V_M2_M1_MASK */ 65346, /* PseudoVSUXSEG4EI32_V_M2_M2 */ 65352, /* PseudoVSUXSEG4EI32_V_M2_M2_MASK */ 65357, /* PseudoVSUXSEG4EI32_V_M2_MF2 */ 65363, /* PseudoVSUXSEG4EI32_V_M2_MF2_MASK */ 65368, /* PseudoVSUXSEG4EI32_V_M4_M1 */ 65374, /* PseudoVSUXSEG4EI32_V_M4_M1_MASK */ 65379, /* PseudoVSUXSEG4EI32_V_M4_M2 */ 65385, /* PseudoVSUXSEG4EI32_V_M4_M2_MASK */ 65390, /* PseudoVSUXSEG4EI32_V_M8_M2 */ 65396, /* PseudoVSUXSEG4EI32_V_M8_M2_MASK */ 65401, /* PseudoVSUXSEG4EI32_V_MF2_M1 */ 65407, /* PseudoVSUXSEG4EI32_V_MF2_M1_MASK */ 65412, /* PseudoVSUXSEG4EI32_V_MF2_MF2 */ 65418, /* PseudoVSUXSEG4EI32_V_MF2_MF2_MASK */ 65423, /* PseudoVSUXSEG4EI32_V_MF2_MF4 */ 65429, /* PseudoVSUXSEG4EI32_V_MF2_MF4_MASK */ 65434, /* PseudoVSUXSEG4EI32_V_MF2_MF8 */ 65440, /* PseudoVSUXSEG4EI32_V_MF2_MF8_MASK */ 65445, /* PseudoVSUXSEG4EI64_V_M1_M1 */ 65451, /* PseudoVSUXSEG4EI64_V_M1_M1_MASK */ 65456, /* PseudoVSUXSEG4EI64_V_M1_MF2 */ 65462, /* PseudoVSUXSEG4EI64_V_M1_MF2_MASK */ 65467, /* PseudoVSUXSEG4EI64_V_M1_MF4 */ 65473, /* PseudoVSUXSEG4EI64_V_M1_MF4_MASK */ 65478, /* PseudoVSUXSEG4EI64_V_M1_MF8 */ 65484, /* PseudoVSUXSEG4EI64_V_M1_MF8_MASK */ 65489, /* PseudoVSUXSEG4EI64_V_M2_M1 */ 65495, /* PseudoVSUXSEG4EI64_V_M2_M1_MASK */ 65500, /* PseudoVSUXSEG4EI64_V_M2_M2 */ 65506, /* PseudoVSUXSEG4EI64_V_M2_M2_MASK */ 65511, /* PseudoVSUXSEG4EI64_V_M2_MF2 */ 65517, /* PseudoVSUXSEG4EI64_V_M2_MF2_MASK */ 65522, /* PseudoVSUXSEG4EI64_V_M2_MF4 */ 65528, /* PseudoVSUXSEG4EI64_V_M2_MF4_MASK */ 65533, /* PseudoVSUXSEG4EI64_V_M4_M1 */ 65539, /* PseudoVSUXSEG4EI64_V_M4_M1_MASK */ 65544, /* PseudoVSUXSEG4EI64_V_M4_M2 */ 65550, /* PseudoVSUXSEG4EI64_V_M4_M2_MASK */ 65555, /* PseudoVSUXSEG4EI64_V_M4_MF2 */ 65561, /* PseudoVSUXSEG4EI64_V_M4_MF2_MASK */ 65566, /* PseudoVSUXSEG4EI64_V_M8_M1 */ 65572, /* PseudoVSUXSEG4EI64_V_M8_M1_MASK */ 65577, /* PseudoVSUXSEG4EI64_V_M8_M2 */ 65583, /* PseudoVSUXSEG4EI64_V_M8_M2_MASK */ 65588, /* PseudoVSUXSEG4EI8_V_M1_M1 */ 65594, /* PseudoVSUXSEG4EI8_V_M1_M1_MASK */ 65599, /* PseudoVSUXSEG4EI8_V_M1_M2 */ 65605, /* PseudoVSUXSEG4EI8_V_M1_M2_MASK */ 65610, /* PseudoVSUXSEG4EI8_V_M2_M2 */ 65616, /* PseudoVSUXSEG4EI8_V_M2_M2_MASK */ 65621, /* PseudoVSUXSEG4EI8_V_MF2_M1 */ 65627, /* PseudoVSUXSEG4EI8_V_MF2_M1_MASK */ 65632, /* PseudoVSUXSEG4EI8_V_MF2_M2 */ 65638, /* PseudoVSUXSEG4EI8_V_MF2_M2_MASK */ 65643, /* PseudoVSUXSEG4EI8_V_MF2_MF2 */ 65649, /* PseudoVSUXSEG4EI8_V_MF2_MF2_MASK */ 65654, /* PseudoVSUXSEG4EI8_V_MF4_M1 */ 65660, /* PseudoVSUXSEG4EI8_V_MF4_M1_MASK */ 65665, /* PseudoVSUXSEG4EI8_V_MF4_M2 */ 65671, /* PseudoVSUXSEG4EI8_V_MF4_M2_MASK */ 65676, /* PseudoVSUXSEG4EI8_V_MF4_MF2 */ 65682, /* PseudoVSUXSEG4EI8_V_MF4_MF2_MASK */ 65687, /* PseudoVSUXSEG4EI8_V_MF4_MF4 */ 65693, /* PseudoVSUXSEG4EI8_V_MF4_MF4_MASK */ 65698, /* PseudoVSUXSEG4EI8_V_MF8_M1 */ 65704, /* PseudoVSUXSEG4EI8_V_MF8_M1_MASK */ 65709, /* PseudoVSUXSEG4EI8_V_MF8_MF2 */ 65715, /* PseudoVSUXSEG4EI8_V_MF8_MF2_MASK */ 65720, /* PseudoVSUXSEG4EI8_V_MF8_MF4 */ 65726, /* PseudoVSUXSEG4EI8_V_MF8_MF4_MASK */ 65731, /* PseudoVSUXSEG4EI8_V_MF8_MF8 */ 65737, /* PseudoVSUXSEG4EI8_V_MF8_MF8_MASK */ 65742, /* PseudoVSUXSEG5EI16_V_M1_M1 */ 65748, /* PseudoVSUXSEG5EI16_V_M1_M1_MASK */ 65753, /* PseudoVSUXSEG5EI16_V_M1_MF2 */ 65759, /* PseudoVSUXSEG5EI16_V_M1_MF2_MASK */ 65764, /* PseudoVSUXSEG5EI16_V_M2_M1 */ 65770, /* PseudoVSUXSEG5EI16_V_M2_M1_MASK */ 65775, /* PseudoVSUXSEG5EI16_V_MF2_M1 */ 65781, /* PseudoVSUXSEG5EI16_V_MF2_M1_MASK */ 65786, /* PseudoVSUXSEG5EI16_V_MF2_MF2 */ 65792, /* PseudoVSUXSEG5EI16_V_MF2_MF2_MASK */ 65797, /* PseudoVSUXSEG5EI16_V_MF2_MF4 */ 65803, /* PseudoVSUXSEG5EI16_V_MF2_MF4_MASK */ 65808, /* PseudoVSUXSEG5EI16_V_MF4_M1 */ 65814, /* PseudoVSUXSEG5EI16_V_MF4_M1_MASK */ 65819, /* PseudoVSUXSEG5EI16_V_MF4_MF2 */ 65825, /* PseudoVSUXSEG5EI16_V_MF4_MF2_MASK */ 65830, /* PseudoVSUXSEG5EI16_V_MF4_MF4 */ 65836, /* PseudoVSUXSEG5EI16_V_MF4_MF4_MASK */ 65841, /* PseudoVSUXSEG5EI16_V_MF4_MF8 */ 65847, /* PseudoVSUXSEG5EI16_V_MF4_MF8_MASK */ 65852, /* PseudoVSUXSEG5EI32_V_M1_M1 */ 65858, /* PseudoVSUXSEG5EI32_V_M1_M1_MASK */ 65863, /* PseudoVSUXSEG5EI32_V_M1_MF2 */ 65869, /* PseudoVSUXSEG5EI32_V_M1_MF2_MASK */ 65874, /* PseudoVSUXSEG5EI32_V_M1_MF4 */ 65880, /* PseudoVSUXSEG5EI32_V_M1_MF4_MASK */ 65885, /* PseudoVSUXSEG5EI32_V_M2_M1 */ 65891, /* PseudoVSUXSEG5EI32_V_M2_M1_MASK */ 65896, /* PseudoVSUXSEG5EI32_V_M2_MF2 */ 65902, /* PseudoVSUXSEG5EI32_V_M2_MF2_MASK */ 65907, /* PseudoVSUXSEG5EI32_V_M4_M1 */ 65913, /* PseudoVSUXSEG5EI32_V_M4_M1_MASK */ 65918, /* PseudoVSUXSEG5EI32_V_MF2_M1 */ 65924, /* PseudoVSUXSEG5EI32_V_MF2_M1_MASK */ 65929, /* PseudoVSUXSEG5EI32_V_MF2_MF2 */ 65935, /* PseudoVSUXSEG5EI32_V_MF2_MF2_MASK */ 65940, /* PseudoVSUXSEG5EI32_V_MF2_MF4 */ 65946, /* PseudoVSUXSEG5EI32_V_MF2_MF4_MASK */ 65951, /* PseudoVSUXSEG5EI32_V_MF2_MF8 */ 65957, /* PseudoVSUXSEG5EI32_V_MF2_MF8_MASK */ 65962, /* PseudoVSUXSEG5EI64_V_M1_M1 */ 65968, /* PseudoVSUXSEG5EI64_V_M1_M1_MASK */ 65973, /* PseudoVSUXSEG5EI64_V_M1_MF2 */ 65979, /* PseudoVSUXSEG5EI64_V_M1_MF2_MASK */ 65984, /* PseudoVSUXSEG5EI64_V_M1_MF4 */ 65990, /* PseudoVSUXSEG5EI64_V_M1_MF4_MASK */ 65995, /* PseudoVSUXSEG5EI64_V_M1_MF8 */ 66001, /* PseudoVSUXSEG5EI64_V_M1_MF8_MASK */ 66006, /* PseudoVSUXSEG5EI64_V_M2_M1 */ 66012, /* PseudoVSUXSEG5EI64_V_M2_M1_MASK */ 66017, /* PseudoVSUXSEG5EI64_V_M2_MF2 */ 66023, /* PseudoVSUXSEG5EI64_V_M2_MF2_MASK */ 66028, /* PseudoVSUXSEG5EI64_V_M2_MF4 */ 66034, /* PseudoVSUXSEG5EI64_V_M2_MF4_MASK */ 66039, /* PseudoVSUXSEG5EI64_V_M4_M1 */ 66045, /* PseudoVSUXSEG5EI64_V_M4_M1_MASK */ 66050, /* PseudoVSUXSEG5EI64_V_M4_MF2 */ 66056, /* PseudoVSUXSEG5EI64_V_M4_MF2_MASK */ 66061, /* PseudoVSUXSEG5EI64_V_M8_M1 */ 66067, /* PseudoVSUXSEG5EI64_V_M8_M1_MASK */ 66072, /* PseudoVSUXSEG5EI8_V_M1_M1 */ 66078, /* PseudoVSUXSEG5EI8_V_M1_M1_MASK */ 66083, /* PseudoVSUXSEG5EI8_V_MF2_M1 */ 66089, /* PseudoVSUXSEG5EI8_V_MF2_M1_MASK */ 66094, /* PseudoVSUXSEG5EI8_V_MF2_MF2 */ 66100, /* PseudoVSUXSEG5EI8_V_MF2_MF2_MASK */ 66105, /* PseudoVSUXSEG5EI8_V_MF4_M1 */ 66111, /* PseudoVSUXSEG5EI8_V_MF4_M1_MASK */ 66116, /* PseudoVSUXSEG5EI8_V_MF4_MF2 */ 66122, /* PseudoVSUXSEG5EI8_V_MF4_MF2_MASK */ 66127, /* PseudoVSUXSEG5EI8_V_MF4_MF4 */ 66133, /* PseudoVSUXSEG5EI8_V_MF4_MF4_MASK */ 66138, /* PseudoVSUXSEG5EI8_V_MF8_M1 */ 66144, /* PseudoVSUXSEG5EI8_V_MF8_M1_MASK */ 66149, /* PseudoVSUXSEG5EI8_V_MF8_MF2 */ 66155, /* PseudoVSUXSEG5EI8_V_MF8_MF2_MASK */ 66160, /* PseudoVSUXSEG5EI8_V_MF8_MF4 */ 66166, /* PseudoVSUXSEG5EI8_V_MF8_MF4_MASK */ 66171, /* PseudoVSUXSEG5EI8_V_MF8_MF8 */ 66177, /* PseudoVSUXSEG5EI8_V_MF8_MF8_MASK */ 66182, /* PseudoVSUXSEG6EI16_V_M1_M1 */ 66188, /* PseudoVSUXSEG6EI16_V_M1_M1_MASK */ 66193, /* PseudoVSUXSEG6EI16_V_M1_MF2 */ 66199, /* PseudoVSUXSEG6EI16_V_M1_MF2_MASK */ 66204, /* PseudoVSUXSEG6EI16_V_M2_M1 */ 66210, /* PseudoVSUXSEG6EI16_V_M2_M1_MASK */ 66215, /* PseudoVSUXSEG6EI16_V_MF2_M1 */ 66221, /* PseudoVSUXSEG6EI16_V_MF2_M1_MASK */ 66226, /* PseudoVSUXSEG6EI16_V_MF2_MF2 */ 66232, /* PseudoVSUXSEG6EI16_V_MF2_MF2_MASK */ 66237, /* PseudoVSUXSEG6EI16_V_MF2_MF4 */ 66243, /* PseudoVSUXSEG6EI16_V_MF2_MF4_MASK */ 66248, /* PseudoVSUXSEG6EI16_V_MF4_M1 */ 66254, /* PseudoVSUXSEG6EI16_V_MF4_M1_MASK */ 66259, /* PseudoVSUXSEG6EI16_V_MF4_MF2 */ 66265, /* PseudoVSUXSEG6EI16_V_MF4_MF2_MASK */ 66270, /* PseudoVSUXSEG6EI16_V_MF4_MF4 */ 66276, /* PseudoVSUXSEG6EI16_V_MF4_MF4_MASK */ 66281, /* PseudoVSUXSEG6EI16_V_MF4_MF8 */ 66287, /* PseudoVSUXSEG6EI16_V_MF4_MF8_MASK */ 66292, /* PseudoVSUXSEG6EI32_V_M1_M1 */ 66298, /* PseudoVSUXSEG6EI32_V_M1_M1_MASK */ 66303, /* PseudoVSUXSEG6EI32_V_M1_MF2 */ 66309, /* PseudoVSUXSEG6EI32_V_M1_MF2_MASK */ 66314, /* PseudoVSUXSEG6EI32_V_M1_MF4 */ 66320, /* PseudoVSUXSEG6EI32_V_M1_MF4_MASK */ 66325, /* PseudoVSUXSEG6EI32_V_M2_M1 */ 66331, /* PseudoVSUXSEG6EI32_V_M2_M1_MASK */ 66336, /* PseudoVSUXSEG6EI32_V_M2_MF2 */ 66342, /* PseudoVSUXSEG6EI32_V_M2_MF2_MASK */ 66347, /* PseudoVSUXSEG6EI32_V_M4_M1 */ 66353, /* PseudoVSUXSEG6EI32_V_M4_M1_MASK */ 66358, /* PseudoVSUXSEG6EI32_V_MF2_M1 */ 66364, /* PseudoVSUXSEG6EI32_V_MF2_M1_MASK */ 66369, /* PseudoVSUXSEG6EI32_V_MF2_MF2 */ 66375, /* PseudoVSUXSEG6EI32_V_MF2_MF2_MASK */ 66380, /* PseudoVSUXSEG6EI32_V_MF2_MF4 */ 66386, /* PseudoVSUXSEG6EI32_V_MF2_MF4_MASK */ 66391, /* PseudoVSUXSEG6EI32_V_MF2_MF8 */ 66397, /* PseudoVSUXSEG6EI32_V_MF2_MF8_MASK */ 66402, /* PseudoVSUXSEG6EI64_V_M1_M1 */ 66408, /* PseudoVSUXSEG6EI64_V_M1_M1_MASK */ 66413, /* PseudoVSUXSEG6EI64_V_M1_MF2 */ 66419, /* PseudoVSUXSEG6EI64_V_M1_MF2_MASK */ 66424, /* PseudoVSUXSEG6EI64_V_M1_MF4 */ 66430, /* PseudoVSUXSEG6EI64_V_M1_MF4_MASK */ 66435, /* PseudoVSUXSEG6EI64_V_M1_MF8 */ 66441, /* PseudoVSUXSEG6EI64_V_M1_MF8_MASK */ 66446, /* PseudoVSUXSEG6EI64_V_M2_M1 */ 66452, /* PseudoVSUXSEG6EI64_V_M2_M1_MASK */ 66457, /* PseudoVSUXSEG6EI64_V_M2_MF2 */ 66463, /* PseudoVSUXSEG6EI64_V_M2_MF2_MASK */ 66468, /* PseudoVSUXSEG6EI64_V_M2_MF4 */ 66474, /* PseudoVSUXSEG6EI64_V_M2_MF4_MASK */ 66479, /* PseudoVSUXSEG6EI64_V_M4_M1 */ 66485, /* PseudoVSUXSEG6EI64_V_M4_M1_MASK */ 66490, /* PseudoVSUXSEG6EI64_V_M4_MF2 */ 66496, /* PseudoVSUXSEG6EI64_V_M4_MF2_MASK */ 66501, /* PseudoVSUXSEG6EI64_V_M8_M1 */ 66507, /* PseudoVSUXSEG6EI64_V_M8_M1_MASK */ 66512, /* PseudoVSUXSEG6EI8_V_M1_M1 */ 66518, /* PseudoVSUXSEG6EI8_V_M1_M1_MASK */ 66523, /* PseudoVSUXSEG6EI8_V_MF2_M1 */ 66529, /* PseudoVSUXSEG6EI8_V_MF2_M1_MASK */ 66534, /* PseudoVSUXSEG6EI8_V_MF2_MF2 */ 66540, /* PseudoVSUXSEG6EI8_V_MF2_MF2_MASK */ 66545, /* PseudoVSUXSEG6EI8_V_MF4_M1 */ 66551, /* PseudoVSUXSEG6EI8_V_MF4_M1_MASK */ 66556, /* PseudoVSUXSEG6EI8_V_MF4_MF2 */ 66562, /* PseudoVSUXSEG6EI8_V_MF4_MF2_MASK */ 66567, /* PseudoVSUXSEG6EI8_V_MF4_MF4 */ 66573, /* PseudoVSUXSEG6EI8_V_MF4_MF4_MASK */ 66578, /* PseudoVSUXSEG6EI8_V_MF8_M1 */ 66584, /* PseudoVSUXSEG6EI8_V_MF8_M1_MASK */ 66589, /* PseudoVSUXSEG6EI8_V_MF8_MF2 */ 66595, /* PseudoVSUXSEG6EI8_V_MF8_MF2_MASK */ 66600, /* PseudoVSUXSEG6EI8_V_MF8_MF4 */ 66606, /* PseudoVSUXSEG6EI8_V_MF8_MF4_MASK */ 66611, /* PseudoVSUXSEG6EI8_V_MF8_MF8 */ 66617, /* PseudoVSUXSEG6EI8_V_MF8_MF8_MASK */ 66622, /* PseudoVSUXSEG7EI16_V_M1_M1 */ 66628, /* PseudoVSUXSEG7EI16_V_M1_M1_MASK */ 66633, /* PseudoVSUXSEG7EI16_V_M1_MF2 */ 66639, /* PseudoVSUXSEG7EI16_V_M1_MF2_MASK */ 66644, /* PseudoVSUXSEG7EI16_V_M2_M1 */ 66650, /* PseudoVSUXSEG7EI16_V_M2_M1_MASK */ 66655, /* PseudoVSUXSEG7EI16_V_MF2_M1 */ 66661, /* PseudoVSUXSEG7EI16_V_MF2_M1_MASK */ 66666, /* PseudoVSUXSEG7EI16_V_MF2_MF2 */ 66672, /* PseudoVSUXSEG7EI16_V_MF2_MF2_MASK */ 66677, /* PseudoVSUXSEG7EI16_V_MF2_MF4 */ 66683, /* PseudoVSUXSEG7EI16_V_MF2_MF4_MASK */ 66688, /* PseudoVSUXSEG7EI16_V_MF4_M1 */ 66694, /* PseudoVSUXSEG7EI16_V_MF4_M1_MASK */ 66699, /* PseudoVSUXSEG7EI16_V_MF4_MF2 */ 66705, /* PseudoVSUXSEG7EI16_V_MF4_MF2_MASK */ 66710, /* PseudoVSUXSEG7EI16_V_MF4_MF4 */ 66716, /* PseudoVSUXSEG7EI16_V_MF4_MF4_MASK */ 66721, /* PseudoVSUXSEG7EI16_V_MF4_MF8 */ 66727, /* PseudoVSUXSEG7EI16_V_MF4_MF8_MASK */ 66732, /* PseudoVSUXSEG7EI32_V_M1_M1 */ 66738, /* PseudoVSUXSEG7EI32_V_M1_M1_MASK */ 66743, /* PseudoVSUXSEG7EI32_V_M1_MF2 */ 66749, /* PseudoVSUXSEG7EI32_V_M1_MF2_MASK */ 66754, /* PseudoVSUXSEG7EI32_V_M1_MF4 */ 66760, /* PseudoVSUXSEG7EI32_V_M1_MF4_MASK */ 66765, /* PseudoVSUXSEG7EI32_V_M2_M1 */ 66771, /* PseudoVSUXSEG7EI32_V_M2_M1_MASK */ 66776, /* PseudoVSUXSEG7EI32_V_M2_MF2 */ 66782, /* PseudoVSUXSEG7EI32_V_M2_MF2_MASK */ 66787, /* PseudoVSUXSEG7EI32_V_M4_M1 */ 66793, /* PseudoVSUXSEG7EI32_V_M4_M1_MASK */ 66798, /* PseudoVSUXSEG7EI32_V_MF2_M1 */ 66804, /* PseudoVSUXSEG7EI32_V_MF2_M1_MASK */ 66809, /* PseudoVSUXSEG7EI32_V_MF2_MF2 */ 66815, /* PseudoVSUXSEG7EI32_V_MF2_MF2_MASK */ 66820, /* PseudoVSUXSEG7EI32_V_MF2_MF4 */ 66826, /* PseudoVSUXSEG7EI32_V_MF2_MF4_MASK */ 66831, /* PseudoVSUXSEG7EI32_V_MF2_MF8 */ 66837, /* PseudoVSUXSEG7EI32_V_MF2_MF8_MASK */ 66842, /* PseudoVSUXSEG7EI64_V_M1_M1 */ 66848, /* PseudoVSUXSEG7EI64_V_M1_M1_MASK */ 66853, /* PseudoVSUXSEG7EI64_V_M1_MF2 */ 66859, /* PseudoVSUXSEG7EI64_V_M1_MF2_MASK */ 66864, /* PseudoVSUXSEG7EI64_V_M1_MF4 */ 66870, /* PseudoVSUXSEG7EI64_V_M1_MF4_MASK */ 66875, /* PseudoVSUXSEG7EI64_V_M1_MF8 */ 66881, /* PseudoVSUXSEG7EI64_V_M1_MF8_MASK */ 66886, /* PseudoVSUXSEG7EI64_V_M2_M1 */ 66892, /* PseudoVSUXSEG7EI64_V_M2_M1_MASK */ 66897, /* PseudoVSUXSEG7EI64_V_M2_MF2 */ 66903, /* PseudoVSUXSEG7EI64_V_M2_MF2_MASK */ 66908, /* PseudoVSUXSEG7EI64_V_M2_MF4 */ 66914, /* PseudoVSUXSEG7EI64_V_M2_MF4_MASK */ 66919, /* PseudoVSUXSEG7EI64_V_M4_M1 */ 66925, /* PseudoVSUXSEG7EI64_V_M4_M1_MASK */ 66930, /* PseudoVSUXSEG7EI64_V_M4_MF2 */ 66936, /* PseudoVSUXSEG7EI64_V_M4_MF2_MASK */ 66941, /* PseudoVSUXSEG7EI64_V_M8_M1 */ 66947, /* PseudoVSUXSEG7EI64_V_M8_M1_MASK */ 66952, /* PseudoVSUXSEG7EI8_V_M1_M1 */ 66958, /* PseudoVSUXSEG7EI8_V_M1_M1_MASK */ 66963, /* PseudoVSUXSEG7EI8_V_MF2_M1 */ 66969, /* PseudoVSUXSEG7EI8_V_MF2_M1_MASK */ 66974, /* PseudoVSUXSEG7EI8_V_MF2_MF2 */ 66980, /* PseudoVSUXSEG7EI8_V_MF2_MF2_MASK */ 66985, /* PseudoVSUXSEG7EI8_V_MF4_M1 */ 66991, /* PseudoVSUXSEG7EI8_V_MF4_M1_MASK */ 66996, /* PseudoVSUXSEG7EI8_V_MF4_MF2 */ 67002, /* PseudoVSUXSEG7EI8_V_MF4_MF2_MASK */ 67007, /* PseudoVSUXSEG7EI8_V_MF4_MF4 */ 67013, /* PseudoVSUXSEG7EI8_V_MF4_MF4_MASK */ 67018, /* PseudoVSUXSEG7EI8_V_MF8_M1 */ 67024, /* PseudoVSUXSEG7EI8_V_MF8_M1_MASK */ 67029, /* PseudoVSUXSEG7EI8_V_MF8_MF2 */ 67035, /* PseudoVSUXSEG7EI8_V_MF8_MF2_MASK */ 67040, /* PseudoVSUXSEG7EI8_V_MF8_MF4 */ 67046, /* PseudoVSUXSEG7EI8_V_MF8_MF4_MASK */ 67051, /* PseudoVSUXSEG7EI8_V_MF8_MF8 */ 67057, /* PseudoVSUXSEG7EI8_V_MF8_MF8_MASK */ 67062, /* PseudoVSUXSEG8EI16_V_M1_M1 */ 67068, /* PseudoVSUXSEG8EI16_V_M1_M1_MASK */ 67073, /* PseudoVSUXSEG8EI16_V_M1_MF2 */ 67079, /* PseudoVSUXSEG8EI16_V_M1_MF2_MASK */ 67084, /* PseudoVSUXSEG8EI16_V_M2_M1 */ 67090, /* PseudoVSUXSEG8EI16_V_M2_M1_MASK */ 67095, /* PseudoVSUXSEG8EI16_V_MF2_M1 */ 67101, /* PseudoVSUXSEG8EI16_V_MF2_M1_MASK */ 67106, /* PseudoVSUXSEG8EI16_V_MF2_MF2 */ 67112, /* PseudoVSUXSEG8EI16_V_MF2_MF2_MASK */ 67117, /* PseudoVSUXSEG8EI16_V_MF2_MF4 */ 67123, /* PseudoVSUXSEG8EI16_V_MF2_MF4_MASK */ 67128, /* PseudoVSUXSEG8EI16_V_MF4_M1 */ 67134, /* PseudoVSUXSEG8EI16_V_MF4_M1_MASK */ 67139, /* PseudoVSUXSEG8EI16_V_MF4_MF2 */ 67145, /* PseudoVSUXSEG8EI16_V_MF4_MF2_MASK */ 67150, /* PseudoVSUXSEG8EI16_V_MF4_MF4 */ 67156, /* PseudoVSUXSEG8EI16_V_MF4_MF4_MASK */ 67161, /* PseudoVSUXSEG8EI16_V_MF4_MF8 */ 67167, /* PseudoVSUXSEG8EI16_V_MF4_MF8_MASK */ 67172, /* PseudoVSUXSEG8EI32_V_M1_M1 */ 67178, /* PseudoVSUXSEG8EI32_V_M1_M1_MASK */ 67183, /* PseudoVSUXSEG8EI32_V_M1_MF2 */ 67189, /* PseudoVSUXSEG8EI32_V_M1_MF2_MASK */ 67194, /* PseudoVSUXSEG8EI32_V_M1_MF4 */ 67200, /* PseudoVSUXSEG8EI32_V_M1_MF4_MASK */ 67205, /* PseudoVSUXSEG8EI32_V_M2_M1 */ 67211, /* PseudoVSUXSEG8EI32_V_M2_M1_MASK */ 67216, /* PseudoVSUXSEG8EI32_V_M2_MF2 */ 67222, /* PseudoVSUXSEG8EI32_V_M2_MF2_MASK */ 67227, /* PseudoVSUXSEG8EI32_V_M4_M1 */ 67233, /* PseudoVSUXSEG8EI32_V_M4_M1_MASK */ 67238, /* PseudoVSUXSEG8EI32_V_MF2_M1 */ 67244, /* PseudoVSUXSEG8EI32_V_MF2_M1_MASK */ 67249, /* PseudoVSUXSEG8EI32_V_MF2_MF2 */ 67255, /* PseudoVSUXSEG8EI32_V_MF2_MF2_MASK */ 67260, /* PseudoVSUXSEG8EI32_V_MF2_MF4 */ 67266, /* PseudoVSUXSEG8EI32_V_MF2_MF4_MASK */ 67271, /* PseudoVSUXSEG8EI32_V_MF2_MF8 */ 67277, /* PseudoVSUXSEG8EI32_V_MF2_MF8_MASK */ 67282, /* PseudoVSUXSEG8EI64_V_M1_M1 */ 67288, /* PseudoVSUXSEG8EI64_V_M1_M1_MASK */ 67293, /* PseudoVSUXSEG8EI64_V_M1_MF2 */ 67299, /* PseudoVSUXSEG8EI64_V_M1_MF2_MASK */ 67304, /* PseudoVSUXSEG8EI64_V_M1_MF4 */ 67310, /* PseudoVSUXSEG8EI64_V_M1_MF4_MASK */ 67315, /* PseudoVSUXSEG8EI64_V_M1_MF8 */ 67321, /* PseudoVSUXSEG8EI64_V_M1_MF8_MASK */ 67326, /* PseudoVSUXSEG8EI64_V_M2_M1 */ 67332, /* PseudoVSUXSEG8EI64_V_M2_M1_MASK */ 67337, /* PseudoVSUXSEG8EI64_V_M2_MF2 */ 67343, /* PseudoVSUXSEG8EI64_V_M2_MF2_MASK */ 67348, /* PseudoVSUXSEG8EI64_V_M2_MF4 */ 67354, /* PseudoVSUXSEG8EI64_V_M2_MF4_MASK */ 67359, /* PseudoVSUXSEG8EI64_V_M4_M1 */ 67365, /* PseudoVSUXSEG8EI64_V_M4_M1_MASK */ 67370, /* PseudoVSUXSEG8EI64_V_M4_MF2 */ 67376, /* PseudoVSUXSEG8EI64_V_M4_MF2_MASK */ 67381, /* PseudoVSUXSEG8EI64_V_M8_M1 */ 67387, /* PseudoVSUXSEG8EI64_V_M8_M1_MASK */ 67392, /* PseudoVSUXSEG8EI8_V_M1_M1 */ 67398, /* PseudoVSUXSEG8EI8_V_M1_M1_MASK */ 67403, /* PseudoVSUXSEG8EI8_V_MF2_M1 */ 67409, /* PseudoVSUXSEG8EI8_V_MF2_M1_MASK */ 67414, /* PseudoVSUXSEG8EI8_V_MF2_MF2 */ 67420, /* PseudoVSUXSEG8EI8_V_MF2_MF2_MASK */ 67425, /* PseudoVSUXSEG8EI8_V_MF4_M1 */ 67431, /* PseudoVSUXSEG8EI8_V_MF4_M1_MASK */ 67436, /* PseudoVSUXSEG8EI8_V_MF4_MF2 */ 67442, /* PseudoVSUXSEG8EI8_V_MF4_MF2_MASK */ 67447, /* PseudoVSUXSEG8EI8_V_MF4_MF4 */ 67453, /* PseudoVSUXSEG8EI8_V_MF4_MF4_MASK */ 67458, /* PseudoVSUXSEG8EI8_V_MF8_M1 */ 67464, /* PseudoVSUXSEG8EI8_V_MF8_M1_MASK */ 67469, /* PseudoVSUXSEG8EI8_V_MF8_MF2 */ 67475, /* PseudoVSUXSEG8EI8_V_MF8_MF2_MASK */ 67480, /* PseudoVSUXSEG8EI8_V_MF8_MF4 */ 67486, /* PseudoVSUXSEG8EI8_V_MF8_MF4_MASK */ 67491, /* PseudoVSUXSEG8EI8_V_MF8_MF8 */ 67497, /* PseudoVSUXSEG8EI8_V_MF8_MF8_MASK */ 67502, /* PseudoVWADDU_VV_M1 */ 67508, /* PseudoVWADDU_VV_M1_MASK */ 67513, /* PseudoVWADDU_VV_M1_TU */ 67521, /* PseudoVWADDU_VV_M2 */ 67527, /* PseudoVWADDU_VV_M2_MASK */ 67532, /* PseudoVWADDU_VV_M2_TU */ 67540, /* PseudoVWADDU_VV_M4 */ 67546, /* PseudoVWADDU_VV_M4_MASK */ 67551, /* PseudoVWADDU_VV_M4_TU */ 67559, /* PseudoVWADDU_VV_MF2 */ 67565, /* PseudoVWADDU_VV_MF2_MASK */ 67570, /* PseudoVWADDU_VV_MF2_TU */ 67578, /* PseudoVWADDU_VV_MF4 */ 67584, /* PseudoVWADDU_VV_MF4_MASK */ 67589, /* PseudoVWADDU_VV_MF4_TU */ 67597, /* PseudoVWADDU_VV_MF8 */ 67603, /* PseudoVWADDU_VV_MF8_MASK */ 67608, /* PseudoVWADDU_VV_MF8_TU */ 67616, /* PseudoVWADDU_VX_M1 */ 67622, /* PseudoVWADDU_VX_M1_MASK */ 67627, /* PseudoVWADDU_VX_M1_TU */ 67635, /* PseudoVWADDU_VX_M2 */ 67641, /* PseudoVWADDU_VX_M2_MASK */ 67646, /* PseudoVWADDU_VX_M2_TU */ 67654, /* PseudoVWADDU_VX_M4 */ 67660, /* PseudoVWADDU_VX_M4_MASK */ 67665, /* PseudoVWADDU_VX_M4_TU */ 67673, /* PseudoVWADDU_VX_MF2 */ 67679, /* PseudoVWADDU_VX_MF2_MASK */ 67684, /* PseudoVWADDU_VX_MF2_TU */ 67692, /* PseudoVWADDU_VX_MF4 */ 67698, /* PseudoVWADDU_VX_MF4_MASK */ 67703, /* PseudoVWADDU_VX_MF4_TU */ 67711, /* PseudoVWADDU_VX_MF8 */ 67717, /* PseudoVWADDU_VX_MF8_MASK */ 67722, /* PseudoVWADDU_VX_MF8_TU */ 67730, /* PseudoVWADDU_WV_M1 */ 67736, /* PseudoVWADDU_WV_M1_MASK */ 67741, /* PseudoVWADDU_WV_M1_MASK_TIED */ 67749, /* PseudoVWADDU_WV_M1_TIED */ 67756, /* PseudoVWADDU_WV_M1_TU */ 67762, /* PseudoVWADDU_WV_M2 */ 67768, /* PseudoVWADDU_WV_M2_MASK */ 67773, /* PseudoVWADDU_WV_M2_MASK_TIED */ 67781, /* PseudoVWADDU_WV_M2_TIED */ 67788, /* PseudoVWADDU_WV_M2_TU */ 67794, /* PseudoVWADDU_WV_M4 */ 67800, /* PseudoVWADDU_WV_M4_MASK */ 67805, /* PseudoVWADDU_WV_M4_MASK_TIED */ 67813, /* PseudoVWADDU_WV_M4_TIED */ 67820, /* PseudoVWADDU_WV_M4_TU */ 67826, /* PseudoVWADDU_WV_MF2 */ 67832, /* PseudoVWADDU_WV_MF2_MASK */ 67837, /* PseudoVWADDU_WV_MF2_MASK_TIED */ 67845, /* PseudoVWADDU_WV_MF2_TIED */ 67852, /* PseudoVWADDU_WV_MF2_TU */ 67858, /* PseudoVWADDU_WV_MF4 */ 67864, /* PseudoVWADDU_WV_MF4_MASK */ 67869, /* PseudoVWADDU_WV_MF4_MASK_TIED */ 67877, /* PseudoVWADDU_WV_MF4_TIED */ 67884, /* PseudoVWADDU_WV_MF4_TU */ 67890, /* PseudoVWADDU_WV_MF8 */ 67896, /* PseudoVWADDU_WV_MF8_MASK */ 67901, /* PseudoVWADDU_WV_MF8_MASK_TIED */ 67909, /* PseudoVWADDU_WV_MF8_TIED */ 67916, /* PseudoVWADDU_WV_MF8_TU */ 67922, /* PseudoVWADDU_WX_M1 */ 67928, /* PseudoVWADDU_WX_M1_MASK */ 67933, /* PseudoVWADDU_WX_M1_TU */ 67941, /* PseudoVWADDU_WX_M2 */ 67947, /* PseudoVWADDU_WX_M2_MASK */ 67952, /* PseudoVWADDU_WX_M2_TU */ 67960, /* PseudoVWADDU_WX_M4 */ 67966, /* PseudoVWADDU_WX_M4_MASK */ 67971, /* PseudoVWADDU_WX_M4_TU */ 67979, /* PseudoVWADDU_WX_MF2 */ 67985, /* PseudoVWADDU_WX_MF2_MASK */ 67990, /* PseudoVWADDU_WX_MF2_TU */ 67998, /* PseudoVWADDU_WX_MF4 */ 68004, /* PseudoVWADDU_WX_MF4_MASK */ 68009, /* PseudoVWADDU_WX_MF4_TU */ 68017, /* PseudoVWADDU_WX_MF8 */ 68023, /* PseudoVWADDU_WX_MF8_MASK */ 68028, /* PseudoVWADDU_WX_MF8_TU */ 68036, /* PseudoVWADD_VV_M1 */ 68042, /* PseudoVWADD_VV_M1_MASK */ 68047, /* PseudoVWADD_VV_M1_TU */ 68055, /* PseudoVWADD_VV_M2 */ 68061, /* PseudoVWADD_VV_M2_MASK */ 68066, /* PseudoVWADD_VV_M2_TU */ 68074, /* PseudoVWADD_VV_M4 */ 68080, /* PseudoVWADD_VV_M4_MASK */ 68085, /* PseudoVWADD_VV_M4_TU */ 68093, /* PseudoVWADD_VV_MF2 */ 68099, /* PseudoVWADD_VV_MF2_MASK */ 68104, /* PseudoVWADD_VV_MF2_TU */ 68112, /* PseudoVWADD_VV_MF4 */ 68118, /* PseudoVWADD_VV_MF4_MASK */ 68123, /* PseudoVWADD_VV_MF4_TU */ 68131, /* PseudoVWADD_VV_MF8 */ 68137, /* PseudoVWADD_VV_MF8_MASK */ 68142, /* PseudoVWADD_VV_MF8_TU */ 68150, /* PseudoVWADD_VX_M1 */ 68156, /* PseudoVWADD_VX_M1_MASK */ 68161, /* PseudoVWADD_VX_M1_TU */ 68169, /* PseudoVWADD_VX_M2 */ 68175, /* PseudoVWADD_VX_M2_MASK */ 68180, /* PseudoVWADD_VX_M2_TU */ 68188, /* PseudoVWADD_VX_M4 */ 68194, /* PseudoVWADD_VX_M4_MASK */ 68199, /* PseudoVWADD_VX_M4_TU */ 68207, /* PseudoVWADD_VX_MF2 */ 68213, /* PseudoVWADD_VX_MF2_MASK */ 68218, /* PseudoVWADD_VX_MF2_TU */ 68226, /* PseudoVWADD_VX_MF4 */ 68232, /* PseudoVWADD_VX_MF4_MASK */ 68237, /* PseudoVWADD_VX_MF4_TU */ 68245, /* PseudoVWADD_VX_MF8 */ 68251, /* PseudoVWADD_VX_MF8_MASK */ 68256, /* PseudoVWADD_VX_MF8_TU */ 68264, /* PseudoVWADD_WV_M1 */ 68270, /* PseudoVWADD_WV_M1_MASK */ 68275, /* PseudoVWADD_WV_M1_MASK_TIED */ 68283, /* PseudoVWADD_WV_M1_TIED */ 68290, /* PseudoVWADD_WV_M1_TU */ 68296, /* PseudoVWADD_WV_M2 */ 68302, /* PseudoVWADD_WV_M2_MASK */ 68307, /* PseudoVWADD_WV_M2_MASK_TIED */ 68315, /* PseudoVWADD_WV_M2_TIED */ 68322, /* PseudoVWADD_WV_M2_TU */ 68328, /* PseudoVWADD_WV_M4 */ 68334, /* PseudoVWADD_WV_M4_MASK */ 68339, /* PseudoVWADD_WV_M4_MASK_TIED */ 68347, /* PseudoVWADD_WV_M4_TIED */ 68354, /* PseudoVWADD_WV_M4_TU */ 68360, /* PseudoVWADD_WV_MF2 */ 68366, /* PseudoVWADD_WV_MF2_MASK */ 68371, /* PseudoVWADD_WV_MF2_MASK_TIED */ 68379, /* PseudoVWADD_WV_MF2_TIED */ 68386, /* PseudoVWADD_WV_MF2_TU */ 68392, /* PseudoVWADD_WV_MF4 */ 68398, /* PseudoVWADD_WV_MF4_MASK */ 68403, /* PseudoVWADD_WV_MF4_MASK_TIED */ 68411, /* PseudoVWADD_WV_MF4_TIED */ 68418, /* PseudoVWADD_WV_MF4_TU */ 68424, /* PseudoVWADD_WV_MF8 */ 68430, /* PseudoVWADD_WV_MF8_MASK */ 68435, /* PseudoVWADD_WV_MF8_MASK_TIED */ 68443, /* PseudoVWADD_WV_MF8_TIED */ 68450, /* PseudoVWADD_WV_MF8_TU */ 68456, /* PseudoVWADD_WX_M1 */ 68462, /* PseudoVWADD_WX_M1_MASK */ 68467, /* PseudoVWADD_WX_M1_TU */ 68475, /* PseudoVWADD_WX_M2 */ 68481, /* PseudoVWADD_WX_M2_MASK */ 68486, /* PseudoVWADD_WX_M2_TU */ 68494, /* PseudoVWADD_WX_M4 */ 68500, /* PseudoVWADD_WX_M4_MASK */ 68505, /* PseudoVWADD_WX_M4_TU */ 68513, /* PseudoVWADD_WX_MF2 */ 68519, /* PseudoVWADD_WX_MF2_MASK */ 68524, /* PseudoVWADD_WX_MF2_TU */ 68532, /* PseudoVWADD_WX_MF4 */ 68538, /* PseudoVWADD_WX_MF4_MASK */ 68543, /* PseudoVWADD_WX_MF4_TU */ 68551, /* PseudoVWADD_WX_MF8 */ 68557, /* PseudoVWADD_WX_MF8_MASK */ 68562, /* PseudoVWADD_WX_MF8_TU */ 68570, /* PseudoVWMACCSU_VV_M1 */ 68576, /* PseudoVWMACCSU_VV_M1_MASK */ 68583, /* PseudoVWMACCSU_VV_M2 */ 68591, /* PseudoVWMACCSU_VV_M2_MASK */ 68598, /* PseudoVWMACCSU_VV_M4 */ 68606, /* PseudoVWMACCSU_VV_M4_MASK */ 68613, /* PseudoVWMACCSU_VV_MF2 */ 68621, /* PseudoVWMACCSU_VV_MF2_MASK */ 68628, /* PseudoVWMACCSU_VV_MF4 */ 68636, /* PseudoVWMACCSU_VV_MF4_MASK */ 68643, /* PseudoVWMACCSU_VV_MF8 */ 68651, /* PseudoVWMACCSU_VV_MF8_MASK */ 68658, /* PseudoVWMACCSU_VX_M1 */ 68666, /* PseudoVWMACCSU_VX_M1_MASK */ 68673, /* PseudoVWMACCSU_VX_M2 */ 68681, /* PseudoVWMACCSU_VX_M2_MASK */ 68688, /* PseudoVWMACCSU_VX_M4 */ 68696, /* PseudoVWMACCSU_VX_M4_MASK */ 68703, /* PseudoVWMACCSU_VX_MF2 */ 68711, /* PseudoVWMACCSU_VX_MF2_MASK */ 68718, /* PseudoVWMACCSU_VX_MF4 */ 68726, /* PseudoVWMACCSU_VX_MF4_MASK */ 68733, /* PseudoVWMACCSU_VX_MF8 */ 68741, /* PseudoVWMACCSU_VX_MF8_MASK */ 68748, /* PseudoVWMACCUS_VX_M1 */ 68756, /* PseudoVWMACCUS_VX_M1_MASK */ 68763, /* PseudoVWMACCUS_VX_M2 */ 68771, /* PseudoVWMACCUS_VX_M2_MASK */ 68778, /* PseudoVWMACCUS_VX_M4 */ 68786, /* PseudoVWMACCUS_VX_M4_MASK */ 68793, /* PseudoVWMACCUS_VX_MF2 */ 68801, /* PseudoVWMACCUS_VX_MF2_MASK */ 68808, /* PseudoVWMACCUS_VX_MF4 */ 68816, /* PseudoVWMACCUS_VX_MF4_MASK */ 68823, /* PseudoVWMACCUS_VX_MF8 */ 68831, /* PseudoVWMACCUS_VX_MF8_MASK */ 68838, /* PseudoVWMACCU_VV_M1 */ 68846, /* PseudoVWMACCU_VV_M1_MASK */ 68853, /* PseudoVWMACCU_VV_M2 */ 68861, /* PseudoVWMACCU_VV_M2_MASK */ 68868, /* PseudoVWMACCU_VV_M4 */ 68876, /* PseudoVWMACCU_VV_M4_MASK */ 68883, /* PseudoVWMACCU_VV_MF2 */ 68891, /* PseudoVWMACCU_VV_MF2_MASK */ 68898, /* PseudoVWMACCU_VV_MF4 */ 68906, /* PseudoVWMACCU_VV_MF4_MASK */ 68913, /* PseudoVWMACCU_VV_MF8 */ 68921, /* PseudoVWMACCU_VV_MF8_MASK */ 68928, /* PseudoVWMACCU_VX_M1 */ 68936, /* PseudoVWMACCU_VX_M1_MASK */ 68943, /* PseudoVWMACCU_VX_M2 */ 68951, /* PseudoVWMACCU_VX_M2_MASK */ 68958, /* PseudoVWMACCU_VX_M4 */ 68966, /* PseudoVWMACCU_VX_M4_MASK */ 68973, /* PseudoVWMACCU_VX_MF2 */ 68981, /* PseudoVWMACCU_VX_MF2_MASK */ 68988, /* PseudoVWMACCU_VX_MF4 */ 68996, /* PseudoVWMACCU_VX_MF4_MASK */ 69003, /* PseudoVWMACCU_VX_MF8 */ 69011, /* PseudoVWMACCU_VX_MF8_MASK */ 69018, /* PseudoVWMACC_VV_M1 */ 69026, /* PseudoVWMACC_VV_M1_MASK */ 69033, /* PseudoVWMACC_VV_M2 */ 69041, /* PseudoVWMACC_VV_M2_MASK */ 69048, /* PseudoVWMACC_VV_M4 */ 69056, /* PseudoVWMACC_VV_M4_MASK */ 69063, /* PseudoVWMACC_VV_MF2 */ 69071, /* PseudoVWMACC_VV_MF2_MASK */ 69078, /* PseudoVWMACC_VV_MF4 */ 69086, /* PseudoVWMACC_VV_MF4_MASK */ 69093, /* PseudoVWMACC_VV_MF8 */ 69101, /* PseudoVWMACC_VV_MF8_MASK */ 69108, /* PseudoVWMACC_VX_M1 */ 69116, /* PseudoVWMACC_VX_M1_MASK */ 69123, /* PseudoVWMACC_VX_M2 */ 69131, /* PseudoVWMACC_VX_M2_MASK */ 69138, /* PseudoVWMACC_VX_M4 */ 69146, /* PseudoVWMACC_VX_M4_MASK */ 69153, /* PseudoVWMACC_VX_MF2 */ 69161, /* PseudoVWMACC_VX_MF2_MASK */ 69168, /* PseudoVWMACC_VX_MF4 */ 69176, /* PseudoVWMACC_VX_MF4_MASK */ 69183, /* PseudoVWMACC_VX_MF8 */ 69191, /* PseudoVWMACC_VX_MF8_MASK */ 69198, /* PseudoVWMULSU_VV_M1 */ 69206, /* PseudoVWMULSU_VV_M1_MASK */ 69211, /* PseudoVWMULSU_VV_M1_TU */ 69219, /* PseudoVWMULSU_VV_M2 */ 69225, /* PseudoVWMULSU_VV_M2_MASK */ 69230, /* PseudoVWMULSU_VV_M2_TU */ 69238, /* PseudoVWMULSU_VV_M4 */ 69244, /* PseudoVWMULSU_VV_M4_MASK */ 69249, /* PseudoVWMULSU_VV_M4_TU */ 69257, /* PseudoVWMULSU_VV_MF2 */ 69263, /* PseudoVWMULSU_VV_MF2_MASK */ 69268, /* PseudoVWMULSU_VV_MF2_TU */ 69276, /* PseudoVWMULSU_VV_MF4 */ 69282, /* PseudoVWMULSU_VV_MF4_MASK */ 69287, /* PseudoVWMULSU_VV_MF4_TU */ 69295, /* PseudoVWMULSU_VV_MF8 */ 69301, /* PseudoVWMULSU_VV_MF8_MASK */ 69306, /* PseudoVWMULSU_VV_MF8_TU */ 69314, /* PseudoVWMULSU_VX_M1 */ 69320, /* PseudoVWMULSU_VX_M1_MASK */ 69325, /* PseudoVWMULSU_VX_M1_TU */ 69333, /* PseudoVWMULSU_VX_M2 */ 69339, /* PseudoVWMULSU_VX_M2_MASK */ 69344, /* PseudoVWMULSU_VX_M2_TU */ 69352, /* PseudoVWMULSU_VX_M4 */ 69358, /* PseudoVWMULSU_VX_M4_MASK */ 69363, /* PseudoVWMULSU_VX_M4_TU */ 69371, /* PseudoVWMULSU_VX_MF2 */ 69377, /* PseudoVWMULSU_VX_MF2_MASK */ 69382, /* PseudoVWMULSU_VX_MF2_TU */ 69390, /* PseudoVWMULSU_VX_MF4 */ 69396, /* PseudoVWMULSU_VX_MF4_MASK */ 69401, /* PseudoVWMULSU_VX_MF4_TU */ 69409, /* PseudoVWMULSU_VX_MF8 */ 69415, /* PseudoVWMULSU_VX_MF8_MASK */ 69420, /* PseudoVWMULSU_VX_MF8_TU */ 69428, /* PseudoVWMULU_VV_M1 */ 69434, /* PseudoVWMULU_VV_M1_MASK */ 69439, /* PseudoVWMULU_VV_M1_TU */ 69447, /* PseudoVWMULU_VV_M2 */ 69453, /* PseudoVWMULU_VV_M2_MASK */ 69458, /* PseudoVWMULU_VV_M2_TU */ 69466, /* PseudoVWMULU_VV_M4 */ 69472, /* PseudoVWMULU_VV_M4_MASK */ 69477, /* PseudoVWMULU_VV_M4_TU */ 69485, /* PseudoVWMULU_VV_MF2 */ 69491, /* PseudoVWMULU_VV_MF2_MASK */ 69496, /* PseudoVWMULU_VV_MF2_TU */ 69504, /* PseudoVWMULU_VV_MF4 */ 69510, /* PseudoVWMULU_VV_MF4_MASK */ 69515, /* PseudoVWMULU_VV_MF4_TU */ 69523, /* PseudoVWMULU_VV_MF8 */ 69529, /* PseudoVWMULU_VV_MF8_MASK */ 69534, /* PseudoVWMULU_VV_MF8_TU */ 69542, /* PseudoVWMULU_VX_M1 */ 69548, /* PseudoVWMULU_VX_M1_MASK */ 69553, /* PseudoVWMULU_VX_M1_TU */ 69561, /* PseudoVWMULU_VX_M2 */ 69567, /* PseudoVWMULU_VX_M2_MASK */ 69572, /* PseudoVWMULU_VX_M2_TU */ 69580, /* PseudoVWMULU_VX_M4 */ 69586, /* PseudoVWMULU_VX_M4_MASK */ 69591, /* PseudoVWMULU_VX_M4_TU */ 69599, /* PseudoVWMULU_VX_MF2 */ 69605, /* PseudoVWMULU_VX_MF2_MASK */ 69610, /* PseudoVWMULU_VX_MF2_TU */ 69618, /* PseudoVWMULU_VX_MF4 */ 69624, /* PseudoVWMULU_VX_MF4_MASK */ 69629, /* PseudoVWMULU_VX_MF4_TU */ 69637, /* PseudoVWMULU_VX_MF8 */ 69643, /* PseudoVWMULU_VX_MF8_MASK */ 69648, /* PseudoVWMULU_VX_MF8_TU */ 69656, /* PseudoVWMUL_VV_M1 */ 69662, /* PseudoVWMUL_VV_M1_MASK */ 69667, /* PseudoVWMUL_VV_M1_TU */ 69675, /* PseudoVWMUL_VV_M2 */ 69681, /* PseudoVWMUL_VV_M2_MASK */ 69686, /* PseudoVWMUL_VV_M2_TU */ 69694, /* PseudoVWMUL_VV_M4 */ 69700, /* PseudoVWMUL_VV_M4_MASK */ 69705, /* PseudoVWMUL_VV_M4_TU */ 69713, /* PseudoVWMUL_VV_MF2 */ 69719, /* PseudoVWMUL_VV_MF2_MASK */ 69724, /* PseudoVWMUL_VV_MF2_TU */ 69732, /* PseudoVWMUL_VV_MF4 */ 69738, /* PseudoVWMUL_VV_MF4_MASK */ 69743, /* PseudoVWMUL_VV_MF4_TU */ 69751, /* PseudoVWMUL_VV_MF8 */ 69757, /* PseudoVWMUL_VV_MF8_MASK */ 69762, /* PseudoVWMUL_VV_MF8_TU */ 69770, /* PseudoVWMUL_VX_M1 */ 69776, /* PseudoVWMUL_VX_M1_MASK */ 69781, /* PseudoVWMUL_VX_M1_TU */ 69789, /* PseudoVWMUL_VX_M2 */ 69795, /* PseudoVWMUL_VX_M2_MASK */ 69800, /* PseudoVWMUL_VX_M2_TU */ 69808, /* PseudoVWMUL_VX_M4 */ 69814, /* PseudoVWMUL_VX_M4_MASK */ 69819, /* PseudoVWMUL_VX_M4_TU */ 69827, /* PseudoVWMUL_VX_MF2 */ 69833, /* PseudoVWMUL_VX_MF2_MASK */ 69838, /* PseudoVWMUL_VX_MF2_TU */ 69846, /* PseudoVWMUL_VX_MF4 */ 69852, /* PseudoVWMUL_VX_MF4_MASK */ 69857, /* PseudoVWMUL_VX_MF4_TU */ 69865, /* PseudoVWMUL_VX_MF8 */ 69871, /* PseudoVWMUL_VX_MF8_MASK */ 69876, /* PseudoVWMUL_VX_MF8_TU */ 69884, /* PseudoVWREDSUMU_VS_M1 */ 69890, /* PseudoVWREDSUMU_VS_M1_MASK */ 69896, /* PseudoVWREDSUMU_VS_M2 */ 69903, /* PseudoVWREDSUMU_VS_M2_MASK */ 69909, /* PseudoVWREDSUMU_VS_M4 */ 69916, /* PseudoVWREDSUMU_VS_M4_MASK */ 69922, /* PseudoVWREDSUMU_VS_M8 */ 69929, /* PseudoVWREDSUMU_VS_M8_MASK */ 69935, /* PseudoVWREDSUMU_VS_MF2 */ 69942, /* PseudoVWREDSUMU_VS_MF2_MASK */ 69948, /* PseudoVWREDSUMU_VS_MF4 */ 69955, /* PseudoVWREDSUMU_VS_MF4_MASK */ 69961, /* PseudoVWREDSUMU_VS_MF8 */ 69968, /* PseudoVWREDSUMU_VS_MF8_MASK */ 69974, /* PseudoVWREDSUM_VS_M1 */ 69981, /* PseudoVWREDSUM_VS_M1_MASK */ 69987, /* PseudoVWREDSUM_VS_M2 */ 69994, /* PseudoVWREDSUM_VS_M2_MASK */ 70000, /* PseudoVWREDSUM_VS_M4 */ 70007, /* PseudoVWREDSUM_VS_M4_MASK */ 70013, /* PseudoVWREDSUM_VS_M8 */ 70020, /* PseudoVWREDSUM_VS_M8_MASK */ 70026, /* PseudoVWREDSUM_VS_MF2 */ 70033, /* PseudoVWREDSUM_VS_MF2_MASK */ 70039, /* PseudoVWREDSUM_VS_MF4 */ 70046, /* PseudoVWREDSUM_VS_MF4_MASK */ 70052, /* PseudoVWREDSUM_VS_MF8 */ 70059, /* PseudoVWREDSUM_VS_MF8_MASK */ 70065, /* PseudoVWSUBU_VV_M1 */ 70072, /* PseudoVWSUBU_VV_M1_MASK */ 70077, /* PseudoVWSUBU_VV_M1_TU */ 70085, /* PseudoVWSUBU_VV_M2 */ 70091, /* PseudoVWSUBU_VV_M2_MASK */ 70096, /* PseudoVWSUBU_VV_M2_TU */ 70104, /* PseudoVWSUBU_VV_M4 */ 70110, /* PseudoVWSUBU_VV_M4_MASK */ 70115, /* PseudoVWSUBU_VV_M4_TU */ 70123, /* PseudoVWSUBU_VV_MF2 */ 70129, /* PseudoVWSUBU_VV_MF2_MASK */ 70134, /* PseudoVWSUBU_VV_MF2_TU */ 70142, /* PseudoVWSUBU_VV_MF4 */ 70148, /* PseudoVWSUBU_VV_MF4_MASK */ 70153, /* PseudoVWSUBU_VV_MF4_TU */ 70161, /* PseudoVWSUBU_VV_MF8 */ 70167, /* PseudoVWSUBU_VV_MF8_MASK */ 70172, /* PseudoVWSUBU_VV_MF8_TU */ 70180, /* PseudoVWSUBU_VX_M1 */ 70186, /* PseudoVWSUBU_VX_M1_MASK */ 70191, /* PseudoVWSUBU_VX_M1_TU */ 70199, /* PseudoVWSUBU_VX_M2 */ 70205, /* PseudoVWSUBU_VX_M2_MASK */ 70210, /* PseudoVWSUBU_VX_M2_TU */ 70218, /* PseudoVWSUBU_VX_M4 */ 70224, /* PseudoVWSUBU_VX_M4_MASK */ 70229, /* PseudoVWSUBU_VX_M4_TU */ 70237, /* PseudoVWSUBU_VX_MF2 */ 70243, /* PseudoVWSUBU_VX_MF2_MASK */ 70248, /* PseudoVWSUBU_VX_MF2_TU */ 70256, /* PseudoVWSUBU_VX_MF4 */ 70262, /* PseudoVWSUBU_VX_MF4_MASK */ 70267, /* PseudoVWSUBU_VX_MF4_TU */ 70275, /* PseudoVWSUBU_VX_MF8 */ 70281, /* PseudoVWSUBU_VX_MF8_MASK */ 70286, /* PseudoVWSUBU_VX_MF8_TU */ 70294, /* PseudoVWSUBU_WV_M1 */ 70300, /* PseudoVWSUBU_WV_M1_MASK */ 70305, /* PseudoVWSUBU_WV_M1_MASK_TIED */ 70313, /* PseudoVWSUBU_WV_M1_TIED */ 70320, /* PseudoVWSUBU_WV_M1_TU */ 70326, /* PseudoVWSUBU_WV_M2 */ 70332, /* PseudoVWSUBU_WV_M2_MASK */ 70337, /* PseudoVWSUBU_WV_M2_MASK_TIED */ 70345, /* PseudoVWSUBU_WV_M2_TIED */ 70352, /* PseudoVWSUBU_WV_M2_TU */ 70358, /* PseudoVWSUBU_WV_M4 */ 70364, /* PseudoVWSUBU_WV_M4_MASK */ 70369, /* PseudoVWSUBU_WV_M4_MASK_TIED */ 70377, /* PseudoVWSUBU_WV_M4_TIED */ 70384, /* PseudoVWSUBU_WV_M4_TU */ 70390, /* PseudoVWSUBU_WV_MF2 */ 70396, /* PseudoVWSUBU_WV_MF2_MASK */ 70401, /* PseudoVWSUBU_WV_MF2_MASK_TIED */ 70409, /* PseudoVWSUBU_WV_MF2_TIED */ 70416, /* PseudoVWSUBU_WV_MF2_TU */ 70422, /* PseudoVWSUBU_WV_MF4 */ 70428, /* PseudoVWSUBU_WV_MF4_MASK */ 70433, /* PseudoVWSUBU_WV_MF4_MASK_TIED */ 70441, /* PseudoVWSUBU_WV_MF4_TIED */ 70448, /* PseudoVWSUBU_WV_MF4_TU */ 70454, /* PseudoVWSUBU_WV_MF8 */ 70460, /* PseudoVWSUBU_WV_MF8_MASK */ 70465, /* PseudoVWSUBU_WV_MF8_MASK_TIED */ 70473, /* PseudoVWSUBU_WV_MF8_TIED */ 70480, /* PseudoVWSUBU_WV_MF8_TU */ 70486, /* PseudoVWSUBU_WX_M1 */ 70492, /* PseudoVWSUBU_WX_M1_MASK */ 70497, /* PseudoVWSUBU_WX_M1_TU */ 70505, /* PseudoVWSUBU_WX_M2 */ 70511, /* PseudoVWSUBU_WX_M2_MASK */ 70516, /* PseudoVWSUBU_WX_M2_TU */ 70524, /* PseudoVWSUBU_WX_M4 */ 70530, /* PseudoVWSUBU_WX_M4_MASK */ 70535, /* PseudoVWSUBU_WX_M4_TU */ 70543, /* PseudoVWSUBU_WX_MF2 */ 70549, /* PseudoVWSUBU_WX_MF2_MASK */ 70554, /* PseudoVWSUBU_WX_MF2_TU */ 70562, /* PseudoVWSUBU_WX_MF4 */ 70568, /* PseudoVWSUBU_WX_MF4_MASK */ 70573, /* PseudoVWSUBU_WX_MF4_TU */ 70581, /* PseudoVWSUBU_WX_MF8 */ 70587, /* PseudoVWSUBU_WX_MF8_MASK */ 70592, /* PseudoVWSUBU_WX_MF8_TU */ 70600, /* PseudoVWSUB_VV_M1 */ 70606, /* PseudoVWSUB_VV_M1_MASK */ 70611, /* PseudoVWSUB_VV_M1_TU */ 70619, /* PseudoVWSUB_VV_M2 */ 70625, /* PseudoVWSUB_VV_M2_MASK */ 70630, /* PseudoVWSUB_VV_M2_TU */ 70638, /* PseudoVWSUB_VV_M4 */ 70644, /* PseudoVWSUB_VV_M4_MASK */ 70649, /* PseudoVWSUB_VV_M4_TU */ 70657, /* PseudoVWSUB_VV_MF2 */ 70663, /* PseudoVWSUB_VV_MF2_MASK */ 70668, /* PseudoVWSUB_VV_MF2_TU */ 70676, /* PseudoVWSUB_VV_MF4 */ 70682, /* PseudoVWSUB_VV_MF4_MASK */ 70687, /* PseudoVWSUB_VV_MF4_TU */ 70695, /* PseudoVWSUB_VV_MF8 */ 70701, /* PseudoVWSUB_VV_MF8_MASK */ 70706, /* PseudoVWSUB_VV_MF8_TU */ 70714, /* PseudoVWSUB_VX_M1 */ 70720, /* PseudoVWSUB_VX_M1_MASK */ 70725, /* PseudoVWSUB_VX_M1_TU */ 70733, /* PseudoVWSUB_VX_M2 */ 70739, /* PseudoVWSUB_VX_M2_MASK */ 70744, /* PseudoVWSUB_VX_M2_TU */ 70752, /* PseudoVWSUB_VX_M4 */ 70758, /* PseudoVWSUB_VX_M4_MASK */ 70763, /* PseudoVWSUB_VX_M4_TU */ 70771, /* PseudoVWSUB_VX_MF2 */ 70777, /* PseudoVWSUB_VX_MF2_MASK */ 70782, /* PseudoVWSUB_VX_MF2_TU */ 70790, /* PseudoVWSUB_VX_MF4 */ 70796, /* PseudoVWSUB_VX_MF4_MASK */ 70801, /* PseudoVWSUB_VX_MF4_TU */ 70809, /* PseudoVWSUB_VX_MF8 */ 70815, /* PseudoVWSUB_VX_MF8_MASK */ 70820, /* PseudoVWSUB_VX_MF8_TU */ 70828, /* PseudoVWSUB_WV_M1 */ 70834, /* PseudoVWSUB_WV_M1_MASK */ 70839, /* PseudoVWSUB_WV_M1_MASK_TIED */ 70847, /* PseudoVWSUB_WV_M1_TIED */ 70854, /* PseudoVWSUB_WV_M1_TU */ 70860, /* PseudoVWSUB_WV_M2 */ 70866, /* PseudoVWSUB_WV_M2_MASK */ 70871, /* PseudoVWSUB_WV_M2_MASK_TIED */ 70879, /* PseudoVWSUB_WV_M2_TIED */ 70886, /* PseudoVWSUB_WV_M2_TU */ 70892, /* PseudoVWSUB_WV_M4 */ 70898, /* PseudoVWSUB_WV_M4_MASK */ 70903, /* PseudoVWSUB_WV_M4_MASK_TIED */ 70911, /* PseudoVWSUB_WV_M4_TIED */ 70918, /* PseudoVWSUB_WV_M4_TU */ 70924, /* PseudoVWSUB_WV_MF2 */ 70930, /* PseudoVWSUB_WV_MF2_MASK */ 70935, /* PseudoVWSUB_WV_MF2_MASK_TIED */ 70943, /* PseudoVWSUB_WV_MF2_TIED */ 70950, /* PseudoVWSUB_WV_MF2_TU */ 70956, /* PseudoVWSUB_WV_MF4 */ 70962, /* PseudoVWSUB_WV_MF4_MASK */ 70967, /* PseudoVWSUB_WV_MF4_MASK_TIED */ 70975, /* PseudoVWSUB_WV_MF4_TIED */ 70982, /* PseudoVWSUB_WV_MF4_TU */ 70988, /* PseudoVWSUB_WV_MF8 */ 70994, /* PseudoVWSUB_WV_MF8_MASK */ 70999, /* PseudoVWSUB_WV_MF8_MASK_TIED */ 71007, /* PseudoVWSUB_WV_MF8_TIED */ 71014, /* PseudoVWSUB_WV_MF8_TU */ 71020, /* PseudoVWSUB_WX_M1 */ 71026, /* PseudoVWSUB_WX_M1_MASK */ 71031, /* PseudoVWSUB_WX_M1_TU */ 71039, /* PseudoVWSUB_WX_M2 */ 71045, /* PseudoVWSUB_WX_M2_MASK */ 71050, /* PseudoVWSUB_WX_M2_TU */ 71058, /* PseudoVWSUB_WX_M4 */ 71064, /* PseudoVWSUB_WX_M4_MASK */ 71069, /* PseudoVWSUB_WX_M4_TU */ 71077, /* PseudoVWSUB_WX_MF2 */ 71083, /* PseudoVWSUB_WX_MF2_MASK */ 71088, /* PseudoVWSUB_WX_MF2_TU */ 71096, /* PseudoVWSUB_WX_MF4 */ 71102, /* PseudoVWSUB_WX_MF4_MASK */ 71107, /* PseudoVWSUB_WX_MF4_TU */ 71115, /* PseudoVWSUB_WX_MF8 */ 71121, /* PseudoVWSUB_WX_MF8_MASK */ 71126, /* PseudoVWSUB_WX_MF8_TU */ 71134, /* PseudoVXOR_VI_M1 */ 71140, /* PseudoVXOR_VI_M1_MASK */ 71145, /* PseudoVXOR_VI_M1_TU */ 71153, /* PseudoVXOR_VI_M2 */ 71159, /* PseudoVXOR_VI_M2_MASK */ 71164, /* PseudoVXOR_VI_M2_TU */ 71172, /* PseudoVXOR_VI_M4 */ 71178, /* PseudoVXOR_VI_M4_MASK */ 71183, /* PseudoVXOR_VI_M4_TU */ 71191, /* PseudoVXOR_VI_M8 */ 71197, /* PseudoVXOR_VI_M8_MASK */ 71202, /* PseudoVXOR_VI_M8_TU */ 71210, /* PseudoVXOR_VI_MF2 */ 71216, /* PseudoVXOR_VI_MF2_MASK */ 71221, /* PseudoVXOR_VI_MF2_TU */ 71229, /* PseudoVXOR_VI_MF4 */ 71235, /* PseudoVXOR_VI_MF4_MASK */ 71240, /* PseudoVXOR_VI_MF4_TU */ 71248, /* PseudoVXOR_VI_MF8 */ 71254, /* PseudoVXOR_VI_MF8_MASK */ 71259, /* PseudoVXOR_VI_MF8_TU */ 71267, /* PseudoVXOR_VV_M1 */ 71273, /* PseudoVXOR_VV_M1_MASK */ 71278, /* PseudoVXOR_VV_M1_TU */ 71286, /* PseudoVXOR_VV_M2 */ 71292, /* PseudoVXOR_VV_M2_MASK */ 71297, /* PseudoVXOR_VV_M2_TU */ 71305, /* PseudoVXOR_VV_M4 */ 71311, /* PseudoVXOR_VV_M4_MASK */ 71316, /* PseudoVXOR_VV_M4_TU */ 71324, /* PseudoVXOR_VV_M8 */ 71330, /* PseudoVXOR_VV_M8_MASK */ 71335, /* PseudoVXOR_VV_M8_TU */ 71343, /* PseudoVXOR_VV_MF2 */ 71349, /* PseudoVXOR_VV_MF2_MASK */ 71354, /* PseudoVXOR_VV_MF2_TU */ 71362, /* PseudoVXOR_VV_MF4 */ 71368, /* PseudoVXOR_VV_MF4_MASK */ 71373, /* PseudoVXOR_VV_MF4_TU */ 71381, /* PseudoVXOR_VV_MF8 */ 71387, /* PseudoVXOR_VV_MF8_MASK */ 71392, /* PseudoVXOR_VV_MF8_TU */ 71400, /* PseudoVXOR_VX_M1 */ 71406, /* PseudoVXOR_VX_M1_MASK */ 71411, /* PseudoVXOR_VX_M1_TU */ 71419, /* PseudoVXOR_VX_M2 */ 71425, /* PseudoVXOR_VX_M2_MASK */ 71430, /* PseudoVXOR_VX_M2_TU */ 71438, /* PseudoVXOR_VX_M4 */ 71444, /* PseudoVXOR_VX_M4_MASK */ 71449, /* PseudoVXOR_VX_M4_TU */ 71457, /* PseudoVXOR_VX_M8 */ 71463, /* PseudoVXOR_VX_M8_MASK */ 71468, /* PseudoVXOR_VX_M8_TU */ 71476, /* PseudoVXOR_VX_MF2 */ 71482, /* PseudoVXOR_VX_MF2_MASK */ 71487, /* PseudoVXOR_VX_MF2_TU */ 71495, /* PseudoVXOR_VX_MF4 */ 71501, /* PseudoVXOR_VX_MF4_MASK */ 71506, /* PseudoVXOR_VX_MF4_TU */ 71514, /* PseudoVXOR_VX_MF8 */ 71520, /* PseudoVXOR_VX_MF8_MASK */ 71525, /* PseudoVXOR_VX_MF8_TU */ 71533, /* PseudoVZEXT_VF2_M1 */ 71539, /* PseudoVZEXT_VF2_M1_MASK */ 71543, /* PseudoVZEXT_VF2_M1_TU */ 71550, /* PseudoVZEXT_VF2_M2 */ 71555, /* PseudoVZEXT_VF2_M2_MASK */ 71559, /* PseudoVZEXT_VF2_M2_TU */ 71566, /* PseudoVZEXT_VF2_M4 */ 71571, /* PseudoVZEXT_VF2_M4_MASK */ 71575, /* PseudoVZEXT_VF2_M4_TU */ 71582, /* PseudoVZEXT_VF2_M8 */ 71587, /* PseudoVZEXT_VF2_M8_MASK */ 71591, /* PseudoVZEXT_VF2_M8_TU */ 71598, /* PseudoVZEXT_VF2_MF2 */ 71603, /* PseudoVZEXT_VF2_MF2_MASK */ 71607, /* PseudoVZEXT_VF2_MF2_TU */ 71614, /* PseudoVZEXT_VF2_MF4 */ 71619, /* PseudoVZEXT_VF2_MF4_MASK */ 71623, /* PseudoVZEXT_VF2_MF4_TU */ 71630, /* PseudoVZEXT_VF4_M1 */ 71635, /* PseudoVZEXT_VF4_M1_MASK */ 71639, /* PseudoVZEXT_VF4_M1_TU */ 71646, /* PseudoVZEXT_VF4_M2 */ 71651, /* PseudoVZEXT_VF4_M2_MASK */ 71655, /* PseudoVZEXT_VF4_M2_TU */ 71662, /* PseudoVZEXT_VF4_M4 */ 71667, /* PseudoVZEXT_VF4_M4_MASK */ 71671, /* PseudoVZEXT_VF4_M4_TU */ 71678, /* PseudoVZEXT_VF4_M8 */ 71683, /* PseudoVZEXT_VF4_M8_MASK */ 71687, /* PseudoVZEXT_VF4_M8_TU */ 71694, /* PseudoVZEXT_VF4_MF2 */ 71699, /* PseudoVZEXT_VF4_MF2_MASK */ 71703, /* PseudoVZEXT_VF4_MF2_TU */ 71710, /* PseudoVZEXT_VF8_M1 */ 71715, /* PseudoVZEXT_VF8_M1_MASK */ 71719, /* PseudoVZEXT_VF8_M1_TU */ 71726, /* PseudoVZEXT_VF8_M2 */ 71731, /* PseudoVZEXT_VF8_M2_MASK */ 71735, /* PseudoVZEXT_VF8_M2_TU */ 71742, /* PseudoVZEXT_VF8_M4 */ 71747, /* PseudoVZEXT_VF8_M4_MASK */ 71751, /* PseudoVZEXT_VF8_M4_TU */ 71758, /* PseudoVZEXT_VF8_M8 */ 71763, /* PseudoVZEXT_VF8_M8_MASK */ 71767, /* PseudoVZEXT_VF8_M8_TU */ 71774, /* PseudoZEXT_H */ 71779, /* PseudoZEXT_W */ 71781, /* ReadCycleWide */ 71783, /* ReadFFLAGS */ 71785, /* ReadFRM */ 71786, /* Select_FPR16_Using_CC_GPR */ 71787, /* Select_FPR32_Using_CC_GPR */ 71793, /* Select_FPR64_Using_CC_GPR */ 71799, /* Select_GPR_Using_CC_GPR */ 71805, /* SplitF64Pseudo */ 71811, /* SwapFRMImm */ 71814, /* WriteFFLAGS */ 71816, /* WriteFRM */ 71817, /* WriteFRMImm */ 71818, /* ADD */ 71819, /* ADDI */ 71822, /* ADDIW */ 71825, /* ADDW */ 71828, /* ADD_UW */ 71831, /* AES32DSI */ 71834, /* AES32DSMI */ 71838, /* AES32ESI */ 71842, /* AES32ESMI */ 71846, /* AES64DS */ 71850, /* AES64DSM */ 71853, /* AES64ES */ 71856, /* AES64ESM */ 71859, /* AES64IM */ 71862, /* AES64KS1I */ 71864, /* AES64KS2 */ 71867, /* AMOADD_D */ 71870, /* AMOADD_D_AQ */ 71873, /* AMOADD_D_AQ_RL */ 71876, /* AMOADD_D_RL */ 71879, /* AMOADD_W */ 71882, /* AMOADD_W_AQ */ 71885, /* AMOADD_W_AQ_RL */ 71888, /* AMOADD_W_RL */ 71891, /* AMOAND_D */ 71894, /* AMOAND_D_AQ */ 71897, /* AMOAND_D_AQ_RL */ 71900, /* AMOAND_D_RL */ 71903, /* AMOAND_W */ 71906, /* AMOAND_W_AQ */ 71909, /* AMOAND_W_AQ_RL */ 71912, /* AMOAND_W_RL */ 71915, /* AMOMAXU_D */ 71918, /* AMOMAXU_D_AQ */ 71921, /* AMOMAXU_D_AQ_RL */ 71924, /* AMOMAXU_D_RL */ 71927, /* AMOMAXU_W */ 71930, /* AMOMAXU_W_AQ */ 71933, /* AMOMAXU_W_AQ_RL */ 71936, /* AMOMAXU_W_RL */ 71939, /* AMOMAX_D */ 71942, /* AMOMAX_D_AQ */ 71945, /* AMOMAX_D_AQ_RL */ 71948, /* AMOMAX_D_RL */ 71951, /* AMOMAX_W */ 71954, /* AMOMAX_W_AQ */ 71957, /* AMOMAX_W_AQ_RL */ 71960, /* AMOMAX_W_RL */ 71963, /* AMOMINU_D */ 71966, /* AMOMINU_D_AQ */ 71969, /* AMOMINU_D_AQ_RL */ 71972, /* AMOMINU_D_RL */ 71975, /* AMOMINU_W */ 71978, /* AMOMINU_W_AQ */ 71981, /* AMOMINU_W_AQ_RL */ 71984, /* AMOMINU_W_RL */ 71987, /* AMOMIN_D */ 71990, /* AMOMIN_D_AQ */ 71993, /* AMOMIN_D_AQ_RL */ 71996, /* AMOMIN_D_RL */ 71999, /* AMOMIN_W */ 72002, /* AMOMIN_W_AQ */ 72005, /* AMOMIN_W_AQ_RL */ 72008, /* AMOMIN_W_RL */ 72011, /* AMOOR_D */ 72014, /* AMOOR_D_AQ */ 72017, /* AMOOR_D_AQ_RL */ 72020, /* AMOOR_D_RL */ 72023, /* AMOOR_W */ 72026, /* AMOOR_W_AQ */ 72029, /* AMOOR_W_AQ_RL */ 72032, /* AMOOR_W_RL */ 72035, /* AMOSWAP_D */ 72038, /* AMOSWAP_D_AQ */ 72041, /* AMOSWAP_D_AQ_RL */ 72044, /* AMOSWAP_D_RL */ 72047, /* AMOSWAP_W */ 72050, /* AMOSWAP_W_AQ */ 72053, /* AMOSWAP_W_AQ_RL */ 72056, /* AMOSWAP_W_RL */ 72059, /* AMOXOR_D */ 72062, /* AMOXOR_D_AQ */ 72065, /* AMOXOR_D_AQ_RL */ 72068, /* AMOXOR_D_RL */ 72071, /* AMOXOR_W */ 72074, /* AMOXOR_W_AQ */ 72077, /* AMOXOR_W_AQ_RL */ 72080, /* AMOXOR_W_RL */ 72083, /* AND */ 72086, /* ANDI */ 72089, /* ANDN */ 72092, /* AUIPC */ 72095, /* BCLR */ 72097, /* BCLRI */ 72100, /* BEQ */ 72103, /* BEXT */ 72106, /* BEXTI */ 72109, /* BGE */ 72112, /* BGEU */ 72115, /* BINV */ 72118, /* BINVI */ 72121, /* BLT */ 72124, /* BLTU */ 72127, /* BNE */ 72130, /* BREV8 */ 72133, /* BSET */ 72135, /* BSETI */ 72138, /* CBO_CLEAN */ 72141, /* CBO_FLUSH */ 72142, /* CBO_INVAL */ 72143, /* CBO_ZERO */ 72144, /* CLMUL */ 72145, /* CLMULH */ 72148, /* CLMULR */ 72151, /* CLZ */ 72154, /* CLZW */ 72156, /* CPOP */ 72158, /* CPOPW */ 72160, /* CSRRC */ 72162, /* CSRRCI */ 72165, /* CSRRS */ 72168, /* CSRRSI */ 72171, /* CSRRW */ 72174, /* CSRRWI */ 72177, /* CTZ */ 72180, /* CTZW */ 72182, /* C_ADD */ 72184, /* C_ADDI */ 72187, /* C_ADDI16SP */ 72190, /* C_ADDI4SPN */ 72193, /* C_ADDIW */ 72196, /* C_ADDI_HINT_IMM_ZERO */ 72199, /* C_ADDI_HINT_X0 */ 72202, /* C_ADDI_NOP */ 72205, /* C_ADDW */ 72208, /* C_ADD_HINT */ 72211, /* C_AND */ 72214, /* C_ANDI */ 72217, /* C_BEQZ */ 72220, /* C_BNEZ */ 72222, /* C_EBREAK */ 72224, /* C_FLD */ 72224, /* C_FLDSP */ 72227, /* C_FLW */ 72230, /* C_FLWSP */ 72233, /* C_FSD */ 72236, /* C_FSDSP */ 72239, /* C_FSW */ 72242, /* C_FSWSP */ 72245, /* C_J */ 72248, /* C_JAL */ 72249, /* C_JALR */ 72250, /* C_JR */ 72251, /* C_LD */ 72252, /* C_LDSP */ 72255, /* C_LI */ 72258, /* C_LI_HINT */ 72260, /* C_LUI */ 72262, /* C_LUI_HINT */ 72264, /* C_LW */ 72266, /* C_LWSP */ 72269, /* C_MV */ 72272, /* C_MV_HINT */ 72274, /* C_NOP */ 72276, /* C_NOP_HINT */ 72276, /* C_OR */ 72277, /* C_SD */ 72280, /* C_SDSP */ 72283, /* C_SLLI */ 72286, /* C_SLLI64_HINT */ 72289, /* C_SLLI_HINT */ 72291, /* C_SRAI */ 72294, /* C_SRAI64_HINT */ 72297, /* C_SRLI */ 72299, /* C_SRLI64_HINT */ 72302, /* C_SUB */ 72304, /* C_SUBW */ 72307, /* C_SW */ 72310, /* C_SWSP */ 72313, /* C_UNIMP */ 72316, /* C_XOR */ 72316, /* DIV */ 72319, /* DIVU */ 72322, /* DIVUW */ 72325, /* DIVW */ 72328, /* DRET */ 72331, /* EBREAK */ 72333, /* ECALL */ 72333, /* FADD_D */ 72333, /* FADD_D_IN32X */ 72337, /* FADD_D_INX */ 72341, /* FADD_H */ 72345, /* FADD_H_INX */ 72349, /* FADD_S */ 72353, /* FADD_S_INX */ 72357, /* FCLASS_D */ 72361, /* FCLASS_D_IN32X */ 72363, /* FCLASS_D_INX */ 72365, /* FCLASS_H */ 72367, /* FCLASS_H_INX */ 72369, /* FCLASS_S */ 72371, /* FCLASS_S_INX */ 72373, /* FCVT_D_H */ 72375, /* FCVT_D_H_INX */ 72377, /* FCVT_D_L */ 72379, /* FCVT_D_LU */ 72382, /* FCVT_D_LU_INX */ 72385, /* FCVT_D_L_INX */ 72388, /* FCVT_D_S */ 72391, /* FCVT_D_S_IN32X */ 72393, /* FCVT_D_S_INX */ 72395, /* FCVT_D_W */ 72397, /* FCVT_D_WU */ 72399, /* FCVT_D_WU_IN32X */ 72401, /* FCVT_D_WU_INX */ 72403, /* FCVT_D_W_IN32X */ 72405, /* FCVT_D_W_INX */ 72407, /* FCVT_H_D */ 72409, /* FCVT_H_D_INX */ 72412, /* FCVT_H_L */ 72415, /* FCVT_H_LU */ 72418, /* FCVT_H_LU_INX */ 72421, /* FCVT_H_L_INX */ 72424, /* FCVT_H_S */ 72427, /* FCVT_H_S_INX */ 72430, /* FCVT_H_W */ 72433, /* FCVT_H_WU */ 72436, /* FCVT_H_WU_INX */ 72439, /* FCVT_H_W_INX */ 72442, /* FCVT_LU_D */ 72445, /* FCVT_LU_D_INX */ 72448, /* FCVT_LU_H */ 72451, /* FCVT_LU_H_INX */ 72454, /* FCVT_LU_S */ 72457, /* FCVT_LU_S_INX */ 72460, /* FCVT_L_D */ 72463, /* FCVT_L_D_INX */ 72466, /* FCVT_L_H */ 72469, /* FCVT_L_H_INX */ 72472, /* FCVT_L_S */ 72475, /* FCVT_L_S_INX */ 72478, /* FCVT_S_D */ 72481, /* FCVT_S_D_IN32X */ 72484, /* FCVT_S_D_INX */ 72487, /* FCVT_S_H */ 72490, /* FCVT_S_H_INX */ 72492, /* FCVT_S_L */ 72494, /* FCVT_S_LU */ 72497, /* FCVT_S_LU_INX */ 72500, /* FCVT_S_L_INX */ 72503, /* FCVT_S_W */ 72506, /* FCVT_S_WU */ 72509, /* FCVT_S_WU_INX */ 72512, /* FCVT_S_W_INX */ 72515, /* FCVT_WU_D */ 72518, /* FCVT_WU_D_IN32X */ 72521, /* FCVT_WU_D_INX */ 72524, /* FCVT_WU_H */ 72527, /* FCVT_WU_H_INX */ 72530, /* FCVT_WU_S */ 72533, /* FCVT_WU_S_INX */ 72536, /* FCVT_W_D */ 72539, /* FCVT_W_D_IN32X */ 72542, /* FCVT_W_D_INX */ 72545, /* FCVT_W_H */ 72548, /* FCVT_W_H_INX */ 72551, /* FCVT_W_S */ 72554, /* FCVT_W_S_INX */ 72557, /* FDIV_D */ 72560, /* FDIV_D_IN32X */ 72564, /* FDIV_D_INX */ 72568, /* FDIV_H */ 72572, /* FDIV_H_INX */ 72576, /* FDIV_S */ 72580, /* FDIV_S_INX */ 72584, /* FENCE */ 72588, /* FENCE_I */ 72590, /* FENCE_TSO */ 72590, /* FEQ_D */ 72590, /* FEQ_D_IN32X */ 72593, /* FEQ_D_INX */ 72596, /* FEQ_H */ 72599, /* FEQ_H_INX */ 72602, /* FEQ_S */ 72605, /* FEQ_S_INX */ 72608, /* FLD */ 72611, /* FLE_D */ 72614, /* FLE_D_IN32X */ 72617, /* FLE_D_INX */ 72620, /* FLE_H */ 72623, /* FLE_H_INX */ 72626, /* FLE_S */ 72629, /* FLE_S_INX */ 72632, /* FLH */ 72635, /* FLT_D */ 72638, /* FLT_D_IN32X */ 72641, /* FLT_D_INX */ 72644, /* FLT_H */ 72647, /* FLT_H_INX */ 72650, /* FLT_S */ 72653, /* FLT_S_INX */ 72656, /* FLW */ 72659, /* FMADD_D */ 72662, /* FMADD_D_IN32X */ 72667, /* FMADD_D_INX */ 72672, /* FMADD_H */ 72677, /* FMADD_H_INX */ 72682, /* FMADD_S */ 72687, /* FMADD_S_INX */ 72692, /* FMAX_D */ 72697, /* FMAX_D_IN32X */ 72700, /* FMAX_D_INX */ 72703, /* FMAX_H */ 72706, /* FMAX_H_INX */ 72709, /* FMAX_S */ 72712, /* FMAX_S_INX */ 72715, /* FMIN_D */ 72718, /* FMIN_D_IN32X */ 72721, /* FMIN_D_INX */ 72724, /* FMIN_H */ 72727, /* FMIN_H_INX */ 72730, /* FMIN_S */ 72733, /* FMIN_S_INX */ 72736, /* FMSUB_D */ 72739, /* FMSUB_D_IN32X */ 72744, /* FMSUB_D_INX */ 72749, /* FMSUB_H */ 72754, /* FMSUB_H_INX */ 72759, /* FMSUB_S */ 72764, /* FMSUB_S_INX */ 72769, /* FMUL_D */ 72774, /* FMUL_D_IN32X */ 72778, /* FMUL_D_INX */ 72782, /* FMUL_H */ 72786, /* FMUL_H_INX */ 72790, /* FMUL_S */ 72794, /* FMUL_S_INX */ 72798, /* FMV_D_X */ 72802, /* FMV_H_X */ 72804, /* FMV_W_X */ 72806, /* FMV_X_D */ 72808, /* FMV_X_H */ 72810, /* FMV_X_W */ 72812, /* FNMADD_D */ 72814, /* FNMADD_D_IN32X */ 72819, /* FNMADD_D_INX */ 72824, /* FNMADD_H */ 72829, /* FNMADD_H_INX */ 72834, /* FNMADD_S */ 72839, /* FNMADD_S_INX */ 72844, /* FNMSUB_D */ 72849, /* FNMSUB_D_IN32X */ 72854, /* FNMSUB_D_INX */ 72859, /* FNMSUB_H */ 72864, /* FNMSUB_H_INX */ 72869, /* FNMSUB_S */ 72874, /* FNMSUB_S_INX */ 72879, /* FSD */ 72884, /* FSGNJN_D */ 72887, /* FSGNJN_D_IN32X */ 72890, /* FSGNJN_D_INX */ 72893, /* FSGNJN_H */ 72896, /* FSGNJN_H_INX */ 72899, /* FSGNJN_S */ 72902, /* FSGNJN_S_INX */ 72905, /* FSGNJX_D */ 72908, /* FSGNJX_D_IN32X */ 72911, /* FSGNJX_D_INX */ 72914, /* FSGNJX_H */ 72917, /* FSGNJX_H_INX */ 72920, /* FSGNJX_S */ 72923, /* FSGNJX_S_INX */ 72926, /* FSGNJ_D */ 72929, /* FSGNJ_D_IN32X */ 72932, /* FSGNJ_D_INX */ 72935, /* FSGNJ_H */ 72938, /* FSGNJ_H_INX */ 72941, /* FSGNJ_S */ 72944, /* FSGNJ_S_INX */ 72947, /* FSH */ 72950, /* FSQRT_D */ 72953, /* FSQRT_D_IN32X */ 72956, /* FSQRT_D_INX */ 72959, /* FSQRT_H */ 72962, /* FSQRT_H_INX */ 72965, /* FSQRT_S */ 72968, /* FSQRT_S_INX */ 72971, /* FSUB_D */ 72974, /* FSUB_D_IN32X */ 72978, /* FSUB_D_INX */ 72982, /* FSUB_H */ 72986, /* FSUB_H_INX */ 72990, /* FSUB_S */ 72994, /* FSUB_S_INX */ 72998, /* FSW */ 73002, /* HFENCE_GVMA */ 73005, /* HFENCE_VVMA */ 73007, /* HINVAL_GVMA */ 73009, /* HINVAL_VVMA */ 73011, /* HLVX_HU */ 73013, /* HLVX_WU */ 73015, /* HLV_B */ 73017, /* HLV_BU */ 73019, /* HLV_D */ 73021, /* HLV_H */ 73023, /* HLV_HU */ 73025, /* HLV_W */ 73027, /* HLV_WU */ 73029, /* HSV_B */ 73031, /* HSV_D */ 73033, /* HSV_H */ 73035, /* HSV_W */ 73037, /* InsnB */ 73039, /* InsnI */ 73044, /* InsnI_Mem */ 73049, /* InsnJ */ 73054, /* InsnR */ 73057, /* InsnR4 */ 73063, /* InsnS */ 73070, /* InsnU */ 73075, /* JAL */ 73078, /* JALR */ 73080, /* LB */ 73083, /* LBU */ 73086, /* LD */ 73089, /* LH */ 73092, /* LHU */ 73095, /* LR_D */ 73098, /* LR_D_AQ */ 73100, /* LR_D_AQ_RL */ 73102, /* LR_D_RL */ 73104, /* LR_W */ 73106, /* LR_W_AQ */ 73108, /* LR_W_AQ_RL */ 73110, /* LR_W_RL */ 73112, /* LUI */ 73114, /* LW */ 73116, /* LWU */ 73119, /* MAX */ 73122, /* MAXU */ 73125, /* MIN */ 73128, /* MINU */ 73131, /* MRET */ 73134, /* MUL */ 73136, /* MULH */ 73139, /* MULHSU */ 73142, /* MULHU */ 73145, /* MULW */ 73148, /* OR */ 73151, /* ORC_B */ 73154, /* ORI */ 73156, /* ORN */ 73159, /* PACK */ 73162, /* PACKH */ 73165, /* PACKW */ 73168, /* PREFETCH_I */ 73171, /* PREFETCH_R */ 73173, /* PREFETCH_W */ 73175, /* REM */ 73177, /* REMU */ 73180, /* REMUW */ 73183, /* REMW */ 73186, /* REV8_RV32 */ 73189, /* REV8_RV64 */ 73191, /* ROL */ 73193, /* ROLW */ 73196, /* ROR */ 73199, /* RORI */ 73202, /* RORIW */ 73205, /* RORW */ 73208, /* SB */ 73211, /* SC_D */ 73214, /* SC_D_AQ */ 73217, /* SC_D_AQ_RL */ 73220, /* SC_D_RL */ 73223, /* SC_W */ 73226, /* SC_W_AQ */ 73229, /* SC_W_AQ_RL */ 73232, /* SC_W_RL */ 73235, /* SD */ 73238, /* SEXT_B */ 73241, /* SEXT_H */ 73243, /* SFENCE_INVAL_IR */ 73245, /* SFENCE_VMA */ 73247, /* SFENCE_W_INVAL */ 73249, /* SH */ 73251, /* SH1ADD */ 73254, /* SH1ADD_UW */ 73257, /* SH2ADD */ 73260, /* SH2ADD_UW */ 73263, /* SH3ADD */ 73266, /* SH3ADD_UW */ 73269, /* SHA256SIG0 */ 73272, /* SHA256SIG1 */ 73274, /* SHA256SUM0 */ 73276, /* SHA256SUM1 */ 73278, /* SHA512SIG0 */ 73280, /* SHA512SIG0H */ 73282, /* SHA512SIG0L */ 73285, /* SHA512SIG1 */ 73288, /* SHA512SIG1H */ 73290, /* SHA512SIG1L */ 73293, /* SHA512SUM0 */ 73296, /* SHA512SUM0R */ 73298, /* SHA512SUM1 */ 73301, /* SHA512SUM1R */ 73303, /* SINVAL_VMA */ 73306, /* SLL */ 73308, /* SLLI */ 73311, /* SLLIW */ 73314, /* SLLI_UW */ 73317, /* SLLW */ 73320, /* SLT */ 73323, /* SLTI */ 73326, /* SLTIU */ 73329, /* SLTU */ 73332, /* SM3P0 */ 73335, /* SM3P1 */ 73337, /* SM4ED */ 73339, /* SM4KS */ 73343, /* SRA */ 73347, /* SRAI */ 73350, /* SRAIW */ 73353, /* SRAW */ 73356, /* SRET */ 73359, /* SRL */ 73361, /* SRLI */ 73364, /* SRLIW */ 73367, /* SRLW */ 73370, /* SUB */ 73373, /* SUBW */ 73376, /* SW */ 73379, /* THVdotVMAQASU_VV */ 73382, /* THVdotVMAQASU_VX */ 73386, /* THVdotVMAQAUS_VX */ 73390, /* THVdotVMAQAU_VV */ 73394, /* THVdotVMAQAU_VX */ 73398, /* THVdotVMAQA_VV */ 73402, /* THVdotVMAQA_VX */ 73406, /* UNIMP */ 73410, /* UNZIP_RV32 */ 73410, /* URET */ 73412, /* VAADDU_VV */ 73414, /* VAADDU_VX */ 73418, /* VAADD_VV */ 73422, /* VAADD_VX */ 73426, /* VADC_VIM */ 73430, /* VADC_VVM */ 73434, /* VADC_VXM */ 73438, /* VADD_VI */ 73442, /* VADD_VV */ 73446, /* VADD_VX */ 73450, /* VAND_VI */ 73454, /* VAND_VV */ 73458, /* VAND_VX */ 73462, /* VASUBU_VV */ 73466, /* VASUBU_VX */ 73470, /* VASUB_VV */ 73474, /* VASUB_VX */ 73478, /* VCOMPRESS_VM */ 73482, /* VCPOP_M */ 73485, /* VDIVU_VV */ 73488, /* VDIVU_VX */ 73492, /* VDIV_VV */ 73496, /* VDIV_VX */ 73500, /* VFADD_VF */ 73504, /* VFADD_VV */ 73508, /* VFCLASS_V */ 73512, /* VFCVT_F_XU_V */ 73515, /* VFCVT_F_X_V */ 73518, /* VFCVT_RTZ_XU_F_V */ 73521, /* VFCVT_RTZ_X_F_V */ 73524, /* VFCVT_XU_F_V */ 73527, /* VFCVT_X_F_V */ 73530, /* VFDIV_VF */ 73533, /* VFDIV_VV */ 73537, /* VFIRST_M */ 73541, /* VFMACC_VF */ 73544, /* VFMACC_VV */ 73548, /* VFMADD_VF */ 73552, /* VFMADD_VV */ 73556, /* VFMAX_VF */ 73560, /* VFMAX_VV */ 73564, /* VFMERGE_VFM */ 73568, /* VFMIN_VF */ 73572, /* VFMIN_VV */ 73576, /* VFMSAC_VF */ 73580, /* VFMSAC_VV */ 73584, /* VFMSUB_VF */ 73588, /* VFMSUB_VV */ 73592, /* VFMUL_VF */ 73596, /* VFMUL_VV */ 73600, /* VFMV_F_S */ 73604, /* VFMV_S_F */ 73606, /* VFMV_V_F */ 73609, /* VFNCVT_F_F_W */ 73611, /* VFNCVT_F_XU_W */ 73614, /* VFNCVT_F_X_W */ 73617, /* VFNCVT_ROD_F_F_W */ 73620, /* VFNCVT_RTZ_XU_F_W */ 73623, /* VFNCVT_RTZ_X_F_W */ 73626, /* VFNCVT_XU_F_W */ 73629, /* VFNCVT_X_F_W */ 73632, /* VFNMACC_VF */ 73635, /* VFNMACC_VV */ 73639, /* VFNMADD_VF */ 73643, /* VFNMADD_VV */ 73647, /* VFNMSAC_VF */ 73651, /* VFNMSAC_VV */ 73655, /* VFNMSUB_VF */ 73659, /* VFNMSUB_VV */ 73663, /* VFRDIV_VF */ 73667, /* VFREC7_V */ 73671, /* VFREDMAX_VS */ 73674, /* VFREDMIN_VS */ 73678, /* VFREDOSUM_VS */ 73682, /* VFREDUSUM_VS */ 73686, /* VFRSQRT7_V */ 73690, /* VFRSUB_VF */ 73693, /* VFSGNJN_VF */ 73697, /* VFSGNJN_VV */ 73701, /* VFSGNJX_VF */ 73705, /* VFSGNJX_VV */ 73709, /* VFSGNJ_VF */ 73713, /* VFSGNJ_VV */ 73717, /* VFSLIDE1DOWN_VF */ 73721, /* VFSLIDE1UP_VF */ 73725, /* VFSQRT_V */ 73729, /* VFSUB_VF */ 73732, /* VFSUB_VV */ 73736, /* VFWADD_VF */ 73740, /* VFWADD_VV */ 73744, /* VFWADD_WF */ 73748, /* VFWADD_WV */ 73752, /* VFWCVT_F_F_V */ 73756, /* VFWCVT_F_XU_V */ 73759, /* VFWCVT_F_X_V */ 73762, /* VFWCVT_RTZ_XU_F_V */ 73765, /* VFWCVT_RTZ_X_F_V */ 73768, /* VFWCVT_XU_F_V */ 73771, /* VFWCVT_X_F_V */ 73774, /* VFWMACC_VF */ 73777, /* VFWMACC_VV */ 73781, /* VFWMSAC_VF */ 73785, /* VFWMSAC_VV */ 73789, /* VFWMUL_VF */ 73793, /* VFWMUL_VV */ 73797, /* VFWNMACC_VF */ 73801, /* VFWNMACC_VV */ 73805, /* VFWNMSAC_VF */ 73809, /* VFWNMSAC_VV */ 73813, /* VFWREDOSUM_VS */ 73817, /* VFWREDUSUM_VS */ 73821, /* VFWSUB_VF */ 73825, /* VFWSUB_VV */ 73829, /* VFWSUB_WF */ 73833, /* VFWSUB_WV */ 73837, /* VID_V */ 73841, /* VIOTA_M */ 73843, /* VL1RE16_V */ 73846, /* VL1RE32_V */ 73848, /* VL1RE64_V */ 73850, /* VL1RE8_V */ 73852, /* VL2RE16_V */ 73854, /* VL2RE32_V */ 73856, /* VL2RE64_V */ 73858, /* VL2RE8_V */ 73860, /* VL4RE16_V */ 73862, /* VL4RE32_V */ 73864, /* VL4RE64_V */ 73866, /* VL4RE8_V */ 73868, /* VL8RE16_V */ 73870, /* VL8RE32_V */ 73872, /* VL8RE64_V */ 73874, /* VL8RE8_V */ 73876, /* VLE16FF_V */ 73878, /* VLE16_V */ 73881, /* VLE32FF_V */ 73884, /* VLE32_V */ 73887, /* VLE64FF_V */ 73890, /* VLE64_V */ 73893, /* VLE8FF_V */ 73896, /* VLE8_V */ 73899, /* VLM_V */ 73902, /* VLOXEI16_V */ 73904, /* VLOXEI32_V */ 73908, /* VLOXEI64_V */ 73912, /* VLOXEI8_V */ 73916, /* VLOXSEG2EI16_V */ 73920, /* VLOXSEG2EI32_V */ 73924, /* VLOXSEG2EI64_V */ 73928, /* VLOXSEG2EI8_V */ 73932, /* VLOXSEG3EI16_V */ 73936, /* VLOXSEG3EI32_V */ 73940, /* VLOXSEG3EI64_V */ 73944, /* VLOXSEG3EI8_V */ 73948, /* VLOXSEG4EI16_V */ 73952, /* VLOXSEG4EI32_V */ 73956, /* VLOXSEG4EI64_V */ 73960, /* VLOXSEG4EI8_V */ 73964, /* VLOXSEG5EI16_V */ 73968, /* VLOXSEG5EI32_V */ 73972, /* VLOXSEG5EI64_V */ 73976, /* VLOXSEG5EI8_V */ 73980, /* VLOXSEG6EI16_V */ 73984, /* VLOXSEG6EI32_V */ 73988, /* VLOXSEG6EI64_V */ 73992, /* VLOXSEG6EI8_V */ 73996, /* VLOXSEG7EI16_V */ 74000, /* VLOXSEG7EI32_V */ 74004, /* VLOXSEG7EI64_V */ 74008, /* VLOXSEG7EI8_V */ 74012, /* VLOXSEG8EI16_V */ 74016, /* VLOXSEG8EI32_V */ 74020, /* VLOXSEG8EI64_V */ 74024, /* VLOXSEG8EI8_V */ 74028, /* VLSE16_V */ 74032, /* VLSE32_V */ 74036, /* VLSE64_V */ 74040, /* VLSE8_V */ 74044, /* VLSEG2E16FF_V */ 74048, /* VLSEG2E16_V */ 74051, /* VLSEG2E32FF_V */ 74054, /* VLSEG2E32_V */ 74057, /* VLSEG2E64FF_V */ 74060, /* VLSEG2E64_V */ 74063, /* VLSEG2E8FF_V */ 74066, /* VLSEG2E8_V */ 74069, /* VLSEG3E16FF_V */ 74072, /* VLSEG3E16_V */ 74075, /* VLSEG3E32FF_V */ 74078, /* VLSEG3E32_V */ 74081, /* VLSEG3E64FF_V */ 74084, /* VLSEG3E64_V */ 74087, /* VLSEG3E8FF_V */ 74090, /* VLSEG3E8_V */ 74093, /* VLSEG4E16FF_V */ 74096, /* VLSEG4E16_V */ 74099, /* VLSEG4E32FF_V */ 74102, /* VLSEG4E32_V */ 74105, /* VLSEG4E64FF_V */ 74108, /* VLSEG4E64_V */ 74111, /* VLSEG4E8FF_V */ 74114, /* VLSEG4E8_V */ 74117, /* VLSEG5E16FF_V */ 74120, /* VLSEG5E16_V */ 74123, /* VLSEG5E32FF_V */ 74126, /* VLSEG5E32_V */ 74129, /* VLSEG5E64FF_V */ 74132, /* VLSEG5E64_V */ 74135, /* VLSEG5E8FF_V */ 74138, /* VLSEG5E8_V */ 74141, /* VLSEG6E16FF_V */ 74144, /* VLSEG6E16_V */ 74147, /* VLSEG6E32FF_V */ 74150, /* VLSEG6E32_V */ 74153, /* VLSEG6E64FF_V */ 74156, /* VLSEG6E64_V */ 74159, /* VLSEG6E8FF_V */ 74162, /* VLSEG6E8_V */ 74165, /* VLSEG7E16FF_V */ 74168, /* VLSEG7E16_V */ 74171, /* VLSEG7E32FF_V */ 74174, /* VLSEG7E32_V */ 74177, /* VLSEG7E64FF_V */ 74180, /* VLSEG7E64_V */ 74183, /* VLSEG7E8FF_V */ 74186, /* VLSEG7E8_V */ 74189, /* VLSEG8E16FF_V */ 74192, /* VLSEG8E16_V */ 74195, /* VLSEG8E32FF_V */ 74198, /* VLSEG8E32_V */ 74201, /* VLSEG8E64FF_V */ 74204, /* VLSEG8E64_V */ 74207, /* VLSEG8E8FF_V */ 74210, /* VLSEG8E8_V */ 74213, /* VLSSEG2E16_V */ 74216, /* VLSSEG2E32_V */ 74220, /* VLSSEG2E64_V */ 74224, /* VLSSEG2E8_V */ 74228, /* VLSSEG3E16_V */ 74232, /* VLSSEG3E32_V */ 74236, /* VLSSEG3E64_V */ 74240, /* VLSSEG3E8_V */ 74244, /* VLSSEG4E16_V */ 74248, /* VLSSEG4E32_V */ 74252, /* VLSSEG4E64_V */ 74256, /* VLSSEG4E8_V */ 74260, /* VLSSEG5E16_V */ 74264, /* VLSSEG5E32_V */ 74268, /* VLSSEG5E64_V */ 74272, /* VLSSEG5E8_V */ 74276, /* VLSSEG6E16_V */ 74280, /* VLSSEG6E32_V */ 74284, /* VLSSEG6E64_V */ 74288, /* VLSSEG6E8_V */ 74292, /* VLSSEG7E16_V */ 74296, /* VLSSEG7E32_V */ 74300, /* VLSSEG7E64_V */ 74304, /* VLSSEG7E8_V */ 74308, /* VLSSEG8E16_V */ 74312, /* VLSSEG8E32_V */ 74316, /* VLSSEG8E64_V */ 74320, /* VLSSEG8E8_V */ 74324, /* VLUXEI16_V */ 74328, /* VLUXEI32_V */ 74332, /* VLUXEI64_V */ 74336, /* VLUXEI8_V */ 74340, /* VLUXSEG2EI16_V */ 74344, /* VLUXSEG2EI32_V */ 74348, /* VLUXSEG2EI64_V */ 74352, /* VLUXSEG2EI8_V */ 74356, /* VLUXSEG3EI16_V */ 74360, /* VLUXSEG3EI32_V */ 74364, /* VLUXSEG3EI64_V */ 74368, /* VLUXSEG3EI8_V */ 74372, /* VLUXSEG4EI16_V */ 74376, /* VLUXSEG4EI32_V */ 74380, /* VLUXSEG4EI64_V */ 74384, /* VLUXSEG4EI8_V */ 74388, /* VLUXSEG5EI16_V */ 74392, /* VLUXSEG5EI32_V */ 74396, /* VLUXSEG5EI64_V */ 74400, /* VLUXSEG5EI8_V */ 74404, /* VLUXSEG6EI16_V */ 74408, /* VLUXSEG6EI32_V */ 74412, /* VLUXSEG6EI64_V */ 74416, /* VLUXSEG6EI8_V */ 74420, /* VLUXSEG7EI16_V */ 74424, /* VLUXSEG7EI32_V */ 74428, /* VLUXSEG7EI64_V */ 74432, /* VLUXSEG7EI8_V */ 74436, /* VLUXSEG8EI16_V */ 74440, /* VLUXSEG8EI32_V */ 74444, /* VLUXSEG8EI64_V */ 74448, /* VLUXSEG8EI8_V */ 74452, /* VMACC_VV */ 74456, /* VMACC_VX */ 74460, /* VMADC_VI */ 74464, /* VMADC_VIM */ 74467, /* VMADC_VV */ 74471, /* VMADC_VVM */ 74474, /* VMADC_VX */ 74478, /* VMADC_VXM */ 74481, /* VMADD_VV */ 74485, /* VMADD_VX */ 74489, /* VMANDN_MM */ 74493, /* VMAND_MM */ 74496, /* VMAXU_VV */ 74499, /* VMAXU_VX */ 74503, /* VMAX_VV */ 74507, /* VMAX_VX */ 74511, /* VMERGE_VIM */ 74515, /* VMERGE_VVM */ 74519, /* VMERGE_VXM */ 74523, /* VMFEQ_VF */ 74527, /* VMFEQ_VV */ 74531, /* VMFGE_VF */ 74535, /* VMFGT_VF */ 74539, /* VMFLE_VF */ 74543, /* VMFLE_VV */ 74547, /* VMFLT_VF */ 74551, /* VMFLT_VV */ 74555, /* VMFNE_VF */ 74559, /* VMFNE_VV */ 74563, /* VMINU_VV */ 74567, /* VMINU_VX */ 74571, /* VMIN_VV */ 74575, /* VMIN_VX */ 74579, /* VMNAND_MM */ 74583, /* VMNOR_MM */ 74586, /* VMORN_MM */ 74589, /* VMOR_MM */ 74592, /* VMSBC_VV */ 74595, /* VMSBC_VVM */ 74598, /* VMSBC_VX */ 74602, /* VMSBC_VXM */ 74605, /* VMSBF_M */ 74609, /* VMSEQ_VI */ 74612, /* VMSEQ_VV */ 74616, /* VMSEQ_VX */ 74620, /* VMSGTU_VI */ 74624, /* VMSGTU_VX */ 74628, /* VMSGT_VI */ 74632, /* VMSGT_VX */ 74636, /* VMSIF_M */ 74640, /* VMSLEU_VI */ 74643, /* VMSLEU_VV */ 74647, /* VMSLEU_VX */ 74651, /* VMSLE_VI */ 74655, /* VMSLE_VV */ 74659, /* VMSLE_VX */ 74663, /* VMSLTU_VV */ 74667, /* VMSLTU_VX */ 74671, /* VMSLT_VV */ 74675, /* VMSLT_VX */ 74679, /* VMSNE_VI */ 74683, /* VMSNE_VV */ 74687, /* VMSNE_VX */ 74691, /* VMSOF_M */ 74695, /* VMULHSU_VV */ 74698, /* VMULHSU_VX */ 74702, /* VMULHU_VV */ 74706, /* VMULHU_VX */ 74710, /* VMULH_VV */ 74714, /* VMULH_VX */ 74718, /* VMUL_VV */ 74722, /* VMUL_VX */ 74726, /* VMV1R_V */ 74730, /* VMV2R_V */ 74732, /* VMV4R_V */ 74734, /* VMV8R_V */ 74736, /* VMV_S_X */ 74738, /* VMV_V_I */ 74741, /* VMV_V_V */ 74743, /* VMV_V_X */ 74745, /* VMV_X_S */ 74747, /* VMXNOR_MM */ 74749, /* VMXOR_MM */ 74752, /* VNCLIPU_WI */ 74755, /* VNCLIPU_WV */ 74759, /* VNCLIPU_WX */ 74763, /* VNCLIP_WI */ 74767, /* VNCLIP_WV */ 74771, /* VNCLIP_WX */ 74775, /* VNMSAC_VV */ 74779, /* VNMSAC_VX */ 74783, /* VNMSUB_VV */ 74787, /* VNMSUB_VX */ 74791, /* VNSRA_WI */ 74795, /* VNSRA_WV */ 74799, /* VNSRA_WX */ 74803, /* VNSRL_WI */ 74807, /* VNSRL_WV */ 74811, /* VNSRL_WX */ 74815, /* VOR_VI */ 74819, /* VOR_VV */ 74823, /* VOR_VX */ 74827, /* VREDAND_VS */ 74831, /* VREDMAXU_VS */ 74835, /* VREDMAX_VS */ 74839, /* VREDMINU_VS */ 74843, /* VREDMIN_VS */ 74847, /* VREDOR_VS */ 74851, /* VREDSUM_VS */ 74855, /* VREDXOR_VS */ 74859, /* VREMU_VV */ 74863, /* VREMU_VX */ 74867, /* VREM_VV */ 74871, /* VREM_VX */ 74875, /* VRGATHEREI16_VV */ 74879, /* VRGATHER_VI */ 74883, /* VRGATHER_VV */ 74887, /* VRGATHER_VX */ 74891, /* VRSUB_VI */ 74895, /* VRSUB_VX */ 74899, /* VS1R_V */ 74903, /* VS2R_V */ 74905, /* VS4R_V */ 74907, /* VS8R_V */ 74909, /* VSADDU_VI */ 74911, /* VSADDU_VV */ 74915, /* VSADDU_VX */ 74919, /* VSADD_VI */ 74923, /* VSADD_VV */ 74927, /* VSADD_VX */ 74931, /* VSBC_VVM */ 74935, /* VSBC_VXM */ 74939, /* VSE16_V */ 74943, /* VSE32_V */ 74946, /* VSE64_V */ 74949, /* VSE8_V */ 74952, /* VSETIVLI */ 74955, /* VSETVL */ 74958, /* VSETVLI */ 74961, /* VSEXT_VF2 */ 74964, /* VSEXT_VF4 */ 74967, /* VSEXT_VF8 */ 74970, /* VSLIDE1DOWN_VX */ 74973, /* VSLIDE1UP_VX */ 74977, /* VSLIDEDOWN_VI */ 74981, /* VSLIDEDOWN_VX */ 74985, /* VSLIDEUP_VI */ 74989, /* VSLIDEUP_VX */ 74993, /* VSLL_VI */ 74997, /* VSLL_VV */ 75001, /* VSLL_VX */ 75005, /* VSMUL_VV */ 75009, /* VSMUL_VX */ 75013, /* VSM_V */ 75017, /* VSOXEI16_V */ 75019, /* VSOXEI32_V */ 75023, /* VSOXEI64_V */ 75027, /* VSOXEI8_V */ 75031, /* VSOXSEG2EI16_V */ 75035, /* VSOXSEG2EI32_V */ 75039, /* VSOXSEG2EI64_V */ 75043, /* VSOXSEG2EI8_V */ 75047, /* VSOXSEG3EI16_V */ 75051, /* VSOXSEG3EI32_V */ 75055, /* VSOXSEG3EI64_V */ 75059, /* VSOXSEG3EI8_V */ 75063, /* VSOXSEG4EI16_V */ 75067, /* VSOXSEG4EI32_V */ 75071, /* VSOXSEG4EI64_V */ 75075, /* VSOXSEG4EI8_V */ 75079, /* VSOXSEG5EI16_V */ 75083, /* VSOXSEG5EI32_V */ 75087, /* VSOXSEG5EI64_V */ 75091, /* VSOXSEG5EI8_V */ 75095, /* VSOXSEG6EI16_V */ 75099, /* VSOXSEG6EI32_V */ 75103, /* VSOXSEG6EI64_V */ 75107, /* VSOXSEG6EI8_V */ 75111, /* VSOXSEG7EI16_V */ 75115, /* VSOXSEG7EI32_V */ 75119, /* VSOXSEG7EI64_V */ 75123, /* VSOXSEG7EI8_V */ 75127, /* VSOXSEG8EI16_V */ 75131, /* VSOXSEG8EI32_V */ 75135, /* VSOXSEG8EI64_V */ 75139, /* VSOXSEG8EI8_V */ 75143, /* VSRA_VI */ 75147, /* VSRA_VV */ 75151, /* VSRA_VX */ 75155, /* VSRL_VI */ 75159, /* VSRL_VV */ 75163, /* VSRL_VX */ 75167, /* VSSE16_V */ 75171, /* VSSE32_V */ 75175, /* VSSE64_V */ 75179, /* VSSE8_V */ 75183, /* VSSEG2E16_V */ 75187, /* VSSEG2E32_V */ 75190, /* VSSEG2E64_V */ 75193, /* VSSEG2E8_V */ 75196, /* VSSEG3E16_V */ 75199, /* VSSEG3E32_V */ 75202, /* VSSEG3E64_V */ 75205, /* VSSEG3E8_V */ 75208, /* VSSEG4E16_V */ 75211, /* VSSEG4E32_V */ 75214, /* VSSEG4E64_V */ 75217, /* VSSEG4E8_V */ 75220, /* VSSEG5E16_V */ 75223, /* VSSEG5E32_V */ 75226, /* VSSEG5E64_V */ 75229, /* VSSEG5E8_V */ 75232, /* VSSEG6E16_V */ 75235, /* VSSEG6E32_V */ 75238, /* VSSEG6E64_V */ 75241, /* VSSEG6E8_V */ 75244, /* VSSEG7E16_V */ 75247, /* VSSEG7E32_V */ 75250, /* VSSEG7E64_V */ 75253, /* VSSEG7E8_V */ 75256, /* VSSEG8E16_V */ 75259, /* VSSEG8E32_V */ 75262, /* VSSEG8E64_V */ 75265, /* VSSEG8E8_V */ 75268, /* VSSRA_VI */ 75271, /* VSSRA_VV */ 75275, /* VSSRA_VX */ 75279, /* VSSRL_VI */ 75283, /* VSSRL_VV */ 75287, /* VSSRL_VX */ 75291, /* VSSSEG2E16_V */ 75295, /* VSSSEG2E32_V */ 75299, /* VSSSEG2E64_V */ 75303, /* VSSSEG2E8_V */ 75307, /* VSSSEG3E16_V */ 75311, /* VSSSEG3E32_V */ 75315, /* VSSSEG3E64_V */ 75319, /* VSSSEG3E8_V */ 75323, /* VSSSEG4E16_V */ 75327, /* VSSSEG4E32_V */ 75331, /* VSSSEG4E64_V */ 75335, /* VSSSEG4E8_V */ 75339, /* VSSSEG5E16_V */ 75343, /* VSSSEG5E32_V */ 75347, /* VSSSEG5E64_V */ 75351, /* VSSSEG5E8_V */ 75355, /* VSSSEG6E16_V */ 75359, /* VSSSEG6E32_V */ 75363, /* VSSSEG6E64_V */ 75367, /* VSSSEG6E8_V */ 75371, /* VSSSEG7E16_V */ 75375, /* VSSSEG7E32_V */ 75379, /* VSSSEG7E64_V */ 75383, /* VSSSEG7E8_V */ 75387, /* VSSSEG8E16_V */ 75391, /* VSSSEG8E32_V */ 75395, /* VSSSEG8E64_V */ 75399, /* VSSSEG8E8_V */ 75403, /* VSSUBU_VV */ 75407, /* VSSUBU_VX */ 75411, /* VSSUB_VV */ 75415, /* VSSUB_VX */ 75419, /* VSUB_VV */ 75423, /* VSUB_VX */ 75427, /* VSUXEI16_V */ 75431, /* VSUXEI32_V */ 75435, /* VSUXEI64_V */ 75439, /* VSUXEI8_V */ 75443, /* VSUXSEG2EI16_V */ 75447, /* VSUXSEG2EI32_V */ 75451, /* VSUXSEG2EI64_V */ 75455, /* VSUXSEG2EI8_V */ 75459, /* VSUXSEG3EI16_V */ 75463, /* VSUXSEG3EI32_V */ 75467, /* VSUXSEG3EI64_V */ 75471, /* VSUXSEG3EI8_V */ 75475, /* VSUXSEG4EI16_V */ 75479, /* VSUXSEG4EI32_V */ 75483, /* VSUXSEG4EI64_V */ 75487, /* VSUXSEG4EI8_V */ 75491, /* VSUXSEG5EI16_V */ 75495, /* VSUXSEG5EI32_V */ 75499, /* VSUXSEG5EI64_V */ 75503, /* VSUXSEG5EI8_V */ 75507, /* VSUXSEG6EI16_V */ 75511, /* VSUXSEG6EI32_V */ 75515, /* VSUXSEG6EI64_V */ 75519, /* VSUXSEG6EI8_V */ 75523, /* VSUXSEG7EI16_V */ 75527, /* VSUXSEG7EI32_V */ 75531, /* VSUXSEG7EI64_V */ 75535, /* VSUXSEG7EI8_V */ 75539, /* VSUXSEG8EI16_V */ 75543, /* VSUXSEG8EI32_V */ 75547, /* VSUXSEG8EI64_V */ 75551, /* VSUXSEG8EI8_V */ 75555, /* VT_MASKC */ 75559, /* VT_MASKCN */ 75562, /* VWADDU_VV */ 75565, /* VWADDU_VX */ 75569, /* VWADDU_WV */ 75573, /* VWADDU_WX */ 75577, /* VWADD_VV */ 75581, /* VWADD_VX */ 75585, /* VWADD_WV */ 75589, /* VWADD_WX */ 75593, /* VWMACCSU_VV */ 75597, /* VWMACCSU_VX */ 75601, /* VWMACCUS_VX */ 75605, /* VWMACCU_VV */ 75609, /* VWMACCU_VX */ 75613, /* VWMACC_VV */ 75617, /* VWMACC_VX */ 75621, /* VWMULSU_VV */ 75625, /* VWMULSU_VX */ 75629, /* VWMULU_VV */ 75633, /* VWMULU_VX */ 75637, /* VWMUL_VV */ 75641, /* VWMUL_VX */ 75645, /* VWREDSUMU_VS */ 75649, /* VWREDSUM_VS */ 75653, /* VWSUBU_VV */ 75657, /* VWSUBU_VX */ 75661, /* VWSUBU_WV */ 75665, /* VWSUBU_WX */ 75669, /* VWSUB_VV */ 75673, /* VWSUB_VX */ 75677, /* VWSUB_WV */ 75681, /* VWSUB_WX */ 75685, /* VXOR_VI */ 75689, /* VXOR_VV */ 75693, /* VXOR_VX */ 75697, /* VZEXT_VF2 */ 75701, /* VZEXT_VF4 */ 75704, /* VZEXT_VF8 */ 75707, /* WFI */ 75710, /* WRS_NTO */ 75712, /* WRS_STO */ 75712, /* XNOR */ 75712, /* XOR */ 75715, /* XORI */ 75718, /* XPERM4 */ 75721, /* XPERM8 */ 75724, /* ZEXT_H_RV32 */ 75727, /* ZEXT_H_RV64 */ 75729, /* ZIP_RV32 */ 75731, }; using namespace OpTypes; const int8_t OpcodeOperandTypes[] = { /* PHI */ -1, /* INLINEASM */ /* INLINEASM_BR */ /* CFI_INSTRUCTION */ i32imm, /* EH_LABEL */ i32imm, /* GC_LABEL */ i32imm, /* ANNOTATION_LABEL */ i32imm, /* KILL */ /* EXTRACT_SUBREG */ -1, -1, i32imm, /* INSERT_SUBREG */ -1, -1, -1, i32imm, /* IMPLICIT_DEF */ -1, /* SUBREG_TO_REG */ -1, -1, -1, i32imm, /* COPY_TO_REGCLASS */ -1, -1, i32imm, /* DBG_VALUE */ /* DBG_VALUE_LIST */ /* DBG_INSTR_REF */ /* DBG_PHI */ /* DBG_LABEL */ -1, /* REG_SEQUENCE */ -1, -1, /* COPY */ -1, -1, /* BUNDLE */ /* LIFETIME_START */ i32imm, /* LIFETIME_END */ i32imm, /* PSEUDO_PROBE */ i64imm, i64imm, i8imm, i32imm, /* ARITH_FENCE */ -1, -1, /* STACKMAP */ i64imm, i32imm, /* FENTRY_CALL */ /* PATCHPOINT */ -1, i64imm, i32imm, -1, i32imm, i32imm, /* LOAD_STACK_GUARD */ -1, /* PREALLOCATED_SETUP */ i32imm, /* PREALLOCATED_ARG */ -1, i32imm, i32imm, /* STATEPOINT */ /* LOCAL_ESCAPE */ -1, i32imm, /* FAULTING_OP */ -1, /* PATCHABLE_OP */ /* PATCHABLE_FUNCTION_ENTER */ /* PATCHABLE_RET */ /* PATCHABLE_FUNCTION_EXIT */ /* PATCHABLE_TAIL_CALL */ /* PATCHABLE_EVENT_CALL */ -1, -1, /* PATCHABLE_TYPED_EVENT_CALL */ -1, -1, -1, /* ICALL_BRANCH_FUNNEL */ /* MEMBARRIER */ /* G_ASSERT_SEXT */ type0, type0, untyped_imm_0, /* G_ASSERT_ZEXT */ type0, type0, untyped_imm_0, /* G_ASSERT_ALIGN */ type0, type0, untyped_imm_0, /* G_ADD */ type0, type0, type0, /* G_SUB */ type0, type0, type0, /* G_MUL */ type0, type0, type0, /* G_SDIV */ type0, type0, type0, /* G_UDIV */ type0, type0, type0, /* G_SREM */ type0, type0, type0, /* G_UREM */ type0, type0, type0, /* G_SDIVREM */ type0, type0, type0, type0, /* G_UDIVREM */ type0, type0, type0, type0, /* G_AND */ type0, type0, type0, /* G_OR */ type0, type0, type0, /* G_XOR */ type0, type0, type0, /* G_IMPLICIT_DEF */ type0, /* G_PHI */ type0, /* G_FRAME_INDEX */ type0, -1, /* G_GLOBAL_VALUE */ type0, -1, /* G_EXTRACT */ type0, type1, untyped_imm_0, /* G_UNMERGE_VALUES */ type0, type1, /* G_INSERT */ type0, type0, type1, untyped_imm_0, /* G_MERGE_VALUES */ type0, type1, /* G_BUILD_VECTOR */ type0, type1, /* G_BUILD_VECTOR_TRUNC */ type0, type1, /* G_CONCAT_VECTORS */ type0, type1, /* G_PTRTOINT */ type0, type1, /* G_INTTOPTR */ type0, type1, /* G_BITCAST */ type0, type1, /* G_FREEZE */ type0, type0, /* G_INTRINSIC_FPTRUNC_ROUND */ type0, type1, i32imm, /* G_INTRINSIC_TRUNC */ type0, type0, /* G_INTRINSIC_ROUND */ type0, type0, /* G_INTRINSIC_LRINT */ type0, type1, /* G_INTRINSIC_ROUNDEVEN */ type0, type0, /* G_READCYCLECOUNTER */ type0, /* G_LOAD */ type0, ptype1, /* G_SEXTLOAD */ type0, ptype1, /* G_ZEXTLOAD */ type0, ptype1, /* G_INDEXED_LOAD */ type0, ptype1, ptype1, type2, -1, /* G_INDEXED_SEXTLOAD */ type0, ptype1, ptype1, type2, -1, /* G_INDEXED_ZEXTLOAD */ type0, ptype1, ptype1, type2, -1, /* G_STORE */ type0, ptype1, /* G_INDEXED_STORE */ ptype0, type1, ptype0, ptype2, -1, /* G_ATOMIC_CMPXCHG_WITH_SUCCESS */ type0, type1, type2, type0, type0, /* G_ATOMIC_CMPXCHG */ type0, ptype1, type0, type0, /* G_ATOMICRMW_XCHG */ type0, ptype1, type0, /* G_ATOMICRMW_ADD */ type0, ptype1, type0, /* G_ATOMICRMW_SUB */ type0, ptype1, type0, /* G_ATOMICRMW_AND */ type0, ptype1, type0, /* G_ATOMICRMW_NAND */ type0, ptype1, type0, /* G_ATOMICRMW_OR */ type0, ptype1, type0, /* G_ATOMICRMW_XOR */ type0, ptype1, type0, /* G_ATOMICRMW_MAX */ type0, ptype1, type0, /* G_ATOMICRMW_MIN */ type0, ptype1, type0, /* G_ATOMICRMW_UMAX */ type0, ptype1, type0, /* G_ATOMICRMW_UMIN */ type0, ptype1, type0, /* G_ATOMICRMW_FADD */ type0, ptype1, type0, /* G_ATOMICRMW_FSUB */ type0, ptype1, type0, /* G_ATOMICRMW_FMAX */ type0, ptype1, type0, /* G_ATOMICRMW_FMIN */ type0, ptype1, type0, /* G_ATOMICRMW_UINC_WRAP */ type0, ptype1, type0, /* G_ATOMICRMW_UDEC_WRAP */ type0, ptype1, type0, /* G_FENCE */ i32imm, i32imm, /* G_BRCOND */ type0, -1, /* G_BRINDIRECT */ type0, /* G_INVOKE_REGION_START */ /* G_INTRINSIC */ -1, /* G_INTRINSIC_W_SIDE_EFFECTS */ -1, /* G_ANYEXT */ type0, type1, /* G_TRUNC */ type0, type1, /* G_CONSTANT */ type0, -1, /* G_FCONSTANT */ type0, -1, /* G_VASTART */ type0, /* G_VAARG */ type0, type1, -1, /* G_SEXT */ type0, type1, /* G_SEXT_INREG */ type0, type0, untyped_imm_0, /* G_ZEXT */ type0, type1, /* G_SHL */ type0, type0, type1, /* G_LSHR */ type0, type0, type1, /* G_ASHR */ type0, type0, type1, /* G_FSHL */ type0, type0, type0, type1, /* G_FSHR */ type0, type0, type0, type1, /* G_ROTR */ type0, type0, type1, /* G_ROTL */ type0, type0, type1, /* G_ICMP */ type0, -1, type1, type1, /* G_FCMP */ type0, -1, type1, type1, /* G_SELECT */ type0, type1, type0, type0, /* G_UADDO */ type0, type1, type0, type0, /* G_UADDE */ type0, type1, type0, type0, type1, /* G_USUBO */ type0, type1, type0, type0, /* G_USUBE */ type0, type1, type0, type0, type1, /* G_SADDO */ type0, type1, type0, type0, /* G_SADDE */ type0, type1, type0, type0, type1, /* G_SSUBO */ type0, type1, type0, type0, /* G_SSUBE */ type0, type1, type0, type0, type1, /* G_UMULO */ type0, type1, type0, type0, /* G_SMULO */ type0, type1, type0, type0, /* G_UMULH */ type0, type0, type0, /* G_SMULH */ type0, type0, type0, /* G_UADDSAT */ type0, type0, type0, /* G_SADDSAT */ type0, type0, type0, /* G_USUBSAT */ type0, type0, type0, /* G_SSUBSAT */ type0, type0, type0, /* G_USHLSAT */ type0, type0, type1, /* G_SSHLSAT */ type0, type0, type1, /* G_SMULFIX */ type0, type0, type0, untyped_imm_0, /* G_UMULFIX */ type0, type0, type0, untyped_imm_0, /* G_SMULFIXSAT */ type0, type0, type0, untyped_imm_0, /* G_UMULFIXSAT */ type0, type0, type0, untyped_imm_0, /* G_SDIVFIX */ type0, type0, type0, untyped_imm_0, /* G_UDIVFIX */ type0, type0, type0, untyped_imm_0, /* G_SDIVFIXSAT */ type0, type0, type0, untyped_imm_0, /* G_UDIVFIXSAT */ type0, type0, type0, untyped_imm_0, /* G_FADD */ type0, type0, type0, /* G_FSUB */ type0, type0, type0, /* G_FMUL */ type0, type0, type0, /* G_FMA */ type0, type0, type0, type0, /* G_FMAD */ type0, type0, type0, type0, /* G_FDIV */ type0, type0, type0, /* G_FREM */ type0, type0, type0, /* G_FPOW */ type0, type0, type0, /* G_FPOWI */ type0, type0, type1, /* G_FEXP */ type0, type0, /* G_FEXP2 */ type0, type0, /* G_FLOG */ type0, type0, /* G_FLOG2 */ type0, type0, /* G_FLOG10 */ type0, type0, /* G_FNEG */ type0, type0, /* G_FPEXT */ type0, type1, /* G_FPTRUNC */ type0, type1, /* G_FPTOSI */ type0, type1, /* G_FPTOUI */ type0, type1, /* G_SITOFP */ type0, type1, /* G_UITOFP */ type0, type1, /* G_FABS */ type0, type0, /* G_FCOPYSIGN */ type0, type0, type1, /* G_IS_FPCLASS */ type0, type1, -1, /* G_FCANONICALIZE */ type0, type0, /* G_FMINNUM */ type0, type0, type0, /* G_FMAXNUM */ type0, type0, type0, /* G_FMINNUM_IEEE */ type0, type0, type0, /* G_FMAXNUM_IEEE */ type0, type0, type0, /* G_FMINIMUM */ type0, type0, type0, /* G_FMAXIMUM */ type0, type0, type0, /* G_PTR_ADD */ ptype0, ptype0, type1, /* G_PTRMASK */ ptype0, ptype0, type1, /* G_SMIN */ type0, type0, type0, /* G_SMAX */ type0, type0, type0, /* G_UMIN */ type0, type0, type0, /* G_UMAX */ type0, type0, type0, /* G_ABS */ type0, type0, /* G_LROUND */ type0, type1, /* G_LLROUND */ type0, type1, /* G_BR */ -1, /* G_BRJT */ ptype0, -1, type1, /* G_INSERT_VECTOR_ELT */ type0, type0, type1, type2, /* G_EXTRACT_VECTOR_ELT */ type0, type1, type2, /* G_SHUFFLE_VECTOR */ type0, type1, type1, -1, /* G_CTTZ */ type0, type1, /* G_CTTZ_ZERO_UNDEF */ type0, type1, /* G_CTLZ */ type0, type1, /* G_CTLZ_ZERO_UNDEF */ type0, type1, /* G_CTPOP */ type0, type1, /* G_BSWAP */ type0, type0, /* G_BITREVERSE */ type0, type0, /* G_FCEIL */ type0, type0, /* G_FCOS */ type0, type0, /* G_FSIN */ type0, type0, /* G_FSQRT */ type0, type0, /* G_FFLOOR */ type0, type0, /* G_FRINT */ type0, type0, /* G_FNEARBYINT */ type0, type0, /* G_ADDRSPACE_CAST */ type0, type1, /* G_BLOCK_ADDR */ type0, -1, /* G_JUMP_TABLE */ type0, -1, /* G_DYN_STACKALLOC */ ptype0, type1, i32imm, /* G_STRICT_FADD */ type0, type0, type0, /* G_STRICT_FSUB */ type0, type0, type0, /* G_STRICT_FMUL */ type0, type0, type0, /* G_STRICT_FDIV */ type0, type0, type0, /* G_STRICT_FREM */ type0, type0, type0, /* G_STRICT_FMA */ type0, type0, type0, type0, /* G_STRICT_FSQRT */ type0, type0, /* G_READ_REGISTER */ type0, -1, /* G_WRITE_REGISTER */ -1, type0, /* G_MEMCPY */ ptype0, ptype1, type2, untyped_imm_0, /* G_MEMCPY_INLINE */ ptype0, ptype1, type2, /* G_MEMMOVE */ ptype0, ptype1, type2, untyped_imm_0, /* G_MEMSET */ ptype0, type1, type2, untyped_imm_0, /* G_BZERO */ ptype0, type1, untyped_imm_0, /* G_VECREDUCE_SEQ_FADD */ type0, type1, type2, /* G_VECREDUCE_SEQ_FMUL */ type0, type1, type2, /* G_VECREDUCE_FADD */ type0, type1, /* G_VECREDUCE_FMUL */ type0, type1, /* G_VECREDUCE_FMAX */ type0, type1, /* G_VECREDUCE_FMIN */ type0, type1, /* G_VECREDUCE_ADD */ type0, type1, /* G_VECREDUCE_MUL */ type0, type1, /* G_VECREDUCE_AND */ type0, type1, /* G_VECREDUCE_OR */ type0, type1, /* G_VECREDUCE_XOR */ type0, type1, /* G_VECREDUCE_SMAX */ type0, type1, /* G_VECREDUCE_SMIN */ type0, type1, /* G_VECREDUCE_UMAX */ type0, type1, /* G_VECREDUCE_UMIN */ type0, type1, /* G_SBFX */ type0, type0, type1, type1, /* G_UBFX */ type0, type0, type1, type1, /* ADJCALLSTACKDOWN */ i32imm, i32imm, /* ADJCALLSTACKUP */ i32imm, i32imm, /* BuildPairF64Pseudo */ FPR64, GPR, GPR, /* HWASAN_CHECK_MEMACCESS_SHORTGRANULES */ GPRJALR, i32imm, /* PseudoAddTPRel */ GPR, GPR, GPR, tprel_add_symbol, /* PseudoAtomicLoadNand32 */ GPR, GPR, GPR, GPR, ixlenimm, /* PseudoAtomicLoadNand64 */ GPR, GPR, GPR, GPR, ixlenimm, /* PseudoBR */ simm21_lsb0_jal, /* PseudoBRIND */ GPRJALR, simm12, /* PseudoCALL */ call_symbol, /* PseudoCALLIndirect */ GPRJALR, /* PseudoCALLReg */ GPR, call_symbol, /* PseudoCCADD */ GPR, GPR, GPR, ixlenimm, GPR, GPR, GPR, /* PseudoCCADDW */ GPR, GPR, GPR, ixlenimm, GPR, GPR, GPR, /* PseudoCCAND */ GPR, GPR, GPR, ixlenimm, GPR, GPR, GPR, /* PseudoCCMOVGPR */ GPR, GPR, GPR, ixlenimm, GPR, GPR, /* PseudoCCOR */ GPR, GPR, GPR, ixlenimm, GPR, GPR, GPR, /* PseudoCCSUB */ GPR, GPR, GPR, ixlenimm, GPR, GPR, GPR, /* PseudoCCSUBW */ GPR, GPR, GPR, ixlenimm, GPR, GPR, GPR, /* PseudoCCXOR */ GPR, GPR, GPR, ixlenimm, GPR, GPR, GPR, /* PseudoCmpXchg32 */ GPR, GPR, GPR, GPR, GPR, ixlenimm, /* PseudoCmpXchg64 */ GPR, GPR, GPR, GPR, GPR, ixlenimm, /* PseudoFLD */ GPR, FPR64, bare_symbol, /* PseudoFLH */ GPR, FPR16, bare_symbol, /* PseudoFLW */ GPR, FPR32, bare_symbol, /* PseudoFROUND_D */ FPR64, FPR64, FPR64, ixlenimm, /* PseudoFROUND_H */ FPR16, FPR16, FPR16, ixlenimm, /* PseudoFROUND_S */ FPR32, FPR32, FPR32, ixlenimm, /* PseudoFSD */ GPR, FPR64, bare_symbol, /* PseudoFSH */ GPR, FPR16, bare_symbol, /* PseudoFSW */ GPR, FPR32, bare_symbol, /* PseudoJump */ GPR, pseudo_jump_symbol, /* PseudoLA */ GPR, bare_symbol, /* PseudoLA_TLS_GD */ GPR, bare_symbol, /* PseudoLA_TLS_IE */ GPR, bare_symbol, /* PseudoLB */ GPR, bare_symbol, /* PseudoLBU */ GPR, bare_symbol, /* PseudoLD */ GPR, bare_symbol, /* PseudoLH */ GPR, bare_symbol, /* PseudoLHU */ GPR, bare_symbol, /* PseudoLI */ GPR, ixlenimm_li, /* PseudoLLA */ GPR, bare_symbol, /* PseudoLW */ GPR, bare_symbol, /* PseudoLWU */ GPR, bare_symbol, /* PseudoMaskedAtomicLoadAdd32 */ GPR, GPR, GPR, GPR, GPR, ixlenimm, /* PseudoMaskedAtomicLoadMax32 */ GPR, GPR, GPR, GPR, GPR, GPR, ixlenimm, ixlenimm, /* PseudoMaskedAtomicLoadMin32 */ GPR, GPR, GPR, GPR, GPR, GPR, ixlenimm, ixlenimm, /* PseudoMaskedAtomicLoadNand32 */ GPR, GPR, GPR, GPR, GPR, ixlenimm, /* PseudoMaskedAtomicLoadSub32 */ GPR, GPR, GPR, GPR, GPR, ixlenimm, /* PseudoMaskedAtomicLoadUMax32 */ GPR, GPR, GPR, GPR, GPR, GPR, ixlenimm, /* PseudoMaskedAtomicLoadUMin32 */ GPR, GPR, GPR, GPR, GPR, GPR, ixlenimm, /* PseudoMaskedAtomicSwap32 */ GPR, GPR, GPR, GPR, GPR, ixlenimm, /* PseudoMaskedCmpXchg32 */ GPR, GPR, GPR, GPR, GPR, GPR, ixlenimm, /* PseudoQuietFLE_D */ GPR, FPR64, FPR64, /* PseudoQuietFLE_H */ GPR, FPR16, FPR16, /* PseudoQuietFLE_S */ GPR, FPR32, FPR32, /* PseudoQuietFLT_D */ GPR, FPR64, FPR64, /* PseudoQuietFLT_H */ GPR, FPR16, FPR16, /* PseudoQuietFLT_S */ GPR, FPR32, FPR32, /* PseudoRET */ /* PseudoReadVL */ GPR, /* PseudoReadVLENB */ GPR, /* PseudoSB */ GPR, GPR, bare_symbol, /* PseudoSD */ GPR, GPR, bare_symbol, /* PseudoSEXT_B */ GPR, GPR, /* PseudoSEXT_H */ GPR, GPR, /* PseudoSH */ GPR, GPR, bare_symbol, /* PseudoSW */ GPR, GPR, bare_symbol, /* PseudoTAIL */ call_symbol, /* PseudoTAILIndirect */ GPRTC, /* PseudoTHVdotVMAQASU_VV_M1 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQASU_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQASU_VV_M2 */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQASU_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQASU_VV_M4 */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQASU_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQASU_VV_M8 */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQASU_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQASU_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQASU_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQASU_VX_M1 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQASU_VX_M1_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQASU_VX_M2 */ VRM2, VRM2, GPR, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQASU_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, GPR, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQASU_VX_M4 */ VRM4, VRM4, GPR, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQASU_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, GPR, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQASU_VX_M8 */ VRM8, VRM8, GPR, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQASU_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, GPR, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQASU_VX_MF2 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQASU_VX_MF2_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAUS_VX_M1 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAUS_VX_M1_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAUS_VX_M2 */ VRM2, VRM2, GPR, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAUS_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, GPR, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAUS_VX_M4 */ VRM4, VRM4, GPR, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAUS_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, GPR, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAUS_VX_M8 */ VRM8, VRM8, GPR, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAUS_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, GPR, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAUS_VX_MF2 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAUS_VX_MF2_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VV_M1 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VV_M2 */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VV_M4 */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VV_M8 */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VX_M1 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VX_M1_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VX_M2 */ VRM2, VRM2, GPR, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, GPR, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VX_M4 */ VRM4, VRM4, GPR, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, GPR, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VX_M8 */ VRM8, VRM8, GPR, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, GPR, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VX_MF2 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQAU_VX_MF2_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VV_M1 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VV_M2 */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VV_M4 */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VV_M8 */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VX_M1 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VX_M1_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VX_M2 */ VRM2, VRM2, GPR, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, GPR, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VX_M4 */ VRM4, VRM4, GPR, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, GPR, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VX_M8 */ VRM8, VRM8, GPR, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, GPR, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VX_MF2 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoTHVdotVMAQA_VX_MF2_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADDU_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVAADDU_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADDU_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVAADDU_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVAADDU_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADDU_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVAADDU_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVAADDU_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADDU_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVAADDU_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVAADDU_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADDU_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVAADDU_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVAADDU_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADDU_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVAADDU_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVAADDU_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADDU_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVAADDU_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVAADDU_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADDU_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVAADDU_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVAADDU_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADDU_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVAADDU_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVAADDU_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADDU_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVAADDU_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVAADDU_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADDU_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVAADDU_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVAADDU_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADDU_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVAADDU_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVAADDU_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADDU_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVAADDU_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVAADDU_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADDU_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVAADDU_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVAADDU_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADDU_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVAADD_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVAADD_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADD_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVAADD_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVAADD_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADD_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVAADD_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVAADD_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADD_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVAADD_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVAADD_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADD_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVAADD_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVAADD_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADD_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVAADD_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVAADD_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADD_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVAADD_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVAADD_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADD_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVAADD_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVAADD_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADD_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVAADD_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVAADD_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADD_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVAADD_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVAADD_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADD_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVAADD_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVAADD_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADD_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVAADD_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVAADD_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADD_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVAADD_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVAADD_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADD_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVAADD_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVAADD_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAADD_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVADC_VIM_M1 */ VRNoV0, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVADC_VIM_M1_TU */ VRNoV0, VRNoV0, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVADC_VIM_M2 */ VRM2NoV0, VRM2, simm5, VMV0, AVL, ixlenimm, /* PseudoVADC_VIM_M2_TU */ VRM2NoV0, VRM2NoV0, VRM2, simm5, VMV0, AVL, ixlenimm, /* PseudoVADC_VIM_M4 */ VRM4NoV0, VRM4, simm5, VMV0, AVL, ixlenimm, /* PseudoVADC_VIM_M4_TU */ VRM4NoV0, VRM4NoV0, VRM4, simm5, VMV0, AVL, ixlenimm, /* PseudoVADC_VIM_M8 */ VRM8NoV0, VRM8, simm5, VMV0, AVL, ixlenimm, /* PseudoVADC_VIM_M8_TU */ VRM8NoV0, VRM8NoV0, VRM8, simm5, VMV0, AVL, ixlenimm, /* PseudoVADC_VIM_MF2 */ VRNoV0, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVADC_VIM_MF2_TU */ VRNoV0, VRNoV0, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVADC_VIM_MF4 */ VRNoV0, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVADC_VIM_MF4_TU */ VRNoV0, VRNoV0, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVADC_VIM_MF8 */ VRNoV0, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVADC_VIM_MF8_TU */ VRNoV0, VRNoV0, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVADC_VVM_M1 */ VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVADC_VVM_M1_TU */ VRNoV0, VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVADC_VVM_M2 */ VRM2NoV0, VRM2, VRM2, VMV0, AVL, ixlenimm, /* PseudoVADC_VVM_M2_TU */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMV0, AVL, ixlenimm, /* PseudoVADC_VVM_M4 */ VRM4NoV0, VRM4, VRM4, VMV0, AVL, ixlenimm, /* PseudoVADC_VVM_M4_TU */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMV0, AVL, ixlenimm, /* PseudoVADC_VVM_M8 */ VRM8NoV0, VRM8, VRM8, VMV0, AVL, ixlenimm, /* PseudoVADC_VVM_M8_TU */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMV0, AVL, ixlenimm, /* PseudoVADC_VVM_MF2 */ VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVADC_VVM_MF2_TU */ VRNoV0, VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVADC_VVM_MF4 */ VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVADC_VVM_MF4_TU */ VRNoV0, VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVADC_VVM_MF8 */ VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVADC_VVM_MF8_TU */ VRNoV0, VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVADC_VXM_M1 */ VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVADC_VXM_M1_TU */ VRNoV0, VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVADC_VXM_M2 */ VRM2NoV0, VRM2, GPR, VMV0, AVL, ixlenimm, /* PseudoVADC_VXM_M2_TU */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMV0, AVL, ixlenimm, /* PseudoVADC_VXM_M4 */ VRM4NoV0, VRM4, GPR, VMV0, AVL, ixlenimm, /* PseudoVADC_VXM_M4_TU */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMV0, AVL, ixlenimm, /* PseudoVADC_VXM_M8 */ VRM8NoV0, VRM8, GPR, VMV0, AVL, ixlenimm, /* PseudoVADC_VXM_M8_TU */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMV0, AVL, ixlenimm, /* PseudoVADC_VXM_MF2 */ VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVADC_VXM_MF2_TU */ VRNoV0, VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVADC_VXM_MF4 */ VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVADC_VXM_MF4_TU */ VRNoV0, VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVADC_VXM_MF8 */ VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVADC_VXM_MF8_TU */ VRNoV0, VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVADD_VI_M1 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVADD_VI_M1_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VI_M1_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVADD_VI_M2 */ VRM2, VRM2, simm5, AVL, ixlenimm, /* PseudoVADD_VI_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VI_M2_TU */ VRM2, VRM2, VRM2, simm5, AVL, ixlenimm, /* PseudoVADD_VI_M4 */ VRM4, VRM4, simm5, AVL, ixlenimm, /* PseudoVADD_VI_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VI_M4_TU */ VRM4, VRM4, VRM4, simm5, AVL, ixlenimm, /* PseudoVADD_VI_M8 */ VRM8, VRM8, simm5, AVL, ixlenimm, /* PseudoVADD_VI_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VI_M8_TU */ VRM8, VRM8, VRM8, simm5, AVL, ixlenimm, /* PseudoVADD_VI_MF2 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVADD_VI_MF2_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VI_MF2_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVADD_VI_MF4 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVADD_VI_MF4_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VI_MF4_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVADD_VI_MF8 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVADD_VI_MF8_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VI_MF8_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVADD_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVADD_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVADD_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVADD_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVADD_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVADD_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVADD_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVADD_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVADD_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVADD_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVADD_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVADD_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVADD_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVADD_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVADD_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVADD_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVADD_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVADD_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVADD_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVADD_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVADD_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVADD_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVADD_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVADD_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVADD_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVADD_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVADD_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVADD_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVADD_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVAND_VI_M1 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVAND_VI_M1_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VI_M1_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVAND_VI_M2 */ VRM2, VRM2, simm5, AVL, ixlenimm, /* PseudoVAND_VI_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VI_M2_TU */ VRM2, VRM2, VRM2, simm5, AVL, ixlenimm, /* PseudoVAND_VI_M4 */ VRM4, VRM4, simm5, AVL, ixlenimm, /* PseudoVAND_VI_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VI_M4_TU */ VRM4, VRM4, VRM4, simm5, AVL, ixlenimm, /* PseudoVAND_VI_M8 */ VRM8, VRM8, simm5, AVL, ixlenimm, /* PseudoVAND_VI_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VI_M8_TU */ VRM8, VRM8, VRM8, simm5, AVL, ixlenimm, /* PseudoVAND_VI_MF2 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVAND_VI_MF2_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VI_MF2_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVAND_VI_MF4 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVAND_VI_MF4_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VI_MF4_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVAND_VI_MF8 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVAND_VI_MF8_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VI_MF8_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVAND_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVAND_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVAND_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVAND_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVAND_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVAND_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVAND_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVAND_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVAND_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVAND_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVAND_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVAND_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVAND_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVAND_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVAND_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVAND_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVAND_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVAND_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVAND_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVAND_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVAND_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVAND_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVAND_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVAND_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVAND_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVAND_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVAND_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVAND_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVAND_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVASUBU_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVASUBU_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUBU_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVASUBU_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVASUBU_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUBU_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVASUBU_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVASUBU_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUBU_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVASUBU_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVASUBU_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUBU_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVASUBU_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVASUBU_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUBU_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVASUBU_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVASUBU_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUBU_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVASUBU_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVASUBU_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUBU_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVASUBU_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVASUBU_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUBU_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVASUBU_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVASUBU_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUBU_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVASUBU_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVASUBU_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUBU_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVASUBU_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVASUBU_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUBU_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVASUBU_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVASUBU_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUBU_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVASUBU_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVASUBU_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUBU_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVASUBU_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVASUBU_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUBU_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVASUB_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVASUB_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUB_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVASUB_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVASUB_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUB_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVASUB_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVASUB_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUB_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVASUB_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVASUB_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUB_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVASUB_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVASUB_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUB_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVASUB_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVASUB_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUB_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVASUB_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVASUB_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUB_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVASUB_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVASUB_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUB_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVASUB_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVASUB_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUB_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVASUB_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVASUB_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUB_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVASUB_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVASUB_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUB_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVASUB_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVASUB_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUB_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVASUB_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVASUB_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUB_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVASUB_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVASUB_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVASUB_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVCOMPRESS_VM_M1 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVCOMPRESS_VM_M2 */ VRM2, VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVCOMPRESS_VM_M4 */ VRM4, VRM4, VRM4, VR, AVL, ixlenimm, /* PseudoVCOMPRESS_VM_M8 */ VRM8, VRM8, VRM8, VR, AVL, ixlenimm, /* PseudoVCOMPRESS_VM_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVCOMPRESS_VM_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVCOMPRESS_VM_MF8 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVCPOP_M_B1 */ GPR, VR, AVL, ixlenimm, /* PseudoVCPOP_M_B16 */ GPR, VR, AVL, ixlenimm, /* PseudoVCPOP_M_B16_MASK */ GPR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVCPOP_M_B1_MASK */ GPR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVCPOP_M_B2 */ GPR, VR, AVL, ixlenimm, /* PseudoVCPOP_M_B2_MASK */ GPR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVCPOP_M_B32 */ GPR, VR, AVL, ixlenimm, /* PseudoVCPOP_M_B32_MASK */ GPR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVCPOP_M_B4 */ GPR, VR, AVL, ixlenimm, /* PseudoVCPOP_M_B4_MASK */ GPR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVCPOP_M_B64 */ GPR, VR, AVL, ixlenimm, /* PseudoVCPOP_M_B64_MASK */ GPR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVCPOP_M_B8 */ GPR, VR, AVL, ixlenimm, /* PseudoVCPOP_M_B8_MASK */ GPR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVDIVU_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVDIVU_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIVU_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVDIVU_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVDIVU_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIVU_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVDIVU_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVDIVU_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIVU_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVDIVU_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVDIVU_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIVU_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVDIVU_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVDIVU_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIVU_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVDIVU_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVDIVU_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIVU_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVDIVU_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVDIVU_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIVU_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVDIVU_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVDIVU_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIVU_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVDIVU_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVDIVU_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIVU_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVDIVU_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVDIVU_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIVU_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVDIVU_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVDIVU_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIVU_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVDIVU_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVDIVU_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIVU_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVDIVU_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVDIVU_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIVU_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVDIVU_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVDIVU_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIVU_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVDIV_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVDIV_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIV_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVDIV_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVDIV_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIV_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVDIV_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVDIV_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIV_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVDIV_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVDIV_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIV_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVDIV_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVDIV_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIV_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVDIV_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVDIV_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIV_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVDIV_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVDIV_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIV_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVDIV_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVDIV_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIV_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVDIV_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVDIV_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIV_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVDIV_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVDIV_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIV_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVDIV_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVDIV_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIV_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVDIV_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVDIV_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIV_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVDIV_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVDIV_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIV_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVDIV_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVDIV_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVDIV_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVFADD_VF16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFADD_VF16_M1_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VF16_M1_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFADD_VF16_M2 */ VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFADD_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VF16_M2_TU */ VRM2, VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFADD_VF16_M4 */ VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFADD_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VF16_M4_TU */ VRM4, VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFADD_VF16_M8 */ VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFADD_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VF16_M8_TU */ VRM8, VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFADD_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFADD_VF16_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VF16_MF2_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFADD_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFADD_VF16_MF4_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VF16_MF4_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFADD_VF32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFADD_VF32_M1_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VF32_M1_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFADD_VF32_M2 */ VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFADD_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VF32_M2_TU */ VRM2, VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFADD_VF32_M4 */ VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFADD_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VF32_M4_TU */ VRM4, VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFADD_VF32_M8 */ VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFADD_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VF32_M8_TU */ VRM8, VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFADD_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFADD_VF32_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VF32_MF2_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFADD_VF64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFADD_VF64_M1_MASK */ VRNoV0, VRNoV0, VR, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VF64_M1_TU */ VR, VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFADD_VF64_M2 */ VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFADD_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VF64_M2_TU */ VRM2, VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFADD_VF64_M4 */ VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFADD_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VF64_M4_TU */ VRM4, VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFADD_VF64_M8 */ VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFADD_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VF64_M8_TU */ VRM8, VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFADD_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFADD_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFADD_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFADD_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFADD_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFADD_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFADD_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFADD_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFADD_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFADD_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFADD_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFADD_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFADD_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFCLASS_V_M1 */ VR, VR, AVL, ixlenimm, /* PseudoVFCLASS_V_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCLASS_V_M1_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCLASS_V_M2 */ VRM2, VRM2, AVL, ixlenimm, /* PseudoVFCLASS_V_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCLASS_V_M2_TU */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFCLASS_V_M4 */ VRM4, VRM4, AVL, ixlenimm, /* PseudoVFCLASS_V_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCLASS_V_M4_TU */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFCLASS_V_M8 */ VRM8, VRM8, AVL, ixlenimm, /* PseudoVFCLASS_V_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCLASS_V_M8_TU */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFCLASS_V_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFCLASS_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCLASS_V_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCLASS_V_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFCLASS_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCLASS_V_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCVT_F_XU_V_M1 */ VR, VR, AVL, ixlenimm, /* PseudoVFCVT_F_XU_V_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_F_XU_V_M1_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCVT_F_XU_V_M2 */ VRM2, VRM2, AVL, ixlenimm, /* PseudoVFCVT_F_XU_V_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_F_XU_V_M2_TU */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFCVT_F_XU_V_M4 */ VRM4, VRM4, AVL, ixlenimm, /* PseudoVFCVT_F_XU_V_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_F_XU_V_M4_TU */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFCVT_F_XU_V_M8 */ VRM8, VRM8, AVL, ixlenimm, /* PseudoVFCVT_F_XU_V_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_F_XU_V_M8_TU */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFCVT_F_XU_V_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFCVT_F_XU_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_F_XU_V_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCVT_F_XU_V_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFCVT_F_XU_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_F_XU_V_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCVT_F_X_V_M1 */ VR, VR, AVL, ixlenimm, /* PseudoVFCVT_F_X_V_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_F_X_V_M1_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCVT_F_X_V_M2 */ VRM2, VRM2, AVL, ixlenimm, /* PseudoVFCVT_F_X_V_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_F_X_V_M2_TU */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFCVT_F_X_V_M4 */ VRM4, VRM4, AVL, ixlenimm, /* PseudoVFCVT_F_X_V_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_F_X_V_M4_TU */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFCVT_F_X_V_M8 */ VRM8, VRM8, AVL, ixlenimm, /* PseudoVFCVT_F_X_V_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_F_X_V_M8_TU */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFCVT_F_X_V_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFCVT_F_X_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_F_X_V_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCVT_F_X_V_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFCVT_F_X_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_F_X_V_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCVT_RM_F_XU_V_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_F_XU_V_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_F_XU_V_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_F_XU_V_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_F_XU_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_F_XU_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_F_X_V_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_F_X_V_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_F_X_V_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_F_X_V_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_F_X_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_F_X_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_XU_F_V_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_XU_F_V_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_XU_F_V_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_XU_F_V_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_XU_F_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_XU_F_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_X_F_V_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_X_F_V_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_X_F_V_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_X_F_V_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_X_F_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RM_X_F_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RTZ_XU_F_V_M1 */ VR, VR, AVL, ixlenimm, /* PseudoVFCVT_RTZ_XU_F_V_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RTZ_XU_F_V_M1_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCVT_RTZ_XU_F_V_M2 */ VRM2, VRM2, AVL, ixlenimm, /* PseudoVFCVT_RTZ_XU_F_V_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RTZ_XU_F_V_M2_TU */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFCVT_RTZ_XU_F_V_M4 */ VRM4, VRM4, AVL, ixlenimm, /* PseudoVFCVT_RTZ_XU_F_V_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RTZ_XU_F_V_M4_TU */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFCVT_RTZ_XU_F_V_M8 */ VRM8, VRM8, AVL, ixlenimm, /* PseudoVFCVT_RTZ_XU_F_V_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RTZ_XU_F_V_M8_TU */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFCVT_RTZ_XU_F_V_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFCVT_RTZ_XU_F_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RTZ_XU_F_V_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCVT_RTZ_XU_F_V_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFCVT_RTZ_XU_F_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RTZ_XU_F_V_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCVT_RTZ_X_F_V_M1 */ VR, VR, AVL, ixlenimm, /* PseudoVFCVT_RTZ_X_F_V_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RTZ_X_F_V_M1_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCVT_RTZ_X_F_V_M2 */ VRM2, VRM2, AVL, ixlenimm, /* PseudoVFCVT_RTZ_X_F_V_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RTZ_X_F_V_M2_TU */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFCVT_RTZ_X_F_V_M4 */ VRM4, VRM4, AVL, ixlenimm, /* PseudoVFCVT_RTZ_X_F_V_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RTZ_X_F_V_M4_TU */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFCVT_RTZ_X_F_V_M8 */ VRM8, VRM8, AVL, ixlenimm, /* PseudoVFCVT_RTZ_X_F_V_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RTZ_X_F_V_M8_TU */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFCVT_RTZ_X_F_V_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFCVT_RTZ_X_F_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RTZ_X_F_V_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCVT_RTZ_X_F_V_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFCVT_RTZ_X_F_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_RTZ_X_F_V_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCVT_XU_F_V_M1 */ VR, VR, AVL, ixlenimm, /* PseudoVFCVT_XU_F_V_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_XU_F_V_M1_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCVT_XU_F_V_M2 */ VRM2, VRM2, AVL, ixlenimm, /* PseudoVFCVT_XU_F_V_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_XU_F_V_M2_TU */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFCVT_XU_F_V_M4 */ VRM4, VRM4, AVL, ixlenimm, /* PseudoVFCVT_XU_F_V_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_XU_F_V_M4_TU */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFCVT_XU_F_V_M8 */ VRM8, VRM8, AVL, ixlenimm, /* PseudoVFCVT_XU_F_V_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_XU_F_V_M8_TU */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFCVT_XU_F_V_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFCVT_XU_F_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_XU_F_V_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCVT_XU_F_V_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFCVT_XU_F_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_XU_F_V_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCVT_X_F_V_M1 */ VR, VR, AVL, ixlenimm, /* PseudoVFCVT_X_F_V_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_X_F_V_M1_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCVT_X_F_V_M2 */ VRM2, VRM2, AVL, ixlenimm, /* PseudoVFCVT_X_F_V_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_X_F_V_M2_TU */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFCVT_X_F_V_M4 */ VRM4, VRM4, AVL, ixlenimm, /* PseudoVFCVT_X_F_V_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_X_F_V_M4_TU */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFCVT_X_F_V_M8 */ VRM8, VRM8, AVL, ixlenimm, /* PseudoVFCVT_X_F_V_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_X_F_V_M8_TU */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFCVT_X_F_V_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFCVT_X_F_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_X_F_V_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFCVT_X_F_V_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFCVT_X_F_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFCVT_X_F_V_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFDIV_VF16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFDIV_VF16_M1_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VF16_M1_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFDIV_VF16_M2 */ VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFDIV_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VF16_M2_TU */ VRM2, VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFDIV_VF16_M4 */ VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFDIV_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VF16_M4_TU */ VRM4, VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFDIV_VF16_M8 */ VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFDIV_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VF16_M8_TU */ VRM8, VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFDIV_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFDIV_VF16_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VF16_MF2_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFDIV_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFDIV_VF16_MF4_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VF16_MF4_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFDIV_VF32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFDIV_VF32_M1_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VF32_M1_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFDIV_VF32_M2 */ VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFDIV_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VF32_M2_TU */ VRM2, VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFDIV_VF32_M4 */ VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFDIV_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VF32_M4_TU */ VRM4, VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFDIV_VF32_M8 */ VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFDIV_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VF32_M8_TU */ VRM8, VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFDIV_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFDIV_VF32_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VF32_MF2_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFDIV_VF64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFDIV_VF64_M1_MASK */ VRNoV0, VRNoV0, VR, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VF64_M1_TU */ VR, VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFDIV_VF64_M2 */ VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFDIV_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VF64_M2_TU */ VRM2, VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFDIV_VF64_M4 */ VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFDIV_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VF64_M4_TU */ VRM4, VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFDIV_VF64_M8 */ VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFDIV_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VF64_M8_TU */ VRM8, VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFDIV_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFDIV_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFDIV_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFDIV_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFDIV_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFDIV_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFDIV_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFDIV_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFDIV_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFDIV_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFDIV_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFDIV_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFDIV_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFIRST_M_B1 */ GPR, VR, AVL, ixlenimm, /* PseudoVFIRST_M_B16 */ GPR, VR, AVL, ixlenimm, /* PseudoVFIRST_M_B16_MASK */ GPR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFIRST_M_B1_MASK */ GPR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFIRST_M_B2 */ GPR, VR, AVL, ixlenimm, /* PseudoVFIRST_M_B2_MASK */ GPR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFIRST_M_B32 */ GPR, VR, AVL, ixlenimm, /* PseudoVFIRST_M_B32_MASK */ GPR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFIRST_M_B4 */ GPR, VR, AVL, ixlenimm, /* PseudoVFIRST_M_B4_MASK */ GPR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFIRST_M_B64 */ GPR, VR, AVL, ixlenimm, /* PseudoVFIRST_M_B64_MASK */ GPR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFIRST_M_B8 */ GPR, VR, AVL, ixlenimm, /* PseudoVFIRST_M_B8_MASK */ GPR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFMACC_VF16_M1 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF16_M1_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF16_M2 */ VRM2, VRM2, FPR16, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR16, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF16_M4 */ VRM4, VRM4, FPR16, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR16, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF16_M8 */ VRM8, VRM8, FPR16, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR16, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF16_MF2 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF16_MF2_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF16_MF4 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF16_MF4_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF32_M1 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF32_M1_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF32_M2 */ VRM2, VRM2, FPR32, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR32, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF32_M4 */ VRM4, VRM4, FPR32, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR32, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF32_M8 */ VRM8, VRM8, FPR32, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR32, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF32_MF2 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF32_MF2_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF64_M1 */ VR, VR, FPR64, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF64_M1_MASK */ VRNoV0, VRNoV0, FPR64, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF64_M2 */ VRM2, VRM2, FPR64, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR64, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF64_M4 */ VRM4, VRM4, FPR64, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR64, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF64_M8 */ VRM8, VRM8, FPR64, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR64, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VV_M1 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VV_M2 */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VV_M4 */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VV_M8 */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VV_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMACC_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF16_M1 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF16_M1_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF16_M2 */ VRM2, VRM2, FPR16, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR16, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF16_M4 */ VRM4, VRM4, FPR16, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR16, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF16_M8 */ VRM8, VRM8, FPR16, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR16, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF16_MF2 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF16_MF2_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF16_MF4 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF16_MF4_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF32_M1 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF32_M1_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF32_M2 */ VRM2, VRM2, FPR32, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR32, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF32_M4 */ VRM4, VRM4, FPR32, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR32, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF32_M8 */ VRM8, VRM8, FPR32, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR32, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF32_MF2 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF32_MF2_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF64_M1 */ VR, VR, FPR64, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF64_M1_MASK */ VRNoV0, VRNoV0, FPR64, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF64_M2 */ VRM2, VRM2, FPR64, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR64, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF64_M4 */ VRM4, VRM4, FPR64, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR64, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF64_M8 */ VRM8, VRM8, FPR64, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR64, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VV_M1 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VV_M2 */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VV_M4 */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VV_M8 */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VV_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMADD_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VF16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMAX_VF16_M1_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VF16_M1_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMAX_VF16_M2 */ VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFMAX_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VF16_M2_TU */ VRM2, VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFMAX_VF16_M4 */ VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFMAX_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VF16_M4_TU */ VRM4, VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFMAX_VF16_M8 */ VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFMAX_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VF16_M8_TU */ VRM8, VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFMAX_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMAX_VF16_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VF16_MF2_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMAX_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMAX_VF16_MF4_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VF16_MF4_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMAX_VF32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFMAX_VF32_M1_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VF32_M1_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFMAX_VF32_M2 */ VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFMAX_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VF32_M2_TU */ VRM2, VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFMAX_VF32_M4 */ VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFMAX_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VF32_M4_TU */ VRM4, VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFMAX_VF32_M8 */ VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFMAX_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VF32_M8_TU */ VRM8, VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFMAX_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFMAX_VF32_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VF32_MF2_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFMAX_VF64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFMAX_VF64_M1_MASK */ VRNoV0, VRNoV0, VR, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VF64_M1_TU */ VR, VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFMAX_VF64_M2 */ VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFMAX_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VF64_M2_TU */ VRM2, VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFMAX_VF64_M4 */ VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFMAX_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VF64_M4_TU */ VRM4, VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFMAX_VF64_M8 */ VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFMAX_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VF64_M8_TU */ VRM8, VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFMAX_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFMAX_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFMAX_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFMAX_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFMAX_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFMAX_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFMAX_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFMAX_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFMAX_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFMAX_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFMAX_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFMAX_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMAX_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFMERGE_VF16M_M1 */ VRNoV0, VR, FPR16, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF16M_M1_TU */ VRNoV0, VRNoV0, VR, FPR16, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF16M_M2 */ VRM2NoV0, VRM2, FPR16, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF16M_M2_TU */ VRM2NoV0, VRM2NoV0, VRM2, FPR16, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF16M_M4 */ VRM4NoV0, VRM4, FPR16, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF16M_M4_TU */ VRM4NoV0, VRM4NoV0, VRM4, FPR16, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF16M_M8 */ VRM8NoV0, VRM8, FPR16, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF16M_M8_TU */ VRM8NoV0, VRM8NoV0, VRM8, FPR16, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF16M_MF2 */ VRNoV0, VR, FPR16, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF16M_MF2_TU */ VRNoV0, VRNoV0, VR, FPR16, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF16M_MF4 */ VRNoV0, VR, FPR16, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF16M_MF4_TU */ VRNoV0, VRNoV0, VR, FPR16, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF32M_M1 */ VRNoV0, VR, FPR32, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF32M_M1_TU */ VRNoV0, VRNoV0, VR, FPR32, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF32M_M2 */ VRM2NoV0, VRM2, FPR32, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF32M_M2_TU */ VRM2NoV0, VRM2NoV0, VRM2, FPR32, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF32M_M4 */ VRM4NoV0, VRM4, FPR32, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF32M_M4_TU */ VRM4NoV0, VRM4NoV0, VRM4, FPR32, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF32M_M8 */ VRM8NoV0, VRM8, FPR32, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF32M_M8_TU */ VRM8NoV0, VRM8NoV0, VRM8, FPR32, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF32M_MF2 */ VRNoV0, VR, FPR32, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF32M_MF2_TU */ VRNoV0, VRNoV0, VR, FPR32, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF64M_M1 */ VRNoV0, VR, FPR64, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF64M_M1_TU */ VRNoV0, VRNoV0, VR, FPR64, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF64M_M2 */ VRM2NoV0, VRM2, FPR64, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF64M_M2_TU */ VRM2NoV0, VRM2NoV0, VRM2, FPR64, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF64M_M4 */ VRM4NoV0, VRM4, FPR64, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF64M_M4_TU */ VRM4NoV0, VRM4NoV0, VRM4, FPR64, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF64M_M8 */ VRM8NoV0, VRM8, FPR64, VMV0, AVL, ixlenimm, /* PseudoVFMERGE_VF64M_M8_TU */ VRM8NoV0, VRM8NoV0, VRM8, FPR64, VMV0, AVL, ixlenimm, /* PseudoVFMIN_VF16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMIN_VF16_M1_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VF16_M1_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMIN_VF16_M2 */ VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFMIN_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VF16_M2_TU */ VRM2, VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFMIN_VF16_M4 */ VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFMIN_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VF16_M4_TU */ VRM4, VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFMIN_VF16_M8 */ VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFMIN_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VF16_M8_TU */ VRM8, VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFMIN_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMIN_VF16_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VF16_MF2_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMIN_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMIN_VF16_MF4_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VF16_MF4_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMIN_VF32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFMIN_VF32_M1_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VF32_M1_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFMIN_VF32_M2 */ VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFMIN_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VF32_M2_TU */ VRM2, VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFMIN_VF32_M4 */ VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFMIN_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VF32_M4_TU */ VRM4, VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFMIN_VF32_M8 */ VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFMIN_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VF32_M8_TU */ VRM8, VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFMIN_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFMIN_VF32_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VF32_MF2_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFMIN_VF64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFMIN_VF64_M1_MASK */ VRNoV0, VRNoV0, VR, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VF64_M1_TU */ VR, VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFMIN_VF64_M2 */ VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFMIN_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VF64_M2_TU */ VRM2, VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFMIN_VF64_M4 */ VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFMIN_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VF64_M4_TU */ VRM4, VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFMIN_VF64_M8 */ VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFMIN_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VF64_M8_TU */ VRM8, VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFMIN_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFMIN_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFMIN_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFMIN_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFMIN_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFMIN_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFMIN_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFMIN_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFMIN_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFMIN_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFMIN_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFMIN_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMIN_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFMSAC_VF16_M1 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF16_M1_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF16_M2 */ VRM2, VRM2, FPR16, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR16, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF16_M4 */ VRM4, VRM4, FPR16, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR16, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF16_M8 */ VRM8, VRM8, FPR16, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR16, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF16_MF2 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF16_MF2_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF16_MF4 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF16_MF4_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF32_M1 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF32_M1_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF32_M2 */ VRM2, VRM2, FPR32, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR32, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF32_M4 */ VRM4, VRM4, FPR32, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR32, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF32_M8 */ VRM8, VRM8, FPR32, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR32, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF32_MF2 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF32_MF2_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF64_M1 */ VR, VR, FPR64, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF64_M1_MASK */ VRNoV0, VRNoV0, FPR64, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF64_M2 */ VRM2, VRM2, FPR64, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR64, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF64_M4 */ VRM4, VRM4, FPR64, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR64, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF64_M8 */ VRM8, VRM8, FPR64, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR64, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VV_M1 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VV_M2 */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VV_M4 */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VV_M8 */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VV_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMSAC_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF16_M1 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF16_M1_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF16_M2 */ VRM2, VRM2, FPR16, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR16, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF16_M4 */ VRM4, VRM4, FPR16, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR16, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF16_M8 */ VRM8, VRM8, FPR16, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR16, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF16_MF2 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF16_MF2_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF16_MF4 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF16_MF4_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF32_M1 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF32_M1_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF32_M2 */ VRM2, VRM2, FPR32, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR32, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF32_M4 */ VRM4, VRM4, FPR32, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR32, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF32_M8 */ VRM8, VRM8, FPR32, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR32, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF32_MF2 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF32_MF2_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF64_M1 */ VR, VR, FPR64, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF64_M1_MASK */ VRNoV0, VRNoV0, FPR64, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF64_M2 */ VRM2, VRM2, FPR64, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR64, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF64_M4 */ VRM4, VRM4, FPR64, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR64, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF64_M8 */ VRM8, VRM8, FPR64, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR64, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VV_M1 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VV_M2 */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VV_M4 */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VV_M8 */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VV_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFMSUB_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VF16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMUL_VF16_M1_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VF16_M1_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMUL_VF16_M2 */ VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFMUL_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VF16_M2_TU */ VRM2, VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFMUL_VF16_M4 */ VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFMUL_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VF16_M4_TU */ VRM4, VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFMUL_VF16_M8 */ VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFMUL_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VF16_M8_TU */ VRM8, VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFMUL_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMUL_VF16_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VF16_MF2_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMUL_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMUL_VF16_MF4_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VF16_MF4_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMUL_VF32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFMUL_VF32_M1_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VF32_M1_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFMUL_VF32_M2 */ VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFMUL_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VF32_M2_TU */ VRM2, VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFMUL_VF32_M4 */ VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFMUL_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VF32_M4_TU */ VRM4, VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFMUL_VF32_M8 */ VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFMUL_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VF32_M8_TU */ VRM8, VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFMUL_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFMUL_VF32_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VF32_MF2_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFMUL_VF64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFMUL_VF64_M1_MASK */ VRNoV0, VRNoV0, VR, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VF64_M1_TU */ VR, VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFMUL_VF64_M2 */ VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFMUL_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VF64_M2_TU */ VRM2, VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFMUL_VF64_M4 */ VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFMUL_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VF64_M4_TU */ VRM4, VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFMUL_VF64_M8 */ VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFMUL_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VF64_M8_TU */ VRM8, VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFMUL_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFMUL_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFMUL_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFMUL_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFMUL_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFMUL_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFMUL_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFMUL_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFMUL_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFMUL_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFMUL_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFMUL_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFMUL_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFMV_F16_S_M1 */ FPR16, VR, ixlenimm, /* PseudoVFMV_F16_S_M2 */ FPR16, VRM2, ixlenimm, /* PseudoVFMV_F16_S_M4 */ FPR16, VRM4, ixlenimm, /* PseudoVFMV_F16_S_M8 */ FPR16, VRM8, ixlenimm, /* PseudoVFMV_F16_S_MF2 */ FPR16, VR, ixlenimm, /* PseudoVFMV_F16_S_MF4 */ FPR16, VR, ixlenimm, /* PseudoVFMV_F32_S_M1 */ FPR32, VR, ixlenimm, /* PseudoVFMV_F32_S_M2 */ FPR32, VRM2, ixlenimm, /* PseudoVFMV_F32_S_M4 */ FPR32, VRM4, ixlenimm, /* PseudoVFMV_F32_S_M8 */ FPR32, VRM8, ixlenimm, /* PseudoVFMV_F32_S_MF2 */ FPR32, VR, ixlenimm, /* PseudoVFMV_F64_S_M1 */ FPR64, VR, ixlenimm, /* PseudoVFMV_F64_S_M2 */ FPR64, VRM2, ixlenimm, /* PseudoVFMV_F64_S_M4 */ FPR64, VRM4, ixlenimm, /* PseudoVFMV_F64_S_M8 */ FPR64, VRM8, ixlenimm, /* PseudoVFMV_S_F16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMV_S_F16_M2 */ VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFMV_S_F16_M4 */ VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFMV_S_F16_M8 */ VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFMV_S_F16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMV_S_F16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMV_S_F32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFMV_S_F32_M2 */ VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFMV_S_F32_M4 */ VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFMV_S_F32_M8 */ VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFMV_S_F32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFMV_S_F64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFMV_S_F64_M2 */ VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFMV_S_F64_M4 */ VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFMV_S_F64_M8 */ VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFMV_V_F16_M1 */ VR, FPR16, AVL, ixlenimm, /* PseudoVFMV_V_F16_M1_TU */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMV_V_F16_M2 */ VRM2, FPR16, AVL, ixlenimm, /* PseudoVFMV_V_F16_M2_TU */ VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFMV_V_F16_M4 */ VRM4, FPR16, AVL, ixlenimm, /* PseudoVFMV_V_F16_M4_TU */ VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFMV_V_F16_M8 */ VRM8, FPR16, AVL, ixlenimm, /* PseudoVFMV_V_F16_M8_TU */ VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFMV_V_F16_MF2 */ VR, FPR16, AVL, ixlenimm, /* PseudoVFMV_V_F16_MF2_TU */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMV_V_F16_MF4 */ VR, FPR16, AVL, ixlenimm, /* PseudoVFMV_V_F16_MF4_TU */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFMV_V_F32_M1 */ VR, FPR32, AVL, ixlenimm, /* PseudoVFMV_V_F32_M1_TU */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFMV_V_F32_M2 */ VRM2, FPR32, AVL, ixlenimm, /* PseudoVFMV_V_F32_M2_TU */ VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFMV_V_F32_M4 */ VRM4, FPR32, AVL, ixlenimm, /* PseudoVFMV_V_F32_M4_TU */ VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFMV_V_F32_M8 */ VRM8, FPR32, AVL, ixlenimm, /* PseudoVFMV_V_F32_M8_TU */ VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFMV_V_F32_MF2 */ VR, FPR32, AVL, ixlenimm, /* PseudoVFMV_V_F32_MF2_TU */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFMV_V_F64_M1 */ VR, FPR64, AVL, ixlenimm, /* PseudoVFMV_V_F64_M1_TU */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFMV_V_F64_M2 */ VRM2, FPR64, AVL, ixlenimm, /* PseudoVFMV_V_F64_M2_TU */ VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFMV_V_F64_M4 */ VRM4, FPR64, AVL, ixlenimm, /* PseudoVFMV_V_F64_M4_TU */ VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFMV_V_F64_M8 */ VRM8, FPR64, AVL, ixlenimm, /* PseudoVFMV_V_F64_M8_TU */ VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFNCVT_F_F_W_M1 */ VR, VRM2, AVL, ixlenimm, /* PseudoVFNCVT_F_F_W_M1_MASK */ VRNoV0, VRNoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_F_F_W_M1_TU */ VR, VR, VRM2, AVL, ixlenimm, /* PseudoVFNCVT_F_F_W_M2 */ VRM2, VRM4, AVL, ixlenimm, /* PseudoVFNCVT_F_F_W_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_F_F_W_M2_TU */ VRM2, VRM2, VRM4, AVL, ixlenimm, /* PseudoVFNCVT_F_F_W_M4 */ VRM4, VRM8, AVL, ixlenimm, /* PseudoVFNCVT_F_F_W_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_F_F_W_M4_TU */ VRM4, VRM4, VRM8, AVL, ixlenimm, /* PseudoVFNCVT_F_F_W_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_F_F_W_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_F_F_W_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_F_F_W_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_F_F_W_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_F_F_W_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_F_XU_W_M1 */ VR, VRM2, AVL, ixlenimm, /* PseudoVFNCVT_F_XU_W_M1_MASK */ VRNoV0, VRNoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_F_XU_W_M1_TU */ VR, VR, VRM2, AVL, ixlenimm, /* PseudoVFNCVT_F_XU_W_M2 */ VRM2, VRM4, AVL, ixlenimm, /* PseudoVFNCVT_F_XU_W_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_F_XU_W_M2_TU */ VRM2, VRM2, VRM4, AVL, ixlenimm, /* PseudoVFNCVT_F_XU_W_M4 */ VRM4, VRM8, AVL, ixlenimm, /* PseudoVFNCVT_F_XU_W_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_F_XU_W_M4_TU */ VRM4, VRM4, VRM8, AVL, ixlenimm, /* PseudoVFNCVT_F_XU_W_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_F_XU_W_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_F_XU_W_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_F_XU_W_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_F_XU_W_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_F_XU_W_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_F_X_W_M1 */ VR, VRM2, AVL, ixlenimm, /* PseudoVFNCVT_F_X_W_M1_MASK */ VRNoV0, VRNoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_F_X_W_M1_TU */ VR, VR, VRM2, AVL, ixlenimm, /* PseudoVFNCVT_F_X_W_M2 */ VRM2, VRM4, AVL, ixlenimm, /* PseudoVFNCVT_F_X_W_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_F_X_W_M2_TU */ VRM2, VRM2, VRM4, AVL, ixlenimm, /* PseudoVFNCVT_F_X_W_M4 */ VRM4, VRM8, AVL, ixlenimm, /* PseudoVFNCVT_F_X_W_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_F_X_W_M4_TU */ VRM4, VRM4, VRM8, AVL, ixlenimm, /* PseudoVFNCVT_F_X_W_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_F_X_W_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_F_X_W_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_F_X_W_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_F_X_W_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_F_X_W_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_RM_F_XU_W_M1_MASK */ VRNoV0, VRNoV0, VRM2, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_F_XU_W_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_F_XU_W_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_F_XU_W_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_F_XU_W_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_F_X_W_M1_MASK */ VRNoV0, VRNoV0, VRM2, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_F_X_W_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_F_X_W_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_F_X_W_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_F_X_W_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_XU_F_W_M1_MASK */ VRNoV0, VRNoV0, VRM2, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_XU_F_W_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_XU_F_W_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_XU_F_W_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_XU_F_W_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_XU_F_W_MF8_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_X_F_W_M1_MASK */ VRNoV0, VRNoV0, VRM2, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_X_F_W_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_X_F_W_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_X_F_W_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_X_F_W_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RM_X_F_W_MF8_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_ROD_F_F_W_M1 */ VR, VRM2, AVL, ixlenimm, /* PseudoVFNCVT_ROD_F_F_W_M1_MASK */ VRNoV0, VRNoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_ROD_F_F_W_M1_TU */ VR, VR, VRM2, AVL, ixlenimm, /* PseudoVFNCVT_ROD_F_F_W_M2 */ VRM2, VRM4, AVL, ixlenimm, /* PseudoVFNCVT_ROD_F_F_W_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_ROD_F_F_W_M2_TU */ VRM2, VRM2, VRM4, AVL, ixlenimm, /* PseudoVFNCVT_ROD_F_F_W_M4 */ VRM4, VRM8, AVL, ixlenimm, /* PseudoVFNCVT_ROD_F_F_W_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_ROD_F_F_W_M4_TU */ VRM4, VRM4, VRM8, AVL, ixlenimm, /* PseudoVFNCVT_ROD_F_F_W_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_ROD_F_F_W_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_ROD_F_F_W_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_ROD_F_F_W_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_ROD_F_F_W_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_ROD_F_F_W_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_XU_F_W_M1 */ VR, VRM2, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_XU_F_W_M1_MASK */ VRNoV0, VRNoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RTZ_XU_F_W_M1_TU */ VR, VR, VRM2, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_XU_F_W_M2 */ VRM2, VRM4, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_XU_F_W_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RTZ_XU_F_W_M2_TU */ VRM2, VRM2, VRM4, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_XU_F_W_M4 */ VRM4, VRM8, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_XU_F_W_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RTZ_XU_F_W_M4_TU */ VRM4, VRM4, VRM8, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_XU_F_W_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_XU_F_W_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RTZ_XU_F_W_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_XU_F_W_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_XU_F_W_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RTZ_XU_F_W_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_XU_F_W_MF8 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_XU_F_W_MF8_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RTZ_XU_F_W_MF8_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_X_F_W_M1 */ VR, VRM2, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_X_F_W_M1_MASK */ VRNoV0, VRNoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RTZ_X_F_W_M1_TU */ VR, VR, VRM2, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_X_F_W_M2 */ VRM2, VRM4, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_X_F_W_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RTZ_X_F_W_M2_TU */ VRM2, VRM2, VRM4, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_X_F_W_M4 */ VRM4, VRM8, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_X_F_W_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RTZ_X_F_W_M4_TU */ VRM4, VRM4, VRM8, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_X_F_W_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_X_F_W_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RTZ_X_F_W_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_X_F_W_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_X_F_W_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RTZ_X_F_W_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_X_F_W_MF8 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_RTZ_X_F_W_MF8_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_RTZ_X_F_W_MF8_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_XU_F_W_M1 */ VR, VRM2, AVL, ixlenimm, /* PseudoVFNCVT_XU_F_W_M1_MASK */ VRNoV0, VRNoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_XU_F_W_M1_TU */ VR, VR, VRM2, AVL, ixlenimm, /* PseudoVFNCVT_XU_F_W_M2 */ VRM2, VRM4, AVL, ixlenimm, /* PseudoVFNCVT_XU_F_W_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_XU_F_W_M2_TU */ VRM2, VRM2, VRM4, AVL, ixlenimm, /* PseudoVFNCVT_XU_F_W_M4 */ VRM4, VRM8, AVL, ixlenimm, /* PseudoVFNCVT_XU_F_W_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_XU_F_W_M4_TU */ VRM4, VRM4, VRM8, AVL, ixlenimm, /* PseudoVFNCVT_XU_F_W_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_XU_F_W_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_XU_F_W_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_XU_F_W_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_XU_F_W_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_XU_F_W_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_XU_F_W_MF8 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_XU_F_W_MF8_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_XU_F_W_MF8_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_X_F_W_M1 */ VR, VRM2, AVL, ixlenimm, /* PseudoVFNCVT_X_F_W_M1_MASK */ VRNoV0, VRNoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_X_F_W_M1_TU */ VR, VR, VRM2, AVL, ixlenimm, /* PseudoVFNCVT_X_F_W_M2 */ VRM2, VRM4, AVL, ixlenimm, /* PseudoVFNCVT_X_F_W_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_X_F_W_M2_TU */ VRM2, VRM2, VRM4, AVL, ixlenimm, /* PseudoVFNCVT_X_F_W_M4 */ VRM4, VRM8, AVL, ixlenimm, /* PseudoVFNCVT_X_F_W_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_X_F_W_M4_TU */ VRM4, VRM4, VRM8, AVL, ixlenimm, /* PseudoVFNCVT_X_F_W_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_X_F_W_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_X_F_W_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_X_F_W_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_X_F_W_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_X_F_W_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_X_F_W_MF8 */ VR, VR, AVL, ixlenimm, /* PseudoVFNCVT_X_F_W_MF8_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNCVT_X_F_W_MF8_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFNMACC_VF16_M1 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF16_M1_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF16_M2 */ VRM2, VRM2, FPR16, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR16, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF16_M4 */ VRM4, VRM4, FPR16, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR16, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF16_M8 */ VRM8, VRM8, FPR16, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR16, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF16_MF2 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF16_MF2_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF16_MF4 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF16_MF4_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF32_M1 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF32_M1_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF32_M2 */ VRM2, VRM2, FPR32, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR32, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF32_M4 */ VRM4, VRM4, FPR32, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR32, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF32_M8 */ VRM8, VRM8, FPR32, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR32, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF32_MF2 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF32_MF2_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF64_M1 */ VR, VR, FPR64, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF64_M1_MASK */ VRNoV0, VRNoV0, FPR64, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF64_M2 */ VRM2, VRM2, FPR64, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR64, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF64_M4 */ VRM4, VRM4, FPR64, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR64, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF64_M8 */ VRM8, VRM8, FPR64, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR64, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VV_M1 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VV_M2 */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VV_M4 */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VV_M8 */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VV_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMACC_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF16_M1 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF16_M1_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF16_M2 */ VRM2, VRM2, FPR16, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR16, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF16_M4 */ VRM4, VRM4, FPR16, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR16, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF16_M8 */ VRM8, VRM8, FPR16, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR16, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF16_MF2 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF16_MF2_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF16_MF4 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF16_MF4_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF32_M1 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF32_M1_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF32_M2 */ VRM2, VRM2, FPR32, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR32, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF32_M4 */ VRM4, VRM4, FPR32, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR32, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF32_M8 */ VRM8, VRM8, FPR32, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR32, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF32_MF2 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF32_MF2_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF64_M1 */ VR, VR, FPR64, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF64_M1_MASK */ VRNoV0, VRNoV0, FPR64, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF64_M2 */ VRM2, VRM2, FPR64, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR64, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF64_M4 */ VRM4, VRM4, FPR64, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR64, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF64_M8 */ VRM8, VRM8, FPR64, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR64, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VV_M1 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VV_M2 */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VV_M4 */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VV_M8 */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VV_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMADD_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF16_M1 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF16_M1_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF16_M2 */ VRM2, VRM2, FPR16, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR16, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF16_M4 */ VRM4, VRM4, FPR16, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR16, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF16_M8 */ VRM8, VRM8, FPR16, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR16, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF16_MF2 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF16_MF2_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF16_MF4 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF16_MF4_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF32_M1 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF32_M1_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF32_M2 */ VRM2, VRM2, FPR32, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR32, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF32_M4 */ VRM4, VRM4, FPR32, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR32, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF32_M8 */ VRM8, VRM8, FPR32, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR32, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF32_MF2 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF32_MF2_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF64_M1 */ VR, VR, FPR64, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF64_M1_MASK */ VRNoV0, VRNoV0, FPR64, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF64_M2 */ VRM2, VRM2, FPR64, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR64, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF64_M4 */ VRM4, VRM4, FPR64, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR64, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF64_M8 */ VRM8, VRM8, FPR64, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR64, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VV_M1 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VV_M2 */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VV_M4 */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VV_M8 */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VV_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSAC_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF16_M1 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF16_M1_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF16_M2 */ VRM2, VRM2, FPR16, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR16, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF16_M4 */ VRM4, VRM4, FPR16, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR16, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF16_M8 */ VRM8, VRM8, FPR16, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR16, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF16_MF2 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF16_MF2_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF16_MF4 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF16_MF4_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF32_M1 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF32_M1_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF32_M2 */ VRM2, VRM2, FPR32, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR32, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF32_M4 */ VRM4, VRM4, FPR32, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR32, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF32_M8 */ VRM8, VRM8, FPR32, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR32, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF32_MF2 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF32_MF2_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF64_M1 */ VR, VR, FPR64, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF64_M1_MASK */ VRNoV0, VRNoV0, FPR64, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF64_M2 */ VRM2, VRM2, FPR64, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, FPR64, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF64_M4 */ VRM4, VRM4, FPR64, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, FPR64, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF64_M8 */ VRM8, VRM8, FPR64, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, FPR64, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VV_M1 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VV_M2 */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VV_M4 */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VV_M8 */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VV_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFNMSUB_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRDIV_VF16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFRDIV_VF16_M1_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRDIV_VF16_M1_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFRDIV_VF16_M2 */ VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFRDIV_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRDIV_VF16_M2_TU */ VRM2, VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFRDIV_VF16_M4 */ VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFRDIV_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRDIV_VF16_M4_TU */ VRM4, VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFRDIV_VF16_M8 */ VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFRDIV_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRDIV_VF16_M8_TU */ VRM8, VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFRDIV_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFRDIV_VF16_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRDIV_VF16_MF2_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFRDIV_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFRDIV_VF16_MF4_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRDIV_VF16_MF4_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFRDIV_VF32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFRDIV_VF32_M1_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRDIV_VF32_M1_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFRDIV_VF32_M2 */ VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFRDIV_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRDIV_VF32_M2_TU */ VRM2, VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFRDIV_VF32_M4 */ VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFRDIV_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRDIV_VF32_M4_TU */ VRM4, VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFRDIV_VF32_M8 */ VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFRDIV_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRDIV_VF32_M8_TU */ VRM8, VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFRDIV_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFRDIV_VF32_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRDIV_VF32_MF2_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFRDIV_VF64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFRDIV_VF64_M1_MASK */ VRNoV0, VRNoV0, VR, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRDIV_VF64_M1_TU */ VR, VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFRDIV_VF64_M2 */ VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFRDIV_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRDIV_VF64_M2_TU */ VRM2, VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFRDIV_VF64_M4 */ VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFRDIV_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRDIV_VF64_M4_TU */ VRM4, VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFRDIV_VF64_M8 */ VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFRDIV_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRDIV_VF64_M8_TU */ VRM8, VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFREC7_V_M1 */ VR, VR, AVL, ixlenimm, /* PseudoVFREC7_V_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFREC7_V_M1_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFREC7_V_M2 */ VRM2, VRM2, AVL, ixlenimm, /* PseudoVFREC7_V_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFREC7_V_M2_TU */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFREC7_V_M4 */ VRM4, VRM4, AVL, ixlenimm, /* PseudoVFREC7_V_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFREC7_V_M4_TU */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFREC7_V_M8 */ VRM8, VRM8, AVL, ixlenimm, /* PseudoVFREC7_V_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFREC7_V_M8_TU */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFREC7_V_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFREC7_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFREC7_V_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFREC7_V_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFREC7_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFREC7_V_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFREDMAX_VS_M1 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFREDMAX_VS_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDMAX_VS_M2 */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVFREDMAX_VS_M2_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDMAX_VS_M4 */ VR, VR, VRM4, VR, AVL, ixlenimm, /* PseudoVFREDMAX_VS_M4_MASK */ VRNoV0, VRNoV0, VRM4, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDMAX_VS_M8 */ VR, VR, VRM8, VR, AVL, ixlenimm, /* PseudoVFREDMAX_VS_M8_MASK */ VRNoV0, VRNoV0, VRM8, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDMAX_VS_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFREDMAX_VS_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDMAX_VS_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFREDMAX_VS_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDMIN_VS_M1 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFREDMIN_VS_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDMIN_VS_M2 */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVFREDMIN_VS_M2_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDMIN_VS_M4 */ VR, VR, VRM4, VR, AVL, ixlenimm, /* PseudoVFREDMIN_VS_M4_MASK */ VRNoV0, VRNoV0, VRM4, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDMIN_VS_M8 */ VR, VR, VRM8, VR, AVL, ixlenimm, /* PseudoVFREDMIN_VS_M8_MASK */ VRNoV0, VRNoV0, VRM8, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDMIN_VS_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFREDMIN_VS_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDMIN_VS_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFREDMIN_VS_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDOSUM_VS_M1 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFREDOSUM_VS_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDOSUM_VS_M2 */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVFREDOSUM_VS_M2_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDOSUM_VS_M4 */ VR, VR, VRM4, VR, AVL, ixlenimm, /* PseudoVFREDOSUM_VS_M4_MASK */ VRNoV0, VRNoV0, VRM4, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDOSUM_VS_M8 */ VR, VR, VRM8, VR, AVL, ixlenimm, /* PseudoVFREDOSUM_VS_M8_MASK */ VRNoV0, VRNoV0, VRM8, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDOSUM_VS_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFREDOSUM_VS_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDOSUM_VS_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFREDOSUM_VS_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDUSUM_VS_M1 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFREDUSUM_VS_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDUSUM_VS_M2 */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVFREDUSUM_VS_M2_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDUSUM_VS_M4 */ VR, VR, VRM4, VR, AVL, ixlenimm, /* PseudoVFREDUSUM_VS_M4_MASK */ VRNoV0, VRNoV0, VRM4, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDUSUM_VS_M8 */ VR, VR, VRM8, VR, AVL, ixlenimm, /* PseudoVFREDUSUM_VS_M8_MASK */ VRNoV0, VRNoV0, VRM8, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDUSUM_VS_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFREDUSUM_VS_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFREDUSUM_VS_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFREDUSUM_VS_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFROUND_NOEXCEPT_V_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFROUND_NOEXCEPT_V_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFROUND_NOEXCEPT_V_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFROUND_NOEXCEPT_V_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFROUND_NOEXCEPT_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFROUND_NOEXCEPT_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSQRT7_V_M1 */ VR, VR, AVL, ixlenimm, /* PseudoVFRSQRT7_V_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSQRT7_V_M1_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFRSQRT7_V_M2 */ VRM2, VRM2, AVL, ixlenimm, /* PseudoVFRSQRT7_V_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSQRT7_V_M2_TU */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFRSQRT7_V_M4 */ VRM4, VRM4, AVL, ixlenimm, /* PseudoVFRSQRT7_V_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSQRT7_V_M4_TU */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFRSQRT7_V_M8 */ VRM8, VRM8, AVL, ixlenimm, /* PseudoVFRSQRT7_V_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSQRT7_V_M8_TU */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFRSQRT7_V_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFRSQRT7_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSQRT7_V_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFRSQRT7_V_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFRSQRT7_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSQRT7_V_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFRSUB_VF16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFRSUB_VF16_M1_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSUB_VF16_M1_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFRSUB_VF16_M2 */ VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFRSUB_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSUB_VF16_M2_TU */ VRM2, VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFRSUB_VF16_M4 */ VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFRSUB_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSUB_VF16_M4_TU */ VRM4, VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFRSUB_VF16_M8 */ VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFRSUB_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSUB_VF16_M8_TU */ VRM8, VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFRSUB_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFRSUB_VF16_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSUB_VF16_MF2_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFRSUB_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFRSUB_VF16_MF4_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSUB_VF16_MF4_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFRSUB_VF32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFRSUB_VF32_M1_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSUB_VF32_M1_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFRSUB_VF32_M2 */ VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFRSUB_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSUB_VF32_M2_TU */ VRM2, VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFRSUB_VF32_M4 */ VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFRSUB_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSUB_VF32_M4_TU */ VRM4, VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFRSUB_VF32_M8 */ VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFRSUB_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSUB_VF32_M8_TU */ VRM8, VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFRSUB_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFRSUB_VF32_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSUB_VF32_MF2_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFRSUB_VF64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFRSUB_VF64_M1_MASK */ VRNoV0, VRNoV0, VR, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSUB_VF64_M1_TU */ VR, VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFRSUB_VF64_M2 */ VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFRSUB_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSUB_VF64_M2_TU */ VRM2, VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFRSUB_VF64_M4 */ VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFRSUB_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSUB_VF64_M4_TU */ VRM4, VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFRSUB_VF64_M8 */ VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFRSUB_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFRSUB_VF64_M8_TU */ VRM8, VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFSGNJN_VF16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSGNJN_VF16_M1_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VF16_M1_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSGNJN_VF16_M2 */ VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFSGNJN_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VF16_M2_TU */ VRM2, VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFSGNJN_VF16_M4 */ VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFSGNJN_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VF16_M4_TU */ VRM4, VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFSGNJN_VF16_M8 */ VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFSGNJN_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VF16_M8_TU */ VRM8, VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFSGNJN_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSGNJN_VF16_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VF16_MF2_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSGNJN_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSGNJN_VF16_MF4_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VF16_MF4_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSGNJN_VF32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSGNJN_VF32_M1_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VF32_M1_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSGNJN_VF32_M2 */ VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFSGNJN_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VF32_M2_TU */ VRM2, VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFSGNJN_VF32_M4 */ VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFSGNJN_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VF32_M4_TU */ VRM4, VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFSGNJN_VF32_M8 */ VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFSGNJN_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VF32_M8_TU */ VRM8, VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFSGNJN_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSGNJN_VF32_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VF32_MF2_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSGNJN_VF64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFSGNJN_VF64_M1_MASK */ VRNoV0, VRNoV0, VR, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VF64_M1_TU */ VR, VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFSGNJN_VF64_M2 */ VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFSGNJN_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VF64_M2_TU */ VRM2, VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFSGNJN_VF64_M4 */ VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFSGNJN_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VF64_M4_TU */ VRM4, VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFSGNJN_VF64_M8 */ VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFSGNJN_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VF64_M8_TU */ VRM8, VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFSGNJN_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFSGNJN_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFSGNJN_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFSGNJN_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFSGNJN_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFSGNJN_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFSGNJN_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFSGNJN_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFSGNJN_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFSGNJN_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFSGNJN_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFSGNJN_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJN_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFSGNJX_VF16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSGNJX_VF16_M1_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VF16_M1_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSGNJX_VF16_M2 */ VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFSGNJX_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VF16_M2_TU */ VRM2, VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFSGNJX_VF16_M4 */ VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFSGNJX_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VF16_M4_TU */ VRM4, VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFSGNJX_VF16_M8 */ VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFSGNJX_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VF16_M8_TU */ VRM8, VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFSGNJX_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSGNJX_VF16_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VF16_MF2_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSGNJX_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSGNJX_VF16_MF4_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VF16_MF4_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSGNJX_VF32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSGNJX_VF32_M1_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VF32_M1_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSGNJX_VF32_M2 */ VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFSGNJX_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VF32_M2_TU */ VRM2, VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFSGNJX_VF32_M4 */ VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFSGNJX_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VF32_M4_TU */ VRM4, VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFSGNJX_VF32_M8 */ VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFSGNJX_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VF32_M8_TU */ VRM8, VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFSGNJX_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSGNJX_VF32_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VF32_MF2_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSGNJX_VF64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFSGNJX_VF64_M1_MASK */ VRNoV0, VRNoV0, VR, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VF64_M1_TU */ VR, VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFSGNJX_VF64_M2 */ VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFSGNJX_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VF64_M2_TU */ VRM2, VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFSGNJX_VF64_M4 */ VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFSGNJX_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VF64_M4_TU */ VRM4, VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFSGNJX_VF64_M8 */ VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFSGNJX_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VF64_M8_TU */ VRM8, VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFSGNJX_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFSGNJX_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFSGNJX_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFSGNJX_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFSGNJX_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFSGNJX_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFSGNJX_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFSGNJX_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFSGNJX_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFSGNJX_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFSGNJX_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFSGNJX_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJX_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFSGNJ_VF16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSGNJ_VF16_M1_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VF16_M1_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSGNJ_VF16_M2 */ VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFSGNJ_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VF16_M2_TU */ VRM2, VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFSGNJ_VF16_M4 */ VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFSGNJ_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VF16_M4_TU */ VRM4, VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFSGNJ_VF16_M8 */ VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFSGNJ_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VF16_M8_TU */ VRM8, VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFSGNJ_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSGNJ_VF16_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VF16_MF2_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSGNJ_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSGNJ_VF16_MF4_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VF16_MF4_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSGNJ_VF32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSGNJ_VF32_M1_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VF32_M1_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSGNJ_VF32_M2 */ VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFSGNJ_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VF32_M2_TU */ VRM2, VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFSGNJ_VF32_M4 */ VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFSGNJ_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VF32_M4_TU */ VRM4, VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFSGNJ_VF32_M8 */ VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFSGNJ_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VF32_M8_TU */ VRM8, VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFSGNJ_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSGNJ_VF32_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VF32_MF2_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSGNJ_VF64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFSGNJ_VF64_M1_MASK */ VRNoV0, VRNoV0, VR, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VF64_M1_TU */ VR, VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFSGNJ_VF64_M2 */ VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFSGNJ_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VF64_M2_TU */ VRM2, VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFSGNJ_VF64_M4 */ VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFSGNJ_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VF64_M4_TU */ VRM4, VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFSGNJ_VF64_M8 */ VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFSGNJ_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VF64_M8_TU */ VRM8, VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFSGNJ_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFSGNJ_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFSGNJ_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFSGNJ_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFSGNJ_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFSGNJ_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFSGNJ_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFSGNJ_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFSGNJ_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFSGNJ_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFSGNJ_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFSGNJ_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSGNJ_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF16_M1_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1DOWN_VF16_M1_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF16_M2 */ VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1DOWN_VF16_M2_TU */ VRM2, VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF16_M4 */ VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1DOWN_VF16_M4_TU */ VRM4, VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF16_M8 */ VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1DOWN_VF16_M8_TU */ VRM8, VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF16_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1DOWN_VF16_MF2_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF16_MF4_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1DOWN_VF16_MF4_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF32_M1_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1DOWN_VF32_M1_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF32_M2 */ VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1DOWN_VF32_M2_TU */ VRM2, VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF32_M4 */ VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1DOWN_VF32_M4_TU */ VRM4, VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF32_M8 */ VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1DOWN_VF32_M8_TU */ VRM8, VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF32_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1DOWN_VF32_MF2_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF64_M1_MASK */ VRNoV0, VRNoV0, VR, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1DOWN_VF64_M1_TU */ VR, VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF64_M2 */ VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1DOWN_VF64_M2_TU */ VRM2, VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF64_M4 */ VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1DOWN_VF64_M4_TU */ VRM4, VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF64_M8 */ VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFSLIDE1DOWN_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1DOWN_VF64_M8_TU */ VRM8, VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF16_M1_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1UP_VF16_M1_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF16_M2 */ VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1UP_VF16_M2_TU */ VRM2, VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF16_M4 */ VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1UP_VF16_M4_TU */ VRM4, VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF16_M8 */ VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1UP_VF16_M8_TU */ VRM8, VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF16_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1UP_VF16_MF2_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF16_MF4_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1UP_VF16_MF4_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF32_M1_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1UP_VF32_M1_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF32_M2 */ VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1UP_VF32_M2_TU */ VRM2, VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF32_M4 */ VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1UP_VF32_M4_TU */ VRM4, VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF32_M8 */ VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1UP_VF32_M8_TU */ VRM8, VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF32_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1UP_VF32_MF2_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF64_M1_MASK */ VRNoV0, VRNoV0, VR, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1UP_VF64_M1_TU */ VR, VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF64_M2 */ VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1UP_VF64_M2_TU */ VRM2, VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF64_M4 */ VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1UP_VF64_M4_TU */ VRM4, VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF64_M8 */ VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFSLIDE1UP_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSLIDE1UP_VF64_M8_TU */ VRM8, VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFSQRT_V_M1 */ VR, VR, AVL, ixlenimm, /* PseudoVFSQRT_V_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSQRT_V_M1_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFSQRT_V_M2 */ VRM2, VRM2, AVL, ixlenimm, /* PseudoVFSQRT_V_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSQRT_V_M2_TU */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFSQRT_V_M4 */ VRM4, VRM4, AVL, ixlenimm, /* PseudoVFSQRT_V_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSQRT_V_M4_TU */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFSQRT_V_M8 */ VRM8, VRM8, AVL, ixlenimm, /* PseudoVFSQRT_V_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSQRT_V_M8_TU */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFSQRT_V_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFSQRT_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSQRT_V_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFSQRT_V_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFSQRT_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSQRT_V_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFSUB_VF16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSUB_VF16_M1_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VF16_M1_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSUB_VF16_M2 */ VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFSUB_VF16_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VF16_M2_TU */ VRM2, VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFSUB_VF16_M4 */ VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFSUB_VF16_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VF16_M4_TU */ VRM4, VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFSUB_VF16_M8 */ VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFSUB_VF16_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VF16_M8_TU */ VRM8, VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFSUB_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSUB_VF16_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VF16_MF2_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSUB_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSUB_VF16_MF4_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VF16_MF4_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFSUB_VF32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSUB_VF32_M1_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VF32_M1_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSUB_VF32_M2 */ VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFSUB_VF32_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VF32_M2_TU */ VRM2, VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFSUB_VF32_M4 */ VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFSUB_VF32_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VF32_M4_TU */ VRM4, VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFSUB_VF32_M8 */ VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFSUB_VF32_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VF32_M8_TU */ VRM8, VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFSUB_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSUB_VF32_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VF32_MF2_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFSUB_VF64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFSUB_VF64_M1_MASK */ VRNoV0, VRNoV0, VR, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VF64_M1_TU */ VR, VR, VR, FPR64, AVL, ixlenimm, /* PseudoVFSUB_VF64_M2 */ VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFSUB_VF64_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VF64_M2_TU */ VRM2, VRM2, VRM2, FPR64, AVL, ixlenimm, /* PseudoVFSUB_VF64_M4 */ VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFSUB_VF64_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VF64_M4_TU */ VRM4, VRM4, VRM4, FPR64, AVL, ixlenimm, /* PseudoVFSUB_VF64_M8 */ VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFSUB_VF64_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR64, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VF64_M8_TU */ VRM8, VRM8, VRM8, FPR64, AVL, ixlenimm, /* PseudoVFSUB_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFSUB_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFSUB_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFSUB_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFSUB_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFSUB_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFSUB_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFSUB_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVFSUB_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFSUB_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFSUB_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFSUB_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFSUB_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFWADD_VF16_M1 */ VRM2, VR, FPR16, AVL, ixlenimm, /* PseudoVFWADD_VF16_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_VF16_M1_TU */ VRM2, VRM2, VR, FPR16, AVL, ixlenimm, /* PseudoVFWADD_VF16_M2 */ VRM4, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFWADD_VF16_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_VF16_M2_TU */ VRM4, VRM4, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFWADD_VF16_M4 */ VRM8, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFWADD_VF16_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_VF16_M4_TU */ VRM8, VRM8, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFWADD_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWADD_VF16_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_VF16_MF2_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWADD_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWADD_VF16_MF4_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_VF16_MF4_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWADD_VF32_M1 */ VRM2, VR, FPR32, AVL, ixlenimm, /* PseudoVFWADD_VF32_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_VF32_M1_TU */ VRM2, VRM2, VR, FPR32, AVL, ixlenimm, /* PseudoVFWADD_VF32_M2 */ VRM4, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFWADD_VF32_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_VF32_M2_TU */ VRM4, VRM4, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFWADD_VF32_M4 */ VRM8, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFWADD_VF32_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_VF32_M4_TU */ VRM8, VRM8, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFWADD_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFWADD_VF32_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_VF32_MF2_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFWADD_VV_M1 */ VRM2, VR, VR, AVL, ixlenimm, /* PseudoVFWADD_VV_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_VV_M1_TU */ VRM2, VRM2, VR, VR, AVL, ixlenimm, /* PseudoVFWADD_VV_M2 */ VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFWADD_VV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_VV_M2_TU */ VRM4, VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFWADD_VV_M4 */ VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFWADD_VV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_VV_M4_TU */ VRM8, VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFWADD_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWADD_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFWADD_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWADD_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFWADD_WF16_M1 */ VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFWADD_WF16_M1_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WF16_M1_TU */ VRM2, VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFWADD_WF16_M2 */ VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFWADD_WF16_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WF16_M2_TU */ VRM4, VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFWADD_WF16_M4 */ VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFWADD_WF16_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WF16_M4_TU */ VRM8, VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFWADD_WF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWADD_WF16_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WF16_MF2_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWADD_WF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWADD_WF16_MF4_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WF16_MF4_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWADD_WF32_M1 */ VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFWADD_WF32_M1_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WF32_M1_TU */ VRM2, VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFWADD_WF32_M2 */ VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFWADD_WF32_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WF32_M2_TU */ VRM4, VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFWADD_WF32_M4 */ VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFWADD_WF32_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WF32_M4_TU */ VRM8, VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFWADD_WF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFWADD_WF32_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WF32_MF2_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFWADD_WV_M1 */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVFWADD_WV_M1_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WV_M1_MASK_TIED */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WV_M1_TIED */ VRM2, VRM2, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WV_M1_TU */ VRM2, VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVFWADD_WV_M2 */ VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVFWADD_WV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WV_M2_MASK_TIED */ VRM4NoV0, VRM4NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WV_M2_TIED */ VRM4, VRM4, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WV_M2_TU */ VRM4, VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVFWADD_WV_M4 */ VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVFWADD_WV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WV_M4_MASK_TIED */ VRM8NoV0, VRM8NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WV_M4_TIED */ VRM8, VRM8, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WV_M4_TU */ VRM8, VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVFWADD_WV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWADD_WV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WV_MF2_MASK_TIED */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WV_MF2_TIED */ VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFWADD_WV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWADD_WV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WV_MF4_MASK_TIED */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WV_MF4_TIED */ VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWADD_WV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_F_V_M1 */ VRM2, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_F_V_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_F_F_V_M1_TU */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_F_V_M2 */ VRM4, VRM2, AVL, ixlenimm, /* PseudoVFWCVT_F_F_V_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_F_F_V_M2_TU */ VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVFWCVT_F_F_V_M4 */ VRM8, VRM4, AVL, ixlenimm, /* PseudoVFWCVT_F_F_V_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_F_F_V_M4_TU */ VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVFWCVT_F_F_V_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_F_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_F_F_V_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_F_V_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_F_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_F_F_V_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_XU_V_M1 */ VRM2, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_XU_V_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_F_XU_V_M1_TU */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_XU_V_M2 */ VRM4, VRM2, AVL, ixlenimm, /* PseudoVFWCVT_F_XU_V_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_F_XU_V_M2_TU */ VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVFWCVT_F_XU_V_M4 */ VRM8, VRM4, AVL, ixlenimm, /* PseudoVFWCVT_F_XU_V_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_F_XU_V_M4_TU */ VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVFWCVT_F_XU_V_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_XU_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_F_XU_V_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_XU_V_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_XU_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_F_XU_V_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_XU_V_MF8 */ VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_XU_V_MF8_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_F_XU_V_MF8_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_X_V_M1 */ VRM2, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_X_V_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_F_X_V_M1_TU */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_X_V_M2 */ VRM4, VRM2, AVL, ixlenimm, /* PseudoVFWCVT_F_X_V_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_F_X_V_M2_TU */ VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVFWCVT_F_X_V_M4 */ VRM8, VRM4, AVL, ixlenimm, /* PseudoVFWCVT_F_X_V_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_F_X_V_M4_TU */ VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVFWCVT_F_X_V_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_X_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_F_X_V_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_X_V_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_X_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_F_X_V_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_X_V_MF8 */ VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_F_X_V_MF8_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_F_X_V_MF8_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_RM_F_XU_V_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_F_XU_V_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_F_XU_V_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_F_XU_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_F_XU_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_F_XU_V_MF8_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_F_X_V_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_F_X_V_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_F_X_V_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_F_X_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_F_X_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_F_X_V_MF8_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_XU_F_V_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_XU_F_V_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_XU_F_V_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_XU_F_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_XU_F_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_X_F_V_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_X_F_V_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_X_F_V_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_X_F_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RM_X_F_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, ixlenimm, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RTZ_XU_F_V_M1 */ VRM2, VR, AVL, ixlenimm, /* PseudoVFWCVT_RTZ_XU_F_V_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RTZ_XU_F_V_M1_TU */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVFWCVT_RTZ_XU_F_V_M2 */ VRM4, VRM2, AVL, ixlenimm, /* PseudoVFWCVT_RTZ_XU_F_V_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RTZ_XU_F_V_M2_TU */ VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVFWCVT_RTZ_XU_F_V_M4 */ VRM8, VRM4, AVL, ixlenimm, /* PseudoVFWCVT_RTZ_XU_F_V_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RTZ_XU_F_V_M4_TU */ VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVFWCVT_RTZ_XU_F_V_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_RTZ_XU_F_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RTZ_XU_F_V_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_RTZ_XU_F_V_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_RTZ_XU_F_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RTZ_XU_F_V_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_RTZ_X_F_V_M1 */ VRM2, VR, AVL, ixlenimm, /* PseudoVFWCVT_RTZ_X_F_V_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RTZ_X_F_V_M1_TU */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVFWCVT_RTZ_X_F_V_M2 */ VRM4, VRM2, AVL, ixlenimm, /* PseudoVFWCVT_RTZ_X_F_V_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RTZ_X_F_V_M2_TU */ VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVFWCVT_RTZ_X_F_V_M4 */ VRM8, VRM4, AVL, ixlenimm, /* PseudoVFWCVT_RTZ_X_F_V_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RTZ_X_F_V_M4_TU */ VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVFWCVT_RTZ_X_F_V_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_RTZ_X_F_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RTZ_X_F_V_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_RTZ_X_F_V_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_RTZ_X_F_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_RTZ_X_F_V_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_XU_F_V_M1 */ VRM2, VR, AVL, ixlenimm, /* PseudoVFWCVT_XU_F_V_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_XU_F_V_M1_TU */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVFWCVT_XU_F_V_M2 */ VRM4, VRM2, AVL, ixlenimm, /* PseudoVFWCVT_XU_F_V_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_XU_F_V_M2_TU */ VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVFWCVT_XU_F_V_M4 */ VRM8, VRM4, AVL, ixlenimm, /* PseudoVFWCVT_XU_F_V_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_XU_F_V_M4_TU */ VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVFWCVT_XU_F_V_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_XU_F_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_XU_F_V_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_XU_F_V_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_XU_F_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_XU_F_V_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_X_F_V_M1 */ VRM2, VR, AVL, ixlenimm, /* PseudoVFWCVT_X_F_V_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_X_F_V_M1_TU */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVFWCVT_X_F_V_M2 */ VRM4, VRM2, AVL, ixlenimm, /* PseudoVFWCVT_X_F_V_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_X_F_V_M2_TU */ VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVFWCVT_X_F_V_M4 */ VRM8, VRM4, AVL, ixlenimm, /* PseudoVFWCVT_X_F_V_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_X_F_V_M4_TU */ VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVFWCVT_X_F_V_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_X_F_V_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_X_F_V_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_X_F_V_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVFWCVT_X_F_V_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWCVT_X_F_V_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWMACC_VF16_M1 */ VRM2, VRM2, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VF16_M1_MASK */ VRM2NoV0, VRM2NoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VF16_M2 */ VRM4, VRM4, FPR16, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VF16_M2_MASK */ VRM4NoV0, VRM4NoV0, FPR16, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VF16_M4 */ VRM8, VRM8, FPR16, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VF16_M4_MASK */ VRM8NoV0, VRM8NoV0, FPR16, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VF16_MF2 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VF16_MF2_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VF16_MF4 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VF16_MF4_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VF32_M1 */ VRM2, VRM2, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VF32_M1_MASK */ VRM2NoV0, VRM2NoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VF32_M2 */ VRM4, VRM4, FPR32, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VF32_M2_MASK */ VRM4NoV0, VRM4NoV0, FPR32, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VF32_M4 */ VRM8, VRM8, FPR32, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VF32_M4_MASK */ VRM8NoV0, VRM8NoV0, FPR32, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VF32_MF2 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VF32_MF2_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VV_M1 */ VRM2, VRM2, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VV_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VV_M2 */ VRM4, VRM4, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VV_M4 */ VRM8, VRM8, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VV_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWMACC_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VF16_M1 */ VRM2, VRM2, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VF16_M1_MASK */ VRM2NoV0, VRM2NoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VF16_M2 */ VRM4, VRM4, FPR16, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VF16_M2_MASK */ VRM4NoV0, VRM4NoV0, FPR16, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VF16_M4 */ VRM8, VRM8, FPR16, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VF16_M4_MASK */ VRM8NoV0, VRM8NoV0, FPR16, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VF16_MF2 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VF16_MF2_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VF16_MF4 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VF16_MF4_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VF32_M1 */ VRM2, VRM2, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VF32_M1_MASK */ VRM2NoV0, VRM2NoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VF32_M2 */ VRM4, VRM4, FPR32, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VF32_M2_MASK */ VRM4NoV0, VRM4NoV0, FPR32, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VF32_M4 */ VRM8, VRM8, FPR32, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VF32_M4_MASK */ VRM8NoV0, VRM8NoV0, FPR32, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VF32_MF2 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VF32_MF2_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VV_M1 */ VRM2, VRM2, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VV_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VV_M2 */ VRM4, VRM4, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VV_M4 */ VRM8, VRM8, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VV_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWMSAC_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMUL_VF16_M1 */ VRM2, VR, FPR16, AVL, ixlenimm, /* PseudoVFWMUL_VF16_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMUL_VF16_M1_TU */ VRM2, VRM2, VR, FPR16, AVL, ixlenimm, /* PseudoVFWMUL_VF16_M2 */ VRM4, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFWMUL_VF16_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMUL_VF16_M2_TU */ VRM4, VRM4, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFWMUL_VF16_M4 */ VRM8, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFWMUL_VF16_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMUL_VF16_M4_TU */ VRM8, VRM8, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFWMUL_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWMUL_VF16_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMUL_VF16_MF2_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWMUL_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWMUL_VF16_MF4_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMUL_VF16_MF4_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWMUL_VF32_M1 */ VRM2, VR, FPR32, AVL, ixlenimm, /* PseudoVFWMUL_VF32_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMUL_VF32_M1_TU */ VRM2, VRM2, VR, FPR32, AVL, ixlenimm, /* PseudoVFWMUL_VF32_M2 */ VRM4, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFWMUL_VF32_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMUL_VF32_M2_TU */ VRM4, VRM4, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFWMUL_VF32_M4 */ VRM8, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFWMUL_VF32_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMUL_VF32_M4_TU */ VRM8, VRM8, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFWMUL_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFWMUL_VF32_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMUL_VF32_MF2_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFWMUL_VV_M1 */ VRM2, VR, VR, AVL, ixlenimm, /* PseudoVFWMUL_VV_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMUL_VV_M1_TU */ VRM2, VRM2, VR, VR, AVL, ixlenimm, /* PseudoVFWMUL_VV_M2 */ VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFWMUL_VV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMUL_VV_M2_TU */ VRM4, VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFWMUL_VV_M4 */ VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFWMUL_VV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMUL_VV_M4_TU */ VRM8, VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFWMUL_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWMUL_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMUL_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFWMUL_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWMUL_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWMUL_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFWNMACC_VF16_M1 */ VRM2, VRM2, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VF16_M1_MASK */ VRM2NoV0, VRM2NoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VF16_M2 */ VRM4, VRM4, FPR16, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VF16_M2_MASK */ VRM4NoV0, VRM4NoV0, FPR16, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VF16_M4 */ VRM8, VRM8, FPR16, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VF16_M4_MASK */ VRM8NoV0, VRM8NoV0, FPR16, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VF16_MF2 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VF16_MF2_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VF16_MF4 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VF16_MF4_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VF32_M1 */ VRM2, VRM2, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VF32_M1_MASK */ VRM2NoV0, VRM2NoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VF32_M2 */ VRM4, VRM4, FPR32, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VF32_M2_MASK */ VRM4NoV0, VRM4NoV0, FPR32, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VF32_M4 */ VRM8, VRM8, FPR32, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VF32_M4_MASK */ VRM8NoV0, VRM8NoV0, FPR32, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VF32_MF2 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VF32_MF2_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VV_M1 */ VRM2, VRM2, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VV_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VV_M2 */ VRM4, VRM4, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VV_M4 */ VRM8, VRM8, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VV_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMACC_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VF16_M1 */ VRM2, VRM2, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VF16_M1_MASK */ VRM2NoV0, VRM2NoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VF16_M2 */ VRM4, VRM4, FPR16, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VF16_M2_MASK */ VRM4NoV0, VRM4NoV0, FPR16, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VF16_M4 */ VRM8, VRM8, FPR16, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VF16_M4_MASK */ VRM8NoV0, VRM8NoV0, FPR16, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VF16_MF2 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VF16_MF2_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VF16_MF4 */ VR, VR, FPR16, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VF16_MF4_MASK */ VRNoV0, VRNoV0, FPR16, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VF32_M1 */ VRM2, VRM2, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VF32_M1_MASK */ VRM2NoV0, VRM2NoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VF32_M2 */ VRM4, VRM4, FPR32, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VF32_M2_MASK */ VRM4NoV0, VRM4NoV0, FPR32, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VF32_M4 */ VRM8, VRM8, FPR32, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VF32_M4_MASK */ VRM8NoV0, VRM8NoV0, FPR32, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VF32_MF2 */ VR, VR, FPR32, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VF32_MF2_MASK */ VRNoV0, VRNoV0, FPR32, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VV_M1 */ VRM2, VRM2, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VV_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VV_M2 */ VRM4, VRM4, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VV_M4 */ VRM8, VRM8, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VV_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWNMSAC_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWREDOSUM_VS_M1 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFWREDOSUM_VS_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFWREDOSUM_VS_M2 */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVFWREDOSUM_VS_M2_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFWREDOSUM_VS_M4 */ VR, VR, VRM4, VR, AVL, ixlenimm, /* PseudoVFWREDOSUM_VS_M4_MASK */ VRNoV0, VRNoV0, VRM4, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFWREDOSUM_VS_M8 */ VR, VR, VRM8, VR, AVL, ixlenimm, /* PseudoVFWREDOSUM_VS_M8_MASK */ VRNoV0, VRNoV0, VRM8, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFWREDOSUM_VS_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFWREDOSUM_VS_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFWREDOSUM_VS_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFWREDOSUM_VS_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFWREDUSUM_VS_M1 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFWREDUSUM_VS_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFWREDUSUM_VS_M2 */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVFWREDUSUM_VS_M2_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFWREDUSUM_VS_M4 */ VR, VR, VRM4, VR, AVL, ixlenimm, /* PseudoVFWREDUSUM_VS_M4_MASK */ VRNoV0, VRNoV0, VRM4, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFWREDUSUM_VS_M8 */ VR, VR, VRM8, VR, AVL, ixlenimm, /* PseudoVFWREDUSUM_VS_M8_MASK */ VRNoV0, VRNoV0, VRM8, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFWREDUSUM_VS_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFWREDUSUM_VS_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFWREDUSUM_VS_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFWREDUSUM_VS_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVFWSUB_VF16_M1 */ VRM2, VR, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_VF16_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_VF16_M1_TU */ VRM2, VRM2, VR, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_VF16_M2 */ VRM4, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_VF16_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_VF16_M2_TU */ VRM4, VRM4, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_VF16_M4 */ VRM8, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_VF16_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_VF16_M4_TU */ VRM8, VRM8, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_VF16_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_VF16_MF2_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_VF16_MF4_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_VF16_MF4_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_VF32_M1 */ VRM2, VR, FPR32, AVL, ixlenimm, /* PseudoVFWSUB_VF32_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_VF32_M1_TU */ VRM2, VRM2, VR, FPR32, AVL, ixlenimm, /* PseudoVFWSUB_VF32_M2 */ VRM4, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFWSUB_VF32_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_VF32_M2_TU */ VRM4, VRM4, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFWSUB_VF32_M4 */ VRM8, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFWSUB_VF32_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_VF32_M4_TU */ VRM8, VRM8, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFWSUB_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFWSUB_VF32_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_VF32_MF2_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFWSUB_VV_M1 */ VRM2, VR, VR, AVL, ixlenimm, /* PseudoVFWSUB_VV_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_VV_M1_TU */ VRM2, VRM2, VR, VR, AVL, ixlenimm, /* PseudoVFWSUB_VV_M2 */ VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFWSUB_VV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_VV_M2_TU */ VRM4, VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVFWSUB_VV_M4 */ VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFWSUB_VV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_VV_M4_TU */ VRM8, VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVFWSUB_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWSUB_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFWSUB_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWSUB_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFWSUB_WF16_M1 */ VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_WF16_M1_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WF16_M1_TU */ VRM2, VRM2, VRM2, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_WF16_M2 */ VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_WF16_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WF16_M2_TU */ VRM4, VRM4, VRM4, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_WF16_M4 */ VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_WF16_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WF16_M4_TU */ VRM8, VRM8, VRM8, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_WF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_WF16_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WF16_MF2_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_WF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_WF16_MF4_MASK */ VRNoV0, VRNoV0, VR, FPR16, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WF16_MF4_TU */ VR, VR, VR, FPR16, AVL, ixlenimm, /* PseudoVFWSUB_WF32_M1 */ VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFWSUB_WF32_M1_MASK */ VRM2NoV0, VRM2NoV0, VRM2, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WF32_M1_TU */ VRM2, VRM2, VRM2, FPR32, AVL, ixlenimm, /* PseudoVFWSUB_WF32_M2 */ VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFWSUB_WF32_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM4, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WF32_M2_TU */ VRM4, VRM4, VRM4, FPR32, AVL, ixlenimm, /* PseudoVFWSUB_WF32_M4 */ VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFWSUB_WF32_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM8, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WF32_M4_TU */ VRM8, VRM8, VRM8, FPR32, AVL, ixlenimm, /* PseudoVFWSUB_WF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFWSUB_WF32_MF2_MASK */ VRNoV0, VRNoV0, VR, FPR32, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WF32_MF2_TU */ VR, VR, VR, FPR32, AVL, ixlenimm, /* PseudoVFWSUB_WV_M1 */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVFWSUB_WV_M1_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WV_M1_MASK_TIED */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WV_M1_TIED */ VRM2, VRM2, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WV_M1_TU */ VRM2, VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVFWSUB_WV_M2 */ VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVFWSUB_WV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WV_M2_MASK_TIED */ VRM4NoV0, VRM4NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WV_M2_TIED */ VRM4, VRM4, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WV_M2_TU */ VRM4, VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVFWSUB_WV_M4 */ VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVFWSUB_WV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WV_M4_MASK_TIED */ VRM8NoV0, VRM8NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WV_M4_TIED */ VRM8, VRM8, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WV_M4_TU */ VRM8, VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVFWSUB_WV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWSUB_WV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WV_MF2_MASK_TIED */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WV_MF2_TIED */ VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVFWSUB_WV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVFWSUB_WV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WV_MF4_MASK_TIED */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WV_MF4_TIED */ VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVFWSUB_WV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVID_V_M1 */ VR, AVL, ixlenimm, /* PseudoVID_V_M1_MASK */ VRNoV0, VRNoV0, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVID_V_M1_TU */ VR, VR, AVL, ixlenimm, /* PseudoVID_V_M2 */ VRM2, AVL, ixlenimm, /* PseudoVID_V_M2_MASK */ VRM2NoV0, VRM2NoV0, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVID_V_M2_TU */ VRM2, VRM2, AVL, ixlenimm, /* PseudoVID_V_M4 */ VRM4, AVL, ixlenimm, /* PseudoVID_V_M4_MASK */ VRM4NoV0, VRM4NoV0, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVID_V_M4_TU */ VRM4, VRM4, AVL, ixlenimm, /* PseudoVID_V_M8 */ VRM8, AVL, ixlenimm, /* PseudoVID_V_M8_MASK */ VRM8NoV0, VRM8NoV0, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVID_V_M8_TU */ VRM8, VRM8, AVL, ixlenimm, /* PseudoVID_V_MF2 */ VR, AVL, ixlenimm, /* PseudoVID_V_MF2_MASK */ VRNoV0, VRNoV0, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVID_V_MF2_TU */ VR, VR, AVL, ixlenimm, /* PseudoVID_V_MF4 */ VR, AVL, ixlenimm, /* PseudoVID_V_MF4_MASK */ VRNoV0, VRNoV0, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVID_V_MF4_TU */ VR, VR, AVL, ixlenimm, /* PseudoVID_V_MF8 */ VR, AVL, ixlenimm, /* PseudoVID_V_MF8_MASK */ VRNoV0, VRNoV0, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVID_V_MF8_TU */ VR, VR, AVL, ixlenimm, /* PseudoVIOTA_M_M1 */ VR, VR, AVL, ixlenimm, /* PseudoVIOTA_M_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVIOTA_M_M1_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVIOTA_M_M2 */ VRM2, VR, AVL, ixlenimm, /* PseudoVIOTA_M_M2_MASK */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVIOTA_M_M2_TU */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVIOTA_M_M4 */ VRM4, VR, AVL, ixlenimm, /* PseudoVIOTA_M_M4_MASK */ VRM4NoV0, VRM4NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVIOTA_M_M4_TU */ VRM4, VRM4, VR, AVL, ixlenimm, /* PseudoVIOTA_M_M8 */ VRM8, VR, AVL, ixlenimm, /* PseudoVIOTA_M_M8_MASK */ VRM8NoV0, VRM8NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVIOTA_M_M8_TU */ VRM8, VRM8, VR, AVL, ixlenimm, /* PseudoVIOTA_M_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVIOTA_M_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVIOTA_M_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVIOTA_M_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVIOTA_M_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVIOTA_M_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVIOTA_M_MF8 */ VR, VR, AVL, ixlenimm, /* PseudoVIOTA_M_MF8_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVIOTA_M_MF8_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVLE16FF_V_M1 */ VR, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE16FF_V_M1_MASK */ VRNoV0, GPR, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE16FF_V_M1_TU */ VR, GPR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLE16FF_V_M2 */ VRM2, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE16FF_V_M2_MASK */ VRM2NoV0, GPR, VRM2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE16FF_V_M2_TU */ VRM2, GPR, VRM2, GPRMem, AVL, ixlenimm, /* PseudoVLE16FF_V_M4 */ VRM4, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE16FF_V_M4_MASK */ VRM4NoV0, GPR, VRM4NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE16FF_V_M4_TU */ VRM4, GPR, VRM4, GPRMem, AVL, ixlenimm, /* PseudoVLE16FF_V_M8 */ VRM8, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE16FF_V_M8_MASK */ VRM8NoV0, GPR, VRM8NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE16FF_V_M8_TU */ VRM8, GPR, VRM8, GPRMem, AVL, ixlenimm, /* PseudoVLE16FF_V_MF2 */ VR, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE16FF_V_MF2_MASK */ VRNoV0, GPR, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE16FF_V_MF2_TU */ VR, GPR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLE16FF_V_MF4 */ VR, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE16FF_V_MF4_MASK */ VRNoV0, GPR, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE16FF_V_MF4_TU */ VR, GPR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLE16_V_M1 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVLE16_V_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE16_V_M1_TU */ VR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLE16_V_M2 */ VRM2, GPRMem, AVL, ixlenimm, /* PseudoVLE16_V_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE16_V_M2_TU */ VRM2, VRM2, GPRMem, AVL, ixlenimm, /* PseudoVLE16_V_M4 */ VRM4, GPRMem, AVL, ixlenimm, /* PseudoVLE16_V_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE16_V_M4_TU */ VRM4, VRM4, GPRMem, AVL, ixlenimm, /* PseudoVLE16_V_M8 */ VRM8, GPRMem, AVL, ixlenimm, /* PseudoVLE16_V_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE16_V_M8_TU */ VRM8, VRM8, GPRMem, AVL, ixlenimm, /* PseudoVLE16_V_MF2 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVLE16_V_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE16_V_MF2_TU */ VR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLE16_V_MF4 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVLE16_V_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE16_V_MF4_TU */ VR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLE32FF_V_M1 */ VR, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE32FF_V_M1_MASK */ VRNoV0, GPR, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE32FF_V_M1_TU */ VR, GPR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLE32FF_V_M2 */ VRM2, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE32FF_V_M2_MASK */ VRM2NoV0, GPR, VRM2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE32FF_V_M2_TU */ VRM2, GPR, VRM2, GPRMem, AVL, ixlenimm, /* PseudoVLE32FF_V_M4 */ VRM4, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE32FF_V_M4_MASK */ VRM4NoV0, GPR, VRM4NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE32FF_V_M4_TU */ VRM4, GPR, VRM4, GPRMem, AVL, ixlenimm, /* PseudoVLE32FF_V_M8 */ VRM8, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE32FF_V_M8_MASK */ VRM8NoV0, GPR, VRM8NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE32FF_V_M8_TU */ VRM8, GPR, VRM8, GPRMem, AVL, ixlenimm, /* PseudoVLE32FF_V_MF2 */ VR, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE32FF_V_MF2_MASK */ VRNoV0, GPR, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE32FF_V_MF2_TU */ VR, GPR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLE32_V_M1 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVLE32_V_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE32_V_M1_TU */ VR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLE32_V_M2 */ VRM2, GPRMem, AVL, ixlenimm, /* PseudoVLE32_V_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE32_V_M2_TU */ VRM2, VRM2, GPRMem, AVL, ixlenimm, /* PseudoVLE32_V_M4 */ VRM4, GPRMem, AVL, ixlenimm, /* PseudoVLE32_V_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE32_V_M4_TU */ VRM4, VRM4, GPRMem, AVL, ixlenimm, /* PseudoVLE32_V_M8 */ VRM8, GPRMem, AVL, ixlenimm, /* PseudoVLE32_V_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE32_V_M8_TU */ VRM8, VRM8, GPRMem, AVL, ixlenimm, /* PseudoVLE32_V_MF2 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVLE32_V_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE32_V_MF2_TU */ VR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLE64FF_V_M1 */ VR, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE64FF_V_M1_MASK */ VRNoV0, GPR, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE64FF_V_M1_TU */ VR, GPR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLE64FF_V_M2 */ VRM2, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE64FF_V_M2_MASK */ VRM2NoV0, GPR, VRM2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE64FF_V_M2_TU */ VRM2, GPR, VRM2, GPRMem, AVL, ixlenimm, /* PseudoVLE64FF_V_M4 */ VRM4, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE64FF_V_M4_MASK */ VRM4NoV0, GPR, VRM4NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE64FF_V_M4_TU */ VRM4, GPR, VRM4, GPRMem, AVL, ixlenimm, /* PseudoVLE64FF_V_M8 */ VRM8, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE64FF_V_M8_MASK */ VRM8NoV0, GPR, VRM8NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE64FF_V_M8_TU */ VRM8, GPR, VRM8, GPRMem, AVL, ixlenimm, /* PseudoVLE64_V_M1 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVLE64_V_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE64_V_M1_TU */ VR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLE64_V_M2 */ VRM2, GPRMem, AVL, ixlenimm, /* PseudoVLE64_V_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE64_V_M2_TU */ VRM2, VRM2, GPRMem, AVL, ixlenimm, /* PseudoVLE64_V_M4 */ VRM4, GPRMem, AVL, ixlenimm, /* PseudoVLE64_V_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE64_V_M4_TU */ VRM4, VRM4, GPRMem, AVL, ixlenimm, /* PseudoVLE64_V_M8 */ VRM8, GPRMem, AVL, ixlenimm, /* PseudoVLE64_V_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE64_V_M8_TU */ VRM8, VRM8, GPRMem, AVL, ixlenimm, /* PseudoVLE8FF_V_M1 */ VR, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE8FF_V_M1_MASK */ VRNoV0, GPR, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE8FF_V_M1_TU */ VR, GPR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLE8FF_V_M2 */ VRM2, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE8FF_V_M2_MASK */ VRM2NoV0, GPR, VRM2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE8FF_V_M2_TU */ VRM2, GPR, VRM2, GPRMem, AVL, ixlenimm, /* PseudoVLE8FF_V_M4 */ VRM4, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE8FF_V_M4_MASK */ VRM4NoV0, GPR, VRM4NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE8FF_V_M4_TU */ VRM4, GPR, VRM4, GPRMem, AVL, ixlenimm, /* PseudoVLE8FF_V_M8 */ VRM8, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE8FF_V_M8_MASK */ VRM8NoV0, GPR, VRM8NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE8FF_V_M8_TU */ VRM8, GPR, VRM8, GPRMem, AVL, ixlenimm, /* PseudoVLE8FF_V_MF2 */ VR, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE8FF_V_MF2_MASK */ VRNoV0, GPR, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE8FF_V_MF2_TU */ VR, GPR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLE8FF_V_MF4 */ VR, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE8FF_V_MF4_MASK */ VRNoV0, GPR, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE8FF_V_MF4_TU */ VR, GPR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLE8FF_V_MF8 */ VR, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLE8FF_V_MF8_MASK */ VRNoV0, GPR, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE8FF_V_MF8_TU */ VR, GPR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLE8_V_M1 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVLE8_V_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE8_V_M1_TU */ VR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLE8_V_M2 */ VRM2, GPRMem, AVL, ixlenimm, /* PseudoVLE8_V_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE8_V_M2_TU */ VRM2, VRM2, GPRMem, AVL, ixlenimm, /* PseudoVLE8_V_M4 */ VRM4, GPRMem, AVL, ixlenimm, /* PseudoVLE8_V_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE8_V_M4_TU */ VRM4, VRM4, GPRMem, AVL, ixlenimm, /* PseudoVLE8_V_M8 */ VRM8, GPRMem, AVL, ixlenimm, /* PseudoVLE8_V_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE8_V_M8_TU */ VRM8, VRM8, GPRMem, AVL, ixlenimm, /* PseudoVLE8_V_MF2 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVLE8_V_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE8_V_MF2_TU */ VR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLE8_V_MF4 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVLE8_V_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE8_V_MF4_TU */ VR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLE8_V_MF8 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVLE8_V_MF8_MASK */ VRNoV0, VRNoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLE8_V_MF8_TU */ VR, VR, GPRMem, AVL, ixlenimm, /* PseudoVLM_V_B1 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVLM_V_B16 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVLM_V_B2 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVLM_V_B32 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVLM_V_B4 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVLM_V_B64 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVLM_V_B8 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVLOXEI16_V_M1_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_M1_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_M1_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_M1_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_M1_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_M1_M2_TU */ VRM2, VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_M1_M4 */ VRM4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_M1_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_M1_M4_TU */ VRM4, VRM4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_M1_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_M1_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_M1_MF2_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_M2_M1 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI16_V_M2_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_M2_M1_TU */ VR, VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI16_V_M2_M2 */ VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI16_V_M2_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_M2_M2_TU */ VRM2, VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI16_V_M2_M4 */ VRM4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI16_V_M2_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_M2_M4_TU */ VRM4, VRM4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI16_V_M2_M8 */ VRM8, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI16_V_M2_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_M2_M8_TU */ VRM8, VRM8, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI16_V_M4_M2 */ VRM2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI16_V_M4_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_M4_M2_TU */ VRM2, VRM2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI16_V_M4_M4 */ VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI16_V_M4_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_M4_M4_TU */ VRM4, VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI16_V_M4_M8 */ VRM8, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI16_V_M4_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_M4_M8_TU */ VRM8, VRM8, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI16_V_M8_M4 */ VRM4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI16_V_M8_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_M8_M4_TU */ VRM4, VRM4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI16_V_M8_M8 */ VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI16_V_M8_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_M8_M8_TU */ VRM8, VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI16_V_MF2_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_MF2_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_MF2_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_MF2_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_MF2_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_MF2_M2_TU */ VRM2, VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_MF2_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_MF2_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_MF2_MF2_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_MF2_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_MF2_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_MF2_MF4_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_MF4_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_MF4_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_MF4_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_MF4_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_MF4_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_MF4_MF2_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_MF4_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_MF4_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_MF4_MF4_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_MF4_MF8 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI16_V_MF4_MF8_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI16_V_MF4_MF8_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI32_V_M1_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI32_V_M1_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI32_V_M1_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI32_V_M1_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI32_V_M1_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI32_V_M1_M2_TU */ VRM2, VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI32_V_M1_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI32_V_M1_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI32_V_M1_MF2_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI32_V_M1_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI32_V_M1_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI32_V_M1_MF4_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI32_V_M2_M1 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI32_V_M2_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI32_V_M2_M1_TU */ VR, VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI32_V_M2_M2 */ VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI32_V_M2_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI32_V_M2_M2_TU */ VRM2, VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI32_V_M2_M4 */ VRM4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI32_V_M2_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI32_V_M2_M4_TU */ VRM4, VRM4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI32_V_M2_MF2 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI32_V_M2_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI32_V_M2_MF2_TU */ VR, VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI32_V_M4_M1 */ VR, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI32_V_M4_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI32_V_M4_M1_TU */ VR, VR, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI32_V_M4_M2 */ VRM2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI32_V_M4_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI32_V_M4_M2_TU */ VRM2, VRM2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI32_V_M4_M4 */ VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI32_V_M4_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI32_V_M4_M4_TU */ VRM4, VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI32_V_M4_M8 */ VRM8, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI32_V_M4_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI32_V_M4_M8_TU */ VRM8, VRM8, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI32_V_M8_M2 */ VRM2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI32_V_M8_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI32_V_M8_M2_TU */ VRM2, VRM2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI32_V_M8_M4 */ VRM4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI32_V_M8_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI32_V_M8_M4_TU */ VRM4, VRM4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI32_V_M8_M8 */ VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI32_V_M8_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI32_V_M8_M8_TU */ VRM8, VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI32_V_MF2_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI32_V_MF2_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI32_V_MF2_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI32_V_MF2_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI32_V_MF2_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI32_V_MF2_MF2_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI32_V_MF2_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI32_V_MF2_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI32_V_MF2_MF4_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI32_V_MF2_MF8 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI32_V_MF2_MF8_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI32_V_MF2_MF8_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI64_V_M1_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI64_V_M1_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI64_V_M1_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI64_V_M1_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI64_V_M1_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI64_V_M1_MF2_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI64_V_M1_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI64_V_M1_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI64_V_M1_MF4_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI64_V_M1_MF8 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI64_V_M1_MF8_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI64_V_M1_MF8_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI64_V_M2_M1 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI64_V_M2_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI64_V_M2_M1_TU */ VR, VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI64_V_M2_M2 */ VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI64_V_M2_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI64_V_M2_M2_TU */ VRM2, VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI64_V_M2_MF2 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI64_V_M2_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI64_V_M2_MF2_TU */ VR, VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI64_V_M2_MF4 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI64_V_M2_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI64_V_M2_MF4_TU */ VR, VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI64_V_M4_M1 */ VR, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI64_V_M4_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI64_V_M4_M1_TU */ VR, VR, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI64_V_M4_M2 */ VRM2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI64_V_M4_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI64_V_M4_M2_TU */ VRM2, VRM2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI64_V_M4_M4 */ VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI64_V_M4_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI64_V_M4_M4_TU */ VRM4, VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI64_V_M4_MF2 */ VR, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI64_V_M4_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI64_V_M4_MF2_TU */ VR, VR, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI64_V_M8_M1 */ VR, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI64_V_M8_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI64_V_M8_M1_TU */ VR, VR, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI64_V_M8_M2 */ VRM2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI64_V_M8_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI64_V_M8_M2_TU */ VRM2, VRM2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI64_V_M8_M4 */ VRM4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI64_V_M8_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI64_V_M8_M4_TU */ VRM4, VRM4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI64_V_M8_M8 */ VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI64_V_M8_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI64_V_M8_M8_TU */ VRM8, VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI8_V_M1_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_M1_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_M1_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_M1_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_M1_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_M1_M2_TU */ VRM2, VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_M1_M4 */ VRM4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_M1_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_M1_M4_TU */ VRM4, VRM4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_M1_M8 */ VRM8, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_M1_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_M1_M8_TU */ VRM8, VRM8, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_M2_M2 */ VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI8_V_M2_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_M2_M2_TU */ VRM2, VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI8_V_M2_M4 */ VRM4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI8_V_M2_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_M2_M4_TU */ VRM4, VRM4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI8_V_M2_M8 */ VRM8, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI8_V_M2_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_M2_M8_TU */ VRM8, VRM8, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXEI8_V_M4_M4 */ VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI8_V_M4_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_M4_M4_TU */ VRM4, VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI8_V_M4_M8 */ VRM8, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI8_V_M4_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_M4_M8_TU */ VRM8, VRM8, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXEI8_V_M8_M8 */ VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI8_V_M8_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_M8_M8_TU */ VRM8, VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF2_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF2_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_MF2_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF2_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF2_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_MF2_M2_TU */ VRM2, VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF2_M4 */ VRM4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF2_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_MF2_M4_TU */ VRM4, VRM4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF2_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF2_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_MF2_MF2_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF4_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF4_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_MF4_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF4_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF4_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_MF4_M2_TU */ VRM2, VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF4_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF4_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_MF4_MF2_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF4_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF4_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_MF4_MF4_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF8_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF8_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_MF8_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF8_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF8_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_MF8_MF2_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF8_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF8_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_MF8_MF4_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF8_MF8 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXEI8_V_MF8_MF8_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXEI8_V_MF8_MF8_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M1_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M1_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI16_V_M1_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M1_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M1_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI16_V_M1_M2_TU */ VRN2M2, VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M1_M4 */ VRN2M4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M1_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI16_V_M1_M4_TU */ VRN2M4, VRN2M4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M1_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M1_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI16_V_M1_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M2_M1 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M2_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI16_V_M2_M1_TU */ VRN2M1, VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M2_M2 */ VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M2_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI16_V_M2_M2_TU */ VRN2M2, VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M2_M4 */ VRN2M4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M2_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI16_V_M2_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M4_M2 */ VRN2M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M4_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI16_V_M4_M2_TU */ VRN2M2, VRN2M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M4_M4 */ VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M4_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI16_V_M4_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M8_M4 */ VRN2M4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_M8_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI16_V_M8_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF2_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF2_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF2_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF2_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF2_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF2_M2_TU */ VRN2M2, VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF2_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF2_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF2_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF2_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF2_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF2_MF4_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF4_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF4_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF4_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF4_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF4_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF4_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF4_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF4_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF4_MF4_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF4_MF8 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF4_MF8_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI16_V_MF4_MF8_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M1_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M1_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI32_V_M1_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M1_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M1_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI32_V_M1_M2_TU */ VRN2M2, VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M1_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M1_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI32_V_M1_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M1_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M1_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI32_V_M1_MF4_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M2_M1 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M2_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI32_V_M2_M1_TU */ VRN2M1, VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M2_M2 */ VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M2_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI32_V_M2_M2_TU */ VRN2M2, VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M2_M4 */ VRN2M4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M2_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI32_V_M2_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M2_MF2 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M2_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI32_V_M2_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M4_M1 */ VRN2M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M4_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI32_V_M4_M1_TU */ VRN2M1, VRN2M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M4_M2 */ VRN2M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M4_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI32_V_M4_M2_TU */ VRN2M2, VRN2M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M4_M4 */ VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M4_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI32_V_M4_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M8_M2 */ VRN2M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M8_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI32_V_M8_M2_TU */ VRN2M2, VRN2M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M8_M4 */ VRN2M4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_M8_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI32_V_M8_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_MF2_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_MF2_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI32_V_MF2_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_MF2_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_MF2_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI32_V_MF2_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_MF2_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_MF2_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI32_V_MF2_MF4_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_MF2_MF8 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI32_V_MF2_MF8_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI32_V_MF2_MF8_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M1_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M1_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI64_V_M1_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M1_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M1_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI64_V_M1_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M1_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M1_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI64_V_M1_MF4_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M1_MF8 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M1_MF8_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI64_V_M1_MF8_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M2_M1 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M2_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI64_V_M2_M1_TU */ VRN2M1, VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M2_M2 */ VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M2_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI64_V_M2_M2_TU */ VRN2M2, VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M2_MF2 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M2_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI64_V_M2_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M2_MF4 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M2_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI64_V_M2_MF4_TU */ VRN2M1, VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M4_M1 */ VRN2M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M4_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI64_V_M4_M1_TU */ VRN2M1, VRN2M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M4_M2 */ VRN2M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M4_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI64_V_M4_M2_TU */ VRN2M2, VRN2M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M4_M4 */ VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M4_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI64_V_M4_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M4_MF2 */ VRN2M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M4_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI64_V_M4_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M8_M1 */ VRN2M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M8_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI64_V_M8_M1_TU */ VRN2M1, VRN2M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M8_M2 */ VRN2M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M8_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI64_V_M8_M2_TU */ VRN2M2, VRN2M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M8_M4 */ VRN2M4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG2EI64_V_M8_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI64_V_M8_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_M1_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_M1_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI8_V_M1_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_M1_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_M1_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI8_V_M1_M2_TU */ VRN2M2, VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_M1_M4 */ VRN2M4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_M1_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI8_V_M1_M4_TU */ VRN2M4, VRN2M4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_M2_M2 */ VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_M2_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI8_V_M2_M2_TU */ VRN2M2, VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_M2_M4 */ VRN2M4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_M2_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI8_V_M2_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_M4_M4 */ VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_M4_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI8_V_M4_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF2_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF2_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF2_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF2_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF2_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF2_M2_TU */ VRN2M2, VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF2_M4 */ VRN2M4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF2_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF2_M4_TU */ VRN2M4, VRN2M4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF2_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF2_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF2_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF4_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF4_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF4_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF4_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF4_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF4_M2_TU */ VRN2M2, VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF4_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF4_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF4_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF4_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF4_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF4_MF4_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF8_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF8_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF8_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF8_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF8_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF8_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF8_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF8_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF8_MF4_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF8_MF8 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF8_MF8_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG2EI8_V_MF8_MF8_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_M1_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_M1_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI16_V_M1_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_M1_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_M1_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI16_V_M1_M2_TU */ VRN3M2, VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_M1_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_M1_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI16_V_M1_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_M2_M1 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_M2_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI16_V_M2_M1_TU */ VRN3M1, VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_M2_M2 */ VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_M2_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI16_V_M2_M2_TU */ VRN3M2, VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_M4_M2 */ VRN3M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_M4_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI16_V_M4_M2_TU */ VRN3M2, VRN3M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF2_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF2_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF2_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF2_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF2_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF2_M2_TU */ VRN3M2, VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF2_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF2_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF2_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF2_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF2_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF2_MF4_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF4_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF4_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF4_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF4_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF4_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF4_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF4_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF4_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF4_MF4_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF4_MF8 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF4_MF8_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI16_V_MF4_MF8_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M1_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M1_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI32_V_M1_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M1_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M1_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI32_V_M1_M2_TU */ VRN3M2, VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M1_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M1_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI32_V_M1_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M1_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M1_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI32_V_M1_MF4_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M2_M1 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M2_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI32_V_M2_M1_TU */ VRN3M1, VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M2_M2 */ VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M2_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI32_V_M2_M2_TU */ VRN3M2, VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M2_MF2 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M2_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI32_V_M2_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M4_M1 */ VRN3M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M4_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI32_V_M4_M1_TU */ VRN3M1, VRN3M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M4_M2 */ VRN3M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M4_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI32_V_M4_M2_TU */ VRN3M2, VRN3M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M8_M2 */ VRN3M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_M8_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI32_V_M8_M2_TU */ VRN3M2, VRN3M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_MF2_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_MF2_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI32_V_MF2_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_MF2_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_MF2_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI32_V_MF2_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_MF2_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_MF2_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI32_V_MF2_MF4_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_MF2_MF8 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI32_V_MF2_MF8_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI32_V_MF2_MF8_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M1_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M1_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI64_V_M1_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M1_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M1_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI64_V_M1_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M1_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M1_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI64_V_M1_MF4_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M1_MF8 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M1_MF8_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI64_V_M1_MF8_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M2_M1 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M2_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI64_V_M2_M1_TU */ VRN3M1, VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M2_M2 */ VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M2_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI64_V_M2_M2_TU */ VRN3M2, VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M2_MF2 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M2_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI64_V_M2_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M2_MF4 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M2_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI64_V_M2_MF4_TU */ VRN3M1, VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M4_M1 */ VRN3M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M4_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI64_V_M4_M1_TU */ VRN3M1, VRN3M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M4_M2 */ VRN3M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M4_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI64_V_M4_M2_TU */ VRN3M2, VRN3M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M4_MF2 */ VRN3M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M4_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI64_V_M4_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M8_M1 */ VRN3M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M8_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI64_V_M8_M1_TU */ VRN3M1, VRN3M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M8_M2 */ VRN3M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG3EI64_V_M8_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI64_V_M8_M2_TU */ VRN3M2, VRN3M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_M1_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_M1_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI8_V_M1_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_M1_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_M1_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI8_V_M1_M2_TU */ VRN3M2, VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_M2_M2 */ VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_M2_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI8_V_M2_M2_TU */ VRN3M2, VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF2_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF2_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF2_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF2_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF2_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF2_M2_TU */ VRN3M2, VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF2_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF2_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF2_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF4_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF4_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF4_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF4_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF4_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF4_M2_TU */ VRN3M2, VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF4_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF4_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF4_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF4_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF4_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF4_MF4_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF8_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF8_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF8_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF8_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF8_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF8_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF8_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF8_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF8_MF4_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF8_MF8 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF8_MF8_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG3EI8_V_MF8_MF8_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_M1_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_M1_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI16_V_M1_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_M1_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_M1_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI16_V_M1_M2_TU */ VRN4M2, VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_M1_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_M1_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI16_V_M1_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_M2_M1 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_M2_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI16_V_M2_M1_TU */ VRN4M1, VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_M2_M2 */ VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_M2_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI16_V_M2_M2_TU */ VRN4M2, VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_M4_M2 */ VRN4M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_M4_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI16_V_M4_M2_TU */ VRN4M2, VRN4M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF2_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF2_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF2_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF2_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF2_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF2_M2_TU */ VRN4M2, VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF2_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF2_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF2_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF2_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF2_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF2_MF4_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF4_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF4_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF4_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF4_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF4_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF4_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF4_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF4_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF4_MF4_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF4_MF8 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF4_MF8_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI16_V_MF4_MF8_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M1_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M1_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI32_V_M1_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M1_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M1_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI32_V_M1_M2_TU */ VRN4M2, VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M1_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M1_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI32_V_M1_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M1_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M1_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI32_V_M1_MF4_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M2_M1 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M2_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI32_V_M2_M1_TU */ VRN4M1, VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M2_M2 */ VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M2_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI32_V_M2_M2_TU */ VRN4M2, VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M2_MF2 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M2_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI32_V_M2_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M4_M1 */ VRN4M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M4_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI32_V_M4_M1_TU */ VRN4M1, VRN4M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M4_M2 */ VRN4M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M4_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI32_V_M4_M2_TU */ VRN4M2, VRN4M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M8_M2 */ VRN4M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_M8_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI32_V_M8_M2_TU */ VRN4M2, VRN4M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_MF2_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_MF2_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI32_V_MF2_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_MF2_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_MF2_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI32_V_MF2_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_MF2_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_MF2_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI32_V_MF2_MF4_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_MF2_MF8 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI32_V_MF2_MF8_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI32_V_MF2_MF8_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M1_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M1_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI64_V_M1_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M1_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M1_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI64_V_M1_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M1_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M1_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI64_V_M1_MF4_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M1_MF8 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M1_MF8_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI64_V_M1_MF8_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M2_M1 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M2_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI64_V_M2_M1_TU */ VRN4M1, VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M2_M2 */ VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M2_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI64_V_M2_M2_TU */ VRN4M2, VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M2_MF2 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M2_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI64_V_M2_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M2_MF4 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M2_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI64_V_M2_MF4_TU */ VRN4M1, VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M4_M1 */ VRN4M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M4_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI64_V_M4_M1_TU */ VRN4M1, VRN4M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M4_M2 */ VRN4M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M4_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI64_V_M4_M2_TU */ VRN4M2, VRN4M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M4_MF2 */ VRN4M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M4_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI64_V_M4_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M8_M1 */ VRN4M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M8_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI64_V_M8_M1_TU */ VRN4M1, VRN4M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M8_M2 */ VRN4M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG4EI64_V_M8_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI64_V_M8_M2_TU */ VRN4M2, VRN4M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_M1_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_M1_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI8_V_M1_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_M1_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_M1_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI8_V_M1_M2_TU */ VRN4M2, VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_M2_M2 */ VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_M2_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI8_V_M2_M2_TU */ VRN4M2, VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF2_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF2_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF2_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF2_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF2_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF2_M2_TU */ VRN4M2, VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF2_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF2_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF2_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF4_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF4_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF4_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF4_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF4_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF4_M2_TU */ VRN4M2, VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF4_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF4_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF4_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF4_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF4_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF4_MF4_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF8_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF8_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF8_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF8_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF8_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF8_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF8_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF8_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF8_MF4_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF8_MF8 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF8_MF8_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG4EI8_V_MF8_MF8_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_M1_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_M1_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI16_V_M1_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_M1_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_M1_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI16_V_M1_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_M2_M1 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_M2_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI16_V_M2_M1_TU */ VRN5M1, VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF2_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF2_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF2_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF2_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF2_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF2_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF2_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF2_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF2_MF4_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF4_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF4_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF4_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF4_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF4_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF4_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF4_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF4_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF4_MF4_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF4_MF8 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF4_MF8_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI16_V_MF4_MF8_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_M1_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_M1_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI32_V_M1_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_M1_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_M1_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI32_V_M1_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_M1_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_M1_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI32_V_M1_MF4_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_M2_M1 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_M2_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI32_V_M2_M1_TU */ VRN5M1, VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_M2_MF2 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_M2_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI32_V_M2_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_M4_M1 */ VRN5M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_M4_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI32_V_M4_M1_TU */ VRN5M1, VRN5M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_MF2_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_MF2_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI32_V_MF2_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_MF2_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_MF2_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI32_V_MF2_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_MF2_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_MF2_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI32_V_MF2_MF4_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_MF2_MF8 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI32_V_MF2_MF8_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI32_V_MF2_MF8_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M1_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M1_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI64_V_M1_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M1_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M1_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI64_V_M1_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M1_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M1_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI64_V_M1_MF4_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M1_MF8 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M1_MF8_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI64_V_M1_MF8_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M2_M1 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M2_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI64_V_M2_M1_TU */ VRN5M1, VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M2_MF2 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M2_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI64_V_M2_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M2_MF4 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M2_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI64_V_M2_MF4_TU */ VRN5M1, VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M4_M1 */ VRN5M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M4_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI64_V_M4_M1_TU */ VRN5M1, VRN5M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M4_MF2 */ VRN5M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M4_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI64_V_M4_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M8_M1 */ VRN5M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG5EI64_V_M8_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI64_V_M8_M1_TU */ VRN5M1, VRN5M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_M1_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_M1_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI8_V_M1_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF2_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF2_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF2_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF2_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF2_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF2_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF4_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF4_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF4_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF4_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF4_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF4_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF4_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF4_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF4_MF4_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF8_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF8_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF8_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF8_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF8_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF8_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF8_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF8_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF8_MF4_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF8_MF8 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF8_MF8_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG5EI8_V_MF8_MF8_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_M1_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_M1_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI16_V_M1_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_M1_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_M1_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI16_V_M1_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_M2_M1 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_M2_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI16_V_M2_M1_TU */ VRN6M1, VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF2_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF2_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF2_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF2_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF2_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF2_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF2_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF2_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF2_MF4_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF4_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF4_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF4_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF4_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF4_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF4_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF4_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF4_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF4_MF4_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF4_MF8 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF4_MF8_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI16_V_MF4_MF8_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_M1_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_M1_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI32_V_M1_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_M1_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_M1_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI32_V_M1_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_M1_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_M1_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI32_V_M1_MF4_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_M2_M1 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_M2_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI32_V_M2_M1_TU */ VRN6M1, VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_M2_MF2 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_M2_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI32_V_M2_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_M4_M1 */ VRN6M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_M4_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI32_V_M4_M1_TU */ VRN6M1, VRN6M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_MF2_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_MF2_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI32_V_MF2_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_MF2_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_MF2_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI32_V_MF2_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_MF2_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_MF2_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI32_V_MF2_MF4_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_MF2_MF8 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI32_V_MF2_MF8_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI32_V_MF2_MF8_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M1_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M1_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI64_V_M1_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M1_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M1_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI64_V_M1_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M1_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M1_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI64_V_M1_MF4_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M1_MF8 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M1_MF8_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI64_V_M1_MF8_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M2_M1 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M2_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI64_V_M2_M1_TU */ VRN6M1, VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M2_MF2 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M2_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI64_V_M2_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M2_MF4 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M2_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI64_V_M2_MF4_TU */ VRN6M1, VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M4_M1 */ VRN6M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M4_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI64_V_M4_M1_TU */ VRN6M1, VRN6M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M4_MF2 */ VRN6M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M4_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI64_V_M4_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M8_M1 */ VRN6M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG6EI64_V_M8_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI64_V_M8_M1_TU */ VRN6M1, VRN6M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_M1_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_M1_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI8_V_M1_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF2_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF2_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF2_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF2_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF2_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF2_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF4_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF4_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF4_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF4_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF4_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF4_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF4_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF4_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF4_MF4_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF8_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF8_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF8_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF8_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF8_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF8_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF8_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF8_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF8_MF4_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF8_MF8 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF8_MF8_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG6EI8_V_MF8_MF8_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_M1_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_M1_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI16_V_M1_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_M1_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_M1_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI16_V_M1_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_M2_M1 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_M2_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI16_V_M2_M1_TU */ VRN7M1, VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF2_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF2_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF2_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF2_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF2_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF2_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF2_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF2_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF2_MF4_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF4_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF4_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF4_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF4_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF4_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF4_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF4_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF4_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF4_MF4_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF4_MF8 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF4_MF8_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI16_V_MF4_MF8_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_M1_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_M1_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI32_V_M1_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_M1_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_M1_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI32_V_M1_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_M1_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_M1_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI32_V_M1_MF4_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_M2_M1 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_M2_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI32_V_M2_M1_TU */ VRN7M1, VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_M2_MF2 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_M2_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI32_V_M2_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_M4_M1 */ VRN7M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_M4_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI32_V_M4_M1_TU */ VRN7M1, VRN7M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_MF2_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_MF2_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI32_V_MF2_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_MF2_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_MF2_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI32_V_MF2_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_MF2_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_MF2_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI32_V_MF2_MF4_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_MF2_MF8 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI32_V_MF2_MF8_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI32_V_MF2_MF8_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M1_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M1_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI64_V_M1_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M1_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M1_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI64_V_M1_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M1_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M1_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI64_V_M1_MF4_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M1_MF8 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M1_MF8_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI64_V_M1_MF8_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M2_M1 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M2_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI64_V_M2_M1_TU */ VRN7M1, VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M2_MF2 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M2_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI64_V_M2_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M2_MF4 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M2_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI64_V_M2_MF4_TU */ VRN7M1, VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M4_M1 */ VRN7M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M4_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI64_V_M4_M1_TU */ VRN7M1, VRN7M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M4_MF2 */ VRN7M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M4_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI64_V_M4_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M8_M1 */ VRN7M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG7EI64_V_M8_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI64_V_M8_M1_TU */ VRN7M1, VRN7M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_M1_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_M1_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI8_V_M1_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF2_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF2_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF2_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF2_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF2_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF2_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF4_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF4_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF4_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF4_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF4_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF4_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF4_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF4_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF4_MF4_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF8_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF8_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF8_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF8_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF8_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF8_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF8_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF8_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF8_MF4_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF8_MF8 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF8_MF8_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG7EI8_V_MF8_MF8_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_M1_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_M1_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI16_V_M1_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_M1_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_M1_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI16_V_M1_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_M2_M1 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_M2_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI16_V_M2_M1_TU */ VRN8M1, VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF2_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF2_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF2_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF2_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF2_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF2_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF2_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF2_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF2_MF4_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF4_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF4_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF4_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF4_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF4_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF4_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF4_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF4_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF4_MF4_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF4_MF8 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF4_MF8_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI16_V_MF4_MF8_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_M1_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_M1_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI32_V_M1_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_M1_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_M1_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI32_V_M1_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_M1_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_M1_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI32_V_M1_MF4_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_M2_M1 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_M2_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI32_V_M2_M1_TU */ VRN8M1, VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_M2_MF2 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_M2_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI32_V_M2_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_M4_M1 */ VRN8M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_M4_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI32_V_M4_M1_TU */ VRN8M1, VRN8M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_MF2_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_MF2_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI32_V_MF2_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_MF2_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_MF2_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI32_V_MF2_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_MF2_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_MF2_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI32_V_MF2_MF4_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_MF2_MF8 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI32_V_MF2_MF8_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI32_V_MF2_MF8_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M1_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M1_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI64_V_M1_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M1_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M1_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI64_V_M1_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M1_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M1_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI64_V_M1_MF4_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M1_MF8 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M1_MF8_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI64_V_M1_MF8_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M2_M1 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M2_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI64_V_M2_M1_TU */ VRN8M1, VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M2_MF2 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M2_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI64_V_M2_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M2_MF4 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M2_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI64_V_M2_MF4_TU */ VRN8M1, VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M4_M1 */ VRN8M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M4_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI64_V_M4_M1_TU */ VRN8M1, VRN8M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M4_MF2 */ VRN8M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M4_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI64_V_M4_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M8_M1 */ VRN8M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG8EI64_V_M8_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI64_V_M8_M1_TU */ VRN8M1, VRN8M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_M1_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_M1_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI8_V_M1_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF2_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF2_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF2_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF2_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF2_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF2_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF4_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF4_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF4_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF4_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF4_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF4_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF4_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF4_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF4_MF4_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF8_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF8_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF8_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF8_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF8_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF8_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF8_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF8_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF8_MF4_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF8_MF8 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF8_MF8_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLOXSEG8EI8_V_MF8_MF8_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLSE16_V_M1 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE16_V_M1_MASK */ VRNoV0, VRNoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE16_V_M1_TU */ VR, VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE16_V_M2 */ VRM2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE16_V_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE16_V_M2_TU */ VRM2, VRM2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE16_V_M4 */ VRM4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE16_V_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE16_V_M4_TU */ VRM4, VRM4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE16_V_M8 */ VRM8, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE16_V_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE16_V_M8_TU */ VRM8, VRM8, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE16_V_MF2 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE16_V_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE16_V_MF2_TU */ VR, VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE16_V_MF4 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE16_V_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE16_V_MF4_TU */ VR, VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE32_V_M1 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE32_V_M1_MASK */ VRNoV0, VRNoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE32_V_M1_TU */ VR, VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE32_V_M2 */ VRM2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE32_V_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE32_V_M2_TU */ VRM2, VRM2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE32_V_M4 */ VRM4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE32_V_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE32_V_M4_TU */ VRM4, VRM4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE32_V_M8 */ VRM8, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE32_V_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE32_V_M8_TU */ VRM8, VRM8, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE32_V_MF2 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE32_V_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE32_V_MF2_TU */ VR, VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE64_V_M1 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE64_V_M1_MASK */ VRNoV0, VRNoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE64_V_M1_TU */ VR, VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE64_V_M2 */ VRM2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE64_V_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE64_V_M2_TU */ VRM2, VRM2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE64_V_M4 */ VRM4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE64_V_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE64_V_M4_TU */ VRM4, VRM4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE64_V_M8 */ VRM8, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE64_V_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE64_V_M8_TU */ VRM8, VRM8, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE8_V_M1 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE8_V_M1_MASK */ VRNoV0, VRNoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE8_V_M1_TU */ VR, VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE8_V_M2 */ VRM2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE8_V_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE8_V_M2_TU */ VRM2, VRM2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE8_V_M4 */ VRM4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE8_V_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE8_V_M4_TU */ VRM4, VRM4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE8_V_M8 */ VRM8, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE8_V_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE8_V_M8_TU */ VRM8, VRM8, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE8_V_MF2 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE8_V_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE8_V_MF2_TU */ VR, VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE8_V_MF4 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE8_V_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE8_V_MF4_TU */ VR, VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE8_V_MF8 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSE8_V_MF8_MASK */ VRNoV0, VRNoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSE8_V_MF8_TU */ VR, VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSEG2E16FF_V_M1 */ VRN2M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E16FF_V_M1_MASK */ VRN2M1NoV0, GPR, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E16FF_V_M1_TU */ VRN2M1, GPR, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E16FF_V_M2 */ VRN2M2, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E16FF_V_M2_MASK */ VRN2M2NoV0, GPR, VRN2M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E16FF_V_M2_TU */ VRN2M2, GPR, VRN2M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E16FF_V_M4 */ VRN2M4, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E16FF_V_M4_MASK */ VRN2M4NoV0, GPR, VRN2M4NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E16FF_V_M4_TU */ VRN2M4, GPR, VRN2M4, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E16FF_V_MF2 */ VRN2M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E16FF_V_MF2_MASK */ VRN2M1NoV0, GPR, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E16FF_V_MF2_TU */ VRN2M1, GPR, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E16FF_V_MF4 */ VRN2M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E16FF_V_MF4_MASK */ VRN2M1NoV0, GPR, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E16FF_V_MF4_TU */ VRN2M1, GPR, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E16_V_M1 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E16_V_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E16_V_M1_TU */ VRN2M1, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E16_V_M2 */ VRN2M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E16_V_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E16_V_M2_TU */ VRN2M2, VRN2M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E16_V_M4 */ VRN2M4, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E16_V_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E16_V_M4_TU */ VRN2M4, VRN2M4, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E16_V_MF2 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E16_V_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E16_V_MF2_TU */ VRN2M1, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E16_V_MF4 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E16_V_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E16_V_MF4_TU */ VRN2M1, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E32FF_V_M1 */ VRN2M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E32FF_V_M1_MASK */ VRN2M1NoV0, GPR, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E32FF_V_M1_TU */ VRN2M1, GPR, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E32FF_V_M2 */ VRN2M2, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E32FF_V_M2_MASK */ VRN2M2NoV0, GPR, VRN2M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E32FF_V_M2_TU */ VRN2M2, GPR, VRN2M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E32FF_V_M4 */ VRN2M4, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E32FF_V_M4_MASK */ VRN2M4NoV0, GPR, VRN2M4NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E32FF_V_M4_TU */ VRN2M4, GPR, VRN2M4, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E32FF_V_MF2 */ VRN2M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E32FF_V_MF2_MASK */ VRN2M1NoV0, GPR, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E32FF_V_MF2_TU */ VRN2M1, GPR, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E32_V_M1 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E32_V_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E32_V_M1_TU */ VRN2M1, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E32_V_M2 */ VRN2M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E32_V_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E32_V_M2_TU */ VRN2M2, VRN2M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E32_V_M4 */ VRN2M4, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E32_V_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E32_V_M4_TU */ VRN2M4, VRN2M4, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E32_V_MF2 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E32_V_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E32_V_MF2_TU */ VRN2M1, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E64FF_V_M1 */ VRN2M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E64FF_V_M1_MASK */ VRN2M1NoV0, GPR, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E64FF_V_M1_TU */ VRN2M1, GPR, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E64FF_V_M2 */ VRN2M2, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E64FF_V_M2_MASK */ VRN2M2NoV0, GPR, VRN2M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E64FF_V_M2_TU */ VRN2M2, GPR, VRN2M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E64FF_V_M4 */ VRN2M4, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E64FF_V_M4_MASK */ VRN2M4NoV0, GPR, VRN2M4NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E64FF_V_M4_TU */ VRN2M4, GPR, VRN2M4, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E64_V_M1 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E64_V_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E64_V_M1_TU */ VRN2M1, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E64_V_M2 */ VRN2M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E64_V_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E64_V_M2_TU */ VRN2M2, VRN2M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E64_V_M4 */ VRN2M4, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E64_V_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E64_V_M4_TU */ VRN2M4, VRN2M4, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8FF_V_M1 */ VRN2M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8FF_V_M1_MASK */ VRN2M1NoV0, GPR, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E8FF_V_M1_TU */ VRN2M1, GPR, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8FF_V_M2 */ VRN2M2, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8FF_V_M2_MASK */ VRN2M2NoV0, GPR, VRN2M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E8FF_V_M2_TU */ VRN2M2, GPR, VRN2M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8FF_V_M4 */ VRN2M4, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8FF_V_M4_MASK */ VRN2M4NoV0, GPR, VRN2M4NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E8FF_V_M4_TU */ VRN2M4, GPR, VRN2M4, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8FF_V_MF2 */ VRN2M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8FF_V_MF2_MASK */ VRN2M1NoV0, GPR, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E8FF_V_MF2_TU */ VRN2M1, GPR, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8FF_V_MF4 */ VRN2M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8FF_V_MF4_MASK */ VRN2M1NoV0, GPR, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E8FF_V_MF4_TU */ VRN2M1, GPR, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8FF_V_MF8 */ VRN2M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8FF_V_MF8_MASK */ VRN2M1NoV0, GPR, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E8FF_V_MF8_TU */ VRN2M1, GPR, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8_V_M1 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8_V_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E8_V_M1_TU */ VRN2M1, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8_V_M2 */ VRN2M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8_V_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E8_V_M2_TU */ VRN2M2, VRN2M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8_V_M4 */ VRN2M4, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8_V_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E8_V_M4_TU */ VRN2M4, VRN2M4, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8_V_MF2 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8_V_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E8_V_MF2_TU */ VRN2M1, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8_V_MF4 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8_V_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E8_V_MF4_TU */ VRN2M1, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8_V_MF8 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG2E8_V_MF8_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG2E8_V_MF8_TU */ VRN2M1, VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E16FF_V_M1 */ VRN3M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E16FF_V_M1_MASK */ VRN3M1NoV0, GPR, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E16FF_V_M1_TU */ VRN3M1, GPR, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E16FF_V_M2 */ VRN3M2, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E16FF_V_M2_MASK */ VRN3M2NoV0, GPR, VRN3M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E16FF_V_M2_TU */ VRN3M2, GPR, VRN3M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E16FF_V_MF2 */ VRN3M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E16FF_V_MF2_MASK */ VRN3M1NoV0, GPR, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E16FF_V_MF2_TU */ VRN3M1, GPR, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E16FF_V_MF4 */ VRN3M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E16FF_V_MF4_MASK */ VRN3M1NoV0, GPR, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E16FF_V_MF4_TU */ VRN3M1, GPR, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E16_V_M1 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E16_V_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E16_V_M1_TU */ VRN3M1, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E16_V_M2 */ VRN3M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E16_V_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E16_V_M2_TU */ VRN3M2, VRN3M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E16_V_MF2 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E16_V_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E16_V_MF2_TU */ VRN3M1, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E16_V_MF4 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E16_V_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E16_V_MF4_TU */ VRN3M1, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E32FF_V_M1 */ VRN3M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E32FF_V_M1_MASK */ VRN3M1NoV0, GPR, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E32FF_V_M1_TU */ VRN3M1, GPR, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E32FF_V_M2 */ VRN3M2, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E32FF_V_M2_MASK */ VRN3M2NoV0, GPR, VRN3M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E32FF_V_M2_TU */ VRN3M2, GPR, VRN3M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E32FF_V_MF2 */ VRN3M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E32FF_V_MF2_MASK */ VRN3M1NoV0, GPR, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E32FF_V_MF2_TU */ VRN3M1, GPR, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E32_V_M1 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E32_V_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E32_V_M1_TU */ VRN3M1, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E32_V_M2 */ VRN3M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E32_V_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E32_V_M2_TU */ VRN3M2, VRN3M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E32_V_MF2 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E32_V_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E32_V_MF2_TU */ VRN3M1, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E64FF_V_M1 */ VRN3M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E64FF_V_M1_MASK */ VRN3M1NoV0, GPR, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E64FF_V_M1_TU */ VRN3M1, GPR, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E64FF_V_M2 */ VRN3M2, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E64FF_V_M2_MASK */ VRN3M2NoV0, GPR, VRN3M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E64FF_V_M2_TU */ VRN3M2, GPR, VRN3M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E64_V_M1 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E64_V_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E64_V_M1_TU */ VRN3M1, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E64_V_M2 */ VRN3M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E64_V_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E64_V_M2_TU */ VRN3M2, VRN3M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8FF_V_M1 */ VRN3M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8FF_V_M1_MASK */ VRN3M1NoV0, GPR, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E8FF_V_M1_TU */ VRN3M1, GPR, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8FF_V_M2 */ VRN3M2, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8FF_V_M2_MASK */ VRN3M2NoV0, GPR, VRN3M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E8FF_V_M2_TU */ VRN3M2, GPR, VRN3M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8FF_V_MF2 */ VRN3M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8FF_V_MF2_MASK */ VRN3M1NoV0, GPR, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E8FF_V_MF2_TU */ VRN3M1, GPR, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8FF_V_MF4 */ VRN3M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8FF_V_MF4_MASK */ VRN3M1NoV0, GPR, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E8FF_V_MF4_TU */ VRN3M1, GPR, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8FF_V_MF8 */ VRN3M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8FF_V_MF8_MASK */ VRN3M1NoV0, GPR, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E8FF_V_MF8_TU */ VRN3M1, GPR, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8_V_M1 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8_V_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E8_V_M1_TU */ VRN3M1, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8_V_M2 */ VRN3M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8_V_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E8_V_M2_TU */ VRN3M2, VRN3M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8_V_MF2 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8_V_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E8_V_MF2_TU */ VRN3M1, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8_V_MF4 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8_V_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E8_V_MF4_TU */ VRN3M1, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8_V_MF8 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG3E8_V_MF8_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG3E8_V_MF8_TU */ VRN3M1, VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E16FF_V_M1 */ VRN4M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E16FF_V_M1_MASK */ VRN4M1NoV0, GPR, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E16FF_V_M1_TU */ VRN4M1, GPR, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E16FF_V_M2 */ VRN4M2, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E16FF_V_M2_MASK */ VRN4M2NoV0, GPR, VRN4M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E16FF_V_M2_TU */ VRN4M2, GPR, VRN4M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E16FF_V_MF2 */ VRN4M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E16FF_V_MF2_MASK */ VRN4M1NoV0, GPR, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E16FF_V_MF2_TU */ VRN4M1, GPR, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E16FF_V_MF4 */ VRN4M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E16FF_V_MF4_MASK */ VRN4M1NoV0, GPR, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E16FF_V_MF4_TU */ VRN4M1, GPR, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E16_V_M1 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E16_V_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E16_V_M1_TU */ VRN4M1, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E16_V_M2 */ VRN4M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E16_V_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E16_V_M2_TU */ VRN4M2, VRN4M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E16_V_MF2 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E16_V_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E16_V_MF2_TU */ VRN4M1, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E16_V_MF4 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E16_V_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E16_V_MF4_TU */ VRN4M1, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E32FF_V_M1 */ VRN4M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E32FF_V_M1_MASK */ VRN4M1NoV0, GPR, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E32FF_V_M1_TU */ VRN4M1, GPR, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E32FF_V_M2 */ VRN4M2, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E32FF_V_M2_MASK */ VRN4M2NoV0, GPR, VRN4M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E32FF_V_M2_TU */ VRN4M2, GPR, VRN4M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E32FF_V_MF2 */ VRN4M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E32FF_V_MF2_MASK */ VRN4M1NoV0, GPR, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E32FF_V_MF2_TU */ VRN4M1, GPR, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E32_V_M1 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E32_V_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E32_V_M1_TU */ VRN4M1, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E32_V_M2 */ VRN4M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E32_V_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E32_V_M2_TU */ VRN4M2, VRN4M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E32_V_MF2 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E32_V_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E32_V_MF2_TU */ VRN4M1, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E64FF_V_M1 */ VRN4M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E64FF_V_M1_MASK */ VRN4M1NoV0, GPR, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E64FF_V_M1_TU */ VRN4M1, GPR, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E64FF_V_M2 */ VRN4M2, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E64FF_V_M2_MASK */ VRN4M2NoV0, GPR, VRN4M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E64FF_V_M2_TU */ VRN4M2, GPR, VRN4M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E64_V_M1 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E64_V_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E64_V_M1_TU */ VRN4M1, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E64_V_M2 */ VRN4M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E64_V_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E64_V_M2_TU */ VRN4M2, VRN4M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8FF_V_M1 */ VRN4M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8FF_V_M1_MASK */ VRN4M1NoV0, GPR, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E8FF_V_M1_TU */ VRN4M1, GPR, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8FF_V_M2 */ VRN4M2, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8FF_V_M2_MASK */ VRN4M2NoV0, GPR, VRN4M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E8FF_V_M2_TU */ VRN4M2, GPR, VRN4M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8FF_V_MF2 */ VRN4M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8FF_V_MF2_MASK */ VRN4M1NoV0, GPR, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E8FF_V_MF2_TU */ VRN4M1, GPR, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8FF_V_MF4 */ VRN4M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8FF_V_MF4_MASK */ VRN4M1NoV0, GPR, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E8FF_V_MF4_TU */ VRN4M1, GPR, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8FF_V_MF8 */ VRN4M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8FF_V_MF8_MASK */ VRN4M1NoV0, GPR, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E8FF_V_MF8_TU */ VRN4M1, GPR, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8_V_M1 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8_V_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E8_V_M1_TU */ VRN4M1, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8_V_M2 */ VRN4M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8_V_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E8_V_M2_TU */ VRN4M2, VRN4M2, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8_V_MF2 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8_V_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E8_V_MF2_TU */ VRN4M1, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8_V_MF4 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8_V_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E8_V_MF4_TU */ VRN4M1, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8_V_MF8 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG4E8_V_MF8_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG4E8_V_MF8_TU */ VRN4M1, VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E16FF_V_M1 */ VRN5M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E16FF_V_M1_MASK */ VRN5M1NoV0, GPR, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E16FF_V_M1_TU */ VRN5M1, GPR, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E16FF_V_MF2 */ VRN5M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E16FF_V_MF2_MASK */ VRN5M1NoV0, GPR, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E16FF_V_MF2_TU */ VRN5M1, GPR, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E16FF_V_MF4 */ VRN5M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E16FF_V_MF4_MASK */ VRN5M1NoV0, GPR, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E16FF_V_MF4_TU */ VRN5M1, GPR, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E16_V_M1 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E16_V_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E16_V_M1_TU */ VRN5M1, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E16_V_MF2 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E16_V_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E16_V_MF2_TU */ VRN5M1, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E16_V_MF4 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E16_V_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E16_V_MF4_TU */ VRN5M1, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E32FF_V_M1 */ VRN5M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E32FF_V_M1_MASK */ VRN5M1NoV0, GPR, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E32FF_V_M1_TU */ VRN5M1, GPR, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E32FF_V_MF2 */ VRN5M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E32FF_V_MF2_MASK */ VRN5M1NoV0, GPR, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E32FF_V_MF2_TU */ VRN5M1, GPR, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E32_V_M1 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E32_V_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E32_V_M1_TU */ VRN5M1, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E32_V_MF2 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E32_V_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E32_V_MF2_TU */ VRN5M1, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E64FF_V_M1 */ VRN5M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E64FF_V_M1_MASK */ VRN5M1NoV0, GPR, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E64FF_V_M1_TU */ VRN5M1, GPR, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E64_V_M1 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E64_V_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E64_V_M1_TU */ VRN5M1, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E8FF_V_M1 */ VRN5M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E8FF_V_M1_MASK */ VRN5M1NoV0, GPR, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E8FF_V_M1_TU */ VRN5M1, GPR, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E8FF_V_MF2 */ VRN5M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E8FF_V_MF2_MASK */ VRN5M1NoV0, GPR, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E8FF_V_MF2_TU */ VRN5M1, GPR, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E8FF_V_MF4 */ VRN5M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E8FF_V_MF4_MASK */ VRN5M1NoV0, GPR, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E8FF_V_MF4_TU */ VRN5M1, GPR, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E8FF_V_MF8 */ VRN5M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E8FF_V_MF8_MASK */ VRN5M1NoV0, GPR, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E8FF_V_MF8_TU */ VRN5M1, GPR, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E8_V_M1 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E8_V_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E8_V_M1_TU */ VRN5M1, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E8_V_MF2 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E8_V_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E8_V_MF2_TU */ VRN5M1, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E8_V_MF4 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E8_V_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E8_V_MF4_TU */ VRN5M1, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E8_V_MF8 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG5E8_V_MF8_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG5E8_V_MF8_TU */ VRN5M1, VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E16FF_V_M1 */ VRN6M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E16FF_V_M1_MASK */ VRN6M1NoV0, GPR, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E16FF_V_M1_TU */ VRN6M1, GPR, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E16FF_V_MF2 */ VRN6M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E16FF_V_MF2_MASK */ VRN6M1NoV0, GPR, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E16FF_V_MF2_TU */ VRN6M1, GPR, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E16FF_V_MF4 */ VRN6M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E16FF_V_MF4_MASK */ VRN6M1NoV0, GPR, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E16FF_V_MF4_TU */ VRN6M1, GPR, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E16_V_M1 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E16_V_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E16_V_M1_TU */ VRN6M1, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E16_V_MF2 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E16_V_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E16_V_MF2_TU */ VRN6M1, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E16_V_MF4 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E16_V_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E16_V_MF4_TU */ VRN6M1, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E32FF_V_M1 */ VRN6M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E32FF_V_M1_MASK */ VRN6M1NoV0, GPR, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E32FF_V_M1_TU */ VRN6M1, GPR, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E32FF_V_MF2 */ VRN6M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E32FF_V_MF2_MASK */ VRN6M1NoV0, GPR, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E32FF_V_MF2_TU */ VRN6M1, GPR, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E32_V_M1 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E32_V_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E32_V_M1_TU */ VRN6M1, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E32_V_MF2 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E32_V_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E32_V_MF2_TU */ VRN6M1, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E64FF_V_M1 */ VRN6M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E64FF_V_M1_MASK */ VRN6M1NoV0, GPR, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E64FF_V_M1_TU */ VRN6M1, GPR, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E64_V_M1 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E64_V_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E64_V_M1_TU */ VRN6M1, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E8FF_V_M1 */ VRN6M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E8FF_V_M1_MASK */ VRN6M1NoV0, GPR, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E8FF_V_M1_TU */ VRN6M1, GPR, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E8FF_V_MF2 */ VRN6M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E8FF_V_MF2_MASK */ VRN6M1NoV0, GPR, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E8FF_V_MF2_TU */ VRN6M1, GPR, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E8FF_V_MF4 */ VRN6M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E8FF_V_MF4_MASK */ VRN6M1NoV0, GPR, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E8FF_V_MF4_TU */ VRN6M1, GPR, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E8FF_V_MF8 */ VRN6M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E8FF_V_MF8_MASK */ VRN6M1NoV0, GPR, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E8FF_V_MF8_TU */ VRN6M1, GPR, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E8_V_M1 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E8_V_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E8_V_M1_TU */ VRN6M1, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E8_V_MF2 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E8_V_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E8_V_MF2_TU */ VRN6M1, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E8_V_MF4 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E8_V_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E8_V_MF4_TU */ VRN6M1, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E8_V_MF8 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG6E8_V_MF8_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG6E8_V_MF8_TU */ VRN6M1, VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E16FF_V_M1 */ VRN7M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E16FF_V_M1_MASK */ VRN7M1NoV0, GPR, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E16FF_V_M1_TU */ VRN7M1, GPR, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E16FF_V_MF2 */ VRN7M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E16FF_V_MF2_MASK */ VRN7M1NoV0, GPR, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E16FF_V_MF2_TU */ VRN7M1, GPR, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E16FF_V_MF4 */ VRN7M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E16FF_V_MF4_MASK */ VRN7M1NoV0, GPR, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E16FF_V_MF4_TU */ VRN7M1, GPR, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E16_V_M1 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E16_V_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E16_V_M1_TU */ VRN7M1, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E16_V_MF2 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E16_V_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E16_V_MF2_TU */ VRN7M1, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E16_V_MF4 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E16_V_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E16_V_MF4_TU */ VRN7M1, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E32FF_V_M1 */ VRN7M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E32FF_V_M1_MASK */ VRN7M1NoV0, GPR, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E32FF_V_M1_TU */ VRN7M1, GPR, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E32FF_V_MF2 */ VRN7M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E32FF_V_MF2_MASK */ VRN7M1NoV0, GPR, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E32FF_V_MF2_TU */ VRN7M1, GPR, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E32_V_M1 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E32_V_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E32_V_M1_TU */ VRN7M1, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E32_V_MF2 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E32_V_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E32_V_MF2_TU */ VRN7M1, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E64FF_V_M1 */ VRN7M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E64FF_V_M1_MASK */ VRN7M1NoV0, GPR, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E64FF_V_M1_TU */ VRN7M1, GPR, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E64_V_M1 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E64_V_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E64_V_M1_TU */ VRN7M1, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E8FF_V_M1 */ VRN7M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E8FF_V_M1_MASK */ VRN7M1NoV0, GPR, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E8FF_V_M1_TU */ VRN7M1, GPR, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E8FF_V_MF2 */ VRN7M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E8FF_V_MF2_MASK */ VRN7M1NoV0, GPR, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E8FF_V_MF2_TU */ VRN7M1, GPR, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E8FF_V_MF4 */ VRN7M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E8FF_V_MF4_MASK */ VRN7M1NoV0, GPR, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E8FF_V_MF4_TU */ VRN7M1, GPR, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E8FF_V_MF8 */ VRN7M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E8FF_V_MF8_MASK */ VRN7M1NoV0, GPR, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E8FF_V_MF8_TU */ VRN7M1, GPR, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E8_V_M1 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E8_V_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E8_V_M1_TU */ VRN7M1, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E8_V_MF2 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E8_V_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E8_V_MF2_TU */ VRN7M1, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E8_V_MF4 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E8_V_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E8_V_MF4_TU */ VRN7M1, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E8_V_MF8 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG7E8_V_MF8_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG7E8_V_MF8_TU */ VRN7M1, VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E16FF_V_M1 */ VRN8M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E16FF_V_M1_MASK */ VRN8M1NoV0, GPR, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E16FF_V_M1_TU */ VRN8M1, GPR, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E16FF_V_MF2 */ VRN8M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E16FF_V_MF2_MASK */ VRN8M1NoV0, GPR, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E16FF_V_MF2_TU */ VRN8M1, GPR, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E16FF_V_MF4 */ VRN8M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E16FF_V_MF4_MASK */ VRN8M1NoV0, GPR, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E16FF_V_MF4_TU */ VRN8M1, GPR, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E16_V_M1 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E16_V_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E16_V_M1_TU */ VRN8M1, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E16_V_MF2 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E16_V_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E16_V_MF2_TU */ VRN8M1, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E16_V_MF4 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E16_V_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E16_V_MF4_TU */ VRN8M1, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E32FF_V_M1 */ VRN8M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E32FF_V_M1_MASK */ VRN8M1NoV0, GPR, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E32FF_V_M1_TU */ VRN8M1, GPR, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E32FF_V_MF2 */ VRN8M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E32FF_V_MF2_MASK */ VRN8M1NoV0, GPR, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E32FF_V_MF2_TU */ VRN8M1, GPR, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E32_V_M1 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E32_V_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E32_V_M1_TU */ VRN8M1, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E32_V_MF2 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E32_V_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E32_V_MF2_TU */ VRN8M1, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E64FF_V_M1 */ VRN8M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E64FF_V_M1_MASK */ VRN8M1NoV0, GPR, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E64FF_V_M1_TU */ VRN8M1, GPR, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E64_V_M1 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E64_V_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E64_V_M1_TU */ VRN8M1, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E8FF_V_M1 */ VRN8M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E8FF_V_M1_MASK */ VRN8M1NoV0, GPR, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E8FF_V_M1_TU */ VRN8M1, GPR, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E8FF_V_MF2 */ VRN8M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E8FF_V_MF2_MASK */ VRN8M1NoV0, GPR, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E8FF_V_MF2_TU */ VRN8M1, GPR, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E8FF_V_MF4 */ VRN8M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E8FF_V_MF4_MASK */ VRN8M1NoV0, GPR, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E8FF_V_MF4_TU */ VRN8M1, GPR, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E8FF_V_MF8 */ VRN8M1, GPR, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E8FF_V_MF8_MASK */ VRN8M1NoV0, GPR, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E8FF_V_MF8_TU */ VRN8M1, GPR, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E8_V_M1 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E8_V_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E8_V_M1_TU */ VRN8M1, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E8_V_MF2 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E8_V_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E8_V_MF2_TU */ VRN8M1, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E8_V_MF4 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E8_V_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E8_V_MF4_TU */ VRN8M1, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E8_V_MF8 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSEG8E8_V_MF8_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSEG8E8_V_MF8_TU */ VRN8M1, VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVLSSEG2E16_V_M1 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E16_V_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG2E16_V_M1_TU */ VRN2M1, VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E16_V_M2 */ VRN2M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E16_V_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG2E16_V_M2_TU */ VRN2M2, VRN2M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E16_V_M4 */ VRN2M4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E16_V_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG2E16_V_M4_TU */ VRN2M4, VRN2M4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E16_V_MF2 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E16_V_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG2E16_V_MF2_TU */ VRN2M1, VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E16_V_MF4 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E16_V_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG2E16_V_MF4_TU */ VRN2M1, VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E32_V_M1 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E32_V_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG2E32_V_M1_TU */ VRN2M1, VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E32_V_M2 */ VRN2M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E32_V_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG2E32_V_M2_TU */ VRN2M2, VRN2M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E32_V_M4 */ VRN2M4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E32_V_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG2E32_V_M4_TU */ VRN2M4, VRN2M4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E32_V_MF2 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E32_V_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG2E32_V_MF2_TU */ VRN2M1, VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E64_V_M1 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E64_V_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG2E64_V_M1_TU */ VRN2M1, VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E64_V_M2 */ VRN2M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E64_V_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG2E64_V_M2_TU */ VRN2M2, VRN2M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E64_V_M4 */ VRN2M4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E64_V_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG2E64_V_M4_TU */ VRN2M4, VRN2M4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E8_V_M1 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E8_V_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG2E8_V_M1_TU */ VRN2M1, VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E8_V_M2 */ VRN2M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E8_V_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG2E8_V_M2_TU */ VRN2M2, VRN2M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E8_V_M4 */ VRN2M4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E8_V_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG2E8_V_M4_TU */ VRN2M4, VRN2M4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E8_V_MF2 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E8_V_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG2E8_V_MF2_TU */ VRN2M1, VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E8_V_MF4 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E8_V_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG2E8_V_MF4_TU */ VRN2M1, VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E8_V_MF8 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG2E8_V_MF8_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG2E8_V_MF8_TU */ VRN2M1, VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E16_V_M1 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E16_V_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG3E16_V_M1_TU */ VRN3M1, VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E16_V_M2 */ VRN3M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E16_V_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG3E16_V_M2_TU */ VRN3M2, VRN3M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E16_V_MF2 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E16_V_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG3E16_V_MF2_TU */ VRN3M1, VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E16_V_MF4 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E16_V_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG3E16_V_MF4_TU */ VRN3M1, VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E32_V_M1 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E32_V_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG3E32_V_M1_TU */ VRN3M1, VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E32_V_M2 */ VRN3M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E32_V_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG3E32_V_M2_TU */ VRN3M2, VRN3M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E32_V_MF2 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E32_V_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG3E32_V_MF2_TU */ VRN3M1, VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E64_V_M1 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E64_V_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG3E64_V_M1_TU */ VRN3M1, VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E64_V_M2 */ VRN3M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E64_V_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG3E64_V_M2_TU */ VRN3M2, VRN3M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E8_V_M1 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E8_V_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG3E8_V_M1_TU */ VRN3M1, VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E8_V_M2 */ VRN3M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E8_V_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG3E8_V_M2_TU */ VRN3M2, VRN3M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E8_V_MF2 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E8_V_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG3E8_V_MF2_TU */ VRN3M1, VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E8_V_MF4 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E8_V_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG3E8_V_MF4_TU */ VRN3M1, VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E8_V_MF8 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG3E8_V_MF8_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG3E8_V_MF8_TU */ VRN3M1, VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E16_V_M1 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E16_V_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG4E16_V_M1_TU */ VRN4M1, VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E16_V_M2 */ VRN4M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E16_V_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG4E16_V_M2_TU */ VRN4M2, VRN4M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E16_V_MF2 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E16_V_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG4E16_V_MF2_TU */ VRN4M1, VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E16_V_MF4 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E16_V_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG4E16_V_MF4_TU */ VRN4M1, VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E32_V_M1 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E32_V_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG4E32_V_M1_TU */ VRN4M1, VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E32_V_M2 */ VRN4M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E32_V_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG4E32_V_M2_TU */ VRN4M2, VRN4M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E32_V_MF2 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E32_V_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG4E32_V_MF2_TU */ VRN4M1, VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E64_V_M1 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E64_V_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG4E64_V_M1_TU */ VRN4M1, VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E64_V_M2 */ VRN4M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E64_V_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG4E64_V_M2_TU */ VRN4M2, VRN4M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E8_V_M1 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E8_V_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG4E8_V_M1_TU */ VRN4M1, VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E8_V_M2 */ VRN4M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E8_V_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG4E8_V_M2_TU */ VRN4M2, VRN4M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E8_V_MF2 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E8_V_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG4E8_V_MF2_TU */ VRN4M1, VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E8_V_MF4 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E8_V_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG4E8_V_MF4_TU */ VRN4M1, VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E8_V_MF8 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG4E8_V_MF8_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG4E8_V_MF8_TU */ VRN4M1, VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E16_V_M1 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E16_V_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG5E16_V_M1_TU */ VRN5M1, VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E16_V_MF2 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E16_V_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG5E16_V_MF2_TU */ VRN5M1, VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E16_V_MF4 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E16_V_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG5E16_V_MF4_TU */ VRN5M1, VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E32_V_M1 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E32_V_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG5E32_V_M1_TU */ VRN5M1, VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E32_V_MF2 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E32_V_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG5E32_V_MF2_TU */ VRN5M1, VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E64_V_M1 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E64_V_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG5E64_V_M1_TU */ VRN5M1, VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E8_V_M1 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E8_V_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG5E8_V_M1_TU */ VRN5M1, VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E8_V_MF2 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E8_V_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG5E8_V_MF2_TU */ VRN5M1, VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E8_V_MF4 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E8_V_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG5E8_V_MF4_TU */ VRN5M1, VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E8_V_MF8 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG5E8_V_MF8_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG5E8_V_MF8_TU */ VRN5M1, VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E16_V_M1 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E16_V_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG6E16_V_M1_TU */ VRN6M1, VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E16_V_MF2 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E16_V_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG6E16_V_MF2_TU */ VRN6M1, VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E16_V_MF4 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E16_V_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG6E16_V_MF4_TU */ VRN6M1, VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E32_V_M1 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E32_V_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG6E32_V_M1_TU */ VRN6M1, VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E32_V_MF2 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E32_V_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG6E32_V_MF2_TU */ VRN6M1, VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E64_V_M1 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E64_V_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG6E64_V_M1_TU */ VRN6M1, VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E8_V_M1 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E8_V_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG6E8_V_M1_TU */ VRN6M1, VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E8_V_MF2 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E8_V_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG6E8_V_MF2_TU */ VRN6M1, VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E8_V_MF4 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E8_V_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG6E8_V_MF4_TU */ VRN6M1, VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E8_V_MF8 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG6E8_V_MF8_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG6E8_V_MF8_TU */ VRN6M1, VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E16_V_M1 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E16_V_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG7E16_V_M1_TU */ VRN7M1, VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E16_V_MF2 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E16_V_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG7E16_V_MF2_TU */ VRN7M1, VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E16_V_MF4 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E16_V_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG7E16_V_MF4_TU */ VRN7M1, VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E32_V_M1 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E32_V_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG7E32_V_M1_TU */ VRN7M1, VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E32_V_MF2 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E32_V_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG7E32_V_MF2_TU */ VRN7M1, VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E64_V_M1 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E64_V_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG7E64_V_M1_TU */ VRN7M1, VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E8_V_M1 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E8_V_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG7E8_V_M1_TU */ VRN7M1, VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E8_V_MF2 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E8_V_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG7E8_V_MF2_TU */ VRN7M1, VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E8_V_MF4 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E8_V_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG7E8_V_MF4_TU */ VRN7M1, VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E8_V_MF8 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG7E8_V_MF8_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG7E8_V_MF8_TU */ VRN7M1, VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E16_V_M1 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E16_V_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG8E16_V_M1_TU */ VRN8M1, VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E16_V_MF2 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E16_V_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG8E16_V_MF2_TU */ VRN8M1, VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E16_V_MF4 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E16_V_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG8E16_V_MF4_TU */ VRN8M1, VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E32_V_M1 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E32_V_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG8E32_V_M1_TU */ VRN8M1, VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E32_V_MF2 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E32_V_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG8E32_V_MF2_TU */ VRN8M1, VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E64_V_M1 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E64_V_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG8E64_V_M1_TU */ VRN8M1, VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E8_V_M1 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E8_V_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG8E8_V_M1_TU */ VRN8M1, VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E8_V_MF2 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E8_V_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG8E8_V_MF2_TU */ VRN8M1, VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E8_V_MF4 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E8_V_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG8E8_V_MF4_TU */ VRN8M1, VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E8_V_MF8 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLSSEG8E8_V_MF8_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLSSEG8E8_V_MF8_TU */ VRN8M1, VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVLUXEI16_V_M1_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_M1_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_M1_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_M1_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_M1_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_M1_M2_TU */ VRM2, VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_M1_M4 */ VRM4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_M1_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_M1_M4_TU */ VRM4, VRM4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_M1_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_M1_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_M1_MF2_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_M2_M1 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI16_V_M2_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_M2_M1_TU */ VR, VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI16_V_M2_M2 */ VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI16_V_M2_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_M2_M2_TU */ VRM2, VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI16_V_M2_M4 */ VRM4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI16_V_M2_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_M2_M4_TU */ VRM4, VRM4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI16_V_M2_M8 */ VRM8, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI16_V_M2_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_M2_M8_TU */ VRM8, VRM8, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI16_V_M4_M2 */ VRM2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI16_V_M4_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_M4_M2_TU */ VRM2, VRM2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI16_V_M4_M4 */ VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI16_V_M4_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_M4_M4_TU */ VRM4, VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI16_V_M4_M8 */ VRM8, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI16_V_M4_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_M4_M8_TU */ VRM8, VRM8, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI16_V_M8_M4 */ VRM4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI16_V_M8_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_M8_M4_TU */ VRM4, VRM4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI16_V_M8_M8 */ VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI16_V_M8_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_M8_M8_TU */ VRM8, VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI16_V_MF2_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_MF2_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_MF2_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_MF2_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_MF2_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_MF2_M2_TU */ VRM2, VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_MF2_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_MF2_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_MF2_MF2_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_MF2_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_MF2_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_MF2_MF4_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_MF4_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_MF4_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_MF4_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_MF4_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_MF4_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_MF4_MF2_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_MF4_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_MF4_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_MF4_MF4_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_MF4_MF8 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI16_V_MF4_MF8_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI16_V_MF4_MF8_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI32_V_M1_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI32_V_M1_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI32_V_M1_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI32_V_M1_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI32_V_M1_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI32_V_M1_M2_TU */ VRM2, VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI32_V_M1_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI32_V_M1_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI32_V_M1_MF2_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI32_V_M1_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI32_V_M1_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI32_V_M1_MF4_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI32_V_M2_M1 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI32_V_M2_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI32_V_M2_M1_TU */ VR, VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI32_V_M2_M2 */ VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI32_V_M2_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI32_V_M2_M2_TU */ VRM2, VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI32_V_M2_M4 */ VRM4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI32_V_M2_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI32_V_M2_M4_TU */ VRM4, VRM4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI32_V_M2_MF2 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI32_V_M2_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI32_V_M2_MF2_TU */ VR, VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI32_V_M4_M1 */ VR, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI32_V_M4_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI32_V_M4_M1_TU */ VR, VR, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI32_V_M4_M2 */ VRM2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI32_V_M4_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI32_V_M4_M2_TU */ VRM2, VRM2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI32_V_M4_M4 */ VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI32_V_M4_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI32_V_M4_M4_TU */ VRM4, VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI32_V_M4_M8 */ VRM8, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI32_V_M4_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI32_V_M4_M8_TU */ VRM8, VRM8, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI32_V_M8_M2 */ VRM2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI32_V_M8_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI32_V_M8_M2_TU */ VRM2, VRM2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI32_V_M8_M4 */ VRM4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI32_V_M8_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI32_V_M8_M4_TU */ VRM4, VRM4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI32_V_M8_M8 */ VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI32_V_M8_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI32_V_M8_M8_TU */ VRM8, VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI32_V_MF2_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI32_V_MF2_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI32_V_MF2_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI32_V_MF2_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI32_V_MF2_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI32_V_MF2_MF2_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI32_V_MF2_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI32_V_MF2_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI32_V_MF2_MF4_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI32_V_MF2_MF8 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI32_V_MF2_MF8_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI32_V_MF2_MF8_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI64_V_M1_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI64_V_M1_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI64_V_M1_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI64_V_M1_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI64_V_M1_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI64_V_M1_MF2_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI64_V_M1_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI64_V_M1_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI64_V_M1_MF4_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI64_V_M1_MF8 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI64_V_M1_MF8_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI64_V_M1_MF8_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI64_V_M2_M1 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI64_V_M2_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI64_V_M2_M1_TU */ VR, VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI64_V_M2_M2 */ VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI64_V_M2_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI64_V_M2_M2_TU */ VRM2, VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI64_V_M2_MF2 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI64_V_M2_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI64_V_M2_MF2_TU */ VR, VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI64_V_M2_MF4 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI64_V_M2_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI64_V_M2_MF4_TU */ VR, VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI64_V_M4_M1 */ VR, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI64_V_M4_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI64_V_M4_M1_TU */ VR, VR, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI64_V_M4_M2 */ VRM2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI64_V_M4_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI64_V_M4_M2_TU */ VRM2, VRM2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI64_V_M4_M4 */ VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI64_V_M4_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI64_V_M4_M4_TU */ VRM4, VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI64_V_M4_MF2 */ VR, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI64_V_M4_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI64_V_M4_MF2_TU */ VR, VR, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI64_V_M8_M1 */ VR, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI64_V_M8_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI64_V_M8_M1_TU */ VR, VR, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI64_V_M8_M2 */ VRM2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI64_V_M8_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI64_V_M8_M2_TU */ VRM2, VRM2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI64_V_M8_M4 */ VRM4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI64_V_M8_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI64_V_M8_M4_TU */ VRM4, VRM4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI64_V_M8_M8 */ VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI64_V_M8_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI64_V_M8_M8_TU */ VRM8, VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI8_V_M1_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_M1_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_M1_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_M1_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_M1_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_M1_M2_TU */ VRM2, VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_M1_M4 */ VRM4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_M1_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_M1_M4_TU */ VRM4, VRM4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_M1_M8 */ VRM8, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_M1_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_M1_M8_TU */ VRM8, VRM8, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_M2_M2 */ VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI8_V_M2_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_M2_M2_TU */ VRM2, VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI8_V_M2_M4 */ VRM4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI8_V_M2_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_M2_M4_TU */ VRM4, VRM4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI8_V_M2_M8 */ VRM8, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI8_V_M2_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_M2_M8_TU */ VRM8, VRM8, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXEI8_V_M4_M4 */ VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI8_V_M4_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_M4_M4_TU */ VRM4, VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI8_V_M4_M8 */ VRM8, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI8_V_M4_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_M4_M8_TU */ VRM8, VRM8, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXEI8_V_M8_M8 */ VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI8_V_M8_M8_MASK */ VRM8NoV0, VRM8NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_M8_M8_TU */ VRM8, VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF2_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF2_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_MF2_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF2_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF2_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_MF2_M2_TU */ VRM2, VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF2_M4 */ VRM4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF2_M4_MASK */ VRM4NoV0, VRM4NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_MF2_M4_TU */ VRM4, VRM4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF2_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF2_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_MF2_MF2_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF4_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF4_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_MF4_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF4_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF4_M2_MASK */ VRM2NoV0, VRM2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_MF4_M2_TU */ VRM2, VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF4_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF4_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_MF4_MF2_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF4_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF4_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_MF4_MF4_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF8_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF8_M1_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_MF8_M1_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF8_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF8_MF2_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_MF8_MF2_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF8_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF8_MF4_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_MF8_MF4_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF8_MF8 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXEI8_V_MF8_MF8_MASK */ VRNoV0, VRNoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXEI8_V_MF8_MF8_TU */ VR, VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M1_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M1_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI16_V_M1_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M1_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M1_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI16_V_M1_M2_TU */ VRN2M2, VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M1_M4 */ VRN2M4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M1_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI16_V_M1_M4_TU */ VRN2M4, VRN2M4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M1_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M1_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI16_V_M1_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M2_M1 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M2_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI16_V_M2_M1_TU */ VRN2M1, VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M2_M2 */ VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M2_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI16_V_M2_M2_TU */ VRN2M2, VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M2_M4 */ VRN2M4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M2_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI16_V_M2_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M4_M2 */ VRN2M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M4_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI16_V_M4_M2_TU */ VRN2M2, VRN2M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M4_M4 */ VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M4_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI16_V_M4_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M8_M4 */ VRN2M4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_M8_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI16_V_M8_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF2_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF2_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF2_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF2_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF2_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF2_M2_TU */ VRN2M2, VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF2_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF2_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF2_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF2_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF2_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF2_MF4_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF4_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF4_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF4_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF4_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF4_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF4_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF4_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF4_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF4_MF4_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF4_MF8 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF4_MF8_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI16_V_MF4_MF8_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M1_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M1_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI32_V_M1_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M1_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M1_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI32_V_M1_M2_TU */ VRN2M2, VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M1_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M1_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI32_V_M1_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M1_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M1_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI32_V_M1_MF4_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M2_M1 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M2_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI32_V_M2_M1_TU */ VRN2M1, VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M2_M2 */ VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M2_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI32_V_M2_M2_TU */ VRN2M2, VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M2_M4 */ VRN2M4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M2_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI32_V_M2_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M2_MF2 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M2_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI32_V_M2_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M4_M1 */ VRN2M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M4_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI32_V_M4_M1_TU */ VRN2M1, VRN2M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M4_M2 */ VRN2M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M4_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI32_V_M4_M2_TU */ VRN2M2, VRN2M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M4_M4 */ VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M4_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI32_V_M4_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M8_M2 */ VRN2M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M8_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI32_V_M8_M2_TU */ VRN2M2, VRN2M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M8_M4 */ VRN2M4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_M8_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI32_V_M8_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_MF2_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_MF2_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI32_V_MF2_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_MF2_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_MF2_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI32_V_MF2_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_MF2_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_MF2_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI32_V_MF2_MF4_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_MF2_MF8 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI32_V_MF2_MF8_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI32_V_MF2_MF8_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M1_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M1_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI64_V_M1_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M1_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M1_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI64_V_M1_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M1_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M1_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI64_V_M1_MF4_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M1_MF8 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M1_MF8_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI64_V_M1_MF8_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M2_M1 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M2_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI64_V_M2_M1_TU */ VRN2M1, VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M2_M2 */ VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M2_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI64_V_M2_M2_TU */ VRN2M2, VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M2_MF2 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M2_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI64_V_M2_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M2_MF4 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M2_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI64_V_M2_MF4_TU */ VRN2M1, VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M4_M1 */ VRN2M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M4_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI64_V_M4_M1_TU */ VRN2M1, VRN2M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M4_M2 */ VRN2M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M4_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI64_V_M4_M2_TU */ VRN2M2, VRN2M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M4_M4 */ VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M4_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI64_V_M4_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M4_MF2 */ VRN2M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M4_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI64_V_M4_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M8_M1 */ VRN2M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M8_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI64_V_M8_M1_TU */ VRN2M1, VRN2M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M8_M2 */ VRN2M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M8_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI64_V_M8_M2_TU */ VRN2M2, VRN2M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M8_M4 */ VRN2M4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG2EI64_V_M8_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI64_V_M8_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_M1_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_M1_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI8_V_M1_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_M1_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_M1_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI8_V_M1_M2_TU */ VRN2M2, VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_M1_M4 */ VRN2M4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_M1_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI8_V_M1_M4_TU */ VRN2M4, VRN2M4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_M2_M2 */ VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_M2_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI8_V_M2_M2_TU */ VRN2M2, VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_M2_M4 */ VRN2M4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_M2_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI8_V_M2_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_M4_M4 */ VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_M4_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI8_V_M4_M4_TU */ VRN2M4, VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF2_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF2_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF2_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF2_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF2_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF2_M2_TU */ VRN2M2, VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF2_M4 */ VRN2M4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF2_M4_MASK */ VRN2M4NoV0, VRN2M4NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF2_M4_TU */ VRN2M4, VRN2M4, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF2_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF2_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF2_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF4_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF4_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF4_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF4_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF4_M2_MASK */ VRN2M2NoV0, VRN2M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF4_M2_TU */ VRN2M2, VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF4_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF4_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF4_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF4_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF4_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF4_MF4_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF8_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF8_M1_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF8_M1_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF8_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF8_MF2_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF8_MF2_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF8_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF8_MF4_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF8_MF4_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF8_MF8 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF8_MF8_MASK */ VRN2M1NoV0, VRN2M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG2EI8_V_MF8_MF8_TU */ VRN2M1, VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_M1_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_M1_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI16_V_M1_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_M1_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_M1_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI16_V_M1_M2_TU */ VRN3M2, VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_M1_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_M1_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI16_V_M1_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_M2_M1 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_M2_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI16_V_M2_M1_TU */ VRN3M1, VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_M2_M2 */ VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_M2_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI16_V_M2_M2_TU */ VRN3M2, VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_M4_M2 */ VRN3M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_M4_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI16_V_M4_M2_TU */ VRN3M2, VRN3M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF2_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF2_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF2_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF2_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF2_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF2_M2_TU */ VRN3M2, VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF2_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF2_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF2_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF2_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF2_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF2_MF4_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF4_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF4_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF4_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF4_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF4_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF4_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF4_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF4_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF4_MF4_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF4_MF8 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF4_MF8_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI16_V_MF4_MF8_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M1_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M1_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI32_V_M1_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M1_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M1_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI32_V_M1_M2_TU */ VRN3M2, VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M1_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M1_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI32_V_M1_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M1_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M1_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI32_V_M1_MF4_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M2_M1 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M2_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI32_V_M2_M1_TU */ VRN3M1, VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M2_M2 */ VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M2_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI32_V_M2_M2_TU */ VRN3M2, VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M2_MF2 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M2_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI32_V_M2_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M4_M1 */ VRN3M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M4_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI32_V_M4_M1_TU */ VRN3M1, VRN3M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M4_M2 */ VRN3M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M4_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI32_V_M4_M2_TU */ VRN3M2, VRN3M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M8_M2 */ VRN3M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_M8_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI32_V_M8_M2_TU */ VRN3M2, VRN3M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_MF2_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_MF2_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI32_V_MF2_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_MF2_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_MF2_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI32_V_MF2_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_MF2_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_MF2_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI32_V_MF2_MF4_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_MF2_MF8 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI32_V_MF2_MF8_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI32_V_MF2_MF8_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M1_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M1_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI64_V_M1_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M1_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M1_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI64_V_M1_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M1_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M1_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI64_V_M1_MF4_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M1_MF8 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M1_MF8_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI64_V_M1_MF8_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M2_M1 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M2_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI64_V_M2_M1_TU */ VRN3M1, VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M2_M2 */ VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M2_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI64_V_M2_M2_TU */ VRN3M2, VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M2_MF2 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M2_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI64_V_M2_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M2_MF4 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M2_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI64_V_M2_MF4_TU */ VRN3M1, VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M4_M1 */ VRN3M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M4_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI64_V_M4_M1_TU */ VRN3M1, VRN3M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M4_M2 */ VRN3M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M4_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI64_V_M4_M2_TU */ VRN3M2, VRN3M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M4_MF2 */ VRN3M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M4_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI64_V_M4_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M8_M1 */ VRN3M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M8_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI64_V_M8_M1_TU */ VRN3M1, VRN3M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M8_M2 */ VRN3M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG3EI64_V_M8_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI64_V_M8_M2_TU */ VRN3M2, VRN3M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_M1_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_M1_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI8_V_M1_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_M1_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_M1_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI8_V_M1_M2_TU */ VRN3M2, VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_M2_M2 */ VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_M2_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI8_V_M2_M2_TU */ VRN3M2, VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF2_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF2_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF2_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF2_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF2_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF2_M2_TU */ VRN3M2, VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF2_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF2_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF2_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF4_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF4_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF4_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF4_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF4_M2_MASK */ VRN3M2NoV0, VRN3M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF4_M2_TU */ VRN3M2, VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF4_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF4_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF4_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF4_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF4_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF4_MF4_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF8_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF8_M1_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF8_M1_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF8_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF8_MF2_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF8_MF2_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF8_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF8_MF4_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF8_MF4_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF8_MF8 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF8_MF8_MASK */ VRN3M1NoV0, VRN3M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG3EI8_V_MF8_MF8_TU */ VRN3M1, VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_M1_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_M1_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI16_V_M1_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_M1_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_M1_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI16_V_M1_M2_TU */ VRN4M2, VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_M1_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_M1_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI16_V_M1_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_M2_M1 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_M2_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI16_V_M2_M1_TU */ VRN4M1, VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_M2_M2 */ VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_M2_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI16_V_M2_M2_TU */ VRN4M2, VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_M4_M2 */ VRN4M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_M4_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI16_V_M4_M2_TU */ VRN4M2, VRN4M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF2_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF2_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF2_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF2_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF2_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF2_M2_TU */ VRN4M2, VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF2_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF2_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF2_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF2_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF2_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF2_MF4_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF4_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF4_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF4_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF4_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF4_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF4_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF4_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF4_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF4_MF4_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF4_MF8 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF4_MF8_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI16_V_MF4_MF8_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M1_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M1_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI32_V_M1_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M1_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M1_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI32_V_M1_M2_TU */ VRN4M2, VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M1_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M1_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI32_V_M1_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M1_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M1_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI32_V_M1_MF4_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M2_M1 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M2_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI32_V_M2_M1_TU */ VRN4M1, VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M2_M2 */ VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M2_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI32_V_M2_M2_TU */ VRN4M2, VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M2_MF2 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M2_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI32_V_M2_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M4_M1 */ VRN4M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M4_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI32_V_M4_M1_TU */ VRN4M1, VRN4M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M4_M2 */ VRN4M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M4_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI32_V_M4_M2_TU */ VRN4M2, VRN4M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M8_M2 */ VRN4M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_M8_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI32_V_M8_M2_TU */ VRN4M2, VRN4M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_MF2_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_MF2_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI32_V_MF2_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_MF2_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_MF2_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI32_V_MF2_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_MF2_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_MF2_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI32_V_MF2_MF4_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_MF2_MF8 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI32_V_MF2_MF8_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI32_V_MF2_MF8_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M1_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M1_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI64_V_M1_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M1_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M1_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI64_V_M1_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M1_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M1_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI64_V_M1_MF4_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M1_MF8 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M1_MF8_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI64_V_M1_MF8_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M2_M1 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M2_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI64_V_M2_M1_TU */ VRN4M1, VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M2_M2 */ VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M2_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI64_V_M2_M2_TU */ VRN4M2, VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M2_MF2 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M2_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI64_V_M2_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M2_MF4 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M2_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI64_V_M2_MF4_TU */ VRN4M1, VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M4_M1 */ VRN4M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M4_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI64_V_M4_M1_TU */ VRN4M1, VRN4M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M4_M2 */ VRN4M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M4_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI64_V_M4_M2_TU */ VRN4M2, VRN4M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M4_MF2 */ VRN4M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M4_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI64_V_M4_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M8_M1 */ VRN4M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M8_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI64_V_M8_M1_TU */ VRN4M1, VRN4M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M8_M2 */ VRN4M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG4EI64_V_M8_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI64_V_M8_M2_TU */ VRN4M2, VRN4M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_M1_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_M1_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI8_V_M1_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_M1_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_M1_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI8_V_M1_M2_TU */ VRN4M2, VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_M2_M2 */ VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_M2_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI8_V_M2_M2_TU */ VRN4M2, VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF2_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF2_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF2_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF2_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF2_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF2_M2_TU */ VRN4M2, VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF2_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF2_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF2_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF4_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF4_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF4_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF4_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF4_M2_MASK */ VRN4M2NoV0, VRN4M2NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF4_M2_TU */ VRN4M2, VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF4_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF4_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF4_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF4_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF4_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF4_MF4_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF8_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF8_M1_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF8_M1_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF8_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF8_MF2_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF8_MF2_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF8_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF8_MF4_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF8_MF4_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF8_MF8 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF8_MF8_MASK */ VRN4M1NoV0, VRN4M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG4EI8_V_MF8_MF8_TU */ VRN4M1, VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_M1_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_M1_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI16_V_M1_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_M1_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_M1_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI16_V_M1_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_M2_M1 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_M2_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI16_V_M2_M1_TU */ VRN5M1, VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF2_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF2_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF2_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF2_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF2_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF2_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF2_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF2_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF2_MF4_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF4_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF4_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF4_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF4_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF4_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF4_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF4_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF4_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF4_MF4_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF4_MF8 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF4_MF8_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI16_V_MF4_MF8_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_M1_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_M1_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI32_V_M1_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_M1_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_M1_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI32_V_M1_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_M1_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_M1_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI32_V_M1_MF4_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_M2_M1 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_M2_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI32_V_M2_M1_TU */ VRN5M1, VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_M2_MF2 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_M2_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI32_V_M2_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_M4_M1 */ VRN5M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_M4_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI32_V_M4_M1_TU */ VRN5M1, VRN5M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_MF2_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_MF2_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI32_V_MF2_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_MF2_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_MF2_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI32_V_MF2_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_MF2_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_MF2_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI32_V_MF2_MF4_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_MF2_MF8 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI32_V_MF2_MF8_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI32_V_MF2_MF8_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M1_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M1_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI64_V_M1_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M1_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M1_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI64_V_M1_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M1_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M1_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI64_V_M1_MF4_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M1_MF8 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M1_MF8_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI64_V_M1_MF8_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M2_M1 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M2_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI64_V_M2_M1_TU */ VRN5M1, VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M2_MF2 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M2_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI64_V_M2_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M2_MF4 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M2_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI64_V_M2_MF4_TU */ VRN5M1, VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M4_M1 */ VRN5M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M4_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI64_V_M4_M1_TU */ VRN5M1, VRN5M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M4_MF2 */ VRN5M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M4_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI64_V_M4_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M8_M1 */ VRN5M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG5EI64_V_M8_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI64_V_M8_M1_TU */ VRN5M1, VRN5M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_M1_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_M1_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI8_V_M1_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF2_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF2_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF2_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF2_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF2_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF2_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF4_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF4_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF4_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF4_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF4_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF4_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF4_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF4_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF4_MF4_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF8_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF8_M1_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF8_M1_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF8_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF8_MF2_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF8_MF2_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF8_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF8_MF4_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF8_MF4_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF8_MF8 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF8_MF8_MASK */ VRN5M1NoV0, VRN5M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG5EI8_V_MF8_MF8_TU */ VRN5M1, VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_M1_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_M1_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI16_V_M1_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_M1_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_M1_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI16_V_M1_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_M2_M1 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_M2_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI16_V_M2_M1_TU */ VRN6M1, VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF2_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF2_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF2_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF2_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF2_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF2_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF2_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF2_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF2_MF4_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF4_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF4_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF4_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF4_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF4_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF4_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF4_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF4_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF4_MF4_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF4_MF8 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF4_MF8_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI16_V_MF4_MF8_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_M1_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_M1_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI32_V_M1_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_M1_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_M1_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI32_V_M1_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_M1_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_M1_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI32_V_M1_MF4_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_M2_M1 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_M2_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI32_V_M2_M1_TU */ VRN6M1, VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_M2_MF2 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_M2_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI32_V_M2_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_M4_M1 */ VRN6M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_M4_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI32_V_M4_M1_TU */ VRN6M1, VRN6M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_MF2_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_MF2_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI32_V_MF2_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_MF2_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_MF2_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI32_V_MF2_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_MF2_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_MF2_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI32_V_MF2_MF4_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_MF2_MF8 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI32_V_MF2_MF8_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI32_V_MF2_MF8_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M1_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M1_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI64_V_M1_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M1_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M1_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI64_V_M1_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M1_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M1_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI64_V_M1_MF4_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M1_MF8 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M1_MF8_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI64_V_M1_MF8_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M2_M1 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M2_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI64_V_M2_M1_TU */ VRN6M1, VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M2_MF2 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M2_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI64_V_M2_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M2_MF4 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M2_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI64_V_M2_MF4_TU */ VRN6M1, VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M4_M1 */ VRN6M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M4_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI64_V_M4_M1_TU */ VRN6M1, VRN6M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M4_MF2 */ VRN6M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M4_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI64_V_M4_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M8_M1 */ VRN6M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG6EI64_V_M8_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI64_V_M8_M1_TU */ VRN6M1, VRN6M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_M1_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_M1_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI8_V_M1_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF2_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF2_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF2_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF2_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF2_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF2_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF4_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF4_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF4_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF4_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF4_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF4_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF4_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF4_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF4_MF4_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF8_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF8_M1_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF8_M1_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF8_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF8_MF2_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF8_MF2_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF8_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF8_MF4_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF8_MF4_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF8_MF8 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF8_MF8_MASK */ VRN6M1NoV0, VRN6M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG6EI8_V_MF8_MF8_TU */ VRN6M1, VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_M1_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_M1_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI16_V_M1_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_M1_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_M1_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI16_V_M1_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_M2_M1 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_M2_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI16_V_M2_M1_TU */ VRN7M1, VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF2_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF2_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF2_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF2_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF2_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF2_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF2_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF2_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF2_MF4_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF4_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF4_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF4_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF4_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF4_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF4_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF4_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF4_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF4_MF4_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF4_MF8 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF4_MF8_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI16_V_MF4_MF8_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_M1_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_M1_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI32_V_M1_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_M1_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_M1_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI32_V_M1_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_M1_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_M1_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI32_V_M1_MF4_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_M2_M1 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_M2_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI32_V_M2_M1_TU */ VRN7M1, VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_M2_MF2 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_M2_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI32_V_M2_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_M4_M1 */ VRN7M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_M4_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI32_V_M4_M1_TU */ VRN7M1, VRN7M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_MF2_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_MF2_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI32_V_MF2_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_MF2_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_MF2_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI32_V_MF2_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_MF2_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_MF2_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI32_V_MF2_MF4_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_MF2_MF8 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI32_V_MF2_MF8_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI32_V_MF2_MF8_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M1_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M1_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI64_V_M1_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M1_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M1_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI64_V_M1_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M1_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M1_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI64_V_M1_MF4_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M1_MF8 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M1_MF8_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI64_V_M1_MF8_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M2_M1 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M2_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI64_V_M2_M1_TU */ VRN7M1, VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M2_MF2 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M2_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI64_V_M2_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M2_MF4 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M2_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI64_V_M2_MF4_TU */ VRN7M1, VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M4_M1 */ VRN7M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M4_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI64_V_M4_M1_TU */ VRN7M1, VRN7M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M4_MF2 */ VRN7M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M4_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI64_V_M4_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M8_M1 */ VRN7M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG7EI64_V_M8_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI64_V_M8_M1_TU */ VRN7M1, VRN7M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_M1_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_M1_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI8_V_M1_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF2_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF2_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF2_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF2_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF2_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF2_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF4_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF4_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF4_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF4_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF4_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF4_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF4_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF4_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF4_MF4_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF8_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF8_M1_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF8_M1_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF8_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF8_MF2_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF8_MF2_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF8_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF8_MF4_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF8_MF4_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF8_MF8 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF8_MF8_MASK */ VRN7M1NoV0, VRN7M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG7EI8_V_MF8_MF8_TU */ VRN7M1, VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_M1_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_M1_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI16_V_M1_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_M1_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_M1_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI16_V_M1_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_M2_M1 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_M2_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI16_V_M2_M1_TU */ VRN8M1, VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF2_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF2_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF2_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF2_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF2_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF2_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF2_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF2_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF2_MF4_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF4_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF4_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF4_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF4_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF4_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF4_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF4_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF4_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF4_MF4_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF4_MF8 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF4_MF8_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI16_V_MF4_MF8_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_M1_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_M1_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI32_V_M1_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_M1_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_M1_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI32_V_M1_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_M1_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_M1_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI32_V_M1_MF4_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_M2_M1 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_M2_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI32_V_M2_M1_TU */ VRN8M1, VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_M2_MF2 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_M2_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI32_V_M2_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_M4_M1 */ VRN8M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_M4_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI32_V_M4_M1_TU */ VRN8M1, VRN8M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_MF2_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_MF2_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI32_V_MF2_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_MF2_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_MF2_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI32_V_MF2_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_MF2_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_MF2_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI32_V_MF2_MF4_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_MF2_MF8 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI32_V_MF2_MF8_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI32_V_MF2_MF8_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M1_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M1_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI64_V_M1_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M1_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M1_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI64_V_M1_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M1_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M1_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI64_V_M1_MF4_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M1_MF8 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M1_MF8_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI64_V_M1_MF8_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M2_M1 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M2_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI64_V_M2_M1_TU */ VRN8M1, VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M2_MF2 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M2_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI64_V_M2_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M2_MF4 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M2_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI64_V_M2_MF4_TU */ VRN8M1, VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M4_M1 */ VRN8M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M4_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI64_V_M4_M1_TU */ VRN8M1, VRN8M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M4_MF2 */ VRN8M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M4_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI64_V_M4_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M8_M1 */ VRN8M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG8EI64_V_M8_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI64_V_M8_M1_TU */ VRN8M1, VRN8M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_M1_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_M1_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI8_V_M1_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF2_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF2_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF2_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF2_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF2_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF2_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF4_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF4_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF4_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF4_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF4_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF4_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF4_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF4_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF4_MF4_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF8_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF8_M1_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF8_M1_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF8_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF8_MF2_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF8_MF2_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF8_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF8_MF4_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF8_MF4_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF8_MF8 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF8_MF8_MASK */ VRN8M1NoV0, VRN8M1NoV0, GPRMem, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVLUXSEG8EI8_V_MF8_MF8_TU */ VRN8M1, VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVMACC_VV_M1 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VV_M2 */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VV_M4 */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VV_M8 */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VV_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VV_MF8 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VX_M1 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VX_M1_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VX_M2 */ VRM2, VRM2, GPR, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, GPR, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VX_M4 */ VRM4, VRM4, GPR, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, GPR, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VX_M8 */ VRM8, VRM8, GPR, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, GPR, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VX_MF2 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VX_MF2_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VX_MF4 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VX_MF4_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VX_MF8 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVMACC_VX_MF8_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMADC_VIM_M1 */ VR, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVMADC_VIM_M2 */ VR, VRM2, simm5, VMV0, AVL, ixlenimm, /* PseudoVMADC_VIM_M4 */ VR, VRM4, simm5, VMV0, AVL, ixlenimm, /* PseudoVMADC_VIM_M8 */ VR, VRM8, simm5, VMV0, AVL, ixlenimm, /* PseudoVMADC_VIM_MF2 */ VR, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVMADC_VIM_MF4 */ VR, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVMADC_VIM_MF8 */ VR, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVMADC_VI_M1 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMADC_VI_M2 */ VR, VRM2, simm5, AVL, ixlenimm, /* PseudoVMADC_VI_M4 */ VR, VRM4, simm5, AVL, ixlenimm, /* PseudoVMADC_VI_M8 */ VR, VRM8, simm5, AVL, ixlenimm, /* PseudoVMADC_VI_MF2 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMADC_VI_MF4 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMADC_VI_MF8 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMADC_VVM_M1 */ VR, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVMADC_VVM_M2 */ VR, VRM2, VRM2, VMV0, AVL, ixlenimm, /* PseudoVMADC_VVM_M4 */ VR, VRM4, VRM4, VMV0, AVL, ixlenimm, /* PseudoVMADC_VVM_M8 */ VR, VRM8, VRM8, VMV0, AVL, ixlenimm, /* PseudoVMADC_VVM_MF2 */ VR, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVMADC_VVM_MF4 */ VR, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVMADC_VVM_MF8 */ VR, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVMADC_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMADC_VV_M2 */ VR, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMADC_VV_M4 */ VR, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMADC_VV_M8 */ VR, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMADC_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMADC_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMADC_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMADC_VXM_M1 */ VR, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVMADC_VXM_M2 */ VR, VRM2, GPR, VMV0, AVL, ixlenimm, /* PseudoVMADC_VXM_M4 */ VR, VRM4, GPR, VMV0, AVL, ixlenimm, /* PseudoVMADC_VXM_M8 */ VR, VRM8, GPR, VMV0, AVL, ixlenimm, /* PseudoVMADC_VXM_MF2 */ VR, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVMADC_VXM_MF4 */ VR, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVMADC_VXM_MF8 */ VR, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVMADC_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMADC_VX_M2 */ VR, VRM2, GPR, AVL, ixlenimm, /* PseudoVMADC_VX_M4 */ VR, VRM4, GPR, AVL, ixlenimm, /* PseudoVMADC_VX_M8 */ VR, VRM8, GPR, AVL, ixlenimm, /* PseudoVMADC_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMADC_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMADC_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMADD_VV_M1 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VV_M2 */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VV_M4 */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VV_M8 */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VV_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VV_MF8 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VX_M1 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VX_M1_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VX_M2 */ VRM2, VRM2, GPR, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, GPR, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VX_M4 */ VRM4, VRM4, GPR, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, GPR, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VX_M8 */ VRM8, VRM8, GPR, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, GPR, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VX_MF2 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VX_MF2_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VX_MF4 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VX_MF4_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VX_MF8 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVMADD_VX_MF8_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMANDN_MM_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMANDN_MM_M2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMANDN_MM_M4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMANDN_MM_M8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMANDN_MM_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMANDN_MM_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMANDN_MM_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMAND_MM_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMAND_MM_M2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMAND_MM_M4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMAND_MM_M8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMAND_MM_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMAND_MM_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMAND_MM_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMAXU_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMAXU_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAXU_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMAXU_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMAXU_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAXU_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMAXU_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMAXU_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAXU_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMAXU_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMAXU_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAXU_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMAXU_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMAXU_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAXU_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMAXU_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMAXU_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAXU_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMAXU_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMAXU_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAXU_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMAXU_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMAXU_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAXU_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMAXU_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVMAXU_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAXU_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVMAXU_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVMAXU_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAXU_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVMAXU_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVMAXU_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAXU_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVMAXU_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMAXU_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAXU_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMAXU_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMAXU_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAXU_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMAXU_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMAXU_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAXU_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMAX_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMAX_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAX_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMAX_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMAX_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAX_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMAX_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMAX_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAX_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMAX_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMAX_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAX_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMAX_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMAX_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAX_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMAX_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMAX_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAX_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMAX_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMAX_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAX_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMAX_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMAX_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAX_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMAX_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVMAX_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAX_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVMAX_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVMAX_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAX_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVMAX_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVMAX_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAX_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVMAX_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMAX_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAX_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMAX_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMAX_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAX_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMAX_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMAX_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMAX_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMCLR_M_B1 */ VR, AVL, ixlenimm, /* PseudoVMCLR_M_B16 */ VR, AVL, ixlenimm, /* PseudoVMCLR_M_B2 */ VR, AVL, ixlenimm, /* PseudoVMCLR_M_B32 */ VR, AVL, ixlenimm, /* PseudoVMCLR_M_B4 */ VR, AVL, ixlenimm, /* PseudoVMCLR_M_B64 */ VR, AVL, ixlenimm, /* PseudoVMCLR_M_B8 */ VR, AVL, ixlenimm, /* PseudoVMERGE_VIM_M1 */ VRNoV0, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VIM_M1_TU */ VRNoV0, VRNoV0, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VIM_M2 */ VRM2NoV0, VRM2, simm5, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VIM_M2_TU */ VRM2NoV0, VRM2NoV0, VRM2, simm5, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VIM_M4 */ VRM4NoV0, VRM4, simm5, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VIM_M4_TU */ VRM4NoV0, VRM4NoV0, VRM4, simm5, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VIM_M8 */ VRM8NoV0, VRM8, simm5, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VIM_M8_TU */ VRM8NoV0, VRM8NoV0, VRM8, simm5, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VIM_MF2 */ VRNoV0, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VIM_MF2_TU */ VRNoV0, VRNoV0, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VIM_MF4 */ VRNoV0, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VIM_MF4_TU */ VRNoV0, VRNoV0, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VIM_MF8 */ VRNoV0, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VIM_MF8_TU */ VRNoV0, VRNoV0, VR, simm5, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VVM_M1 */ VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VVM_M1_TU */ VRNoV0, VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VVM_M2 */ VRM2NoV0, VRM2, VRM2, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VVM_M2_TU */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VVM_M4 */ VRM4NoV0, VRM4, VRM4, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VVM_M4_TU */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VVM_M8 */ VRM8NoV0, VRM8, VRM8, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VVM_M8_TU */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VVM_MF2 */ VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VVM_MF2_TU */ VRNoV0, VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VVM_MF4 */ VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VVM_MF4_TU */ VRNoV0, VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VVM_MF8 */ VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VVM_MF8_TU */ VRNoV0, VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VXM_M1 */ VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VXM_M1_TU */ VRNoV0, VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VXM_M2 */ VRM2NoV0, VRM2, GPR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VXM_M2_TU */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VXM_M4 */ VRM4NoV0, VRM4, GPR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VXM_M4_TU */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VXM_M8 */ VRM8NoV0, VRM8, GPR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VXM_M8_TU */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VXM_MF2 */ VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VXM_MF2_TU */ VRNoV0, VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VXM_MF4 */ VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VXM_MF4_TU */ VRNoV0, VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VXM_MF8 */ VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVMERGE_VXM_MF8_TU */ VRNoV0, VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVMFEQ_VF16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVMFEQ_VF16_M1_MASK */ VR, VR, VR, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VF16_M2 */ VR, VRM2, FPR16, AVL, ixlenimm, /* PseudoVMFEQ_VF16_M2_MASK */ VR, VR, VRM2, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VF16_M4 */ VR, VRM4, FPR16, AVL, ixlenimm, /* PseudoVMFEQ_VF16_M4_MASK */ VR, VR, VRM4, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VF16_M8 */ VR, VRM8, FPR16, AVL, ixlenimm, /* PseudoVMFEQ_VF16_M8_MASK */ VR, VR, VRM8, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVMFEQ_VF16_MF2_MASK */ VR, VR, VR, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVMFEQ_VF16_MF4_MASK */ VR, VR, VR, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VF32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVMFEQ_VF32_M1_MASK */ VR, VR, VR, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VF32_M2 */ VR, VRM2, FPR32, AVL, ixlenimm, /* PseudoVMFEQ_VF32_M2_MASK */ VR, VR, VRM2, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VF32_M4 */ VR, VRM4, FPR32, AVL, ixlenimm, /* PseudoVMFEQ_VF32_M4_MASK */ VR, VR, VRM4, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VF32_M8 */ VR, VRM8, FPR32, AVL, ixlenimm, /* PseudoVMFEQ_VF32_M8_MASK */ VR, VR, VRM8, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVMFEQ_VF32_MF2_MASK */ VR, VR, VR, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VF64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVMFEQ_VF64_M1_MASK */ VR, VR, VR, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VF64_M2 */ VR, VRM2, FPR64, AVL, ixlenimm, /* PseudoVMFEQ_VF64_M2_MASK */ VR, VR, VRM2, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VF64_M4 */ VR, VRM4, FPR64, AVL, ixlenimm, /* PseudoVMFEQ_VF64_M4_MASK */ VR, VR, VRM4, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VF64_M8 */ VR, VRM8, FPR64, AVL, ixlenimm, /* PseudoVMFEQ_VF64_M8_MASK */ VR, VR, VRM8, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMFEQ_VV_M1_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VV_M2 */ VR, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMFEQ_VV_M2_MASK */ VR, VR, VRM2, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VV_M4 */ VR, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMFEQ_VV_M4_MASK */ VR, VR, VRM4, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VV_M8 */ VR, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMFEQ_VV_M8_MASK */ VR, VR, VRM8, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMFEQ_VV_MF2_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMFEQ_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMFEQ_VV_MF4_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMFGE_VF16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVMFGE_VF16_M1_MASK */ VR, VR, VR, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFGE_VF16_M2 */ VR, VRM2, FPR16, AVL, ixlenimm, /* PseudoVMFGE_VF16_M2_MASK */ VR, VR, VRM2, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFGE_VF16_M4 */ VR, VRM4, FPR16, AVL, ixlenimm, /* PseudoVMFGE_VF16_M4_MASK */ VR, VR, VRM4, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFGE_VF16_M8 */ VR, VRM8, FPR16, AVL, ixlenimm, /* PseudoVMFGE_VF16_M8_MASK */ VR, VR, VRM8, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFGE_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVMFGE_VF16_MF2_MASK */ VR, VR, VR, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFGE_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVMFGE_VF16_MF4_MASK */ VR, VR, VR, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFGE_VF32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVMFGE_VF32_M1_MASK */ VR, VR, VR, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFGE_VF32_M2 */ VR, VRM2, FPR32, AVL, ixlenimm, /* PseudoVMFGE_VF32_M2_MASK */ VR, VR, VRM2, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFGE_VF32_M4 */ VR, VRM4, FPR32, AVL, ixlenimm, /* PseudoVMFGE_VF32_M4_MASK */ VR, VR, VRM4, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFGE_VF32_M8 */ VR, VRM8, FPR32, AVL, ixlenimm, /* PseudoVMFGE_VF32_M8_MASK */ VR, VR, VRM8, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFGE_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVMFGE_VF32_MF2_MASK */ VR, VR, VR, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFGE_VF64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVMFGE_VF64_M1_MASK */ VR, VR, VR, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFGE_VF64_M2 */ VR, VRM2, FPR64, AVL, ixlenimm, /* PseudoVMFGE_VF64_M2_MASK */ VR, VR, VRM2, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFGE_VF64_M4 */ VR, VRM4, FPR64, AVL, ixlenimm, /* PseudoVMFGE_VF64_M4_MASK */ VR, VR, VRM4, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFGE_VF64_M8 */ VR, VRM8, FPR64, AVL, ixlenimm, /* PseudoVMFGE_VF64_M8_MASK */ VR, VR, VRM8, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFGT_VF16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVMFGT_VF16_M1_MASK */ VR, VR, VR, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFGT_VF16_M2 */ VR, VRM2, FPR16, AVL, ixlenimm, /* PseudoVMFGT_VF16_M2_MASK */ VR, VR, VRM2, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFGT_VF16_M4 */ VR, VRM4, FPR16, AVL, ixlenimm, /* PseudoVMFGT_VF16_M4_MASK */ VR, VR, VRM4, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFGT_VF16_M8 */ VR, VRM8, FPR16, AVL, ixlenimm, /* PseudoVMFGT_VF16_M8_MASK */ VR, VR, VRM8, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFGT_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVMFGT_VF16_MF2_MASK */ VR, VR, VR, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFGT_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVMFGT_VF16_MF4_MASK */ VR, VR, VR, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFGT_VF32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVMFGT_VF32_M1_MASK */ VR, VR, VR, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFGT_VF32_M2 */ VR, VRM2, FPR32, AVL, ixlenimm, /* PseudoVMFGT_VF32_M2_MASK */ VR, VR, VRM2, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFGT_VF32_M4 */ VR, VRM4, FPR32, AVL, ixlenimm, /* PseudoVMFGT_VF32_M4_MASK */ VR, VR, VRM4, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFGT_VF32_M8 */ VR, VRM8, FPR32, AVL, ixlenimm, /* PseudoVMFGT_VF32_M8_MASK */ VR, VR, VRM8, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFGT_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVMFGT_VF32_MF2_MASK */ VR, VR, VR, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFGT_VF64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVMFGT_VF64_M1_MASK */ VR, VR, VR, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFGT_VF64_M2 */ VR, VRM2, FPR64, AVL, ixlenimm, /* PseudoVMFGT_VF64_M2_MASK */ VR, VR, VRM2, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFGT_VF64_M4 */ VR, VRM4, FPR64, AVL, ixlenimm, /* PseudoVMFGT_VF64_M4_MASK */ VR, VR, VRM4, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFGT_VF64_M8 */ VR, VRM8, FPR64, AVL, ixlenimm, /* PseudoVMFGT_VF64_M8_MASK */ VR, VR, VRM8, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VF16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVMFLE_VF16_M1_MASK */ VR, VR, VR, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VF16_M2 */ VR, VRM2, FPR16, AVL, ixlenimm, /* PseudoVMFLE_VF16_M2_MASK */ VR, VR, VRM2, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VF16_M4 */ VR, VRM4, FPR16, AVL, ixlenimm, /* PseudoVMFLE_VF16_M4_MASK */ VR, VR, VRM4, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VF16_M8 */ VR, VRM8, FPR16, AVL, ixlenimm, /* PseudoVMFLE_VF16_M8_MASK */ VR, VR, VRM8, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVMFLE_VF16_MF2_MASK */ VR, VR, VR, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVMFLE_VF16_MF4_MASK */ VR, VR, VR, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VF32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVMFLE_VF32_M1_MASK */ VR, VR, VR, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VF32_M2 */ VR, VRM2, FPR32, AVL, ixlenimm, /* PseudoVMFLE_VF32_M2_MASK */ VR, VR, VRM2, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VF32_M4 */ VR, VRM4, FPR32, AVL, ixlenimm, /* PseudoVMFLE_VF32_M4_MASK */ VR, VR, VRM4, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VF32_M8 */ VR, VRM8, FPR32, AVL, ixlenimm, /* PseudoVMFLE_VF32_M8_MASK */ VR, VR, VRM8, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVMFLE_VF32_MF2_MASK */ VR, VR, VR, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VF64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVMFLE_VF64_M1_MASK */ VR, VR, VR, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VF64_M2 */ VR, VRM2, FPR64, AVL, ixlenimm, /* PseudoVMFLE_VF64_M2_MASK */ VR, VR, VRM2, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VF64_M4 */ VR, VRM4, FPR64, AVL, ixlenimm, /* PseudoVMFLE_VF64_M4_MASK */ VR, VR, VRM4, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VF64_M8 */ VR, VRM8, FPR64, AVL, ixlenimm, /* PseudoVMFLE_VF64_M8_MASK */ VR, VR, VRM8, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMFLE_VV_M1_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VV_M2 */ VR, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMFLE_VV_M2_MASK */ VR, VR, VRM2, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VV_M4 */ VR, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMFLE_VV_M4_MASK */ VR, VR, VRM4, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VV_M8 */ VR, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMFLE_VV_M8_MASK */ VR, VR, VRM8, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMFLE_VV_MF2_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMFLE_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMFLE_VV_MF4_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VF16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVMFLT_VF16_M1_MASK */ VR, VR, VR, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VF16_M2 */ VR, VRM2, FPR16, AVL, ixlenimm, /* PseudoVMFLT_VF16_M2_MASK */ VR, VR, VRM2, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VF16_M4 */ VR, VRM4, FPR16, AVL, ixlenimm, /* PseudoVMFLT_VF16_M4_MASK */ VR, VR, VRM4, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VF16_M8 */ VR, VRM8, FPR16, AVL, ixlenimm, /* PseudoVMFLT_VF16_M8_MASK */ VR, VR, VRM8, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVMFLT_VF16_MF2_MASK */ VR, VR, VR, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVMFLT_VF16_MF4_MASK */ VR, VR, VR, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VF32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVMFLT_VF32_M1_MASK */ VR, VR, VR, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VF32_M2 */ VR, VRM2, FPR32, AVL, ixlenimm, /* PseudoVMFLT_VF32_M2_MASK */ VR, VR, VRM2, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VF32_M4 */ VR, VRM4, FPR32, AVL, ixlenimm, /* PseudoVMFLT_VF32_M4_MASK */ VR, VR, VRM4, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VF32_M8 */ VR, VRM8, FPR32, AVL, ixlenimm, /* PseudoVMFLT_VF32_M8_MASK */ VR, VR, VRM8, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVMFLT_VF32_MF2_MASK */ VR, VR, VR, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VF64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVMFLT_VF64_M1_MASK */ VR, VR, VR, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VF64_M2 */ VR, VRM2, FPR64, AVL, ixlenimm, /* PseudoVMFLT_VF64_M2_MASK */ VR, VR, VRM2, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VF64_M4 */ VR, VRM4, FPR64, AVL, ixlenimm, /* PseudoVMFLT_VF64_M4_MASK */ VR, VR, VRM4, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VF64_M8 */ VR, VRM8, FPR64, AVL, ixlenimm, /* PseudoVMFLT_VF64_M8_MASK */ VR, VR, VRM8, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMFLT_VV_M1_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VV_M2 */ VR, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMFLT_VV_M2_MASK */ VR, VR, VRM2, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VV_M4 */ VR, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMFLT_VV_M4_MASK */ VR, VR, VRM4, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VV_M8 */ VR, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMFLT_VV_M8_MASK */ VR, VR, VRM8, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMFLT_VV_MF2_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMFLT_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMFLT_VV_MF4_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VF16_M1 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVMFNE_VF16_M1_MASK */ VR, VR, VR, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VF16_M2 */ VR, VRM2, FPR16, AVL, ixlenimm, /* PseudoVMFNE_VF16_M2_MASK */ VR, VR, VRM2, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VF16_M4 */ VR, VRM4, FPR16, AVL, ixlenimm, /* PseudoVMFNE_VF16_M4_MASK */ VR, VR, VRM4, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VF16_M8 */ VR, VRM8, FPR16, AVL, ixlenimm, /* PseudoVMFNE_VF16_M8_MASK */ VR, VR, VRM8, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VF16_MF2 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVMFNE_VF16_MF2_MASK */ VR, VR, VR, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VF16_MF4 */ VR, VR, FPR16, AVL, ixlenimm, /* PseudoVMFNE_VF16_MF4_MASK */ VR, VR, VR, FPR16, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VF32_M1 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVMFNE_VF32_M1_MASK */ VR, VR, VR, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VF32_M2 */ VR, VRM2, FPR32, AVL, ixlenimm, /* PseudoVMFNE_VF32_M2_MASK */ VR, VR, VRM2, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VF32_M4 */ VR, VRM4, FPR32, AVL, ixlenimm, /* PseudoVMFNE_VF32_M4_MASK */ VR, VR, VRM4, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VF32_M8 */ VR, VRM8, FPR32, AVL, ixlenimm, /* PseudoVMFNE_VF32_M8_MASK */ VR, VR, VRM8, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VF32_MF2 */ VR, VR, FPR32, AVL, ixlenimm, /* PseudoVMFNE_VF32_MF2_MASK */ VR, VR, VR, FPR32, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VF64_M1 */ VR, VR, FPR64, AVL, ixlenimm, /* PseudoVMFNE_VF64_M1_MASK */ VR, VR, VR, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VF64_M2 */ VR, VRM2, FPR64, AVL, ixlenimm, /* PseudoVMFNE_VF64_M2_MASK */ VR, VR, VRM2, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VF64_M4 */ VR, VRM4, FPR64, AVL, ixlenimm, /* PseudoVMFNE_VF64_M4_MASK */ VR, VR, VRM4, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VF64_M8 */ VR, VRM8, FPR64, AVL, ixlenimm, /* PseudoVMFNE_VF64_M8_MASK */ VR, VR, VRM8, FPR64, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMFNE_VV_M1_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VV_M2 */ VR, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMFNE_VV_M2_MASK */ VR, VR, VRM2, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VV_M4 */ VR, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMFNE_VV_M4_MASK */ VR, VR, VRM4, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VV_M8 */ VR, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMFNE_VV_M8_MASK */ VR, VR, VRM8, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMFNE_VV_MF2_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMFNE_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMFNE_VV_MF4_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMINU_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMINU_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMINU_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMINU_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMINU_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMINU_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMINU_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMINU_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMINU_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMINU_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMINU_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMINU_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMINU_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMINU_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMINU_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMINU_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMINU_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMINU_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMINU_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMINU_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMINU_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMINU_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMINU_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMINU_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMINU_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVMINU_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMINU_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVMINU_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVMINU_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMINU_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVMINU_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVMINU_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMINU_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVMINU_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMINU_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMINU_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMINU_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMINU_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMINU_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMINU_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMINU_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMINU_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMIN_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMIN_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMIN_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMIN_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMIN_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMIN_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMIN_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMIN_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMIN_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMIN_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMIN_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMIN_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMIN_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMIN_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMIN_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMIN_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMIN_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMIN_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMIN_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMIN_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMIN_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMIN_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMIN_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMIN_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMIN_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVMIN_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMIN_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVMIN_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVMIN_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMIN_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVMIN_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVMIN_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMIN_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVMIN_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMIN_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMIN_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMIN_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMIN_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMIN_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMIN_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMIN_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMIN_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMNAND_MM_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMNAND_MM_M2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMNAND_MM_M4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMNAND_MM_M8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMNAND_MM_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMNAND_MM_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMNAND_MM_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMNOR_MM_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMNOR_MM_M2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMNOR_MM_M4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMNOR_MM_M8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMNOR_MM_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMNOR_MM_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMNOR_MM_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMORN_MM_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMORN_MM_M2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMORN_MM_M4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMORN_MM_M8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMORN_MM_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMORN_MM_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMORN_MM_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMOR_MM_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMOR_MM_M2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMOR_MM_M4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMOR_MM_M8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMOR_MM_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMOR_MM_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMOR_MM_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSBC_VVM_M1 */ VR, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVMSBC_VVM_M2 */ VR, VRM2, VRM2, VMV0, AVL, ixlenimm, /* PseudoVMSBC_VVM_M4 */ VR, VRM4, VRM4, VMV0, AVL, ixlenimm, /* PseudoVMSBC_VVM_M8 */ VR, VRM8, VRM8, VMV0, AVL, ixlenimm, /* PseudoVMSBC_VVM_MF2 */ VR, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVMSBC_VVM_MF4 */ VR, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVMSBC_VVM_MF8 */ VR, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVMSBC_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSBC_VV_M2 */ VR, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMSBC_VV_M4 */ VR, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMSBC_VV_M8 */ VR, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMSBC_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSBC_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSBC_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSBC_VXM_M1 */ VR, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVMSBC_VXM_M2 */ VR, VRM2, GPR, VMV0, AVL, ixlenimm, /* PseudoVMSBC_VXM_M4 */ VR, VRM4, GPR, VMV0, AVL, ixlenimm, /* PseudoVMSBC_VXM_M8 */ VR, VRM8, GPR, VMV0, AVL, ixlenimm, /* PseudoVMSBC_VXM_MF2 */ VR, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVMSBC_VXM_MF4 */ VR, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVMSBC_VXM_MF8 */ VR, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVMSBC_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSBC_VX_M2 */ VR, VRM2, GPR, AVL, ixlenimm, /* PseudoVMSBC_VX_M4 */ VR, VRM4, GPR, AVL, ixlenimm, /* PseudoVMSBC_VX_M8 */ VR, VRM8, GPR, AVL, ixlenimm, /* PseudoVMSBC_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSBC_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSBC_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSBF_M_B1 */ VR, VR, AVL, ixlenimm, /* PseudoVMSBF_M_B16 */ VR, VR, AVL, ixlenimm, /* PseudoVMSBF_M_B16_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSBF_M_B1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSBF_M_B2 */ VR, VR, AVL, ixlenimm, /* PseudoVMSBF_M_B2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSBF_M_B32 */ VR, VR, AVL, ixlenimm, /* PseudoVMSBF_M_B32_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSBF_M_B4 */ VR, VR, AVL, ixlenimm, /* PseudoVMSBF_M_B4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSBF_M_B64 */ VR, VR, AVL, ixlenimm, /* PseudoVMSBF_M_B64_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSBF_M_B8 */ VR, VR, AVL, ixlenimm, /* PseudoVMSBF_M_B8_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VI_M1 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSEQ_VI_M1_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VI_M2 */ VR, VRM2, simm5, AVL, ixlenimm, /* PseudoVMSEQ_VI_M2_MASK */ VR, VR, VRM2, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VI_M4 */ VR, VRM4, simm5, AVL, ixlenimm, /* PseudoVMSEQ_VI_M4_MASK */ VR, VR, VRM4, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VI_M8 */ VR, VRM8, simm5, AVL, ixlenimm, /* PseudoVMSEQ_VI_M8_MASK */ VR, VR, VRM8, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VI_MF2 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSEQ_VI_MF2_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VI_MF4 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSEQ_VI_MF4_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VI_MF8 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSEQ_VI_MF8_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSEQ_VV_M1_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VV_M2 */ VR, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMSEQ_VV_M2_MASK */ VR, VR, VRM2, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VV_M4 */ VR, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMSEQ_VV_M4_MASK */ VR, VR, VRM4, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VV_M8 */ VR, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMSEQ_VV_M8_MASK */ VR, VR, VRM8, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSEQ_VV_MF2_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSEQ_VV_MF4_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSEQ_VV_MF8_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSEQ_VX_M1_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VX_M2 */ VR, VRM2, GPR, AVL, ixlenimm, /* PseudoVMSEQ_VX_M2_MASK */ VR, VR, VRM2, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VX_M4 */ VR, VRM4, GPR, AVL, ixlenimm, /* PseudoVMSEQ_VX_M4_MASK */ VR, VR, VRM4, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VX_M8 */ VR, VRM8, GPR, AVL, ixlenimm, /* PseudoVMSEQ_VX_M8_MASK */ VR, VR, VRM8, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSEQ_VX_MF2_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSEQ_VX_MF4_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSEQ_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSEQ_VX_MF8_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSET_M_B1 */ VR, AVL, ixlenimm, /* PseudoVMSET_M_B16 */ VR, AVL, ixlenimm, /* PseudoVMSET_M_B2 */ VR, AVL, ixlenimm, /* PseudoVMSET_M_B32 */ VR, AVL, ixlenimm, /* PseudoVMSET_M_B4 */ VR, AVL, ixlenimm, /* PseudoVMSET_M_B64 */ VR, AVL, ixlenimm, /* PseudoVMSET_M_B8 */ VR, AVL, ixlenimm, /* PseudoVMSGEU_VI */ VR, VR, simm5_plus1, VMaskOp, /* PseudoVMSGEU_VX */ VR, VR, GPR, /* PseudoVMSGEU_VX_M */ VRNoV0, VR, GPR, VMaskOp, /* PseudoVMSGEU_VX_M_T */ VR, VRNoV0, VR, GPR, VMaskOp, /* PseudoVMSGE_VI */ VR, VR, simm5_plus1, VMaskOp, /* PseudoVMSGE_VX */ VR, VR, GPR, /* PseudoVMSGE_VX_M */ VRNoV0, VR, GPR, VMaskOp, /* PseudoVMSGE_VX_M_T */ VR, VRNoV0, VR, GPR, VMaskOp, /* PseudoVMSGTU_VI_M1 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSGTU_VI_M1_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSGTU_VI_M2 */ VR, VRM2, simm5, AVL, ixlenimm, /* PseudoVMSGTU_VI_M2_MASK */ VR, VR, VRM2, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSGTU_VI_M4 */ VR, VRM4, simm5, AVL, ixlenimm, /* PseudoVMSGTU_VI_M4_MASK */ VR, VR, VRM4, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSGTU_VI_M8 */ VR, VRM8, simm5, AVL, ixlenimm, /* PseudoVMSGTU_VI_M8_MASK */ VR, VR, VRM8, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSGTU_VI_MF2 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSGTU_VI_MF2_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSGTU_VI_MF4 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSGTU_VI_MF4_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSGTU_VI_MF8 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSGTU_VI_MF8_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSGTU_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSGTU_VX_M1_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSGTU_VX_M2 */ VR, VRM2, GPR, AVL, ixlenimm, /* PseudoVMSGTU_VX_M2_MASK */ VR, VR, VRM2, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSGTU_VX_M4 */ VR, VRM4, GPR, AVL, ixlenimm, /* PseudoVMSGTU_VX_M4_MASK */ VR, VR, VRM4, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSGTU_VX_M8 */ VR, VRM8, GPR, AVL, ixlenimm, /* PseudoVMSGTU_VX_M8_MASK */ VR, VR, VRM8, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSGTU_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSGTU_VX_MF2_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSGTU_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSGTU_VX_MF4_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSGTU_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSGTU_VX_MF8_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSGT_VI_M1 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSGT_VI_M1_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSGT_VI_M2 */ VR, VRM2, simm5, AVL, ixlenimm, /* PseudoVMSGT_VI_M2_MASK */ VR, VR, VRM2, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSGT_VI_M4 */ VR, VRM4, simm5, AVL, ixlenimm, /* PseudoVMSGT_VI_M4_MASK */ VR, VR, VRM4, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSGT_VI_M8 */ VR, VRM8, simm5, AVL, ixlenimm, /* PseudoVMSGT_VI_M8_MASK */ VR, VR, VRM8, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSGT_VI_MF2 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSGT_VI_MF2_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSGT_VI_MF4 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSGT_VI_MF4_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSGT_VI_MF8 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSGT_VI_MF8_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSGT_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSGT_VX_M1_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSGT_VX_M2 */ VR, VRM2, GPR, AVL, ixlenimm, /* PseudoVMSGT_VX_M2_MASK */ VR, VR, VRM2, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSGT_VX_M4 */ VR, VRM4, GPR, AVL, ixlenimm, /* PseudoVMSGT_VX_M4_MASK */ VR, VR, VRM4, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSGT_VX_M8 */ VR, VRM8, GPR, AVL, ixlenimm, /* PseudoVMSGT_VX_M8_MASK */ VR, VR, VRM8, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSGT_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSGT_VX_MF2_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSGT_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSGT_VX_MF4_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSGT_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSGT_VX_MF8_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSIF_M_B1 */ VR, VR, AVL, ixlenimm, /* PseudoVMSIF_M_B16 */ VR, VR, AVL, ixlenimm, /* PseudoVMSIF_M_B16_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSIF_M_B1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSIF_M_B2 */ VR, VR, AVL, ixlenimm, /* PseudoVMSIF_M_B2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSIF_M_B32 */ VR, VR, AVL, ixlenimm, /* PseudoVMSIF_M_B32_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSIF_M_B4 */ VR, VR, AVL, ixlenimm, /* PseudoVMSIF_M_B4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSIF_M_B64 */ VR, VR, AVL, ixlenimm, /* PseudoVMSIF_M_B64_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSIF_M_B8 */ VR, VR, AVL, ixlenimm, /* PseudoVMSIF_M_B8_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VI_M1 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSLEU_VI_M1_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VI_M2 */ VR, VRM2, simm5, AVL, ixlenimm, /* PseudoVMSLEU_VI_M2_MASK */ VR, VR, VRM2, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VI_M4 */ VR, VRM4, simm5, AVL, ixlenimm, /* PseudoVMSLEU_VI_M4_MASK */ VR, VR, VRM4, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VI_M8 */ VR, VRM8, simm5, AVL, ixlenimm, /* PseudoVMSLEU_VI_M8_MASK */ VR, VR, VRM8, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VI_MF2 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSLEU_VI_MF2_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VI_MF4 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSLEU_VI_MF4_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VI_MF8 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSLEU_VI_MF8_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSLEU_VV_M1_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VV_M2 */ VR, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMSLEU_VV_M2_MASK */ VR, VR, VRM2, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VV_M4 */ VR, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMSLEU_VV_M4_MASK */ VR, VR, VRM4, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VV_M8 */ VR, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMSLEU_VV_M8_MASK */ VR, VR, VRM8, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSLEU_VV_MF2_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSLEU_VV_MF4_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSLEU_VV_MF8_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSLEU_VX_M1_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VX_M2 */ VR, VRM2, GPR, AVL, ixlenimm, /* PseudoVMSLEU_VX_M2_MASK */ VR, VR, VRM2, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VX_M4 */ VR, VRM4, GPR, AVL, ixlenimm, /* PseudoVMSLEU_VX_M4_MASK */ VR, VR, VRM4, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VX_M8 */ VR, VRM8, GPR, AVL, ixlenimm, /* PseudoVMSLEU_VX_M8_MASK */ VR, VR, VRM8, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSLEU_VX_MF2_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSLEU_VX_MF4_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLEU_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSLEU_VX_MF8_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VI_M1 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSLE_VI_M1_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VI_M2 */ VR, VRM2, simm5, AVL, ixlenimm, /* PseudoVMSLE_VI_M2_MASK */ VR, VR, VRM2, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VI_M4 */ VR, VRM4, simm5, AVL, ixlenimm, /* PseudoVMSLE_VI_M4_MASK */ VR, VR, VRM4, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VI_M8 */ VR, VRM8, simm5, AVL, ixlenimm, /* PseudoVMSLE_VI_M8_MASK */ VR, VR, VRM8, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VI_MF2 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSLE_VI_MF2_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VI_MF4 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSLE_VI_MF4_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VI_MF8 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSLE_VI_MF8_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSLE_VV_M1_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VV_M2 */ VR, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMSLE_VV_M2_MASK */ VR, VR, VRM2, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VV_M4 */ VR, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMSLE_VV_M4_MASK */ VR, VR, VRM4, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VV_M8 */ VR, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMSLE_VV_M8_MASK */ VR, VR, VRM8, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSLE_VV_MF2_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSLE_VV_MF4_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSLE_VV_MF8_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSLE_VX_M1_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VX_M2 */ VR, VRM2, GPR, AVL, ixlenimm, /* PseudoVMSLE_VX_M2_MASK */ VR, VR, VRM2, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VX_M4 */ VR, VRM4, GPR, AVL, ixlenimm, /* PseudoVMSLE_VX_M4_MASK */ VR, VR, VRM4, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VX_M8 */ VR, VRM8, GPR, AVL, ixlenimm, /* PseudoVMSLE_VX_M8_MASK */ VR, VR, VRM8, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSLE_VX_MF2_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSLE_VX_MF4_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLE_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSLE_VX_MF8_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLTU_VI */ VR, VR, simm5_plus1, VMaskOp, /* PseudoVMSLTU_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSLTU_VV_M1_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLTU_VV_M2 */ VR, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMSLTU_VV_M2_MASK */ VR, VR, VRM2, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVMSLTU_VV_M4 */ VR, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMSLTU_VV_M4_MASK */ VR, VR, VRM4, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVMSLTU_VV_M8 */ VR, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMSLTU_VV_M8_MASK */ VR, VR, VRM8, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVMSLTU_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSLTU_VV_MF2_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLTU_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSLTU_VV_MF4_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLTU_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSLTU_VV_MF8_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLTU_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSLTU_VX_M1_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLTU_VX_M2 */ VR, VRM2, GPR, AVL, ixlenimm, /* PseudoVMSLTU_VX_M2_MASK */ VR, VR, VRM2, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLTU_VX_M4 */ VR, VRM4, GPR, AVL, ixlenimm, /* PseudoVMSLTU_VX_M4_MASK */ VR, VR, VRM4, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLTU_VX_M8 */ VR, VRM8, GPR, AVL, ixlenimm, /* PseudoVMSLTU_VX_M8_MASK */ VR, VR, VRM8, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLTU_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSLTU_VX_MF2_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLTU_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSLTU_VX_MF4_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLTU_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSLTU_VX_MF8_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLT_VI */ VR, VR, simm5_plus1, VMaskOp, /* PseudoVMSLT_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSLT_VV_M1_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLT_VV_M2 */ VR, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMSLT_VV_M2_MASK */ VR, VR, VRM2, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVMSLT_VV_M4 */ VR, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMSLT_VV_M4_MASK */ VR, VR, VRM4, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVMSLT_VV_M8 */ VR, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMSLT_VV_M8_MASK */ VR, VR, VRM8, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVMSLT_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSLT_VV_MF2_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLT_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSLT_VV_MF4_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLT_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSLT_VV_MF8_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLT_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSLT_VX_M1_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLT_VX_M2 */ VR, VRM2, GPR, AVL, ixlenimm, /* PseudoVMSLT_VX_M2_MASK */ VR, VR, VRM2, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLT_VX_M4 */ VR, VRM4, GPR, AVL, ixlenimm, /* PseudoVMSLT_VX_M4_MASK */ VR, VR, VRM4, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLT_VX_M8 */ VR, VRM8, GPR, AVL, ixlenimm, /* PseudoVMSLT_VX_M8_MASK */ VR, VR, VRM8, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLT_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSLT_VX_MF2_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLT_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSLT_VX_MF4_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSLT_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSLT_VX_MF8_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VI_M1 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSNE_VI_M1_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VI_M2 */ VR, VRM2, simm5, AVL, ixlenimm, /* PseudoVMSNE_VI_M2_MASK */ VR, VR, VRM2, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VI_M4 */ VR, VRM4, simm5, AVL, ixlenimm, /* PseudoVMSNE_VI_M4_MASK */ VR, VR, VRM4, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VI_M8 */ VR, VRM8, simm5, AVL, ixlenimm, /* PseudoVMSNE_VI_M8_MASK */ VR, VR, VRM8, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VI_MF2 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSNE_VI_MF2_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VI_MF4 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSNE_VI_MF4_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VI_MF8 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMSNE_VI_MF8_MASK */ VR, VR, VR, simm5, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSNE_VV_M1_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VV_M2 */ VR, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMSNE_VV_M2_MASK */ VR, VR, VRM2, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VV_M4 */ VR, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMSNE_VV_M4_MASK */ VR, VR, VRM4, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VV_M8 */ VR, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMSNE_VV_M8_MASK */ VR, VR, VRM8, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSNE_VV_MF2_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSNE_VV_MF4_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMSNE_VV_MF8_MASK */ VR, VR, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSNE_VX_M1_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VX_M2 */ VR, VRM2, GPR, AVL, ixlenimm, /* PseudoVMSNE_VX_M2_MASK */ VR, VR, VRM2, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VX_M4 */ VR, VRM4, GPR, AVL, ixlenimm, /* PseudoVMSNE_VX_M4_MASK */ VR, VR, VRM4, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VX_M8 */ VR, VRM8, GPR, AVL, ixlenimm, /* PseudoVMSNE_VX_M8_MASK */ VR, VR, VRM8, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSNE_VX_MF2_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSNE_VX_MF4_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSNE_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMSNE_VX_MF8_MASK */ VR, VR, VR, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVMSOF_M_B1 */ VR, VR, AVL, ixlenimm, /* PseudoVMSOF_M_B16 */ VR, VR, AVL, ixlenimm, /* PseudoVMSOF_M_B16_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSOF_M_B1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSOF_M_B2 */ VR, VR, AVL, ixlenimm, /* PseudoVMSOF_M_B2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSOF_M_B32 */ VR, VR, AVL, ixlenimm, /* PseudoVMSOF_M_B32_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSOF_M_B4 */ VR, VR, AVL, ixlenimm, /* PseudoVMSOF_M_B4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSOF_M_B64 */ VR, VR, AVL, ixlenimm, /* PseudoVMSOF_M_B64_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMSOF_M_B8 */ VR, VR, AVL, ixlenimm, /* PseudoVMSOF_M_B8_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, /* PseudoVMULHSU_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMULHSU_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHSU_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMULHSU_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMULHSU_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHSU_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMULHSU_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMULHSU_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHSU_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMULHSU_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMULHSU_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHSU_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMULHSU_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMULHSU_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHSU_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMULHSU_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMULHSU_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHSU_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMULHSU_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMULHSU_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHSU_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMULHSU_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULHSU_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHSU_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULHSU_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVMULHSU_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHSU_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVMULHSU_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVMULHSU_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHSU_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVMULHSU_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVMULHSU_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHSU_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVMULHSU_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULHSU_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHSU_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULHSU_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULHSU_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHSU_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULHSU_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULHSU_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHSU_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULHU_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMULHU_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHU_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMULHU_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMULHU_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHU_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMULHU_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMULHU_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHU_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMULHU_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMULHU_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHU_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMULHU_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMULHU_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHU_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMULHU_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMULHU_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHU_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMULHU_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMULHU_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHU_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMULHU_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULHU_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHU_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULHU_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVMULHU_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHU_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVMULHU_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVMULHU_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHU_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVMULHU_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVMULHU_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHU_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVMULHU_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULHU_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHU_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULHU_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULHU_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHU_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULHU_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULHU_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULHU_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULH_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMULH_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULH_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMULH_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMULH_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULH_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMULH_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMULH_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULH_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMULH_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMULH_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULH_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMULH_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMULH_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULH_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMULH_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMULH_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULH_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMULH_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMULH_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULH_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMULH_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULH_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULH_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULH_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVMULH_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULH_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVMULH_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVMULH_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULH_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVMULH_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVMULH_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULH_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVMULH_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULH_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULH_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULH_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULH_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULH_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULH_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMULH_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMULH_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMUL_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMUL_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMUL_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMUL_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMUL_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMUL_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMUL_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMUL_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMUL_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMUL_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMUL_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMUL_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMUL_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMUL_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMUL_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMUL_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMUL_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMUL_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMUL_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMUL_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMUL_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVMUL_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMUL_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMUL_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMUL_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVMUL_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMUL_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVMUL_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVMUL_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMUL_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVMUL_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVMUL_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMUL_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVMUL_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMUL_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMUL_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMUL_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMUL_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMUL_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMUL_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMUL_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVMUL_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVMV_S_X_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMV_S_X_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVMV_S_X_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVMV_S_X_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVMV_S_X_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMV_S_X_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMV_S_X_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMV_V_I_M1 */ VR, simm5, AVL, ixlenimm, /* PseudoVMV_V_I_M1_TU */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMV_V_I_M2 */ VRM2, simm5, AVL, ixlenimm, /* PseudoVMV_V_I_M2_TU */ VRM2, VRM2, simm5, AVL, ixlenimm, /* PseudoVMV_V_I_M4 */ VRM4, simm5, AVL, ixlenimm, /* PseudoVMV_V_I_M4_TU */ VRM4, VRM4, simm5, AVL, ixlenimm, /* PseudoVMV_V_I_M8 */ VRM8, simm5, AVL, ixlenimm, /* PseudoVMV_V_I_M8_TU */ VRM8, VRM8, simm5, AVL, ixlenimm, /* PseudoVMV_V_I_MF2 */ VR, simm5, AVL, ixlenimm, /* PseudoVMV_V_I_MF2_TU */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMV_V_I_MF4 */ VR, simm5, AVL, ixlenimm, /* PseudoVMV_V_I_MF4_TU */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMV_V_I_MF8 */ VR, simm5, AVL, ixlenimm, /* PseudoVMV_V_I_MF8_TU */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVMV_V_V_M1 */ VR, VR, AVL, ixlenimm, /* PseudoVMV_V_V_M1_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMV_V_V_M2 */ VRM2, VRM2, AVL, ixlenimm, /* PseudoVMV_V_V_M2_TU */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVMV_V_V_M4 */ VRM4, VRM4, AVL, ixlenimm, /* PseudoVMV_V_V_M4_TU */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVMV_V_V_M8 */ VRM8, VRM8, AVL, ixlenimm, /* PseudoVMV_V_V_M8_TU */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVMV_V_V_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVMV_V_V_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMV_V_V_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVMV_V_V_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMV_V_V_MF8 */ VR, VR, AVL, ixlenimm, /* PseudoVMV_V_V_MF8_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMV_V_X_M1 */ VR, GPR, AVL, ixlenimm, /* PseudoVMV_V_X_M1_TU */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMV_V_X_M2 */ VRM2, GPR, AVL, ixlenimm, /* PseudoVMV_V_X_M2_TU */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVMV_V_X_M4 */ VRM4, GPR, AVL, ixlenimm, /* PseudoVMV_V_X_M4_TU */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVMV_V_X_M8 */ VRM8, GPR, AVL, ixlenimm, /* PseudoVMV_V_X_M8_TU */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVMV_V_X_MF2 */ VR, GPR, AVL, ixlenimm, /* PseudoVMV_V_X_MF2_TU */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMV_V_X_MF4 */ VR, GPR, AVL, ixlenimm, /* PseudoVMV_V_X_MF4_TU */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMV_V_X_MF8 */ VR, GPR, AVL, ixlenimm, /* PseudoVMV_V_X_MF8_TU */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVMV_X_S_M1 */ GPR, VR, ixlenimm, /* PseudoVMV_X_S_M2 */ GPR, VRM2, ixlenimm, /* PseudoVMV_X_S_M4 */ GPR, VRM4, ixlenimm, /* PseudoVMV_X_S_M8 */ GPR, VRM8, ixlenimm, /* PseudoVMV_X_S_MF2 */ GPR, VR, ixlenimm, /* PseudoVMV_X_S_MF4 */ GPR, VR, ixlenimm, /* PseudoVMV_X_S_MF8 */ GPR, VR, ixlenimm, /* PseudoVMXNOR_MM_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMXNOR_MM_M2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMXNOR_MM_M4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMXNOR_MM_M8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMXNOR_MM_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMXNOR_MM_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMXNOR_MM_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMXOR_MM_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMXOR_MM_M2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMXOR_MM_M4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMXOR_MM_M8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMXOR_MM_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMXOR_MM_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVMXOR_MM_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVNCLIPU_WI_M1 */ VR, VRM2, uimm5, AVL, ixlenimm, /* PseudoVNCLIPU_WI_M1_MASK */ VRNoV0, VRNoV0, VRM2, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIPU_WI_M1_TU */ VR, VR, VRM2, uimm5, AVL, ixlenimm, /* PseudoVNCLIPU_WI_M2 */ VRM2, VRM4, uimm5, AVL, ixlenimm, /* PseudoVNCLIPU_WI_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIPU_WI_M2_TU */ VRM2, VRM2, VRM4, uimm5, AVL, ixlenimm, /* PseudoVNCLIPU_WI_M4 */ VRM4, VRM8, uimm5, AVL, ixlenimm, /* PseudoVNCLIPU_WI_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIPU_WI_M4_TU */ VRM4, VRM4, VRM8, uimm5, AVL, ixlenimm, /* PseudoVNCLIPU_WI_MF2 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNCLIPU_WI_MF2_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIPU_WI_MF2_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNCLIPU_WI_MF4 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNCLIPU_WI_MF4_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIPU_WI_MF4_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNCLIPU_WI_MF8 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNCLIPU_WI_MF8_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIPU_WI_MF8_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNCLIPU_WV_M1 */ VR, VRM2, VR, AVL, ixlenimm, /* PseudoVNCLIPU_WV_M1_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIPU_WV_M1_TU */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVNCLIPU_WV_M2 */ VRM2, VRM4, VRM2, AVL, ixlenimm, /* PseudoVNCLIPU_WV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIPU_WV_M2_TU */ VRM2, VRM2, VRM4, VRM2, AVL, ixlenimm, /* PseudoVNCLIPU_WV_M4 */ VRM4, VRM8, VRM4, AVL, ixlenimm, /* PseudoVNCLIPU_WV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIPU_WV_M4_TU */ VRM4, VRM4, VRM8, VRM4, AVL, ixlenimm, /* PseudoVNCLIPU_WV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVNCLIPU_WV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIPU_WV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVNCLIPU_WV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVNCLIPU_WV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIPU_WV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVNCLIPU_WV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVNCLIPU_WV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIPU_WV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVNCLIPU_WX_M1 */ VR, VRM2, GPR, AVL, ixlenimm, /* PseudoVNCLIPU_WX_M1_MASK */ VRNoV0, VRNoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIPU_WX_M1_TU */ VR, VR, VRM2, GPR, AVL, ixlenimm, /* PseudoVNCLIPU_WX_M2 */ VRM2, VRM4, GPR, AVL, ixlenimm, /* PseudoVNCLIPU_WX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIPU_WX_M2_TU */ VRM2, VRM2, VRM4, GPR, AVL, ixlenimm, /* PseudoVNCLIPU_WX_M4 */ VRM4, VRM8, GPR, AVL, ixlenimm, /* PseudoVNCLIPU_WX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIPU_WX_M4_TU */ VRM4, VRM4, VRM8, GPR, AVL, ixlenimm, /* PseudoVNCLIPU_WX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVNCLIPU_WX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIPU_WX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVNCLIPU_WX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVNCLIPU_WX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIPU_WX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVNCLIPU_WX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVNCLIPU_WX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIPU_WX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVNCLIP_WI_M1 */ VR, VRM2, uimm5, AVL, ixlenimm, /* PseudoVNCLIP_WI_M1_MASK */ VRNoV0, VRNoV0, VRM2, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIP_WI_M1_TU */ VR, VR, VRM2, uimm5, AVL, ixlenimm, /* PseudoVNCLIP_WI_M2 */ VRM2, VRM4, uimm5, AVL, ixlenimm, /* PseudoVNCLIP_WI_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIP_WI_M2_TU */ VRM2, VRM2, VRM4, uimm5, AVL, ixlenimm, /* PseudoVNCLIP_WI_M4 */ VRM4, VRM8, uimm5, AVL, ixlenimm, /* PseudoVNCLIP_WI_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIP_WI_M4_TU */ VRM4, VRM4, VRM8, uimm5, AVL, ixlenimm, /* PseudoVNCLIP_WI_MF2 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNCLIP_WI_MF2_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIP_WI_MF2_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNCLIP_WI_MF4 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNCLIP_WI_MF4_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIP_WI_MF4_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNCLIP_WI_MF8 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNCLIP_WI_MF8_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIP_WI_MF8_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNCLIP_WV_M1 */ VR, VRM2, VR, AVL, ixlenimm, /* PseudoVNCLIP_WV_M1_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIP_WV_M1_TU */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVNCLIP_WV_M2 */ VRM2, VRM4, VRM2, AVL, ixlenimm, /* PseudoVNCLIP_WV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIP_WV_M2_TU */ VRM2, VRM2, VRM4, VRM2, AVL, ixlenimm, /* PseudoVNCLIP_WV_M4 */ VRM4, VRM8, VRM4, AVL, ixlenimm, /* PseudoVNCLIP_WV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIP_WV_M4_TU */ VRM4, VRM4, VRM8, VRM4, AVL, ixlenimm, /* PseudoVNCLIP_WV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVNCLIP_WV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIP_WV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVNCLIP_WV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVNCLIP_WV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIP_WV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVNCLIP_WV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVNCLIP_WV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIP_WV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVNCLIP_WX_M1 */ VR, VRM2, GPR, AVL, ixlenimm, /* PseudoVNCLIP_WX_M1_MASK */ VRNoV0, VRNoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIP_WX_M1_TU */ VR, VR, VRM2, GPR, AVL, ixlenimm, /* PseudoVNCLIP_WX_M2 */ VRM2, VRM4, GPR, AVL, ixlenimm, /* PseudoVNCLIP_WX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIP_WX_M2_TU */ VRM2, VRM2, VRM4, GPR, AVL, ixlenimm, /* PseudoVNCLIP_WX_M4 */ VRM4, VRM8, GPR, AVL, ixlenimm, /* PseudoVNCLIP_WX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIP_WX_M4_TU */ VRM4, VRM4, VRM8, GPR, AVL, ixlenimm, /* PseudoVNCLIP_WX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVNCLIP_WX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIP_WX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVNCLIP_WX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVNCLIP_WX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIP_WX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVNCLIP_WX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVNCLIP_WX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNCLIP_WX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVNMSAC_VV_M1 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VV_M2 */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VV_M4 */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VV_M8 */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VV_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VV_MF8 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VX_M1 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VX_M1_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VX_M2 */ VRM2, VRM2, GPR, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, GPR, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VX_M4 */ VRM4, VRM4, GPR, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, GPR, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VX_M8 */ VRM8, VRM8, GPR, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, GPR, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VX_MF2 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VX_MF2_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VX_MF4 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VX_MF4_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VX_MF8 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVNMSAC_VX_MF8_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VV_M1 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VV_M2 */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VV_M4 */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VV_M8 */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VV_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VV_MF8 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VX_M1 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VX_M1_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VX_M2 */ VRM2, VRM2, GPR, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, GPR, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VX_M4 */ VRM4, VRM4, GPR, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, GPR, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VX_M8 */ VRM8, VRM8, GPR, VRM8, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, GPR, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VX_MF2 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VX_MF2_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VX_MF4 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VX_MF4_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VX_MF8 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVNMSUB_VX_MF8_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRA_WI_M1 */ VR, VRM2, uimm5, AVL, ixlenimm, /* PseudoVNSRA_WI_M1_MASK */ VRNoV0, VRNoV0, VRM2, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRA_WI_M1_TU */ VR, VR, VRM2, uimm5, AVL, ixlenimm, /* PseudoVNSRA_WI_M2 */ VRM2, VRM4, uimm5, AVL, ixlenimm, /* PseudoVNSRA_WI_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRA_WI_M2_TU */ VRM2, VRM2, VRM4, uimm5, AVL, ixlenimm, /* PseudoVNSRA_WI_M4 */ VRM4, VRM8, uimm5, AVL, ixlenimm, /* PseudoVNSRA_WI_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRA_WI_M4_TU */ VRM4, VRM4, VRM8, uimm5, AVL, ixlenimm, /* PseudoVNSRA_WI_MF2 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNSRA_WI_MF2_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRA_WI_MF2_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNSRA_WI_MF4 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNSRA_WI_MF4_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRA_WI_MF4_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNSRA_WI_MF8 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNSRA_WI_MF8_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRA_WI_MF8_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNSRA_WV_M1 */ VR, VRM2, VR, AVL, ixlenimm, /* PseudoVNSRA_WV_M1_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRA_WV_M1_TU */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVNSRA_WV_M2 */ VRM2, VRM4, VRM2, AVL, ixlenimm, /* PseudoVNSRA_WV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRA_WV_M2_TU */ VRM2, VRM2, VRM4, VRM2, AVL, ixlenimm, /* PseudoVNSRA_WV_M4 */ VRM4, VRM8, VRM4, AVL, ixlenimm, /* PseudoVNSRA_WV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRA_WV_M4_TU */ VRM4, VRM4, VRM8, VRM4, AVL, ixlenimm, /* PseudoVNSRA_WV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVNSRA_WV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRA_WV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVNSRA_WV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVNSRA_WV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRA_WV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVNSRA_WV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVNSRA_WV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRA_WV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVNSRA_WX_M1 */ VR, VRM2, GPR, AVL, ixlenimm, /* PseudoVNSRA_WX_M1_MASK */ VRNoV0, VRNoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRA_WX_M1_TU */ VR, VR, VRM2, GPR, AVL, ixlenimm, /* PseudoVNSRA_WX_M2 */ VRM2, VRM4, GPR, AVL, ixlenimm, /* PseudoVNSRA_WX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRA_WX_M2_TU */ VRM2, VRM2, VRM4, GPR, AVL, ixlenimm, /* PseudoVNSRA_WX_M4 */ VRM4, VRM8, GPR, AVL, ixlenimm, /* PseudoVNSRA_WX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRA_WX_M4_TU */ VRM4, VRM4, VRM8, GPR, AVL, ixlenimm, /* PseudoVNSRA_WX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVNSRA_WX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRA_WX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVNSRA_WX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVNSRA_WX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRA_WX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVNSRA_WX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVNSRA_WX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRA_WX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVNSRL_WI_M1 */ VR, VRM2, uimm5, AVL, ixlenimm, /* PseudoVNSRL_WI_M1_MASK */ VRNoV0, VRNoV0, VRM2, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRL_WI_M1_TU */ VR, VR, VRM2, uimm5, AVL, ixlenimm, /* PseudoVNSRL_WI_M2 */ VRM2, VRM4, uimm5, AVL, ixlenimm, /* PseudoVNSRL_WI_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRL_WI_M2_TU */ VRM2, VRM2, VRM4, uimm5, AVL, ixlenimm, /* PseudoVNSRL_WI_M4 */ VRM4, VRM8, uimm5, AVL, ixlenimm, /* PseudoVNSRL_WI_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRL_WI_M4_TU */ VRM4, VRM4, VRM8, uimm5, AVL, ixlenimm, /* PseudoVNSRL_WI_MF2 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNSRL_WI_MF2_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRL_WI_MF2_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNSRL_WI_MF4 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNSRL_WI_MF4_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRL_WI_MF4_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNSRL_WI_MF8 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNSRL_WI_MF8_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRL_WI_MF8_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVNSRL_WV_M1 */ VR, VRM2, VR, AVL, ixlenimm, /* PseudoVNSRL_WV_M1_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRL_WV_M1_TU */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVNSRL_WV_M2 */ VRM2, VRM4, VRM2, AVL, ixlenimm, /* PseudoVNSRL_WV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRL_WV_M2_TU */ VRM2, VRM2, VRM4, VRM2, AVL, ixlenimm, /* PseudoVNSRL_WV_M4 */ VRM4, VRM8, VRM4, AVL, ixlenimm, /* PseudoVNSRL_WV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRL_WV_M4_TU */ VRM4, VRM4, VRM8, VRM4, AVL, ixlenimm, /* PseudoVNSRL_WV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVNSRL_WV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRL_WV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVNSRL_WV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVNSRL_WV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRL_WV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVNSRL_WV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVNSRL_WV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRL_WV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVNSRL_WX_M1 */ VR, VRM2, GPR, AVL, ixlenimm, /* PseudoVNSRL_WX_M1_MASK */ VRNoV0, VRNoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRL_WX_M1_TU */ VR, VR, VRM2, GPR, AVL, ixlenimm, /* PseudoVNSRL_WX_M2 */ VRM2, VRM4, GPR, AVL, ixlenimm, /* PseudoVNSRL_WX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRL_WX_M2_TU */ VRM2, VRM2, VRM4, GPR, AVL, ixlenimm, /* PseudoVNSRL_WX_M4 */ VRM4, VRM8, GPR, AVL, ixlenimm, /* PseudoVNSRL_WX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRL_WX_M4_TU */ VRM4, VRM4, VRM8, GPR, AVL, ixlenimm, /* PseudoVNSRL_WX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVNSRL_WX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRL_WX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVNSRL_WX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVNSRL_WX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRL_WX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVNSRL_WX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVNSRL_WX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVNSRL_WX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVOR_VI_M1 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVOR_VI_M1_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VI_M1_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVOR_VI_M2 */ VRM2, VRM2, simm5, AVL, ixlenimm, /* PseudoVOR_VI_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VI_M2_TU */ VRM2, VRM2, VRM2, simm5, AVL, ixlenimm, /* PseudoVOR_VI_M4 */ VRM4, VRM4, simm5, AVL, ixlenimm, /* PseudoVOR_VI_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VI_M4_TU */ VRM4, VRM4, VRM4, simm5, AVL, ixlenimm, /* PseudoVOR_VI_M8 */ VRM8, VRM8, simm5, AVL, ixlenimm, /* PseudoVOR_VI_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VI_M8_TU */ VRM8, VRM8, VRM8, simm5, AVL, ixlenimm, /* PseudoVOR_VI_MF2 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVOR_VI_MF2_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VI_MF2_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVOR_VI_MF4 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVOR_VI_MF4_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VI_MF4_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVOR_VI_MF8 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVOR_VI_MF8_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VI_MF8_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVOR_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVOR_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVOR_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVOR_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVOR_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVOR_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVOR_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVOR_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVOR_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVOR_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVOR_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVOR_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVOR_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVOR_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVOR_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVOR_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVOR_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVOR_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVOR_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVOR_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVOR_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVOR_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVOR_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVOR_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVOR_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVOR_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVOR_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVOR_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVOR_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVREDAND_VS_M1 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDAND_VS_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDAND_VS_M2 */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVREDAND_VS_M2_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDAND_VS_M4 */ VR, VR, VRM4, VR, AVL, ixlenimm, /* PseudoVREDAND_VS_M4_MASK */ VRNoV0, VRNoV0, VRM4, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDAND_VS_M8 */ VR, VR, VRM8, VR, AVL, ixlenimm, /* PseudoVREDAND_VS_M8_MASK */ VRNoV0, VRNoV0, VRM8, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDAND_VS_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDAND_VS_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDAND_VS_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDAND_VS_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDAND_VS_MF8 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDAND_VS_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMAXU_VS_M1 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDMAXU_VS_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMAXU_VS_M2 */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVREDMAXU_VS_M2_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMAXU_VS_M4 */ VR, VR, VRM4, VR, AVL, ixlenimm, /* PseudoVREDMAXU_VS_M4_MASK */ VRNoV0, VRNoV0, VRM4, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMAXU_VS_M8 */ VR, VR, VRM8, VR, AVL, ixlenimm, /* PseudoVREDMAXU_VS_M8_MASK */ VRNoV0, VRNoV0, VRM8, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMAXU_VS_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDMAXU_VS_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMAXU_VS_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDMAXU_VS_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMAXU_VS_MF8 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDMAXU_VS_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMAX_VS_M1 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDMAX_VS_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMAX_VS_M2 */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVREDMAX_VS_M2_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMAX_VS_M4 */ VR, VR, VRM4, VR, AVL, ixlenimm, /* PseudoVREDMAX_VS_M4_MASK */ VRNoV0, VRNoV0, VRM4, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMAX_VS_M8 */ VR, VR, VRM8, VR, AVL, ixlenimm, /* PseudoVREDMAX_VS_M8_MASK */ VRNoV0, VRNoV0, VRM8, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMAX_VS_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDMAX_VS_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMAX_VS_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDMAX_VS_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMAX_VS_MF8 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDMAX_VS_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMINU_VS_M1 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDMINU_VS_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMINU_VS_M2 */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVREDMINU_VS_M2_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMINU_VS_M4 */ VR, VR, VRM4, VR, AVL, ixlenimm, /* PseudoVREDMINU_VS_M4_MASK */ VRNoV0, VRNoV0, VRM4, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMINU_VS_M8 */ VR, VR, VRM8, VR, AVL, ixlenimm, /* PseudoVREDMINU_VS_M8_MASK */ VRNoV0, VRNoV0, VRM8, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMINU_VS_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDMINU_VS_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMINU_VS_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDMINU_VS_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMINU_VS_MF8 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDMINU_VS_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMIN_VS_M1 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDMIN_VS_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMIN_VS_M2 */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVREDMIN_VS_M2_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMIN_VS_M4 */ VR, VR, VRM4, VR, AVL, ixlenimm, /* PseudoVREDMIN_VS_M4_MASK */ VRNoV0, VRNoV0, VRM4, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMIN_VS_M8 */ VR, VR, VRM8, VR, AVL, ixlenimm, /* PseudoVREDMIN_VS_M8_MASK */ VRNoV0, VRNoV0, VRM8, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMIN_VS_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDMIN_VS_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMIN_VS_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDMIN_VS_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDMIN_VS_MF8 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDMIN_VS_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDOR_VS_M1 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDOR_VS_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDOR_VS_M2 */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVREDOR_VS_M2_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDOR_VS_M4 */ VR, VR, VRM4, VR, AVL, ixlenimm, /* PseudoVREDOR_VS_M4_MASK */ VRNoV0, VRNoV0, VRM4, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDOR_VS_M8 */ VR, VR, VRM8, VR, AVL, ixlenimm, /* PseudoVREDOR_VS_M8_MASK */ VRNoV0, VRNoV0, VRM8, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDOR_VS_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDOR_VS_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDOR_VS_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDOR_VS_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDOR_VS_MF8 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDOR_VS_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDSUM_VS_M1 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDSUM_VS_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDSUM_VS_M2 */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVREDSUM_VS_M2_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDSUM_VS_M4 */ VR, VR, VRM4, VR, AVL, ixlenimm, /* PseudoVREDSUM_VS_M4_MASK */ VRNoV0, VRNoV0, VRM4, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDSUM_VS_M8 */ VR, VR, VRM8, VR, AVL, ixlenimm, /* PseudoVREDSUM_VS_M8_MASK */ VRNoV0, VRNoV0, VRM8, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDSUM_VS_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDSUM_VS_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDSUM_VS_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDSUM_VS_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDSUM_VS_MF8 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDSUM_VS_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDXOR_VS_M1 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDXOR_VS_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDXOR_VS_M2 */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVREDXOR_VS_M2_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDXOR_VS_M4 */ VR, VR, VRM4, VR, AVL, ixlenimm, /* PseudoVREDXOR_VS_M4_MASK */ VRNoV0, VRNoV0, VRM4, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDXOR_VS_M8 */ VR, VR, VRM8, VR, AVL, ixlenimm, /* PseudoVREDXOR_VS_M8_MASK */ VRNoV0, VRNoV0, VRM8, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDXOR_VS_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDXOR_VS_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDXOR_VS_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDXOR_VS_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVREDXOR_VS_MF8 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREDXOR_VS_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVRELOAD2_M1 */ VRN2M1, GPR, /* PseudoVRELOAD2_M2 */ VRN2M2, GPR, /* PseudoVRELOAD2_M4 */ VRN2M4, GPR, /* PseudoVRELOAD2_MF2 */ VRN2M1, GPR, /* PseudoVRELOAD2_MF4 */ VRN2M1, GPR, /* PseudoVRELOAD2_MF8 */ VRN2M1, GPR, /* PseudoVRELOAD3_M1 */ VRN3M1, GPR, /* PseudoVRELOAD3_M2 */ VRN3M2, GPR, /* PseudoVRELOAD3_MF2 */ VRN3M1, GPR, /* PseudoVRELOAD3_MF4 */ VRN3M1, GPR, /* PseudoVRELOAD3_MF8 */ VRN3M1, GPR, /* PseudoVRELOAD4_M1 */ VRN4M1, GPR, /* PseudoVRELOAD4_M2 */ VRN4M2, GPR, /* PseudoVRELOAD4_MF2 */ VRN4M1, GPR, /* PseudoVRELOAD4_MF4 */ VRN4M1, GPR, /* PseudoVRELOAD4_MF8 */ VRN4M1, GPR, /* PseudoVRELOAD5_M1 */ VRN5M1, GPR, /* PseudoVRELOAD5_MF2 */ VRN5M1, GPR, /* PseudoVRELOAD5_MF4 */ VRN5M1, GPR, /* PseudoVRELOAD5_MF8 */ VRN5M1, GPR, /* PseudoVRELOAD6_M1 */ VRN6M1, GPR, /* PseudoVRELOAD6_MF2 */ VRN6M1, GPR, /* PseudoVRELOAD6_MF4 */ VRN6M1, GPR, /* PseudoVRELOAD6_MF8 */ VRN6M1, GPR, /* PseudoVRELOAD7_M1 */ VRN7M1, GPR, /* PseudoVRELOAD7_MF2 */ VRN7M1, GPR, /* PseudoVRELOAD7_MF4 */ VRN7M1, GPR, /* PseudoVRELOAD7_MF8 */ VRN7M1, GPR, /* PseudoVRELOAD8_M1 */ VRN8M1, GPR, /* PseudoVRELOAD8_MF2 */ VRN8M1, GPR, /* PseudoVRELOAD8_MF4 */ VRN8M1, GPR, /* PseudoVRELOAD8_MF8 */ VRN8M1, GPR, /* PseudoVREMU_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVREMU_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREMU_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREMU_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVREMU_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREMU_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVREMU_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVREMU_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREMU_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVREMU_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVREMU_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREMU_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVREMU_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVREMU_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREMU_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREMU_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVREMU_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREMU_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREMU_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVREMU_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREMU_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREMU_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVREMU_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREMU_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVREMU_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVREMU_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREMU_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVREMU_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVREMU_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREMU_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVREMU_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVREMU_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREMU_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVREMU_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVREMU_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREMU_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVREMU_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVREMU_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREMU_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVREMU_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVREMU_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREMU_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVREM_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVREM_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREM_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREM_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVREM_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREM_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVREM_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVREM_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREM_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVREM_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVREM_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREM_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVREM_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVREM_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREM_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREM_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVREM_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREM_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREM_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVREM_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREM_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVREM_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVREM_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREM_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVREM_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVREM_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREM_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVREM_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVREM_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREM_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVREM_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVREM_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREM_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVREM_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVREM_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREM_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVREM_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVREM_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREM_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVREM_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVREM_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVREM_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M1_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M1_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_M1_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M1_M2 */ VR, VR, VRM2, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M1_M2_MASK */ VRNoV0, VRNoV0, VR, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_M1_M2_TU */ VR, VR, VR, VRM2, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M1_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M1_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_M1_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M1_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M1_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_M1_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M2_M1 */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M2_M1_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_M2_M1_TU */ VRM2, VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M2_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M2_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_M2_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M2_M4 */ VRM2, VRM2, VRM4, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M2_M4_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_M2_M4_TU */ VRM2, VRM2, VRM2, VRM4, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M2_MF2 */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M2_MF2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_M2_MF2_TU */ VRM2, VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M4_M1 */ VRM4, VRM4, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M4_M1_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_M4_M1_TU */ VRM4, VRM4, VRM4, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M4_M2 */ VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M4_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_M4_M2_TU */ VRM4, VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M4_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M4_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_M4_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M4_M8 */ VRM4, VRM4, VRM8, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M4_M8_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_M4_M8_TU */ VRM4, VRM4, VRM4, VRM8, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M8_M2 */ VRM8, VRM8, VRM2, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M8_M2_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_M8_M2_TU */ VRM8, VRM8, VRM8, VRM2, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M8_M4 */ VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M8_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_M8_M4_TU */ VRM8, VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M8_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_M8_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_M8_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_MF2_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_MF2_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_MF2_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_MF2_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_MF2_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_MF2_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_MF2_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_MF2_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_MF2_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_MF2_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_MF2_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_MF2_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_MF4_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_MF4_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_MF4_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_MF4_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_MF4_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_MF4_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_MF4_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_MF4_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_MF4_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_MF8_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_MF8_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_MF8_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_MF8_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHEREI16_VV_MF8_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHEREI16_VV_MF8_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHER_VI_M1 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVRGATHER_VI_M1_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VI_M1_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVRGATHER_VI_M2 */ VRM2, VRM2, uimm5, AVL, ixlenimm, /* PseudoVRGATHER_VI_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VI_M2_TU */ VRM2, VRM2, VRM2, uimm5, AVL, ixlenimm, /* PseudoVRGATHER_VI_M4 */ VRM4, VRM4, uimm5, AVL, ixlenimm, /* PseudoVRGATHER_VI_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VI_M4_TU */ VRM4, VRM4, VRM4, uimm5, AVL, ixlenimm, /* PseudoVRGATHER_VI_M8 */ VRM8, VRM8, uimm5, AVL, ixlenimm, /* PseudoVRGATHER_VI_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VI_M8_TU */ VRM8, VRM8, VRM8, uimm5, AVL, ixlenimm, /* PseudoVRGATHER_VI_MF2 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVRGATHER_VI_MF2_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VI_MF2_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVRGATHER_VI_MF4 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVRGATHER_VI_MF4_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VI_MF4_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVRGATHER_VI_MF8 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVRGATHER_VI_MF8_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VI_MF8_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVRGATHER_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHER_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHER_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVRGATHER_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVRGATHER_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVRGATHER_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVRGATHER_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVRGATHER_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVRGATHER_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHER_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHER_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHER_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHER_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHER_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVRGATHER_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVRGATHER_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVRGATHER_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVRGATHER_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVRGATHER_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVRGATHER_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVRGATHER_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVRGATHER_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVRGATHER_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVRGATHER_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVRGATHER_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVRGATHER_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVRGATHER_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVRGATHER_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRGATHER_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVRSUB_VI_M1 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVRSUB_VI_M1_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRSUB_VI_M1_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVRSUB_VI_M2 */ VRM2, VRM2, simm5, AVL, ixlenimm, /* PseudoVRSUB_VI_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRSUB_VI_M2_TU */ VRM2, VRM2, VRM2, simm5, AVL, ixlenimm, /* PseudoVRSUB_VI_M4 */ VRM4, VRM4, simm5, AVL, ixlenimm, /* PseudoVRSUB_VI_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRSUB_VI_M4_TU */ VRM4, VRM4, VRM4, simm5, AVL, ixlenimm, /* PseudoVRSUB_VI_M8 */ VRM8, VRM8, simm5, AVL, ixlenimm, /* PseudoVRSUB_VI_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRSUB_VI_M8_TU */ VRM8, VRM8, VRM8, simm5, AVL, ixlenimm, /* PseudoVRSUB_VI_MF2 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVRSUB_VI_MF2_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRSUB_VI_MF2_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVRSUB_VI_MF4 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVRSUB_VI_MF4_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRSUB_VI_MF4_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVRSUB_VI_MF8 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVRSUB_VI_MF8_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRSUB_VI_MF8_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVRSUB_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVRSUB_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRSUB_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVRSUB_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVRSUB_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRSUB_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVRSUB_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVRSUB_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRSUB_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVRSUB_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVRSUB_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRSUB_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVRSUB_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVRSUB_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRSUB_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVRSUB_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVRSUB_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRSUB_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVRSUB_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVRSUB_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVRSUB_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSADDU_VI_M1 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVSADDU_VI_M1_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VI_M1_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVSADDU_VI_M2 */ VRM2, VRM2, simm5, AVL, ixlenimm, /* PseudoVSADDU_VI_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VI_M2_TU */ VRM2, VRM2, VRM2, simm5, AVL, ixlenimm, /* PseudoVSADDU_VI_M4 */ VRM4, VRM4, simm5, AVL, ixlenimm, /* PseudoVSADDU_VI_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VI_M4_TU */ VRM4, VRM4, VRM4, simm5, AVL, ixlenimm, /* PseudoVSADDU_VI_M8 */ VRM8, VRM8, simm5, AVL, ixlenimm, /* PseudoVSADDU_VI_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VI_M8_TU */ VRM8, VRM8, VRM8, simm5, AVL, ixlenimm, /* PseudoVSADDU_VI_MF2 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVSADDU_VI_MF2_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VI_MF2_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVSADDU_VI_MF4 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVSADDU_VI_MF4_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VI_MF4_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVSADDU_VI_MF8 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVSADDU_VI_MF8_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VI_MF8_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVSADDU_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSADDU_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSADDU_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSADDU_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSADDU_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSADDU_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSADDU_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSADDU_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSADDU_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSADDU_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSADDU_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSADDU_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSADDU_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSADDU_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSADDU_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSADDU_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSADDU_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSADDU_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSADDU_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSADDU_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSADDU_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSADDU_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSADDU_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSADDU_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSADDU_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSADDU_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSADDU_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSADDU_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADDU_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSADD_VI_M1 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVSADD_VI_M1_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VI_M1_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVSADD_VI_M2 */ VRM2, VRM2, simm5, AVL, ixlenimm, /* PseudoVSADD_VI_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VI_M2_TU */ VRM2, VRM2, VRM2, simm5, AVL, ixlenimm, /* PseudoVSADD_VI_M4 */ VRM4, VRM4, simm5, AVL, ixlenimm, /* PseudoVSADD_VI_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VI_M4_TU */ VRM4, VRM4, VRM4, simm5, AVL, ixlenimm, /* PseudoVSADD_VI_M8 */ VRM8, VRM8, simm5, AVL, ixlenimm, /* PseudoVSADD_VI_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VI_M8_TU */ VRM8, VRM8, VRM8, simm5, AVL, ixlenimm, /* PseudoVSADD_VI_MF2 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVSADD_VI_MF2_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VI_MF2_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVSADD_VI_MF4 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVSADD_VI_MF4_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VI_MF4_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVSADD_VI_MF8 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVSADD_VI_MF8_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VI_MF8_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVSADD_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSADD_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSADD_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSADD_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSADD_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSADD_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSADD_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSADD_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSADD_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSADD_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSADD_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSADD_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSADD_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSADD_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSADD_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSADD_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSADD_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSADD_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSADD_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSADD_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSADD_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSADD_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSADD_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSADD_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSADD_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSADD_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSADD_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSADD_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSADD_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSBC_VVM_M1 */ VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VVM_M1_TU */ VRNoV0, VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VVM_M2 */ VRM2NoV0, VRM2, VRM2, VMV0, AVL, ixlenimm, /* PseudoVSBC_VVM_M2_TU */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMV0, AVL, ixlenimm, /* PseudoVSBC_VVM_M4 */ VRM4NoV0, VRM4, VRM4, VMV0, AVL, ixlenimm, /* PseudoVSBC_VVM_M4_TU */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMV0, AVL, ixlenimm, /* PseudoVSBC_VVM_M8 */ VRM8NoV0, VRM8, VRM8, VMV0, AVL, ixlenimm, /* PseudoVSBC_VVM_M8_TU */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMV0, AVL, ixlenimm, /* PseudoVSBC_VVM_MF2 */ VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VVM_MF2_TU */ VRNoV0, VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VVM_MF4 */ VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VVM_MF4_TU */ VRNoV0, VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VVM_MF8 */ VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VVM_MF8_TU */ VRNoV0, VRNoV0, VR, VR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VXM_M1 */ VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VXM_M1_TU */ VRNoV0, VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VXM_M2 */ VRM2NoV0, VRM2, GPR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VXM_M2_TU */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VXM_M4 */ VRM4NoV0, VRM4, GPR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VXM_M4_TU */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VXM_M8 */ VRM8NoV0, VRM8, GPR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VXM_M8_TU */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VXM_MF2 */ VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VXM_MF2_TU */ VRNoV0, VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VXM_MF4 */ VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VXM_MF4_TU */ VRNoV0, VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VXM_MF8 */ VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVSBC_VXM_MF8_TU */ VRNoV0, VRNoV0, VR, GPR, VMV0, AVL, ixlenimm, /* PseudoVSE16_V_M1 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVSE16_V_M1_MASK */ VR, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE16_V_M2 */ VRM2, GPRMem, AVL, ixlenimm, /* PseudoVSE16_V_M2_MASK */ VRM2, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE16_V_M4 */ VRM4, GPRMem, AVL, ixlenimm, /* PseudoVSE16_V_M4_MASK */ VRM4, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE16_V_M8 */ VRM8, GPRMem, AVL, ixlenimm, /* PseudoVSE16_V_M8_MASK */ VRM8, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE16_V_MF2 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVSE16_V_MF2_MASK */ VR, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE16_V_MF4 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVSE16_V_MF4_MASK */ VR, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE32_V_M1 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVSE32_V_M1_MASK */ VR, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE32_V_M2 */ VRM2, GPRMem, AVL, ixlenimm, /* PseudoVSE32_V_M2_MASK */ VRM2, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE32_V_M4 */ VRM4, GPRMem, AVL, ixlenimm, /* PseudoVSE32_V_M4_MASK */ VRM4, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE32_V_M8 */ VRM8, GPRMem, AVL, ixlenimm, /* PseudoVSE32_V_M8_MASK */ VRM8, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE32_V_MF2 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVSE32_V_MF2_MASK */ VR, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE64_V_M1 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVSE64_V_M1_MASK */ VR, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE64_V_M2 */ VRM2, GPRMem, AVL, ixlenimm, /* PseudoVSE64_V_M2_MASK */ VRM2, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE64_V_M4 */ VRM4, GPRMem, AVL, ixlenimm, /* PseudoVSE64_V_M4_MASK */ VRM4, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE64_V_M8 */ VRM8, GPRMem, AVL, ixlenimm, /* PseudoVSE64_V_M8_MASK */ VRM8, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE8_V_M1 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVSE8_V_M1_MASK */ VR, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE8_V_M2 */ VRM2, GPRMem, AVL, ixlenimm, /* PseudoVSE8_V_M2_MASK */ VRM2, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE8_V_M4 */ VRM4, GPRMem, AVL, ixlenimm, /* PseudoVSE8_V_M4_MASK */ VRM4, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE8_V_M8 */ VRM8, GPRMem, AVL, ixlenimm, /* PseudoVSE8_V_M8_MASK */ VRM8, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE8_V_MF2 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVSE8_V_MF2_MASK */ VR, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE8_V_MF4 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVSE8_V_MF4_MASK */ VR, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSE8_V_MF8 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVSE8_V_MF8_MASK */ VR, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSETIVLI */ GPR, uimm5, VTypeIOp10, /* PseudoVSETVLI */ GPR, GPRNoX0, VTypeIOp11, /* PseudoVSETVLIX0 */ GPR, GPRX0, VTypeIOp11, /* PseudoVSEXT_VF2_M1 */ VR, VR, AVL, ixlenimm, /* PseudoVSEXT_VF2_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSEXT_VF2_M1_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSEXT_VF2_M2 */ VRM2, VR, AVL, ixlenimm, /* PseudoVSEXT_VF2_M2_MASK */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSEXT_VF2_M2_TU */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVSEXT_VF2_M4 */ VRM4, VRM2, AVL, ixlenimm, /* PseudoVSEXT_VF2_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSEXT_VF2_M4_TU */ VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVSEXT_VF2_M8 */ VRM8, VRM4, AVL, ixlenimm, /* PseudoVSEXT_VF2_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSEXT_VF2_M8_TU */ VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVSEXT_VF2_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVSEXT_VF2_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSEXT_VF2_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSEXT_VF2_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVSEXT_VF2_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSEXT_VF2_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSEXT_VF4_M1 */ VR, VR, AVL, ixlenimm, /* PseudoVSEXT_VF4_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSEXT_VF4_M1_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSEXT_VF4_M2 */ VRM2, VR, AVL, ixlenimm, /* PseudoVSEXT_VF4_M2_MASK */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSEXT_VF4_M2_TU */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVSEXT_VF4_M4 */ VRM4, VR, AVL, ixlenimm, /* PseudoVSEXT_VF4_M4_MASK */ VRM4NoV0, VRM4NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSEXT_VF4_M4_TU */ VRM4, VRM4, VR, AVL, ixlenimm, /* PseudoVSEXT_VF4_M8 */ VRM8, VRM2, AVL, ixlenimm, /* PseudoVSEXT_VF4_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSEXT_VF4_M8_TU */ VRM8, VRM8, VRM2, AVL, ixlenimm, /* PseudoVSEXT_VF4_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVSEXT_VF4_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSEXT_VF4_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSEXT_VF8_M1 */ VR, VR, AVL, ixlenimm, /* PseudoVSEXT_VF8_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSEXT_VF8_M1_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSEXT_VF8_M2 */ VRM2, VR, AVL, ixlenimm, /* PseudoVSEXT_VF8_M2_MASK */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSEXT_VF8_M2_TU */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVSEXT_VF8_M4 */ VRM4, VR, AVL, ixlenimm, /* PseudoVSEXT_VF8_M4_MASK */ VRM4NoV0, VRM4NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSEXT_VF8_M4_TU */ VRM4, VRM4, VR, AVL, ixlenimm, /* PseudoVSEXT_VF8_M8 */ VRM8, VR, AVL, ixlenimm, /* PseudoVSEXT_VF8_M8_MASK */ VRM8NoV0, VRM8NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSEXT_VF8_M8_TU */ VRM8, VRM8, VR, AVL, ixlenimm, /* PseudoVSLIDE1DOWN_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLIDE1DOWN_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDE1DOWN_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLIDE1DOWN_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSLIDE1DOWN_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDE1DOWN_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSLIDE1DOWN_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSLIDE1DOWN_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDE1DOWN_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSLIDE1DOWN_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSLIDE1DOWN_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDE1DOWN_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSLIDE1DOWN_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLIDE1DOWN_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDE1DOWN_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLIDE1DOWN_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLIDE1DOWN_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDE1DOWN_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLIDE1DOWN_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLIDE1DOWN_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDE1DOWN_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLIDE1UP_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLIDE1UP_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDE1UP_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLIDE1UP_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSLIDE1UP_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDE1UP_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSLIDE1UP_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSLIDE1UP_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDE1UP_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSLIDE1UP_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSLIDE1UP_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDE1UP_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSLIDE1UP_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLIDE1UP_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDE1UP_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLIDE1UP_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLIDE1UP_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDE1UP_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLIDE1UP_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLIDE1UP_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDE1UP_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLIDEDOWN_VI_M1 */ VR, VR, VR, uimm5, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VI_M1_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VI_M2 */ VRM2, VRM2, VRM2, uimm5, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VI_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VI_M4 */ VRM4, VRM4, VRM4, uimm5, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VI_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VI_M8 */ VRM8, VRM8, VRM8, uimm5, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VI_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VI_MF2 */ VR, VR, VR, uimm5, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VI_MF2_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VI_MF4 */ VR, VR, VR, uimm5, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VI_MF4_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VI_MF8 */ VR, VR, VR, uimm5, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VI_MF8_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VX_M1 */ VR, VR, VR, GPR, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VX_M2 */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VX_M4 */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VX_M8 */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VX_MF2 */ VR, VR, VR, GPR, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VX_MF4 */ VR, VR, VR, GPR, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VX_MF8 */ VR, VR, VR, GPR, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEDOWN_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VI_M1 */ VR, VR, VR, uimm5, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VI_M1_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VI_M2 */ VRM2, VRM2, VRM2, uimm5, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VI_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VI_M4 */ VRM4, VRM4, VRM4, uimm5, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VI_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VI_M8 */ VRM8, VRM8, VRM8, uimm5, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VI_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VI_MF2 */ VR, VR, VR, uimm5, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VI_MF2_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VI_MF4 */ VR, VR, VR, uimm5, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VI_MF4_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VI_MF8 */ VR, VR, VR, uimm5, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VI_MF8_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VX_M1 */ VR, VR, VR, GPR, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VX_M2 */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VX_M4 */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VX_M8 */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VX_MF2 */ VR, VR, VR, GPR, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VX_MF4 */ VR, VR, VR, GPR, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VX_MF8 */ VR, VR, VR, GPR, AVL, ixlenimm, ixlenimm, /* PseudoVSLIDEUP_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VI_M1 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSLL_VI_M1_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VI_M1_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSLL_VI_M2 */ VRM2, VRM2, uimm5, AVL, ixlenimm, /* PseudoVSLL_VI_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VI_M2_TU */ VRM2, VRM2, VRM2, uimm5, AVL, ixlenimm, /* PseudoVSLL_VI_M4 */ VRM4, VRM4, uimm5, AVL, ixlenimm, /* PseudoVSLL_VI_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VI_M4_TU */ VRM4, VRM4, VRM4, uimm5, AVL, ixlenimm, /* PseudoVSLL_VI_M8 */ VRM8, VRM8, uimm5, AVL, ixlenimm, /* PseudoVSLL_VI_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VI_M8_TU */ VRM8, VRM8, VRM8, uimm5, AVL, ixlenimm, /* PseudoVSLL_VI_MF2 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSLL_VI_MF2_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VI_MF2_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSLL_VI_MF4 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSLL_VI_MF4_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VI_MF4_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSLL_VI_MF8 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSLL_VI_MF8_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VI_MF8_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSLL_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSLL_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSLL_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSLL_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSLL_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSLL_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSLL_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSLL_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSLL_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSLL_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSLL_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSLL_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSLL_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSLL_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSLL_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLL_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLL_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSLL_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSLL_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSLL_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSLL_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSLL_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSLL_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLL_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLL_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLL_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLL_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSLL_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSLL_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSMUL_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSMUL_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSMUL_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSMUL_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSMUL_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSMUL_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSMUL_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSMUL_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSMUL_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSMUL_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSMUL_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSMUL_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSMUL_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSMUL_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSMUL_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSMUL_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSMUL_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSMUL_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSMUL_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSMUL_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSMUL_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSMUL_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSMUL_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSMUL_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSMUL_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSMUL_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSMUL_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSMUL_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSMUL_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSMUL_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSMUL_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSMUL_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSMUL_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSMUL_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSMUL_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSMUL_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSMUL_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSMUL_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSMUL_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSMUL_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSMUL_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSMUL_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSM_V_B1 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVSM_V_B16 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVSM_V_B2 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVSM_V_B32 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVSM_V_B4 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVSM_V_B64 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVSM_V_B8 */ VR, GPRMem, AVL, ixlenimm, /* PseudoVSOXEI16_V_M1_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI16_V_M1_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_M1_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI16_V_M1_M2_MASK */ VRM2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_M1_M4 */ VRM4, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI16_V_M1_M4_MASK */ VRM4, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_M1_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI16_V_M1_MF2_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_M2_M1 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXEI16_V_M2_M1_MASK */ VR, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_M2_M2 */ VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXEI16_V_M2_M2_MASK */ VRM2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_M2_M4 */ VRM4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXEI16_V_M2_M4_MASK */ VRM4, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_M2_M8 */ VRM8, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXEI16_V_M2_M8_MASK */ VRM8, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_M4_M2 */ VRM2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXEI16_V_M4_M2_MASK */ VRM2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_M4_M4 */ VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXEI16_V_M4_M4_MASK */ VRM4, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_M4_M8 */ VRM8, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXEI16_V_M4_M8_MASK */ VRM8, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_M8_M4 */ VRM4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXEI16_V_M8_M4_MASK */ VRM4, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_M8_M8 */ VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXEI16_V_M8_M8_MASK */ VRM8, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_MF2_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI16_V_MF2_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_MF2_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI16_V_MF2_M2_MASK */ VRM2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_MF2_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI16_V_MF2_MF2_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_MF2_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI16_V_MF2_MF4_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_MF4_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI16_V_MF4_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_MF4_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI16_V_MF4_MF2_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_MF4_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI16_V_MF4_MF4_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI16_V_MF4_MF8 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI16_V_MF4_MF8_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI32_V_M1_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI32_V_M1_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI32_V_M1_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI32_V_M1_M2_MASK */ VRM2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI32_V_M1_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI32_V_M1_MF2_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI32_V_M1_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI32_V_M1_MF4_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI32_V_M2_M1 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXEI32_V_M2_M1_MASK */ VR, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI32_V_M2_M2 */ VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXEI32_V_M2_M2_MASK */ VRM2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI32_V_M2_M4 */ VRM4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXEI32_V_M2_M4_MASK */ VRM4, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI32_V_M2_MF2 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXEI32_V_M2_MF2_MASK */ VR, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI32_V_M4_M1 */ VR, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXEI32_V_M4_M1_MASK */ VR, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI32_V_M4_M2 */ VRM2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXEI32_V_M4_M2_MASK */ VRM2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI32_V_M4_M4 */ VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXEI32_V_M4_M4_MASK */ VRM4, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI32_V_M4_M8 */ VRM8, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXEI32_V_M4_M8_MASK */ VRM8, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI32_V_M8_M2 */ VRM2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXEI32_V_M8_M2_MASK */ VRM2, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI32_V_M8_M4 */ VRM4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXEI32_V_M8_M4_MASK */ VRM4, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI32_V_M8_M8 */ VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXEI32_V_M8_M8_MASK */ VRM8, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI32_V_MF2_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI32_V_MF2_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI32_V_MF2_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI32_V_MF2_MF2_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI32_V_MF2_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI32_V_MF2_MF4_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI32_V_MF2_MF8 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI32_V_MF2_MF8_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI64_V_M1_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI64_V_M1_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI64_V_M1_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI64_V_M1_MF2_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI64_V_M1_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI64_V_M1_MF4_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI64_V_M1_MF8 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI64_V_M1_MF8_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI64_V_M2_M1 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXEI64_V_M2_M1_MASK */ VR, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI64_V_M2_M2 */ VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXEI64_V_M2_M2_MASK */ VRM2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI64_V_M2_MF2 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXEI64_V_M2_MF2_MASK */ VR, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI64_V_M2_MF4 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXEI64_V_M2_MF4_MASK */ VR, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI64_V_M4_M1 */ VR, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXEI64_V_M4_M1_MASK */ VR, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI64_V_M4_M2 */ VRM2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXEI64_V_M4_M2_MASK */ VRM2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI64_V_M4_M4 */ VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXEI64_V_M4_M4_MASK */ VRM4, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI64_V_M4_MF2 */ VR, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXEI64_V_M4_MF2_MASK */ VR, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI64_V_M8_M1 */ VR, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXEI64_V_M8_M1_MASK */ VR, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI64_V_M8_M2 */ VRM2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXEI64_V_M8_M2_MASK */ VRM2, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI64_V_M8_M4 */ VRM4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXEI64_V_M8_M4_MASK */ VRM4, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI64_V_M8_M8 */ VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXEI64_V_M8_M8_MASK */ VRM8, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_M1_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI8_V_M1_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_M1_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI8_V_M1_M2_MASK */ VRM2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_M1_M4 */ VRM4, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI8_V_M1_M4_MASK */ VRM4, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_M1_M8 */ VRM8, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI8_V_M1_M8_MASK */ VRM8, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_M2_M2 */ VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXEI8_V_M2_M2_MASK */ VRM2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_M2_M4 */ VRM4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXEI8_V_M2_M4_MASK */ VRM4, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_M2_M8 */ VRM8, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXEI8_V_M2_M8_MASK */ VRM8, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_M4_M4 */ VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXEI8_V_M4_M4_MASK */ VRM4, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_M4_M8 */ VRM8, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXEI8_V_M4_M8_MASK */ VRM8, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_M8_M8 */ VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXEI8_V_M8_M8_MASK */ VRM8, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF2_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF2_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF2_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF2_M2_MASK */ VRM2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF2_M4 */ VRM4, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF2_M4_MASK */ VRM4, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF2_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF2_MF2_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF4_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF4_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF4_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF4_M2_MASK */ VRM2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF4_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF4_MF2_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF4_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF4_MF4_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF8_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF8_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF8_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF8_MF2_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF8_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF8_MF4_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF8_MF8 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXEI8_V_MF8_MF8_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M1_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M1_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M1_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M1_M2_MASK */ VRN2M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M1_M4 */ VRN2M4, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M1_M4_MASK */ VRN2M4, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M1_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M1_MF2_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M2_M1 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M2_M1_MASK */ VRN2M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M2_M2 */ VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M2_M2_MASK */ VRN2M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M2_M4 */ VRN2M4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M2_M4_MASK */ VRN2M4, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M4_M2 */ VRN2M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M4_M2_MASK */ VRN2M2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M4_M4 */ VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M4_M4_MASK */ VRN2M4, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M8_M4 */ VRN2M4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_M8_M4_MASK */ VRN2M4, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_MF2_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_MF2_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_MF2_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_MF2_M2_MASK */ VRN2M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_MF2_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_MF2_MF2_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_MF2_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_MF2_MF4_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_MF4_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_MF4_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_MF4_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_MF4_MF2_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_MF4_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_MF4_MF4_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_MF4_MF8 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI16_V_MF4_MF8_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M1_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M1_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M1_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M1_M2_MASK */ VRN2M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M1_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M1_MF2_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M1_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M1_MF4_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M2_M1 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M2_M1_MASK */ VRN2M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M2_M2 */ VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M2_M2_MASK */ VRN2M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M2_M4 */ VRN2M4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M2_M4_MASK */ VRN2M4, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M2_MF2 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M2_MF2_MASK */ VRN2M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M4_M1 */ VRN2M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M4_M1_MASK */ VRN2M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M4_M2 */ VRN2M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M4_M2_MASK */ VRN2M2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M4_M4 */ VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M4_M4_MASK */ VRN2M4, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M8_M2 */ VRN2M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M8_M2_MASK */ VRN2M2, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M8_M4 */ VRN2M4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_M8_M4_MASK */ VRN2M4, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_MF2_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_MF2_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_MF2_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_MF2_MF2_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_MF2_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_MF2_MF4_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_MF2_MF8 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI32_V_MF2_MF8_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M1_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M1_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M1_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M1_MF2_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M1_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M1_MF4_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M1_MF8 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M1_MF8_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M2_M1 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M2_M1_MASK */ VRN2M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M2_M2 */ VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M2_M2_MASK */ VRN2M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M2_MF2 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M2_MF2_MASK */ VRN2M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M2_MF4 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M2_MF4_MASK */ VRN2M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M4_M1 */ VRN2M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M4_M1_MASK */ VRN2M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M4_M2 */ VRN2M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M4_M2_MASK */ VRN2M2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M4_M4 */ VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M4_M4_MASK */ VRN2M4, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M4_MF2 */ VRN2M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M4_MF2_MASK */ VRN2M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M8_M1 */ VRN2M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M8_M1_MASK */ VRN2M1, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M8_M2 */ VRN2M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M8_M2_MASK */ VRN2M2, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M8_M4 */ VRN2M4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXSEG2EI64_V_M8_M4_MASK */ VRN2M4, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_M1_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_M1_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_M1_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_M1_M2_MASK */ VRN2M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_M1_M4 */ VRN2M4, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_M1_M4_MASK */ VRN2M4, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_M2_M2 */ VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_M2_M2_MASK */ VRN2M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_M2_M4 */ VRN2M4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_M2_M4_MASK */ VRN2M4, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_M4_M4 */ VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_M4_M4_MASK */ VRN2M4, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF2_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF2_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF2_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF2_M2_MASK */ VRN2M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF2_M4 */ VRN2M4, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF2_M4_MASK */ VRN2M4, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF2_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF2_MF2_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF4_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF4_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF4_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF4_M2_MASK */ VRN2M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF4_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF4_MF2_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF4_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF4_MF4_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF8_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF8_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF8_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF8_MF2_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF8_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF8_MF4_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF8_MF8 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG2EI8_V_MF8_MF8_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_M1_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_M1_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_M1_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_M1_M2_MASK */ VRN3M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_M1_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_M1_MF2_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_M2_M1 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_M2_M1_MASK */ VRN3M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_M2_M2 */ VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_M2_M2_MASK */ VRN3M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_M4_M2 */ VRN3M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_M4_M2_MASK */ VRN3M2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_MF2_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_MF2_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_MF2_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_MF2_M2_MASK */ VRN3M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_MF2_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_MF2_MF2_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_MF2_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_MF2_MF4_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_MF4_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_MF4_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_MF4_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_MF4_MF2_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_MF4_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_MF4_MF4_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_MF4_MF8 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI16_V_MF4_MF8_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M1_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M1_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M1_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M1_M2_MASK */ VRN3M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M1_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M1_MF2_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M1_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M1_MF4_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M2_M1 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M2_M1_MASK */ VRN3M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M2_M2 */ VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M2_M2_MASK */ VRN3M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M2_MF2 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M2_MF2_MASK */ VRN3M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M4_M1 */ VRN3M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M4_M1_MASK */ VRN3M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M4_M2 */ VRN3M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M4_M2_MASK */ VRN3M2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M8_M2 */ VRN3M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_M8_M2_MASK */ VRN3M2, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_MF2_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_MF2_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_MF2_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_MF2_MF2_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_MF2_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_MF2_MF4_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_MF2_MF8 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI32_V_MF2_MF8_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M1_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M1_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M1_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M1_MF2_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M1_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M1_MF4_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M1_MF8 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M1_MF8_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M2_M1 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M2_M1_MASK */ VRN3M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M2_M2 */ VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M2_M2_MASK */ VRN3M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M2_MF2 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M2_MF2_MASK */ VRN3M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M2_MF4 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M2_MF4_MASK */ VRN3M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M4_M1 */ VRN3M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M4_M1_MASK */ VRN3M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M4_M2 */ VRN3M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M4_M2_MASK */ VRN3M2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M4_MF2 */ VRN3M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M4_MF2_MASK */ VRN3M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M8_M1 */ VRN3M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M8_M1_MASK */ VRN3M1, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M8_M2 */ VRN3M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXSEG3EI64_V_M8_M2_MASK */ VRN3M2, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_M1_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_M1_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_M1_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_M1_M2_MASK */ VRN3M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_M2_M2 */ VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_M2_M2_MASK */ VRN3M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF2_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF2_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF2_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF2_M2_MASK */ VRN3M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF2_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF2_MF2_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF4_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF4_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF4_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF4_M2_MASK */ VRN3M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF4_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF4_MF2_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF4_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF4_MF4_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF8_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF8_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF8_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF8_MF2_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF8_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF8_MF4_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF8_MF8 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG3EI8_V_MF8_MF8_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_M1_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_M1_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_M1_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_M1_M2_MASK */ VRN4M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_M1_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_M1_MF2_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_M2_M1 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_M2_M1_MASK */ VRN4M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_M2_M2 */ VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_M2_M2_MASK */ VRN4M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_M4_M2 */ VRN4M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_M4_M2_MASK */ VRN4M2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_MF2_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_MF2_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_MF2_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_MF2_M2_MASK */ VRN4M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_MF2_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_MF2_MF2_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_MF2_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_MF2_MF4_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_MF4_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_MF4_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_MF4_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_MF4_MF2_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_MF4_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_MF4_MF4_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_MF4_MF8 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI16_V_MF4_MF8_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M1_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M1_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M1_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M1_M2_MASK */ VRN4M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M1_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M1_MF2_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M1_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M1_MF4_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M2_M1 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M2_M1_MASK */ VRN4M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M2_M2 */ VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M2_M2_MASK */ VRN4M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M2_MF2 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M2_MF2_MASK */ VRN4M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M4_M1 */ VRN4M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M4_M1_MASK */ VRN4M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M4_M2 */ VRN4M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M4_M2_MASK */ VRN4M2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M8_M2 */ VRN4M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_M8_M2_MASK */ VRN4M2, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_MF2_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_MF2_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_MF2_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_MF2_MF2_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_MF2_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_MF2_MF4_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_MF2_MF8 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI32_V_MF2_MF8_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M1_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M1_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M1_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M1_MF2_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M1_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M1_MF4_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M1_MF8 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M1_MF8_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M2_M1 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M2_M1_MASK */ VRN4M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M2_M2 */ VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M2_M2_MASK */ VRN4M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M2_MF2 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M2_MF2_MASK */ VRN4M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M2_MF4 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M2_MF4_MASK */ VRN4M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M4_M1 */ VRN4M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M4_M1_MASK */ VRN4M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M4_M2 */ VRN4M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M4_M2_MASK */ VRN4M2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M4_MF2 */ VRN4M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M4_MF2_MASK */ VRN4M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M8_M1 */ VRN4M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M8_M1_MASK */ VRN4M1, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M8_M2 */ VRN4M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXSEG4EI64_V_M8_M2_MASK */ VRN4M2, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_M1_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_M1_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_M1_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_M1_M2_MASK */ VRN4M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_M2_M2 */ VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_M2_M2_MASK */ VRN4M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF2_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF2_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF2_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF2_M2_MASK */ VRN4M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF2_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF2_MF2_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF4_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF4_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF4_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF4_M2_MASK */ VRN4M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF4_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF4_MF2_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF4_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF4_MF4_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF8_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF8_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF8_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF8_MF2_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF8_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF8_MF4_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF8_MF8 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG4EI8_V_MF8_MF8_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_M1_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_M1_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_M1_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_M1_MF2_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_M2_M1 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_M2_M1_MASK */ VRN5M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_MF2_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_MF2_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_MF2_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_MF2_MF2_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_MF2_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_MF2_MF4_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_MF4_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_MF4_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_MF4_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_MF4_MF2_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_MF4_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_MF4_MF4_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_MF4_MF8 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI16_V_MF4_MF8_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_M1_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_M1_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_M1_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_M1_MF2_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_M1_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_M1_MF4_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_M2_M1 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_M2_M1_MASK */ VRN5M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_M2_MF2 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_M2_MF2_MASK */ VRN5M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_M4_M1 */ VRN5M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_M4_M1_MASK */ VRN5M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_MF2_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_MF2_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_MF2_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_MF2_MF2_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_MF2_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_MF2_MF4_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_MF2_MF8 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI32_V_MF2_MF8_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M1_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M1_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M1_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M1_MF2_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M1_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M1_MF4_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M1_MF8 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M1_MF8_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M2_M1 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M2_M1_MASK */ VRN5M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M2_MF2 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M2_MF2_MASK */ VRN5M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M2_MF4 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M2_MF4_MASK */ VRN5M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M4_M1 */ VRN5M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M4_M1_MASK */ VRN5M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M4_MF2 */ VRN5M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M4_MF2_MASK */ VRN5M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M8_M1 */ VRN5M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXSEG5EI64_V_M8_M1_MASK */ VRN5M1, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_M1_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_M1_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_MF2_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_MF2_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_MF2_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_MF2_MF2_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_MF4_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_MF4_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_MF4_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_MF4_MF2_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_MF4_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_MF4_MF4_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_MF8_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_MF8_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_MF8_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_MF8_MF2_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_MF8_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_MF8_MF4_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_MF8_MF8 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG5EI8_V_MF8_MF8_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_M1_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_M1_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_M1_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_M1_MF2_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_M2_M1 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_M2_M1_MASK */ VRN6M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_MF2_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_MF2_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_MF2_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_MF2_MF2_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_MF2_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_MF2_MF4_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_MF4_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_MF4_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_MF4_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_MF4_MF2_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_MF4_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_MF4_MF4_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_MF4_MF8 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI16_V_MF4_MF8_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_M1_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_M1_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_M1_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_M1_MF2_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_M1_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_M1_MF4_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_M2_M1 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_M2_M1_MASK */ VRN6M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_M2_MF2 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_M2_MF2_MASK */ VRN6M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_M4_M1 */ VRN6M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_M4_M1_MASK */ VRN6M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_MF2_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_MF2_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_MF2_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_MF2_MF2_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_MF2_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_MF2_MF4_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_MF2_MF8 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI32_V_MF2_MF8_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M1_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M1_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M1_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M1_MF2_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M1_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M1_MF4_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M1_MF8 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M1_MF8_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M2_M1 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M2_M1_MASK */ VRN6M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M2_MF2 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M2_MF2_MASK */ VRN6M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M2_MF4 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M2_MF4_MASK */ VRN6M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M4_M1 */ VRN6M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M4_M1_MASK */ VRN6M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M4_MF2 */ VRN6M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M4_MF2_MASK */ VRN6M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M8_M1 */ VRN6M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXSEG6EI64_V_M8_M1_MASK */ VRN6M1, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_M1_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_M1_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_MF2_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_MF2_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_MF2_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_MF2_MF2_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_MF4_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_MF4_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_MF4_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_MF4_MF2_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_MF4_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_MF4_MF4_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_MF8_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_MF8_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_MF8_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_MF8_MF2_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_MF8_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_MF8_MF4_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_MF8_MF8 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG6EI8_V_MF8_MF8_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_M1_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_M1_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_M1_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_M1_MF2_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_M2_M1 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_M2_M1_MASK */ VRN7M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_MF2_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_MF2_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_MF2_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_MF2_MF2_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_MF2_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_MF2_MF4_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_MF4_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_MF4_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_MF4_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_MF4_MF2_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_MF4_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_MF4_MF4_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_MF4_MF8 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI16_V_MF4_MF8_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_M1_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_M1_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_M1_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_M1_MF2_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_M1_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_M1_MF4_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_M2_M1 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_M2_M1_MASK */ VRN7M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_M2_MF2 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_M2_MF2_MASK */ VRN7M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_M4_M1 */ VRN7M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_M4_M1_MASK */ VRN7M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_MF2_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_MF2_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_MF2_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_MF2_MF2_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_MF2_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_MF2_MF4_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_MF2_MF8 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI32_V_MF2_MF8_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M1_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M1_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M1_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M1_MF2_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M1_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M1_MF4_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M1_MF8 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M1_MF8_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M2_M1 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M2_M1_MASK */ VRN7M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M2_MF2 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M2_MF2_MASK */ VRN7M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M2_MF4 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M2_MF4_MASK */ VRN7M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M4_M1 */ VRN7M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M4_M1_MASK */ VRN7M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M4_MF2 */ VRN7M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M4_MF2_MASK */ VRN7M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M8_M1 */ VRN7M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXSEG7EI64_V_M8_M1_MASK */ VRN7M1, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_M1_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_M1_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_MF2_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_MF2_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_MF2_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_MF2_MF2_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_MF4_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_MF4_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_MF4_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_MF4_MF2_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_MF4_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_MF4_MF4_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_MF8_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_MF8_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_MF8_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_MF8_MF2_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_MF8_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_MF8_MF4_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_MF8_MF8 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG7EI8_V_MF8_MF8_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_M1_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_M1_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_M1_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_M1_MF2_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_M2_M1 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_M2_M1_MASK */ VRN8M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_MF2_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_MF2_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_MF2_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_MF2_MF2_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_MF2_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_MF2_MF4_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_MF4_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_MF4_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_MF4_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_MF4_MF2_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_MF4_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_MF4_MF4_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_MF4_MF8 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI16_V_MF4_MF8_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_M1_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_M1_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_M1_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_M1_MF2_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_M1_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_M1_MF4_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_M2_M1 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_M2_M1_MASK */ VRN8M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_M2_MF2 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_M2_MF2_MASK */ VRN8M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_M4_M1 */ VRN8M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_M4_M1_MASK */ VRN8M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_MF2_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_MF2_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_MF2_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_MF2_MF2_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_MF2_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_MF2_MF4_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_MF2_MF8 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI32_V_MF2_MF8_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M1_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M1_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M1_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M1_MF2_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M1_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M1_MF4_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M1_MF8 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M1_MF8_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M2_M1 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M2_M1_MASK */ VRN8M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M2_MF2 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M2_MF2_MASK */ VRN8M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M2_MF4 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M2_MF4_MASK */ VRN8M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M4_M1 */ VRN8M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M4_M1_MASK */ VRN8M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M4_MF2 */ VRN8M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M4_MF2_MASK */ VRN8M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M8_M1 */ VRN8M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSOXSEG8EI64_V_M8_M1_MASK */ VRN8M1, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_M1_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_M1_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_MF2_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_MF2_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_MF2_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_MF2_MF2_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_MF4_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_MF4_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_MF4_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_MF4_MF2_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_MF4_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_MF4_MF4_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_MF8_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_MF8_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_MF8_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_MF8_MF2_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_MF8_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_MF8_MF4_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_MF8_MF8 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSOXSEG8EI8_V_MF8_MF8_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSPILL2_M1 */ VRN2M1, GPR, /* PseudoVSPILL2_M2 */ VRN2M2, GPR, /* PseudoVSPILL2_M4 */ VRN2M4, GPR, /* PseudoVSPILL2_MF2 */ VRN2M1, GPR, /* PseudoVSPILL2_MF4 */ VRN2M1, GPR, /* PseudoVSPILL2_MF8 */ VRN2M1, GPR, /* PseudoVSPILL3_M1 */ VRN3M1, GPR, /* PseudoVSPILL3_M2 */ VRN3M2, GPR, /* PseudoVSPILL3_MF2 */ VRN3M1, GPR, /* PseudoVSPILL3_MF4 */ VRN3M1, GPR, /* PseudoVSPILL3_MF8 */ VRN3M1, GPR, /* PseudoVSPILL4_M1 */ VRN4M1, GPR, /* PseudoVSPILL4_M2 */ VRN4M2, GPR, /* PseudoVSPILL4_MF2 */ VRN4M1, GPR, /* PseudoVSPILL4_MF4 */ VRN4M1, GPR, /* PseudoVSPILL4_MF8 */ VRN4M1, GPR, /* PseudoVSPILL5_M1 */ VRN5M1, GPR, /* PseudoVSPILL5_MF2 */ VRN5M1, GPR, /* PseudoVSPILL5_MF4 */ VRN5M1, GPR, /* PseudoVSPILL5_MF8 */ VRN5M1, GPR, /* PseudoVSPILL6_M1 */ VRN6M1, GPR, /* PseudoVSPILL6_MF2 */ VRN6M1, GPR, /* PseudoVSPILL6_MF4 */ VRN6M1, GPR, /* PseudoVSPILL6_MF8 */ VRN6M1, GPR, /* PseudoVSPILL7_M1 */ VRN7M1, GPR, /* PseudoVSPILL7_MF2 */ VRN7M1, GPR, /* PseudoVSPILL7_MF4 */ VRN7M1, GPR, /* PseudoVSPILL7_MF8 */ VRN7M1, GPR, /* PseudoVSPILL8_M1 */ VRN8M1, GPR, /* PseudoVSPILL8_MF2 */ VRN8M1, GPR, /* PseudoVSPILL8_MF4 */ VRN8M1, GPR, /* PseudoVSPILL8_MF8 */ VRN8M1, GPR, /* PseudoVSRA_VI_M1 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSRA_VI_M1_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VI_M1_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSRA_VI_M2 */ VRM2, VRM2, uimm5, AVL, ixlenimm, /* PseudoVSRA_VI_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VI_M2_TU */ VRM2, VRM2, VRM2, uimm5, AVL, ixlenimm, /* PseudoVSRA_VI_M4 */ VRM4, VRM4, uimm5, AVL, ixlenimm, /* PseudoVSRA_VI_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VI_M4_TU */ VRM4, VRM4, VRM4, uimm5, AVL, ixlenimm, /* PseudoVSRA_VI_M8 */ VRM8, VRM8, uimm5, AVL, ixlenimm, /* PseudoVSRA_VI_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VI_M8_TU */ VRM8, VRM8, VRM8, uimm5, AVL, ixlenimm, /* PseudoVSRA_VI_MF2 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSRA_VI_MF2_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VI_MF2_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSRA_VI_MF4 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSRA_VI_MF4_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VI_MF4_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSRA_VI_MF8 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSRA_VI_MF8_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VI_MF8_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSRA_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSRA_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSRA_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSRA_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSRA_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSRA_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSRA_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSRA_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSRA_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSRA_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSRA_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSRA_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSRA_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSRA_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSRA_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSRA_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSRA_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSRA_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSRA_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSRA_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSRA_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSRA_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSRA_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSRA_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSRA_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSRA_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSRA_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSRA_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRA_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSRL_VI_M1 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSRL_VI_M1_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VI_M1_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSRL_VI_M2 */ VRM2, VRM2, uimm5, AVL, ixlenimm, /* PseudoVSRL_VI_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VI_M2_TU */ VRM2, VRM2, VRM2, uimm5, AVL, ixlenimm, /* PseudoVSRL_VI_M4 */ VRM4, VRM4, uimm5, AVL, ixlenimm, /* PseudoVSRL_VI_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VI_M4_TU */ VRM4, VRM4, VRM4, uimm5, AVL, ixlenimm, /* PseudoVSRL_VI_M8 */ VRM8, VRM8, uimm5, AVL, ixlenimm, /* PseudoVSRL_VI_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VI_M8_TU */ VRM8, VRM8, VRM8, uimm5, AVL, ixlenimm, /* PseudoVSRL_VI_MF2 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSRL_VI_MF2_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VI_MF2_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSRL_VI_MF4 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSRL_VI_MF4_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VI_MF4_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSRL_VI_MF8 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSRL_VI_MF8_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VI_MF8_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSRL_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSRL_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSRL_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSRL_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSRL_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSRL_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSRL_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSRL_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSRL_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSRL_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSRL_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSRL_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSRL_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSRL_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSRL_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSRL_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSRL_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSRL_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSRL_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSRL_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSRL_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSRL_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSRL_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSRL_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSRL_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSRL_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSRL_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSRL_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSRL_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSE16_V_M1 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE16_V_M1_MASK */ VR, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE16_V_M2 */ VRM2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE16_V_M2_MASK */ VRM2, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE16_V_M4 */ VRM4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE16_V_M4_MASK */ VRM4, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE16_V_M8 */ VRM8, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE16_V_M8_MASK */ VRM8, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE16_V_MF2 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE16_V_MF2_MASK */ VR, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE16_V_MF4 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE16_V_MF4_MASK */ VR, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE32_V_M1 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE32_V_M1_MASK */ VR, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE32_V_M2 */ VRM2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE32_V_M2_MASK */ VRM2, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE32_V_M4 */ VRM4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE32_V_M4_MASK */ VRM4, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE32_V_M8 */ VRM8, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE32_V_M8_MASK */ VRM8, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE32_V_MF2 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE32_V_MF2_MASK */ VR, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE64_V_M1 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE64_V_M1_MASK */ VR, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE64_V_M2 */ VRM2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE64_V_M2_MASK */ VRM2, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE64_V_M4 */ VRM4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE64_V_M4_MASK */ VRM4, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE64_V_M8 */ VRM8, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE64_V_M8_MASK */ VRM8, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE8_V_M1 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE8_V_M1_MASK */ VR, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE8_V_M2 */ VRM2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE8_V_M2_MASK */ VRM2, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE8_V_M4 */ VRM4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE8_V_M4_MASK */ VRM4, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE8_V_M8 */ VRM8, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE8_V_M8_MASK */ VRM8, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE8_V_MF2 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE8_V_MF2_MASK */ VR, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE8_V_MF4 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE8_V_MF4_MASK */ VR, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSE8_V_MF8 */ VR, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSE8_V_MF8_MASK */ VR, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG2E16_V_M1 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG2E16_V_M1_MASK */ VRN2M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG2E16_V_M2 */ VRN2M2, GPRMem, AVL, ixlenimm, /* PseudoVSSEG2E16_V_M2_MASK */ VRN2M2, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG2E16_V_M4 */ VRN2M4, GPRMem, AVL, ixlenimm, /* PseudoVSSEG2E16_V_M4_MASK */ VRN2M4, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG2E16_V_MF2 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG2E16_V_MF2_MASK */ VRN2M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG2E16_V_MF4 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG2E16_V_MF4_MASK */ VRN2M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG2E32_V_M1 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG2E32_V_M1_MASK */ VRN2M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG2E32_V_M2 */ VRN2M2, GPRMem, AVL, ixlenimm, /* PseudoVSSEG2E32_V_M2_MASK */ VRN2M2, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG2E32_V_M4 */ VRN2M4, GPRMem, AVL, ixlenimm, /* PseudoVSSEG2E32_V_M4_MASK */ VRN2M4, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG2E32_V_MF2 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG2E32_V_MF2_MASK */ VRN2M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG2E64_V_M1 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG2E64_V_M1_MASK */ VRN2M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG2E64_V_M2 */ VRN2M2, GPRMem, AVL, ixlenimm, /* PseudoVSSEG2E64_V_M2_MASK */ VRN2M2, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG2E64_V_M4 */ VRN2M4, GPRMem, AVL, ixlenimm, /* PseudoVSSEG2E64_V_M4_MASK */ VRN2M4, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG2E8_V_M1 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG2E8_V_M1_MASK */ VRN2M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG2E8_V_M2 */ VRN2M2, GPRMem, AVL, ixlenimm, /* PseudoVSSEG2E8_V_M2_MASK */ VRN2M2, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG2E8_V_M4 */ VRN2M4, GPRMem, AVL, ixlenimm, /* PseudoVSSEG2E8_V_M4_MASK */ VRN2M4, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG2E8_V_MF2 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG2E8_V_MF2_MASK */ VRN2M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG2E8_V_MF4 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG2E8_V_MF4_MASK */ VRN2M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG2E8_V_MF8 */ VRN2M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG2E8_V_MF8_MASK */ VRN2M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG3E16_V_M1 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG3E16_V_M1_MASK */ VRN3M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG3E16_V_M2 */ VRN3M2, GPRMem, AVL, ixlenimm, /* PseudoVSSEG3E16_V_M2_MASK */ VRN3M2, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG3E16_V_MF2 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG3E16_V_MF2_MASK */ VRN3M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG3E16_V_MF4 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG3E16_V_MF4_MASK */ VRN3M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG3E32_V_M1 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG3E32_V_M1_MASK */ VRN3M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG3E32_V_M2 */ VRN3M2, GPRMem, AVL, ixlenimm, /* PseudoVSSEG3E32_V_M2_MASK */ VRN3M2, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG3E32_V_MF2 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG3E32_V_MF2_MASK */ VRN3M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG3E64_V_M1 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG3E64_V_M1_MASK */ VRN3M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG3E64_V_M2 */ VRN3M2, GPRMem, AVL, ixlenimm, /* PseudoVSSEG3E64_V_M2_MASK */ VRN3M2, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG3E8_V_M1 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG3E8_V_M1_MASK */ VRN3M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG3E8_V_M2 */ VRN3M2, GPRMem, AVL, ixlenimm, /* PseudoVSSEG3E8_V_M2_MASK */ VRN3M2, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG3E8_V_MF2 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG3E8_V_MF2_MASK */ VRN3M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG3E8_V_MF4 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG3E8_V_MF4_MASK */ VRN3M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG3E8_V_MF8 */ VRN3M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG3E8_V_MF8_MASK */ VRN3M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG4E16_V_M1 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG4E16_V_M1_MASK */ VRN4M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG4E16_V_M2 */ VRN4M2, GPRMem, AVL, ixlenimm, /* PseudoVSSEG4E16_V_M2_MASK */ VRN4M2, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG4E16_V_MF2 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG4E16_V_MF2_MASK */ VRN4M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG4E16_V_MF4 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG4E16_V_MF4_MASK */ VRN4M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG4E32_V_M1 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG4E32_V_M1_MASK */ VRN4M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG4E32_V_M2 */ VRN4M2, GPRMem, AVL, ixlenimm, /* PseudoVSSEG4E32_V_M2_MASK */ VRN4M2, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG4E32_V_MF2 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG4E32_V_MF2_MASK */ VRN4M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG4E64_V_M1 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG4E64_V_M1_MASK */ VRN4M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG4E64_V_M2 */ VRN4M2, GPRMem, AVL, ixlenimm, /* PseudoVSSEG4E64_V_M2_MASK */ VRN4M2, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG4E8_V_M1 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG4E8_V_M1_MASK */ VRN4M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG4E8_V_M2 */ VRN4M2, GPRMem, AVL, ixlenimm, /* PseudoVSSEG4E8_V_M2_MASK */ VRN4M2, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG4E8_V_MF2 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG4E8_V_MF2_MASK */ VRN4M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG4E8_V_MF4 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG4E8_V_MF4_MASK */ VRN4M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG4E8_V_MF8 */ VRN4M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG4E8_V_MF8_MASK */ VRN4M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG5E16_V_M1 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG5E16_V_M1_MASK */ VRN5M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG5E16_V_MF2 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG5E16_V_MF2_MASK */ VRN5M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG5E16_V_MF4 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG5E16_V_MF4_MASK */ VRN5M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG5E32_V_M1 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG5E32_V_M1_MASK */ VRN5M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG5E32_V_MF2 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG5E32_V_MF2_MASK */ VRN5M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG5E64_V_M1 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG5E64_V_M1_MASK */ VRN5M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG5E8_V_M1 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG5E8_V_M1_MASK */ VRN5M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG5E8_V_MF2 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG5E8_V_MF2_MASK */ VRN5M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG5E8_V_MF4 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG5E8_V_MF4_MASK */ VRN5M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG5E8_V_MF8 */ VRN5M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG5E8_V_MF8_MASK */ VRN5M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG6E16_V_M1 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG6E16_V_M1_MASK */ VRN6M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG6E16_V_MF2 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG6E16_V_MF2_MASK */ VRN6M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG6E16_V_MF4 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG6E16_V_MF4_MASK */ VRN6M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG6E32_V_M1 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG6E32_V_M1_MASK */ VRN6M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG6E32_V_MF2 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG6E32_V_MF2_MASK */ VRN6M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG6E64_V_M1 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG6E64_V_M1_MASK */ VRN6M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG6E8_V_M1 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG6E8_V_M1_MASK */ VRN6M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG6E8_V_MF2 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG6E8_V_MF2_MASK */ VRN6M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG6E8_V_MF4 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG6E8_V_MF4_MASK */ VRN6M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG6E8_V_MF8 */ VRN6M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG6E8_V_MF8_MASK */ VRN6M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG7E16_V_M1 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG7E16_V_M1_MASK */ VRN7M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG7E16_V_MF2 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG7E16_V_MF2_MASK */ VRN7M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG7E16_V_MF4 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG7E16_V_MF4_MASK */ VRN7M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG7E32_V_M1 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG7E32_V_M1_MASK */ VRN7M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG7E32_V_MF2 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG7E32_V_MF2_MASK */ VRN7M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG7E64_V_M1 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG7E64_V_M1_MASK */ VRN7M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG7E8_V_M1 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG7E8_V_M1_MASK */ VRN7M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG7E8_V_MF2 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG7E8_V_MF2_MASK */ VRN7M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG7E8_V_MF4 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG7E8_V_MF4_MASK */ VRN7M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG7E8_V_MF8 */ VRN7M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG7E8_V_MF8_MASK */ VRN7M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG8E16_V_M1 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG8E16_V_M1_MASK */ VRN8M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG8E16_V_MF2 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG8E16_V_MF2_MASK */ VRN8M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG8E16_V_MF4 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG8E16_V_MF4_MASK */ VRN8M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG8E32_V_M1 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG8E32_V_M1_MASK */ VRN8M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG8E32_V_MF2 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG8E32_V_MF2_MASK */ VRN8M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG8E64_V_M1 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG8E64_V_M1_MASK */ VRN8M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG8E8_V_M1 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG8E8_V_M1_MASK */ VRN8M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG8E8_V_MF2 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG8E8_V_MF2_MASK */ VRN8M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG8E8_V_MF4 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG8E8_V_MF4_MASK */ VRN8M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSEG8E8_V_MF8 */ VRN8M1, GPRMem, AVL, ixlenimm, /* PseudoVSSEG8E8_V_MF8_MASK */ VRN8M1, GPRMem, VMaskOp, AVL, ixlenimm, /* PseudoVSSRA_VI_M1 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSSRA_VI_M1_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VI_M1_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSSRA_VI_M2 */ VRM2, VRM2, uimm5, AVL, ixlenimm, /* PseudoVSSRA_VI_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VI_M2_TU */ VRM2, VRM2, VRM2, uimm5, AVL, ixlenimm, /* PseudoVSSRA_VI_M4 */ VRM4, VRM4, uimm5, AVL, ixlenimm, /* PseudoVSSRA_VI_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VI_M4_TU */ VRM4, VRM4, VRM4, uimm5, AVL, ixlenimm, /* PseudoVSSRA_VI_M8 */ VRM8, VRM8, uimm5, AVL, ixlenimm, /* PseudoVSSRA_VI_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VI_M8_TU */ VRM8, VRM8, VRM8, uimm5, AVL, ixlenimm, /* PseudoVSSRA_VI_MF2 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSSRA_VI_MF2_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VI_MF2_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSSRA_VI_MF4 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSSRA_VI_MF4_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VI_MF4_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSSRA_VI_MF8 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSSRA_VI_MF8_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VI_MF8_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSSRA_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSSRA_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSSRA_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSSRA_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSSRA_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSSRA_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSSRA_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSSRA_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSSRA_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSSRA_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSSRA_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSSRA_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSSRA_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSSRA_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSSRA_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSRA_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSRA_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSSRA_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSSRA_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSSRA_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSSRA_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSSRA_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSSRA_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSRA_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSRA_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSRA_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSRA_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSRA_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRA_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSRL_VI_M1 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSSRL_VI_M1_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VI_M1_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSSRL_VI_M2 */ VRM2, VRM2, uimm5, AVL, ixlenimm, /* PseudoVSSRL_VI_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VI_M2_TU */ VRM2, VRM2, VRM2, uimm5, AVL, ixlenimm, /* PseudoVSSRL_VI_M4 */ VRM4, VRM4, uimm5, AVL, ixlenimm, /* PseudoVSSRL_VI_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VI_M4_TU */ VRM4, VRM4, VRM4, uimm5, AVL, ixlenimm, /* PseudoVSSRL_VI_M8 */ VRM8, VRM8, uimm5, AVL, ixlenimm, /* PseudoVSSRL_VI_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VI_M8_TU */ VRM8, VRM8, VRM8, uimm5, AVL, ixlenimm, /* PseudoVSSRL_VI_MF2 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSSRL_VI_MF2_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VI_MF2_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSSRL_VI_MF4 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSSRL_VI_MF4_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VI_MF4_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSSRL_VI_MF8 */ VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSSRL_VI_MF8_MASK */ VRNoV0, VRNoV0, VR, uimm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VI_MF8_TU */ VR, VR, VR, uimm5, AVL, ixlenimm, /* PseudoVSSRL_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSSRL_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSSRL_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSSRL_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSSRL_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSSRL_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSSRL_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSSRL_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSSRL_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSSRL_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSSRL_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSSRL_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSSRL_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSSRL_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSSRL_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSRL_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSRL_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSSRL_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSSRL_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSSRL_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSSRL_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSSRL_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSSRL_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSRL_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSRL_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSRL_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSRL_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSRL_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSRL_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSSEG2E16_V_M1 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG2E16_V_M1_MASK */ VRN2M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG2E16_V_M2 */ VRN2M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG2E16_V_M2_MASK */ VRN2M2, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG2E16_V_M4 */ VRN2M4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG2E16_V_M4_MASK */ VRN2M4, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG2E16_V_MF2 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG2E16_V_MF2_MASK */ VRN2M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG2E16_V_MF4 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG2E16_V_MF4_MASK */ VRN2M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG2E32_V_M1 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG2E32_V_M1_MASK */ VRN2M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG2E32_V_M2 */ VRN2M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG2E32_V_M2_MASK */ VRN2M2, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG2E32_V_M4 */ VRN2M4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG2E32_V_M4_MASK */ VRN2M4, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG2E32_V_MF2 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG2E32_V_MF2_MASK */ VRN2M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG2E64_V_M1 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG2E64_V_M1_MASK */ VRN2M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG2E64_V_M2 */ VRN2M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG2E64_V_M2_MASK */ VRN2M2, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG2E64_V_M4 */ VRN2M4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG2E64_V_M4_MASK */ VRN2M4, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG2E8_V_M1 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG2E8_V_M1_MASK */ VRN2M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG2E8_V_M2 */ VRN2M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG2E8_V_M2_MASK */ VRN2M2, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG2E8_V_M4 */ VRN2M4, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG2E8_V_M4_MASK */ VRN2M4, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG2E8_V_MF2 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG2E8_V_MF2_MASK */ VRN2M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG2E8_V_MF4 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG2E8_V_MF4_MASK */ VRN2M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG2E8_V_MF8 */ VRN2M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG2E8_V_MF8_MASK */ VRN2M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG3E16_V_M1 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG3E16_V_M1_MASK */ VRN3M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG3E16_V_M2 */ VRN3M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG3E16_V_M2_MASK */ VRN3M2, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG3E16_V_MF2 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG3E16_V_MF2_MASK */ VRN3M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG3E16_V_MF4 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG3E16_V_MF4_MASK */ VRN3M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG3E32_V_M1 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG3E32_V_M1_MASK */ VRN3M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG3E32_V_M2 */ VRN3M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG3E32_V_M2_MASK */ VRN3M2, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG3E32_V_MF2 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG3E32_V_MF2_MASK */ VRN3M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG3E64_V_M1 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG3E64_V_M1_MASK */ VRN3M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG3E64_V_M2 */ VRN3M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG3E64_V_M2_MASK */ VRN3M2, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG3E8_V_M1 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG3E8_V_M1_MASK */ VRN3M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG3E8_V_M2 */ VRN3M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG3E8_V_M2_MASK */ VRN3M2, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG3E8_V_MF2 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG3E8_V_MF2_MASK */ VRN3M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG3E8_V_MF4 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG3E8_V_MF4_MASK */ VRN3M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG3E8_V_MF8 */ VRN3M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG3E8_V_MF8_MASK */ VRN3M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG4E16_V_M1 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG4E16_V_M1_MASK */ VRN4M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG4E16_V_M2 */ VRN4M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG4E16_V_M2_MASK */ VRN4M2, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG4E16_V_MF2 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG4E16_V_MF2_MASK */ VRN4M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG4E16_V_MF4 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG4E16_V_MF4_MASK */ VRN4M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG4E32_V_M1 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG4E32_V_M1_MASK */ VRN4M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG4E32_V_M2 */ VRN4M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG4E32_V_M2_MASK */ VRN4M2, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG4E32_V_MF2 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG4E32_V_MF2_MASK */ VRN4M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG4E64_V_M1 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG4E64_V_M1_MASK */ VRN4M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG4E64_V_M2 */ VRN4M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG4E64_V_M2_MASK */ VRN4M2, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG4E8_V_M1 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG4E8_V_M1_MASK */ VRN4M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG4E8_V_M2 */ VRN4M2, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG4E8_V_M2_MASK */ VRN4M2, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG4E8_V_MF2 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG4E8_V_MF2_MASK */ VRN4M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG4E8_V_MF4 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG4E8_V_MF4_MASK */ VRN4M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG4E8_V_MF8 */ VRN4M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG4E8_V_MF8_MASK */ VRN4M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG5E16_V_M1 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG5E16_V_M1_MASK */ VRN5M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG5E16_V_MF2 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG5E16_V_MF2_MASK */ VRN5M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG5E16_V_MF4 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG5E16_V_MF4_MASK */ VRN5M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG5E32_V_M1 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG5E32_V_M1_MASK */ VRN5M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG5E32_V_MF2 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG5E32_V_MF2_MASK */ VRN5M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG5E64_V_M1 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG5E64_V_M1_MASK */ VRN5M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG5E8_V_M1 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG5E8_V_M1_MASK */ VRN5M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG5E8_V_MF2 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG5E8_V_MF2_MASK */ VRN5M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG5E8_V_MF4 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG5E8_V_MF4_MASK */ VRN5M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG5E8_V_MF8 */ VRN5M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG5E8_V_MF8_MASK */ VRN5M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG6E16_V_M1 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG6E16_V_M1_MASK */ VRN6M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG6E16_V_MF2 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG6E16_V_MF2_MASK */ VRN6M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG6E16_V_MF4 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG6E16_V_MF4_MASK */ VRN6M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG6E32_V_M1 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG6E32_V_M1_MASK */ VRN6M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG6E32_V_MF2 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG6E32_V_MF2_MASK */ VRN6M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG6E64_V_M1 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG6E64_V_M1_MASK */ VRN6M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG6E8_V_M1 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG6E8_V_M1_MASK */ VRN6M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG6E8_V_MF2 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG6E8_V_MF2_MASK */ VRN6M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG6E8_V_MF4 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG6E8_V_MF4_MASK */ VRN6M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG6E8_V_MF8 */ VRN6M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG6E8_V_MF8_MASK */ VRN6M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG7E16_V_M1 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG7E16_V_M1_MASK */ VRN7M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG7E16_V_MF2 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG7E16_V_MF2_MASK */ VRN7M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG7E16_V_MF4 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG7E16_V_MF4_MASK */ VRN7M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG7E32_V_M1 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG7E32_V_M1_MASK */ VRN7M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG7E32_V_MF2 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG7E32_V_MF2_MASK */ VRN7M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG7E64_V_M1 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG7E64_V_M1_MASK */ VRN7M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG7E8_V_M1 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG7E8_V_M1_MASK */ VRN7M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG7E8_V_MF2 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG7E8_V_MF2_MASK */ VRN7M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG7E8_V_MF4 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG7E8_V_MF4_MASK */ VRN7M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG7E8_V_MF8 */ VRN7M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG7E8_V_MF8_MASK */ VRN7M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG8E16_V_M1 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG8E16_V_M1_MASK */ VRN8M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG8E16_V_MF2 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG8E16_V_MF2_MASK */ VRN8M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG8E16_V_MF4 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG8E16_V_MF4_MASK */ VRN8M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG8E32_V_M1 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG8E32_V_M1_MASK */ VRN8M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG8E32_V_MF2 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG8E32_V_MF2_MASK */ VRN8M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG8E64_V_M1 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG8E64_V_M1_MASK */ VRN8M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG8E8_V_M1 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG8E8_V_M1_MASK */ VRN8M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG8E8_V_MF2 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG8E8_V_MF2_MASK */ VRN8M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG8E8_V_MF4 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG8E8_V_MF4_MASK */ VRN8M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSSEG8E8_V_MF8 */ VRN8M1, GPRMem, GPR, AVL, ixlenimm, /* PseudoVSSSEG8E8_V_MF8_MASK */ VRN8M1, GPRMem, GPR, VMaskOp, AVL, ixlenimm, /* PseudoVSSUBU_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSSUBU_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUBU_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSSUBU_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSSUBU_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUBU_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSSUBU_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSSUBU_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUBU_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSSUBU_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSSUBU_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUBU_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSSUBU_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSSUBU_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUBU_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSSUBU_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSSUBU_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUBU_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSSUBU_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSSUBU_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUBU_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSSUBU_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSUBU_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUBU_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSUBU_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSSUBU_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUBU_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSSUBU_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSSUBU_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUBU_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSSUBU_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSSUBU_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUBU_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSSUBU_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSUBU_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUBU_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSUBU_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSUBU_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUBU_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSUBU_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSUBU_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUBU_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSUB_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSSUB_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUB_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSSUB_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSSUB_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUB_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSSUB_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSSUB_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUB_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSSUB_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSSUB_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUB_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSSUB_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSSUB_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUB_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSSUB_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSSUB_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUB_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSSUB_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSSUB_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUB_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSSUB_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSUB_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUB_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSUB_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSSUB_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUB_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSSUB_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSSUB_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUB_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSSUB_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSSUB_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUB_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSSUB_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSUB_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUB_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSUB_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSUB_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUB_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSUB_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSSUB_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSSUB_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSUB_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSUB_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSUB_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSUB_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSUB_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSUB_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVSUB_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSUB_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSUB_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVSUB_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSUB_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSUB_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVSUB_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSUB_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSUB_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSUB_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSUB_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSUB_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSUB_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVSUB_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSUB_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVSUB_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSUB_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSUB_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSUB_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSUB_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSUB_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVSUB_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSUB_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSUB_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVSUB_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSUB_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSUB_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVSUB_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSUB_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSUB_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSUB_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSUB_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSUB_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSUB_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVSUB_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVSUB_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVSUXEI16_V_M1_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI16_V_M1_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_M1_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI16_V_M1_M2_MASK */ VRM2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_M1_M4 */ VRM4, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI16_V_M1_M4_MASK */ VRM4, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_M1_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI16_V_M1_MF2_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_M2_M1 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXEI16_V_M2_M1_MASK */ VR, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_M2_M2 */ VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXEI16_V_M2_M2_MASK */ VRM2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_M2_M4 */ VRM4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXEI16_V_M2_M4_MASK */ VRM4, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_M2_M8 */ VRM8, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXEI16_V_M2_M8_MASK */ VRM8, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_M4_M2 */ VRM2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXEI16_V_M4_M2_MASK */ VRM2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_M4_M4 */ VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXEI16_V_M4_M4_MASK */ VRM4, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_M4_M8 */ VRM8, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXEI16_V_M4_M8_MASK */ VRM8, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_M8_M4 */ VRM4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXEI16_V_M8_M4_MASK */ VRM4, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_M8_M8 */ VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXEI16_V_M8_M8_MASK */ VRM8, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_MF2_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI16_V_MF2_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_MF2_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI16_V_MF2_M2_MASK */ VRM2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_MF2_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI16_V_MF2_MF2_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_MF2_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI16_V_MF2_MF4_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_MF4_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI16_V_MF4_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_MF4_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI16_V_MF4_MF2_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_MF4_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI16_V_MF4_MF4_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI16_V_MF4_MF8 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI16_V_MF4_MF8_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI32_V_M1_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI32_V_M1_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI32_V_M1_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI32_V_M1_M2_MASK */ VRM2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI32_V_M1_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI32_V_M1_MF2_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI32_V_M1_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI32_V_M1_MF4_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI32_V_M2_M1 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXEI32_V_M2_M1_MASK */ VR, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI32_V_M2_M2 */ VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXEI32_V_M2_M2_MASK */ VRM2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI32_V_M2_M4 */ VRM4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXEI32_V_M2_M4_MASK */ VRM4, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI32_V_M2_MF2 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXEI32_V_M2_MF2_MASK */ VR, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI32_V_M4_M1 */ VR, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXEI32_V_M4_M1_MASK */ VR, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI32_V_M4_M2 */ VRM2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXEI32_V_M4_M2_MASK */ VRM2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI32_V_M4_M4 */ VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXEI32_V_M4_M4_MASK */ VRM4, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI32_V_M4_M8 */ VRM8, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXEI32_V_M4_M8_MASK */ VRM8, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI32_V_M8_M2 */ VRM2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXEI32_V_M8_M2_MASK */ VRM2, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI32_V_M8_M4 */ VRM4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXEI32_V_M8_M4_MASK */ VRM4, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI32_V_M8_M8 */ VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXEI32_V_M8_M8_MASK */ VRM8, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI32_V_MF2_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI32_V_MF2_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI32_V_MF2_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI32_V_MF2_MF2_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI32_V_MF2_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI32_V_MF2_MF4_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI32_V_MF2_MF8 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI32_V_MF2_MF8_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI64_V_M1_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI64_V_M1_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI64_V_M1_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI64_V_M1_MF2_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI64_V_M1_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI64_V_M1_MF4_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI64_V_M1_MF8 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI64_V_M1_MF8_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI64_V_M2_M1 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXEI64_V_M2_M1_MASK */ VR, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI64_V_M2_M2 */ VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXEI64_V_M2_M2_MASK */ VRM2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI64_V_M2_MF2 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXEI64_V_M2_MF2_MASK */ VR, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI64_V_M2_MF4 */ VR, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXEI64_V_M2_MF4_MASK */ VR, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI64_V_M4_M1 */ VR, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXEI64_V_M4_M1_MASK */ VR, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI64_V_M4_M2 */ VRM2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXEI64_V_M4_M2_MASK */ VRM2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI64_V_M4_M4 */ VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXEI64_V_M4_M4_MASK */ VRM4, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI64_V_M4_MF2 */ VR, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXEI64_V_M4_MF2_MASK */ VR, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI64_V_M8_M1 */ VR, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXEI64_V_M8_M1_MASK */ VR, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI64_V_M8_M2 */ VRM2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXEI64_V_M8_M2_MASK */ VRM2, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI64_V_M8_M4 */ VRM4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXEI64_V_M8_M4_MASK */ VRM4, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI64_V_M8_M8 */ VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXEI64_V_M8_M8_MASK */ VRM8, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_M1_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI8_V_M1_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_M1_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI8_V_M1_M2_MASK */ VRM2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_M1_M4 */ VRM4, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI8_V_M1_M4_MASK */ VRM4, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_M1_M8 */ VRM8, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI8_V_M1_M8_MASK */ VRM8, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_M2_M2 */ VRM2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXEI8_V_M2_M2_MASK */ VRM2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_M2_M4 */ VRM4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXEI8_V_M2_M4_MASK */ VRM4, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_M2_M8 */ VRM8, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXEI8_V_M2_M8_MASK */ VRM8, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_M4_M4 */ VRM4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXEI8_V_M4_M4_MASK */ VRM4, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_M4_M8 */ VRM8, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXEI8_V_M4_M8_MASK */ VRM8, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_M8_M8 */ VRM8, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXEI8_V_M8_M8_MASK */ VRM8, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF2_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF2_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF2_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF2_M2_MASK */ VRM2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF2_M4 */ VRM4, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF2_M4_MASK */ VRM4, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF2_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF2_MF2_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF4_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF4_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF4_M2 */ VRM2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF4_M2_MASK */ VRM2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF4_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF4_MF2_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF4_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF4_MF4_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF8_M1 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF8_M1_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF8_MF2 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF8_MF2_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF8_MF4 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF8_MF4_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF8_MF8 */ VR, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXEI8_V_MF8_MF8_MASK */ VR, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M1_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M1_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M1_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M1_M2_MASK */ VRN2M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M1_M4 */ VRN2M4, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M1_M4_MASK */ VRN2M4, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M1_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M1_MF2_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M2_M1 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M2_M1_MASK */ VRN2M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M2_M2 */ VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M2_M2_MASK */ VRN2M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M2_M4 */ VRN2M4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M2_M4_MASK */ VRN2M4, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M4_M2 */ VRN2M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M4_M2_MASK */ VRN2M2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M4_M4 */ VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M4_M4_MASK */ VRN2M4, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M8_M4 */ VRN2M4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_M8_M4_MASK */ VRN2M4, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_MF2_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_MF2_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_MF2_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_MF2_M2_MASK */ VRN2M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_MF2_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_MF2_MF2_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_MF2_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_MF2_MF4_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_MF4_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_MF4_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_MF4_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_MF4_MF2_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_MF4_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_MF4_MF4_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_MF4_MF8 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI16_V_MF4_MF8_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M1_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M1_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M1_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M1_M2_MASK */ VRN2M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M1_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M1_MF2_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M1_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M1_MF4_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M2_M1 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M2_M1_MASK */ VRN2M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M2_M2 */ VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M2_M2_MASK */ VRN2M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M2_M4 */ VRN2M4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M2_M4_MASK */ VRN2M4, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M2_MF2 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M2_MF2_MASK */ VRN2M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M4_M1 */ VRN2M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M4_M1_MASK */ VRN2M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M4_M2 */ VRN2M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M4_M2_MASK */ VRN2M2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M4_M4 */ VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M4_M4_MASK */ VRN2M4, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M8_M2 */ VRN2M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M8_M2_MASK */ VRN2M2, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M8_M4 */ VRN2M4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_M8_M4_MASK */ VRN2M4, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_MF2_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_MF2_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_MF2_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_MF2_MF2_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_MF2_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_MF2_MF4_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_MF2_MF8 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI32_V_MF2_MF8_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M1_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M1_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M1_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M1_MF2_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M1_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M1_MF4_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M1_MF8 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M1_MF8_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M2_M1 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M2_M1_MASK */ VRN2M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M2_M2 */ VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M2_M2_MASK */ VRN2M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M2_MF2 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M2_MF2_MASK */ VRN2M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M2_MF4 */ VRN2M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M2_MF4_MASK */ VRN2M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M4_M1 */ VRN2M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M4_M1_MASK */ VRN2M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M4_M2 */ VRN2M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M4_M2_MASK */ VRN2M2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M4_M4 */ VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M4_M4_MASK */ VRN2M4, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M4_MF2 */ VRN2M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M4_MF2_MASK */ VRN2M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M8_M1 */ VRN2M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M8_M1_MASK */ VRN2M1, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M8_M2 */ VRN2M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M8_M2_MASK */ VRN2M2, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M8_M4 */ VRN2M4, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXSEG2EI64_V_M8_M4_MASK */ VRN2M4, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_M1_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_M1_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_M1_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_M1_M2_MASK */ VRN2M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_M1_M4 */ VRN2M4, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_M1_M4_MASK */ VRN2M4, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_M2_M2 */ VRN2M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_M2_M2_MASK */ VRN2M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_M2_M4 */ VRN2M4, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_M2_M4_MASK */ VRN2M4, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_M4_M4 */ VRN2M4, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_M4_M4_MASK */ VRN2M4, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF2_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF2_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF2_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF2_M2_MASK */ VRN2M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF2_M4 */ VRN2M4, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF2_M4_MASK */ VRN2M4, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF2_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF2_MF2_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF4_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF4_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF4_M2 */ VRN2M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF4_M2_MASK */ VRN2M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF4_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF4_MF2_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF4_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF4_MF4_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF8_M1 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF8_M1_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF8_MF2 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF8_MF2_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF8_MF4 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF8_MF4_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF8_MF8 */ VRN2M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG2EI8_V_MF8_MF8_MASK */ VRN2M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_M1_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_M1_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_M1_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_M1_M2_MASK */ VRN3M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_M1_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_M1_MF2_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_M2_M1 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_M2_M1_MASK */ VRN3M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_M2_M2 */ VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_M2_M2_MASK */ VRN3M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_M4_M2 */ VRN3M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_M4_M2_MASK */ VRN3M2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_MF2_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_MF2_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_MF2_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_MF2_M2_MASK */ VRN3M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_MF2_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_MF2_MF2_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_MF2_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_MF2_MF4_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_MF4_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_MF4_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_MF4_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_MF4_MF2_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_MF4_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_MF4_MF4_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_MF4_MF8 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI16_V_MF4_MF8_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M1_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M1_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M1_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M1_M2_MASK */ VRN3M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M1_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M1_MF2_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M1_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M1_MF4_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M2_M1 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M2_M1_MASK */ VRN3M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M2_M2 */ VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M2_M2_MASK */ VRN3M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M2_MF2 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M2_MF2_MASK */ VRN3M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M4_M1 */ VRN3M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M4_M1_MASK */ VRN3M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M4_M2 */ VRN3M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M4_M2_MASK */ VRN3M2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M8_M2 */ VRN3M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_M8_M2_MASK */ VRN3M2, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_MF2_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_MF2_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_MF2_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_MF2_MF2_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_MF2_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_MF2_MF4_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_MF2_MF8 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI32_V_MF2_MF8_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M1_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M1_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M1_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M1_MF2_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M1_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M1_MF4_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M1_MF8 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M1_MF8_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M2_M1 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M2_M1_MASK */ VRN3M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M2_M2 */ VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M2_M2_MASK */ VRN3M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M2_MF2 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M2_MF2_MASK */ VRN3M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M2_MF4 */ VRN3M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M2_MF4_MASK */ VRN3M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M4_M1 */ VRN3M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M4_M1_MASK */ VRN3M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M4_M2 */ VRN3M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M4_M2_MASK */ VRN3M2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M4_MF2 */ VRN3M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M4_MF2_MASK */ VRN3M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M8_M1 */ VRN3M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M8_M1_MASK */ VRN3M1, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M8_M2 */ VRN3M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXSEG3EI64_V_M8_M2_MASK */ VRN3M2, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_M1_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_M1_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_M1_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_M1_M2_MASK */ VRN3M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_M2_M2 */ VRN3M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_M2_M2_MASK */ VRN3M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF2_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF2_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF2_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF2_M2_MASK */ VRN3M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF2_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF2_MF2_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF4_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF4_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF4_M2 */ VRN3M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF4_M2_MASK */ VRN3M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF4_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF4_MF2_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF4_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF4_MF4_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF8_M1 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF8_M1_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF8_MF2 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF8_MF2_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF8_MF4 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF8_MF4_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF8_MF8 */ VRN3M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG3EI8_V_MF8_MF8_MASK */ VRN3M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_M1_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_M1_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_M1_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_M1_M2_MASK */ VRN4M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_M1_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_M1_MF2_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_M2_M1 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_M2_M1_MASK */ VRN4M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_M2_M2 */ VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_M2_M2_MASK */ VRN4M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_M4_M2 */ VRN4M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_M4_M2_MASK */ VRN4M2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_MF2_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_MF2_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_MF2_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_MF2_M2_MASK */ VRN4M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_MF2_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_MF2_MF2_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_MF2_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_MF2_MF4_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_MF4_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_MF4_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_MF4_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_MF4_MF2_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_MF4_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_MF4_MF4_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_MF4_MF8 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI16_V_MF4_MF8_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M1_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M1_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M1_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M1_M2_MASK */ VRN4M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M1_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M1_MF2_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M1_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M1_MF4_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M2_M1 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M2_M1_MASK */ VRN4M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M2_M2 */ VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M2_M2_MASK */ VRN4M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M2_MF2 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M2_MF2_MASK */ VRN4M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M4_M1 */ VRN4M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M4_M1_MASK */ VRN4M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M4_M2 */ VRN4M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M4_M2_MASK */ VRN4M2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M8_M2 */ VRN4M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_M8_M2_MASK */ VRN4M2, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_MF2_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_MF2_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_MF2_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_MF2_MF2_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_MF2_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_MF2_MF4_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_MF2_MF8 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI32_V_MF2_MF8_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M1_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M1_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M1_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M1_MF2_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M1_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M1_MF4_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M1_MF8 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M1_MF8_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M2_M1 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M2_M1_MASK */ VRN4M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M2_M2 */ VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M2_M2_MASK */ VRN4M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M2_MF2 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M2_MF2_MASK */ VRN4M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M2_MF4 */ VRN4M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M2_MF4_MASK */ VRN4M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M4_M1 */ VRN4M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M4_M1_MASK */ VRN4M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M4_M2 */ VRN4M2, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M4_M2_MASK */ VRN4M2, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M4_MF2 */ VRN4M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M4_MF2_MASK */ VRN4M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M8_M1 */ VRN4M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M8_M1_MASK */ VRN4M1, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M8_M2 */ VRN4M2, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXSEG4EI64_V_M8_M2_MASK */ VRN4M2, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_M1_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_M1_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_M1_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_M1_M2_MASK */ VRN4M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_M2_M2 */ VRN4M2, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_M2_M2_MASK */ VRN4M2, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF2_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF2_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF2_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF2_M2_MASK */ VRN4M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF2_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF2_MF2_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF4_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF4_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF4_M2 */ VRN4M2, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF4_M2_MASK */ VRN4M2, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF4_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF4_MF2_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF4_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF4_MF4_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF8_M1 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF8_M1_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF8_MF2 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF8_MF2_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF8_MF4 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF8_MF4_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF8_MF8 */ VRN4M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG4EI8_V_MF8_MF8_MASK */ VRN4M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_M1_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_M1_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_M1_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_M1_MF2_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_M2_M1 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_M2_M1_MASK */ VRN5M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_MF2_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_MF2_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_MF2_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_MF2_MF2_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_MF2_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_MF2_MF4_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_MF4_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_MF4_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_MF4_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_MF4_MF2_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_MF4_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_MF4_MF4_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_MF4_MF8 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI16_V_MF4_MF8_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_M1_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_M1_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_M1_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_M1_MF2_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_M1_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_M1_MF4_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_M2_M1 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_M2_M1_MASK */ VRN5M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_M2_MF2 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_M2_MF2_MASK */ VRN5M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_M4_M1 */ VRN5M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_M4_M1_MASK */ VRN5M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_MF2_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_MF2_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_MF2_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_MF2_MF2_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_MF2_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_MF2_MF4_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_MF2_MF8 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI32_V_MF2_MF8_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M1_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M1_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M1_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M1_MF2_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M1_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M1_MF4_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M1_MF8 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M1_MF8_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M2_M1 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M2_M1_MASK */ VRN5M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M2_MF2 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M2_MF2_MASK */ VRN5M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M2_MF4 */ VRN5M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M2_MF4_MASK */ VRN5M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M4_M1 */ VRN5M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M4_M1_MASK */ VRN5M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M4_MF2 */ VRN5M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M4_MF2_MASK */ VRN5M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M8_M1 */ VRN5M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXSEG5EI64_V_M8_M1_MASK */ VRN5M1, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_M1_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_M1_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_MF2_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_MF2_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_MF2_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_MF2_MF2_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_MF4_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_MF4_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_MF4_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_MF4_MF2_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_MF4_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_MF4_MF4_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_MF8_M1 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_MF8_M1_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_MF8_MF2 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_MF8_MF2_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_MF8_MF4 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_MF8_MF4_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_MF8_MF8 */ VRN5M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG5EI8_V_MF8_MF8_MASK */ VRN5M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_M1_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_M1_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_M1_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_M1_MF2_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_M2_M1 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_M2_M1_MASK */ VRN6M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_MF2_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_MF2_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_MF2_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_MF2_MF2_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_MF2_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_MF2_MF4_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_MF4_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_MF4_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_MF4_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_MF4_MF2_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_MF4_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_MF4_MF4_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_MF4_MF8 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI16_V_MF4_MF8_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_M1_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_M1_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_M1_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_M1_MF2_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_M1_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_M1_MF4_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_M2_M1 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_M2_M1_MASK */ VRN6M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_M2_MF2 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_M2_MF2_MASK */ VRN6M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_M4_M1 */ VRN6M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_M4_M1_MASK */ VRN6M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_MF2_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_MF2_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_MF2_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_MF2_MF2_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_MF2_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_MF2_MF4_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_MF2_MF8 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI32_V_MF2_MF8_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M1_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M1_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M1_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M1_MF2_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M1_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M1_MF4_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M1_MF8 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M1_MF8_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M2_M1 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M2_M1_MASK */ VRN6M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M2_MF2 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M2_MF2_MASK */ VRN6M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M2_MF4 */ VRN6M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M2_MF4_MASK */ VRN6M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M4_M1 */ VRN6M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M4_M1_MASK */ VRN6M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M4_MF2 */ VRN6M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M4_MF2_MASK */ VRN6M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M8_M1 */ VRN6M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXSEG6EI64_V_M8_M1_MASK */ VRN6M1, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_M1_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_M1_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_MF2_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_MF2_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_MF2_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_MF2_MF2_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_MF4_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_MF4_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_MF4_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_MF4_MF2_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_MF4_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_MF4_MF4_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_MF8_M1 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_MF8_M1_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_MF8_MF2 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_MF8_MF2_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_MF8_MF4 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_MF8_MF4_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_MF8_MF8 */ VRN6M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG6EI8_V_MF8_MF8_MASK */ VRN6M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_M1_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_M1_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_M1_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_M1_MF2_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_M2_M1 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_M2_M1_MASK */ VRN7M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_MF2_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_MF2_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_MF2_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_MF2_MF2_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_MF2_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_MF2_MF4_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_MF4_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_MF4_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_MF4_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_MF4_MF2_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_MF4_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_MF4_MF4_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_MF4_MF8 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI16_V_MF4_MF8_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_M1_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_M1_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_M1_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_M1_MF2_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_M1_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_M1_MF4_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_M2_M1 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_M2_M1_MASK */ VRN7M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_M2_MF2 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_M2_MF2_MASK */ VRN7M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_M4_M1 */ VRN7M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_M4_M1_MASK */ VRN7M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_MF2_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_MF2_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_MF2_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_MF2_MF2_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_MF2_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_MF2_MF4_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_MF2_MF8 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI32_V_MF2_MF8_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M1_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M1_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M1_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M1_MF2_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M1_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M1_MF4_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M1_MF8 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M1_MF8_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M2_M1 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M2_M1_MASK */ VRN7M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M2_MF2 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M2_MF2_MASK */ VRN7M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M2_MF4 */ VRN7M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M2_MF4_MASK */ VRN7M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M4_M1 */ VRN7M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M4_M1_MASK */ VRN7M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M4_MF2 */ VRN7M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M4_MF2_MASK */ VRN7M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M8_M1 */ VRN7M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXSEG7EI64_V_M8_M1_MASK */ VRN7M1, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_M1_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_M1_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_MF2_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_MF2_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_MF2_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_MF2_MF2_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_MF4_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_MF4_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_MF4_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_MF4_MF2_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_MF4_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_MF4_MF4_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_MF8_M1 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_MF8_M1_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_MF8_MF2 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_MF8_MF2_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_MF8_MF4 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_MF8_MF4_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_MF8_MF8 */ VRN7M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG7EI8_V_MF8_MF8_MASK */ VRN7M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_M1_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_M1_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_M1_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_M1_MF2_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_M2_M1 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_M2_M1_MASK */ VRN8M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_MF2_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_MF2_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_MF2_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_MF2_MF2_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_MF2_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_MF2_MF4_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_MF4_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_MF4_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_MF4_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_MF4_MF2_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_MF4_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_MF4_MF4_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_MF4_MF8 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI16_V_MF4_MF8_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_M1_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_M1_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_M1_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_M1_MF2_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_M1_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_M1_MF4_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_M2_M1 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_M2_M1_MASK */ VRN8M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_M2_MF2 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_M2_MF2_MASK */ VRN8M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_M4_M1 */ VRN8M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_M4_M1_MASK */ VRN8M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_MF2_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_MF2_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_MF2_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_MF2_MF2_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_MF2_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_MF2_MF4_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_MF2_MF8 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI32_V_MF2_MF8_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M1_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M1_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M1_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M1_MF2_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M1_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M1_MF4_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M1_MF8 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M1_MF8_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M2_M1 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M2_M1_MASK */ VRN8M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M2_MF2 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M2_MF2_MASK */ VRN8M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M2_MF4 */ VRN8M1, GPRMem, VRM2, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M2_MF4_MASK */ VRN8M1, GPRMem, VRM2, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M4_M1 */ VRN8M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M4_M1_MASK */ VRN8M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M4_MF2 */ VRN8M1, GPRMem, VRM4, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M4_MF2_MASK */ VRN8M1, GPRMem, VRM4, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M8_M1 */ VRN8M1, GPRMem, VRM8, AVL, ixlenimm, /* PseudoVSUXSEG8EI64_V_M8_M1_MASK */ VRN8M1, GPRMem, VRM8, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_M1_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_M1_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_MF2_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_MF2_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_MF2_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_MF2_MF2_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_MF4_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_MF4_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_MF4_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_MF4_MF2_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_MF4_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_MF4_MF4_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_MF8_M1 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_MF8_M1_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_MF8_MF2 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_MF8_MF2_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_MF8_MF4 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_MF8_MF4_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_MF8_MF8 */ VRN8M1, GPRMem, VR, AVL, ixlenimm, /* PseudoVSUXSEG8EI8_V_MF8_MF8_MASK */ VRN8M1, GPRMem, VR, VMaskOp, AVL, ixlenimm, /* PseudoVWADDU_VV_M1 */ VRM2, VR, VR, AVL, ixlenimm, /* PseudoVWADDU_VV_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_VV_M1_TU */ VRM2, VRM2, VR, VR, AVL, ixlenimm, /* PseudoVWADDU_VV_M2 */ VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVWADDU_VV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_VV_M2_TU */ VRM4, VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVWADDU_VV_M4 */ VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVWADDU_VV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_VV_M4_TU */ VRM8, VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVWADDU_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWADDU_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWADDU_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWADDU_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWADDU_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWADDU_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWADDU_VX_M1 */ VRM2, VR, GPR, AVL, ixlenimm, /* PseudoVWADDU_VX_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_VX_M1_TU */ VRM2, VRM2, VR, GPR, AVL, ixlenimm, /* PseudoVWADDU_VX_M2 */ VRM4, VRM2, GPR, AVL, ixlenimm, /* PseudoVWADDU_VX_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_VX_M2_TU */ VRM4, VRM4, VRM2, GPR, AVL, ixlenimm, /* PseudoVWADDU_VX_M4 */ VRM8, VRM4, GPR, AVL, ixlenimm, /* PseudoVWADDU_VX_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_VX_M4_TU */ VRM8, VRM8, VRM4, GPR, AVL, ixlenimm, /* PseudoVWADDU_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADDU_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADDU_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADDU_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADDU_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADDU_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADDU_WV_M1 */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVWADDU_WV_M1_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WV_M1_MASK_TIED */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WV_M1_TIED */ VRM2, VRM2, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WV_M1_TU */ VRM2, VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVWADDU_WV_M2 */ VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVWADDU_WV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WV_M2_MASK_TIED */ VRM4NoV0, VRM4NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WV_M2_TIED */ VRM4, VRM4, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WV_M2_TU */ VRM4, VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVWADDU_WV_M4 */ VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVWADDU_WV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WV_M4_MASK_TIED */ VRM8NoV0, VRM8NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WV_M4_TIED */ VRM8, VRM8, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WV_M4_TU */ VRM8, VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVWADDU_WV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWADDU_WV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WV_MF2_MASK_TIED */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WV_MF2_TIED */ VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWADDU_WV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWADDU_WV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WV_MF4_MASK_TIED */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WV_MF4_TIED */ VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWADDU_WV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWADDU_WV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WV_MF8_MASK_TIED */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WV_MF8_TIED */ VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWADDU_WX_M1 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVWADDU_WX_M1_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WX_M1_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVWADDU_WX_M2 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVWADDU_WX_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WX_M2_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVWADDU_WX_M4 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVWADDU_WX_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WX_M4_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVWADDU_WX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADDU_WX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADDU_WX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADDU_WX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADDU_WX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADDU_WX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADDU_WX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADD_VV_M1 */ VRM2, VR, VR, AVL, ixlenimm, /* PseudoVWADD_VV_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_VV_M1_TU */ VRM2, VRM2, VR, VR, AVL, ixlenimm, /* PseudoVWADD_VV_M2 */ VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVWADD_VV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_VV_M2_TU */ VRM4, VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVWADD_VV_M4 */ VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVWADD_VV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_VV_M4_TU */ VRM8, VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVWADD_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWADD_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWADD_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWADD_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWADD_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWADD_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWADD_VX_M1 */ VRM2, VR, GPR, AVL, ixlenimm, /* PseudoVWADD_VX_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_VX_M1_TU */ VRM2, VRM2, VR, GPR, AVL, ixlenimm, /* PseudoVWADD_VX_M2 */ VRM4, VRM2, GPR, AVL, ixlenimm, /* PseudoVWADD_VX_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_VX_M2_TU */ VRM4, VRM4, VRM2, GPR, AVL, ixlenimm, /* PseudoVWADD_VX_M4 */ VRM8, VRM4, GPR, AVL, ixlenimm, /* PseudoVWADD_VX_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_VX_M4_TU */ VRM8, VRM8, VRM4, GPR, AVL, ixlenimm, /* PseudoVWADD_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADD_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADD_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADD_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADD_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADD_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADD_WV_M1 */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVWADD_WV_M1_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WV_M1_MASK_TIED */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WV_M1_TIED */ VRM2, VRM2, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WV_M1_TU */ VRM2, VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVWADD_WV_M2 */ VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVWADD_WV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WV_M2_MASK_TIED */ VRM4NoV0, VRM4NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WV_M2_TIED */ VRM4, VRM4, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WV_M2_TU */ VRM4, VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVWADD_WV_M4 */ VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVWADD_WV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WV_M4_MASK_TIED */ VRM8NoV0, VRM8NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WV_M4_TIED */ VRM8, VRM8, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WV_M4_TU */ VRM8, VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVWADD_WV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWADD_WV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WV_MF2_MASK_TIED */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WV_MF2_TIED */ VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWADD_WV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWADD_WV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WV_MF4_MASK_TIED */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WV_MF4_TIED */ VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWADD_WV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWADD_WV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WV_MF8_MASK_TIED */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WV_MF8_TIED */ VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWADD_WX_M1 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVWADD_WX_M1_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WX_M1_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVWADD_WX_M2 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVWADD_WX_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WX_M2_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVWADD_WX_M4 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVWADD_WX_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WX_M4_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVWADD_WX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADD_WX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADD_WX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADD_WX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADD_WX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWADD_WX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWADD_WX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWMACCSU_VV_M1 */ VRM2, VRM2, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VV_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VV_M2 */ VRM4, VRM4, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VV_M4 */ VRM8, VRM8, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VV_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VV_MF8 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VX_M1 */ VRM2, VRM2, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VX_M1_MASK */ VRM2NoV0, VRM2NoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VX_M2 */ VRM4, VRM4, GPR, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VX_M2_MASK */ VRM4NoV0, VRM4NoV0, GPR, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VX_M4 */ VRM8, VRM8, GPR, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VX_M4_MASK */ VRM8NoV0, VRM8NoV0, GPR, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VX_MF2 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VX_MF2_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VX_MF4 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VX_MF4_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VX_MF8 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCSU_VX_MF8_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCUS_VX_M1 */ VRM2, VRM2, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCUS_VX_M1_MASK */ VRM2NoV0, VRM2NoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCUS_VX_M2 */ VRM4, VRM4, GPR, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCUS_VX_M2_MASK */ VRM4NoV0, VRM4NoV0, GPR, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCUS_VX_M4 */ VRM8, VRM8, GPR, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCUS_VX_M4_MASK */ VRM8NoV0, VRM8NoV0, GPR, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCUS_VX_MF2 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCUS_VX_MF2_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCUS_VX_MF4 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCUS_VX_MF4_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCUS_VX_MF8 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCUS_VX_MF8_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VV_M1 */ VRM2, VRM2, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VV_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VV_M2 */ VRM4, VRM4, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VV_M4 */ VRM8, VRM8, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VV_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VV_MF8 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VX_M1 */ VRM2, VRM2, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VX_M1_MASK */ VRM2NoV0, VRM2NoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VX_M2 */ VRM4, VRM4, GPR, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VX_M2_MASK */ VRM4NoV0, VRM4NoV0, GPR, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VX_M4 */ VRM8, VRM8, GPR, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VX_M4_MASK */ VRM8NoV0, VRM8NoV0, GPR, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VX_MF2 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VX_MF2_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VX_MF4 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VX_MF4_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VX_MF8 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACCU_VX_MF8_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VV_M1 */ VRM2, VRM2, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VV_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VV_M2 */ VRM4, VRM4, VRM2, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VV_M4 */ VRM8, VRM8, VRM4, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VV_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VV_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VV_MF8 */ VR, VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VX_M1 */ VRM2, VRM2, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VX_M1_MASK */ VRM2NoV0, VRM2NoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VX_M2 */ VRM4, VRM4, GPR, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VX_M2_MASK */ VRM4NoV0, VRM4NoV0, GPR, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VX_M4 */ VRM8, VRM8, GPR, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VX_M4_MASK */ VRM8NoV0, VRM8NoV0, GPR, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VX_MF2 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VX_MF2_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VX_MF4 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VX_MF4_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VX_MF8 */ VR, VR, GPR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWMACC_VX_MF8_MASK */ VRNoV0, VRNoV0, GPR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULSU_VV_M1 */ VRM2, VR, VR, AVL, ixlenimm, /* PseudoVWMULSU_VV_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULSU_VV_M1_TU */ VRM2, VRM2, VR, VR, AVL, ixlenimm, /* PseudoVWMULSU_VV_M2 */ VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVWMULSU_VV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULSU_VV_M2_TU */ VRM4, VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVWMULSU_VV_M4 */ VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVWMULSU_VV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULSU_VV_M4_TU */ VRM8, VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVWMULSU_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWMULSU_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULSU_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWMULSU_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWMULSU_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULSU_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWMULSU_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWMULSU_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULSU_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWMULSU_VX_M1 */ VRM2, VR, GPR, AVL, ixlenimm, /* PseudoVWMULSU_VX_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULSU_VX_M1_TU */ VRM2, VRM2, VR, GPR, AVL, ixlenimm, /* PseudoVWMULSU_VX_M2 */ VRM4, VRM2, GPR, AVL, ixlenimm, /* PseudoVWMULSU_VX_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULSU_VX_M2_TU */ VRM4, VRM4, VRM2, GPR, AVL, ixlenimm, /* PseudoVWMULSU_VX_M4 */ VRM8, VRM4, GPR, AVL, ixlenimm, /* PseudoVWMULSU_VX_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULSU_VX_M4_TU */ VRM8, VRM8, VRM4, GPR, AVL, ixlenimm, /* PseudoVWMULSU_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWMULSU_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULSU_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWMULSU_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWMULSU_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULSU_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWMULSU_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWMULSU_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULSU_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWMULU_VV_M1 */ VRM2, VR, VR, AVL, ixlenimm, /* PseudoVWMULU_VV_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULU_VV_M1_TU */ VRM2, VRM2, VR, VR, AVL, ixlenimm, /* PseudoVWMULU_VV_M2 */ VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVWMULU_VV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULU_VV_M2_TU */ VRM4, VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVWMULU_VV_M4 */ VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVWMULU_VV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULU_VV_M4_TU */ VRM8, VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVWMULU_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWMULU_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULU_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWMULU_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWMULU_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULU_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWMULU_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWMULU_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULU_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWMULU_VX_M1 */ VRM2, VR, GPR, AVL, ixlenimm, /* PseudoVWMULU_VX_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULU_VX_M1_TU */ VRM2, VRM2, VR, GPR, AVL, ixlenimm, /* PseudoVWMULU_VX_M2 */ VRM4, VRM2, GPR, AVL, ixlenimm, /* PseudoVWMULU_VX_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULU_VX_M2_TU */ VRM4, VRM4, VRM2, GPR, AVL, ixlenimm, /* PseudoVWMULU_VX_M4 */ VRM8, VRM4, GPR, AVL, ixlenimm, /* PseudoVWMULU_VX_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULU_VX_M4_TU */ VRM8, VRM8, VRM4, GPR, AVL, ixlenimm, /* PseudoVWMULU_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWMULU_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULU_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWMULU_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWMULU_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULU_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWMULU_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWMULU_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMULU_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWMUL_VV_M1 */ VRM2, VR, VR, AVL, ixlenimm, /* PseudoVWMUL_VV_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMUL_VV_M1_TU */ VRM2, VRM2, VR, VR, AVL, ixlenimm, /* PseudoVWMUL_VV_M2 */ VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVWMUL_VV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMUL_VV_M2_TU */ VRM4, VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVWMUL_VV_M4 */ VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVWMUL_VV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMUL_VV_M4_TU */ VRM8, VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVWMUL_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWMUL_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMUL_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWMUL_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWMUL_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMUL_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWMUL_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWMUL_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMUL_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWMUL_VX_M1 */ VRM2, VR, GPR, AVL, ixlenimm, /* PseudoVWMUL_VX_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMUL_VX_M1_TU */ VRM2, VRM2, VR, GPR, AVL, ixlenimm, /* PseudoVWMUL_VX_M2 */ VRM4, VRM2, GPR, AVL, ixlenimm, /* PseudoVWMUL_VX_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMUL_VX_M2_TU */ VRM4, VRM4, VRM2, GPR, AVL, ixlenimm, /* PseudoVWMUL_VX_M4 */ VRM8, VRM4, GPR, AVL, ixlenimm, /* PseudoVWMUL_VX_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMUL_VX_M4_TU */ VRM8, VRM8, VRM4, GPR, AVL, ixlenimm, /* PseudoVWMUL_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWMUL_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMUL_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWMUL_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWMUL_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMUL_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWMUL_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWMUL_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWMUL_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWREDSUMU_VS_M1 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWREDSUMU_VS_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVWREDSUMU_VS_M2 */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVWREDSUMU_VS_M2_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, /* PseudoVWREDSUMU_VS_M4 */ VR, VR, VRM4, VR, AVL, ixlenimm, /* PseudoVWREDSUMU_VS_M4_MASK */ VRNoV0, VRNoV0, VRM4, VR, VMaskOp, AVL, ixlenimm, /* PseudoVWREDSUMU_VS_M8 */ VR, VR, VRM8, VR, AVL, ixlenimm, /* PseudoVWREDSUMU_VS_M8_MASK */ VRNoV0, VRNoV0, VRM8, VR, VMaskOp, AVL, ixlenimm, /* PseudoVWREDSUMU_VS_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWREDSUMU_VS_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVWREDSUMU_VS_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWREDSUMU_VS_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVWREDSUMU_VS_MF8 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWREDSUMU_VS_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVWREDSUM_VS_M1 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWREDSUM_VS_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVWREDSUM_VS_M2 */ VR, VR, VRM2, VR, AVL, ixlenimm, /* PseudoVWREDSUM_VS_M2_MASK */ VRNoV0, VRNoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, /* PseudoVWREDSUM_VS_M4 */ VR, VR, VRM4, VR, AVL, ixlenimm, /* PseudoVWREDSUM_VS_M4_MASK */ VRNoV0, VRNoV0, VRM4, VR, VMaskOp, AVL, ixlenimm, /* PseudoVWREDSUM_VS_M8 */ VR, VR, VRM8, VR, AVL, ixlenimm, /* PseudoVWREDSUM_VS_M8_MASK */ VRNoV0, VRNoV0, VRM8, VR, VMaskOp, AVL, ixlenimm, /* PseudoVWREDSUM_VS_MF2 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWREDSUM_VS_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVWREDSUM_VS_MF4 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWREDSUM_VS_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVWREDSUM_VS_MF8 */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWREDSUM_VS_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, /* PseudoVWSUBU_VV_M1 */ VRM2, VR, VR, AVL, ixlenimm, /* PseudoVWSUBU_VV_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_VV_M1_TU */ VRM2, VRM2, VR, VR, AVL, ixlenimm, /* PseudoVWSUBU_VV_M2 */ VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVWSUBU_VV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_VV_M2_TU */ VRM4, VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVWSUBU_VV_M4 */ VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVWSUBU_VV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_VV_M4_TU */ VRM8, VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVWSUBU_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUBU_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUBU_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUBU_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUBU_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUBU_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUBU_VX_M1 */ VRM2, VR, GPR, AVL, ixlenimm, /* PseudoVWSUBU_VX_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_VX_M1_TU */ VRM2, VRM2, VR, GPR, AVL, ixlenimm, /* PseudoVWSUBU_VX_M2 */ VRM4, VRM2, GPR, AVL, ixlenimm, /* PseudoVWSUBU_VX_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_VX_M2_TU */ VRM4, VRM4, VRM2, GPR, AVL, ixlenimm, /* PseudoVWSUBU_VX_M4 */ VRM8, VRM4, GPR, AVL, ixlenimm, /* PseudoVWSUBU_VX_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_VX_M4_TU */ VRM8, VRM8, VRM4, GPR, AVL, ixlenimm, /* PseudoVWSUBU_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUBU_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUBU_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUBU_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUBU_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUBU_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUBU_WV_M1 */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVWSUBU_WV_M1_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WV_M1_MASK_TIED */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WV_M1_TIED */ VRM2, VRM2, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WV_M1_TU */ VRM2, VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVWSUBU_WV_M2 */ VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVWSUBU_WV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WV_M2_MASK_TIED */ VRM4NoV0, VRM4NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WV_M2_TIED */ VRM4, VRM4, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WV_M2_TU */ VRM4, VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVWSUBU_WV_M4 */ VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVWSUBU_WV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WV_M4_MASK_TIED */ VRM8NoV0, VRM8NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WV_M4_TIED */ VRM8, VRM8, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WV_M4_TU */ VRM8, VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVWSUBU_WV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUBU_WV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WV_MF2_MASK_TIED */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WV_MF2_TIED */ VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUBU_WV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUBU_WV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WV_MF4_MASK_TIED */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WV_MF4_TIED */ VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUBU_WV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUBU_WV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WV_MF8_MASK_TIED */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WV_MF8_TIED */ VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUBU_WX_M1 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVWSUBU_WX_M1_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WX_M1_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVWSUBU_WX_M2 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVWSUBU_WX_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WX_M2_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVWSUBU_WX_M4 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVWSUBU_WX_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WX_M4_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVWSUBU_WX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUBU_WX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUBU_WX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUBU_WX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUBU_WX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUBU_WX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUBU_WX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUB_VV_M1 */ VRM2, VR, VR, AVL, ixlenimm, /* PseudoVWSUB_VV_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_VV_M1_TU */ VRM2, VRM2, VR, VR, AVL, ixlenimm, /* PseudoVWSUB_VV_M2 */ VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVWSUB_VV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_VV_M2_TU */ VRM4, VRM4, VRM2, VRM2, AVL, ixlenimm, /* PseudoVWSUB_VV_M4 */ VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVWSUB_VV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_VV_M4_TU */ VRM8, VRM8, VRM4, VRM4, AVL, ixlenimm, /* PseudoVWSUB_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUB_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUB_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUB_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUB_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUB_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUB_VX_M1 */ VRM2, VR, GPR, AVL, ixlenimm, /* PseudoVWSUB_VX_M1_MASK */ VRM2NoV0, VRM2NoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_VX_M1_TU */ VRM2, VRM2, VR, GPR, AVL, ixlenimm, /* PseudoVWSUB_VX_M2 */ VRM4, VRM2, GPR, AVL, ixlenimm, /* PseudoVWSUB_VX_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_VX_M2_TU */ VRM4, VRM4, VRM2, GPR, AVL, ixlenimm, /* PseudoVWSUB_VX_M4 */ VRM8, VRM4, GPR, AVL, ixlenimm, /* PseudoVWSUB_VX_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_VX_M4_TU */ VRM8, VRM8, VRM4, GPR, AVL, ixlenimm, /* PseudoVWSUB_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUB_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUB_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUB_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUB_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUB_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUB_WV_M1 */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVWSUB_WV_M1_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WV_M1_MASK_TIED */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WV_M1_TIED */ VRM2, VRM2, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WV_M1_TU */ VRM2, VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVWSUB_WV_M2 */ VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVWSUB_WV_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WV_M2_MASK_TIED */ VRM4NoV0, VRM4NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WV_M2_TIED */ VRM4, VRM4, VRM2, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WV_M2_TU */ VRM4, VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVWSUB_WV_M4 */ VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVWSUB_WV_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WV_M4_MASK_TIED */ VRM8NoV0, VRM8NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WV_M4_TIED */ VRM8, VRM8, VRM4, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WV_M4_TU */ VRM8, VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVWSUB_WV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUB_WV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WV_MF2_MASK_TIED */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WV_MF2_TIED */ VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUB_WV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUB_WV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WV_MF4_MASK_TIED */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WV_MF4_TIED */ VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUB_WV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUB_WV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WV_MF8_MASK_TIED */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WV_MF8_TIED */ VR, VR, VR, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVWSUB_WX_M1 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVWSUB_WX_M1_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WX_M1_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVWSUB_WX_M2 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVWSUB_WX_M2_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WX_M2_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVWSUB_WX_M4 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVWSUB_WX_M4_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WX_M4_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVWSUB_WX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUB_WX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUB_WX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUB_WX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUB_WX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVWSUB_WX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVWSUB_WX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVXOR_VI_M1 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVXOR_VI_M1_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VI_M1_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVXOR_VI_M2 */ VRM2, VRM2, simm5, AVL, ixlenimm, /* PseudoVXOR_VI_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VI_M2_TU */ VRM2, VRM2, VRM2, simm5, AVL, ixlenimm, /* PseudoVXOR_VI_M4 */ VRM4, VRM4, simm5, AVL, ixlenimm, /* PseudoVXOR_VI_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VI_M4_TU */ VRM4, VRM4, VRM4, simm5, AVL, ixlenimm, /* PseudoVXOR_VI_M8 */ VRM8, VRM8, simm5, AVL, ixlenimm, /* PseudoVXOR_VI_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VI_M8_TU */ VRM8, VRM8, VRM8, simm5, AVL, ixlenimm, /* PseudoVXOR_VI_MF2 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVXOR_VI_MF2_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VI_MF2_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVXOR_VI_MF4 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVXOR_VI_MF4_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VI_MF4_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVXOR_VI_MF8 */ VR, VR, simm5, AVL, ixlenimm, /* PseudoVXOR_VI_MF8_MASK */ VRNoV0, VRNoV0, VR, simm5, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VI_MF8_TU */ VR, VR, VR, simm5, AVL, ixlenimm, /* PseudoVXOR_VV_M1 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVXOR_VV_M1_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VV_M1_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVXOR_VV_M2 */ VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVXOR_VV_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VV_M2_TU */ VRM2, VRM2, VRM2, VRM2, AVL, ixlenimm, /* PseudoVXOR_VV_M4 */ VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVXOR_VV_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VV_M4_TU */ VRM4, VRM4, VRM4, VRM4, AVL, ixlenimm, /* PseudoVXOR_VV_M8 */ VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVXOR_VV_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, VRM8, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VV_M8_TU */ VRM8, VRM8, VRM8, VRM8, AVL, ixlenimm, /* PseudoVXOR_VV_MF2 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVXOR_VV_MF2_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VV_MF2_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVXOR_VV_MF4 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVXOR_VV_MF4_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VV_MF4_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVXOR_VV_MF8 */ VR, VR, VR, AVL, ixlenimm, /* PseudoVXOR_VV_MF8_MASK */ VRNoV0, VRNoV0, VR, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VV_MF8_TU */ VR, VR, VR, VR, AVL, ixlenimm, /* PseudoVXOR_VX_M1 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVXOR_VX_M1_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VX_M1_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVXOR_VX_M2 */ VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVXOR_VX_M2_MASK */ VRM2NoV0, VRM2NoV0, VRM2, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VX_M2_TU */ VRM2, VRM2, VRM2, GPR, AVL, ixlenimm, /* PseudoVXOR_VX_M4 */ VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVXOR_VX_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM4, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VX_M4_TU */ VRM4, VRM4, VRM4, GPR, AVL, ixlenimm, /* PseudoVXOR_VX_M8 */ VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVXOR_VX_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM8, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VX_M8_TU */ VRM8, VRM8, VRM8, GPR, AVL, ixlenimm, /* PseudoVXOR_VX_MF2 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVXOR_VX_MF2_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VX_MF2_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVXOR_VX_MF4 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVXOR_VX_MF4_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VX_MF4_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVXOR_VX_MF8 */ VR, VR, GPR, AVL, ixlenimm, /* PseudoVXOR_VX_MF8_MASK */ VRNoV0, VRNoV0, VR, GPR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVXOR_VX_MF8_TU */ VR, VR, VR, GPR, AVL, ixlenimm, /* PseudoVZEXT_VF2_M1 */ VR, VR, AVL, ixlenimm, /* PseudoVZEXT_VF2_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVZEXT_VF2_M1_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVZEXT_VF2_M2 */ VRM2, VR, AVL, ixlenimm, /* PseudoVZEXT_VF2_M2_MASK */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVZEXT_VF2_M2_TU */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVZEXT_VF2_M4 */ VRM4, VRM2, AVL, ixlenimm, /* PseudoVZEXT_VF2_M4_MASK */ VRM4NoV0, VRM4NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVZEXT_VF2_M4_TU */ VRM4, VRM4, VRM2, AVL, ixlenimm, /* PseudoVZEXT_VF2_M8 */ VRM8, VRM4, AVL, ixlenimm, /* PseudoVZEXT_VF2_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM4, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVZEXT_VF2_M8_TU */ VRM8, VRM8, VRM4, AVL, ixlenimm, /* PseudoVZEXT_VF2_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVZEXT_VF2_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVZEXT_VF2_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVZEXT_VF2_MF4 */ VR, VR, AVL, ixlenimm, /* PseudoVZEXT_VF2_MF4_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVZEXT_VF2_MF4_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVZEXT_VF4_M1 */ VR, VR, AVL, ixlenimm, /* PseudoVZEXT_VF4_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVZEXT_VF4_M1_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVZEXT_VF4_M2 */ VRM2, VR, AVL, ixlenimm, /* PseudoVZEXT_VF4_M2_MASK */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVZEXT_VF4_M2_TU */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVZEXT_VF4_M4 */ VRM4, VR, AVL, ixlenimm, /* PseudoVZEXT_VF4_M4_MASK */ VRM4NoV0, VRM4NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVZEXT_VF4_M4_TU */ VRM4, VRM4, VR, AVL, ixlenimm, /* PseudoVZEXT_VF4_M8 */ VRM8, VRM2, AVL, ixlenimm, /* PseudoVZEXT_VF4_M8_MASK */ VRM8NoV0, VRM8NoV0, VRM2, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVZEXT_VF4_M8_TU */ VRM8, VRM8, VRM2, AVL, ixlenimm, /* PseudoVZEXT_VF4_MF2 */ VR, VR, AVL, ixlenimm, /* PseudoVZEXT_VF4_MF2_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVZEXT_VF4_MF2_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVZEXT_VF8_M1 */ VR, VR, AVL, ixlenimm, /* PseudoVZEXT_VF8_M1_MASK */ VRNoV0, VRNoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVZEXT_VF8_M1_TU */ VR, VR, VR, AVL, ixlenimm, /* PseudoVZEXT_VF8_M2 */ VRM2, VR, AVL, ixlenimm, /* PseudoVZEXT_VF8_M2_MASK */ VRM2NoV0, VRM2NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVZEXT_VF8_M2_TU */ VRM2, VRM2, VR, AVL, ixlenimm, /* PseudoVZEXT_VF8_M4 */ VRM4, VR, AVL, ixlenimm, /* PseudoVZEXT_VF8_M4_MASK */ VRM4NoV0, VRM4NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVZEXT_VF8_M4_TU */ VRM4, VRM4, VR, AVL, ixlenimm, /* PseudoVZEXT_VF8_M8 */ VRM8, VR, AVL, ixlenimm, /* PseudoVZEXT_VF8_M8_MASK */ VRM8NoV0, VRM8NoV0, VR, VMaskOp, AVL, ixlenimm, ixlenimm, /* PseudoVZEXT_VF8_M8_TU */ VRM8, VRM8, VR, AVL, ixlenimm, /* PseudoZEXT_H */ GPR, GPR, /* PseudoZEXT_W */ GPR, GPR, /* ReadCycleWide */ GPR, GPR, /* ReadFFLAGS */ GPR, /* ReadFRM */ GPR, /* Select_FPR16_Using_CC_GPR */ FPR16, GPR, GPR, ixlenimm, FPR16, FPR16, /* Select_FPR32_Using_CC_GPR */ FPR32, GPR, GPR, ixlenimm, FPR32, FPR32, /* Select_FPR64_Using_CC_GPR */ FPR64, GPR, GPR, ixlenimm, FPR64, FPR64, /* Select_GPR_Using_CC_GPR */ GPR, GPR, GPR, ixlenimm, GPR, GPR, /* SplitF64Pseudo */ GPR, GPR, FPR64, /* SwapFRMImm */ GPR, uimm5, /* WriteFFLAGS */ GPR, /* WriteFRM */ GPR, /* WriteFRMImm */ uimm5, /* ADD */ GPR, GPR, GPR, /* ADDI */ GPR, GPR, simm12, /* ADDIW */ GPR, GPR, simm12, /* ADDW */ GPR, GPR, GPR, /* ADD_UW */ GPR, GPR, GPR, /* AES32DSI */ GPR, GPR, GPR, byteselect, /* AES32DSMI */ GPR, GPR, GPR, byteselect, /* AES32ESI */ GPR, GPR, GPR, byteselect, /* AES32ESMI */ GPR, GPR, GPR, byteselect, /* AES64DS */ GPR, GPR, GPR, /* AES64DSM */ GPR, GPR, GPR, /* AES64ES */ GPR, GPR, GPR, /* AES64ESM */ GPR, GPR, GPR, /* AES64IM */ GPR, GPR, /* AES64KS1I */ GPR, GPR, rnum, /* AES64KS2 */ GPR, GPR, GPR, /* AMOADD_D */ GPR, GPRMemZeroOffset, GPR, /* AMOADD_D_AQ */ GPR, GPRMemZeroOffset, GPR, /* AMOADD_D_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOADD_D_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOADD_W */ GPR, GPRMemZeroOffset, GPR, /* AMOADD_W_AQ */ GPR, GPRMemZeroOffset, GPR, /* AMOADD_W_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOADD_W_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOAND_D */ GPR, GPRMemZeroOffset, GPR, /* AMOAND_D_AQ */ GPR, GPRMemZeroOffset, GPR, /* AMOAND_D_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOAND_D_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOAND_W */ GPR, GPRMemZeroOffset, GPR, /* AMOAND_W_AQ */ GPR, GPRMemZeroOffset, GPR, /* AMOAND_W_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOAND_W_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOMAXU_D */ GPR, GPRMemZeroOffset, GPR, /* AMOMAXU_D_AQ */ GPR, GPRMemZeroOffset, GPR, /* AMOMAXU_D_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOMAXU_D_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOMAXU_W */ GPR, GPRMemZeroOffset, GPR, /* AMOMAXU_W_AQ */ GPR, GPRMemZeroOffset, GPR, /* AMOMAXU_W_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOMAXU_W_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOMAX_D */ GPR, GPRMemZeroOffset, GPR, /* AMOMAX_D_AQ */ GPR, GPRMemZeroOffset, GPR, /* AMOMAX_D_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOMAX_D_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOMAX_W */ GPR, GPRMemZeroOffset, GPR, /* AMOMAX_W_AQ */ GPR, GPRMemZeroOffset, GPR, /* AMOMAX_W_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOMAX_W_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOMINU_D */ GPR, GPRMemZeroOffset, GPR, /* AMOMINU_D_AQ */ GPR, GPRMemZeroOffset, GPR, /* AMOMINU_D_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOMINU_D_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOMINU_W */ GPR, GPRMemZeroOffset, GPR, /* AMOMINU_W_AQ */ GPR, GPRMemZeroOffset, GPR, /* AMOMINU_W_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOMINU_W_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOMIN_D */ GPR, GPRMemZeroOffset, GPR, /* AMOMIN_D_AQ */ GPR, GPRMemZeroOffset, GPR, /* AMOMIN_D_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOMIN_D_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOMIN_W */ GPR, GPRMemZeroOffset, GPR, /* AMOMIN_W_AQ */ GPR, GPRMemZeroOffset, GPR, /* AMOMIN_W_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOMIN_W_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOOR_D */ GPR, GPRMemZeroOffset, GPR, /* AMOOR_D_AQ */ GPR, GPRMemZeroOffset, GPR, /* AMOOR_D_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOOR_D_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOOR_W */ GPR, GPRMemZeroOffset, GPR, /* AMOOR_W_AQ */ GPR, GPRMemZeroOffset, GPR, /* AMOOR_W_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOOR_W_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOSWAP_D */ GPR, GPRMemZeroOffset, GPR, /* AMOSWAP_D_AQ */ GPR, GPRMemZeroOffset, GPR, /* AMOSWAP_D_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOSWAP_D_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOSWAP_W */ GPR, GPRMemZeroOffset, GPR, /* AMOSWAP_W_AQ */ GPR, GPRMemZeroOffset, GPR, /* AMOSWAP_W_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOSWAP_W_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOXOR_D */ GPR, GPRMemZeroOffset, GPR, /* AMOXOR_D_AQ */ GPR, GPRMemZeroOffset, GPR, /* AMOXOR_D_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOXOR_D_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOXOR_W */ GPR, GPRMemZeroOffset, GPR, /* AMOXOR_W_AQ */ GPR, GPRMemZeroOffset, GPR, /* AMOXOR_W_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* AMOXOR_W_RL */ GPR, GPRMemZeroOffset, GPR, /* AND */ GPR, GPR, GPR, /* ANDI */ GPR, GPR, simm12, /* ANDN */ GPR, GPR, GPR, /* AUIPC */ GPR, uimm20_auipc, /* BCLR */ GPR, GPR, GPR, /* BCLRI */ GPR, GPR, uimmlog2xlen, /* BEQ */ GPR, GPR, simm13_lsb0, /* BEXT */ GPR, GPR, GPR, /* BEXTI */ GPR, GPR, uimmlog2xlen, /* BGE */ GPR, GPR, simm13_lsb0, /* BGEU */ GPR, GPR, simm13_lsb0, /* BINV */ GPR, GPR, GPR, /* BINVI */ GPR, GPR, uimmlog2xlen, /* BLT */ GPR, GPR, simm13_lsb0, /* BLTU */ GPR, GPR, simm13_lsb0, /* BNE */ GPR, GPR, simm13_lsb0, /* BREV8 */ GPR, GPR, /* BSET */ GPR, GPR, GPR, /* BSETI */ GPR, GPR, uimmlog2xlen, /* CBO_CLEAN */ GPRMemZeroOffset, /* CBO_FLUSH */ GPRMemZeroOffset, /* CBO_INVAL */ GPRMemZeroOffset, /* CBO_ZERO */ GPRMemZeroOffset, /* CLMUL */ GPR, GPR, GPR, /* CLMULH */ GPR, GPR, GPR, /* CLMULR */ GPR, GPR, GPR, /* CLZ */ GPR, GPR, /* CLZW */ GPR, GPR, /* CPOP */ GPR, GPR, /* CPOPW */ GPR, GPR, /* CSRRC */ GPR, csr_sysreg, GPR, /* CSRRCI */ GPR, csr_sysreg, uimm5, /* CSRRS */ GPR, csr_sysreg, GPR, /* CSRRSI */ GPR, csr_sysreg, uimm5, /* CSRRW */ GPR, csr_sysreg, GPR, /* CSRRWI */ GPR, csr_sysreg, uimm5, /* CTZ */ GPR, GPR, /* CTZW */ GPR, GPR, /* C_ADD */ GPRNoX0, GPRNoX0, GPRNoX0, /* C_ADDI */ GPRNoX0, GPRNoX0, simm6nonzero, /* C_ADDI16SP */ SP, SP, simm10_lsb0000nonzero, /* C_ADDI4SPN */ GPRC, SP, uimm10_lsb00nonzero, /* C_ADDIW */ GPRNoX0, GPRNoX0, simm6, /* C_ADDI_HINT_IMM_ZERO */ GPRNoX0, GPRNoX0, immzero, /* C_ADDI_HINT_X0 */ GPRX0, GPRX0, simm6nonzero, /* C_ADDI_NOP */ GPRX0, GPRX0, immzero, /* C_ADDW */ GPRC, GPRC, GPRC, /* C_ADD_HINT */ GPRX0, GPRX0, GPRNoX0, /* C_AND */ GPRC, GPRC, GPRC, /* C_ANDI */ GPRC, GPRC, simm6, /* C_BEQZ */ GPRC, simm9_lsb0, /* C_BNEZ */ GPRC, simm9_lsb0, /* C_EBREAK */ /* C_FLD */ FPR64C, GPRCMem, uimm8_lsb000, /* C_FLDSP */ FPR64, SPMem, uimm9_lsb000, /* C_FLW */ FPR32C, GPRCMem, uimm7_lsb00, /* C_FLWSP */ FPR32, SPMem, uimm8_lsb00, /* C_FSD */ FPR64C, GPRCMem, uimm8_lsb000, /* C_FSDSP */ FPR64, SPMem, uimm9_lsb000, /* C_FSW */ FPR32C, GPRCMem, uimm7_lsb00, /* C_FSWSP */ FPR32, SPMem, uimm8_lsb00, /* C_J */ simm12_lsb0, /* C_JAL */ simm12_lsb0, /* C_JALR */ GPRNoX0, /* C_JR */ GPRNoX0, /* C_LD */ GPRC, GPRCMem, uimm8_lsb000, /* C_LDSP */ GPRNoX0, SPMem, uimm9_lsb000, /* C_LI */ GPRNoX0, simm6, /* C_LI_HINT */ GPRX0, simm6, /* C_LUI */ GPRNoX0X2, c_lui_imm, /* C_LUI_HINT */ GPRX0, c_lui_imm, /* C_LW */ GPRC, GPRCMem, uimm7_lsb00, /* C_LWSP */ GPRNoX0, SPMem, uimm8_lsb00, /* C_MV */ GPRNoX0, GPRNoX0, /* C_MV_HINT */ GPRX0, GPRNoX0, /* C_NOP */ /* C_NOP_HINT */ simm6nonzero, /* C_OR */ GPRC, GPRC, GPRC, /* C_SD */ GPRC, GPRCMem, uimm8_lsb000, /* C_SDSP */ GPR, SPMem, uimm9_lsb000, /* C_SLLI */ GPRNoX0, GPRNoX0, uimmlog2xlennonzero, /* C_SLLI64_HINT */ GPR, GPR, /* C_SLLI_HINT */ GPRX0, GPRX0, uimmlog2xlennonzero, /* C_SRAI */ GPRC, GPRC, uimmlog2xlennonzero, /* C_SRAI64_HINT */ GPRC, GPRC, /* C_SRLI */ GPRC, GPRC, uimmlog2xlennonzero, /* C_SRLI64_HINT */ GPRC, GPRC, /* C_SUB */ GPRC, GPRC, GPRC, /* C_SUBW */ GPRC, GPRC, GPRC, /* C_SW */ GPRC, GPRCMem, uimm7_lsb00, /* C_SWSP */ GPR, SPMem, uimm8_lsb00, /* C_UNIMP */ /* C_XOR */ GPRC, GPRC, GPRC, /* DIV */ GPR, GPR, GPR, /* DIVU */ GPR, GPR, GPR, /* DIVUW */ GPR, GPR, GPR, /* DIVW */ GPR, GPR, GPR, /* DRET */ GPR, GPR, /* EBREAK */ /* ECALL */ /* FADD_D */ FPR64, FPR64, FPR64, frmarg, /* FADD_D_IN32X */ FPR64IN32X, FPR64IN32X, FPR64IN32X, frmarg, /* FADD_D_INX */ FPR64INX, FPR64INX, FPR64INX, frmarg, /* FADD_H */ FPR16, FPR16, FPR16, frmarg, /* FADD_H_INX */ FPR16INX, FPR16INX, FPR16INX, frmarg, /* FADD_S */ FPR32, FPR32, FPR32, frmarg, /* FADD_S_INX */ FPR32INX, FPR32INX, FPR32INX, frmarg, /* FCLASS_D */ GPR, FPR64, /* FCLASS_D_IN32X */ GPR, FPR64IN32X, /* FCLASS_D_INX */ GPR, FPR64INX, /* FCLASS_H */ GPR, FPR16, /* FCLASS_H_INX */ GPR, FPR16INX, /* FCLASS_S */ GPR, FPR32, /* FCLASS_S_INX */ GPR, FPR32INX, /* FCVT_D_H */ FPR64, FPR16, /* FCVT_D_H_INX */ FPR64INX, FPR16INX, /* FCVT_D_L */ FPR64, GPR, frmarg, /* FCVT_D_LU */ FPR64, GPR, frmarg, /* FCVT_D_LU_INX */ FPR64INX, GPR, frmarg, /* FCVT_D_L_INX */ FPR64INX, GPR, frmarg, /* FCVT_D_S */ FPR64, FPR32, /* FCVT_D_S_IN32X */ FPR64IN32X, FPR32INX, /* FCVT_D_S_INX */ FPR64INX, FPR32INX, /* FCVT_D_W */ FPR64, GPR, /* FCVT_D_WU */ FPR64, GPR, /* FCVT_D_WU_IN32X */ FPR64IN32X, GPR, /* FCVT_D_WU_INX */ FPR64INX, GPR, /* FCVT_D_W_IN32X */ FPR64IN32X, GPR, /* FCVT_D_W_INX */ FPR64INX, GPR, /* FCVT_H_D */ FPR16, FPR64, frmarg, /* FCVT_H_D_INX */ FPR16INX, FPR64INX, frmarg, /* FCVT_H_L */ FPR16, GPR, frmarg, /* FCVT_H_LU */ FPR16, GPR, frmarg, /* FCVT_H_LU_INX */ FPR16INX, GPR, frmarg, /* FCVT_H_L_INX */ FPR16INX, GPR, frmarg, /* FCVT_H_S */ FPR16, FPR32, frmarg, /* FCVT_H_S_INX */ FPR16INX, FPR32INX, frmarg, /* FCVT_H_W */ FPR16, GPR, frmarg, /* FCVT_H_WU */ FPR16, GPR, frmarg, /* FCVT_H_WU_INX */ FPR16INX, GPR, frmarg, /* FCVT_H_W_INX */ FPR16INX, GPR, frmarg, /* FCVT_LU_D */ GPR, FPR64, frmarg, /* FCVT_LU_D_INX */ GPR, FPR64INX, frmarg, /* FCVT_LU_H */ GPR, FPR16, frmarg, /* FCVT_LU_H_INX */ GPR, FPR16INX, frmarg, /* FCVT_LU_S */ GPR, FPR32, frmarg, /* FCVT_LU_S_INX */ GPR, FPR32INX, frmarg, /* FCVT_L_D */ GPR, FPR64, frmarg, /* FCVT_L_D_INX */ GPR, FPR64INX, frmarg, /* FCVT_L_H */ GPR, FPR16, frmarg, /* FCVT_L_H_INX */ GPR, FPR16INX, frmarg, /* FCVT_L_S */ GPR, FPR32, frmarg, /* FCVT_L_S_INX */ GPR, FPR32INX, frmarg, /* FCVT_S_D */ FPR32, FPR64, frmarg, /* FCVT_S_D_IN32X */ FPR32INX, FPR64IN32X, frmarg, /* FCVT_S_D_INX */ FPR32INX, FPR64INX, frmarg, /* FCVT_S_H */ FPR32, FPR16, /* FCVT_S_H_INX */ FPR32INX, FPR16INX, /* FCVT_S_L */ FPR32, GPR, frmarg, /* FCVT_S_LU */ FPR32, GPR, frmarg, /* FCVT_S_LU_INX */ FPR32INX, GPR, frmarg, /* FCVT_S_L_INX */ FPR32INX, GPR, frmarg, /* FCVT_S_W */ FPR32, GPR, frmarg, /* FCVT_S_WU */ FPR32, GPR, frmarg, /* FCVT_S_WU_INX */ FPR32INX, GPR, frmarg, /* FCVT_S_W_INX */ FPR32INX, GPR, frmarg, /* FCVT_WU_D */ GPR, FPR64, frmarg, /* FCVT_WU_D_IN32X */ GPR, FPR64IN32X, frmarg, /* FCVT_WU_D_INX */ GPR, FPR64INX, frmarg, /* FCVT_WU_H */ GPR, FPR16, frmarg, /* FCVT_WU_H_INX */ GPR, FPR16INX, frmarg, /* FCVT_WU_S */ GPR, FPR32, frmarg, /* FCVT_WU_S_INX */ GPR, FPR32INX, frmarg, /* FCVT_W_D */ GPR, FPR64, frmarg, /* FCVT_W_D_IN32X */ GPR, FPR64IN32X, frmarg, /* FCVT_W_D_INX */ GPR, FPR64INX, frmarg, /* FCVT_W_H */ GPR, FPR16, frmarg, /* FCVT_W_H_INX */ GPR, FPR16INX, frmarg, /* FCVT_W_S */ GPR, FPR32, frmarg, /* FCVT_W_S_INX */ GPR, FPR32INX, frmarg, /* FDIV_D */ FPR64, FPR64, FPR64, frmarg, /* FDIV_D_IN32X */ FPR64IN32X, FPR64IN32X, FPR64IN32X, frmarg, /* FDIV_D_INX */ FPR64INX, FPR64INX, FPR64INX, frmarg, /* FDIV_H */ FPR16, FPR16, FPR16, frmarg, /* FDIV_H_INX */ FPR16INX, FPR16INX, FPR16INX, frmarg, /* FDIV_S */ FPR32, FPR32, FPR32, frmarg, /* FDIV_S_INX */ FPR32INX, FPR32INX, FPR32INX, frmarg, /* FENCE */ fencearg, fencearg, /* FENCE_I */ /* FENCE_TSO */ /* FEQ_D */ GPR, FPR64, FPR64, /* FEQ_D_IN32X */ GPR, FPR64IN32X, FPR64IN32X, /* FEQ_D_INX */ GPR, FPR64INX, FPR64INX, /* FEQ_H */ GPR, FPR16, FPR16, /* FEQ_H_INX */ GPR, FPR16INX, FPR16INX, /* FEQ_S */ GPR, FPR32, FPR32, /* FEQ_S_INX */ GPR, FPR32INX, FPR32INX, /* FLD */ FPR64, GPRMem, simm12, /* FLE_D */ GPR, FPR64, FPR64, /* FLE_D_IN32X */ GPR, FPR64IN32X, FPR64IN32X, /* FLE_D_INX */ GPR, FPR64INX, FPR64INX, /* FLE_H */ GPR, FPR16, FPR16, /* FLE_H_INX */ GPR, FPR16INX, FPR16INX, /* FLE_S */ GPR, FPR32, FPR32, /* FLE_S_INX */ GPR, FPR32INX, FPR32INX, /* FLH */ FPR16, GPRMem, simm12, /* FLT_D */ GPR, FPR64, FPR64, /* FLT_D_IN32X */ GPR, FPR64IN32X, FPR64IN32X, /* FLT_D_INX */ GPR, FPR64INX, FPR64INX, /* FLT_H */ GPR, FPR16, FPR16, /* FLT_H_INX */ GPR, FPR16INX, FPR16INX, /* FLT_S */ GPR, FPR32, FPR32, /* FLT_S_INX */ GPR, FPR32INX, FPR32INX, /* FLW */ FPR32, GPRMem, simm12, /* FMADD_D */ FPR64, FPR64, FPR64, FPR64, frmarg, /* FMADD_D_IN32X */ FPR64IN32X, FPR64IN32X, FPR64IN32X, FPR64IN32X, frmarg, /* FMADD_D_INX */ FPR64INX, FPR64INX, FPR64INX, FPR64INX, frmarg, /* FMADD_H */ FPR16, FPR16, FPR16, FPR16, frmarg, /* FMADD_H_INX */ FPR16INX, FPR16INX, FPR16INX, FPR16INX, frmarg, /* FMADD_S */ FPR32, FPR32, FPR32, FPR32, frmarg, /* FMADD_S_INX */ FPR32INX, FPR32INX, FPR32INX, FPR32INX, frmarg, /* FMAX_D */ FPR64, FPR64, FPR64, /* FMAX_D_IN32X */ FPR64IN32X, FPR64IN32X, FPR64IN32X, /* FMAX_D_INX */ FPR64INX, FPR64INX, FPR64INX, /* FMAX_H */ FPR16, FPR16, FPR16, /* FMAX_H_INX */ FPR16INX, FPR16INX, FPR16INX, /* FMAX_S */ FPR32, FPR32, FPR32, /* FMAX_S_INX */ FPR32INX, FPR32INX, FPR32INX, /* FMIN_D */ FPR64, FPR64, FPR64, /* FMIN_D_IN32X */ FPR64IN32X, FPR64IN32X, FPR64IN32X, /* FMIN_D_INX */ FPR64INX, FPR64INX, FPR64INX, /* FMIN_H */ FPR16, FPR16, FPR16, /* FMIN_H_INX */ FPR16INX, FPR16INX, FPR16INX, /* FMIN_S */ FPR32, FPR32, FPR32, /* FMIN_S_INX */ FPR32INX, FPR32INX, FPR32INX, /* FMSUB_D */ FPR64, FPR64, FPR64, FPR64, frmarg, /* FMSUB_D_IN32X */ FPR64IN32X, FPR64IN32X, FPR64IN32X, FPR64IN32X, frmarg, /* FMSUB_D_INX */ FPR64INX, FPR64INX, FPR64INX, FPR64INX, frmarg, /* FMSUB_H */ FPR16, FPR16, FPR16, FPR16, frmarg, /* FMSUB_H_INX */ FPR16INX, FPR16INX, FPR16INX, FPR16INX, frmarg, /* FMSUB_S */ FPR32, FPR32, FPR32, FPR32, frmarg, /* FMSUB_S_INX */ FPR32INX, FPR32INX, FPR32INX, FPR32INX, frmarg, /* FMUL_D */ FPR64, FPR64, FPR64, frmarg, /* FMUL_D_IN32X */ FPR64IN32X, FPR64IN32X, FPR64IN32X, frmarg, /* FMUL_D_INX */ FPR64INX, FPR64INX, FPR64INX, frmarg, /* FMUL_H */ FPR16, FPR16, FPR16, frmarg, /* FMUL_H_INX */ FPR16INX, FPR16INX, FPR16INX, frmarg, /* FMUL_S */ FPR32, FPR32, FPR32, frmarg, /* FMUL_S_INX */ FPR32INX, FPR32INX, FPR32INX, frmarg, /* FMV_D_X */ FPR64, GPR, /* FMV_H_X */ FPR16, GPR, /* FMV_W_X */ FPR32, GPR, /* FMV_X_D */ GPR, FPR64, /* FMV_X_H */ GPR, FPR16, /* FMV_X_W */ GPR, FPR32, /* FNMADD_D */ FPR64, FPR64, FPR64, FPR64, frmarg, /* FNMADD_D_IN32X */ FPR64IN32X, FPR64IN32X, FPR64IN32X, FPR64IN32X, frmarg, /* FNMADD_D_INX */ FPR64INX, FPR64INX, FPR64INX, FPR64INX, frmarg, /* FNMADD_H */ FPR16, FPR16, FPR16, FPR16, frmarg, /* FNMADD_H_INX */ FPR16INX, FPR16INX, FPR16INX, FPR16INX, frmarg, /* FNMADD_S */ FPR32, FPR32, FPR32, FPR32, frmarg, /* FNMADD_S_INX */ FPR32INX, FPR32INX, FPR32INX, FPR32INX, frmarg, /* FNMSUB_D */ FPR64, FPR64, FPR64, FPR64, frmarg, /* FNMSUB_D_IN32X */ FPR64IN32X, FPR64IN32X, FPR64IN32X, FPR64IN32X, frmarg, /* FNMSUB_D_INX */ FPR64INX, FPR64INX, FPR64INX, FPR64INX, frmarg, /* FNMSUB_H */ FPR16, FPR16, FPR16, FPR16, frmarg, /* FNMSUB_H_INX */ FPR16INX, FPR16INX, FPR16INX, FPR16INX, frmarg, /* FNMSUB_S */ FPR32, FPR32, FPR32, FPR32, frmarg, /* FNMSUB_S_INX */ FPR32INX, FPR32INX, FPR32INX, FPR32INX, frmarg, /* FSD */ FPR64, GPRMem, simm12, /* FSGNJN_D */ FPR64, FPR64, FPR64, /* FSGNJN_D_IN32X */ FPR64IN32X, FPR64IN32X, FPR64IN32X, /* FSGNJN_D_INX */ FPR64INX, FPR64INX, FPR64INX, /* FSGNJN_H */ FPR16, FPR16, FPR16, /* FSGNJN_H_INX */ FPR16INX, FPR16INX, FPR16INX, /* FSGNJN_S */ FPR32, FPR32, FPR32, /* FSGNJN_S_INX */ FPR32INX, FPR32INX, FPR32INX, /* FSGNJX_D */ FPR64, FPR64, FPR64, /* FSGNJX_D_IN32X */ FPR64IN32X, FPR64IN32X, FPR64IN32X, /* FSGNJX_D_INX */ FPR64INX, FPR64INX, FPR64INX, /* FSGNJX_H */ FPR16, FPR16, FPR16, /* FSGNJX_H_INX */ FPR16INX, FPR16INX, FPR16INX, /* FSGNJX_S */ FPR32, FPR32, FPR32, /* FSGNJX_S_INX */ FPR32INX, FPR32INX, FPR32INX, /* FSGNJ_D */ FPR64, FPR64, FPR64, /* FSGNJ_D_IN32X */ FPR64IN32X, FPR64IN32X, FPR64IN32X, /* FSGNJ_D_INX */ FPR64INX, FPR64INX, FPR64INX, /* FSGNJ_H */ FPR16, FPR16, FPR16, /* FSGNJ_H_INX */ FPR16INX, FPR16INX, FPR16INX, /* FSGNJ_S */ FPR32, FPR32, FPR32, /* FSGNJ_S_INX */ FPR32INX, FPR32INX, FPR32INX, /* FSH */ FPR16, GPRMem, simm12, /* FSQRT_D */ FPR64, FPR64, frmarg, /* FSQRT_D_IN32X */ FPR64IN32X, FPR64IN32X, frmarg, /* FSQRT_D_INX */ FPR64INX, FPR64INX, frmarg, /* FSQRT_H */ FPR16, FPR16, frmarg, /* FSQRT_H_INX */ FPR16INX, FPR16INX, frmarg, /* FSQRT_S */ FPR32, FPR32, frmarg, /* FSQRT_S_INX */ FPR32INX, FPR32INX, frmarg, /* FSUB_D */ FPR64, FPR64, FPR64, frmarg, /* FSUB_D_IN32X */ FPR64IN32X, FPR64IN32X, FPR64IN32X, frmarg, /* FSUB_D_INX */ FPR64INX, FPR64INX, FPR64INX, frmarg, /* FSUB_H */ FPR16, FPR16, FPR16, frmarg, /* FSUB_H_INX */ FPR16INX, FPR16INX, FPR16INX, frmarg, /* FSUB_S */ FPR32, FPR32, FPR32, frmarg, /* FSUB_S_INX */ FPR32INX, FPR32INX, FPR32INX, frmarg, /* FSW */ FPR32, GPRMem, simm12, /* HFENCE_GVMA */ GPR, GPR, /* HFENCE_VVMA */ GPR, GPR, /* HINVAL_GVMA */ GPR, GPR, /* HINVAL_VVMA */ GPR, GPR, /* HLVX_HU */ GPR, GPRMemZeroOffset, /* HLVX_WU */ GPR, GPRMemZeroOffset, /* HLV_B */ GPR, GPRMemZeroOffset, /* HLV_BU */ GPR, GPRMemZeroOffset, /* HLV_D */ GPR, GPRMemZeroOffset, /* HLV_H */ GPR, GPRMemZeroOffset, /* HLV_HU */ GPR, GPRMemZeroOffset, /* HLV_W */ GPR, GPRMemZeroOffset, /* HLV_WU */ GPR, GPRMemZeroOffset, /* HSV_B */ GPR, GPRMemZeroOffset, /* HSV_D */ GPR, GPRMemZeroOffset, /* HSV_H */ GPR, GPRMemZeroOffset, /* HSV_W */ GPR, GPRMemZeroOffset, /* InsnB */ uimm7_opcode, uimm3, AnyReg, AnyReg, simm13_lsb0, /* InsnI */ AnyReg, uimm7_opcode, uimm3, AnyReg, simm12, /* InsnI_Mem */ AnyReg, uimm7_opcode, uimm3, AnyReg, simm12, /* InsnJ */ AnyReg, uimm7_opcode, simm21_lsb0_jal, /* InsnR */ AnyReg, uimm7_opcode, uimm3, uimm7, AnyReg, AnyReg, /* InsnR4 */ AnyReg, uimm7_opcode, uimm3, uimm2, AnyReg, AnyReg, AnyReg, /* InsnS */ uimm7_opcode, uimm3, AnyReg, AnyReg, simm12, /* InsnU */ AnyReg, uimm7_opcode, uimm20_lui, /* JAL */ GPR, simm21_lsb0_jal, /* JALR */ GPR, GPR, simm12, /* LB */ GPR, GPRMem, simm12, /* LBU */ GPR, GPRMem, simm12, /* LD */ GPR, GPRMem, simm12, /* LH */ GPR, GPRMem, simm12, /* LHU */ GPR, GPRMem, simm12, /* LR_D */ GPR, GPRMemZeroOffset, /* LR_D_AQ */ GPR, GPRMemZeroOffset, /* LR_D_AQ_RL */ GPR, GPRMemZeroOffset, /* LR_D_RL */ GPR, GPRMemZeroOffset, /* LR_W */ GPR, GPRMemZeroOffset, /* LR_W_AQ */ GPR, GPRMemZeroOffset, /* LR_W_AQ_RL */ GPR, GPRMemZeroOffset, /* LR_W_RL */ GPR, GPRMemZeroOffset, /* LUI */ GPR, uimm20_lui, /* LW */ GPR, GPRMem, simm12, /* LWU */ GPR, GPRMem, simm12, /* MAX */ GPR, GPR, GPR, /* MAXU */ GPR, GPR, GPR, /* MIN */ GPR, GPR, GPR, /* MINU */ GPR, GPR, GPR, /* MRET */ GPR, GPR, /* MUL */ GPR, GPR, GPR, /* MULH */ GPR, GPR, GPR, /* MULHSU */ GPR, GPR, GPR, /* MULHU */ GPR, GPR, GPR, /* MULW */ GPR, GPR, GPR, /* OR */ GPR, GPR, GPR, /* ORC_B */ GPR, GPR, /* ORI */ GPR, GPR, simm12, /* ORN */ GPR, GPR, GPR, /* PACK */ GPR, GPR, GPR, /* PACKH */ GPR, GPR, GPR, /* PACKW */ GPR, GPR, GPR, /* PREFETCH_I */ GPR, simm12_lsb00000, /* PREFETCH_R */ GPR, simm12_lsb00000, /* PREFETCH_W */ GPR, simm12_lsb00000, /* REM */ GPR, GPR, GPR, /* REMU */ GPR, GPR, GPR, /* REMUW */ GPR, GPR, GPR, /* REMW */ GPR, GPR, GPR, /* REV8_RV32 */ GPR, GPR, /* REV8_RV64 */ GPR, GPR, /* ROL */ GPR, GPR, GPR, /* ROLW */ GPR, GPR, GPR, /* ROR */ GPR, GPR, GPR, /* RORI */ GPR, GPR, uimmlog2xlen, /* RORIW */ GPR, GPR, uimm5, /* RORW */ GPR, GPR, GPR, /* SB */ GPR, GPRMem, simm12, /* SC_D */ GPR, GPRMemZeroOffset, GPR, /* SC_D_AQ */ GPR, GPRMemZeroOffset, GPR, /* SC_D_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* SC_D_RL */ GPR, GPRMemZeroOffset, GPR, /* SC_W */ GPR, GPRMemZeroOffset, GPR, /* SC_W_AQ */ GPR, GPRMemZeroOffset, GPR, /* SC_W_AQ_RL */ GPR, GPRMemZeroOffset, GPR, /* SC_W_RL */ GPR, GPRMemZeroOffset, GPR, /* SD */ GPR, GPRMem, simm12, /* SEXT_B */ GPR, GPR, /* SEXT_H */ GPR, GPR, /* SFENCE_INVAL_IR */ GPR, GPR, /* SFENCE_VMA */ GPR, GPR, /* SFENCE_W_INVAL */ GPR, GPR, /* SH */ GPR, GPRMem, simm12, /* SH1ADD */ GPR, GPR, GPR, /* SH1ADD_UW */ GPR, GPR, GPR, /* SH2ADD */ GPR, GPR, GPR, /* SH2ADD_UW */ GPR, GPR, GPR, /* SH3ADD */ GPR, GPR, GPR, /* SH3ADD_UW */ GPR, GPR, GPR, /* SHA256SIG0 */ GPR, GPR, /* SHA256SIG1 */ GPR, GPR, /* SHA256SUM0 */ GPR, GPR, /* SHA256SUM1 */ GPR, GPR, /* SHA512SIG0 */ GPR, GPR, /* SHA512SIG0H */ GPR, GPR, GPR, /* SHA512SIG0L */ GPR, GPR, GPR, /* SHA512SIG1 */ GPR, GPR, /* SHA512SIG1H */ GPR, GPR, GPR, /* SHA512SIG1L */ GPR, GPR, GPR, /* SHA512SUM0 */ GPR, GPR, /* SHA512SUM0R */ GPR, GPR, GPR, /* SHA512SUM1 */ GPR, GPR, /* SHA512SUM1R */ GPR, GPR, GPR, /* SINVAL_VMA */ GPR, GPR, /* SLL */ GPR, GPR, GPR, /* SLLI */ GPR, GPR, uimmlog2xlen, /* SLLIW */ GPR, GPR, uimm5, /* SLLI_UW */ GPR, GPR, uimmlog2xlen, /* SLLW */ GPR, GPR, GPR, /* SLT */ GPR, GPR, GPR, /* SLTI */ GPR, GPR, simm12, /* SLTIU */ GPR, GPR, simm12, /* SLTU */ GPR, GPR, GPR, /* SM3P0 */ GPR, GPR, /* SM3P1 */ GPR, GPR, /* SM4ED */ GPR, GPR, GPR, byteselect, /* SM4KS */ GPR, GPR, GPR, byteselect, /* SRA */ GPR, GPR, GPR, /* SRAI */ GPR, GPR, uimmlog2xlen, /* SRAIW */ GPR, GPR, uimm5, /* SRAW */ GPR, GPR, GPR, /* SRET */ GPR, GPR, /* SRL */ GPR, GPR, GPR, /* SRLI */ GPR, GPR, uimmlog2xlen, /* SRLIW */ GPR, GPR, uimm5, /* SRLW */ GPR, GPR, GPR, /* SUB */ GPR, GPR, GPR, /* SUBW */ GPR, GPR, GPR, /* SW */ GPR, GPRMem, simm12, /* THVdotVMAQASU_VV */ VR, VR, VR, VMaskOp, /* THVdotVMAQASU_VX */ VR, GPR, VR, VMaskOp, /* THVdotVMAQAUS_VX */ VR, GPR, VR, VMaskOp, /* THVdotVMAQAU_VV */ VR, VR, VR, VMaskOp, /* THVdotVMAQAU_VX */ VR, GPR, VR, VMaskOp, /* THVdotVMAQA_VV */ VR, VR, VR, VMaskOp, /* THVdotVMAQA_VX */ VR, GPR, VR, VMaskOp, /* UNIMP */ /* UNZIP_RV32 */ GPR, GPR, /* URET */ GPR, GPR, /* VAADDU_VV */ VR, VR, VR, VMaskOp, /* VAADDU_VX */ VR, VR, GPR, VMaskOp, /* VAADD_VV */ VR, VR, VR, VMaskOp, /* VAADD_VX */ VR, VR, GPR, VMaskOp, /* VADC_VIM */ VR, VR, simm5, VMV0, /* VADC_VVM */ VR, VR, VR, VMV0, /* VADC_VXM */ VR, VR, GPR, VMV0, /* VADD_VI */ VR, VR, simm5, VMaskOp, /* VADD_VV */ VR, VR, VR, VMaskOp, /* VADD_VX */ VR, VR, GPR, VMaskOp, /* VAND_VI */ VR, VR, simm5, VMaskOp, /* VAND_VV */ VR, VR, VR, VMaskOp, /* VAND_VX */ VR, VR, GPR, VMaskOp, /* VASUBU_VV */ VR, VR, VR, VMaskOp, /* VASUBU_VX */ VR, VR, GPR, VMaskOp, /* VASUB_VV */ VR, VR, VR, VMaskOp, /* VASUB_VX */ VR, VR, GPR, VMaskOp, /* VCOMPRESS_VM */ VR, VR, VR, /* VCPOP_M */ GPR, VR, VMaskOp, /* VDIVU_VV */ VR, VR, VR, VMaskOp, /* VDIVU_VX */ VR, VR, GPR, VMaskOp, /* VDIV_VV */ VR, VR, VR, VMaskOp, /* VDIV_VX */ VR, VR, GPR, VMaskOp, /* VFADD_VF */ VR, VR, FPR32, VMaskOp, /* VFADD_VV */ VR, VR, VR, VMaskOp, /* VFCLASS_V */ VR, VR, VMaskOp, /* VFCVT_F_XU_V */ VR, VR, VMaskOp, /* VFCVT_F_X_V */ VR, VR, VMaskOp, /* VFCVT_RTZ_XU_F_V */ VR, VR, VMaskOp, /* VFCVT_RTZ_X_F_V */ VR, VR, VMaskOp, /* VFCVT_XU_F_V */ VR, VR, VMaskOp, /* VFCVT_X_F_V */ VR, VR, VMaskOp, /* VFDIV_VF */ VR, VR, FPR32, VMaskOp, /* VFDIV_VV */ VR, VR, VR, VMaskOp, /* VFIRST_M */ GPR, VR, VMaskOp, /* VFMACC_VF */ VR, FPR32, VR, VMaskOp, /* VFMACC_VV */ VR, VR, VR, VMaskOp, /* VFMADD_VF */ VR, FPR32, VR, VMaskOp, /* VFMADD_VV */ VR, VR, VR, VMaskOp, /* VFMAX_VF */ VR, VR, FPR32, VMaskOp, /* VFMAX_VV */ VR, VR, VR, VMaskOp, /* VFMERGE_VFM */ VR, VR, FPR32, VMV0, /* VFMIN_VF */ VR, VR, FPR32, VMaskOp, /* VFMIN_VV */ VR, VR, VR, VMaskOp, /* VFMSAC_VF */ VR, FPR32, VR, VMaskOp, /* VFMSAC_VV */ VR, VR, VR, VMaskOp, /* VFMSUB_VF */ VR, FPR32, VR, VMaskOp, /* VFMSUB_VV */ VR, VR, VR, VMaskOp, /* VFMUL_VF */ VR, VR, FPR32, VMaskOp, /* VFMUL_VV */ VR, VR, VR, VMaskOp, /* VFMV_F_S */ FPR32, VR, /* VFMV_S_F */ VR, VR, FPR32, /* VFMV_V_F */ VR, FPR32, /* VFNCVT_F_F_W */ VR, VR, VMaskOp, /* VFNCVT_F_XU_W */ VR, VR, VMaskOp, /* VFNCVT_F_X_W */ VR, VR, VMaskOp, /* VFNCVT_ROD_F_F_W */ VR, VR, VMaskOp, /* VFNCVT_RTZ_XU_F_W */ VR, VR, VMaskOp, /* VFNCVT_RTZ_X_F_W */ VR, VR, VMaskOp, /* VFNCVT_XU_F_W */ VR, VR, VMaskOp, /* VFNCVT_X_F_W */ VR, VR, VMaskOp, /* VFNMACC_VF */ VR, FPR32, VR, VMaskOp, /* VFNMACC_VV */ VR, VR, VR, VMaskOp, /* VFNMADD_VF */ VR, FPR32, VR, VMaskOp, /* VFNMADD_VV */ VR, VR, VR, VMaskOp, /* VFNMSAC_VF */ VR, FPR32, VR, VMaskOp, /* VFNMSAC_VV */ VR, VR, VR, VMaskOp, /* VFNMSUB_VF */ VR, FPR32, VR, VMaskOp, /* VFNMSUB_VV */ VR, VR, VR, VMaskOp, /* VFRDIV_VF */ VR, VR, FPR32, VMaskOp, /* VFREC7_V */ VR, VR, VMaskOp, /* VFREDMAX_VS */ VR, VR, VR, VMaskOp, /* VFREDMIN_VS */ VR, VR, VR, VMaskOp, /* VFREDOSUM_VS */ VR, VR, VR, VMaskOp, /* VFREDUSUM_VS */ VR, VR, VR, VMaskOp, /* VFRSQRT7_V */ VR, VR, VMaskOp, /* VFRSUB_VF */ VR, VR, FPR32, VMaskOp, /* VFSGNJN_VF */ VR, VR, FPR32, VMaskOp, /* VFSGNJN_VV */ VR, VR, VR, VMaskOp, /* VFSGNJX_VF */ VR, VR, FPR32, VMaskOp, /* VFSGNJX_VV */ VR, VR, VR, VMaskOp, /* VFSGNJ_VF */ VR, VR, FPR32, VMaskOp, /* VFSGNJ_VV */ VR, VR, VR, VMaskOp, /* VFSLIDE1DOWN_VF */ VR, VR, FPR32, VMaskOp, /* VFSLIDE1UP_VF */ VR, VR, FPR32, VMaskOp, /* VFSQRT_V */ VR, VR, VMaskOp, /* VFSUB_VF */ VR, VR, FPR32, VMaskOp, /* VFSUB_VV */ VR, VR, VR, VMaskOp, /* VFWADD_VF */ VR, VR, FPR32, VMaskOp, /* VFWADD_VV */ VR, VR, VR, VMaskOp, /* VFWADD_WF */ VR, VR, FPR32, VMaskOp, /* VFWADD_WV */ VR, VR, VR, VMaskOp, /* VFWCVT_F_F_V */ VR, VR, VMaskOp, /* VFWCVT_F_XU_V */ VR, VR, VMaskOp, /* VFWCVT_F_X_V */ VR, VR, VMaskOp, /* VFWCVT_RTZ_XU_F_V */ VR, VR, VMaskOp, /* VFWCVT_RTZ_X_F_V */ VR, VR, VMaskOp, /* VFWCVT_XU_F_V */ VR, VR, VMaskOp, /* VFWCVT_X_F_V */ VR, VR, VMaskOp, /* VFWMACC_VF */ VR, FPR32, VR, VMaskOp, /* VFWMACC_VV */ VR, VR, VR, VMaskOp, /* VFWMSAC_VF */ VR, FPR32, VR, VMaskOp, /* VFWMSAC_VV */ VR, VR, VR, VMaskOp, /* VFWMUL_VF */ VR, VR, FPR32, VMaskOp, /* VFWMUL_VV */ VR, VR, VR, VMaskOp, /* VFWNMACC_VF */ VR, FPR32, VR, VMaskOp, /* VFWNMACC_VV */ VR, VR, VR, VMaskOp, /* VFWNMSAC_VF */ VR, FPR32, VR, VMaskOp, /* VFWNMSAC_VV */ VR, VR, VR, VMaskOp, /* VFWREDOSUM_VS */ VR, VR, VR, VMaskOp, /* VFWREDUSUM_VS */ VR, VR, VR, VMaskOp, /* VFWSUB_VF */ VR, VR, FPR32, VMaskOp, /* VFWSUB_VV */ VR, VR, VR, VMaskOp, /* VFWSUB_WF */ VR, VR, FPR32, VMaskOp, /* VFWSUB_WV */ VR, VR, VR, VMaskOp, /* VID_V */ VR, VMaskOp, /* VIOTA_M */ VR, VR, VMaskOp, /* VL1RE16_V */ VR, GPRMem, /* VL1RE32_V */ VR, GPRMem, /* VL1RE64_V */ VR, GPRMem, /* VL1RE8_V */ VR, GPRMem, /* VL2RE16_V */ VRM2, GPRMem, /* VL2RE32_V */ VRM2, GPRMem, /* VL2RE64_V */ VRM2, GPRMem, /* VL2RE8_V */ VRM2, GPRMem, /* VL4RE16_V */ VRM4, GPRMem, /* VL4RE32_V */ VRM4, GPRMem, /* VL4RE64_V */ VRM4, GPRMem, /* VL4RE8_V */ VRM4, GPRMem, /* VL8RE16_V */ VRM8, GPRMem, /* VL8RE32_V */ VRM8, GPRMem, /* VL8RE64_V */ VRM8, GPRMem, /* VL8RE8_V */ VRM8, GPRMem, /* VLE16FF_V */ VR, GPRMem, VMaskOp, /* VLE16_V */ VR, GPRMem, VMaskOp, /* VLE32FF_V */ VR, GPRMem, VMaskOp, /* VLE32_V */ VR, GPRMem, VMaskOp, /* VLE64FF_V */ VR, GPRMem, VMaskOp, /* VLE64_V */ VR, GPRMem, VMaskOp, /* VLE8FF_V */ VR, GPRMem, VMaskOp, /* VLE8_V */ VR, GPRMem, VMaskOp, /* VLM_V */ VR, GPRMem, /* VLOXEI16_V */ VR, GPRMem, VR, VMaskOp, /* VLOXEI32_V */ VR, GPRMem, VR, VMaskOp, /* VLOXEI64_V */ VR, GPRMem, VR, VMaskOp, /* VLOXEI8_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG2EI16_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG2EI32_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG2EI64_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG2EI8_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG3EI16_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG3EI32_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG3EI64_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG3EI8_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG4EI16_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG4EI32_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG4EI64_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG4EI8_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG5EI16_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG5EI32_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG5EI64_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG5EI8_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG6EI16_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG6EI32_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG6EI64_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG6EI8_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG7EI16_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG7EI32_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG7EI64_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG7EI8_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG8EI16_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG8EI32_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG8EI64_V */ VR, GPRMem, VR, VMaskOp, /* VLOXSEG8EI8_V */ VR, GPRMem, VR, VMaskOp, /* VLSE16_V */ VR, GPRMem, GPR, VMaskOp, /* VLSE32_V */ VR, GPRMem, GPR, VMaskOp, /* VLSE64_V */ VR, GPRMem, GPR, VMaskOp, /* VLSE8_V */ VR, GPRMem, GPR, VMaskOp, /* VLSEG2E16FF_V */ VR, GPRMem, VMaskOp, /* VLSEG2E16_V */ VR, GPRMem, VMaskOp, /* VLSEG2E32FF_V */ VR, GPRMem, VMaskOp, /* VLSEG2E32_V */ VR, GPRMem, VMaskOp, /* VLSEG2E64FF_V */ VR, GPRMem, VMaskOp, /* VLSEG2E64_V */ VR, GPRMem, VMaskOp, /* VLSEG2E8FF_V */ VR, GPRMem, VMaskOp, /* VLSEG2E8_V */ VR, GPRMem, VMaskOp, /* VLSEG3E16FF_V */ VR, GPRMem, VMaskOp, /* VLSEG3E16_V */ VR, GPRMem, VMaskOp, /* VLSEG3E32FF_V */ VR, GPRMem, VMaskOp, /* VLSEG3E32_V */ VR, GPRMem, VMaskOp, /* VLSEG3E64FF_V */ VR, GPRMem, VMaskOp, /* VLSEG3E64_V */ VR, GPRMem, VMaskOp, /* VLSEG3E8FF_V */ VR, GPRMem, VMaskOp, /* VLSEG3E8_V */ VR, GPRMem, VMaskOp, /* VLSEG4E16FF_V */ VR, GPRMem, VMaskOp, /* VLSEG4E16_V */ VR, GPRMem, VMaskOp, /* VLSEG4E32FF_V */ VR, GPRMem, VMaskOp, /* VLSEG4E32_V */ VR, GPRMem, VMaskOp, /* VLSEG4E64FF_V */ VR, GPRMem, VMaskOp, /* VLSEG4E64_V */ VR, GPRMem, VMaskOp, /* VLSEG4E8FF_V */ VR, GPRMem, VMaskOp, /* VLSEG4E8_V */ VR, GPRMem, VMaskOp, /* VLSEG5E16FF_V */ VR, GPRMem, VMaskOp, /* VLSEG5E16_V */ VR, GPRMem, VMaskOp, /* VLSEG5E32FF_V */ VR, GPRMem, VMaskOp, /* VLSEG5E32_V */ VR, GPRMem, VMaskOp, /* VLSEG5E64FF_V */ VR, GPRMem, VMaskOp, /* VLSEG5E64_V */ VR, GPRMem, VMaskOp, /* VLSEG5E8FF_V */ VR, GPRMem, VMaskOp, /* VLSEG5E8_V */ VR, GPRMem, VMaskOp, /* VLSEG6E16FF_V */ VR, GPRMem, VMaskOp, /* VLSEG6E16_V */ VR, GPRMem, VMaskOp, /* VLSEG6E32FF_V */ VR, GPRMem, VMaskOp, /* VLSEG6E32_V */ VR, GPRMem, VMaskOp, /* VLSEG6E64FF_V */ VR, GPRMem, VMaskOp, /* VLSEG6E64_V */ VR, GPRMem, VMaskOp, /* VLSEG6E8FF_V */ VR, GPRMem, VMaskOp, /* VLSEG6E8_V */ VR, GPRMem, VMaskOp, /* VLSEG7E16FF_V */ VR, GPRMem, VMaskOp, /* VLSEG7E16_V */ VR, GPRMem, VMaskOp, /* VLSEG7E32FF_V */ VR, GPRMem, VMaskOp, /* VLSEG7E32_V */ VR, GPRMem, VMaskOp, /* VLSEG7E64FF_V */ VR, GPRMem, VMaskOp, /* VLSEG7E64_V */ VR, GPRMem, VMaskOp, /* VLSEG7E8FF_V */ VR, GPRMem, VMaskOp, /* VLSEG7E8_V */ VR, GPRMem, VMaskOp, /* VLSEG8E16FF_V */ VR, GPRMem, VMaskOp, /* VLSEG8E16_V */ VR, GPRMem, VMaskOp, /* VLSEG8E32FF_V */ VR, GPRMem, VMaskOp, /* VLSEG8E32_V */ VR, GPRMem, VMaskOp, /* VLSEG8E64FF_V */ VR, GPRMem, VMaskOp, /* VLSEG8E64_V */ VR, GPRMem, VMaskOp, /* VLSEG8E8FF_V */ VR, GPRMem, VMaskOp, /* VLSEG8E8_V */ VR, GPRMem, VMaskOp, /* VLSSEG2E16_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG2E32_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG2E64_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG2E8_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG3E16_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG3E32_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG3E64_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG3E8_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG4E16_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG4E32_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG4E64_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG4E8_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG5E16_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG5E32_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG5E64_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG5E8_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG6E16_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG6E32_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG6E64_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG6E8_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG7E16_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG7E32_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG7E64_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG7E8_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG8E16_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG8E32_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG8E64_V */ VR, GPRMem, GPR, VMaskOp, /* VLSSEG8E8_V */ VR, GPRMem, GPR, VMaskOp, /* VLUXEI16_V */ VR, GPRMem, VR, VMaskOp, /* VLUXEI32_V */ VR, GPRMem, VR, VMaskOp, /* VLUXEI64_V */ VR, GPRMem, VR, VMaskOp, /* VLUXEI8_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG2EI16_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG2EI32_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG2EI64_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG2EI8_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG3EI16_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG3EI32_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG3EI64_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG3EI8_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG4EI16_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG4EI32_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG4EI64_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG4EI8_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG5EI16_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG5EI32_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG5EI64_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG5EI8_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG6EI16_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG6EI32_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG6EI64_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG6EI8_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG7EI16_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG7EI32_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG7EI64_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG7EI8_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG8EI16_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG8EI32_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG8EI64_V */ VR, GPRMem, VR, VMaskOp, /* VLUXSEG8EI8_V */ VR, GPRMem, VR, VMaskOp, /* VMACC_VV */ VR, VR, VR, VMaskOp, /* VMACC_VX */ VR, GPR, VR, VMaskOp, /* VMADC_VI */ VR, VR, simm5, /* VMADC_VIM */ VR, VR, simm5, VMV0, /* VMADC_VV */ VR, VR, VR, /* VMADC_VVM */ VR, VR, VR, VMV0, /* VMADC_VX */ VR, VR, GPR, /* VMADC_VXM */ VR, VR, GPR, VMV0, /* VMADD_VV */ VR, VR, VR, VMaskOp, /* VMADD_VX */ VR, GPR, VR, VMaskOp, /* VMANDN_MM */ VR, VR, VR, /* VMAND_MM */ VR, VR, VR, /* VMAXU_VV */ VR, VR, VR, VMaskOp, /* VMAXU_VX */ VR, VR, GPR, VMaskOp, /* VMAX_VV */ VR, VR, VR, VMaskOp, /* VMAX_VX */ VR, VR, GPR, VMaskOp, /* VMERGE_VIM */ VR, VR, simm5, VMV0, /* VMERGE_VVM */ VR, VR, VR, VMV0, /* VMERGE_VXM */ VR, VR, GPR, VMV0, /* VMFEQ_VF */ VR, VR, FPR32, VMaskOp, /* VMFEQ_VV */ VR, VR, VR, VMaskOp, /* VMFGE_VF */ VR, VR, FPR32, VMaskOp, /* VMFGT_VF */ VR, VR, FPR32, VMaskOp, /* VMFLE_VF */ VR, VR, FPR32, VMaskOp, /* VMFLE_VV */ VR, VR, VR, VMaskOp, /* VMFLT_VF */ VR, VR, FPR32, VMaskOp, /* VMFLT_VV */ VR, VR, VR, VMaskOp, /* VMFNE_VF */ VR, VR, FPR32, VMaskOp, /* VMFNE_VV */ VR, VR, VR, VMaskOp, /* VMINU_VV */ VR, VR, VR, VMaskOp, /* VMINU_VX */ VR, VR, GPR, VMaskOp, /* VMIN_VV */ VR, VR, VR, VMaskOp, /* VMIN_VX */ VR, VR, GPR, VMaskOp, /* VMNAND_MM */ VR, VR, VR, /* VMNOR_MM */ VR, VR, VR, /* VMORN_MM */ VR, VR, VR, /* VMOR_MM */ VR, VR, VR, /* VMSBC_VV */ VR, VR, VR, /* VMSBC_VVM */ VR, VR, VR, VMV0, /* VMSBC_VX */ VR, VR, GPR, /* VMSBC_VXM */ VR, VR, GPR, VMV0, /* VMSBF_M */ VR, VR, VMaskOp, /* VMSEQ_VI */ VR, VR, simm5, VMaskOp, /* VMSEQ_VV */ VR, VR, VR, VMaskOp, /* VMSEQ_VX */ VR, VR, GPR, VMaskOp, /* VMSGTU_VI */ VR, VR, simm5, VMaskOp, /* VMSGTU_VX */ VR, VR, GPR, VMaskOp, /* VMSGT_VI */ VR, VR, simm5, VMaskOp, /* VMSGT_VX */ VR, VR, GPR, VMaskOp, /* VMSIF_M */ VR, VR, VMaskOp, /* VMSLEU_VI */ VR, VR, simm5, VMaskOp, /* VMSLEU_VV */ VR, VR, VR, VMaskOp, /* VMSLEU_VX */ VR, VR, GPR, VMaskOp, /* VMSLE_VI */ VR, VR, simm5, VMaskOp, /* VMSLE_VV */ VR, VR, VR, VMaskOp, /* VMSLE_VX */ VR, VR, GPR, VMaskOp, /* VMSLTU_VV */ VR, VR, VR, VMaskOp, /* VMSLTU_VX */ VR, VR, GPR, VMaskOp, /* VMSLT_VV */ VR, VR, VR, VMaskOp, /* VMSLT_VX */ VR, VR, GPR, VMaskOp, /* VMSNE_VI */ VR, VR, simm5, VMaskOp, /* VMSNE_VV */ VR, VR, VR, VMaskOp, /* VMSNE_VX */ VR, VR, GPR, VMaskOp, /* VMSOF_M */ VR, VR, VMaskOp, /* VMULHSU_VV */ VR, VR, VR, VMaskOp, /* VMULHSU_VX */ VR, VR, GPR, VMaskOp, /* VMULHU_VV */ VR, VR, VR, VMaskOp, /* VMULHU_VX */ VR, VR, GPR, VMaskOp, /* VMULH_VV */ VR, VR, VR, VMaskOp, /* VMULH_VX */ VR, VR, GPR, VMaskOp, /* VMUL_VV */ VR, VR, VR, VMaskOp, /* VMUL_VX */ VR, VR, GPR, VMaskOp, /* VMV1R_V */ VR, VR, /* VMV2R_V */ VRM2, VRM2, /* VMV4R_V */ VRM4, VRM4, /* VMV8R_V */ VRM8, VRM8, /* VMV_S_X */ VR, VR, GPR, /* VMV_V_I */ VR, simm5, /* VMV_V_V */ VR, VR, /* VMV_V_X */ VR, GPR, /* VMV_X_S */ GPR, VR, /* VMXNOR_MM */ VR, VR, VR, /* VMXOR_MM */ VR, VR, VR, /* VNCLIPU_WI */ VR, VR, uimm5, VMaskOp, /* VNCLIPU_WV */ VR, VR, VR, VMaskOp, /* VNCLIPU_WX */ VR, VR, GPR, VMaskOp, /* VNCLIP_WI */ VR, VR, uimm5, VMaskOp, /* VNCLIP_WV */ VR, VR, VR, VMaskOp, /* VNCLIP_WX */ VR, VR, GPR, VMaskOp, /* VNMSAC_VV */ VR, VR, VR, VMaskOp, /* VNMSAC_VX */ VR, GPR, VR, VMaskOp, /* VNMSUB_VV */ VR, VR, VR, VMaskOp, /* VNMSUB_VX */ VR, GPR, VR, VMaskOp, /* VNSRA_WI */ VR, VR, uimm5, VMaskOp, /* VNSRA_WV */ VR, VR, VR, VMaskOp, /* VNSRA_WX */ VR, VR, GPR, VMaskOp, /* VNSRL_WI */ VR, VR, uimm5, VMaskOp, /* VNSRL_WV */ VR, VR, VR, VMaskOp, /* VNSRL_WX */ VR, VR, GPR, VMaskOp, /* VOR_VI */ VR, VR, simm5, VMaskOp, /* VOR_VV */ VR, VR, VR, VMaskOp, /* VOR_VX */ VR, VR, GPR, VMaskOp, /* VREDAND_VS */ VR, VR, VR, VMaskOp, /* VREDMAXU_VS */ VR, VR, VR, VMaskOp, /* VREDMAX_VS */ VR, VR, VR, VMaskOp, /* VREDMINU_VS */ VR, VR, VR, VMaskOp, /* VREDMIN_VS */ VR, VR, VR, VMaskOp, /* VREDOR_VS */ VR, VR, VR, VMaskOp, /* VREDSUM_VS */ VR, VR, VR, VMaskOp, /* VREDXOR_VS */ VR, VR, VR, VMaskOp, /* VREMU_VV */ VR, VR, VR, VMaskOp, /* VREMU_VX */ VR, VR, GPR, VMaskOp, /* VREM_VV */ VR, VR, VR, VMaskOp, /* VREM_VX */ VR, VR, GPR, VMaskOp, /* VRGATHEREI16_VV */ VR, VR, VR, VMaskOp, /* VRGATHER_VI */ VR, VR, uimm5, VMaskOp, /* VRGATHER_VV */ VR, VR, VR, VMaskOp, /* VRGATHER_VX */ VR, VR, GPR, VMaskOp, /* VRSUB_VI */ VR, VR, simm5, VMaskOp, /* VRSUB_VX */ VR, VR, GPR, VMaskOp, /* VS1R_V */ VR, GPRMem, /* VS2R_V */ VRM2, GPRMem, /* VS4R_V */ VRM4, GPRMem, /* VS8R_V */ VRM8, GPRMem, /* VSADDU_VI */ VR, VR, simm5, VMaskOp, /* VSADDU_VV */ VR, VR, VR, VMaskOp, /* VSADDU_VX */ VR, VR, GPR, VMaskOp, /* VSADD_VI */ VR, VR, simm5, VMaskOp, /* VSADD_VV */ VR, VR, VR, VMaskOp, /* VSADD_VX */ VR, VR, GPR, VMaskOp, /* VSBC_VVM */ VR, VR, VR, VMV0, /* VSBC_VXM */ VR, VR, GPR, VMV0, /* VSE16_V */ VR, GPRMem, VMaskOp, /* VSE32_V */ VR, GPRMem, VMaskOp, /* VSE64_V */ VR, GPRMem, VMaskOp, /* VSE8_V */ VR, GPRMem, VMaskOp, /* VSETIVLI */ GPR, uimm5, VTypeIOp10, /* VSETVL */ GPR, GPR, GPR, /* VSETVLI */ GPR, GPR, VTypeIOp11, /* VSEXT_VF2 */ VR, VR, VMaskOp, /* VSEXT_VF4 */ VR, VR, VMaskOp, /* VSEXT_VF8 */ VR, VR, VMaskOp, /* VSLIDE1DOWN_VX */ VR, VR, GPR, VMaskOp, /* VSLIDE1UP_VX */ VR, VR, GPR, VMaskOp, /* VSLIDEDOWN_VI */ VR, VR, uimm5, VMaskOp, /* VSLIDEDOWN_VX */ VR, VR, GPR, VMaskOp, /* VSLIDEUP_VI */ VR, VR, uimm5, VMaskOp, /* VSLIDEUP_VX */ VR, VR, GPR, VMaskOp, /* VSLL_VI */ VR, VR, uimm5, VMaskOp, /* VSLL_VV */ VR, VR, VR, VMaskOp, /* VSLL_VX */ VR, VR, GPR, VMaskOp, /* VSMUL_VV */ VR, VR, VR, VMaskOp, /* VSMUL_VX */ VR, VR, GPR, VMaskOp, /* VSM_V */ VR, GPRMem, /* VSOXEI16_V */ VR, GPRMem, VR, VMaskOp, /* VSOXEI32_V */ VR, GPRMem, VR, VMaskOp, /* VSOXEI64_V */ VR, GPRMem, VR, VMaskOp, /* VSOXEI8_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG2EI16_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG2EI32_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG2EI64_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG2EI8_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG3EI16_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG3EI32_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG3EI64_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG3EI8_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG4EI16_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG4EI32_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG4EI64_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG4EI8_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG5EI16_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG5EI32_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG5EI64_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG5EI8_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG6EI16_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG6EI32_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG6EI64_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG6EI8_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG7EI16_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG7EI32_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG7EI64_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG7EI8_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG8EI16_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG8EI32_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG8EI64_V */ VR, GPRMem, VR, VMaskOp, /* VSOXSEG8EI8_V */ VR, GPRMem, VR, VMaskOp, /* VSRA_VI */ VR, VR, uimm5, VMaskOp, /* VSRA_VV */ VR, VR, VR, VMaskOp, /* VSRA_VX */ VR, VR, GPR, VMaskOp, /* VSRL_VI */ VR, VR, uimm5, VMaskOp, /* VSRL_VV */ VR, VR, VR, VMaskOp, /* VSRL_VX */ VR, VR, GPR, VMaskOp, /* VSSE16_V */ VR, GPRMem, GPR, VMaskOp, /* VSSE32_V */ VR, GPRMem, GPR, VMaskOp, /* VSSE64_V */ VR, GPRMem, GPR, VMaskOp, /* VSSE8_V */ VR, GPRMem, GPR, VMaskOp, /* VSSEG2E16_V */ VR, GPRMem, VMaskOp, /* VSSEG2E32_V */ VR, GPRMem, VMaskOp, /* VSSEG2E64_V */ VR, GPRMem, VMaskOp, /* VSSEG2E8_V */ VR, GPRMem, VMaskOp, /* VSSEG3E16_V */ VR, GPRMem, VMaskOp, /* VSSEG3E32_V */ VR, GPRMem, VMaskOp, /* VSSEG3E64_V */ VR, GPRMem, VMaskOp, /* VSSEG3E8_V */ VR, GPRMem, VMaskOp, /* VSSEG4E16_V */ VR, GPRMem, VMaskOp, /* VSSEG4E32_V */ VR, GPRMem, VMaskOp, /* VSSEG4E64_V */ VR, GPRMem, VMaskOp, /* VSSEG4E8_V */ VR, GPRMem, VMaskOp, /* VSSEG5E16_V */ VR, GPRMem, VMaskOp, /* VSSEG5E32_V */ VR, GPRMem, VMaskOp, /* VSSEG5E64_V */ VR, GPRMem, VMaskOp, /* VSSEG5E8_V */ VR, GPRMem, VMaskOp, /* VSSEG6E16_V */ VR, GPRMem, VMaskOp, /* VSSEG6E32_V */ VR, GPRMem, VMaskOp, /* VSSEG6E64_V */ VR, GPRMem, VMaskOp, /* VSSEG6E8_V */ VR, GPRMem, VMaskOp, /* VSSEG7E16_V */ VR, GPRMem, VMaskOp, /* VSSEG7E32_V */ VR, GPRMem, VMaskOp, /* VSSEG7E64_V */ VR, GPRMem, VMaskOp, /* VSSEG7E8_V */ VR, GPRMem, VMaskOp, /* VSSEG8E16_V */ VR, GPRMem, VMaskOp, /* VSSEG8E32_V */ VR, GPRMem, VMaskOp, /* VSSEG8E64_V */ VR, GPRMem, VMaskOp, /* VSSEG8E8_V */ VR, GPRMem, VMaskOp, /* VSSRA_VI */ VR, VR, uimm5, VMaskOp, /* VSSRA_VV */ VR, VR, VR, VMaskOp, /* VSSRA_VX */ VR, VR, GPR, VMaskOp, /* VSSRL_VI */ VR, VR, uimm5, VMaskOp, /* VSSRL_VV */ VR, VR, VR, VMaskOp, /* VSSRL_VX */ VR, VR, GPR, VMaskOp, /* VSSSEG2E16_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG2E32_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG2E64_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG2E8_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG3E16_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG3E32_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG3E64_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG3E8_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG4E16_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG4E32_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG4E64_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG4E8_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG5E16_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG5E32_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG5E64_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG5E8_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG6E16_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG6E32_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG6E64_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG6E8_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG7E16_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG7E32_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG7E64_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG7E8_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG8E16_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG8E32_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG8E64_V */ VR, GPRMem, GPR, VMaskOp, /* VSSSEG8E8_V */ VR, GPRMem, GPR, VMaskOp, /* VSSUBU_VV */ VR, VR, VR, VMaskOp, /* VSSUBU_VX */ VR, VR, GPR, VMaskOp, /* VSSUB_VV */ VR, VR, VR, VMaskOp, /* VSSUB_VX */ VR, VR, GPR, VMaskOp, /* VSUB_VV */ VR, VR, VR, VMaskOp, /* VSUB_VX */ VR, VR, GPR, VMaskOp, /* VSUXEI16_V */ VR, GPRMem, VR, VMaskOp, /* VSUXEI32_V */ VR, GPRMem, VR, VMaskOp, /* VSUXEI64_V */ VR, GPRMem, VR, VMaskOp, /* VSUXEI8_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG2EI16_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG2EI32_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG2EI64_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG2EI8_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG3EI16_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG3EI32_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG3EI64_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG3EI8_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG4EI16_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG4EI32_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG4EI64_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG4EI8_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG5EI16_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG5EI32_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG5EI64_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG5EI8_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG6EI16_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG6EI32_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG6EI64_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG6EI8_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG7EI16_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG7EI32_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG7EI64_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG7EI8_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG8EI16_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG8EI32_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG8EI64_V */ VR, GPRMem, VR, VMaskOp, /* VSUXSEG8EI8_V */ VR, GPRMem, VR, VMaskOp, /* VT_MASKC */ GPR, GPR, GPR, /* VT_MASKCN */ GPR, GPR, GPR, /* VWADDU_VV */ VR, VR, VR, VMaskOp, /* VWADDU_VX */ VR, VR, GPR, VMaskOp, /* VWADDU_WV */ VR, VR, VR, VMaskOp, /* VWADDU_WX */ VR, VR, GPR, VMaskOp, /* VWADD_VV */ VR, VR, VR, VMaskOp, /* VWADD_VX */ VR, VR, GPR, VMaskOp, /* VWADD_WV */ VR, VR, VR, VMaskOp, /* VWADD_WX */ VR, VR, GPR, VMaskOp, /* VWMACCSU_VV */ VR, VR, VR, VMaskOp, /* VWMACCSU_VX */ VR, GPR, VR, VMaskOp, /* VWMACCUS_VX */ VR, GPR, VR, VMaskOp, /* VWMACCU_VV */ VR, VR, VR, VMaskOp, /* VWMACCU_VX */ VR, GPR, VR, VMaskOp, /* VWMACC_VV */ VR, VR, VR, VMaskOp, /* VWMACC_VX */ VR, GPR, VR, VMaskOp, /* VWMULSU_VV */ VR, VR, VR, VMaskOp, /* VWMULSU_VX */ VR, VR, GPR, VMaskOp, /* VWMULU_VV */ VR, VR, VR, VMaskOp, /* VWMULU_VX */ VR, VR, GPR, VMaskOp, /* VWMUL_VV */ VR, VR, VR, VMaskOp, /* VWMUL_VX */ VR, VR, GPR, VMaskOp, /* VWREDSUMU_VS */ VR, VR, VR, VMaskOp, /* VWREDSUM_VS */ VR, VR, VR, VMaskOp, /* VWSUBU_VV */ VR, VR, VR, VMaskOp, /* VWSUBU_VX */ VR, VR, GPR, VMaskOp, /* VWSUBU_WV */ VR, VR, VR, VMaskOp, /* VWSUBU_WX */ VR, VR, GPR, VMaskOp, /* VWSUB_VV */ VR, VR, VR, VMaskOp, /* VWSUB_VX */ VR, VR, GPR, VMaskOp, /* VWSUB_WV */ VR, VR, VR, VMaskOp, /* VWSUB_WX */ VR, VR, GPR, VMaskOp, /* VXOR_VI */ VR, VR, simm5, VMaskOp, /* VXOR_VV */ VR, VR, VR, VMaskOp, /* VXOR_VX */ VR, VR, GPR, VMaskOp, /* VZEXT_VF2 */ VR, VR, VMaskOp, /* VZEXT_VF4 */ VR, VR, VMaskOp, /* VZEXT_VF8 */ VR, VR, VMaskOp, /* WFI */ GPR, GPR, /* WRS_NTO */ /* WRS_STO */ /* XNOR */ GPR, GPR, GPR, /* XOR */ GPR, GPR, GPR, /* XORI */ GPR, GPR, simm12, /* XPERM4 */ GPR, GPR, GPR, /* XPERM8 */ GPR, GPR, GPR, /* ZEXT_H_RV32 */ GPR, GPR, /* ZEXT_H_RV64 */ GPR, GPR, /* ZIP_RV32 */ GPR, GPR, }; return OpcodeOperandTypes[Offsets[Opcode] + OpIdx]; } } // end namespace RISCV } // end namespace llvm #endif // GET_INSTRINFO_OPERAND_TYPE #ifdef GET_INSTRINFO_MEM_OPERAND_SIZE #undef GET_INSTRINFO_MEM_OPERAND_SIZE namespace llvm { namespace RISCV { LLVM_READONLY static int getMemOperandSize(int OpType) { switch (OpType) { default: return 0; } } } // end namespace RISCV } // end namespace llvm #endif // GET_INSTRINFO_MEM_OPERAND_SIZE #ifdef GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP #undef GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP namespace llvm { namespace RISCV { LLVM_READONLY static unsigned getLogicalOperandSize(uint16_t Opcode, uint16_t LogicalOpIdx) { return LogicalOpIdx; } LLVM_READONLY static inline unsigned getLogicalOperandIdx(uint16_t Opcode, uint16_t LogicalOpIdx) { auto S = 0U; for (auto i = 0U; i < LogicalOpIdx; ++i) S += getLogicalOperandSize(Opcode, i); return S; } } // end namespace RISCV } // end namespace llvm #endif // GET_INSTRINFO_LOGICAL_OPERAND_SIZE_MAP #ifdef GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP #undef GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP namespace llvm { namespace RISCV { LLVM_READONLY static int getLogicalOperandType(uint16_t Opcode, uint16_t LogicalOpIdx) { return -1; } } // end namespace RISCV } // end namespace llvm #endif // GET_INSTRINFO_LOGICAL_OPERAND_TYPE_MAP #ifdef GET_INSTRINFO_MC_HELPER_DECLS #undef GET_INSTRINFO_MC_HELPER_DECLS namespace llvm { class MCInst; class FeatureBitset; namespace RISCV_MC { void verifyInstructionPredicates(unsigned Opcode, const FeatureBitset &Features); } // end namespace RISCV_MC } // end namespace llvm #endif // GET_INSTRINFO_MC_HELPER_DECLS #ifdef GET_INSTRINFO_MC_HELPERS #undef GET_INSTRINFO_MC_HELPERS namespace llvm { namespace RISCV_MC { } // end namespace RISCV_MC } // end namespace llvm #endif // GET_GENISTRINFO_MC_HELPERS #ifdef ENABLE_INSTR_PREDICATE_VERIFIER #undef ENABLE_INSTR_PREDICATE_VERIFIER #include namespace llvm { namespace RISCV_MC { // Bits for subtarget features that participate in instruction matching. enum SubtargetFeatureBits : uint8_t { Feature_HasStdExtMBit = 9, Feature_HasStdExtMOrZmmulBit = 10, Feature_HasStdExtABit = 1, Feature_HasStdExtFBit = 7, Feature_HasStdExtDBit = 6, Feature_HasStdExtHBit = 8, Feature_HasStdExtZihintpauseBit = 34, Feature_HasStdExtZihintntlBit = 33, Feature_HasStdExtZfhminBit = 25, Feature_HasStdExtZfhBit = 23, Feature_HasStdExtZfhOrZfhminBit = 24, Feature_HasStdExtZfinxBit = 26, Feature_HasStdExtZdinxBit = 22, Feature_HasStdExtZhinxminBit = 29, Feature_HasStdExtZhinxBit = 27, Feature_HasStdExtZhinxOrZhinxminBit = 28, Feature_HasStdExtCBit = 2, Feature_HasStdExtZbaBit = 13, Feature_HasStdExtZbbBit = 14, Feature_HasStdExtZbcBit = 16, Feature_HasStdExtZbsBit = 21, Feature_HasStdExtZbkbBit = 18, Feature_HasStdExtZbkxBit = 20, Feature_HasStdExtZbbOrZbkbBit = 15, Feature_HasStdExtZbkcBit = 19, Feature_HasStdExtZbcOrZbkcBit = 17, Feature_HasStdExtZkndBit = 35, Feature_HasStdExtZkneBit = 37, Feature_HasStdExtZkndOrZkneBit = 36, Feature_HasStdExtZknhBit = 38, Feature_HasStdExtZksedBit = 40, Feature_HasStdExtZkshBit = 41, Feature_HasStdExtZkrBit = 39, Feature_HasStdExtCOrZcaBit = 3, Feature_HasStdExtCOrZcdBit = 4, Feature_HasStdExtCOrZcfBit = 5, Feature_HasRVCHintsBit = 0, Feature_HasVInstructionsBit = 43, Feature_HasVInstructionsI64Bit = 45, Feature_HasVInstructionsAnyFBit = 44, Feature_HasStdExtZicbomBit = 30, Feature_HasStdExtZicbozBit = 32, Feature_HasStdExtZicbopBit = 31, Feature_HasStdExtSvinvalBit = 11, Feature_HasStdExtZtsoBit = 42, Feature_HasStdExtZawrsBit = 12, Feature_HasVendorXVentanaCondOpsBit = 47, Feature_HasVendorXTHeadVdotBit = 46, Feature_IsRV64Bit = 50, Feature_IsRV32Bit = 48, Feature_IsRV32EBit = 49, }; #ifndef NDEBUG static const char *SubtargetFeatureNames[] = { "Feature_HasRVCHints", "Feature_HasStdExtA", "Feature_HasStdExtC", "Feature_HasStdExtCOrZca", "Feature_HasStdExtCOrZcd", "Feature_HasStdExtCOrZcf", "Feature_HasStdExtD", "Feature_HasStdExtF", "Feature_HasStdExtH", "Feature_HasStdExtM", "Feature_HasStdExtMOrZmmul", "Feature_HasStdExtSvinval", "Feature_HasStdExtZawrs", "Feature_HasStdExtZba", "Feature_HasStdExtZbb", "Feature_HasStdExtZbbOrZbkb", "Feature_HasStdExtZbc", "Feature_HasStdExtZbcOrZbkc", "Feature_HasStdExtZbkb", "Feature_HasStdExtZbkc", "Feature_HasStdExtZbkx", "Feature_HasStdExtZbs", "Feature_HasStdExtZdinx", "Feature_HasStdExtZfh", "Feature_HasStdExtZfhOrZfhmin", "Feature_HasStdExtZfhmin", "Feature_HasStdExtZfinx", "Feature_HasStdExtZhinx", "Feature_HasStdExtZhinxOrZhinxmin", "Feature_HasStdExtZhinxmin", "Feature_HasStdExtZicbom", "Feature_HasStdExtZicbop", "Feature_HasStdExtZicboz", "Feature_HasStdExtZihintntl", "Feature_HasStdExtZihintpause", "Feature_HasStdExtZknd", "Feature_HasStdExtZkndOrZkne", "Feature_HasStdExtZkne", "Feature_HasStdExtZknh", "Feature_HasStdExtZkr", "Feature_HasStdExtZksed", "Feature_HasStdExtZksh", "Feature_HasStdExtZtso", "Feature_HasVInstructions", "Feature_HasVInstructionsAnyF", "Feature_HasVInstructionsI64", "Feature_HasVendorXTHeadVdot", "Feature_HasVendorXVentanaCondOps", "Feature_IsRV32", "Feature_IsRV32E", "Feature_IsRV64", nullptr }; #endif // NDEBUG FeatureBitset computeAvailableFeatures(const FeatureBitset &FB) { FeatureBitset Features; if (FB[RISCV::FeatureStdExtM]) Features.set(Feature_HasStdExtMBit); if (FB[RISCV::FeatureStdExtM] || FB[RISCV::FeatureStdExtZmmul]) Features.set(Feature_HasStdExtMOrZmmulBit); if (FB[RISCV::FeatureStdExtA]) Features.set(Feature_HasStdExtABit); if (FB[RISCV::FeatureStdExtF]) Features.set(Feature_HasStdExtFBit); if (FB[RISCV::FeatureStdExtD]) Features.set(Feature_HasStdExtDBit); if (FB[RISCV::FeatureStdExtH]) Features.set(Feature_HasStdExtHBit); if (FB[RISCV::FeatureStdExtZihintpause]) Features.set(Feature_HasStdExtZihintpauseBit); if (FB[RISCV::FeatureStdExtZihintntl]) Features.set(Feature_HasStdExtZihintntlBit); if (FB[RISCV::FeatureStdExtZfhmin]) Features.set(Feature_HasStdExtZfhminBit); if (FB[RISCV::FeatureStdExtZfh]) Features.set(Feature_HasStdExtZfhBit); if (FB[RISCV::FeatureStdExtZfh] || FB[RISCV::FeatureStdExtZfhmin]) Features.set(Feature_HasStdExtZfhOrZfhminBit); if (FB[RISCV::FeatureStdExtZfinx]) Features.set(Feature_HasStdExtZfinxBit); if (FB[RISCV::FeatureStdExtZdinx]) Features.set(Feature_HasStdExtZdinxBit); if (FB[RISCV::FeatureStdExtZhinxmin]) Features.set(Feature_HasStdExtZhinxminBit); if (FB[RISCV::FeatureStdExtZhinx]) Features.set(Feature_HasStdExtZhinxBit); if (FB[RISCV::FeatureStdExtZhinx] || FB[RISCV::FeatureStdExtZhinxmin]) Features.set(Feature_HasStdExtZhinxOrZhinxminBit); if (FB[RISCV::FeatureStdExtC]) Features.set(Feature_HasStdExtCBit); if (FB[RISCV::FeatureStdExtZba]) Features.set(Feature_HasStdExtZbaBit); if (FB[RISCV::FeatureStdExtZbb]) Features.set(Feature_HasStdExtZbbBit); if (FB[RISCV::FeatureStdExtZbc]) Features.set(Feature_HasStdExtZbcBit); if (FB[RISCV::FeatureStdExtZbs]) Features.set(Feature_HasStdExtZbsBit); if (FB[RISCV::FeatureStdExtZbkb]) Features.set(Feature_HasStdExtZbkbBit); if (FB[RISCV::FeatureStdExtZbkx]) Features.set(Feature_HasStdExtZbkxBit); if (FB[RISCV::FeatureStdExtZbb] || FB[RISCV::FeatureStdExtZbkb]) Features.set(Feature_HasStdExtZbbOrZbkbBit); if (FB[RISCV::FeatureStdExtZbkc]) Features.set(Feature_HasStdExtZbkcBit); if (FB[RISCV::FeatureStdExtZbc] || FB[RISCV::FeatureStdExtZbkc]) Features.set(Feature_HasStdExtZbcOrZbkcBit); if (FB[RISCV::FeatureStdExtZknd]) Features.set(Feature_HasStdExtZkndBit); if (FB[RISCV::FeatureStdExtZkne]) Features.set(Feature_HasStdExtZkneBit); if (FB[RISCV::FeatureStdExtZknd] || FB[RISCV::FeatureStdExtZkne]) Features.set(Feature_HasStdExtZkndOrZkneBit); if (FB[RISCV::FeatureStdExtZknh]) Features.set(Feature_HasStdExtZknhBit); if (FB[RISCV::FeatureStdExtZksed]) Features.set(Feature_HasStdExtZksedBit); if (FB[RISCV::FeatureStdExtZksh]) Features.set(Feature_HasStdExtZkshBit); if (FB[RISCV::FeatureStdExtZkr]) Features.set(Feature_HasStdExtZkrBit); if (FB[RISCV::FeatureStdExtC] || FB[RISCV::FeatureExtZca]) Features.set(Feature_HasStdExtCOrZcaBit); if (FB[RISCV::FeatureStdExtC] || FB[RISCV::FeatureExtZcd]) Features.set(Feature_HasStdExtCOrZcdBit); if (FB[RISCV::FeatureStdExtC] || FB[RISCV::FeatureExtZcf]) Features.set(Feature_HasStdExtCOrZcfBit); if (!FB[RISCV::FeatureNoRVCHints]) Features.set(Feature_HasRVCHintsBit); if (FB[RISCV::FeatureStdExtZve32x]) Features.set(Feature_HasVInstructionsBit); if (FB[RISCV::FeatureStdExtZve64x]) Features.set(Feature_HasVInstructionsI64Bit); if (FB[RISCV::FeatureStdExtZve32f]) Features.set(Feature_HasVInstructionsAnyFBit); if (FB[RISCV::FeatureStdExtZicbom]) Features.set(Feature_HasStdExtZicbomBit); if (FB[RISCV::FeatureStdExtZicboz]) Features.set(Feature_HasStdExtZicbozBit); if (FB[RISCV::FeatureStdExtZicbop]) Features.set(Feature_HasStdExtZicbopBit); if (FB[RISCV::FeatureStdExtSvinval]) Features.set(Feature_HasStdExtSvinvalBit); if (FB[RISCV::FeatureStdExtZtso]) Features.set(Feature_HasStdExtZtsoBit); if (FB[RISCV::FeatureStdExtZawrs]) Features.set(Feature_HasStdExtZawrsBit); if (FB[RISCV::FeatureVendorXVentanaCondOps]) Features.set(Feature_HasVendorXVentanaCondOpsBit); if (FB[RISCV::FeatureVendorXTHeadVdot]) Features.set(Feature_HasVendorXTHeadVdotBit); if (FB[RISCV::Feature64Bit]) Features.set(Feature_IsRV64Bit); if (!FB[RISCV::Feature64Bit]) Features.set(Feature_IsRV32Bit); if (FB[RISCV::FeatureRV32E]) Features.set(Feature_IsRV32EBit); return Features; } #ifndef NDEBUG // Feature bitsets. enum : uint8_t { CEFBS_None, CEFBS_HasStdExtA, CEFBS_HasStdExtCOrZca, CEFBS_HasStdExtD, CEFBS_HasStdExtF, CEFBS_HasStdExtH, CEFBS_HasStdExtM, CEFBS_HasStdExtMOrZmmul, CEFBS_HasStdExtSvinval, CEFBS_HasStdExtZawrs, CEFBS_HasStdExtZba, CEFBS_HasStdExtZbb, CEFBS_HasStdExtZbbOrZbkb, CEFBS_HasStdExtZbc, CEFBS_HasStdExtZbcOrZbkc, CEFBS_HasStdExtZbkb, CEFBS_HasStdExtZbkx, CEFBS_HasStdExtZbs, CEFBS_HasStdExtZfh, CEFBS_HasStdExtZfhOrZfhmin, CEFBS_HasStdExtZfinx, CEFBS_HasStdExtZhinx, CEFBS_HasStdExtZhinxOrZhinxmin, CEFBS_HasStdExtZicbom, CEFBS_HasStdExtZicbop, CEFBS_HasStdExtZicboz, CEFBS_HasStdExtZknh, CEFBS_HasStdExtZksed, CEFBS_HasStdExtZksh, CEFBS_HasVInstructions, CEFBS_HasVInstructionsAnyF, CEFBS_HasVInstructionsI64, CEFBS_HasVendorXTHeadVdot, CEFBS_IsRV32, CEFBS_IsRV64, CEFBS_HasStdExtA_IsRV64, CEFBS_HasStdExtCOrZca_HasRVCHints, CEFBS_HasStdExtCOrZca_IsRV32, CEFBS_HasStdExtCOrZca_IsRV64, CEFBS_HasStdExtCOrZcd_HasStdExtD, CEFBS_HasStdExtD_IsRV64, CEFBS_HasStdExtF_IsRV64, CEFBS_HasStdExtM_IsRV64, CEFBS_HasStdExtMOrZmmul_IsRV64, CEFBS_HasStdExtZba_IsRV64, CEFBS_HasStdExtZbb_IsRV32, CEFBS_HasStdExtZbb_IsRV64, CEFBS_HasStdExtZbbOrZbkb_IsRV32, CEFBS_HasStdExtZbbOrZbkb_IsRV64, CEFBS_HasStdExtZbkb_IsRV32, CEFBS_HasStdExtZbkb_IsRV64, CEFBS_HasStdExtZdinx_IsRV32, CEFBS_HasStdExtZdinx_IsRV64, CEFBS_HasStdExtZfh_IsRV64, CEFBS_HasStdExtZfhOrZfhmin_HasStdExtD, CEFBS_HasStdExtZfinx_IsRV64, CEFBS_HasStdExtZhinx_IsRV64, CEFBS_HasStdExtZhinxOrZhinxmin_HasStdExtZdinx, CEFBS_HasStdExtZknd_IsRV32, CEFBS_HasStdExtZknd_IsRV64, CEFBS_HasStdExtZkndOrZkne_IsRV64, CEFBS_HasStdExtZkne_IsRV32, CEFBS_HasStdExtZkne_IsRV64, CEFBS_HasStdExtZknh_IsRV32, CEFBS_HasStdExtZknh_IsRV64, CEFBS_HasVInstructionsI64_IsRV64, CEFBS_IsRV64_HasStdExtH, CEFBS_IsRV64_HasVInstructionsI64, CEFBS_IsRV64_HasVendorXVentanaCondOps, CEFBS_HasStdExtCOrZcf_HasStdExtF_IsRV32, }; static constexpr FeatureBitset FeatureBitsets[] = { {}, // CEFBS_None {Feature_HasStdExtABit, }, {Feature_HasStdExtCOrZcaBit, }, {Feature_HasStdExtDBit, }, {Feature_HasStdExtFBit, }, {Feature_HasStdExtHBit, }, {Feature_HasStdExtMBit, }, {Feature_HasStdExtMOrZmmulBit, }, {Feature_HasStdExtSvinvalBit, }, {Feature_HasStdExtZawrsBit, }, {Feature_HasStdExtZbaBit, }, {Feature_HasStdExtZbbBit, }, {Feature_HasStdExtZbbOrZbkbBit, }, {Feature_HasStdExtZbcBit, }, {Feature_HasStdExtZbcOrZbkcBit, }, {Feature_HasStdExtZbkbBit, }, {Feature_HasStdExtZbkxBit, }, {Feature_HasStdExtZbsBit, }, {Feature_HasStdExtZfhBit, }, {Feature_HasStdExtZfhOrZfhminBit, }, {Feature_HasStdExtZfinxBit, }, {Feature_HasStdExtZhinxBit, }, {Feature_HasStdExtZhinxOrZhinxminBit, }, {Feature_HasStdExtZicbomBit, }, {Feature_HasStdExtZicbopBit, }, {Feature_HasStdExtZicbozBit, }, {Feature_HasStdExtZknhBit, }, {Feature_HasStdExtZksedBit, }, {Feature_HasStdExtZkshBit, }, {Feature_HasVInstructionsBit, }, {Feature_HasVInstructionsAnyFBit, }, {Feature_HasVInstructionsI64Bit, }, {Feature_HasVendorXTHeadVdotBit, }, {Feature_IsRV32Bit, }, {Feature_IsRV64Bit, }, {Feature_HasStdExtABit, Feature_IsRV64Bit, }, {Feature_HasStdExtCOrZcaBit, Feature_HasRVCHintsBit, }, {Feature_HasStdExtCOrZcaBit, Feature_IsRV32Bit, }, {Feature_HasStdExtCOrZcaBit, Feature_IsRV64Bit, }, {Feature_HasStdExtCOrZcdBit, Feature_HasStdExtDBit, }, {Feature_HasStdExtDBit, Feature_IsRV64Bit, }, {Feature_HasStdExtFBit, Feature_IsRV64Bit, }, {Feature_HasStdExtMBit, Feature_IsRV64Bit, }, {Feature_HasStdExtMOrZmmulBit, Feature_IsRV64Bit, }, {Feature_HasStdExtZbaBit, Feature_IsRV64Bit, }, {Feature_HasStdExtZbbBit, Feature_IsRV32Bit, }, {Feature_HasStdExtZbbBit, Feature_IsRV64Bit, }, {Feature_HasStdExtZbbOrZbkbBit, Feature_IsRV32Bit, }, {Feature_HasStdExtZbbOrZbkbBit, Feature_IsRV64Bit, }, {Feature_HasStdExtZbkbBit, Feature_IsRV32Bit, }, {Feature_HasStdExtZbkbBit, Feature_IsRV64Bit, }, {Feature_HasStdExtZdinxBit, Feature_IsRV32Bit, }, {Feature_HasStdExtZdinxBit, Feature_IsRV64Bit, }, {Feature_HasStdExtZfhBit, Feature_IsRV64Bit, }, {Feature_HasStdExtZfhOrZfhminBit, Feature_HasStdExtDBit, }, {Feature_HasStdExtZfinxBit, Feature_IsRV64Bit, }, {Feature_HasStdExtZhinxBit, Feature_IsRV64Bit, }, {Feature_HasStdExtZhinxOrZhinxminBit, Feature_HasStdExtZdinxBit, }, {Feature_HasStdExtZkndBit, Feature_IsRV32Bit, }, {Feature_HasStdExtZkndBit, Feature_IsRV64Bit, }, {Feature_HasStdExtZkndOrZkneBit, Feature_IsRV64Bit, }, {Feature_HasStdExtZkneBit, Feature_IsRV32Bit, }, {Feature_HasStdExtZkneBit, Feature_IsRV64Bit, }, {Feature_HasStdExtZknhBit, Feature_IsRV32Bit, }, {Feature_HasStdExtZknhBit, Feature_IsRV64Bit, }, {Feature_HasVInstructionsI64Bit, Feature_IsRV64Bit, }, {Feature_IsRV64Bit, Feature_HasStdExtHBit, }, {Feature_IsRV64Bit, Feature_HasVInstructionsI64Bit, }, {Feature_IsRV64Bit, Feature_HasVendorXVentanaCondOpsBit, }, {Feature_HasStdExtCOrZcfBit, Feature_HasStdExtFBit, Feature_IsRV32Bit, }, }; #endif // NDEBUG void verifyInstructionPredicates( unsigned Opcode, const FeatureBitset &Features) { #ifndef NDEBUG static uint8_t RequiredFeaturesRefs[] = { CEFBS_None, // PHI = 0 CEFBS_None, // INLINEASM = 1 CEFBS_None, // INLINEASM_BR = 2 CEFBS_None, // CFI_INSTRUCTION = 3 CEFBS_None, // EH_LABEL = 4 CEFBS_None, // GC_LABEL = 5 CEFBS_None, // ANNOTATION_LABEL = 6 CEFBS_None, // KILL = 7 CEFBS_None, // EXTRACT_SUBREG = 8 CEFBS_None, // INSERT_SUBREG = 9 CEFBS_None, // IMPLICIT_DEF = 10 CEFBS_None, // SUBREG_TO_REG = 11 CEFBS_None, // COPY_TO_REGCLASS = 12 CEFBS_None, // DBG_VALUE = 13 CEFBS_None, // DBG_VALUE_LIST = 14 CEFBS_None, // DBG_INSTR_REF = 15 CEFBS_None, // DBG_PHI = 16 CEFBS_None, // DBG_LABEL = 17 CEFBS_None, // REG_SEQUENCE = 18 CEFBS_None, // COPY = 19 CEFBS_None, // BUNDLE = 20 CEFBS_None, // LIFETIME_START = 21 CEFBS_None, // LIFETIME_END = 22 CEFBS_None, // PSEUDO_PROBE = 23 CEFBS_None, // ARITH_FENCE = 24 CEFBS_None, // STACKMAP = 25 CEFBS_None, // FENTRY_CALL = 26 CEFBS_None, // PATCHPOINT = 27 CEFBS_None, // LOAD_STACK_GUARD = 28 CEFBS_None, // PREALLOCATED_SETUP = 29 CEFBS_None, // PREALLOCATED_ARG = 30 CEFBS_None, // STATEPOINT = 31 CEFBS_None, // LOCAL_ESCAPE = 32 CEFBS_None, // FAULTING_OP = 33 CEFBS_None, // PATCHABLE_OP = 34 CEFBS_None, // PATCHABLE_FUNCTION_ENTER = 35 CEFBS_None, // PATCHABLE_RET = 36 CEFBS_None, // PATCHABLE_FUNCTION_EXIT = 37 CEFBS_None, // PATCHABLE_TAIL_CALL = 38 CEFBS_None, // PATCHABLE_EVENT_CALL = 39 CEFBS_None, // PATCHABLE_TYPED_EVENT_CALL = 40 CEFBS_None, // ICALL_BRANCH_FUNNEL = 41 CEFBS_None, // MEMBARRIER = 42 CEFBS_None, // G_ASSERT_SEXT = 43 CEFBS_None, // G_ASSERT_ZEXT = 44 CEFBS_None, // G_ASSERT_ALIGN = 45 CEFBS_None, // G_ADD = 46 CEFBS_None, // G_SUB = 47 CEFBS_None, // G_MUL = 48 CEFBS_None, // G_SDIV = 49 CEFBS_None, // G_UDIV = 50 CEFBS_None, // G_SREM = 51 CEFBS_None, // G_UREM = 52 CEFBS_None, // G_SDIVREM = 53 CEFBS_None, // G_UDIVREM = 54 CEFBS_None, // G_AND = 55 CEFBS_None, // G_OR = 56 CEFBS_None, // G_XOR = 57 CEFBS_None, // G_IMPLICIT_DEF = 58 CEFBS_None, // G_PHI = 59 CEFBS_None, // G_FRAME_INDEX = 60 CEFBS_None, // G_GLOBAL_VALUE = 61 CEFBS_None, // G_EXTRACT = 62 CEFBS_None, // G_UNMERGE_VALUES = 63 CEFBS_None, // G_INSERT = 64 CEFBS_None, // G_MERGE_VALUES = 65 CEFBS_None, // G_BUILD_VECTOR = 66 CEFBS_None, // G_BUILD_VECTOR_TRUNC = 67 CEFBS_None, // G_CONCAT_VECTORS = 68 CEFBS_None, // G_PTRTOINT = 69 CEFBS_None, // G_INTTOPTR = 70 CEFBS_None, // G_BITCAST = 71 CEFBS_None, // G_FREEZE = 72 CEFBS_None, // G_INTRINSIC_FPTRUNC_ROUND = 73 CEFBS_None, // G_INTRINSIC_TRUNC = 74 CEFBS_None, // G_INTRINSIC_ROUND = 75 CEFBS_None, // G_INTRINSIC_LRINT = 76 CEFBS_None, // G_INTRINSIC_ROUNDEVEN = 77 CEFBS_None, // G_READCYCLECOUNTER = 78 CEFBS_None, // G_LOAD = 79 CEFBS_None, // G_SEXTLOAD = 80 CEFBS_None, // G_ZEXTLOAD = 81 CEFBS_None, // G_INDEXED_LOAD = 82 CEFBS_None, // G_INDEXED_SEXTLOAD = 83 CEFBS_None, // G_INDEXED_ZEXTLOAD = 84 CEFBS_None, // G_STORE = 85 CEFBS_None, // G_INDEXED_STORE = 86 CEFBS_None, // G_ATOMIC_CMPXCHG_WITH_SUCCESS = 87 CEFBS_None, // G_ATOMIC_CMPXCHG = 88 CEFBS_None, // G_ATOMICRMW_XCHG = 89 CEFBS_None, // G_ATOMICRMW_ADD = 90 CEFBS_None, // G_ATOMICRMW_SUB = 91 CEFBS_None, // G_ATOMICRMW_AND = 92 CEFBS_None, // G_ATOMICRMW_NAND = 93 CEFBS_None, // G_ATOMICRMW_OR = 94 CEFBS_None, // G_ATOMICRMW_XOR = 95 CEFBS_None, // G_ATOMICRMW_MAX = 96 CEFBS_None, // G_ATOMICRMW_MIN = 97 CEFBS_None, // G_ATOMICRMW_UMAX = 98 CEFBS_None, // G_ATOMICRMW_UMIN = 99 CEFBS_None, // G_ATOMICRMW_FADD = 100 CEFBS_None, // G_ATOMICRMW_FSUB = 101 CEFBS_None, // G_ATOMICRMW_FMAX = 102 CEFBS_None, // G_ATOMICRMW_FMIN = 103 CEFBS_None, // G_ATOMICRMW_UINC_WRAP = 104 CEFBS_None, // G_ATOMICRMW_UDEC_WRAP = 105 CEFBS_None, // G_FENCE = 106 CEFBS_None, // G_BRCOND = 107 CEFBS_None, // G_BRINDIRECT = 108 CEFBS_None, // G_INVOKE_REGION_START = 109 CEFBS_None, // G_INTRINSIC = 110 CEFBS_None, // G_INTRINSIC_W_SIDE_EFFECTS = 111 CEFBS_None, // G_ANYEXT = 112 CEFBS_None, // G_TRUNC = 113 CEFBS_None, // G_CONSTANT = 114 CEFBS_None, // G_FCONSTANT = 115 CEFBS_None, // G_VASTART = 116 CEFBS_None, // G_VAARG = 117 CEFBS_None, // G_SEXT = 118 CEFBS_None, // G_SEXT_INREG = 119 CEFBS_None, // G_ZEXT = 120 CEFBS_None, // G_SHL = 121 CEFBS_None, // G_LSHR = 122 CEFBS_None, // G_ASHR = 123 CEFBS_None, // G_FSHL = 124 CEFBS_None, // G_FSHR = 125 CEFBS_None, // G_ROTR = 126 CEFBS_None, // G_ROTL = 127 CEFBS_None, // G_ICMP = 128 CEFBS_None, // G_FCMP = 129 CEFBS_None, // G_SELECT = 130 CEFBS_None, // G_UADDO = 131 CEFBS_None, // G_UADDE = 132 CEFBS_None, // G_USUBO = 133 CEFBS_None, // G_USUBE = 134 CEFBS_None, // G_SADDO = 135 CEFBS_None, // G_SADDE = 136 CEFBS_None, // G_SSUBO = 137 CEFBS_None, // G_SSUBE = 138 CEFBS_None, // G_UMULO = 139 CEFBS_None, // G_SMULO = 140 CEFBS_None, // G_UMULH = 141 CEFBS_None, // G_SMULH = 142 CEFBS_None, // G_UADDSAT = 143 CEFBS_None, // G_SADDSAT = 144 CEFBS_None, // G_USUBSAT = 145 CEFBS_None, // G_SSUBSAT = 146 CEFBS_None, // G_USHLSAT = 147 CEFBS_None, // G_SSHLSAT = 148 CEFBS_None, // G_SMULFIX = 149 CEFBS_None, // G_UMULFIX = 150 CEFBS_None, // G_SMULFIXSAT = 151 CEFBS_None, // G_UMULFIXSAT = 152 CEFBS_None, // G_SDIVFIX = 153 CEFBS_None, // G_UDIVFIX = 154 CEFBS_None, // G_SDIVFIXSAT = 155 CEFBS_None, // G_UDIVFIXSAT = 156 CEFBS_None, // G_FADD = 157 CEFBS_None, // G_FSUB = 158 CEFBS_None, // G_FMUL = 159 CEFBS_None, // G_FMA = 160 CEFBS_None, // G_FMAD = 161 CEFBS_None, // G_FDIV = 162 CEFBS_None, // G_FREM = 163 CEFBS_None, // G_FPOW = 164 CEFBS_None, // G_FPOWI = 165 CEFBS_None, // G_FEXP = 166 CEFBS_None, // G_FEXP2 = 167 CEFBS_None, // G_FLOG = 168 CEFBS_None, // G_FLOG2 = 169 CEFBS_None, // G_FLOG10 = 170 CEFBS_None, // G_FNEG = 171 CEFBS_None, // G_FPEXT = 172 CEFBS_None, // G_FPTRUNC = 173 CEFBS_None, // G_FPTOSI = 174 CEFBS_None, // G_FPTOUI = 175 CEFBS_None, // G_SITOFP = 176 CEFBS_None, // G_UITOFP = 177 CEFBS_None, // G_FABS = 178 CEFBS_None, // G_FCOPYSIGN = 179 CEFBS_None, // G_IS_FPCLASS = 180 CEFBS_None, // G_FCANONICALIZE = 181 CEFBS_None, // G_FMINNUM = 182 CEFBS_None, // G_FMAXNUM = 183 CEFBS_None, // G_FMINNUM_IEEE = 184 CEFBS_None, // G_FMAXNUM_IEEE = 185 CEFBS_None, // G_FMINIMUM = 186 CEFBS_None, // G_FMAXIMUM = 187 CEFBS_None, // G_PTR_ADD = 188 CEFBS_None, // G_PTRMASK = 189 CEFBS_None, // G_SMIN = 190 CEFBS_None, // G_SMAX = 191 CEFBS_None, // G_UMIN = 192 CEFBS_None, // G_UMAX = 193 CEFBS_None, // G_ABS = 194 CEFBS_None, // G_LROUND = 195 CEFBS_None, // G_LLROUND = 196 CEFBS_None, // G_BR = 197 CEFBS_None, // G_BRJT = 198 CEFBS_None, // G_INSERT_VECTOR_ELT = 199 CEFBS_None, // G_EXTRACT_VECTOR_ELT = 200 CEFBS_None, // G_SHUFFLE_VECTOR = 201 CEFBS_None, // G_CTTZ = 202 CEFBS_None, // G_CTTZ_ZERO_UNDEF = 203 CEFBS_None, // G_CTLZ = 204 CEFBS_None, // G_CTLZ_ZERO_UNDEF = 205 CEFBS_None, // G_CTPOP = 206 CEFBS_None, // G_BSWAP = 207 CEFBS_None, // G_BITREVERSE = 208 CEFBS_None, // G_FCEIL = 209 CEFBS_None, // G_FCOS = 210 CEFBS_None, // G_FSIN = 211 CEFBS_None, // G_FSQRT = 212 CEFBS_None, // G_FFLOOR = 213 CEFBS_None, // G_FRINT = 214 CEFBS_None, // G_FNEARBYINT = 215 CEFBS_None, // G_ADDRSPACE_CAST = 216 CEFBS_None, // G_BLOCK_ADDR = 217 CEFBS_None, // G_JUMP_TABLE = 218 CEFBS_None, // G_DYN_STACKALLOC = 219 CEFBS_None, // G_STRICT_FADD = 220 CEFBS_None, // G_STRICT_FSUB = 221 CEFBS_None, // G_STRICT_FMUL = 222 CEFBS_None, // G_STRICT_FDIV = 223 CEFBS_None, // G_STRICT_FREM = 224 CEFBS_None, // G_STRICT_FMA = 225 CEFBS_None, // G_STRICT_FSQRT = 226 CEFBS_None, // G_READ_REGISTER = 227 CEFBS_None, // G_WRITE_REGISTER = 228 CEFBS_None, // G_MEMCPY = 229 CEFBS_None, // G_MEMCPY_INLINE = 230 CEFBS_None, // G_MEMMOVE = 231 CEFBS_None, // G_MEMSET = 232 CEFBS_None, // G_BZERO = 233 CEFBS_None, // G_VECREDUCE_SEQ_FADD = 234 CEFBS_None, // G_VECREDUCE_SEQ_FMUL = 235 CEFBS_None, // G_VECREDUCE_FADD = 236 CEFBS_None, // G_VECREDUCE_FMUL = 237 CEFBS_None, // G_VECREDUCE_FMAX = 238 CEFBS_None, // G_VECREDUCE_FMIN = 239 CEFBS_None, // G_VECREDUCE_ADD = 240 CEFBS_None, // G_VECREDUCE_MUL = 241 CEFBS_None, // G_VECREDUCE_AND = 242 CEFBS_None, // G_VECREDUCE_OR = 243 CEFBS_None, // G_VECREDUCE_XOR = 244 CEFBS_None, // G_VECREDUCE_SMAX = 245 CEFBS_None, // G_VECREDUCE_SMIN = 246 CEFBS_None, // G_VECREDUCE_UMAX = 247 CEFBS_None, // G_VECREDUCE_UMIN = 248 CEFBS_None, // G_SBFX = 249 CEFBS_None, // G_UBFX = 250 CEFBS_None, // ADJCALLSTACKDOWN = 251 CEFBS_None, // ADJCALLSTACKUP = 252 CEFBS_HasStdExtD, // BuildPairF64Pseudo = 253 CEFBS_IsRV64, // HWASAN_CHECK_MEMACCESS_SHORTGRANULES = 254 CEFBS_None, // PseudoAddTPRel = 255 CEFBS_HasStdExtA, // PseudoAtomicLoadNand32 = 256 CEFBS_HasStdExtA_IsRV64, // PseudoAtomicLoadNand64 = 257 CEFBS_None, // PseudoBR = 258 CEFBS_None, // PseudoBRIND = 259 CEFBS_None, // PseudoCALL = 260 CEFBS_None, // PseudoCALLIndirect = 261 CEFBS_None, // PseudoCALLReg = 262 CEFBS_None, // PseudoCCADD = 263 CEFBS_None, // PseudoCCADDW = 264 CEFBS_None, // PseudoCCAND = 265 CEFBS_None, // PseudoCCMOVGPR = 266 CEFBS_None, // PseudoCCOR = 267 CEFBS_None, // PseudoCCSUB = 268 CEFBS_None, // PseudoCCSUBW = 269 CEFBS_None, // PseudoCCXOR = 270 CEFBS_HasStdExtA, // PseudoCmpXchg32 = 271 CEFBS_HasStdExtA_IsRV64, // PseudoCmpXchg64 = 272 CEFBS_HasStdExtD, // PseudoFLD = 273 CEFBS_HasStdExtZfhOrZfhmin, // PseudoFLH = 274 CEFBS_HasStdExtF, // PseudoFLW = 275 CEFBS_HasStdExtD, // PseudoFROUND_D = 276 CEFBS_HasStdExtZfh, // PseudoFROUND_H = 277 CEFBS_HasStdExtF, // PseudoFROUND_S = 278 CEFBS_HasStdExtD, // PseudoFSD = 279 CEFBS_HasStdExtZfhOrZfhmin, // PseudoFSH = 280 CEFBS_HasStdExtF, // PseudoFSW = 281 CEFBS_None, // PseudoJump = 282 CEFBS_None, // PseudoLA = 283 CEFBS_None, // PseudoLA_TLS_GD = 284 CEFBS_None, // PseudoLA_TLS_IE = 285 CEFBS_None, // PseudoLB = 286 CEFBS_None, // PseudoLBU = 287 CEFBS_IsRV64, // PseudoLD = 288 CEFBS_None, // PseudoLH = 289 CEFBS_None, // PseudoLHU = 290 CEFBS_None, // PseudoLI = 291 CEFBS_None, // PseudoLLA = 292 CEFBS_None, // PseudoLW = 293 CEFBS_IsRV64, // PseudoLWU = 294 CEFBS_HasStdExtA, // PseudoMaskedAtomicLoadAdd32 = 295 CEFBS_HasStdExtA, // PseudoMaskedAtomicLoadMax32 = 296 CEFBS_HasStdExtA, // PseudoMaskedAtomicLoadMin32 = 297 CEFBS_HasStdExtA, // PseudoMaskedAtomicLoadNand32 = 298 CEFBS_HasStdExtA, // PseudoMaskedAtomicLoadSub32 = 299 CEFBS_HasStdExtA, // PseudoMaskedAtomicLoadUMax32 = 300 CEFBS_HasStdExtA, // PseudoMaskedAtomicLoadUMin32 = 301 CEFBS_HasStdExtA, // PseudoMaskedAtomicSwap32 = 302 CEFBS_HasStdExtA, // PseudoMaskedCmpXchg32 = 303 CEFBS_HasStdExtD, // PseudoQuietFLE_D = 304 CEFBS_HasStdExtZfhOrZfhmin, // PseudoQuietFLE_H = 305 CEFBS_HasStdExtF, // PseudoQuietFLE_S = 306 CEFBS_HasStdExtD, // PseudoQuietFLT_D = 307 CEFBS_HasStdExtZfhOrZfhmin, // PseudoQuietFLT_H = 308 CEFBS_HasStdExtF, // PseudoQuietFLT_S = 309 CEFBS_None, // PseudoRET = 310 CEFBS_HasVInstructions, // PseudoReadVL = 311 CEFBS_HasVInstructions, // PseudoReadVLENB = 312 CEFBS_None, // PseudoSB = 313 CEFBS_IsRV64, // PseudoSD = 314 CEFBS_None, // PseudoSEXT_B = 315 CEFBS_None, // PseudoSEXT_H = 316 CEFBS_None, // PseudoSH = 317 CEFBS_None, // PseudoSW = 318 CEFBS_None, // PseudoTAIL = 319 CEFBS_None, // PseudoTAILIndirect = 320 CEFBS_None, // PseudoTHVdotVMAQASU_VV_M1 = 321 CEFBS_None, // PseudoTHVdotVMAQASU_VV_M1_MASK = 322 CEFBS_None, // PseudoTHVdotVMAQASU_VV_M2 = 323 CEFBS_None, // PseudoTHVdotVMAQASU_VV_M2_MASK = 324 CEFBS_None, // PseudoTHVdotVMAQASU_VV_M4 = 325 CEFBS_None, // PseudoTHVdotVMAQASU_VV_M4_MASK = 326 CEFBS_None, // PseudoTHVdotVMAQASU_VV_M8 = 327 CEFBS_None, // PseudoTHVdotVMAQASU_VV_M8_MASK = 328 CEFBS_None, // PseudoTHVdotVMAQASU_VV_MF2 = 329 CEFBS_None, // PseudoTHVdotVMAQASU_VV_MF2_MASK = 330 CEFBS_None, // PseudoTHVdotVMAQASU_VX_M1 = 331 CEFBS_None, // PseudoTHVdotVMAQASU_VX_M1_MASK = 332 CEFBS_None, // PseudoTHVdotVMAQASU_VX_M2 = 333 CEFBS_None, // PseudoTHVdotVMAQASU_VX_M2_MASK = 334 CEFBS_None, // PseudoTHVdotVMAQASU_VX_M4 = 335 CEFBS_None, // PseudoTHVdotVMAQASU_VX_M4_MASK = 336 CEFBS_None, // PseudoTHVdotVMAQASU_VX_M8 = 337 CEFBS_None, // PseudoTHVdotVMAQASU_VX_M8_MASK = 338 CEFBS_None, // PseudoTHVdotVMAQASU_VX_MF2 = 339 CEFBS_None, // PseudoTHVdotVMAQASU_VX_MF2_MASK = 340 CEFBS_None, // PseudoTHVdotVMAQAUS_VX_M1 = 341 CEFBS_None, // PseudoTHVdotVMAQAUS_VX_M1_MASK = 342 CEFBS_None, // PseudoTHVdotVMAQAUS_VX_M2 = 343 CEFBS_None, // PseudoTHVdotVMAQAUS_VX_M2_MASK = 344 CEFBS_None, // PseudoTHVdotVMAQAUS_VX_M4 = 345 CEFBS_None, // PseudoTHVdotVMAQAUS_VX_M4_MASK = 346 CEFBS_None, // PseudoTHVdotVMAQAUS_VX_M8 = 347 CEFBS_None, // PseudoTHVdotVMAQAUS_VX_M8_MASK = 348 CEFBS_None, // PseudoTHVdotVMAQAUS_VX_MF2 = 349 CEFBS_None, // PseudoTHVdotVMAQAUS_VX_MF2_MASK = 350 CEFBS_None, // PseudoTHVdotVMAQAU_VV_M1 = 351 CEFBS_None, // PseudoTHVdotVMAQAU_VV_M1_MASK = 352 CEFBS_None, // PseudoTHVdotVMAQAU_VV_M2 = 353 CEFBS_None, // PseudoTHVdotVMAQAU_VV_M2_MASK = 354 CEFBS_None, // PseudoTHVdotVMAQAU_VV_M4 = 355 CEFBS_None, // PseudoTHVdotVMAQAU_VV_M4_MASK = 356 CEFBS_None, // PseudoTHVdotVMAQAU_VV_M8 = 357 CEFBS_None, // PseudoTHVdotVMAQAU_VV_M8_MASK = 358 CEFBS_None, // PseudoTHVdotVMAQAU_VV_MF2 = 359 CEFBS_None, // PseudoTHVdotVMAQAU_VV_MF2_MASK = 360 CEFBS_None, // PseudoTHVdotVMAQAU_VX_M1 = 361 CEFBS_None, // PseudoTHVdotVMAQAU_VX_M1_MASK = 362 CEFBS_None, // PseudoTHVdotVMAQAU_VX_M2 = 363 CEFBS_None, // PseudoTHVdotVMAQAU_VX_M2_MASK = 364 CEFBS_None, // PseudoTHVdotVMAQAU_VX_M4 = 365 CEFBS_None, // PseudoTHVdotVMAQAU_VX_M4_MASK = 366 CEFBS_None, // PseudoTHVdotVMAQAU_VX_M8 = 367 CEFBS_None, // PseudoTHVdotVMAQAU_VX_M8_MASK = 368 CEFBS_None, // PseudoTHVdotVMAQAU_VX_MF2 = 369 CEFBS_None, // PseudoTHVdotVMAQAU_VX_MF2_MASK = 370 CEFBS_None, // PseudoTHVdotVMAQA_VV_M1 = 371 CEFBS_None, // PseudoTHVdotVMAQA_VV_M1_MASK = 372 CEFBS_None, // PseudoTHVdotVMAQA_VV_M2 = 373 CEFBS_None, // PseudoTHVdotVMAQA_VV_M2_MASK = 374 CEFBS_None, // PseudoTHVdotVMAQA_VV_M4 = 375 CEFBS_None, // PseudoTHVdotVMAQA_VV_M4_MASK = 376 CEFBS_None, // PseudoTHVdotVMAQA_VV_M8 = 377 CEFBS_None, // PseudoTHVdotVMAQA_VV_M8_MASK = 378 CEFBS_None, // PseudoTHVdotVMAQA_VV_MF2 = 379 CEFBS_None, // PseudoTHVdotVMAQA_VV_MF2_MASK = 380 CEFBS_None, // PseudoTHVdotVMAQA_VX_M1 = 381 CEFBS_None, // PseudoTHVdotVMAQA_VX_M1_MASK = 382 CEFBS_None, // PseudoTHVdotVMAQA_VX_M2 = 383 CEFBS_None, // PseudoTHVdotVMAQA_VX_M2_MASK = 384 CEFBS_None, // PseudoTHVdotVMAQA_VX_M4 = 385 CEFBS_None, // PseudoTHVdotVMAQA_VX_M4_MASK = 386 CEFBS_None, // PseudoTHVdotVMAQA_VX_M8 = 387 CEFBS_None, // PseudoTHVdotVMAQA_VX_M8_MASK = 388 CEFBS_None, // PseudoTHVdotVMAQA_VX_MF2 = 389 CEFBS_None, // PseudoTHVdotVMAQA_VX_MF2_MASK = 390 CEFBS_HasVInstructions, // PseudoVAADDU_VV_M1 = 391 CEFBS_HasVInstructions, // PseudoVAADDU_VV_M1_MASK = 392 CEFBS_HasVInstructions, // PseudoVAADDU_VV_M1_TU = 393 CEFBS_HasVInstructions, // PseudoVAADDU_VV_M2 = 394 CEFBS_HasVInstructions, // PseudoVAADDU_VV_M2_MASK = 395 CEFBS_HasVInstructions, // PseudoVAADDU_VV_M2_TU = 396 CEFBS_HasVInstructions, // PseudoVAADDU_VV_M4 = 397 CEFBS_HasVInstructions, // PseudoVAADDU_VV_M4_MASK = 398 CEFBS_HasVInstructions, // PseudoVAADDU_VV_M4_TU = 399 CEFBS_HasVInstructions, // PseudoVAADDU_VV_M8 = 400 CEFBS_HasVInstructions, // PseudoVAADDU_VV_M8_MASK = 401 CEFBS_HasVInstructions, // PseudoVAADDU_VV_M8_TU = 402 CEFBS_HasVInstructions, // PseudoVAADDU_VV_MF2 = 403 CEFBS_HasVInstructions, // PseudoVAADDU_VV_MF2_MASK = 404 CEFBS_HasVInstructions, // PseudoVAADDU_VV_MF2_TU = 405 CEFBS_HasVInstructions, // PseudoVAADDU_VV_MF4 = 406 CEFBS_HasVInstructions, // PseudoVAADDU_VV_MF4_MASK = 407 CEFBS_HasVInstructions, // PseudoVAADDU_VV_MF4_TU = 408 CEFBS_HasVInstructions, // PseudoVAADDU_VV_MF8 = 409 CEFBS_HasVInstructions, // PseudoVAADDU_VV_MF8_MASK = 410 CEFBS_HasVInstructions, // PseudoVAADDU_VV_MF8_TU = 411 CEFBS_HasVInstructions, // PseudoVAADDU_VX_M1 = 412 CEFBS_HasVInstructions, // PseudoVAADDU_VX_M1_MASK = 413 CEFBS_HasVInstructions, // PseudoVAADDU_VX_M1_TU = 414 CEFBS_HasVInstructions, // PseudoVAADDU_VX_M2 = 415 CEFBS_HasVInstructions, // PseudoVAADDU_VX_M2_MASK = 416 CEFBS_HasVInstructions, // PseudoVAADDU_VX_M2_TU = 417 CEFBS_HasVInstructions, // PseudoVAADDU_VX_M4 = 418 CEFBS_HasVInstructions, // PseudoVAADDU_VX_M4_MASK = 419 CEFBS_HasVInstructions, // PseudoVAADDU_VX_M4_TU = 420 CEFBS_HasVInstructions, // PseudoVAADDU_VX_M8 = 421 CEFBS_HasVInstructions, // PseudoVAADDU_VX_M8_MASK = 422 CEFBS_HasVInstructions, // PseudoVAADDU_VX_M8_TU = 423 CEFBS_HasVInstructions, // PseudoVAADDU_VX_MF2 = 424 CEFBS_HasVInstructions, // PseudoVAADDU_VX_MF2_MASK = 425 CEFBS_HasVInstructions, // PseudoVAADDU_VX_MF2_TU = 426 CEFBS_HasVInstructions, // PseudoVAADDU_VX_MF4 = 427 CEFBS_HasVInstructions, // PseudoVAADDU_VX_MF4_MASK = 428 CEFBS_HasVInstructions, // PseudoVAADDU_VX_MF4_TU = 429 CEFBS_HasVInstructions, // PseudoVAADDU_VX_MF8 = 430 CEFBS_HasVInstructions, // PseudoVAADDU_VX_MF8_MASK = 431 CEFBS_HasVInstructions, // PseudoVAADDU_VX_MF8_TU = 432 CEFBS_HasVInstructions, // PseudoVAADD_VV_M1 = 433 CEFBS_HasVInstructions, // PseudoVAADD_VV_M1_MASK = 434 CEFBS_HasVInstructions, // PseudoVAADD_VV_M1_TU = 435 CEFBS_HasVInstructions, // PseudoVAADD_VV_M2 = 436 CEFBS_HasVInstructions, // PseudoVAADD_VV_M2_MASK = 437 CEFBS_HasVInstructions, // PseudoVAADD_VV_M2_TU = 438 CEFBS_HasVInstructions, // PseudoVAADD_VV_M4 = 439 CEFBS_HasVInstructions, // PseudoVAADD_VV_M4_MASK = 440 CEFBS_HasVInstructions, // PseudoVAADD_VV_M4_TU = 441 CEFBS_HasVInstructions, // PseudoVAADD_VV_M8 = 442 CEFBS_HasVInstructions, // PseudoVAADD_VV_M8_MASK = 443 CEFBS_HasVInstructions, // PseudoVAADD_VV_M8_TU = 444 CEFBS_HasVInstructions, // PseudoVAADD_VV_MF2 = 445 CEFBS_HasVInstructions, // PseudoVAADD_VV_MF2_MASK = 446 CEFBS_HasVInstructions, // PseudoVAADD_VV_MF2_TU = 447 CEFBS_HasVInstructions, // PseudoVAADD_VV_MF4 = 448 CEFBS_HasVInstructions, // PseudoVAADD_VV_MF4_MASK = 449 CEFBS_HasVInstructions, // PseudoVAADD_VV_MF4_TU = 450 CEFBS_HasVInstructions, // PseudoVAADD_VV_MF8 = 451 CEFBS_HasVInstructions, // PseudoVAADD_VV_MF8_MASK = 452 CEFBS_HasVInstructions, // PseudoVAADD_VV_MF8_TU = 453 CEFBS_HasVInstructions, // PseudoVAADD_VX_M1 = 454 CEFBS_HasVInstructions, // PseudoVAADD_VX_M1_MASK = 455 CEFBS_HasVInstructions, // PseudoVAADD_VX_M1_TU = 456 CEFBS_HasVInstructions, // PseudoVAADD_VX_M2 = 457 CEFBS_HasVInstructions, // PseudoVAADD_VX_M2_MASK = 458 CEFBS_HasVInstructions, // PseudoVAADD_VX_M2_TU = 459 CEFBS_HasVInstructions, // PseudoVAADD_VX_M4 = 460 CEFBS_HasVInstructions, // PseudoVAADD_VX_M4_MASK = 461 CEFBS_HasVInstructions, // PseudoVAADD_VX_M4_TU = 462 CEFBS_HasVInstructions, // PseudoVAADD_VX_M8 = 463 CEFBS_HasVInstructions, // PseudoVAADD_VX_M8_MASK = 464 CEFBS_HasVInstructions, // PseudoVAADD_VX_M8_TU = 465 CEFBS_HasVInstructions, // PseudoVAADD_VX_MF2 = 466 CEFBS_HasVInstructions, // PseudoVAADD_VX_MF2_MASK = 467 CEFBS_HasVInstructions, // PseudoVAADD_VX_MF2_TU = 468 CEFBS_HasVInstructions, // PseudoVAADD_VX_MF4 = 469 CEFBS_HasVInstructions, // PseudoVAADD_VX_MF4_MASK = 470 CEFBS_HasVInstructions, // PseudoVAADD_VX_MF4_TU = 471 CEFBS_HasVInstructions, // PseudoVAADD_VX_MF8 = 472 CEFBS_HasVInstructions, // PseudoVAADD_VX_MF8_MASK = 473 CEFBS_HasVInstructions, // PseudoVAADD_VX_MF8_TU = 474 CEFBS_HasVInstructions, // PseudoVADC_VIM_M1 = 475 CEFBS_HasVInstructions, // PseudoVADC_VIM_M1_TU = 476 CEFBS_HasVInstructions, // PseudoVADC_VIM_M2 = 477 CEFBS_HasVInstructions, // PseudoVADC_VIM_M2_TU = 478 CEFBS_HasVInstructions, // PseudoVADC_VIM_M4 = 479 CEFBS_HasVInstructions, // PseudoVADC_VIM_M4_TU = 480 CEFBS_HasVInstructions, // PseudoVADC_VIM_M8 = 481 CEFBS_HasVInstructions, // PseudoVADC_VIM_M8_TU = 482 CEFBS_HasVInstructions, // PseudoVADC_VIM_MF2 = 483 CEFBS_HasVInstructions, // PseudoVADC_VIM_MF2_TU = 484 CEFBS_HasVInstructions, // PseudoVADC_VIM_MF4 = 485 CEFBS_HasVInstructions, // PseudoVADC_VIM_MF4_TU = 486 CEFBS_HasVInstructions, // PseudoVADC_VIM_MF8 = 487 CEFBS_HasVInstructions, // PseudoVADC_VIM_MF8_TU = 488 CEFBS_HasVInstructions, // PseudoVADC_VVM_M1 = 489 CEFBS_HasVInstructions, // PseudoVADC_VVM_M1_TU = 490 CEFBS_HasVInstructions, // PseudoVADC_VVM_M2 = 491 CEFBS_HasVInstructions, // PseudoVADC_VVM_M2_TU = 492 CEFBS_HasVInstructions, // PseudoVADC_VVM_M4 = 493 CEFBS_HasVInstructions, // PseudoVADC_VVM_M4_TU = 494 CEFBS_HasVInstructions, // PseudoVADC_VVM_M8 = 495 CEFBS_HasVInstructions, // PseudoVADC_VVM_M8_TU = 496 CEFBS_HasVInstructions, // PseudoVADC_VVM_MF2 = 497 CEFBS_HasVInstructions, // PseudoVADC_VVM_MF2_TU = 498 CEFBS_HasVInstructions, // PseudoVADC_VVM_MF4 = 499 CEFBS_HasVInstructions, // PseudoVADC_VVM_MF4_TU = 500 CEFBS_HasVInstructions, // PseudoVADC_VVM_MF8 = 501 CEFBS_HasVInstructions, // PseudoVADC_VVM_MF8_TU = 502 CEFBS_HasVInstructions, // PseudoVADC_VXM_M1 = 503 CEFBS_HasVInstructions, // PseudoVADC_VXM_M1_TU = 504 CEFBS_HasVInstructions, // PseudoVADC_VXM_M2 = 505 CEFBS_HasVInstructions, // PseudoVADC_VXM_M2_TU = 506 CEFBS_HasVInstructions, // PseudoVADC_VXM_M4 = 507 CEFBS_HasVInstructions, // PseudoVADC_VXM_M4_TU = 508 CEFBS_HasVInstructions, // PseudoVADC_VXM_M8 = 509 CEFBS_HasVInstructions, // PseudoVADC_VXM_M8_TU = 510 CEFBS_HasVInstructions, // PseudoVADC_VXM_MF2 = 511 CEFBS_HasVInstructions, // PseudoVADC_VXM_MF2_TU = 512 CEFBS_HasVInstructions, // PseudoVADC_VXM_MF4 = 513 CEFBS_HasVInstructions, // PseudoVADC_VXM_MF4_TU = 514 CEFBS_HasVInstructions, // PseudoVADC_VXM_MF8 = 515 CEFBS_HasVInstructions, // PseudoVADC_VXM_MF8_TU = 516 CEFBS_HasVInstructions, // PseudoVADD_VI_M1 = 517 CEFBS_HasVInstructions, // PseudoVADD_VI_M1_MASK = 518 CEFBS_HasVInstructions, // PseudoVADD_VI_M1_TU = 519 CEFBS_HasVInstructions, // PseudoVADD_VI_M2 = 520 CEFBS_HasVInstructions, // PseudoVADD_VI_M2_MASK = 521 CEFBS_HasVInstructions, // PseudoVADD_VI_M2_TU = 522 CEFBS_HasVInstructions, // PseudoVADD_VI_M4 = 523 CEFBS_HasVInstructions, // PseudoVADD_VI_M4_MASK = 524 CEFBS_HasVInstructions, // PseudoVADD_VI_M4_TU = 525 CEFBS_HasVInstructions, // PseudoVADD_VI_M8 = 526 CEFBS_HasVInstructions, // PseudoVADD_VI_M8_MASK = 527 CEFBS_HasVInstructions, // PseudoVADD_VI_M8_TU = 528 CEFBS_HasVInstructions, // PseudoVADD_VI_MF2 = 529 CEFBS_HasVInstructions, // PseudoVADD_VI_MF2_MASK = 530 CEFBS_HasVInstructions, // PseudoVADD_VI_MF2_TU = 531 CEFBS_HasVInstructions, // PseudoVADD_VI_MF4 = 532 CEFBS_HasVInstructions, // PseudoVADD_VI_MF4_MASK = 533 CEFBS_HasVInstructions, // PseudoVADD_VI_MF4_TU = 534 CEFBS_HasVInstructions, // PseudoVADD_VI_MF8 = 535 CEFBS_HasVInstructions, // PseudoVADD_VI_MF8_MASK = 536 CEFBS_HasVInstructions, // PseudoVADD_VI_MF8_TU = 537 CEFBS_HasVInstructions, // PseudoVADD_VV_M1 = 538 CEFBS_HasVInstructions, // PseudoVADD_VV_M1_MASK = 539 CEFBS_HasVInstructions, // PseudoVADD_VV_M1_TU = 540 CEFBS_HasVInstructions, // PseudoVADD_VV_M2 = 541 CEFBS_HasVInstructions, // PseudoVADD_VV_M2_MASK = 542 CEFBS_HasVInstructions, // PseudoVADD_VV_M2_TU = 543 CEFBS_HasVInstructions, // PseudoVADD_VV_M4 = 544 CEFBS_HasVInstructions, // PseudoVADD_VV_M4_MASK = 545 CEFBS_HasVInstructions, // PseudoVADD_VV_M4_TU = 546 CEFBS_HasVInstructions, // PseudoVADD_VV_M8 = 547 CEFBS_HasVInstructions, // PseudoVADD_VV_M8_MASK = 548 CEFBS_HasVInstructions, // PseudoVADD_VV_M8_TU = 549 CEFBS_HasVInstructions, // PseudoVADD_VV_MF2 = 550 CEFBS_HasVInstructions, // PseudoVADD_VV_MF2_MASK = 551 CEFBS_HasVInstructions, // PseudoVADD_VV_MF2_TU = 552 CEFBS_HasVInstructions, // PseudoVADD_VV_MF4 = 553 CEFBS_HasVInstructions, // PseudoVADD_VV_MF4_MASK = 554 CEFBS_HasVInstructions, // PseudoVADD_VV_MF4_TU = 555 CEFBS_HasVInstructions, // PseudoVADD_VV_MF8 = 556 CEFBS_HasVInstructions, // PseudoVADD_VV_MF8_MASK = 557 CEFBS_HasVInstructions, // PseudoVADD_VV_MF8_TU = 558 CEFBS_HasVInstructions, // PseudoVADD_VX_M1 = 559 CEFBS_HasVInstructions, // PseudoVADD_VX_M1_MASK = 560 CEFBS_HasVInstructions, // PseudoVADD_VX_M1_TU = 561 CEFBS_HasVInstructions, // PseudoVADD_VX_M2 = 562 CEFBS_HasVInstructions, // PseudoVADD_VX_M2_MASK = 563 CEFBS_HasVInstructions, // PseudoVADD_VX_M2_TU = 564 CEFBS_HasVInstructions, // PseudoVADD_VX_M4 = 565 CEFBS_HasVInstructions, // PseudoVADD_VX_M4_MASK = 566 CEFBS_HasVInstructions, // PseudoVADD_VX_M4_TU = 567 CEFBS_HasVInstructions, // PseudoVADD_VX_M8 = 568 CEFBS_HasVInstructions, // PseudoVADD_VX_M8_MASK = 569 CEFBS_HasVInstructions, // PseudoVADD_VX_M8_TU = 570 CEFBS_HasVInstructions, // PseudoVADD_VX_MF2 = 571 CEFBS_HasVInstructions, // PseudoVADD_VX_MF2_MASK = 572 CEFBS_HasVInstructions, // PseudoVADD_VX_MF2_TU = 573 CEFBS_HasVInstructions, // PseudoVADD_VX_MF4 = 574 CEFBS_HasVInstructions, // PseudoVADD_VX_MF4_MASK = 575 CEFBS_HasVInstructions, // PseudoVADD_VX_MF4_TU = 576 CEFBS_HasVInstructions, // PseudoVADD_VX_MF8 = 577 CEFBS_HasVInstructions, // PseudoVADD_VX_MF8_MASK = 578 CEFBS_HasVInstructions, // PseudoVADD_VX_MF8_TU = 579 CEFBS_HasVInstructions, // PseudoVAND_VI_M1 = 580 CEFBS_HasVInstructions, // PseudoVAND_VI_M1_MASK = 581 CEFBS_HasVInstructions, // PseudoVAND_VI_M1_TU = 582 CEFBS_HasVInstructions, // PseudoVAND_VI_M2 = 583 CEFBS_HasVInstructions, // PseudoVAND_VI_M2_MASK = 584 CEFBS_HasVInstructions, // PseudoVAND_VI_M2_TU = 585 CEFBS_HasVInstructions, // PseudoVAND_VI_M4 = 586 CEFBS_HasVInstructions, // PseudoVAND_VI_M4_MASK = 587 CEFBS_HasVInstructions, // PseudoVAND_VI_M4_TU = 588 CEFBS_HasVInstructions, // PseudoVAND_VI_M8 = 589 CEFBS_HasVInstructions, // PseudoVAND_VI_M8_MASK = 590 CEFBS_HasVInstructions, // PseudoVAND_VI_M8_TU = 591 CEFBS_HasVInstructions, // PseudoVAND_VI_MF2 = 592 CEFBS_HasVInstructions, // PseudoVAND_VI_MF2_MASK = 593 CEFBS_HasVInstructions, // PseudoVAND_VI_MF2_TU = 594 CEFBS_HasVInstructions, // PseudoVAND_VI_MF4 = 595 CEFBS_HasVInstructions, // PseudoVAND_VI_MF4_MASK = 596 CEFBS_HasVInstructions, // PseudoVAND_VI_MF4_TU = 597 CEFBS_HasVInstructions, // PseudoVAND_VI_MF8 = 598 CEFBS_HasVInstructions, // PseudoVAND_VI_MF8_MASK = 599 CEFBS_HasVInstructions, // PseudoVAND_VI_MF8_TU = 600 CEFBS_HasVInstructions, // PseudoVAND_VV_M1 = 601 CEFBS_HasVInstructions, // PseudoVAND_VV_M1_MASK = 602 CEFBS_HasVInstructions, // PseudoVAND_VV_M1_TU = 603 CEFBS_HasVInstructions, // PseudoVAND_VV_M2 = 604 CEFBS_HasVInstructions, // PseudoVAND_VV_M2_MASK = 605 CEFBS_HasVInstructions, // PseudoVAND_VV_M2_TU = 606 CEFBS_HasVInstructions, // PseudoVAND_VV_M4 = 607 CEFBS_HasVInstructions, // PseudoVAND_VV_M4_MASK = 608 CEFBS_HasVInstructions, // PseudoVAND_VV_M4_TU = 609 CEFBS_HasVInstructions, // PseudoVAND_VV_M8 = 610 CEFBS_HasVInstructions, // PseudoVAND_VV_M8_MASK = 611 CEFBS_HasVInstructions, // PseudoVAND_VV_M8_TU = 612 CEFBS_HasVInstructions, // PseudoVAND_VV_MF2 = 613 CEFBS_HasVInstructions, // PseudoVAND_VV_MF2_MASK = 614 CEFBS_HasVInstructions, // PseudoVAND_VV_MF2_TU = 615 CEFBS_HasVInstructions, // PseudoVAND_VV_MF4 = 616 CEFBS_HasVInstructions, // PseudoVAND_VV_MF4_MASK = 617 CEFBS_HasVInstructions, // PseudoVAND_VV_MF4_TU = 618 CEFBS_HasVInstructions, // PseudoVAND_VV_MF8 = 619 CEFBS_HasVInstructions, // PseudoVAND_VV_MF8_MASK = 620 CEFBS_HasVInstructions, // PseudoVAND_VV_MF8_TU = 621 CEFBS_HasVInstructions, // PseudoVAND_VX_M1 = 622 CEFBS_HasVInstructions, // PseudoVAND_VX_M1_MASK = 623 CEFBS_HasVInstructions, // PseudoVAND_VX_M1_TU = 624 CEFBS_HasVInstructions, // PseudoVAND_VX_M2 = 625 CEFBS_HasVInstructions, // PseudoVAND_VX_M2_MASK = 626 CEFBS_HasVInstructions, // PseudoVAND_VX_M2_TU = 627 CEFBS_HasVInstructions, // PseudoVAND_VX_M4 = 628 CEFBS_HasVInstructions, // PseudoVAND_VX_M4_MASK = 629 CEFBS_HasVInstructions, // PseudoVAND_VX_M4_TU = 630 CEFBS_HasVInstructions, // PseudoVAND_VX_M8 = 631 CEFBS_HasVInstructions, // PseudoVAND_VX_M8_MASK = 632 CEFBS_HasVInstructions, // PseudoVAND_VX_M8_TU = 633 CEFBS_HasVInstructions, // PseudoVAND_VX_MF2 = 634 CEFBS_HasVInstructions, // PseudoVAND_VX_MF2_MASK = 635 CEFBS_HasVInstructions, // PseudoVAND_VX_MF2_TU = 636 CEFBS_HasVInstructions, // PseudoVAND_VX_MF4 = 637 CEFBS_HasVInstructions, // PseudoVAND_VX_MF4_MASK = 638 CEFBS_HasVInstructions, // PseudoVAND_VX_MF4_TU = 639 CEFBS_HasVInstructions, // PseudoVAND_VX_MF8 = 640 CEFBS_HasVInstructions, // PseudoVAND_VX_MF8_MASK = 641 CEFBS_HasVInstructions, // PseudoVAND_VX_MF8_TU = 642 CEFBS_HasVInstructions, // PseudoVASUBU_VV_M1 = 643 CEFBS_HasVInstructions, // PseudoVASUBU_VV_M1_MASK = 644 CEFBS_HasVInstructions, // PseudoVASUBU_VV_M1_TU = 645 CEFBS_HasVInstructions, // PseudoVASUBU_VV_M2 = 646 CEFBS_HasVInstructions, // PseudoVASUBU_VV_M2_MASK = 647 CEFBS_HasVInstructions, // PseudoVASUBU_VV_M2_TU = 648 CEFBS_HasVInstructions, // PseudoVASUBU_VV_M4 = 649 CEFBS_HasVInstructions, // PseudoVASUBU_VV_M4_MASK = 650 CEFBS_HasVInstructions, // PseudoVASUBU_VV_M4_TU = 651 CEFBS_HasVInstructions, // PseudoVASUBU_VV_M8 = 652 CEFBS_HasVInstructions, // PseudoVASUBU_VV_M8_MASK = 653 CEFBS_HasVInstructions, // PseudoVASUBU_VV_M8_TU = 654 CEFBS_HasVInstructions, // PseudoVASUBU_VV_MF2 = 655 CEFBS_HasVInstructions, // PseudoVASUBU_VV_MF2_MASK = 656 CEFBS_HasVInstructions, // PseudoVASUBU_VV_MF2_TU = 657 CEFBS_HasVInstructions, // PseudoVASUBU_VV_MF4 = 658 CEFBS_HasVInstructions, // PseudoVASUBU_VV_MF4_MASK = 659 CEFBS_HasVInstructions, // PseudoVASUBU_VV_MF4_TU = 660 CEFBS_HasVInstructions, // PseudoVASUBU_VV_MF8 = 661 CEFBS_HasVInstructions, // PseudoVASUBU_VV_MF8_MASK = 662 CEFBS_HasVInstructions, // PseudoVASUBU_VV_MF8_TU = 663 CEFBS_HasVInstructions, // PseudoVASUBU_VX_M1 = 664 CEFBS_HasVInstructions, // PseudoVASUBU_VX_M1_MASK = 665 CEFBS_HasVInstructions, // PseudoVASUBU_VX_M1_TU = 666 CEFBS_HasVInstructions, // PseudoVASUBU_VX_M2 = 667 CEFBS_HasVInstructions, // PseudoVASUBU_VX_M2_MASK = 668 CEFBS_HasVInstructions, // PseudoVASUBU_VX_M2_TU = 669 CEFBS_HasVInstructions, // PseudoVASUBU_VX_M4 = 670 CEFBS_HasVInstructions, // PseudoVASUBU_VX_M4_MASK = 671 CEFBS_HasVInstructions, // PseudoVASUBU_VX_M4_TU = 672 CEFBS_HasVInstructions, // PseudoVASUBU_VX_M8 = 673 CEFBS_HasVInstructions, // PseudoVASUBU_VX_M8_MASK = 674 CEFBS_HasVInstructions, // PseudoVASUBU_VX_M8_TU = 675 CEFBS_HasVInstructions, // PseudoVASUBU_VX_MF2 = 676 CEFBS_HasVInstructions, // PseudoVASUBU_VX_MF2_MASK = 677 CEFBS_HasVInstructions, // PseudoVASUBU_VX_MF2_TU = 678 CEFBS_HasVInstructions, // PseudoVASUBU_VX_MF4 = 679 CEFBS_HasVInstructions, // PseudoVASUBU_VX_MF4_MASK = 680 CEFBS_HasVInstructions, // PseudoVASUBU_VX_MF4_TU = 681 CEFBS_HasVInstructions, // PseudoVASUBU_VX_MF8 = 682 CEFBS_HasVInstructions, // PseudoVASUBU_VX_MF8_MASK = 683 CEFBS_HasVInstructions, // PseudoVASUBU_VX_MF8_TU = 684 CEFBS_HasVInstructions, // PseudoVASUB_VV_M1 = 685 CEFBS_HasVInstructions, // PseudoVASUB_VV_M1_MASK = 686 CEFBS_HasVInstructions, // PseudoVASUB_VV_M1_TU = 687 CEFBS_HasVInstructions, // PseudoVASUB_VV_M2 = 688 CEFBS_HasVInstructions, // PseudoVASUB_VV_M2_MASK = 689 CEFBS_HasVInstructions, // PseudoVASUB_VV_M2_TU = 690 CEFBS_HasVInstructions, // PseudoVASUB_VV_M4 = 691 CEFBS_HasVInstructions, // PseudoVASUB_VV_M4_MASK = 692 CEFBS_HasVInstructions, // PseudoVASUB_VV_M4_TU = 693 CEFBS_HasVInstructions, // PseudoVASUB_VV_M8 = 694 CEFBS_HasVInstructions, // PseudoVASUB_VV_M8_MASK = 695 CEFBS_HasVInstructions, // PseudoVASUB_VV_M8_TU = 696 CEFBS_HasVInstructions, // PseudoVASUB_VV_MF2 = 697 CEFBS_HasVInstructions, // PseudoVASUB_VV_MF2_MASK = 698 CEFBS_HasVInstructions, // PseudoVASUB_VV_MF2_TU = 699 CEFBS_HasVInstructions, // PseudoVASUB_VV_MF4 = 700 CEFBS_HasVInstructions, // PseudoVASUB_VV_MF4_MASK = 701 CEFBS_HasVInstructions, // PseudoVASUB_VV_MF4_TU = 702 CEFBS_HasVInstructions, // PseudoVASUB_VV_MF8 = 703 CEFBS_HasVInstructions, // PseudoVASUB_VV_MF8_MASK = 704 CEFBS_HasVInstructions, // PseudoVASUB_VV_MF8_TU = 705 CEFBS_HasVInstructions, // PseudoVASUB_VX_M1 = 706 CEFBS_HasVInstructions, // PseudoVASUB_VX_M1_MASK = 707 CEFBS_HasVInstructions, // PseudoVASUB_VX_M1_TU = 708 CEFBS_HasVInstructions, // PseudoVASUB_VX_M2 = 709 CEFBS_HasVInstructions, // PseudoVASUB_VX_M2_MASK = 710 CEFBS_HasVInstructions, // PseudoVASUB_VX_M2_TU = 711 CEFBS_HasVInstructions, // PseudoVASUB_VX_M4 = 712 CEFBS_HasVInstructions, // PseudoVASUB_VX_M4_MASK = 713 CEFBS_HasVInstructions, // PseudoVASUB_VX_M4_TU = 714 CEFBS_HasVInstructions, // PseudoVASUB_VX_M8 = 715 CEFBS_HasVInstructions, // PseudoVASUB_VX_M8_MASK = 716 CEFBS_HasVInstructions, // PseudoVASUB_VX_M8_TU = 717 CEFBS_HasVInstructions, // PseudoVASUB_VX_MF2 = 718 CEFBS_HasVInstructions, // PseudoVASUB_VX_MF2_MASK = 719 CEFBS_HasVInstructions, // PseudoVASUB_VX_MF2_TU = 720 CEFBS_HasVInstructions, // PseudoVASUB_VX_MF4 = 721 CEFBS_HasVInstructions, // PseudoVASUB_VX_MF4_MASK = 722 CEFBS_HasVInstructions, // PseudoVASUB_VX_MF4_TU = 723 CEFBS_HasVInstructions, // PseudoVASUB_VX_MF8 = 724 CEFBS_HasVInstructions, // PseudoVASUB_VX_MF8_MASK = 725 CEFBS_HasVInstructions, // PseudoVASUB_VX_MF8_TU = 726 CEFBS_None, // PseudoVCOMPRESS_VM_M1 = 727 CEFBS_None, // PseudoVCOMPRESS_VM_M2 = 728 CEFBS_None, // PseudoVCOMPRESS_VM_M4 = 729 CEFBS_None, // PseudoVCOMPRESS_VM_M8 = 730 CEFBS_None, // PseudoVCOMPRESS_VM_MF2 = 731 CEFBS_None, // PseudoVCOMPRESS_VM_MF4 = 732 CEFBS_None, // PseudoVCOMPRESS_VM_MF8 = 733 CEFBS_None, // PseudoVCPOP_M_B1 = 734 CEFBS_None, // PseudoVCPOP_M_B16 = 735 CEFBS_None, // PseudoVCPOP_M_B16_MASK = 736 CEFBS_None, // PseudoVCPOP_M_B1_MASK = 737 CEFBS_None, // PseudoVCPOP_M_B2 = 738 CEFBS_None, // PseudoVCPOP_M_B2_MASK = 739 CEFBS_None, // PseudoVCPOP_M_B32 = 740 CEFBS_None, // PseudoVCPOP_M_B32_MASK = 741 CEFBS_None, // PseudoVCPOP_M_B4 = 742 CEFBS_None, // PseudoVCPOP_M_B4_MASK = 743 CEFBS_None, // PseudoVCPOP_M_B64 = 744 CEFBS_None, // PseudoVCPOP_M_B64_MASK = 745 CEFBS_None, // PseudoVCPOP_M_B8 = 746 CEFBS_None, // PseudoVCPOP_M_B8_MASK = 747 CEFBS_HasVInstructions, // PseudoVDIVU_VV_M1 = 748 CEFBS_HasVInstructions, // PseudoVDIVU_VV_M1_MASK = 749 CEFBS_HasVInstructions, // PseudoVDIVU_VV_M1_TU = 750 CEFBS_HasVInstructions, // PseudoVDIVU_VV_M2 = 751 CEFBS_HasVInstructions, // PseudoVDIVU_VV_M2_MASK = 752 CEFBS_HasVInstructions, // PseudoVDIVU_VV_M2_TU = 753 CEFBS_HasVInstructions, // PseudoVDIVU_VV_M4 = 754 CEFBS_HasVInstructions, // PseudoVDIVU_VV_M4_MASK = 755 CEFBS_HasVInstructions, // PseudoVDIVU_VV_M4_TU = 756 CEFBS_HasVInstructions, // PseudoVDIVU_VV_M8 = 757 CEFBS_HasVInstructions, // PseudoVDIVU_VV_M8_MASK = 758 CEFBS_HasVInstructions, // PseudoVDIVU_VV_M8_TU = 759 CEFBS_HasVInstructions, // PseudoVDIVU_VV_MF2 = 760 CEFBS_HasVInstructions, // PseudoVDIVU_VV_MF2_MASK = 761 CEFBS_HasVInstructions, // PseudoVDIVU_VV_MF2_TU = 762 CEFBS_HasVInstructions, // PseudoVDIVU_VV_MF4 = 763 CEFBS_HasVInstructions, // PseudoVDIVU_VV_MF4_MASK = 764 CEFBS_HasVInstructions, // PseudoVDIVU_VV_MF4_TU = 765 CEFBS_HasVInstructions, // PseudoVDIVU_VV_MF8 = 766 CEFBS_HasVInstructions, // PseudoVDIVU_VV_MF8_MASK = 767 CEFBS_HasVInstructions, // PseudoVDIVU_VV_MF8_TU = 768 CEFBS_HasVInstructions, // PseudoVDIVU_VX_M1 = 769 CEFBS_HasVInstructions, // PseudoVDIVU_VX_M1_MASK = 770 CEFBS_HasVInstructions, // PseudoVDIVU_VX_M1_TU = 771 CEFBS_HasVInstructions, // PseudoVDIVU_VX_M2 = 772 CEFBS_HasVInstructions, // PseudoVDIVU_VX_M2_MASK = 773 CEFBS_HasVInstructions, // PseudoVDIVU_VX_M2_TU = 774 CEFBS_HasVInstructions, // PseudoVDIVU_VX_M4 = 775 CEFBS_HasVInstructions, // PseudoVDIVU_VX_M4_MASK = 776 CEFBS_HasVInstructions, // PseudoVDIVU_VX_M4_TU = 777 CEFBS_HasVInstructions, // PseudoVDIVU_VX_M8 = 778 CEFBS_HasVInstructions, // PseudoVDIVU_VX_M8_MASK = 779 CEFBS_HasVInstructions, // PseudoVDIVU_VX_M8_TU = 780 CEFBS_HasVInstructions, // PseudoVDIVU_VX_MF2 = 781 CEFBS_HasVInstructions, // PseudoVDIVU_VX_MF2_MASK = 782 CEFBS_HasVInstructions, // PseudoVDIVU_VX_MF2_TU = 783 CEFBS_HasVInstructions, // PseudoVDIVU_VX_MF4 = 784 CEFBS_HasVInstructions, // PseudoVDIVU_VX_MF4_MASK = 785 CEFBS_HasVInstructions, // PseudoVDIVU_VX_MF4_TU = 786 CEFBS_HasVInstructions, // PseudoVDIVU_VX_MF8 = 787 CEFBS_HasVInstructions, // PseudoVDIVU_VX_MF8_MASK = 788 CEFBS_HasVInstructions, // PseudoVDIVU_VX_MF8_TU = 789 CEFBS_HasVInstructions, // PseudoVDIV_VV_M1 = 790 CEFBS_HasVInstructions, // PseudoVDIV_VV_M1_MASK = 791 CEFBS_HasVInstructions, // PseudoVDIV_VV_M1_TU = 792 CEFBS_HasVInstructions, // PseudoVDIV_VV_M2 = 793 CEFBS_HasVInstructions, // PseudoVDIV_VV_M2_MASK = 794 CEFBS_HasVInstructions, // PseudoVDIV_VV_M2_TU = 795 CEFBS_HasVInstructions, // PseudoVDIV_VV_M4 = 796 CEFBS_HasVInstructions, // PseudoVDIV_VV_M4_MASK = 797 CEFBS_HasVInstructions, // PseudoVDIV_VV_M4_TU = 798 CEFBS_HasVInstructions, // PseudoVDIV_VV_M8 = 799 CEFBS_HasVInstructions, // PseudoVDIV_VV_M8_MASK = 800 CEFBS_HasVInstructions, // PseudoVDIV_VV_M8_TU = 801 CEFBS_HasVInstructions, // PseudoVDIV_VV_MF2 = 802 CEFBS_HasVInstructions, // PseudoVDIV_VV_MF2_MASK = 803 CEFBS_HasVInstructions, // PseudoVDIV_VV_MF2_TU = 804 CEFBS_HasVInstructions, // PseudoVDIV_VV_MF4 = 805 CEFBS_HasVInstructions, // PseudoVDIV_VV_MF4_MASK = 806 CEFBS_HasVInstructions, // PseudoVDIV_VV_MF4_TU = 807 CEFBS_HasVInstructions, // PseudoVDIV_VV_MF8 = 808 CEFBS_HasVInstructions, // PseudoVDIV_VV_MF8_MASK = 809 CEFBS_HasVInstructions, // PseudoVDIV_VV_MF8_TU = 810 CEFBS_HasVInstructions, // PseudoVDIV_VX_M1 = 811 CEFBS_HasVInstructions, // PseudoVDIV_VX_M1_MASK = 812 CEFBS_HasVInstructions, // PseudoVDIV_VX_M1_TU = 813 CEFBS_HasVInstructions, // PseudoVDIV_VX_M2 = 814 CEFBS_HasVInstructions, // PseudoVDIV_VX_M2_MASK = 815 CEFBS_HasVInstructions, // PseudoVDIV_VX_M2_TU = 816 CEFBS_HasVInstructions, // PseudoVDIV_VX_M4 = 817 CEFBS_HasVInstructions, // PseudoVDIV_VX_M4_MASK = 818 CEFBS_HasVInstructions, // PseudoVDIV_VX_M4_TU = 819 CEFBS_HasVInstructions, // PseudoVDIV_VX_M8 = 820 CEFBS_HasVInstructions, // PseudoVDIV_VX_M8_MASK = 821 CEFBS_HasVInstructions, // PseudoVDIV_VX_M8_TU = 822 CEFBS_HasVInstructions, // PseudoVDIV_VX_MF2 = 823 CEFBS_HasVInstructions, // PseudoVDIV_VX_MF2_MASK = 824 CEFBS_HasVInstructions, // PseudoVDIV_VX_MF2_TU = 825 CEFBS_HasVInstructions, // PseudoVDIV_VX_MF4 = 826 CEFBS_HasVInstructions, // PseudoVDIV_VX_MF4_MASK = 827 CEFBS_HasVInstructions, // PseudoVDIV_VX_MF4_TU = 828 CEFBS_HasVInstructions, // PseudoVDIV_VX_MF8 = 829 CEFBS_HasVInstructions, // PseudoVDIV_VX_MF8_MASK = 830 CEFBS_HasVInstructions, // PseudoVDIV_VX_MF8_TU = 831 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF16_M1 = 832 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF16_M1_MASK = 833 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF16_M1_TU = 834 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF16_M2 = 835 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF16_M2_MASK = 836 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF16_M2_TU = 837 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF16_M4 = 838 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF16_M4_MASK = 839 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF16_M4_TU = 840 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF16_M8 = 841 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF16_M8_MASK = 842 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF16_M8_TU = 843 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF16_MF2 = 844 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF16_MF2_MASK = 845 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF16_MF2_TU = 846 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF16_MF4 = 847 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF16_MF4_MASK = 848 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF16_MF4_TU = 849 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF32_M1 = 850 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF32_M1_MASK = 851 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF32_M1_TU = 852 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF32_M2 = 853 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF32_M2_MASK = 854 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF32_M2_TU = 855 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF32_M4 = 856 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF32_M4_MASK = 857 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF32_M4_TU = 858 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF32_M8 = 859 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF32_M8_MASK = 860 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF32_M8_TU = 861 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF32_MF2 = 862 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF32_MF2_MASK = 863 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF32_MF2_TU = 864 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF64_M1 = 865 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF64_M1_MASK = 866 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF64_M1_TU = 867 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF64_M2 = 868 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF64_M2_MASK = 869 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF64_M2_TU = 870 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF64_M4 = 871 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF64_M4_MASK = 872 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF64_M4_TU = 873 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF64_M8 = 874 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF64_M8_MASK = 875 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VF64_M8_TU = 876 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VV_M1 = 877 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VV_M1_MASK = 878 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VV_M1_TU = 879 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VV_M2 = 880 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VV_M2_MASK = 881 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VV_M2_TU = 882 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VV_M4 = 883 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VV_M4_MASK = 884 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VV_M4_TU = 885 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VV_M8 = 886 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VV_M8_MASK = 887 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VV_M8_TU = 888 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VV_MF2 = 889 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VV_MF2_MASK = 890 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VV_MF2_TU = 891 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VV_MF4 = 892 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VV_MF4_MASK = 893 CEFBS_HasVInstructionsAnyF, // PseudoVFADD_VV_MF4_TU = 894 CEFBS_HasVInstructionsAnyF, // PseudoVFCLASS_V_M1 = 895 CEFBS_HasVInstructionsAnyF, // PseudoVFCLASS_V_M1_MASK = 896 CEFBS_HasVInstructionsAnyF, // PseudoVFCLASS_V_M1_TU = 897 CEFBS_HasVInstructionsAnyF, // PseudoVFCLASS_V_M2 = 898 CEFBS_HasVInstructionsAnyF, // PseudoVFCLASS_V_M2_MASK = 899 CEFBS_HasVInstructionsAnyF, // PseudoVFCLASS_V_M2_TU = 900 CEFBS_HasVInstructionsAnyF, // PseudoVFCLASS_V_M4 = 901 CEFBS_HasVInstructionsAnyF, // PseudoVFCLASS_V_M4_MASK = 902 CEFBS_HasVInstructionsAnyF, // PseudoVFCLASS_V_M4_TU = 903 CEFBS_HasVInstructionsAnyF, // PseudoVFCLASS_V_M8 = 904 CEFBS_HasVInstructionsAnyF, // PseudoVFCLASS_V_M8_MASK = 905 CEFBS_HasVInstructionsAnyF, // PseudoVFCLASS_V_M8_TU = 906 CEFBS_HasVInstructionsAnyF, // PseudoVFCLASS_V_MF2 = 907 CEFBS_HasVInstructionsAnyF, // PseudoVFCLASS_V_MF2_MASK = 908 CEFBS_HasVInstructionsAnyF, // PseudoVFCLASS_V_MF2_TU = 909 CEFBS_HasVInstructionsAnyF, // PseudoVFCLASS_V_MF4 = 910 CEFBS_HasVInstructionsAnyF, // PseudoVFCLASS_V_MF4_MASK = 911 CEFBS_HasVInstructionsAnyF, // PseudoVFCLASS_V_MF4_TU = 912 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_XU_V_M1 = 913 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_XU_V_M1_MASK = 914 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_XU_V_M1_TU = 915 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_XU_V_M2 = 916 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_XU_V_M2_MASK = 917 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_XU_V_M2_TU = 918 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_XU_V_M4 = 919 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_XU_V_M4_MASK = 920 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_XU_V_M4_TU = 921 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_XU_V_M8 = 922 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_XU_V_M8_MASK = 923 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_XU_V_M8_TU = 924 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_XU_V_MF2 = 925 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_XU_V_MF2_MASK = 926 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_XU_V_MF2_TU = 927 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_XU_V_MF4 = 928 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_XU_V_MF4_MASK = 929 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_XU_V_MF4_TU = 930 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_X_V_M1 = 931 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_X_V_M1_MASK = 932 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_X_V_M1_TU = 933 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_X_V_M2 = 934 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_X_V_M2_MASK = 935 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_X_V_M2_TU = 936 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_X_V_M4 = 937 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_X_V_M4_MASK = 938 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_X_V_M4_TU = 939 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_X_V_M8 = 940 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_X_V_M8_MASK = 941 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_X_V_M8_TU = 942 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_X_V_MF2 = 943 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_X_V_MF2_MASK = 944 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_X_V_MF2_TU = 945 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_X_V_MF4 = 946 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_X_V_MF4_MASK = 947 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_F_X_V_MF4_TU = 948 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_F_XU_V_M1_MASK = 949 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_F_XU_V_M2_MASK = 950 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_F_XU_V_M4_MASK = 951 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_F_XU_V_M8_MASK = 952 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_F_XU_V_MF2_MASK = 953 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_F_XU_V_MF4_MASK = 954 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_F_X_V_M1_MASK = 955 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_F_X_V_M2_MASK = 956 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_F_X_V_M4_MASK = 957 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_F_X_V_M8_MASK = 958 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_F_X_V_MF2_MASK = 959 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_F_X_V_MF4_MASK = 960 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_XU_F_V_M1_MASK = 961 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_XU_F_V_M2_MASK = 962 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_XU_F_V_M4_MASK = 963 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_XU_F_V_M8_MASK = 964 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_XU_F_V_MF2_MASK = 965 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_XU_F_V_MF4_MASK = 966 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_X_F_V_M1_MASK = 967 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_X_F_V_M2_MASK = 968 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_X_F_V_M4_MASK = 969 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_X_F_V_M8_MASK = 970 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_X_F_V_MF2_MASK = 971 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RM_X_F_V_MF4_MASK = 972 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_XU_F_V_M1 = 973 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_XU_F_V_M1_MASK = 974 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_XU_F_V_M1_TU = 975 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_XU_F_V_M2 = 976 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_XU_F_V_M2_MASK = 977 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_XU_F_V_M2_TU = 978 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_XU_F_V_M4 = 979 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_XU_F_V_M4_MASK = 980 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_XU_F_V_M4_TU = 981 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_XU_F_V_M8 = 982 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_XU_F_V_M8_MASK = 983 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_XU_F_V_M8_TU = 984 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_XU_F_V_MF2 = 985 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_XU_F_V_MF2_MASK = 986 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_XU_F_V_MF2_TU = 987 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_XU_F_V_MF4 = 988 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_XU_F_V_MF4_MASK = 989 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_XU_F_V_MF4_TU = 990 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_X_F_V_M1 = 991 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_X_F_V_M1_MASK = 992 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_X_F_V_M1_TU = 993 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_X_F_V_M2 = 994 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_X_F_V_M2_MASK = 995 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_X_F_V_M2_TU = 996 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_X_F_V_M4 = 997 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_X_F_V_M4_MASK = 998 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_X_F_V_M4_TU = 999 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_X_F_V_M8 = 1000 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_X_F_V_M8_MASK = 1001 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_X_F_V_M8_TU = 1002 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_X_F_V_MF2 = 1003 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_X_F_V_MF2_MASK = 1004 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_X_F_V_MF2_TU = 1005 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_X_F_V_MF4 = 1006 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_X_F_V_MF4_MASK = 1007 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_RTZ_X_F_V_MF4_TU = 1008 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_XU_F_V_M1 = 1009 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_XU_F_V_M1_MASK = 1010 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_XU_F_V_M1_TU = 1011 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_XU_F_V_M2 = 1012 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_XU_F_V_M2_MASK = 1013 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_XU_F_V_M2_TU = 1014 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_XU_F_V_M4 = 1015 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_XU_F_V_M4_MASK = 1016 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_XU_F_V_M4_TU = 1017 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_XU_F_V_M8 = 1018 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_XU_F_V_M8_MASK = 1019 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_XU_F_V_M8_TU = 1020 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_XU_F_V_MF2 = 1021 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_XU_F_V_MF2_MASK = 1022 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_XU_F_V_MF2_TU = 1023 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_XU_F_V_MF4 = 1024 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_XU_F_V_MF4_MASK = 1025 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_XU_F_V_MF4_TU = 1026 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_X_F_V_M1 = 1027 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_X_F_V_M1_MASK = 1028 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_X_F_V_M1_TU = 1029 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_X_F_V_M2 = 1030 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_X_F_V_M2_MASK = 1031 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_X_F_V_M2_TU = 1032 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_X_F_V_M4 = 1033 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_X_F_V_M4_MASK = 1034 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_X_F_V_M4_TU = 1035 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_X_F_V_M8 = 1036 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_X_F_V_M8_MASK = 1037 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_X_F_V_M8_TU = 1038 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_X_F_V_MF2 = 1039 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_X_F_V_MF2_MASK = 1040 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_X_F_V_MF2_TU = 1041 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_X_F_V_MF4 = 1042 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_X_F_V_MF4_MASK = 1043 CEFBS_HasVInstructionsAnyF, // PseudoVFCVT_X_F_V_MF4_TU = 1044 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF16_M1 = 1045 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF16_M1_MASK = 1046 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF16_M1_TU = 1047 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF16_M2 = 1048 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF16_M2_MASK = 1049 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF16_M2_TU = 1050 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF16_M4 = 1051 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF16_M4_MASK = 1052 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF16_M4_TU = 1053 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF16_M8 = 1054 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF16_M8_MASK = 1055 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF16_M8_TU = 1056 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF16_MF2 = 1057 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF16_MF2_MASK = 1058 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF16_MF2_TU = 1059 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF16_MF4 = 1060 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF16_MF4_MASK = 1061 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF16_MF4_TU = 1062 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF32_M1 = 1063 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF32_M1_MASK = 1064 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF32_M1_TU = 1065 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF32_M2 = 1066 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF32_M2_MASK = 1067 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF32_M2_TU = 1068 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF32_M4 = 1069 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF32_M4_MASK = 1070 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF32_M4_TU = 1071 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF32_M8 = 1072 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF32_M8_MASK = 1073 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF32_M8_TU = 1074 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF32_MF2 = 1075 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF32_MF2_MASK = 1076 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF32_MF2_TU = 1077 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF64_M1 = 1078 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF64_M1_MASK = 1079 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF64_M1_TU = 1080 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF64_M2 = 1081 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF64_M2_MASK = 1082 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF64_M2_TU = 1083 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF64_M4 = 1084 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF64_M4_MASK = 1085 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF64_M4_TU = 1086 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF64_M8 = 1087 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF64_M8_MASK = 1088 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VF64_M8_TU = 1089 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VV_M1 = 1090 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VV_M1_MASK = 1091 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VV_M1_TU = 1092 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VV_M2 = 1093 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VV_M2_MASK = 1094 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VV_M2_TU = 1095 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VV_M4 = 1096 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VV_M4_MASK = 1097 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VV_M4_TU = 1098 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VV_M8 = 1099 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VV_M8_MASK = 1100 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VV_M8_TU = 1101 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VV_MF2 = 1102 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VV_MF2_MASK = 1103 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VV_MF2_TU = 1104 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VV_MF4 = 1105 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VV_MF4_MASK = 1106 CEFBS_HasVInstructionsAnyF, // PseudoVFDIV_VV_MF4_TU = 1107 CEFBS_None, // PseudoVFIRST_M_B1 = 1108 CEFBS_None, // PseudoVFIRST_M_B16 = 1109 CEFBS_None, // PseudoVFIRST_M_B16_MASK = 1110 CEFBS_None, // PseudoVFIRST_M_B1_MASK = 1111 CEFBS_None, // PseudoVFIRST_M_B2 = 1112 CEFBS_None, // PseudoVFIRST_M_B2_MASK = 1113 CEFBS_None, // PseudoVFIRST_M_B32 = 1114 CEFBS_None, // PseudoVFIRST_M_B32_MASK = 1115 CEFBS_None, // PseudoVFIRST_M_B4 = 1116 CEFBS_None, // PseudoVFIRST_M_B4_MASK = 1117 CEFBS_None, // PseudoVFIRST_M_B64 = 1118 CEFBS_None, // PseudoVFIRST_M_B64_MASK = 1119 CEFBS_None, // PseudoVFIRST_M_B8 = 1120 CEFBS_None, // PseudoVFIRST_M_B8_MASK = 1121 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF16_M1 = 1122 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF16_M1_MASK = 1123 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF16_M2 = 1124 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF16_M2_MASK = 1125 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF16_M4 = 1126 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF16_M4_MASK = 1127 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF16_M8 = 1128 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF16_M8_MASK = 1129 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF16_MF2 = 1130 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF16_MF2_MASK = 1131 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF16_MF4 = 1132 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF16_MF4_MASK = 1133 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF32_M1 = 1134 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF32_M1_MASK = 1135 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF32_M2 = 1136 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF32_M2_MASK = 1137 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF32_M4 = 1138 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF32_M4_MASK = 1139 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF32_M8 = 1140 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF32_M8_MASK = 1141 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF32_MF2 = 1142 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF32_MF2_MASK = 1143 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF64_M1 = 1144 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF64_M1_MASK = 1145 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF64_M2 = 1146 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF64_M2_MASK = 1147 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF64_M4 = 1148 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF64_M4_MASK = 1149 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF64_M8 = 1150 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VF64_M8_MASK = 1151 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VV_M1 = 1152 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VV_M1_MASK = 1153 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VV_M2 = 1154 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VV_M2_MASK = 1155 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VV_M4 = 1156 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VV_M4_MASK = 1157 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VV_M8 = 1158 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VV_M8_MASK = 1159 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VV_MF2 = 1160 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VV_MF2_MASK = 1161 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VV_MF4 = 1162 CEFBS_HasVInstructionsAnyF, // PseudoVFMACC_VV_MF4_MASK = 1163 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF16_M1 = 1164 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF16_M1_MASK = 1165 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF16_M2 = 1166 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF16_M2_MASK = 1167 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF16_M4 = 1168 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF16_M4_MASK = 1169 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF16_M8 = 1170 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF16_M8_MASK = 1171 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF16_MF2 = 1172 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF16_MF2_MASK = 1173 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF16_MF4 = 1174 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF16_MF4_MASK = 1175 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF32_M1 = 1176 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF32_M1_MASK = 1177 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF32_M2 = 1178 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF32_M2_MASK = 1179 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF32_M4 = 1180 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF32_M4_MASK = 1181 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF32_M8 = 1182 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF32_M8_MASK = 1183 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF32_MF2 = 1184 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF32_MF2_MASK = 1185 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF64_M1 = 1186 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF64_M1_MASK = 1187 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF64_M2 = 1188 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF64_M2_MASK = 1189 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF64_M4 = 1190 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF64_M4_MASK = 1191 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF64_M8 = 1192 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VF64_M8_MASK = 1193 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VV_M1 = 1194 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VV_M1_MASK = 1195 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VV_M2 = 1196 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VV_M2_MASK = 1197 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VV_M4 = 1198 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VV_M4_MASK = 1199 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VV_M8 = 1200 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VV_M8_MASK = 1201 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VV_MF2 = 1202 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VV_MF2_MASK = 1203 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VV_MF4 = 1204 CEFBS_HasVInstructionsAnyF, // PseudoVFMADD_VV_MF4_MASK = 1205 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF16_M1 = 1206 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF16_M1_MASK = 1207 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF16_M1_TU = 1208 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF16_M2 = 1209 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF16_M2_MASK = 1210 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF16_M2_TU = 1211 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF16_M4 = 1212 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF16_M4_MASK = 1213 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF16_M4_TU = 1214 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF16_M8 = 1215 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF16_M8_MASK = 1216 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF16_M8_TU = 1217 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF16_MF2 = 1218 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF16_MF2_MASK = 1219 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF16_MF2_TU = 1220 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF16_MF4 = 1221 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF16_MF4_MASK = 1222 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF16_MF4_TU = 1223 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF32_M1 = 1224 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF32_M1_MASK = 1225 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF32_M1_TU = 1226 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF32_M2 = 1227 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF32_M2_MASK = 1228 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF32_M2_TU = 1229 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF32_M4 = 1230 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF32_M4_MASK = 1231 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF32_M4_TU = 1232 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF32_M8 = 1233 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF32_M8_MASK = 1234 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF32_M8_TU = 1235 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF32_MF2 = 1236 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF32_MF2_MASK = 1237 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF32_MF2_TU = 1238 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF64_M1 = 1239 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF64_M1_MASK = 1240 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF64_M1_TU = 1241 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF64_M2 = 1242 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF64_M2_MASK = 1243 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF64_M2_TU = 1244 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF64_M4 = 1245 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF64_M4_MASK = 1246 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF64_M4_TU = 1247 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF64_M8 = 1248 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF64_M8_MASK = 1249 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VF64_M8_TU = 1250 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VV_M1 = 1251 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VV_M1_MASK = 1252 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VV_M1_TU = 1253 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VV_M2 = 1254 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VV_M2_MASK = 1255 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VV_M2_TU = 1256 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VV_M4 = 1257 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VV_M4_MASK = 1258 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VV_M4_TU = 1259 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VV_M8 = 1260 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VV_M8_MASK = 1261 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VV_M8_TU = 1262 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VV_MF2 = 1263 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VV_MF2_MASK = 1264 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VV_MF2_TU = 1265 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VV_MF4 = 1266 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VV_MF4_MASK = 1267 CEFBS_HasVInstructionsAnyF, // PseudoVFMAX_VV_MF4_TU = 1268 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF16M_M1 = 1269 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF16M_M1_TU = 1270 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF16M_M2 = 1271 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF16M_M2_TU = 1272 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF16M_M4 = 1273 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF16M_M4_TU = 1274 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF16M_M8 = 1275 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF16M_M8_TU = 1276 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF16M_MF2 = 1277 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF16M_MF2_TU = 1278 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF16M_MF4 = 1279 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF16M_MF4_TU = 1280 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF32M_M1 = 1281 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF32M_M1_TU = 1282 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF32M_M2 = 1283 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF32M_M2_TU = 1284 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF32M_M4 = 1285 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF32M_M4_TU = 1286 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF32M_M8 = 1287 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF32M_M8_TU = 1288 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF32M_MF2 = 1289 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF32M_MF2_TU = 1290 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF64M_M1 = 1291 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF64M_M1_TU = 1292 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF64M_M2 = 1293 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF64M_M2_TU = 1294 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF64M_M4 = 1295 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF64M_M4_TU = 1296 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF64M_M8 = 1297 CEFBS_HasVInstructionsAnyF, // PseudoVFMERGE_VF64M_M8_TU = 1298 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF16_M1 = 1299 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF16_M1_MASK = 1300 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF16_M1_TU = 1301 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF16_M2 = 1302 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF16_M2_MASK = 1303 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF16_M2_TU = 1304 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF16_M4 = 1305 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF16_M4_MASK = 1306 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF16_M4_TU = 1307 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF16_M8 = 1308 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF16_M8_MASK = 1309 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF16_M8_TU = 1310 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF16_MF2 = 1311 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF16_MF2_MASK = 1312 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF16_MF2_TU = 1313 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF16_MF4 = 1314 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF16_MF4_MASK = 1315 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF16_MF4_TU = 1316 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF32_M1 = 1317 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF32_M1_MASK = 1318 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF32_M1_TU = 1319 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF32_M2 = 1320 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF32_M2_MASK = 1321 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF32_M2_TU = 1322 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF32_M4 = 1323 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF32_M4_MASK = 1324 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF32_M4_TU = 1325 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF32_M8 = 1326 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF32_M8_MASK = 1327 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF32_M8_TU = 1328 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF32_MF2 = 1329 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF32_MF2_MASK = 1330 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF32_MF2_TU = 1331 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF64_M1 = 1332 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF64_M1_MASK = 1333 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF64_M1_TU = 1334 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF64_M2 = 1335 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF64_M2_MASK = 1336 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF64_M2_TU = 1337 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF64_M4 = 1338 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF64_M4_MASK = 1339 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF64_M4_TU = 1340 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF64_M8 = 1341 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF64_M8_MASK = 1342 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VF64_M8_TU = 1343 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VV_M1 = 1344 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VV_M1_MASK = 1345 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VV_M1_TU = 1346 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VV_M2 = 1347 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VV_M2_MASK = 1348 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VV_M2_TU = 1349 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VV_M4 = 1350 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VV_M4_MASK = 1351 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VV_M4_TU = 1352 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VV_M8 = 1353 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VV_M8_MASK = 1354 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VV_M8_TU = 1355 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VV_MF2 = 1356 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VV_MF2_MASK = 1357 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VV_MF2_TU = 1358 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VV_MF4 = 1359 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VV_MF4_MASK = 1360 CEFBS_HasVInstructionsAnyF, // PseudoVFMIN_VV_MF4_TU = 1361 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF16_M1 = 1362 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF16_M1_MASK = 1363 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF16_M2 = 1364 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF16_M2_MASK = 1365 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF16_M4 = 1366 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF16_M4_MASK = 1367 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF16_M8 = 1368 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF16_M8_MASK = 1369 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF16_MF2 = 1370 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF16_MF2_MASK = 1371 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF16_MF4 = 1372 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF16_MF4_MASK = 1373 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF32_M1 = 1374 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF32_M1_MASK = 1375 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF32_M2 = 1376 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF32_M2_MASK = 1377 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF32_M4 = 1378 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF32_M4_MASK = 1379 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF32_M8 = 1380 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF32_M8_MASK = 1381 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF32_MF2 = 1382 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF32_MF2_MASK = 1383 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF64_M1 = 1384 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF64_M1_MASK = 1385 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF64_M2 = 1386 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF64_M2_MASK = 1387 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF64_M4 = 1388 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF64_M4_MASK = 1389 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF64_M8 = 1390 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VF64_M8_MASK = 1391 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VV_M1 = 1392 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VV_M1_MASK = 1393 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VV_M2 = 1394 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VV_M2_MASK = 1395 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VV_M4 = 1396 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VV_M4_MASK = 1397 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VV_M8 = 1398 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VV_M8_MASK = 1399 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VV_MF2 = 1400 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VV_MF2_MASK = 1401 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VV_MF4 = 1402 CEFBS_HasVInstructionsAnyF, // PseudoVFMSAC_VV_MF4_MASK = 1403 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF16_M1 = 1404 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF16_M1_MASK = 1405 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF16_M2 = 1406 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF16_M2_MASK = 1407 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF16_M4 = 1408 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF16_M4_MASK = 1409 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF16_M8 = 1410 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF16_M8_MASK = 1411 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF16_MF2 = 1412 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF16_MF2_MASK = 1413 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF16_MF4 = 1414 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF16_MF4_MASK = 1415 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF32_M1 = 1416 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF32_M1_MASK = 1417 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF32_M2 = 1418 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF32_M2_MASK = 1419 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF32_M4 = 1420 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF32_M4_MASK = 1421 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF32_M8 = 1422 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF32_M8_MASK = 1423 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF32_MF2 = 1424 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF32_MF2_MASK = 1425 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF64_M1 = 1426 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF64_M1_MASK = 1427 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF64_M2 = 1428 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF64_M2_MASK = 1429 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF64_M4 = 1430 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF64_M4_MASK = 1431 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF64_M8 = 1432 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VF64_M8_MASK = 1433 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VV_M1 = 1434 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VV_M1_MASK = 1435 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VV_M2 = 1436 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VV_M2_MASK = 1437 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VV_M4 = 1438 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VV_M4_MASK = 1439 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VV_M8 = 1440 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VV_M8_MASK = 1441 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VV_MF2 = 1442 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VV_MF2_MASK = 1443 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VV_MF4 = 1444 CEFBS_HasVInstructionsAnyF, // PseudoVFMSUB_VV_MF4_MASK = 1445 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF16_M1 = 1446 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF16_M1_MASK = 1447 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF16_M1_TU = 1448 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF16_M2 = 1449 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF16_M2_MASK = 1450 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF16_M2_TU = 1451 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF16_M4 = 1452 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF16_M4_MASK = 1453 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF16_M4_TU = 1454 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF16_M8 = 1455 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF16_M8_MASK = 1456 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF16_M8_TU = 1457 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF16_MF2 = 1458 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF16_MF2_MASK = 1459 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF16_MF2_TU = 1460 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF16_MF4 = 1461 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF16_MF4_MASK = 1462 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF16_MF4_TU = 1463 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF32_M1 = 1464 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF32_M1_MASK = 1465 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF32_M1_TU = 1466 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF32_M2 = 1467 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF32_M2_MASK = 1468 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF32_M2_TU = 1469 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF32_M4 = 1470 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF32_M4_MASK = 1471 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF32_M4_TU = 1472 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF32_M8 = 1473 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF32_M8_MASK = 1474 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF32_M8_TU = 1475 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF32_MF2 = 1476 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF32_MF2_MASK = 1477 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF32_MF2_TU = 1478 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF64_M1 = 1479 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF64_M1_MASK = 1480 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF64_M1_TU = 1481 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF64_M2 = 1482 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF64_M2_MASK = 1483 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF64_M2_TU = 1484 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF64_M4 = 1485 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF64_M4_MASK = 1486 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF64_M4_TU = 1487 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF64_M8 = 1488 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF64_M8_MASK = 1489 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VF64_M8_TU = 1490 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VV_M1 = 1491 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VV_M1_MASK = 1492 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VV_M1_TU = 1493 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VV_M2 = 1494 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VV_M2_MASK = 1495 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VV_M2_TU = 1496 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VV_M4 = 1497 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VV_M4_MASK = 1498 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VV_M4_TU = 1499 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VV_M8 = 1500 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VV_M8_MASK = 1501 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VV_M8_TU = 1502 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VV_MF2 = 1503 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VV_MF2_MASK = 1504 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VV_MF2_TU = 1505 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VV_MF4 = 1506 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VV_MF4_MASK = 1507 CEFBS_HasVInstructionsAnyF, // PseudoVFMUL_VV_MF4_TU = 1508 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_F16_S_M1 = 1509 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_F16_S_M2 = 1510 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_F16_S_M4 = 1511 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_F16_S_M8 = 1512 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_F16_S_MF2 = 1513 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_F16_S_MF4 = 1514 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_F32_S_M1 = 1515 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_F32_S_M2 = 1516 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_F32_S_M4 = 1517 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_F32_S_M8 = 1518 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_F32_S_MF2 = 1519 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_F64_S_M1 = 1520 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_F64_S_M2 = 1521 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_F64_S_M4 = 1522 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_F64_S_M8 = 1523 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_S_F16_M1 = 1524 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_S_F16_M2 = 1525 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_S_F16_M4 = 1526 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_S_F16_M8 = 1527 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_S_F16_MF2 = 1528 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_S_F16_MF4 = 1529 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_S_F32_M1 = 1530 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_S_F32_M2 = 1531 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_S_F32_M4 = 1532 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_S_F32_M8 = 1533 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_S_F32_MF2 = 1534 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_S_F64_M1 = 1535 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_S_F64_M2 = 1536 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_S_F64_M4 = 1537 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_S_F64_M8 = 1538 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F16_M1 = 1539 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F16_M1_TU = 1540 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F16_M2 = 1541 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F16_M2_TU = 1542 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F16_M4 = 1543 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F16_M4_TU = 1544 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F16_M8 = 1545 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F16_M8_TU = 1546 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F16_MF2 = 1547 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F16_MF2_TU = 1548 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F16_MF4 = 1549 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F16_MF4_TU = 1550 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F32_M1 = 1551 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F32_M1_TU = 1552 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F32_M2 = 1553 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F32_M2_TU = 1554 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F32_M4 = 1555 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F32_M4_TU = 1556 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F32_M8 = 1557 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F32_M8_TU = 1558 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F32_MF2 = 1559 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F32_MF2_TU = 1560 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F64_M1 = 1561 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F64_M1_TU = 1562 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F64_M2 = 1563 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F64_M2_TU = 1564 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F64_M4 = 1565 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F64_M4_TU = 1566 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F64_M8 = 1567 CEFBS_HasVInstructionsAnyF, // PseudoVFMV_V_F64_M8_TU = 1568 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_F_W_M1 = 1569 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_F_W_M1_MASK = 1570 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_F_W_M1_TU = 1571 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_F_W_M2 = 1572 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_F_W_M2_MASK = 1573 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_F_W_M2_TU = 1574 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_F_W_M4 = 1575 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_F_W_M4_MASK = 1576 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_F_W_M4_TU = 1577 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_F_W_MF2 = 1578 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_F_W_MF2_MASK = 1579 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_F_W_MF2_TU = 1580 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_F_W_MF4 = 1581 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_F_W_MF4_MASK = 1582 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_F_W_MF4_TU = 1583 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_XU_W_M1 = 1584 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_XU_W_M1_MASK = 1585 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_XU_W_M1_TU = 1586 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_XU_W_M2 = 1587 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_XU_W_M2_MASK = 1588 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_XU_W_M2_TU = 1589 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_XU_W_M4 = 1590 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_XU_W_M4_MASK = 1591 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_XU_W_M4_TU = 1592 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_XU_W_MF2 = 1593 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_XU_W_MF2_MASK = 1594 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_XU_W_MF2_TU = 1595 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_XU_W_MF4 = 1596 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_XU_W_MF4_MASK = 1597 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_XU_W_MF4_TU = 1598 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_X_W_M1 = 1599 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_X_W_M1_MASK = 1600 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_X_W_M1_TU = 1601 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_X_W_M2 = 1602 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_X_W_M2_MASK = 1603 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_X_W_M2_TU = 1604 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_X_W_M4 = 1605 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_X_W_M4_MASK = 1606 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_X_W_M4_TU = 1607 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_X_W_MF2 = 1608 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_X_W_MF2_MASK = 1609 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_X_W_MF2_TU = 1610 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_X_W_MF4 = 1611 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_X_W_MF4_MASK = 1612 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_F_X_W_MF4_TU = 1613 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_F_XU_W_M1_MASK = 1614 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_F_XU_W_M2_MASK = 1615 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_F_XU_W_M4_MASK = 1616 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_F_XU_W_MF2_MASK = 1617 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_F_XU_W_MF4_MASK = 1618 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_F_X_W_M1_MASK = 1619 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_F_X_W_M2_MASK = 1620 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_F_X_W_M4_MASK = 1621 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_F_X_W_MF2_MASK = 1622 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_F_X_W_MF4_MASK = 1623 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_XU_F_W_M1_MASK = 1624 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_XU_F_W_M2_MASK = 1625 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_XU_F_W_M4_MASK = 1626 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_XU_F_W_MF2_MASK = 1627 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_XU_F_W_MF4_MASK = 1628 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_XU_F_W_MF8_MASK = 1629 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_X_F_W_M1_MASK = 1630 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_X_F_W_M2_MASK = 1631 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_X_F_W_M4_MASK = 1632 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_X_F_W_MF2_MASK = 1633 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_X_F_W_MF4_MASK = 1634 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RM_X_F_W_MF8_MASK = 1635 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_ROD_F_F_W_M1 = 1636 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_ROD_F_F_W_M1_MASK = 1637 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_ROD_F_F_W_M1_TU = 1638 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_ROD_F_F_W_M2 = 1639 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_ROD_F_F_W_M2_MASK = 1640 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_ROD_F_F_W_M2_TU = 1641 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_ROD_F_F_W_M4 = 1642 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_ROD_F_F_W_M4_MASK = 1643 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_ROD_F_F_W_M4_TU = 1644 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_ROD_F_F_W_MF2 = 1645 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_ROD_F_F_W_MF2_MASK = 1646 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_ROD_F_F_W_MF2_TU = 1647 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_ROD_F_F_W_MF4 = 1648 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_ROD_F_F_W_MF4_MASK = 1649 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_ROD_F_F_W_MF4_TU = 1650 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_XU_F_W_M1 = 1651 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_XU_F_W_M1_MASK = 1652 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_XU_F_W_M1_TU = 1653 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_XU_F_W_M2 = 1654 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_XU_F_W_M2_MASK = 1655 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_XU_F_W_M2_TU = 1656 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_XU_F_W_M4 = 1657 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_XU_F_W_M4_MASK = 1658 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_XU_F_W_M4_TU = 1659 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_XU_F_W_MF2 = 1660 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_XU_F_W_MF2_MASK = 1661 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_XU_F_W_MF2_TU = 1662 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_XU_F_W_MF4 = 1663 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_XU_F_W_MF4_MASK = 1664 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_XU_F_W_MF4_TU = 1665 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_XU_F_W_MF8 = 1666 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_XU_F_W_MF8_MASK = 1667 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_XU_F_W_MF8_TU = 1668 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_X_F_W_M1 = 1669 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_X_F_W_M1_MASK = 1670 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_X_F_W_M1_TU = 1671 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_X_F_W_M2 = 1672 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_X_F_W_M2_MASK = 1673 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_X_F_W_M2_TU = 1674 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_X_F_W_M4 = 1675 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_X_F_W_M4_MASK = 1676 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_X_F_W_M4_TU = 1677 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_X_F_W_MF2 = 1678 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_X_F_W_MF2_MASK = 1679 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_X_F_W_MF2_TU = 1680 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_X_F_W_MF4 = 1681 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_X_F_W_MF4_MASK = 1682 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_X_F_W_MF4_TU = 1683 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_X_F_W_MF8 = 1684 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_X_F_W_MF8_MASK = 1685 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_RTZ_X_F_W_MF8_TU = 1686 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_XU_F_W_M1 = 1687 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_XU_F_W_M1_MASK = 1688 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_XU_F_W_M1_TU = 1689 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_XU_F_W_M2 = 1690 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_XU_F_W_M2_MASK = 1691 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_XU_F_W_M2_TU = 1692 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_XU_F_W_M4 = 1693 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_XU_F_W_M4_MASK = 1694 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_XU_F_W_M4_TU = 1695 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_XU_F_W_MF2 = 1696 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_XU_F_W_MF2_MASK = 1697 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_XU_F_W_MF2_TU = 1698 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_XU_F_W_MF4 = 1699 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_XU_F_W_MF4_MASK = 1700 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_XU_F_W_MF4_TU = 1701 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_XU_F_W_MF8 = 1702 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_XU_F_W_MF8_MASK = 1703 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_XU_F_W_MF8_TU = 1704 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_X_F_W_M1 = 1705 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_X_F_W_M1_MASK = 1706 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_X_F_W_M1_TU = 1707 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_X_F_W_M2 = 1708 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_X_F_W_M2_MASK = 1709 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_X_F_W_M2_TU = 1710 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_X_F_W_M4 = 1711 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_X_F_W_M4_MASK = 1712 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_X_F_W_M4_TU = 1713 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_X_F_W_MF2 = 1714 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_X_F_W_MF2_MASK = 1715 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_X_F_W_MF2_TU = 1716 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_X_F_W_MF4 = 1717 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_X_F_W_MF4_MASK = 1718 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_X_F_W_MF4_TU = 1719 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_X_F_W_MF8 = 1720 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_X_F_W_MF8_MASK = 1721 CEFBS_HasVInstructionsAnyF, // PseudoVFNCVT_X_F_W_MF8_TU = 1722 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF16_M1 = 1723 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF16_M1_MASK = 1724 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF16_M2 = 1725 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF16_M2_MASK = 1726 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF16_M4 = 1727 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF16_M4_MASK = 1728 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF16_M8 = 1729 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF16_M8_MASK = 1730 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF16_MF2 = 1731 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF16_MF2_MASK = 1732 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF16_MF4 = 1733 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF16_MF4_MASK = 1734 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF32_M1 = 1735 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF32_M1_MASK = 1736 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF32_M2 = 1737 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF32_M2_MASK = 1738 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF32_M4 = 1739 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF32_M4_MASK = 1740 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF32_M8 = 1741 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF32_M8_MASK = 1742 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF32_MF2 = 1743 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF32_MF2_MASK = 1744 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF64_M1 = 1745 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF64_M1_MASK = 1746 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF64_M2 = 1747 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF64_M2_MASK = 1748 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF64_M4 = 1749 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF64_M4_MASK = 1750 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF64_M8 = 1751 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VF64_M8_MASK = 1752 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VV_M1 = 1753 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VV_M1_MASK = 1754 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VV_M2 = 1755 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VV_M2_MASK = 1756 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VV_M4 = 1757 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VV_M4_MASK = 1758 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VV_M8 = 1759 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VV_M8_MASK = 1760 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VV_MF2 = 1761 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VV_MF2_MASK = 1762 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VV_MF4 = 1763 CEFBS_HasVInstructionsAnyF, // PseudoVFNMACC_VV_MF4_MASK = 1764 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF16_M1 = 1765 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF16_M1_MASK = 1766 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF16_M2 = 1767 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF16_M2_MASK = 1768 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF16_M4 = 1769 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF16_M4_MASK = 1770 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF16_M8 = 1771 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF16_M8_MASK = 1772 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF16_MF2 = 1773 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF16_MF2_MASK = 1774 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF16_MF4 = 1775 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF16_MF4_MASK = 1776 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF32_M1 = 1777 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF32_M1_MASK = 1778 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF32_M2 = 1779 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF32_M2_MASK = 1780 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF32_M4 = 1781 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF32_M4_MASK = 1782 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF32_M8 = 1783 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF32_M8_MASK = 1784 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF32_MF2 = 1785 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF32_MF2_MASK = 1786 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF64_M1 = 1787 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF64_M1_MASK = 1788 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF64_M2 = 1789 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF64_M2_MASK = 1790 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF64_M4 = 1791 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF64_M4_MASK = 1792 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF64_M8 = 1793 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VF64_M8_MASK = 1794 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VV_M1 = 1795 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VV_M1_MASK = 1796 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VV_M2 = 1797 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VV_M2_MASK = 1798 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VV_M4 = 1799 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VV_M4_MASK = 1800 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VV_M8 = 1801 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VV_M8_MASK = 1802 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VV_MF2 = 1803 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VV_MF2_MASK = 1804 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VV_MF4 = 1805 CEFBS_HasVInstructionsAnyF, // PseudoVFNMADD_VV_MF4_MASK = 1806 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF16_M1 = 1807 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF16_M1_MASK = 1808 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF16_M2 = 1809 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF16_M2_MASK = 1810 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF16_M4 = 1811 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF16_M4_MASK = 1812 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF16_M8 = 1813 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF16_M8_MASK = 1814 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF16_MF2 = 1815 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF16_MF2_MASK = 1816 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF16_MF4 = 1817 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF16_MF4_MASK = 1818 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF32_M1 = 1819 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF32_M1_MASK = 1820 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF32_M2 = 1821 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF32_M2_MASK = 1822 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF32_M4 = 1823 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF32_M4_MASK = 1824 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF32_M8 = 1825 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF32_M8_MASK = 1826 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF32_MF2 = 1827 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF32_MF2_MASK = 1828 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF64_M1 = 1829 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF64_M1_MASK = 1830 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF64_M2 = 1831 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF64_M2_MASK = 1832 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF64_M4 = 1833 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF64_M4_MASK = 1834 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF64_M8 = 1835 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VF64_M8_MASK = 1836 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VV_M1 = 1837 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VV_M1_MASK = 1838 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VV_M2 = 1839 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VV_M2_MASK = 1840 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VV_M4 = 1841 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VV_M4_MASK = 1842 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VV_M8 = 1843 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VV_M8_MASK = 1844 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VV_MF2 = 1845 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VV_MF2_MASK = 1846 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VV_MF4 = 1847 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSAC_VV_MF4_MASK = 1848 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF16_M1 = 1849 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF16_M1_MASK = 1850 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF16_M2 = 1851 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF16_M2_MASK = 1852 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF16_M4 = 1853 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF16_M4_MASK = 1854 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF16_M8 = 1855 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF16_M8_MASK = 1856 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF16_MF2 = 1857 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF16_MF2_MASK = 1858 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF16_MF4 = 1859 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF16_MF4_MASK = 1860 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF32_M1 = 1861 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF32_M1_MASK = 1862 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF32_M2 = 1863 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF32_M2_MASK = 1864 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF32_M4 = 1865 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF32_M4_MASK = 1866 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF32_M8 = 1867 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF32_M8_MASK = 1868 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF32_MF2 = 1869 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF32_MF2_MASK = 1870 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF64_M1 = 1871 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF64_M1_MASK = 1872 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF64_M2 = 1873 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF64_M2_MASK = 1874 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF64_M4 = 1875 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF64_M4_MASK = 1876 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF64_M8 = 1877 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VF64_M8_MASK = 1878 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VV_M1 = 1879 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VV_M1_MASK = 1880 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VV_M2 = 1881 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VV_M2_MASK = 1882 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VV_M4 = 1883 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VV_M4_MASK = 1884 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VV_M8 = 1885 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VV_M8_MASK = 1886 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VV_MF2 = 1887 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VV_MF2_MASK = 1888 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VV_MF4 = 1889 CEFBS_HasVInstructionsAnyF, // PseudoVFNMSUB_VV_MF4_MASK = 1890 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF16_M1 = 1891 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF16_M1_MASK = 1892 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF16_M1_TU = 1893 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF16_M2 = 1894 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF16_M2_MASK = 1895 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF16_M2_TU = 1896 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF16_M4 = 1897 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF16_M4_MASK = 1898 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF16_M4_TU = 1899 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF16_M8 = 1900 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF16_M8_MASK = 1901 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF16_M8_TU = 1902 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF16_MF2 = 1903 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF16_MF2_MASK = 1904 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF16_MF2_TU = 1905 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF16_MF4 = 1906 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF16_MF4_MASK = 1907 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF16_MF4_TU = 1908 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF32_M1 = 1909 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF32_M1_MASK = 1910 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF32_M1_TU = 1911 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF32_M2 = 1912 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF32_M2_MASK = 1913 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF32_M2_TU = 1914 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF32_M4 = 1915 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF32_M4_MASK = 1916 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF32_M4_TU = 1917 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF32_M8 = 1918 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF32_M8_MASK = 1919 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF32_M8_TU = 1920 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF32_MF2 = 1921 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF32_MF2_MASK = 1922 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF32_MF2_TU = 1923 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF64_M1 = 1924 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF64_M1_MASK = 1925 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF64_M1_TU = 1926 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF64_M2 = 1927 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF64_M2_MASK = 1928 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF64_M2_TU = 1929 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF64_M4 = 1930 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF64_M4_MASK = 1931 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF64_M4_TU = 1932 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF64_M8 = 1933 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF64_M8_MASK = 1934 CEFBS_HasVInstructionsAnyF, // PseudoVFRDIV_VF64_M8_TU = 1935 CEFBS_HasVInstructionsAnyF, // PseudoVFREC7_V_M1 = 1936 CEFBS_HasVInstructionsAnyF, // PseudoVFREC7_V_M1_MASK = 1937 CEFBS_HasVInstructionsAnyF, // PseudoVFREC7_V_M1_TU = 1938 CEFBS_HasVInstructionsAnyF, // PseudoVFREC7_V_M2 = 1939 CEFBS_HasVInstructionsAnyF, // PseudoVFREC7_V_M2_MASK = 1940 CEFBS_HasVInstructionsAnyF, // PseudoVFREC7_V_M2_TU = 1941 CEFBS_HasVInstructionsAnyF, // PseudoVFREC7_V_M4 = 1942 CEFBS_HasVInstructionsAnyF, // PseudoVFREC7_V_M4_MASK = 1943 CEFBS_HasVInstructionsAnyF, // PseudoVFREC7_V_M4_TU = 1944 CEFBS_HasVInstructionsAnyF, // PseudoVFREC7_V_M8 = 1945 CEFBS_HasVInstructionsAnyF, // PseudoVFREC7_V_M8_MASK = 1946 CEFBS_HasVInstructionsAnyF, // PseudoVFREC7_V_M8_TU = 1947 CEFBS_HasVInstructionsAnyF, // PseudoVFREC7_V_MF2 = 1948 CEFBS_HasVInstructionsAnyF, // PseudoVFREC7_V_MF2_MASK = 1949 CEFBS_HasVInstructionsAnyF, // PseudoVFREC7_V_MF2_TU = 1950 CEFBS_HasVInstructionsAnyF, // PseudoVFREC7_V_MF4 = 1951 CEFBS_HasVInstructionsAnyF, // PseudoVFREC7_V_MF4_MASK = 1952 CEFBS_HasVInstructionsAnyF, // PseudoVFREC7_V_MF4_TU = 1953 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMAX_VS_M1 = 1954 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMAX_VS_M1_MASK = 1955 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMAX_VS_M2 = 1956 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMAX_VS_M2_MASK = 1957 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMAX_VS_M4 = 1958 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMAX_VS_M4_MASK = 1959 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMAX_VS_M8 = 1960 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMAX_VS_M8_MASK = 1961 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMAX_VS_MF2 = 1962 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMAX_VS_MF2_MASK = 1963 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMAX_VS_MF4 = 1964 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMAX_VS_MF4_MASK = 1965 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMIN_VS_M1 = 1966 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMIN_VS_M1_MASK = 1967 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMIN_VS_M2 = 1968 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMIN_VS_M2_MASK = 1969 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMIN_VS_M4 = 1970 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMIN_VS_M4_MASK = 1971 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMIN_VS_M8 = 1972 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMIN_VS_M8_MASK = 1973 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMIN_VS_MF2 = 1974 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMIN_VS_MF2_MASK = 1975 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMIN_VS_MF4 = 1976 CEFBS_HasVInstructionsAnyF, // PseudoVFREDMIN_VS_MF4_MASK = 1977 CEFBS_HasVInstructionsAnyF, // PseudoVFREDOSUM_VS_M1 = 1978 CEFBS_HasVInstructionsAnyF, // PseudoVFREDOSUM_VS_M1_MASK = 1979 CEFBS_HasVInstructionsAnyF, // PseudoVFREDOSUM_VS_M2 = 1980 CEFBS_HasVInstructionsAnyF, // PseudoVFREDOSUM_VS_M2_MASK = 1981 CEFBS_HasVInstructionsAnyF, // PseudoVFREDOSUM_VS_M4 = 1982 CEFBS_HasVInstructionsAnyF, // PseudoVFREDOSUM_VS_M4_MASK = 1983 CEFBS_HasVInstructionsAnyF, // PseudoVFREDOSUM_VS_M8 = 1984 CEFBS_HasVInstructionsAnyF, // PseudoVFREDOSUM_VS_M8_MASK = 1985 CEFBS_HasVInstructionsAnyF, // PseudoVFREDOSUM_VS_MF2 = 1986 CEFBS_HasVInstructionsAnyF, // PseudoVFREDOSUM_VS_MF2_MASK = 1987 CEFBS_HasVInstructionsAnyF, // PseudoVFREDOSUM_VS_MF4 = 1988 CEFBS_HasVInstructionsAnyF, // PseudoVFREDOSUM_VS_MF4_MASK = 1989 CEFBS_HasVInstructionsAnyF, // PseudoVFREDUSUM_VS_M1 = 1990 CEFBS_HasVInstructionsAnyF, // PseudoVFREDUSUM_VS_M1_MASK = 1991 CEFBS_HasVInstructionsAnyF, // PseudoVFREDUSUM_VS_M2 = 1992 CEFBS_HasVInstructionsAnyF, // PseudoVFREDUSUM_VS_M2_MASK = 1993 CEFBS_HasVInstructionsAnyF, // PseudoVFREDUSUM_VS_M4 = 1994 CEFBS_HasVInstructionsAnyF, // PseudoVFREDUSUM_VS_M4_MASK = 1995 CEFBS_HasVInstructionsAnyF, // PseudoVFREDUSUM_VS_M8 = 1996 CEFBS_HasVInstructionsAnyF, // PseudoVFREDUSUM_VS_M8_MASK = 1997 CEFBS_HasVInstructionsAnyF, // PseudoVFREDUSUM_VS_MF2 = 1998 CEFBS_HasVInstructionsAnyF, // PseudoVFREDUSUM_VS_MF2_MASK = 1999 CEFBS_HasVInstructionsAnyF, // PseudoVFREDUSUM_VS_MF4 = 2000 CEFBS_HasVInstructionsAnyF, // PseudoVFREDUSUM_VS_MF4_MASK = 2001 CEFBS_HasVInstructionsAnyF, // PseudoVFROUND_NOEXCEPT_V_M1_MASK = 2002 CEFBS_HasVInstructionsAnyF, // PseudoVFROUND_NOEXCEPT_V_M2_MASK = 2003 CEFBS_HasVInstructionsAnyF, // PseudoVFROUND_NOEXCEPT_V_M4_MASK = 2004 CEFBS_HasVInstructionsAnyF, // PseudoVFROUND_NOEXCEPT_V_M8_MASK = 2005 CEFBS_HasVInstructionsAnyF, // PseudoVFROUND_NOEXCEPT_V_MF2_MASK = 2006 CEFBS_HasVInstructionsAnyF, // PseudoVFROUND_NOEXCEPT_V_MF4_MASK = 2007 CEFBS_HasVInstructionsAnyF, // PseudoVFRSQRT7_V_M1 = 2008 CEFBS_HasVInstructionsAnyF, // PseudoVFRSQRT7_V_M1_MASK = 2009 CEFBS_HasVInstructionsAnyF, // PseudoVFRSQRT7_V_M1_TU = 2010 CEFBS_HasVInstructionsAnyF, // PseudoVFRSQRT7_V_M2 = 2011 CEFBS_HasVInstructionsAnyF, // PseudoVFRSQRT7_V_M2_MASK = 2012 CEFBS_HasVInstructionsAnyF, // PseudoVFRSQRT7_V_M2_TU = 2013 CEFBS_HasVInstructionsAnyF, // PseudoVFRSQRT7_V_M4 = 2014 CEFBS_HasVInstructionsAnyF, // PseudoVFRSQRT7_V_M4_MASK = 2015 CEFBS_HasVInstructionsAnyF, // PseudoVFRSQRT7_V_M4_TU = 2016 CEFBS_HasVInstructionsAnyF, // PseudoVFRSQRT7_V_M8 = 2017 CEFBS_HasVInstructionsAnyF, // PseudoVFRSQRT7_V_M8_MASK = 2018 CEFBS_HasVInstructionsAnyF, // PseudoVFRSQRT7_V_M8_TU = 2019 CEFBS_HasVInstructionsAnyF, // PseudoVFRSQRT7_V_MF2 = 2020 CEFBS_HasVInstructionsAnyF, // PseudoVFRSQRT7_V_MF2_MASK = 2021 CEFBS_HasVInstructionsAnyF, // PseudoVFRSQRT7_V_MF2_TU = 2022 CEFBS_HasVInstructionsAnyF, // PseudoVFRSQRT7_V_MF4 = 2023 CEFBS_HasVInstructionsAnyF, // PseudoVFRSQRT7_V_MF4_MASK = 2024 CEFBS_HasVInstructionsAnyF, // PseudoVFRSQRT7_V_MF4_TU = 2025 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF16_M1 = 2026 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF16_M1_MASK = 2027 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF16_M1_TU = 2028 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF16_M2 = 2029 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF16_M2_MASK = 2030 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF16_M2_TU = 2031 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF16_M4 = 2032 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF16_M4_MASK = 2033 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF16_M4_TU = 2034 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF16_M8 = 2035 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF16_M8_MASK = 2036 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF16_M8_TU = 2037 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF16_MF2 = 2038 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF16_MF2_MASK = 2039 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF16_MF2_TU = 2040 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF16_MF4 = 2041 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF16_MF4_MASK = 2042 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF16_MF4_TU = 2043 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF32_M1 = 2044 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF32_M1_MASK = 2045 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF32_M1_TU = 2046 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF32_M2 = 2047 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF32_M2_MASK = 2048 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF32_M2_TU = 2049 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF32_M4 = 2050 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF32_M4_MASK = 2051 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF32_M4_TU = 2052 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF32_M8 = 2053 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF32_M8_MASK = 2054 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF32_M8_TU = 2055 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF32_MF2 = 2056 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF32_MF2_MASK = 2057 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF32_MF2_TU = 2058 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF64_M1 = 2059 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF64_M1_MASK = 2060 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF64_M1_TU = 2061 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF64_M2 = 2062 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF64_M2_MASK = 2063 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF64_M2_TU = 2064 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF64_M4 = 2065 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF64_M4_MASK = 2066 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF64_M4_TU = 2067 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF64_M8 = 2068 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF64_M8_MASK = 2069 CEFBS_HasVInstructionsAnyF, // PseudoVFRSUB_VF64_M8_TU = 2070 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF16_M1 = 2071 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF16_M1_MASK = 2072 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF16_M1_TU = 2073 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF16_M2 = 2074 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF16_M2_MASK = 2075 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF16_M2_TU = 2076 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF16_M4 = 2077 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF16_M4_MASK = 2078 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF16_M4_TU = 2079 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF16_M8 = 2080 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF16_M8_MASK = 2081 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF16_M8_TU = 2082 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF16_MF2 = 2083 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF16_MF2_MASK = 2084 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF16_MF2_TU = 2085 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF16_MF4 = 2086 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF16_MF4_MASK = 2087 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF16_MF4_TU = 2088 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF32_M1 = 2089 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF32_M1_MASK = 2090 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF32_M1_TU = 2091 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF32_M2 = 2092 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF32_M2_MASK = 2093 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF32_M2_TU = 2094 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF32_M4 = 2095 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF32_M4_MASK = 2096 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF32_M4_TU = 2097 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF32_M8 = 2098 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF32_M8_MASK = 2099 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF32_M8_TU = 2100 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF32_MF2 = 2101 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF32_MF2_MASK = 2102 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF32_MF2_TU = 2103 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF64_M1 = 2104 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF64_M1_MASK = 2105 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF64_M1_TU = 2106 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF64_M2 = 2107 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF64_M2_MASK = 2108 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF64_M2_TU = 2109 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF64_M4 = 2110 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF64_M4_MASK = 2111 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF64_M4_TU = 2112 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF64_M8 = 2113 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF64_M8_MASK = 2114 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VF64_M8_TU = 2115 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VV_M1 = 2116 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VV_M1_MASK = 2117 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VV_M1_TU = 2118 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VV_M2 = 2119 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VV_M2_MASK = 2120 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VV_M2_TU = 2121 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VV_M4 = 2122 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VV_M4_MASK = 2123 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VV_M4_TU = 2124 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VV_M8 = 2125 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VV_M8_MASK = 2126 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VV_M8_TU = 2127 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VV_MF2 = 2128 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VV_MF2_MASK = 2129 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VV_MF2_TU = 2130 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VV_MF4 = 2131 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VV_MF4_MASK = 2132 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJN_VV_MF4_TU = 2133 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF16_M1 = 2134 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF16_M1_MASK = 2135 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF16_M1_TU = 2136 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF16_M2 = 2137 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF16_M2_MASK = 2138 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF16_M2_TU = 2139 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF16_M4 = 2140 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF16_M4_MASK = 2141 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF16_M4_TU = 2142 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF16_M8 = 2143 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF16_M8_MASK = 2144 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF16_M8_TU = 2145 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF16_MF2 = 2146 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF16_MF2_MASK = 2147 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF16_MF2_TU = 2148 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF16_MF4 = 2149 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF16_MF4_MASK = 2150 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF16_MF4_TU = 2151 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF32_M1 = 2152 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF32_M1_MASK = 2153 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF32_M1_TU = 2154 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF32_M2 = 2155 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF32_M2_MASK = 2156 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF32_M2_TU = 2157 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF32_M4 = 2158 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF32_M4_MASK = 2159 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF32_M4_TU = 2160 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF32_M8 = 2161 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF32_M8_MASK = 2162 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF32_M8_TU = 2163 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF32_MF2 = 2164 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF32_MF2_MASK = 2165 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF32_MF2_TU = 2166 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF64_M1 = 2167 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF64_M1_MASK = 2168 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF64_M1_TU = 2169 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF64_M2 = 2170 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF64_M2_MASK = 2171 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF64_M2_TU = 2172 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF64_M4 = 2173 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF64_M4_MASK = 2174 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF64_M4_TU = 2175 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF64_M8 = 2176 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF64_M8_MASK = 2177 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VF64_M8_TU = 2178 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VV_M1 = 2179 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VV_M1_MASK = 2180 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VV_M1_TU = 2181 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VV_M2 = 2182 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VV_M2_MASK = 2183 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VV_M2_TU = 2184 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VV_M4 = 2185 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VV_M4_MASK = 2186 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VV_M4_TU = 2187 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VV_M8 = 2188 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VV_M8_MASK = 2189 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VV_M8_TU = 2190 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VV_MF2 = 2191 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VV_MF2_MASK = 2192 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VV_MF2_TU = 2193 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VV_MF4 = 2194 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VV_MF4_MASK = 2195 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJX_VV_MF4_TU = 2196 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF16_M1 = 2197 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF16_M1_MASK = 2198 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF16_M1_TU = 2199 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF16_M2 = 2200 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF16_M2_MASK = 2201 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF16_M2_TU = 2202 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF16_M4 = 2203 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF16_M4_MASK = 2204 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF16_M4_TU = 2205 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF16_M8 = 2206 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF16_M8_MASK = 2207 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF16_M8_TU = 2208 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF16_MF2 = 2209 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF16_MF2_MASK = 2210 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF16_MF2_TU = 2211 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF16_MF4 = 2212 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF16_MF4_MASK = 2213 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF16_MF4_TU = 2214 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF32_M1 = 2215 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF32_M1_MASK = 2216 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF32_M1_TU = 2217 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF32_M2 = 2218 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF32_M2_MASK = 2219 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF32_M2_TU = 2220 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF32_M4 = 2221 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF32_M4_MASK = 2222 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF32_M4_TU = 2223 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF32_M8 = 2224 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF32_M8_MASK = 2225 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF32_M8_TU = 2226 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF32_MF2 = 2227 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF32_MF2_MASK = 2228 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF32_MF2_TU = 2229 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF64_M1 = 2230 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF64_M1_MASK = 2231 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF64_M1_TU = 2232 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF64_M2 = 2233 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF64_M2_MASK = 2234 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF64_M2_TU = 2235 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF64_M4 = 2236 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF64_M4_MASK = 2237 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF64_M4_TU = 2238 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF64_M8 = 2239 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF64_M8_MASK = 2240 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VF64_M8_TU = 2241 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VV_M1 = 2242 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VV_M1_MASK = 2243 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VV_M1_TU = 2244 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VV_M2 = 2245 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VV_M2_MASK = 2246 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VV_M2_TU = 2247 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VV_M4 = 2248 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VV_M4_MASK = 2249 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VV_M4_TU = 2250 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VV_M8 = 2251 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VV_M8_MASK = 2252 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VV_M8_TU = 2253 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VV_MF2 = 2254 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VV_MF2_MASK = 2255 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VV_MF2_TU = 2256 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VV_MF4 = 2257 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VV_MF4_MASK = 2258 CEFBS_HasVInstructionsAnyF, // PseudoVFSGNJ_VV_MF4_TU = 2259 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF16_M1 = 2260 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF16_M1_MASK = 2261 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF16_M1_TU = 2262 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF16_M2 = 2263 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF16_M2_MASK = 2264 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF16_M2_TU = 2265 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF16_M4 = 2266 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF16_M4_MASK = 2267 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF16_M4_TU = 2268 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF16_M8 = 2269 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF16_M8_MASK = 2270 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF16_M8_TU = 2271 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF16_MF2 = 2272 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF16_MF2_MASK = 2273 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF16_MF2_TU = 2274 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF16_MF4 = 2275 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF16_MF4_MASK = 2276 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF16_MF4_TU = 2277 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF32_M1 = 2278 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF32_M1_MASK = 2279 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF32_M1_TU = 2280 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF32_M2 = 2281 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF32_M2_MASK = 2282 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF32_M2_TU = 2283 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF32_M4 = 2284 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF32_M4_MASK = 2285 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF32_M4_TU = 2286 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF32_M8 = 2287 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF32_M8_MASK = 2288 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF32_M8_TU = 2289 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF32_MF2 = 2290 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF32_MF2_MASK = 2291 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF32_MF2_TU = 2292 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF64_M1 = 2293 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF64_M1_MASK = 2294 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF64_M1_TU = 2295 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF64_M2 = 2296 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF64_M2_MASK = 2297 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF64_M2_TU = 2298 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF64_M4 = 2299 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF64_M4_MASK = 2300 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF64_M4_TU = 2301 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF64_M8 = 2302 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF64_M8_MASK = 2303 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1DOWN_VF64_M8_TU = 2304 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF16_M1 = 2305 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF16_M1_MASK = 2306 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF16_M1_TU = 2307 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF16_M2 = 2308 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF16_M2_MASK = 2309 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF16_M2_TU = 2310 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF16_M4 = 2311 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF16_M4_MASK = 2312 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF16_M4_TU = 2313 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF16_M8 = 2314 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF16_M8_MASK = 2315 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF16_M8_TU = 2316 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF16_MF2 = 2317 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF16_MF2_MASK = 2318 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF16_MF2_TU = 2319 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF16_MF4 = 2320 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF16_MF4_MASK = 2321 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF16_MF4_TU = 2322 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF32_M1 = 2323 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF32_M1_MASK = 2324 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF32_M1_TU = 2325 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF32_M2 = 2326 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF32_M2_MASK = 2327 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF32_M2_TU = 2328 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF32_M4 = 2329 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF32_M4_MASK = 2330 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF32_M4_TU = 2331 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF32_M8 = 2332 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF32_M8_MASK = 2333 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF32_M8_TU = 2334 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF32_MF2 = 2335 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF32_MF2_MASK = 2336 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF32_MF2_TU = 2337 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF64_M1 = 2338 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF64_M1_MASK = 2339 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF64_M1_TU = 2340 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF64_M2 = 2341 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF64_M2_MASK = 2342 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF64_M2_TU = 2343 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF64_M4 = 2344 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF64_M4_MASK = 2345 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF64_M4_TU = 2346 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF64_M8 = 2347 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF64_M8_MASK = 2348 CEFBS_HasVInstructionsAnyF, // PseudoVFSLIDE1UP_VF64_M8_TU = 2349 CEFBS_HasVInstructionsAnyF, // PseudoVFSQRT_V_M1 = 2350 CEFBS_HasVInstructionsAnyF, // PseudoVFSQRT_V_M1_MASK = 2351 CEFBS_HasVInstructionsAnyF, // PseudoVFSQRT_V_M1_TU = 2352 CEFBS_HasVInstructionsAnyF, // PseudoVFSQRT_V_M2 = 2353 CEFBS_HasVInstructionsAnyF, // PseudoVFSQRT_V_M2_MASK = 2354 CEFBS_HasVInstructionsAnyF, // PseudoVFSQRT_V_M2_TU = 2355 CEFBS_HasVInstructionsAnyF, // PseudoVFSQRT_V_M4 = 2356 CEFBS_HasVInstructionsAnyF, // PseudoVFSQRT_V_M4_MASK = 2357 CEFBS_HasVInstructionsAnyF, // PseudoVFSQRT_V_M4_TU = 2358 CEFBS_HasVInstructionsAnyF, // PseudoVFSQRT_V_M8 = 2359 CEFBS_HasVInstructionsAnyF, // PseudoVFSQRT_V_M8_MASK = 2360 CEFBS_HasVInstructionsAnyF, // PseudoVFSQRT_V_M8_TU = 2361 CEFBS_HasVInstructionsAnyF, // PseudoVFSQRT_V_MF2 = 2362 CEFBS_HasVInstructionsAnyF, // PseudoVFSQRT_V_MF2_MASK = 2363 CEFBS_HasVInstructionsAnyF, // PseudoVFSQRT_V_MF2_TU = 2364 CEFBS_HasVInstructionsAnyF, // PseudoVFSQRT_V_MF4 = 2365 CEFBS_HasVInstructionsAnyF, // PseudoVFSQRT_V_MF4_MASK = 2366 CEFBS_HasVInstructionsAnyF, // PseudoVFSQRT_V_MF4_TU = 2367 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF16_M1 = 2368 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF16_M1_MASK = 2369 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF16_M1_TU = 2370 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF16_M2 = 2371 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF16_M2_MASK = 2372 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF16_M2_TU = 2373 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF16_M4 = 2374 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF16_M4_MASK = 2375 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF16_M4_TU = 2376 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF16_M8 = 2377 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF16_M8_MASK = 2378 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF16_M8_TU = 2379 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF16_MF2 = 2380 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF16_MF2_MASK = 2381 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF16_MF2_TU = 2382 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF16_MF4 = 2383 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF16_MF4_MASK = 2384 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF16_MF4_TU = 2385 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF32_M1 = 2386 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF32_M1_MASK = 2387 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF32_M1_TU = 2388 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF32_M2 = 2389 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF32_M2_MASK = 2390 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF32_M2_TU = 2391 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF32_M4 = 2392 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF32_M4_MASK = 2393 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF32_M4_TU = 2394 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF32_M8 = 2395 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF32_M8_MASK = 2396 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF32_M8_TU = 2397 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF32_MF2 = 2398 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF32_MF2_MASK = 2399 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF32_MF2_TU = 2400 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF64_M1 = 2401 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF64_M1_MASK = 2402 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF64_M1_TU = 2403 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF64_M2 = 2404 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF64_M2_MASK = 2405 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF64_M2_TU = 2406 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF64_M4 = 2407 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF64_M4_MASK = 2408 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF64_M4_TU = 2409 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF64_M8 = 2410 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF64_M8_MASK = 2411 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VF64_M8_TU = 2412 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VV_M1 = 2413 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VV_M1_MASK = 2414 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VV_M1_TU = 2415 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VV_M2 = 2416 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VV_M2_MASK = 2417 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VV_M2_TU = 2418 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VV_M4 = 2419 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VV_M4_MASK = 2420 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VV_M4_TU = 2421 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VV_M8 = 2422 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VV_M8_MASK = 2423 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VV_M8_TU = 2424 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VV_MF2 = 2425 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VV_MF2_MASK = 2426 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VV_MF2_TU = 2427 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VV_MF4 = 2428 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VV_MF4_MASK = 2429 CEFBS_HasVInstructionsAnyF, // PseudoVFSUB_VV_MF4_TU = 2430 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF16_M1 = 2431 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF16_M1_MASK = 2432 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF16_M1_TU = 2433 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF16_M2 = 2434 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF16_M2_MASK = 2435 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF16_M2_TU = 2436 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF16_M4 = 2437 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF16_M4_MASK = 2438 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF16_M4_TU = 2439 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF16_MF2 = 2440 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF16_MF2_MASK = 2441 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF16_MF2_TU = 2442 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF16_MF4 = 2443 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF16_MF4_MASK = 2444 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF16_MF4_TU = 2445 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF32_M1 = 2446 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF32_M1_MASK = 2447 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF32_M1_TU = 2448 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF32_M2 = 2449 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF32_M2_MASK = 2450 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF32_M2_TU = 2451 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF32_M4 = 2452 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF32_M4_MASK = 2453 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF32_M4_TU = 2454 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF32_MF2 = 2455 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF32_MF2_MASK = 2456 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VF32_MF2_TU = 2457 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VV_M1 = 2458 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VV_M1_MASK = 2459 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VV_M1_TU = 2460 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VV_M2 = 2461 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VV_M2_MASK = 2462 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VV_M2_TU = 2463 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VV_M4 = 2464 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VV_M4_MASK = 2465 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VV_M4_TU = 2466 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VV_MF2 = 2467 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VV_MF2_MASK = 2468 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VV_MF2_TU = 2469 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VV_MF4 = 2470 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VV_MF4_MASK = 2471 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_VV_MF4_TU = 2472 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF16_M1 = 2473 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF16_M1_MASK = 2474 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF16_M1_TU = 2475 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF16_M2 = 2476 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF16_M2_MASK = 2477 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF16_M2_TU = 2478 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF16_M4 = 2479 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF16_M4_MASK = 2480 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF16_M4_TU = 2481 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF16_MF2 = 2482 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF16_MF2_MASK = 2483 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF16_MF2_TU = 2484 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF16_MF4 = 2485 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF16_MF4_MASK = 2486 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF16_MF4_TU = 2487 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF32_M1 = 2488 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF32_M1_MASK = 2489 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF32_M1_TU = 2490 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF32_M2 = 2491 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF32_M2_MASK = 2492 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF32_M2_TU = 2493 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF32_M4 = 2494 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF32_M4_MASK = 2495 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF32_M4_TU = 2496 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF32_MF2 = 2497 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF32_MF2_MASK = 2498 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WF32_MF2_TU = 2499 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_M1 = 2500 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_M1_MASK = 2501 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_M1_MASK_TIED = 2502 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_M1_TIED = 2503 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_M1_TU = 2504 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_M2 = 2505 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_M2_MASK = 2506 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_M2_MASK_TIED = 2507 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_M2_TIED = 2508 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_M2_TU = 2509 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_M4 = 2510 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_M4_MASK = 2511 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_M4_MASK_TIED = 2512 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_M4_TIED = 2513 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_M4_TU = 2514 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_MF2 = 2515 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_MF2_MASK = 2516 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_MF2_MASK_TIED = 2517 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_MF2_TIED = 2518 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_MF2_TU = 2519 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_MF4 = 2520 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_MF4_MASK = 2521 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_MF4_MASK_TIED = 2522 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_MF4_TIED = 2523 CEFBS_HasVInstructionsAnyF, // PseudoVFWADD_WV_MF4_TU = 2524 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_F_V_M1 = 2525 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_F_V_M1_MASK = 2526 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_F_V_M1_TU = 2527 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_F_V_M2 = 2528 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_F_V_M2_MASK = 2529 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_F_V_M2_TU = 2530 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_F_V_M4 = 2531 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_F_V_M4_MASK = 2532 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_F_V_M4_TU = 2533 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_F_V_MF2 = 2534 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_F_V_MF2_MASK = 2535 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_F_V_MF2_TU = 2536 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_F_V_MF4 = 2537 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_F_V_MF4_MASK = 2538 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_F_V_MF4_TU = 2539 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_XU_V_M1 = 2540 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_XU_V_M1_MASK = 2541 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_XU_V_M1_TU = 2542 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_XU_V_M2 = 2543 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_XU_V_M2_MASK = 2544 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_XU_V_M2_TU = 2545 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_XU_V_M4 = 2546 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_XU_V_M4_MASK = 2547 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_XU_V_M4_TU = 2548 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_XU_V_MF2 = 2549 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_XU_V_MF2_MASK = 2550 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_XU_V_MF2_TU = 2551 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_XU_V_MF4 = 2552 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_XU_V_MF4_MASK = 2553 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_XU_V_MF4_TU = 2554 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_XU_V_MF8 = 2555 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_XU_V_MF8_MASK = 2556 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_XU_V_MF8_TU = 2557 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_X_V_M1 = 2558 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_X_V_M1_MASK = 2559 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_X_V_M1_TU = 2560 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_X_V_M2 = 2561 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_X_V_M2_MASK = 2562 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_X_V_M2_TU = 2563 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_X_V_M4 = 2564 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_X_V_M4_MASK = 2565 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_X_V_M4_TU = 2566 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_X_V_MF2 = 2567 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_X_V_MF2_MASK = 2568 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_X_V_MF2_TU = 2569 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_X_V_MF4 = 2570 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_X_V_MF4_MASK = 2571 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_X_V_MF4_TU = 2572 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_X_V_MF8 = 2573 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_X_V_MF8_MASK = 2574 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_F_X_V_MF8_TU = 2575 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_F_XU_V_M1_MASK = 2576 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_F_XU_V_M2_MASK = 2577 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_F_XU_V_M4_MASK = 2578 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_F_XU_V_MF2_MASK = 2579 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_F_XU_V_MF4_MASK = 2580 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_F_XU_V_MF8_MASK = 2581 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_F_X_V_M1_MASK = 2582 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_F_X_V_M2_MASK = 2583 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_F_X_V_M4_MASK = 2584 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_F_X_V_MF2_MASK = 2585 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_F_X_V_MF4_MASK = 2586 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_F_X_V_MF8_MASK = 2587 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_XU_F_V_M1_MASK = 2588 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_XU_F_V_M2_MASK = 2589 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_XU_F_V_M4_MASK = 2590 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_XU_F_V_MF2_MASK = 2591 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_XU_F_V_MF4_MASK = 2592 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_X_F_V_M1_MASK = 2593 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_X_F_V_M2_MASK = 2594 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_X_F_V_M4_MASK = 2595 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_X_F_V_MF2_MASK = 2596 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RM_X_F_V_MF4_MASK = 2597 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_XU_F_V_M1 = 2598 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_XU_F_V_M1_MASK = 2599 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_XU_F_V_M1_TU = 2600 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_XU_F_V_M2 = 2601 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_XU_F_V_M2_MASK = 2602 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_XU_F_V_M2_TU = 2603 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_XU_F_V_M4 = 2604 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_XU_F_V_M4_MASK = 2605 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_XU_F_V_M4_TU = 2606 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_XU_F_V_MF2 = 2607 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_XU_F_V_MF2_MASK = 2608 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_XU_F_V_MF2_TU = 2609 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_XU_F_V_MF4 = 2610 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_XU_F_V_MF4_MASK = 2611 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_XU_F_V_MF4_TU = 2612 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_X_F_V_M1 = 2613 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_X_F_V_M1_MASK = 2614 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_X_F_V_M1_TU = 2615 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_X_F_V_M2 = 2616 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_X_F_V_M2_MASK = 2617 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_X_F_V_M2_TU = 2618 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_X_F_V_M4 = 2619 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_X_F_V_M4_MASK = 2620 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_X_F_V_M4_TU = 2621 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_X_F_V_MF2 = 2622 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_X_F_V_MF2_MASK = 2623 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_X_F_V_MF2_TU = 2624 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_X_F_V_MF4 = 2625 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_X_F_V_MF4_MASK = 2626 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_RTZ_X_F_V_MF4_TU = 2627 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_XU_F_V_M1 = 2628 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_XU_F_V_M1_MASK = 2629 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_XU_F_V_M1_TU = 2630 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_XU_F_V_M2 = 2631 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_XU_F_V_M2_MASK = 2632 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_XU_F_V_M2_TU = 2633 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_XU_F_V_M4 = 2634 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_XU_F_V_M4_MASK = 2635 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_XU_F_V_M4_TU = 2636 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_XU_F_V_MF2 = 2637 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_XU_F_V_MF2_MASK = 2638 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_XU_F_V_MF2_TU = 2639 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_XU_F_V_MF4 = 2640 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_XU_F_V_MF4_MASK = 2641 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_XU_F_V_MF4_TU = 2642 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_X_F_V_M1 = 2643 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_X_F_V_M1_MASK = 2644 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_X_F_V_M1_TU = 2645 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_X_F_V_M2 = 2646 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_X_F_V_M2_MASK = 2647 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_X_F_V_M2_TU = 2648 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_X_F_V_M4 = 2649 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_X_F_V_M4_MASK = 2650 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_X_F_V_M4_TU = 2651 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_X_F_V_MF2 = 2652 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_X_F_V_MF2_MASK = 2653 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_X_F_V_MF2_TU = 2654 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_X_F_V_MF4 = 2655 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_X_F_V_MF4_MASK = 2656 CEFBS_HasVInstructionsAnyF, // PseudoVFWCVT_X_F_V_MF4_TU = 2657 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VF16_M1 = 2658 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VF16_M1_MASK = 2659 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VF16_M2 = 2660 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VF16_M2_MASK = 2661 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VF16_M4 = 2662 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VF16_M4_MASK = 2663 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VF16_MF2 = 2664 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VF16_MF2_MASK = 2665 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VF16_MF4 = 2666 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VF16_MF4_MASK = 2667 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VF32_M1 = 2668 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VF32_M1_MASK = 2669 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VF32_M2 = 2670 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VF32_M2_MASK = 2671 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VF32_M4 = 2672 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VF32_M4_MASK = 2673 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VF32_MF2 = 2674 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VF32_MF2_MASK = 2675 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VV_M1 = 2676 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VV_M1_MASK = 2677 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VV_M2 = 2678 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VV_M2_MASK = 2679 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VV_M4 = 2680 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VV_M4_MASK = 2681 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VV_MF2 = 2682 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VV_MF2_MASK = 2683 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VV_MF4 = 2684 CEFBS_HasVInstructionsAnyF, // PseudoVFWMACC_VV_MF4_MASK = 2685 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VF16_M1 = 2686 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VF16_M1_MASK = 2687 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VF16_M2 = 2688 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VF16_M2_MASK = 2689 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VF16_M4 = 2690 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VF16_M4_MASK = 2691 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VF16_MF2 = 2692 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VF16_MF2_MASK = 2693 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VF16_MF4 = 2694 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VF16_MF4_MASK = 2695 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VF32_M1 = 2696 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VF32_M1_MASK = 2697 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VF32_M2 = 2698 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VF32_M2_MASK = 2699 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VF32_M4 = 2700 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VF32_M4_MASK = 2701 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VF32_MF2 = 2702 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VF32_MF2_MASK = 2703 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VV_M1 = 2704 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VV_M1_MASK = 2705 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VV_M2 = 2706 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VV_M2_MASK = 2707 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VV_M4 = 2708 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VV_M4_MASK = 2709 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VV_MF2 = 2710 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VV_MF2_MASK = 2711 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VV_MF4 = 2712 CEFBS_HasVInstructionsAnyF, // PseudoVFWMSAC_VV_MF4_MASK = 2713 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF16_M1 = 2714 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF16_M1_MASK = 2715 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF16_M1_TU = 2716 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF16_M2 = 2717 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF16_M2_MASK = 2718 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF16_M2_TU = 2719 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF16_M4 = 2720 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF16_M4_MASK = 2721 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF16_M4_TU = 2722 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF16_MF2 = 2723 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF16_MF2_MASK = 2724 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF16_MF2_TU = 2725 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF16_MF4 = 2726 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF16_MF4_MASK = 2727 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF16_MF4_TU = 2728 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF32_M1 = 2729 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF32_M1_MASK = 2730 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF32_M1_TU = 2731 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF32_M2 = 2732 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF32_M2_MASK = 2733 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF32_M2_TU = 2734 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF32_M4 = 2735 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF32_M4_MASK = 2736 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF32_M4_TU = 2737 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF32_MF2 = 2738 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF32_MF2_MASK = 2739 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VF32_MF2_TU = 2740 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VV_M1 = 2741 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VV_M1_MASK = 2742 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VV_M1_TU = 2743 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VV_M2 = 2744 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VV_M2_MASK = 2745 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VV_M2_TU = 2746 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VV_M4 = 2747 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VV_M4_MASK = 2748 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VV_M4_TU = 2749 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VV_MF2 = 2750 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VV_MF2_MASK = 2751 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VV_MF2_TU = 2752 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VV_MF4 = 2753 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VV_MF4_MASK = 2754 CEFBS_HasVInstructionsAnyF, // PseudoVFWMUL_VV_MF4_TU = 2755 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VF16_M1 = 2756 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VF16_M1_MASK = 2757 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VF16_M2 = 2758 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VF16_M2_MASK = 2759 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VF16_M4 = 2760 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VF16_M4_MASK = 2761 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VF16_MF2 = 2762 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VF16_MF2_MASK = 2763 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VF16_MF4 = 2764 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VF16_MF4_MASK = 2765 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VF32_M1 = 2766 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VF32_M1_MASK = 2767 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VF32_M2 = 2768 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VF32_M2_MASK = 2769 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VF32_M4 = 2770 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VF32_M4_MASK = 2771 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VF32_MF2 = 2772 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VF32_MF2_MASK = 2773 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VV_M1 = 2774 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VV_M1_MASK = 2775 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VV_M2 = 2776 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VV_M2_MASK = 2777 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VV_M4 = 2778 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VV_M4_MASK = 2779 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VV_MF2 = 2780 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VV_MF2_MASK = 2781 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VV_MF4 = 2782 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMACC_VV_MF4_MASK = 2783 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VF16_M1 = 2784 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VF16_M1_MASK = 2785 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VF16_M2 = 2786 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VF16_M2_MASK = 2787 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VF16_M4 = 2788 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VF16_M4_MASK = 2789 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VF16_MF2 = 2790 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VF16_MF2_MASK = 2791 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VF16_MF4 = 2792 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VF16_MF4_MASK = 2793 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VF32_M1 = 2794 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VF32_M1_MASK = 2795 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VF32_M2 = 2796 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VF32_M2_MASK = 2797 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VF32_M4 = 2798 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VF32_M4_MASK = 2799 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VF32_MF2 = 2800 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VF32_MF2_MASK = 2801 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VV_M1 = 2802 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VV_M1_MASK = 2803 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VV_M2 = 2804 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VV_M2_MASK = 2805 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VV_M4 = 2806 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VV_M4_MASK = 2807 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VV_MF2 = 2808 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VV_MF2_MASK = 2809 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VV_MF4 = 2810 CEFBS_HasVInstructionsAnyF, // PseudoVFWNMSAC_VV_MF4_MASK = 2811 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDOSUM_VS_M1 = 2812 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDOSUM_VS_M1_MASK = 2813 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDOSUM_VS_M2 = 2814 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDOSUM_VS_M2_MASK = 2815 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDOSUM_VS_M4 = 2816 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDOSUM_VS_M4_MASK = 2817 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDOSUM_VS_M8 = 2818 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDOSUM_VS_M8_MASK = 2819 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDOSUM_VS_MF2 = 2820 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDOSUM_VS_MF2_MASK = 2821 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDOSUM_VS_MF4 = 2822 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDOSUM_VS_MF4_MASK = 2823 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDUSUM_VS_M1 = 2824 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDUSUM_VS_M1_MASK = 2825 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDUSUM_VS_M2 = 2826 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDUSUM_VS_M2_MASK = 2827 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDUSUM_VS_M4 = 2828 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDUSUM_VS_M4_MASK = 2829 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDUSUM_VS_M8 = 2830 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDUSUM_VS_M8_MASK = 2831 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDUSUM_VS_MF2 = 2832 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDUSUM_VS_MF2_MASK = 2833 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDUSUM_VS_MF4 = 2834 CEFBS_HasVInstructionsAnyF, // PseudoVFWREDUSUM_VS_MF4_MASK = 2835 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF16_M1 = 2836 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF16_M1_MASK = 2837 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF16_M1_TU = 2838 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF16_M2 = 2839 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF16_M2_MASK = 2840 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF16_M2_TU = 2841 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF16_M4 = 2842 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF16_M4_MASK = 2843 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF16_M4_TU = 2844 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF16_MF2 = 2845 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF16_MF2_MASK = 2846 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF16_MF2_TU = 2847 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF16_MF4 = 2848 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF16_MF4_MASK = 2849 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF16_MF4_TU = 2850 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF32_M1 = 2851 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF32_M1_MASK = 2852 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF32_M1_TU = 2853 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF32_M2 = 2854 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF32_M2_MASK = 2855 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF32_M2_TU = 2856 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF32_M4 = 2857 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF32_M4_MASK = 2858 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF32_M4_TU = 2859 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF32_MF2 = 2860 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF32_MF2_MASK = 2861 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VF32_MF2_TU = 2862 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VV_M1 = 2863 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VV_M1_MASK = 2864 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VV_M1_TU = 2865 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VV_M2 = 2866 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VV_M2_MASK = 2867 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VV_M2_TU = 2868 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VV_M4 = 2869 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VV_M4_MASK = 2870 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VV_M4_TU = 2871 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VV_MF2 = 2872 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VV_MF2_MASK = 2873 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VV_MF2_TU = 2874 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VV_MF4 = 2875 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VV_MF4_MASK = 2876 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_VV_MF4_TU = 2877 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF16_M1 = 2878 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF16_M1_MASK = 2879 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF16_M1_TU = 2880 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF16_M2 = 2881 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF16_M2_MASK = 2882 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF16_M2_TU = 2883 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF16_M4 = 2884 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF16_M4_MASK = 2885 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF16_M4_TU = 2886 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF16_MF2 = 2887 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF16_MF2_MASK = 2888 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF16_MF2_TU = 2889 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF16_MF4 = 2890 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF16_MF4_MASK = 2891 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF16_MF4_TU = 2892 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF32_M1 = 2893 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF32_M1_MASK = 2894 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF32_M1_TU = 2895 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF32_M2 = 2896 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF32_M2_MASK = 2897 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF32_M2_TU = 2898 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF32_M4 = 2899 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF32_M4_MASK = 2900 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF32_M4_TU = 2901 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF32_MF2 = 2902 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF32_MF2_MASK = 2903 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WF32_MF2_TU = 2904 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_M1 = 2905 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_M1_MASK = 2906 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_M1_MASK_TIED = 2907 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_M1_TIED = 2908 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_M1_TU = 2909 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_M2 = 2910 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_M2_MASK = 2911 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_M2_MASK_TIED = 2912 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_M2_TIED = 2913 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_M2_TU = 2914 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_M4 = 2915 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_M4_MASK = 2916 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_M4_MASK_TIED = 2917 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_M4_TIED = 2918 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_M4_TU = 2919 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_MF2 = 2920 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_MF2_MASK = 2921 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_MF2_MASK_TIED = 2922 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_MF2_TIED = 2923 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_MF2_TU = 2924 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_MF4 = 2925 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_MF4_MASK = 2926 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_MF4_MASK_TIED = 2927 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_MF4_TIED = 2928 CEFBS_HasVInstructionsAnyF, // PseudoVFWSUB_WV_MF4_TU = 2929 CEFBS_None, // PseudoVID_V_M1 = 2930 CEFBS_None, // PseudoVID_V_M1_MASK = 2931 CEFBS_None, // PseudoVID_V_M1_TU = 2932 CEFBS_None, // PseudoVID_V_M2 = 2933 CEFBS_None, // PseudoVID_V_M2_MASK = 2934 CEFBS_None, // PseudoVID_V_M2_TU = 2935 CEFBS_None, // PseudoVID_V_M4 = 2936 CEFBS_None, // PseudoVID_V_M4_MASK = 2937 CEFBS_None, // PseudoVID_V_M4_TU = 2938 CEFBS_None, // PseudoVID_V_M8 = 2939 CEFBS_None, // PseudoVID_V_M8_MASK = 2940 CEFBS_None, // PseudoVID_V_M8_TU = 2941 CEFBS_None, // PseudoVID_V_MF2 = 2942 CEFBS_None, // PseudoVID_V_MF2_MASK = 2943 CEFBS_None, // PseudoVID_V_MF2_TU = 2944 CEFBS_None, // PseudoVID_V_MF4 = 2945 CEFBS_None, // PseudoVID_V_MF4_MASK = 2946 CEFBS_None, // PseudoVID_V_MF4_TU = 2947 CEFBS_None, // PseudoVID_V_MF8 = 2948 CEFBS_None, // PseudoVID_V_MF8_MASK = 2949 CEFBS_None, // PseudoVID_V_MF8_TU = 2950 CEFBS_None, // PseudoVIOTA_M_M1 = 2951 CEFBS_None, // PseudoVIOTA_M_M1_MASK = 2952 CEFBS_None, // PseudoVIOTA_M_M1_TU = 2953 CEFBS_None, // PseudoVIOTA_M_M2 = 2954 CEFBS_None, // PseudoVIOTA_M_M2_MASK = 2955 CEFBS_None, // PseudoVIOTA_M_M2_TU = 2956 CEFBS_None, // PseudoVIOTA_M_M4 = 2957 CEFBS_None, // PseudoVIOTA_M_M4_MASK = 2958 CEFBS_None, // PseudoVIOTA_M_M4_TU = 2959 CEFBS_None, // PseudoVIOTA_M_M8 = 2960 CEFBS_None, // PseudoVIOTA_M_M8_MASK = 2961 CEFBS_None, // PseudoVIOTA_M_M8_TU = 2962 CEFBS_None, // PseudoVIOTA_M_MF2 = 2963 CEFBS_None, // PseudoVIOTA_M_MF2_MASK = 2964 CEFBS_None, // PseudoVIOTA_M_MF2_TU = 2965 CEFBS_None, // PseudoVIOTA_M_MF4 = 2966 CEFBS_None, // PseudoVIOTA_M_MF4_MASK = 2967 CEFBS_None, // PseudoVIOTA_M_MF4_TU = 2968 CEFBS_None, // PseudoVIOTA_M_MF8 = 2969 CEFBS_None, // PseudoVIOTA_M_MF8_MASK = 2970 CEFBS_None, // PseudoVIOTA_M_MF8_TU = 2971 CEFBS_HasVInstructions, // PseudoVLE16FF_V_M1 = 2972 CEFBS_HasVInstructions, // PseudoVLE16FF_V_M1_MASK = 2973 CEFBS_HasVInstructions, // PseudoVLE16FF_V_M1_TU = 2974 CEFBS_HasVInstructions, // PseudoVLE16FF_V_M2 = 2975 CEFBS_HasVInstructions, // PseudoVLE16FF_V_M2_MASK = 2976 CEFBS_HasVInstructions, // PseudoVLE16FF_V_M2_TU = 2977 CEFBS_HasVInstructions, // PseudoVLE16FF_V_M4 = 2978 CEFBS_HasVInstructions, // PseudoVLE16FF_V_M4_MASK = 2979 CEFBS_HasVInstructions, // PseudoVLE16FF_V_M4_TU = 2980 CEFBS_HasVInstructions, // PseudoVLE16FF_V_M8 = 2981 CEFBS_HasVInstructions, // PseudoVLE16FF_V_M8_MASK = 2982 CEFBS_HasVInstructions, // PseudoVLE16FF_V_M8_TU = 2983 CEFBS_HasVInstructions, // PseudoVLE16FF_V_MF2 = 2984 CEFBS_HasVInstructions, // PseudoVLE16FF_V_MF2_MASK = 2985 CEFBS_HasVInstructions, // PseudoVLE16FF_V_MF2_TU = 2986 CEFBS_HasVInstructions, // PseudoVLE16FF_V_MF4 = 2987 CEFBS_HasVInstructions, // PseudoVLE16FF_V_MF4_MASK = 2988 CEFBS_HasVInstructions, // PseudoVLE16FF_V_MF4_TU = 2989 CEFBS_HasVInstructions, // PseudoVLE16_V_M1 = 2990 CEFBS_HasVInstructions, // PseudoVLE16_V_M1_MASK = 2991 CEFBS_HasVInstructions, // PseudoVLE16_V_M1_TU = 2992 CEFBS_HasVInstructions, // PseudoVLE16_V_M2 = 2993 CEFBS_HasVInstructions, // PseudoVLE16_V_M2_MASK = 2994 CEFBS_HasVInstructions, // PseudoVLE16_V_M2_TU = 2995 CEFBS_HasVInstructions, // PseudoVLE16_V_M4 = 2996 CEFBS_HasVInstructions, // PseudoVLE16_V_M4_MASK = 2997 CEFBS_HasVInstructions, // PseudoVLE16_V_M4_TU = 2998 CEFBS_HasVInstructions, // PseudoVLE16_V_M8 = 2999 CEFBS_HasVInstructions, // PseudoVLE16_V_M8_MASK = 3000 CEFBS_HasVInstructions, // PseudoVLE16_V_M8_TU = 3001 CEFBS_HasVInstructions, // PseudoVLE16_V_MF2 = 3002 CEFBS_HasVInstructions, // PseudoVLE16_V_MF2_MASK = 3003 CEFBS_HasVInstructions, // PseudoVLE16_V_MF2_TU = 3004 CEFBS_HasVInstructions, // PseudoVLE16_V_MF4 = 3005 CEFBS_HasVInstructions, // PseudoVLE16_V_MF4_MASK = 3006 CEFBS_HasVInstructions, // PseudoVLE16_V_MF4_TU = 3007 CEFBS_HasVInstructions, // PseudoVLE32FF_V_M1 = 3008 CEFBS_HasVInstructions, // PseudoVLE32FF_V_M1_MASK = 3009 CEFBS_HasVInstructions, // PseudoVLE32FF_V_M1_TU = 3010 CEFBS_HasVInstructions, // PseudoVLE32FF_V_M2 = 3011 CEFBS_HasVInstructions, // PseudoVLE32FF_V_M2_MASK = 3012 CEFBS_HasVInstructions, // PseudoVLE32FF_V_M2_TU = 3013 CEFBS_HasVInstructions, // PseudoVLE32FF_V_M4 = 3014 CEFBS_HasVInstructions, // PseudoVLE32FF_V_M4_MASK = 3015 CEFBS_HasVInstructions, // PseudoVLE32FF_V_M4_TU = 3016 CEFBS_HasVInstructions, // PseudoVLE32FF_V_M8 = 3017 CEFBS_HasVInstructions, // PseudoVLE32FF_V_M8_MASK = 3018 CEFBS_HasVInstructions, // PseudoVLE32FF_V_M8_TU = 3019 CEFBS_HasVInstructions, // PseudoVLE32FF_V_MF2 = 3020 CEFBS_HasVInstructions, // PseudoVLE32FF_V_MF2_MASK = 3021 CEFBS_HasVInstructions, // PseudoVLE32FF_V_MF2_TU = 3022 CEFBS_HasVInstructions, // PseudoVLE32_V_M1 = 3023 CEFBS_HasVInstructions, // PseudoVLE32_V_M1_MASK = 3024 CEFBS_HasVInstructions, // PseudoVLE32_V_M1_TU = 3025 CEFBS_HasVInstructions, // PseudoVLE32_V_M2 = 3026 CEFBS_HasVInstructions, // PseudoVLE32_V_M2_MASK = 3027 CEFBS_HasVInstructions, // PseudoVLE32_V_M2_TU = 3028 CEFBS_HasVInstructions, // PseudoVLE32_V_M4 = 3029 CEFBS_HasVInstructions, // PseudoVLE32_V_M4_MASK = 3030 CEFBS_HasVInstructions, // PseudoVLE32_V_M4_TU = 3031 CEFBS_HasVInstructions, // PseudoVLE32_V_M8 = 3032 CEFBS_HasVInstructions, // PseudoVLE32_V_M8_MASK = 3033 CEFBS_HasVInstructions, // PseudoVLE32_V_M8_TU = 3034 CEFBS_HasVInstructions, // PseudoVLE32_V_MF2 = 3035 CEFBS_HasVInstructions, // PseudoVLE32_V_MF2_MASK = 3036 CEFBS_HasVInstructions, // PseudoVLE32_V_MF2_TU = 3037 CEFBS_HasVInstructions, // PseudoVLE64FF_V_M1 = 3038 CEFBS_HasVInstructions, // PseudoVLE64FF_V_M1_MASK = 3039 CEFBS_HasVInstructions, // PseudoVLE64FF_V_M1_TU = 3040 CEFBS_HasVInstructions, // PseudoVLE64FF_V_M2 = 3041 CEFBS_HasVInstructions, // PseudoVLE64FF_V_M2_MASK = 3042 CEFBS_HasVInstructions, // PseudoVLE64FF_V_M2_TU = 3043 CEFBS_HasVInstructions, // PseudoVLE64FF_V_M4 = 3044 CEFBS_HasVInstructions, // PseudoVLE64FF_V_M4_MASK = 3045 CEFBS_HasVInstructions, // PseudoVLE64FF_V_M4_TU = 3046 CEFBS_HasVInstructions, // PseudoVLE64FF_V_M8 = 3047 CEFBS_HasVInstructions, // PseudoVLE64FF_V_M8_MASK = 3048 CEFBS_HasVInstructions, // PseudoVLE64FF_V_M8_TU = 3049 CEFBS_HasVInstructions, // PseudoVLE64_V_M1 = 3050 CEFBS_HasVInstructions, // PseudoVLE64_V_M1_MASK = 3051 CEFBS_HasVInstructions, // PseudoVLE64_V_M1_TU = 3052 CEFBS_HasVInstructions, // PseudoVLE64_V_M2 = 3053 CEFBS_HasVInstructions, // PseudoVLE64_V_M2_MASK = 3054 CEFBS_HasVInstructions, // PseudoVLE64_V_M2_TU = 3055 CEFBS_HasVInstructions, // PseudoVLE64_V_M4 = 3056 CEFBS_HasVInstructions, // PseudoVLE64_V_M4_MASK = 3057 CEFBS_HasVInstructions, // PseudoVLE64_V_M4_TU = 3058 CEFBS_HasVInstructions, // PseudoVLE64_V_M8 = 3059 CEFBS_HasVInstructions, // PseudoVLE64_V_M8_MASK = 3060 CEFBS_HasVInstructions, // PseudoVLE64_V_M8_TU = 3061 CEFBS_HasVInstructions, // PseudoVLE8FF_V_M1 = 3062 CEFBS_HasVInstructions, // PseudoVLE8FF_V_M1_MASK = 3063 CEFBS_HasVInstructions, // PseudoVLE8FF_V_M1_TU = 3064 CEFBS_HasVInstructions, // PseudoVLE8FF_V_M2 = 3065 CEFBS_HasVInstructions, // PseudoVLE8FF_V_M2_MASK = 3066 CEFBS_HasVInstructions, // PseudoVLE8FF_V_M2_TU = 3067 CEFBS_HasVInstructions, // PseudoVLE8FF_V_M4 = 3068 CEFBS_HasVInstructions, // PseudoVLE8FF_V_M4_MASK = 3069 CEFBS_HasVInstructions, // PseudoVLE8FF_V_M4_TU = 3070 CEFBS_HasVInstructions, // PseudoVLE8FF_V_M8 = 3071 CEFBS_HasVInstructions, // PseudoVLE8FF_V_M8_MASK = 3072 CEFBS_HasVInstructions, // PseudoVLE8FF_V_M8_TU = 3073 CEFBS_HasVInstructions, // PseudoVLE8FF_V_MF2 = 3074 CEFBS_HasVInstructions, // PseudoVLE8FF_V_MF2_MASK = 3075 CEFBS_HasVInstructions, // PseudoVLE8FF_V_MF2_TU = 3076 CEFBS_HasVInstructions, // PseudoVLE8FF_V_MF4 = 3077 CEFBS_HasVInstructions, // PseudoVLE8FF_V_MF4_MASK = 3078 CEFBS_HasVInstructions, // PseudoVLE8FF_V_MF4_TU = 3079 CEFBS_HasVInstructions, // PseudoVLE8FF_V_MF8 = 3080 CEFBS_HasVInstructions, // PseudoVLE8FF_V_MF8_MASK = 3081 CEFBS_HasVInstructions, // PseudoVLE8FF_V_MF8_TU = 3082 CEFBS_HasVInstructions, // PseudoVLE8_V_M1 = 3083 CEFBS_HasVInstructions, // PseudoVLE8_V_M1_MASK = 3084 CEFBS_HasVInstructions, // PseudoVLE8_V_M1_TU = 3085 CEFBS_HasVInstructions, // PseudoVLE8_V_M2 = 3086 CEFBS_HasVInstructions, // PseudoVLE8_V_M2_MASK = 3087 CEFBS_HasVInstructions, // PseudoVLE8_V_M2_TU = 3088 CEFBS_HasVInstructions, // PseudoVLE8_V_M4 = 3089 CEFBS_HasVInstructions, // PseudoVLE8_V_M4_MASK = 3090 CEFBS_HasVInstructions, // PseudoVLE8_V_M4_TU = 3091 CEFBS_HasVInstructions, // PseudoVLE8_V_M8 = 3092 CEFBS_HasVInstructions, // PseudoVLE8_V_M8_MASK = 3093 CEFBS_HasVInstructions, // PseudoVLE8_V_M8_TU = 3094 CEFBS_HasVInstructions, // PseudoVLE8_V_MF2 = 3095 CEFBS_HasVInstructions, // PseudoVLE8_V_MF2_MASK = 3096 CEFBS_HasVInstructions, // PseudoVLE8_V_MF2_TU = 3097 CEFBS_HasVInstructions, // PseudoVLE8_V_MF4 = 3098 CEFBS_HasVInstructions, // PseudoVLE8_V_MF4_MASK = 3099 CEFBS_HasVInstructions, // PseudoVLE8_V_MF4_TU = 3100 CEFBS_HasVInstructions, // PseudoVLE8_V_MF8 = 3101 CEFBS_HasVInstructions, // PseudoVLE8_V_MF8_MASK = 3102 CEFBS_HasVInstructions, // PseudoVLE8_V_MF8_TU = 3103 CEFBS_HasVInstructions, // PseudoVLM_V_B1 = 3104 CEFBS_HasVInstructions, // PseudoVLM_V_B16 = 3105 CEFBS_HasVInstructions, // PseudoVLM_V_B2 = 3106 CEFBS_HasVInstructions, // PseudoVLM_V_B32 = 3107 CEFBS_HasVInstructions, // PseudoVLM_V_B4 = 3108 CEFBS_HasVInstructions, // PseudoVLM_V_B64 = 3109 CEFBS_HasVInstructions, // PseudoVLM_V_B8 = 3110 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M1_M1 = 3111 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M1_M1_MASK = 3112 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M1_M1_TU = 3113 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M1_M2 = 3114 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M1_M2_MASK = 3115 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M1_M2_TU = 3116 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M1_M4 = 3117 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M1_M4_MASK = 3118 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M1_M4_TU = 3119 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M1_MF2 = 3120 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M1_MF2_MASK = 3121 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M1_MF2_TU = 3122 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M2_M1 = 3123 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M2_M1_MASK = 3124 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M2_M1_TU = 3125 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M2_M2 = 3126 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M2_M2_MASK = 3127 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M2_M2_TU = 3128 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M2_M4 = 3129 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M2_M4_MASK = 3130 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M2_M4_TU = 3131 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M2_M8 = 3132 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M2_M8_MASK = 3133 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M2_M8_TU = 3134 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M4_M2 = 3135 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M4_M2_MASK = 3136 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M4_M2_TU = 3137 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M4_M4 = 3138 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M4_M4_MASK = 3139 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M4_M4_TU = 3140 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M4_M8 = 3141 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M4_M8_MASK = 3142 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M4_M8_TU = 3143 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M8_M4 = 3144 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M8_M4_MASK = 3145 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M8_M4_TU = 3146 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M8_M8 = 3147 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M8_M8_MASK = 3148 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_M8_M8_TU = 3149 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF2_M1 = 3150 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF2_M1_MASK = 3151 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF2_M1_TU = 3152 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF2_M2 = 3153 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF2_M2_MASK = 3154 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF2_M2_TU = 3155 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF2_MF2 = 3156 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF2_MF2_MASK = 3157 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF2_MF2_TU = 3158 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF2_MF4 = 3159 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF2_MF4_MASK = 3160 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF2_MF4_TU = 3161 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF4_M1 = 3162 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF4_M1_MASK = 3163 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF4_M1_TU = 3164 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF4_MF2 = 3165 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF4_MF2_MASK = 3166 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF4_MF2_TU = 3167 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF4_MF4 = 3168 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF4_MF4_MASK = 3169 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF4_MF4_TU = 3170 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF4_MF8 = 3171 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF4_MF8_MASK = 3172 CEFBS_HasVInstructions, // PseudoVLOXEI16_V_MF4_MF8_TU = 3173 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M1_M1 = 3174 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M1_M1_MASK = 3175 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M1_M1_TU = 3176 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M1_M2 = 3177 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M1_M2_MASK = 3178 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M1_M2_TU = 3179 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M1_MF2 = 3180 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M1_MF2_MASK = 3181 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M1_MF2_TU = 3182 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M1_MF4 = 3183 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M1_MF4_MASK = 3184 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M1_MF4_TU = 3185 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M2_M1 = 3186 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M2_M1_MASK = 3187 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M2_M1_TU = 3188 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M2_M2 = 3189 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M2_M2_MASK = 3190 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M2_M2_TU = 3191 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M2_M4 = 3192 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M2_M4_MASK = 3193 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M2_M4_TU = 3194 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M2_MF2 = 3195 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M2_MF2_MASK = 3196 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M2_MF2_TU = 3197 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M4_M1 = 3198 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M4_M1_MASK = 3199 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M4_M1_TU = 3200 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M4_M2 = 3201 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M4_M2_MASK = 3202 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M4_M2_TU = 3203 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M4_M4 = 3204 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M4_M4_MASK = 3205 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M4_M4_TU = 3206 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M4_M8 = 3207 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M4_M8_MASK = 3208 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M4_M8_TU = 3209 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M8_M2 = 3210 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M8_M2_MASK = 3211 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M8_M2_TU = 3212 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M8_M4 = 3213 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M8_M4_MASK = 3214 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M8_M4_TU = 3215 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M8_M8 = 3216 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M8_M8_MASK = 3217 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_M8_M8_TU = 3218 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_MF2_M1 = 3219 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_MF2_M1_MASK = 3220 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_MF2_M1_TU = 3221 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_MF2_MF2 = 3222 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_MF2_MF2_MASK = 3223 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_MF2_MF2_TU = 3224 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_MF2_MF4 = 3225 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_MF2_MF4_MASK = 3226 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_MF2_MF4_TU = 3227 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_MF2_MF8 = 3228 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_MF2_MF8_MASK = 3229 CEFBS_HasVInstructions, // PseudoVLOXEI32_V_MF2_MF8_TU = 3230 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M1_M1 = 3231 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M1_M1_MASK = 3232 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M1_M1_TU = 3233 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M1_MF2 = 3234 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M1_MF2_MASK = 3235 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M1_MF2_TU = 3236 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M1_MF4 = 3237 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M1_MF4_MASK = 3238 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M1_MF4_TU = 3239 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M1_MF8 = 3240 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M1_MF8_MASK = 3241 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M1_MF8_TU = 3242 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M2_M1 = 3243 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M2_M1_MASK = 3244 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M2_M1_TU = 3245 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M2_M2 = 3246 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M2_M2_MASK = 3247 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M2_M2_TU = 3248 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M2_MF2 = 3249 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M2_MF2_MASK = 3250 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M2_MF2_TU = 3251 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M2_MF4 = 3252 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M2_MF4_MASK = 3253 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M2_MF4_TU = 3254 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M4_M1 = 3255 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M4_M1_MASK = 3256 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M4_M1_TU = 3257 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M4_M2 = 3258 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M4_M2_MASK = 3259 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M4_M2_TU = 3260 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M4_M4 = 3261 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M4_M4_MASK = 3262 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M4_M4_TU = 3263 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M4_MF2 = 3264 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M4_MF2_MASK = 3265 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M4_MF2_TU = 3266 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M8_M1 = 3267 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M8_M1_MASK = 3268 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M8_M1_TU = 3269 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M8_M2 = 3270 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M8_M2_MASK = 3271 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M8_M2_TU = 3272 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M8_M4 = 3273 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M8_M4_MASK = 3274 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M8_M4_TU = 3275 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M8_M8 = 3276 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M8_M8_MASK = 3277 CEFBS_HasVInstructions, // PseudoVLOXEI64_V_M8_M8_TU = 3278 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M1_M1 = 3279 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M1_M1_MASK = 3280 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M1_M1_TU = 3281 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M1_M2 = 3282 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M1_M2_MASK = 3283 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M1_M2_TU = 3284 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M1_M4 = 3285 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M1_M4_MASK = 3286 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M1_M4_TU = 3287 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M1_M8 = 3288 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M1_M8_MASK = 3289 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M1_M8_TU = 3290 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M2_M2 = 3291 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M2_M2_MASK = 3292 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M2_M2_TU = 3293 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M2_M4 = 3294 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M2_M4_MASK = 3295 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M2_M4_TU = 3296 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M2_M8 = 3297 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M2_M8_MASK = 3298 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M2_M8_TU = 3299 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M4_M4 = 3300 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M4_M4_MASK = 3301 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M4_M4_TU = 3302 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M4_M8 = 3303 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M4_M8_MASK = 3304 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M4_M8_TU = 3305 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M8_M8 = 3306 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M8_M8_MASK = 3307 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_M8_M8_TU = 3308 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF2_M1 = 3309 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF2_M1_MASK = 3310 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF2_M1_TU = 3311 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF2_M2 = 3312 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF2_M2_MASK = 3313 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF2_M2_TU = 3314 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF2_M4 = 3315 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF2_M4_MASK = 3316 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF2_M4_TU = 3317 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF2_MF2 = 3318 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF2_MF2_MASK = 3319 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF2_MF2_TU = 3320 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF4_M1 = 3321 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF4_M1_MASK = 3322 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF4_M1_TU = 3323 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF4_M2 = 3324 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF4_M2_MASK = 3325 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF4_M2_TU = 3326 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF4_MF2 = 3327 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF4_MF2_MASK = 3328 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF4_MF2_TU = 3329 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF4_MF4 = 3330 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF4_MF4_MASK = 3331 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF4_MF4_TU = 3332 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF8_M1 = 3333 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF8_M1_MASK = 3334 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF8_M1_TU = 3335 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF8_MF2 = 3336 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF8_MF2_MASK = 3337 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF8_MF2_TU = 3338 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF8_MF4 = 3339 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF8_MF4_MASK = 3340 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF8_MF4_TU = 3341 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF8_MF8 = 3342 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF8_MF8_MASK = 3343 CEFBS_HasVInstructions, // PseudoVLOXEI8_V_MF8_MF8_TU = 3344 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M1_M1 = 3345 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M1_M1_MASK = 3346 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M1_M1_TU = 3347 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M1_M2 = 3348 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M1_M2_MASK = 3349 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M1_M2_TU = 3350 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M1_M4 = 3351 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M1_M4_MASK = 3352 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M1_M4_TU = 3353 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M1_MF2 = 3354 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M1_MF2_MASK = 3355 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M1_MF2_TU = 3356 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M2_M1 = 3357 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M2_M1_MASK = 3358 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M2_M1_TU = 3359 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M2_M2 = 3360 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M2_M2_MASK = 3361 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M2_M2_TU = 3362 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M2_M4 = 3363 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M2_M4_MASK = 3364 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M2_M4_TU = 3365 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M4_M2 = 3366 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M4_M2_MASK = 3367 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M4_M2_TU = 3368 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M4_M4 = 3369 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M4_M4_MASK = 3370 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M4_M4_TU = 3371 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M8_M4 = 3372 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M8_M4_MASK = 3373 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_M8_M4_TU = 3374 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF2_M1 = 3375 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF2_M1_MASK = 3376 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF2_M1_TU = 3377 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF2_M2 = 3378 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF2_M2_MASK = 3379 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF2_M2_TU = 3380 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF2_MF2 = 3381 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF2_MF2_MASK = 3382 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF2_MF2_TU = 3383 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF2_MF4 = 3384 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF2_MF4_MASK = 3385 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF2_MF4_TU = 3386 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF4_M1 = 3387 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF4_M1_MASK = 3388 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF4_M1_TU = 3389 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF4_MF2 = 3390 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF4_MF2_MASK = 3391 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF4_MF2_TU = 3392 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF4_MF4 = 3393 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF4_MF4_MASK = 3394 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF4_MF4_TU = 3395 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF4_MF8 = 3396 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF4_MF8_MASK = 3397 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI16_V_MF4_MF8_TU = 3398 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M1_M1 = 3399 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M1_M1_MASK = 3400 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M1_M1_TU = 3401 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M1_M2 = 3402 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M1_M2_MASK = 3403 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M1_M2_TU = 3404 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M1_MF2 = 3405 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M1_MF2_MASK = 3406 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M1_MF2_TU = 3407 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M1_MF4 = 3408 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M1_MF4_MASK = 3409 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M1_MF4_TU = 3410 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M2_M1 = 3411 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M2_M1_MASK = 3412 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M2_M1_TU = 3413 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M2_M2 = 3414 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M2_M2_MASK = 3415 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M2_M2_TU = 3416 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M2_M4 = 3417 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M2_M4_MASK = 3418 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M2_M4_TU = 3419 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M2_MF2 = 3420 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M2_MF2_MASK = 3421 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M2_MF2_TU = 3422 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M4_M1 = 3423 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M4_M1_MASK = 3424 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M4_M1_TU = 3425 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M4_M2 = 3426 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M4_M2_MASK = 3427 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M4_M2_TU = 3428 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M4_M4 = 3429 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M4_M4_MASK = 3430 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M4_M4_TU = 3431 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M8_M2 = 3432 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M8_M2_MASK = 3433 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M8_M2_TU = 3434 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M8_M4 = 3435 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M8_M4_MASK = 3436 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_M8_M4_TU = 3437 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_MF2_M1 = 3438 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_MF2_M1_MASK = 3439 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_MF2_M1_TU = 3440 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_MF2_MF2 = 3441 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_MF2_MF2_MASK = 3442 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_MF2_MF2_TU = 3443 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_MF2_MF4 = 3444 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_MF2_MF4_MASK = 3445 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_MF2_MF4_TU = 3446 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_MF2_MF8 = 3447 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_MF2_MF8_MASK = 3448 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI32_V_MF2_MF8_TU = 3449 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M1_M1 = 3450 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M1_M1_MASK = 3451 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M1_M1_TU = 3452 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M1_MF2 = 3453 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M1_MF2_MASK = 3454 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M1_MF2_TU = 3455 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M1_MF4 = 3456 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M1_MF4_MASK = 3457 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M1_MF4_TU = 3458 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M1_MF8 = 3459 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M1_MF8_MASK = 3460 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M1_MF8_TU = 3461 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M2_M1 = 3462 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M2_M1_MASK = 3463 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M2_M1_TU = 3464 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M2_M2 = 3465 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M2_M2_MASK = 3466 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M2_M2_TU = 3467 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M2_MF2 = 3468 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M2_MF2_MASK = 3469 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M2_MF2_TU = 3470 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M2_MF4 = 3471 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M2_MF4_MASK = 3472 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M2_MF4_TU = 3473 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M4_M1 = 3474 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M4_M1_MASK = 3475 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M4_M1_TU = 3476 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M4_M2 = 3477 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M4_M2_MASK = 3478 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M4_M2_TU = 3479 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M4_M4 = 3480 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M4_M4_MASK = 3481 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M4_M4_TU = 3482 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M4_MF2 = 3483 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M4_MF2_MASK = 3484 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M4_MF2_TU = 3485 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M8_M1 = 3486 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M8_M1_MASK = 3487 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M8_M1_TU = 3488 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M8_M2 = 3489 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M8_M2_MASK = 3490 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M8_M2_TU = 3491 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M8_M4 = 3492 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M8_M4_MASK = 3493 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI64_V_M8_M4_TU = 3494 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_M1_M1 = 3495 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_M1_M1_MASK = 3496 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_M1_M1_TU = 3497 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_M1_M2 = 3498 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_M1_M2_MASK = 3499 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_M1_M2_TU = 3500 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_M1_M4 = 3501 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_M1_M4_MASK = 3502 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_M1_M4_TU = 3503 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_M2_M2 = 3504 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_M2_M2_MASK = 3505 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_M2_M2_TU = 3506 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_M2_M4 = 3507 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_M2_M4_MASK = 3508 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_M2_M4_TU = 3509 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_M4_M4 = 3510 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_M4_M4_MASK = 3511 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_M4_M4_TU = 3512 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF2_M1 = 3513 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF2_M1_MASK = 3514 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF2_M1_TU = 3515 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF2_M2 = 3516 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF2_M2_MASK = 3517 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF2_M2_TU = 3518 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF2_M4 = 3519 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF2_M4_MASK = 3520 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF2_M4_TU = 3521 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF2_MF2 = 3522 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF2_MF2_MASK = 3523 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF2_MF2_TU = 3524 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF4_M1 = 3525 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF4_M1_MASK = 3526 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF4_M1_TU = 3527 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF4_M2 = 3528 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF4_M2_MASK = 3529 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF4_M2_TU = 3530 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF4_MF2 = 3531 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF4_MF2_MASK = 3532 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF4_MF2_TU = 3533 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF4_MF4 = 3534 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF4_MF4_MASK = 3535 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF4_MF4_TU = 3536 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF8_M1 = 3537 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF8_M1_MASK = 3538 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF8_M1_TU = 3539 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF8_MF2 = 3540 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF8_MF2_MASK = 3541 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF8_MF2_TU = 3542 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF8_MF4 = 3543 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF8_MF4_MASK = 3544 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF8_MF4_TU = 3545 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF8_MF8 = 3546 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF8_MF8_MASK = 3547 CEFBS_HasVInstructions, // PseudoVLOXSEG2EI8_V_MF8_MF8_TU = 3548 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_M1_M1 = 3549 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_M1_M1_MASK = 3550 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_M1_M1_TU = 3551 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_M1_M2 = 3552 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_M1_M2_MASK = 3553 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_M1_M2_TU = 3554 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_M1_MF2 = 3555 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_M1_MF2_MASK = 3556 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_M1_MF2_TU = 3557 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_M2_M1 = 3558 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_M2_M1_MASK = 3559 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_M2_M1_TU = 3560 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_M2_M2 = 3561 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_M2_M2_MASK = 3562 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_M2_M2_TU = 3563 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_M4_M2 = 3564 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_M4_M2_MASK = 3565 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_M4_M2_TU = 3566 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF2_M1 = 3567 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF2_M1_MASK = 3568 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF2_M1_TU = 3569 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF2_M2 = 3570 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF2_M2_MASK = 3571 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF2_M2_TU = 3572 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF2_MF2 = 3573 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF2_MF2_MASK = 3574 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF2_MF2_TU = 3575 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF2_MF4 = 3576 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF2_MF4_MASK = 3577 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF2_MF4_TU = 3578 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF4_M1 = 3579 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF4_M1_MASK = 3580 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF4_M1_TU = 3581 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF4_MF2 = 3582 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF4_MF2_MASK = 3583 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF4_MF2_TU = 3584 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF4_MF4 = 3585 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF4_MF4_MASK = 3586 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF4_MF4_TU = 3587 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF4_MF8 = 3588 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF4_MF8_MASK = 3589 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI16_V_MF4_MF8_TU = 3590 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M1_M1 = 3591 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M1_M1_MASK = 3592 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M1_M1_TU = 3593 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M1_M2 = 3594 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M1_M2_MASK = 3595 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M1_M2_TU = 3596 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M1_MF2 = 3597 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M1_MF2_MASK = 3598 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M1_MF2_TU = 3599 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M1_MF4 = 3600 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M1_MF4_MASK = 3601 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M1_MF4_TU = 3602 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M2_M1 = 3603 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M2_M1_MASK = 3604 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M2_M1_TU = 3605 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M2_M2 = 3606 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M2_M2_MASK = 3607 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M2_M2_TU = 3608 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M2_MF2 = 3609 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M2_MF2_MASK = 3610 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M2_MF2_TU = 3611 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M4_M1 = 3612 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M4_M1_MASK = 3613 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M4_M1_TU = 3614 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M4_M2 = 3615 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M4_M2_MASK = 3616 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M4_M2_TU = 3617 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M8_M2 = 3618 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M8_M2_MASK = 3619 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_M8_M2_TU = 3620 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_MF2_M1 = 3621 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_MF2_M1_MASK = 3622 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_MF2_M1_TU = 3623 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_MF2_MF2 = 3624 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_MF2_MF2_MASK = 3625 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_MF2_MF2_TU = 3626 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_MF2_MF4 = 3627 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_MF2_MF4_MASK = 3628 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_MF2_MF4_TU = 3629 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_MF2_MF8 = 3630 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_MF2_MF8_MASK = 3631 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI32_V_MF2_MF8_TU = 3632 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M1_M1 = 3633 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M1_M1_MASK = 3634 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M1_M1_TU = 3635 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M1_MF2 = 3636 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M1_MF2_MASK = 3637 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M1_MF2_TU = 3638 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M1_MF4 = 3639 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M1_MF4_MASK = 3640 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M1_MF4_TU = 3641 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M1_MF8 = 3642 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M1_MF8_MASK = 3643 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M1_MF8_TU = 3644 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M2_M1 = 3645 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M2_M1_MASK = 3646 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M2_M1_TU = 3647 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M2_M2 = 3648 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M2_M2_MASK = 3649 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M2_M2_TU = 3650 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M2_MF2 = 3651 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M2_MF2_MASK = 3652 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M2_MF2_TU = 3653 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M2_MF4 = 3654 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M2_MF4_MASK = 3655 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M2_MF4_TU = 3656 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M4_M1 = 3657 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M4_M1_MASK = 3658 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M4_M1_TU = 3659 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M4_M2 = 3660 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M4_M2_MASK = 3661 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M4_M2_TU = 3662 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M4_MF2 = 3663 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M4_MF2_MASK = 3664 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M4_MF2_TU = 3665 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M8_M1 = 3666 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M8_M1_MASK = 3667 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M8_M1_TU = 3668 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M8_M2 = 3669 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M8_M2_MASK = 3670 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI64_V_M8_M2_TU = 3671 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_M1_M1 = 3672 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_M1_M1_MASK = 3673 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_M1_M1_TU = 3674 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_M1_M2 = 3675 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_M1_M2_MASK = 3676 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_M1_M2_TU = 3677 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_M2_M2 = 3678 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_M2_M2_MASK = 3679 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_M2_M2_TU = 3680 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF2_M1 = 3681 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF2_M1_MASK = 3682 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF2_M1_TU = 3683 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF2_M2 = 3684 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF2_M2_MASK = 3685 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF2_M2_TU = 3686 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF2_MF2 = 3687 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF2_MF2_MASK = 3688 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF2_MF2_TU = 3689 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF4_M1 = 3690 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF4_M1_MASK = 3691 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF4_M1_TU = 3692 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF4_M2 = 3693 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF4_M2_MASK = 3694 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF4_M2_TU = 3695 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF4_MF2 = 3696 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF4_MF2_MASK = 3697 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF4_MF2_TU = 3698 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF4_MF4 = 3699 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF4_MF4_MASK = 3700 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF4_MF4_TU = 3701 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF8_M1 = 3702 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF8_M1_MASK = 3703 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF8_M1_TU = 3704 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF8_MF2 = 3705 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF8_MF2_MASK = 3706 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF8_MF2_TU = 3707 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF8_MF4 = 3708 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF8_MF4_MASK = 3709 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF8_MF4_TU = 3710 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF8_MF8 = 3711 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF8_MF8_MASK = 3712 CEFBS_HasVInstructions, // PseudoVLOXSEG3EI8_V_MF8_MF8_TU = 3713 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_M1_M1 = 3714 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_M1_M1_MASK = 3715 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_M1_M1_TU = 3716 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_M1_M2 = 3717 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_M1_M2_MASK = 3718 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_M1_M2_TU = 3719 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_M1_MF2 = 3720 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_M1_MF2_MASK = 3721 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_M1_MF2_TU = 3722 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_M2_M1 = 3723 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_M2_M1_MASK = 3724 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_M2_M1_TU = 3725 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_M2_M2 = 3726 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_M2_M2_MASK = 3727 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_M2_M2_TU = 3728 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_M4_M2 = 3729 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_M4_M2_MASK = 3730 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_M4_M2_TU = 3731 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF2_M1 = 3732 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF2_M1_MASK = 3733 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF2_M1_TU = 3734 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF2_M2 = 3735 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF2_M2_MASK = 3736 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF2_M2_TU = 3737 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF2_MF2 = 3738 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF2_MF2_MASK = 3739 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF2_MF2_TU = 3740 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF2_MF4 = 3741 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF2_MF4_MASK = 3742 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF2_MF4_TU = 3743 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF4_M1 = 3744 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF4_M1_MASK = 3745 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF4_M1_TU = 3746 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF4_MF2 = 3747 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF4_MF2_MASK = 3748 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF4_MF2_TU = 3749 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF4_MF4 = 3750 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF4_MF4_MASK = 3751 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF4_MF4_TU = 3752 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF4_MF8 = 3753 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF4_MF8_MASK = 3754 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI16_V_MF4_MF8_TU = 3755 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M1_M1 = 3756 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M1_M1_MASK = 3757 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M1_M1_TU = 3758 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M1_M2 = 3759 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M1_M2_MASK = 3760 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M1_M2_TU = 3761 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M1_MF2 = 3762 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M1_MF2_MASK = 3763 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M1_MF2_TU = 3764 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M1_MF4 = 3765 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M1_MF4_MASK = 3766 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M1_MF4_TU = 3767 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M2_M1 = 3768 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M2_M1_MASK = 3769 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M2_M1_TU = 3770 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M2_M2 = 3771 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M2_M2_MASK = 3772 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M2_M2_TU = 3773 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M2_MF2 = 3774 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M2_MF2_MASK = 3775 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M2_MF2_TU = 3776 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M4_M1 = 3777 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M4_M1_MASK = 3778 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M4_M1_TU = 3779 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M4_M2 = 3780 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M4_M2_MASK = 3781 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M4_M2_TU = 3782 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M8_M2 = 3783 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M8_M2_MASK = 3784 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_M8_M2_TU = 3785 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_MF2_M1 = 3786 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_MF2_M1_MASK = 3787 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_MF2_M1_TU = 3788 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_MF2_MF2 = 3789 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_MF2_MF2_MASK = 3790 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_MF2_MF2_TU = 3791 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_MF2_MF4 = 3792 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_MF2_MF4_MASK = 3793 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_MF2_MF4_TU = 3794 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_MF2_MF8 = 3795 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_MF2_MF8_MASK = 3796 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI32_V_MF2_MF8_TU = 3797 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M1_M1 = 3798 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M1_M1_MASK = 3799 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M1_M1_TU = 3800 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M1_MF2 = 3801 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M1_MF2_MASK = 3802 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M1_MF2_TU = 3803 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M1_MF4 = 3804 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M1_MF4_MASK = 3805 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M1_MF4_TU = 3806 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M1_MF8 = 3807 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M1_MF8_MASK = 3808 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M1_MF8_TU = 3809 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M2_M1 = 3810 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M2_M1_MASK = 3811 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M2_M1_TU = 3812 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M2_M2 = 3813 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M2_M2_MASK = 3814 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M2_M2_TU = 3815 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M2_MF2 = 3816 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M2_MF2_MASK = 3817 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M2_MF2_TU = 3818 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M2_MF4 = 3819 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M2_MF4_MASK = 3820 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M2_MF4_TU = 3821 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M4_M1 = 3822 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M4_M1_MASK = 3823 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M4_M1_TU = 3824 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M4_M2 = 3825 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M4_M2_MASK = 3826 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M4_M2_TU = 3827 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M4_MF2 = 3828 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M4_MF2_MASK = 3829 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M4_MF2_TU = 3830 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M8_M1 = 3831 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M8_M1_MASK = 3832 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M8_M1_TU = 3833 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M8_M2 = 3834 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M8_M2_MASK = 3835 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI64_V_M8_M2_TU = 3836 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_M1_M1 = 3837 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_M1_M1_MASK = 3838 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_M1_M1_TU = 3839 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_M1_M2 = 3840 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_M1_M2_MASK = 3841 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_M1_M2_TU = 3842 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_M2_M2 = 3843 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_M2_M2_MASK = 3844 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_M2_M2_TU = 3845 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF2_M1 = 3846 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF2_M1_MASK = 3847 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF2_M1_TU = 3848 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF2_M2 = 3849 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF2_M2_MASK = 3850 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF2_M2_TU = 3851 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF2_MF2 = 3852 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF2_MF2_MASK = 3853 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF2_MF2_TU = 3854 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF4_M1 = 3855 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF4_M1_MASK = 3856 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF4_M1_TU = 3857 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF4_M2 = 3858 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF4_M2_MASK = 3859 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF4_M2_TU = 3860 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF4_MF2 = 3861 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF4_MF2_MASK = 3862 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF4_MF2_TU = 3863 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF4_MF4 = 3864 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF4_MF4_MASK = 3865 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF4_MF4_TU = 3866 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF8_M1 = 3867 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF8_M1_MASK = 3868 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF8_M1_TU = 3869 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF8_MF2 = 3870 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF8_MF2_MASK = 3871 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF8_MF2_TU = 3872 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF8_MF4 = 3873 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF8_MF4_MASK = 3874 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF8_MF4_TU = 3875 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF8_MF8 = 3876 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF8_MF8_MASK = 3877 CEFBS_HasVInstructions, // PseudoVLOXSEG4EI8_V_MF8_MF8_TU = 3878 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_M1_M1 = 3879 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_M1_M1_MASK = 3880 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_M1_M1_TU = 3881 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_M1_MF2 = 3882 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_M1_MF2_MASK = 3883 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_M1_MF2_TU = 3884 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_M2_M1 = 3885 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_M2_M1_MASK = 3886 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_M2_M1_TU = 3887 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF2_M1 = 3888 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF2_M1_MASK = 3889 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF2_M1_TU = 3890 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF2_MF2 = 3891 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF2_MF2_MASK = 3892 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF2_MF2_TU = 3893 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF2_MF4 = 3894 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF2_MF4_MASK = 3895 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF2_MF4_TU = 3896 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF4_M1 = 3897 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF4_M1_MASK = 3898 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF4_M1_TU = 3899 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF4_MF2 = 3900 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF4_MF2_MASK = 3901 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF4_MF2_TU = 3902 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF4_MF4 = 3903 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF4_MF4_MASK = 3904 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF4_MF4_TU = 3905 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF4_MF8 = 3906 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF4_MF8_MASK = 3907 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI16_V_MF4_MF8_TU = 3908 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_M1_M1 = 3909 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_M1_M1_MASK = 3910 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_M1_M1_TU = 3911 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_M1_MF2 = 3912 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_M1_MF2_MASK = 3913 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_M1_MF2_TU = 3914 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_M1_MF4 = 3915 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_M1_MF4_MASK = 3916 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_M1_MF4_TU = 3917 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_M2_M1 = 3918 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_M2_M1_MASK = 3919 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_M2_M1_TU = 3920 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_M2_MF2 = 3921 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_M2_MF2_MASK = 3922 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_M2_MF2_TU = 3923 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_M4_M1 = 3924 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_M4_M1_MASK = 3925 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_M4_M1_TU = 3926 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_MF2_M1 = 3927 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_MF2_M1_MASK = 3928 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_MF2_M1_TU = 3929 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_MF2_MF2 = 3930 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_MF2_MF2_MASK = 3931 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_MF2_MF2_TU = 3932 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_MF2_MF4 = 3933 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_MF2_MF4_MASK = 3934 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_MF2_MF4_TU = 3935 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_MF2_MF8 = 3936 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_MF2_MF8_MASK = 3937 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI32_V_MF2_MF8_TU = 3938 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M1_M1 = 3939 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M1_M1_MASK = 3940 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M1_M1_TU = 3941 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M1_MF2 = 3942 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M1_MF2_MASK = 3943 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M1_MF2_TU = 3944 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M1_MF4 = 3945 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M1_MF4_MASK = 3946 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M1_MF4_TU = 3947 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M1_MF8 = 3948 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M1_MF8_MASK = 3949 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M1_MF8_TU = 3950 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M2_M1 = 3951 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M2_M1_MASK = 3952 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M2_M1_TU = 3953 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M2_MF2 = 3954 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M2_MF2_MASK = 3955 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M2_MF2_TU = 3956 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M2_MF4 = 3957 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M2_MF4_MASK = 3958 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M2_MF4_TU = 3959 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M4_M1 = 3960 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M4_M1_MASK = 3961 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M4_M1_TU = 3962 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M4_MF2 = 3963 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M4_MF2_MASK = 3964 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M4_MF2_TU = 3965 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M8_M1 = 3966 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M8_M1_MASK = 3967 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI64_V_M8_M1_TU = 3968 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_M1_M1 = 3969 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_M1_M1_MASK = 3970 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_M1_M1_TU = 3971 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF2_M1 = 3972 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF2_M1_MASK = 3973 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF2_M1_TU = 3974 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF2_MF2 = 3975 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF2_MF2_MASK = 3976 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF2_MF2_TU = 3977 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF4_M1 = 3978 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF4_M1_MASK = 3979 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF4_M1_TU = 3980 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF4_MF2 = 3981 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF4_MF2_MASK = 3982 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF4_MF2_TU = 3983 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF4_MF4 = 3984 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF4_MF4_MASK = 3985 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF4_MF4_TU = 3986 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF8_M1 = 3987 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF8_M1_MASK = 3988 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF8_M1_TU = 3989 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF8_MF2 = 3990 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF8_MF2_MASK = 3991 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF8_MF2_TU = 3992 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF8_MF4 = 3993 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF8_MF4_MASK = 3994 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF8_MF4_TU = 3995 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF8_MF8 = 3996 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF8_MF8_MASK = 3997 CEFBS_HasVInstructions, // PseudoVLOXSEG5EI8_V_MF8_MF8_TU = 3998 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_M1_M1 = 3999 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_M1_M1_MASK = 4000 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_M1_M1_TU = 4001 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_M1_MF2 = 4002 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_M1_MF2_MASK = 4003 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_M1_MF2_TU = 4004 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_M2_M1 = 4005 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_M2_M1_MASK = 4006 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_M2_M1_TU = 4007 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF2_M1 = 4008 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF2_M1_MASK = 4009 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF2_M1_TU = 4010 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF2_MF2 = 4011 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF2_MF2_MASK = 4012 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF2_MF2_TU = 4013 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF2_MF4 = 4014 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF2_MF4_MASK = 4015 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF2_MF4_TU = 4016 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF4_M1 = 4017 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF4_M1_MASK = 4018 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF4_M1_TU = 4019 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF4_MF2 = 4020 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF4_MF2_MASK = 4021 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF4_MF2_TU = 4022 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF4_MF4 = 4023 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF4_MF4_MASK = 4024 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF4_MF4_TU = 4025 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF4_MF8 = 4026 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF4_MF8_MASK = 4027 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI16_V_MF4_MF8_TU = 4028 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_M1_M1 = 4029 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_M1_M1_MASK = 4030 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_M1_M1_TU = 4031 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_M1_MF2 = 4032 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_M1_MF2_MASK = 4033 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_M1_MF2_TU = 4034 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_M1_MF4 = 4035 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_M1_MF4_MASK = 4036 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_M1_MF4_TU = 4037 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_M2_M1 = 4038 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_M2_M1_MASK = 4039 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_M2_M1_TU = 4040 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_M2_MF2 = 4041 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_M2_MF2_MASK = 4042 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_M2_MF2_TU = 4043 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_M4_M1 = 4044 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_M4_M1_MASK = 4045 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_M4_M1_TU = 4046 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_MF2_M1 = 4047 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_MF2_M1_MASK = 4048 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_MF2_M1_TU = 4049 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_MF2_MF2 = 4050 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_MF2_MF2_MASK = 4051 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_MF2_MF2_TU = 4052 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_MF2_MF4 = 4053 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_MF2_MF4_MASK = 4054 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_MF2_MF4_TU = 4055 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_MF2_MF8 = 4056 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_MF2_MF8_MASK = 4057 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI32_V_MF2_MF8_TU = 4058 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M1_M1 = 4059 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M1_M1_MASK = 4060 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M1_M1_TU = 4061 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M1_MF2 = 4062 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M1_MF2_MASK = 4063 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M1_MF2_TU = 4064 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M1_MF4 = 4065 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M1_MF4_MASK = 4066 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M1_MF4_TU = 4067 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M1_MF8 = 4068 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M1_MF8_MASK = 4069 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M1_MF8_TU = 4070 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M2_M1 = 4071 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M2_M1_MASK = 4072 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M2_M1_TU = 4073 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M2_MF2 = 4074 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M2_MF2_MASK = 4075 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M2_MF2_TU = 4076 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M2_MF4 = 4077 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M2_MF4_MASK = 4078 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M2_MF4_TU = 4079 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M4_M1 = 4080 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M4_M1_MASK = 4081 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M4_M1_TU = 4082 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M4_MF2 = 4083 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M4_MF2_MASK = 4084 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M4_MF2_TU = 4085 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M8_M1 = 4086 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M8_M1_MASK = 4087 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI64_V_M8_M1_TU = 4088 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_M1_M1 = 4089 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_M1_M1_MASK = 4090 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_M1_M1_TU = 4091 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF2_M1 = 4092 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF2_M1_MASK = 4093 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF2_M1_TU = 4094 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF2_MF2 = 4095 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF2_MF2_MASK = 4096 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF2_MF2_TU = 4097 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF4_M1 = 4098 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF4_M1_MASK = 4099 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF4_M1_TU = 4100 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF4_MF2 = 4101 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF4_MF2_MASK = 4102 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF4_MF2_TU = 4103 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF4_MF4 = 4104 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF4_MF4_MASK = 4105 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF4_MF4_TU = 4106 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF8_M1 = 4107 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF8_M1_MASK = 4108 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF8_M1_TU = 4109 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF8_MF2 = 4110 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF8_MF2_MASK = 4111 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF8_MF2_TU = 4112 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF8_MF4 = 4113 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF8_MF4_MASK = 4114 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF8_MF4_TU = 4115 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF8_MF8 = 4116 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF8_MF8_MASK = 4117 CEFBS_HasVInstructions, // PseudoVLOXSEG6EI8_V_MF8_MF8_TU = 4118 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_M1_M1 = 4119 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_M1_M1_MASK = 4120 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_M1_M1_TU = 4121 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_M1_MF2 = 4122 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_M1_MF2_MASK = 4123 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_M1_MF2_TU = 4124 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_M2_M1 = 4125 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_M2_M1_MASK = 4126 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_M2_M1_TU = 4127 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF2_M1 = 4128 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF2_M1_MASK = 4129 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF2_M1_TU = 4130 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF2_MF2 = 4131 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF2_MF2_MASK = 4132 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF2_MF2_TU = 4133 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF2_MF4 = 4134 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF2_MF4_MASK = 4135 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF2_MF4_TU = 4136 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF4_M1 = 4137 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF4_M1_MASK = 4138 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF4_M1_TU = 4139 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF4_MF2 = 4140 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF4_MF2_MASK = 4141 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF4_MF2_TU = 4142 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF4_MF4 = 4143 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF4_MF4_MASK = 4144 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF4_MF4_TU = 4145 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF4_MF8 = 4146 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF4_MF8_MASK = 4147 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI16_V_MF4_MF8_TU = 4148 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_M1_M1 = 4149 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_M1_M1_MASK = 4150 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_M1_M1_TU = 4151 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_M1_MF2 = 4152 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_M1_MF2_MASK = 4153 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_M1_MF2_TU = 4154 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_M1_MF4 = 4155 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_M1_MF4_MASK = 4156 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_M1_MF4_TU = 4157 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_M2_M1 = 4158 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_M2_M1_MASK = 4159 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_M2_M1_TU = 4160 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_M2_MF2 = 4161 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_M2_MF2_MASK = 4162 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_M2_MF2_TU = 4163 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_M4_M1 = 4164 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_M4_M1_MASK = 4165 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_M4_M1_TU = 4166 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_MF2_M1 = 4167 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_MF2_M1_MASK = 4168 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_MF2_M1_TU = 4169 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_MF2_MF2 = 4170 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_MF2_MF2_MASK = 4171 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_MF2_MF2_TU = 4172 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_MF2_MF4 = 4173 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_MF2_MF4_MASK = 4174 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_MF2_MF4_TU = 4175 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_MF2_MF8 = 4176 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_MF2_MF8_MASK = 4177 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI32_V_MF2_MF8_TU = 4178 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M1_M1 = 4179 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M1_M1_MASK = 4180 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M1_M1_TU = 4181 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M1_MF2 = 4182 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M1_MF2_MASK = 4183 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M1_MF2_TU = 4184 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M1_MF4 = 4185 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M1_MF4_MASK = 4186 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M1_MF4_TU = 4187 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M1_MF8 = 4188 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M1_MF8_MASK = 4189 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M1_MF8_TU = 4190 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M2_M1 = 4191 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M2_M1_MASK = 4192 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M2_M1_TU = 4193 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M2_MF2 = 4194 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M2_MF2_MASK = 4195 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M2_MF2_TU = 4196 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M2_MF4 = 4197 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M2_MF4_MASK = 4198 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M2_MF4_TU = 4199 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M4_M1 = 4200 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M4_M1_MASK = 4201 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M4_M1_TU = 4202 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M4_MF2 = 4203 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M4_MF2_MASK = 4204 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M4_MF2_TU = 4205 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M8_M1 = 4206 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M8_M1_MASK = 4207 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI64_V_M8_M1_TU = 4208 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_M1_M1 = 4209 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_M1_M1_MASK = 4210 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_M1_M1_TU = 4211 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF2_M1 = 4212 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF2_M1_MASK = 4213 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF2_M1_TU = 4214 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF2_MF2 = 4215 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF2_MF2_MASK = 4216 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF2_MF2_TU = 4217 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF4_M1 = 4218 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF4_M1_MASK = 4219 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF4_M1_TU = 4220 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF4_MF2 = 4221 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF4_MF2_MASK = 4222 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF4_MF2_TU = 4223 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF4_MF4 = 4224 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF4_MF4_MASK = 4225 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF4_MF4_TU = 4226 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF8_M1 = 4227 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF8_M1_MASK = 4228 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF8_M1_TU = 4229 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF8_MF2 = 4230 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF8_MF2_MASK = 4231 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF8_MF2_TU = 4232 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF8_MF4 = 4233 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF8_MF4_MASK = 4234 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF8_MF4_TU = 4235 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF8_MF8 = 4236 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF8_MF8_MASK = 4237 CEFBS_HasVInstructions, // PseudoVLOXSEG7EI8_V_MF8_MF8_TU = 4238 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_M1_M1 = 4239 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_M1_M1_MASK = 4240 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_M1_M1_TU = 4241 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_M1_MF2 = 4242 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_M1_MF2_MASK = 4243 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_M1_MF2_TU = 4244 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_M2_M1 = 4245 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_M2_M1_MASK = 4246 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_M2_M1_TU = 4247 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF2_M1 = 4248 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF2_M1_MASK = 4249 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF2_M1_TU = 4250 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF2_MF2 = 4251 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF2_MF2_MASK = 4252 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF2_MF2_TU = 4253 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF2_MF4 = 4254 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF2_MF4_MASK = 4255 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF2_MF4_TU = 4256 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF4_M1 = 4257 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF4_M1_MASK = 4258 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF4_M1_TU = 4259 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF4_MF2 = 4260 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF4_MF2_MASK = 4261 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF4_MF2_TU = 4262 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF4_MF4 = 4263 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF4_MF4_MASK = 4264 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF4_MF4_TU = 4265 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF4_MF8 = 4266 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF4_MF8_MASK = 4267 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI16_V_MF4_MF8_TU = 4268 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_M1_M1 = 4269 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_M1_M1_MASK = 4270 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_M1_M1_TU = 4271 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_M1_MF2 = 4272 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_M1_MF2_MASK = 4273 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_M1_MF2_TU = 4274 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_M1_MF4 = 4275 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_M1_MF4_MASK = 4276 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_M1_MF4_TU = 4277 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_M2_M1 = 4278 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_M2_M1_MASK = 4279 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_M2_M1_TU = 4280 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_M2_MF2 = 4281 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_M2_MF2_MASK = 4282 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_M2_MF2_TU = 4283 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_M4_M1 = 4284 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_M4_M1_MASK = 4285 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_M4_M1_TU = 4286 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_MF2_M1 = 4287 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_MF2_M1_MASK = 4288 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_MF2_M1_TU = 4289 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_MF2_MF2 = 4290 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_MF2_MF2_MASK = 4291 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_MF2_MF2_TU = 4292 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_MF2_MF4 = 4293 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_MF2_MF4_MASK = 4294 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_MF2_MF4_TU = 4295 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_MF2_MF8 = 4296 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_MF2_MF8_MASK = 4297 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI32_V_MF2_MF8_TU = 4298 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M1_M1 = 4299 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M1_M1_MASK = 4300 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M1_M1_TU = 4301 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M1_MF2 = 4302 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M1_MF2_MASK = 4303 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M1_MF2_TU = 4304 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M1_MF4 = 4305 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M1_MF4_MASK = 4306 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M1_MF4_TU = 4307 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M1_MF8 = 4308 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M1_MF8_MASK = 4309 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M1_MF8_TU = 4310 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M2_M1 = 4311 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M2_M1_MASK = 4312 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M2_M1_TU = 4313 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M2_MF2 = 4314 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M2_MF2_MASK = 4315 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M2_MF2_TU = 4316 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M2_MF4 = 4317 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M2_MF4_MASK = 4318 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M2_MF4_TU = 4319 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M4_M1 = 4320 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M4_M1_MASK = 4321 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M4_M1_TU = 4322 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M4_MF2 = 4323 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M4_MF2_MASK = 4324 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M4_MF2_TU = 4325 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M8_M1 = 4326 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M8_M1_MASK = 4327 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI64_V_M8_M1_TU = 4328 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_M1_M1 = 4329 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_M1_M1_MASK = 4330 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_M1_M1_TU = 4331 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF2_M1 = 4332 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF2_M1_MASK = 4333 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF2_M1_TU = 4334 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF2_MF2 = 4335 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF2_MF2_MASK = 4336 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF2_MF2_TU = 4337 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF4_M1 = 4338 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF4_M1_MASK = 4339 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF4_M1_TU = 4340 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF4_MF2 = 4341 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF4_MF2_MASK = 4342 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF4_MF2_TU = 4343 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF4_MF4 = 4344 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF4_MF4_MASK = 4345 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF4_MF4_TU = 4346 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF8_M1 = 4347 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF8_M1_MASK = 4348 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF8_M1_TU = 4349 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF8_MF2 = 4350 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF8_MF2_MASK = 4351 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF8_MF2_TU = 4352 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF8_MF4 = 4353 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF8_MF4_MASK = 4354 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF8_MF4_TU = 4355 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF8_MF8 = 4356 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF8_MF8_MASK = 4357 CEFBS_HasVInstructions, // PseudoVLOXSEG8EI8_V_MF8_MF8_TU = 4358 CEFBS_HasVInstructions, // PseudoVLSE16_V_M1 = 4359 CEFBS_HasVInstructions, // PseudoVLSE16_V_M1_MASK = 4360 CEFBS_HasVInstructions, // PseudoVLSE16_V_M1_TU = 4361 CEFBS_HasVInstructions, // PseudoVLSE16_V_M2 = 4362 CEFBS_HasVInstructions, // PseudoVLSE16_V_M2_MASK = 4363 CEFBS_HasVInstructions, // PseudoVLSE16_V_M2_TU = 4364 CEFBS_HasVInstructions, // PseudoVLSE16_V_M4 = 4365 CEFBS_HasVInstructions, // PseudoVLSE16_V_M4_MASK = 4366 CEFBS_HasVInstructions, // PseudoVLSE16_V_M4_TU = 4367 CEFBS_HasVInstructions, // PseudoVLSE16_V_M8 = 4368 CEFBS_HasVInstructions, // PseudoVLSE16_V_M8_MASK = 4369 CEFBS_HasVInstructions, // PseudoVLSE16_V_M8_TU = 4370 CEFBS_HasVInstructions, // PseudoVLSE16_V_MF2 = 4371 CEFBS_HasVInstructions, // PseudoVLSE16_V_MF2_MASK = 4372 CEFBS_HasVInstructions, // PseudoVLSE16_V_MF2_TU = 4373 CEFBS_HasVInstructions, // PseudoVLSE16_V_MF4 = 4374 CEFBS_HasVInstructions, // PseudoVLSE16_V_MF4_MASK = 4375 CEFBS_HasVInstructions, // PseudoVLSE16_V_MF4_TU = 4376 CEFBS_HasVInstructions, // PseudoVLSE32_V_M1 = 4377 CEFBS_HasVInstructions, // PseudoVLSE32_V_M1_MASK = 4378 CEFBS_HasVInstructions, // PseudoVLSE32_V_M1_TU = 4379 CEFBS_HasVInstructions, // PseudoVLSE32_V_M2 = 4380 CEFBS_HasVInstructions, // PseudoVLSE32_V_M2_MASK = 4381 CEFBS_HasVInstructions, // PseudoVLSE32_V_M2_TU = 4382 CEFBS_HasVInstructions, // PseudoVLSE32_V_M4 = 4383 CEFBS_HasVInstructions, // PseudoVLSE32_V_M4_MASK = 4384 CEFBS_HasVInstructions, // PseudoVLSE32_V_M4_TU = 4385 CEFBS_HasVInstructions, // PseudoVLSE32_V_M8 = 4386 CEFBS_HasVInstructions, // PseudoVLSE32_V_M8_MASK = 4387 CEFBS_HasVInstructions, // PseudoVLSE32_V_M8_TU = 4388 CEFBS_HasVInstructions, // PseudoVLSE32_V_MF2 = 4389 CEFBS_HasVInstructions, // PseudoVLSE32_V_MF2_MASK = 4390 CEFBS_HasVInstructions, // PseudoVLSE32_V_MF2_TU = 4391 CEFBS_HasVInstructions, // PseudoVLSE64_V_M1 = 4392 CEFBS_HasVInstructions, // PseudoVLSE64_V_M1_MASK = 4393 CEFBS_HasVInstructions, // PseudoVLSE64_V_M1_TU = 4394 CEFBS_HasVInstructions, // PseudoVLSE64_V_M2 = 4395 CEFBS_HasVInstructions, // PseudoVLSE64_V_M2_MASK = 4396 CEFBS_HasVInstructions, // PseudoVLSE64_V_M2_TU = 4397 CEFBS_HasVInstructions, // PseudoVLSE64_V_M4 = 4398 CEFBS_HasVInstructions, // PseudoVLSE64_V_M4_MASK = 4399 CEFBS_HasVInstructions, // PseudoVLSE64_V_M4_TU = 4400 CEFBS_HasVInstructions, // PseudoVLSE64_V_M8 = 4401 CEFBS_HasVInstructions, // PseudoVLSE64_V_M8_MASK = 4402 CEFBS_HasVInstructions, // PseudoVLSE64_V_M8_TU = 4403 CEFBS_HasVInstructions, // PseudoVLSE8_V_M1 = 4404 CEFBS_HasVInstructions, // PseudoVLSE8_V_M1_MASK = 4405 CEFBS_HasVInstructions, // PseudoVLSE8_V_M1_TU = 4406 CEFBS_HasVInstructions, // PseudoVLSE8_V_M2 = 4407 CEFBS_HasVInstructions, // PseudoVLSE8_V_M2_MASK = 4408 CEFBS_HasVInstructions, // PseudoVLSE8_V_M2_TU = 4409 CEFBS_HasVInstructions, // PseudoVLSE8_V_M4 = 4410 CEFBS_HasVInstructions, // PseudoVLSE8_V_M4_MASK = 4411 CEFBS_HasVInstructions, // PseudoVLSE8_V_M4_TU = 4412 CEFBS_HasVInstructions, // PseudoVLSE8_V_M8 = 4413 CEFBS_HasVInstructions, // PseudoVLSE8_V_M8_MASK = 4414 CEFBS_HasVInstructions, // PseudoVLSE8_V_M8_TU = 4415 CEFBS_HasVInstructions, // PseudoVLSE8_V_MF2 = 4416 CEFBS_HasVInstructions, // PseudoVLSE8_V_MF2_MASK = 4417 CEFBS_HasVInstructions, // PseudoVLSE8_V_MF2_TU = 4418 CEFBS_HasVInstructions, // PseudoVLSE8_V_MF4 = 4419 CEFBS_HasVInstructions, // PseudoVLSE8_V_MF4_MASK = 4420 CEFBS_HasVInstructions, // PseudoVLSE8_V_MF4_TU = 4421 CEFBS_HasVInstructions, // PseudoVLSE8_V_MF8 = 4422 CEFBS_HasVInstructions, // PseudoVLSE8_V_MF8_MASK = 4423 CEFBS_HasVInstructions, // PseudoVLSE8_V_MF8_TU = 4424 CEFBS_HasVInstructions, // PseudoVLSEG2E16FF_V_M1 = 4425 CEFBS_HasVInstructions, // PseudoVLSEG2E16FF_V_M1_MASK = 4426 CEFBS_HasVInstructions, // PseudoVLSEG2E16FF_V_M1_TU = 4427 CEFBS_HasVInstructions, // PseudoVLSEG2E16FF_V_M2 = 4428 CEFBS_HasVInstructions, // PseudoVLSEG2E16FF_V_M2_MASK = 4429 CEFBS_HasVInstructions, // PseudoVLSEG2E16FF_V_M2_TU = 4430 CEFBS_HasVInstructions, // PseudoVLSEG2E16FF_V_M4 = 4431 CEFBS_HasVInstructions, // PseudoVLSEG2E16FF_V_M4_MASK = 4432 CEFBS_HasVInstructions, // PseudoVLSEG2E16FF_V_M4_TU = 4433 CEFBS_HasVInstructions, // PseudoVLSEG2E16FF_V_MF2 = 4434 CEFBS_HasVInstructions, // PseudoVLSEG2E16FF_V_MF2_MASK = 4435 CEFBS_HasVInstructions, // PseudoVLSEG2E16FF_V_MF2_TU = 4436 CEFBS_HasVInstructions, // PseudoVLSEG2E16FF_V_MF4 = 4437 CEFBS_HasVInstructions, // PseudoVLSEG2E16FF_V_MF4_MASK = 4438 CEFBS_HasVInstructions, // PseudoVLSEG2E16FF_V_MF4_TU = 4439 CEFBS_HasVInstructions, // PseudoVLSEG2E16_V_M1 = 4440 CEFBS_HasVInstructions, // PseudoVLSEG2E16_V_M1_MASK = 4441 CEFBS_HasVInstructions, // PseudoVLSEG2E16_V_M1_TU = 4442 CEFBS_HasVInstructions, // PseudoVLSEG2E16_V_M2 = 4443 CEFBS_HasVInstructions, // PseudoVLSEG2E16_V_M2_MASK = 4444 CEFBS_HasVInstructions, // PseudoVLSEG2E16_V_M2_TU = 4445 CEFBS_HasVInstructions, // PseudoVLSEG2E16_V_M4 = 4446 CEFBS_HasVInstructions, // PseudoVLSEG2E16_V_M4_MASK = 4447 CEFBS_HasVInstructions, // PseudoVLSEG2E16_V_M4_TU = 4448 CEFBS_HasVInstructions, // PseudoVLSEG2E16_V_MF2 = 4449 CEFBS_HasVInstructions, // PseudoVLSEG2E16_V_MF2_MASK = 4450 CEFBS_HasVInstructions, // PseudoVLSEG2E16_V_MF2_TU = 4451 CEFBS_HasVInstructions, // PseudoVLSEG2E16_V_MF4 = 4452 CEFBS_HasVInstructions, // PseudoVLSEG2E16_V_MF4_MASK = 4453 CEFBS_HasVInstructions, // PseudoVLSEG2E16_V_MF4_TU = 4454 CEFBS_HasVInstructions, // PseudoVLSEG2E32FF_V_M1 = 4455 CEFBS_HasVInstructions, // PseudoVLSEG2E32FF_V_M1_MASK = 4456 CEFBS_HasVInstructions, // PseudoVLSEG2E32FF_V_M1_TU = 4457 CEFBS_HasVInstructions, // PseudoVLSEG2E32FF_V_M2 = 4458 CEFBS_HasVInstructions, // PseudoVLSEG2E32FF_V_M2_MASK = 4459 CEFBS_HasVInstructions, // PseudoVLSEG2E32FF_V_M2_TU = 4460 CEFBS_HasVInstructions, // PseudoVLSEG2E32FF_V_M4 = 4461 CEFBS_HasVInstructions, // PseudoVLSEG2E32FF_V_M4_MASK = 4462 CEFBS_HasVInstructions, // PseudoVLSEG2E32FF_V_M4_TU = 4463 CEFBS_HasVInstructions, // PseudoVLSEG2E32FF_V_MF2 = 4464 CEFBS_HasVInstructions, // PseudoVLSEG2E32FF_V_MF2_MASK = 4465 CEFBS_HasVInstructions, // PseudoVLSEG2E32FF_V_MF2_TU = 4466 CEFBS_HasVInstructions, // PseudoVLSEG2E32_V_M1 = 4467 CEFBS_HasVInstructions, // PseudoVLSEG2E32_V_M1_MASK = 4468 CEFBS_HasVInstructions, // PseudoVLSEG2E32_V_M1_TU = 4469 CEFBS_HasVInstructions, // PseudoVLSEG2E32_V_M2 = 4470 CEFBS_HasVInstructions, // PseudoVLSEG2E32_V_M2_MASK = 4471 CEFBS_HasVInstructions, // PseudoVLSEG2E32_V_M2_TU = 4472 CEFBS_HasVInstructions, // PseudoVLSEG2E32_V_M4 = 4473 CEFBS_HasVInstructions, // PseudoVLSEG2E32_V_M4_MASK = 4474 CEFBS_HasVInstructions, // PseudoVLSEG2E32_V_M4_TU = 4475 CEFBS_HasVInstructions, // PseudoVLSEG2E32_V_MF2 = 4476 CEFBS_HasVInstructions, // PseudoVLSEG2E32_V_MF2_MASK = 4477 CEFBS_HasVInstructions, // PseudoVLSEG2E32_V_MF2_TU = 4478 CEFBS_HasVInstructions, // PseudoVLSEG2E64FF_V_M1 = 4479 CEFBS_HasVInstructions, // PseudoVLSEG2E64FF_V_M1_MASK = 4480 CEFBS_HasVInstructions, // PseudoVLSEG2E64FF_V_M1_TU = 4481 CEFBS_HasVInstructions, // PseudoVLSEG2E64FF_V_M2 = 4482 CEFBS_HasVInstructions, // PseudoVLSEG2E64FF_V_M2_MASK = 4483 CEFBS_HasVInstructions, // PseudoVLSEG2E64FF_V_M2_TU = 4484 CEFBS_HasVInstructions, // PseudoVLSEG2E64FF_V_M4 = 4485 CEFBS_HasVInstructions, // PseudoVLSEG2E64FF_V_M4_MASK = 4486 CEFBS_HasVInstructions, // PseudoVLSEG2E64FF_V_M4_TU = 4487 CEFBS_HasVInstructions, // PseudoVLSEG2E64_V_M1 = 4488 CEFBS_HasVInstructions, // PseudoVLSEG2E64_V_M1_MASK = 4489 CEFBS_HasVInstructions, // PseudoVLSEG2E64_V_M1_TU = 4490 CEFBS_HasVInstructions, // PseudoVLSEG2E64_V_M2 = 4491 CEFBS_HasVInstructions, // PseudoVLSEG2E64_V_M2_MASK = 4492 CEFBS_HasVInstructions, // PseudoVLSEG2E64_V_M2_TU = 4493 CEFBS_HasVInstructions, // PseudoVLSEG2E64_V_M4 = 4494 CEFBS_HasVInstructions, // PseudoVLSEG2E64_V_M4_MASK = 4495 CEFBS_HasVInstructions, // PseudoVLSEG2E64_V_M4_TU = 4496 CEFBS_HasVInstructions, // PseudoVLSEG2E8FF_V_M1 = 4497 CEFBS_HasVInstructions, // PseudoVLSEG2E8FF_V_M1_MASK = 4498 CEFBS_HasVInstructions, // PseudoVLSEG2E8FF_V_M1_TU = 4499 CEFBS_HasVInstructions, // PseudoVLSEG2E8FF_V_M2 = 4500 CEFBS_HasVInstructions, // PseudoVLSEG2E8FF_V_M2_MASK = 4501 CEFBS_HasVInstructions, // PseudoVLSEG2E8FF_V_M2_TU = 4502 CEFBS_HasVInstructions, // PseudoVLSEG2E8FF_V_M4 = 4503 CEFBS_HasVInstructions, // PseudoVLSEG2E8FF_V_M4_MASK = 4504 CEFBS_HasVInstructions, // PseudoVLSEG2E8FF_V_M4_TU = 4505 CEFBS_HasVInstructions, // PseudoVLSEG2E8FF_V_MF2 = 4506 CEFBS_HasVInstructions, // PseudoVLSEG2E8FF_V_MF2_MASK = 4507 CEFBS_HasVInstructions, // PseudoVLSEG2E8FF_V_MF2_TU = 4508 CEFBS_HasVInstructions, // PseudoVLSEG2E8FF_V_MF4 = 4509 CEFBS_HasVInstructions, // PseudoVLSEG2E8FF_V_MF4_MASK = 4510 CEFBS_HasVInstructions, // PseudoVLSEG2E8FF_V_MF4_TU = 4511 CEFBS_HasVInstructions, // PseudoVLSEG2E8FF_V_MF8 = 4512 CEFBS_HasVInstructions, // PseudoVLSEG2E8FF_V_MF8_MASK = 4513 CEFBS_HasVInstructions, // PseudoVLSEG2E8FF_V_MF8_TU = 4514 CEFBS_HasVInstructions, // PseudoVLSEG2E8_V_M1 = 4515 CEFBS_HasVInstructions, // PseudoVLSEG2E8_V_M1_MASK = 4516 CEFBS_HasVInstructions, // PseudoVLSEG2E8_V_M1_TU = 4517 CEFBS_HasVInstructions, // PseudoVLSEG2E8_V_M2 = 4518 CEFBS_HasVInstructions, // PseudoVLSEG2E8_V_M2_MASK = 4519 CEFBS_HasVInstructions, // PseudoVLSEG2E8_V_M2_TU = 4520 CEFBS_HasVInstructions, // PseudoVLSEG2E8_V_M4 = 4521 CEFBS_HasVInstructions, // PseudoVLSEG2E8_V_M4_MASK = 4522 CEFBS_HasVInstructions, // PseudoVLSEG2E8_V_M4_TU = 4523 CEFBS_HasVInstructions, // PseudoVLSEG2E8_V_MF2 = 4524 CEFBS_HasVInstructions, // PseudoVLSEG2E8_V_MF2_MASK = 4525 CEFBS_HasVInstructions, // PseudoVLSEG2E8_V_MF2_TU = 4526 CEFBS_HasVInstructions, // PseudoVLSEG2E8_V_MF4 = 4527 CEFBS_HasVInstructions, // PseudoVLSEG2E8_V_MF4_MASK = 4528 CEFBS_HasVInstructions, // PseudoVLSEG2E8_V_MF4_TU = 4529 CEFBS_HasVInstructions, // PseudoVLSEG2E8_V_MF8 = 4530 CEFBS_HasVInstructions, // PseudoVLSEG2E8_V_MF8_MASK = 4531 CEFBS_HasVInstructions, // PseudoVLSEG2E8_V_MF8_TU = 4532 CEFBS_HasVInstructions, // PseudoVLSEG3E16FF_V_M1 = 4533 CEFBS_HasVInstructions, // PseudoVLSEG3E16FF_V_M1_MASK = 4534 CEFBS_HasVInstructions, // PseudoVLSEG3E16FF_V_M1_TU = 4535 CEFBS_HasVInstructions, // PseudoVLSEG3E16FF_V_M2 = 4536 CEFBS_HasVInstructions, // PseudoVLSEG3E16FF_V_M2_MASK = 4537 CEFBS_HasVInstructions, // PseudoVLSEG3E16FF_V_M2_TU = 4538 CEFBS_HasVInstructions, // PseudoVLSEG3E16FF_V_MF2 = 4539 CEFBS_HasVInstructions, // PseudoVLSEG3E16FF_V_MF2_MASK = 4540 CEFBS_HasVInstructions, // PseudoVLSEG3E16FF_V_MF2_TU = 4541 CEFBS_HasVInstructions, // PseudoVLSEG3E16FF_V_MF4 = 4542 CEFBS_HasVInstructions, // PseudoVLSEG3E16FF_V_MF4_MASK = 4543 CEFBS_HasVInstructions, // PseudoVLSEG3E16FF_V_MF4_TU = 4544 CEFBS_HasVInstructions, // PseudoVLSEG3E16_V_M1 = 4545 CEFBS_HasVInstructions, // PseudoVLSEG3E16_V_M1_MASK = 4546 CEFBS_HasVInstructions, // PseudoVLSEG3E16_V_M1_TU = 4547 CEFBS_HasVInstructions, // PseudoVLSEG3E16_V_M2 = 4548 CEFBS_HasVInstructions, // PseudoVLSEG3E16_V_M2_MASK = 4549 CEFBS_HasVInstructions, // PseudoVLSEG3E16_V_M2_TU = 4550 CEFBS_HasVInstructions, // PseudoVLSEG3E16_V_MF2 = 4551 CEFBS_HasVInstructions, // PseudoVLSEG3E16_V_MF2_MASK = 4552 CEFBS_HasVInstructions, // PseudoVLSEG3E16_V_MF2_TU = 4553 CEFBS_HasVInstructions, // PseudoVLSEG3E16_V_MF4 = 4554 CEFBS_HasVInstructions, // PseudoVLSEG3E16_V_MF4_MASK = 4555 CEFBS_HasVInstructions, // PseudoVLSEG3E16_V_MF4_TU = 4556 CEFBS_HasVInstructions, // PseudoVLSEG3E32FF_V_M1 = 4557 CEFBS_HasVInstructions, // PseudoVLSEG3E32FF_V_M1_MASK = 4558 CEFBS_HasVInstructions, // PseudoVLSEG3E32FF_V_M1_TU = 4559 CEFBS_HasVInstructions, // PseudoVLSEG3E32FF_V_M2 = 4560 CEFBS_HasVInstructions, // PseudoVLSEG3E32FF_V_M2_MASK = 4561 CEFBS_HasVInstructions, // PseudoVLSEG3E32FF_V_M2_TU = 4562 CEFBS_HasVInstructions, // PseudoVLSEG3E32FF_V_MF2 = 4563 CEFBS_HasVInstructions, // PseudoVLSEG3E32FF_V_MF2_MASK = 4564 CEFBS_HasVInstructions, // PseudoVLSEG3E32FF_V_MF2_TU = 4565 CEFBS_HasVInstructions, // PseudoVLSEG3E32_V_M1 = 4566 CEFBS_HasVInstructions, // PseudoVLSEG3E32_V_M1_MASK = 4567 CEFBS_HasVInstructions, // PseudoVLSEG3E32_V_M1_TU = 4568 CEFBS_HasVInstructions, // PseudoVLSEG3E32_V_M2 = 4569 CEFBS_HasVInstructions, // PseudoVLSEG3E32_V_M2_MASK = 4570 CEFBS_HasVInstructions, // PseudoVLSEG3E32_V_M2_TU = 4571 CEFBS_HasVInstructions, // PseudoVLSEG3E32_V_MF2 = 4572 CEFBS_HasVInstructions, // PseudoVLSEG3E32_V_MF2_MASK = 4573 CEFBS_HasVInstructions, // PseudoVLSEG3E32_V_MF2_TU = 4574 CEFBS_HasVInstructions, // PseudoVLSEG3E64FF_V_M1 = 4575 CEFBS_HasVInstructions, // PseudoVLSEG3E64FF_V_M1_MASK = 4576 CEFBS_HasVInstructions, // PseudoVLSEG3E64FF_V_M1_TU = 4577 CEFBS_HasVInstructions, // PseudoVLSEG3E64FF_V_M2 = 4578 CEFBS_HasVInstructions, // PseudoVLSEG3E64FF_V_M2_MASK = 4579 CEFBS_HasVInstructions, // PseudoVLSEG3E64FF_V_M2_TU = 4580 CEFBS_HasVInstructions, // PseudoVLSEG3E64_V_M1 = 4581 CEFBS_HasVInstructions, // PseudoVLSEG3E64_V_M1_MASK = 4582 CEFBS_HasVInstructions, // PseudoVLSEG3E64_V_M1_TU = 4583 CEFBS_HasVInstructions, // PseudoVLSEG3E64_V_M2 = 4584 CEFBS_HasVInstructions, // PseudoVLSEG3E64_V_M2_MASK = 4585 CEFBS_HasVInstructions, // PseudoVLSEG3E64_V_M2_TU = 4586 CEFBS_HasVInstructions, // PseudoVLSEG3E8FF_V_M1 = 4587 CEFBS_HasVInstructions, // PseudoVLSEG3E8FF_V_M1_MASK = 4588 CEFBS_HasVInstructions, // PseudoVLSEG3E8FF_V_M1_TU = 4589 CEFBS_HasVInstructions, // PseudoVLSEG3E8FF_V_M2 = 4590 CEFBS_HasVInstructions, // PseudoVLSEG3E8FF_V_M2_MASK = 4591 CEFBS_HasVInstructions, // PseudoVLSEG3E8FF_V_M2_TU = 4592 CEFBS_HasVInstructions, // PseudoVLSEG3E8FF_V_MF2 = 4593 CEFBS_HasVInstructions, // PseudoVLSEG3E8FF_V_MF2_MASK = 4594 CEFBS_HasVInstructions, // PseudoVLSEG3E8FF_V_MF2_TU = 4595 CEFBS_HasVInstructions, // PseudoVLSEG3E8FF_V_MF4 = 4596 CEFBS_HasVInstructions, // PseudoVLSEG3E8FF_V_MF4_MASK = 4597 CEFBS_HasVInstructions, // PseudoVLSEG3E8FF_V_MF4_TU = 4598 CEFBS_HasVInstructions, // PseudoVLSEG3E8FF_V_MF8 = 4599 CEFBS_HasVInstructions, // PseudoVLSEG3E8FF_V_MF8_MASK = 4600 CEFBS_HasVInstructions, // PseudoVLSEG3E8FF_V_MF8_TU = 4601 CEFBS_HasVInstructions, // PseudoVLSEG3E8_V_M1 = 4602 CEFBS_HasVInstructions, // PseudoVLSEG3E8_V_M1_MASK = 4603 CEFBS_HasVInstructions, // PseudoVLSEG3E8_V_M1_TU = 4604 CEFBS_HasVInstructions, // PseudoVLSEG3E8_V_M2 = 4605 CEFBS_HasVInstructions, // PseudoVLSEG3E8_V_M2_MASK = 4606 CEFBS_HasVInstructions, // PseudoVLSEG3E8_V_M2_TU = 4607 CEFBS_HasVInstructions, // PseudoVLSEG3E8_V_MF2 = 4608 CEFBS_HasVInstructions, // PseudoVLSEG3E8_V_MF2_MASK = 4609 CEFBS_HasVInstructions, // PseudoVLSEG3E8_V_MF2_TU = 4610 CEFBS_HasVInstructions, // PseudoVLSEG3E8_V_MF4 = 4611 CEFBS_HasVInstructions, // PseudoVLSEG3E8_V_MF4_MASK = 4612 CEFBS_HasVInstructions, // PseudoVLSEG3E8_V_MF4_TU = 4613 CEFBS_HasVInstructions, // PseudoVLSEG3E8_V_MF8 = 4614 CEFBS_HasVInstructions, // PseudoVLSEG3E8_V_MF8_MASK = 4615 CEFBS_HasVInstructions, // PseudoVLSEG3E8_V_MF8_TU = 4616 CEFBS_HasVInstructions, // PseudoVLSEG4E16FF_V_M1 = 4617 CEFBS_HasVInstructions, // PseudoVLSEG4E16FF_V_M1_MASK = 4618 CEFBS_HasVInstructions, // PseudoVLSEG4E16FF_V_M1_TU = 4619 CEFBS_HasVInstructions, // PseudoVLSEG4E16FF_V_M2 = 4620 CEFBS_HasVInstructions, // PseudoVLSEG4E16FF_V_M2_MASK = 4621 CEFBS_HasVInstructions, // PseudoVLSEG4E16FF_V_M2_TU = 4622 CEFBS_HasVInstructions, // PseudoVLSEG4E16FF_V_MF2 = 4623 CEFBS_HasVInstructions, // PseudoVLSEG4E16FF_V_MF2_MASK = 4624 CEFBS_HasVInstructions, // PseudoVLSEG4E16FF_V_MF2_TU = 4625 CEFBS_HasVInstructions, // PseudoVLSEG4E16FF_V_MF4 = 4626 CEFBS_HasVInstructions, // PseudoVLSEG4E16FF_V_MF4_MASK = 4627 CEFBS_HasVInstructions, // PseudoVLSEG4E16FF_V_MF4_TU = 4628 CEFBS_HasVInstructions, // PseudoVLSEG4E16_V_M1 = 4629 CEFBS_HasVInstructions, // PseudoVLSEG4E16_V_M1_MASK = 4630 CEFBS_HasVInstructions, // PseudoVLSEG4E16_V_M1_TU = 4631 CEFBS_HasVInstructions, // PseudoVLSEG4E16_V_M2 = 4632 CEFBS_HasVInstructions, // PseudoVLSEG4E16_V_M2_MASK = 4633 CEFBS_HasVInstructions, // PseudoVLSEG4E16_V_M2_TU = 4634 CEFBS_HasVInstructions, // PseudoVLSEG4E16_V_MF2 = 4635 CEFBS_HasVInstructions, // PseudoVLSEG4E16_V_MF2_MASK = 4636 CEFBS_HasVInstructions, // PseudoVLSEG4E16_V_MF2_TU = 4637 CEFBS_HasVInstructions, // PseudoVLSEG4E16_V_MF4 = 4638 CEFBS_HasVInstructions, // PseudoVLSEG4E16_V_MF4_MASK = 4639 CEFBS_HasVInstructions, // PseudoVLSEG4E16_V_MF4_TU = 4640 CEFBS_HasVInstructions, // PseudoVLSEG4E32FF_V_M1 = 4641 CEFBS_HasVInstructions, // PseudoVLSEG4E32FF_V_M1_MASK = 4642 CEFBS_HasVInstructions, // PseudoVLSEG4E32FF_V_M1_TU = 4643 CEFBS_HasVInstructions, // PseudoVLSEG4E32FF_V_M2 = 4644 CEFBS_HasVInstructions, // PseudoVLSEG4E32FF_V_M2_MASK = 4645 CEFBS_HasVInstructions, // PseudoVLSEG4E32FF_V_M2_TU = 4646 CEFBS_HasVInstructions, // PseudoVLSEG4E32FF_V_MF2 = 4647 CEFBS_HasVInstructions, // PseudoVLSEG4E32FF_V_MF2_MASK = 4648 CEFBS_HasVInstructions, // PseudoVLSEG4E32FF_V_MF2_TU = 4649 CEFBS_HasVInstructions, // PseudoVLSEG4E32_V_M1 = 4650 CEFBS_HasVInstructions, // PseudoVLSEG4E32_V_M1_MASK = 4651 CEFBS_HasVInstructions, // PseudoVLSEG4E32_V_M1_TU = 4652 CEFBS_HasVInstructions, // PseudoVLSEG4E32_V_M2 = 4653 CEFBS_HasVInstructions, // PseudoVLSEG4E32_V_M2_MASK = 4654 CEFBS_HasVInstructions, // PseudoVLSEG4E32_V_M2_TU = 4655 CEFBS_HasVInstructions, // PseudoVLSEG4E32_V_MF2 = 4656 CEFBS_HasVInstructions, // PseudoVLSEG4E32_V_MF2_MASK = 4657 CEFBS_HasVInstructions, // PseudoVLSEG4E32_V_MF2_TU = 4658 CEFBS_HasVInstructions, // PseudoVLSEG4E64FF_V_M1 = 4659 CEFBS_HasVInstructions, // PseudoVLSEG4E64FF_V_M1_MASK = 4660 CEFBS_HasVInstructions, // PseudoVLSEG4E64FF_V_M1_TU = 4661 CEFBS_HasVInstructions, // PseudoVLSEG4E64FF_V_M2 = 4662 CEFBS_HasVInstructions, // PseudoVLSEG4E64FF_V_M2_MASK = 4663 CEFBS_HasVInstructions, // PseudoVLSEG4E64FF_V_M2_TU = 4664 CEFBS_HasVInstructions, // PseudoVLSEG4E64_V_M1 = 4665 CEFBS_HasVInstructions, // PseudoVLSEG4E64_V_M1_MASK = 4666 CEFBS_HasVInstructions, // PseudoVLSEG4E64_V_M1_TU = 4667 CEFBS_HasVInstructions, // PseudoVLSEG4E64_V_M2 = 4668 CEFBS_HasVInstructions, // PseudoVLSEG4E64_V_M2_MASK = 4669 CEFBS_HasVInstructions, // PseudoVLSEG4E64_V_M2_TU = 4670 CEFBS_HasVInstructions, // PseudoVLSEG4E8FF_V_M1 = 4671 CEFBS_HasVInstructions, // PseudoVLSEG4E8FF_V_M1_MASK = 4672 CEFBS_HasVInstructions, // PseudoVLSEG4E8FF_V_M1_TU = 4673 CEFBS_HasVInstructions, // PseudoVLSEG4E8FF_V_M2 = 4674 CEFBS_HasVInstructions, // PseudoVLSEG4E8FF_V_M2_MASK = 4675 CEFBS_HasVInstructions, // PseudoVLSEG4E8FF_V_M2_TU = 4676 CEFBS_HasVInstructions, // PseudoVLSEG4E8FF_V_MF2 = 4677 CEFBS_HasVInstructions, // PseudoVLSEG4E8FF_V_MF2_MASK = 4678 CEFBS_HasVInstructions, // PseudoVLSEG4E8FF_V_MF2_TU = 4679 CEFBS_HasVInstructions, // PseudoVLSEG4E8FF_V_MF4 = 4680 CEFBS_HasVInstructions, // PseudoVLSEG4E8FF_V_MF4_MASK = 4681 CEFBS_HasVInstructions, // PseudoVLSEG4E8FF_V_MF4_TU = 4682 CEFBS_HasVInstructions, // PseudoVLSEG4E8FF_V_MF8 = 4683 CEFBS_HasVInstructions, // PseudoVLSEG4E8FF_V_MF8_MASK = 4684 CEFBS_HasVInstructions, // PseudoVLSEG4E8FF_V_MF8_TU = 4685 CEFBS_HasVInstructions, // PseudoVLSEG4E8_V_M1 = 4686 CEFBS_HasVInstructions, // PseudoVLSEG4E8_V_M1_MASK = 4687 CEFBS_HasVInstructions, // PseudoVLSEG4E8_V_M1_TU = 4688 CEFBS_HasVInstructions, // PseudoVLSEG4E8_V_M2 = 4689 CEFBS_HasVInstructions, // PseudoVLSEG4E8_V_M2_MASK = 4690 CEFBS_HasVInstructions, // PseudoVLSEG4E8_V_M2_TU = 4691 CEFBS_HasVInstructions, // PseudoVLSEG4E8_V_MF2 = 4692 CEFBS_HasVInstructions, // PseudoVLSEG4E8_V_MF2_MASK = 4693 CEFBS_HasVInstructions, // PseudoVLSEG4E8_V_MF2_TU = 4694 CEFBS_HasVInstructions, // PseudoVLSEG4E8_V_MF4 = 4695 CEFBS_HasVInstructions, // PseudoVLSEG4E8_V_MF4_MASK = 4696 CEFBS_HasVInstructions, // PseudoVLSEG4E8_V_MF4_TU = 4697 CEFBS_HasVInstructions, // PseudoVLSEG4E8_V_MF8 = 4698 CEFBS_HasVInstructions, // PseudoVLSEG4E8_V_MF8_MASK = 4699 CEFBS_HasVInstructions, // PseudoVLSEG4E8_V_MF8_TU = 4700 CEFBS_HasVInstructions, // PseudoVLSEG5E16FF_V_M1 = 4701 CEFBS_HasVInstructions, // PseudoVLSEG5E16FF_V_M1_MASK = 4702 CEFBS_HasVInstructions, // PseudoVLSEG5E16FF_V_M1_TU = 4703 CEFBS_HasVInstructions, // PseudoVLSEG5E16FF_V_MF2 = 4704 CEFBS_HasVInstructions, // PseudoVLSEG5E16FF_V_MF2_MASK = 4705 CEFBS_HasVInstructions, // PseudoVLSEG5E16FF_V_MF2_TU = 4706 CEFBS_HasVInstructions, // PseudoVLSEG5E16FF_V_MF4 = 4707 CEFBS_HasVInstructions, // PseudoVLSEG5E16FF_V_MF4_MASK = 4708 CEFBS_HasVInstructions, // PseudoVLSEG5E16FF_V_MF4_TU = 4709 CEFBS_HasVInstructions, // PseudoVLSEG5E16_V_M1 = 4710 CEFBS_HasVInstructions, // PseudoVLSEG5E16_V_M1_MASK = 4711 CEFBS_HasVInstructions, // PseudoVLSEG5E16_V_M1_TU = 4712 CEFBS_HasVInstructions, // PseudoVLSEG5E16_V_MF2 = 4713 CEFBS_HasVInstructions, // PseudoVLSEG5E16_V_MF2_MASK = 4714 CEFBS_HasVInstructions, // PseudoVLSEG5E16_V_MF2_TU = 4715 CEFBS_HasVInstructions, // PseudoVLSEG5E16_V_MF4 = 4716 CEFBS_HasVInstructions, // PseudoVLSEG5E16_V_MF4_MASK = 4717 CEFBS_HasVInstructions, // PseudoVLSEG5E16_V_MF4_TU = 4718 CEFBS_HasVInstructions, // PseudoVLSEG5E32FF_V_M1 = 4719 CEFBS_HasVInstructions, // PseudoVLSEG5E32FF_V_M1_MASK = 4720 CEFBS_HasVInstructions, // PseudoVLSEG5E32FF_V_M1_TU = 4721 CEFBS_HasVInstructions, // PseudoVLSEG5E32FF_V_MF2 = 4722 CEFBS_HasVInstructions, // PseudoVLSEG5E32FF_V_MF2_MASK = 4723 CEFBS_HasVInstructions, // PseudoVLSEG5E32FF_V_MF2_TU = 4724 CEFBS_HasVInstructions, // PseudoVLSEG5E32_V_M1 = 4725 CEFBS_HasVInstructions, // PseudoVLSEG5E32_V_M1_MASK = 4726 CEFBS_HasVInstructions, // PseudoVLSEG5E32_V_M1_TU = 4727 CEFBS_HasVInstructions, // PseudoVLSEG5E32_V_MF2 = 4728 CEFBS_HasVInstructions, // PseudoVLSEG5E32_V_MF2_MASK = 4729 CEFBS_HasVInstructions, // PseudoVLSEG5E32_V_MF2_TU = 4730 CEFBS_HasVInstructions, // PseudoVLSEG5E64FF_V_M1 = 4731 CEFBS_HasVInstructions, // PseudoVLSEG5E64FF_V_M1_MASK = 4732 CEFBS_HasVInstructions, // PseudoVLSEG5E64FF_V_M1_TU = 4733 CEFBS_HasVInstructions, // PseudoVLSEG5E64_V_M1 = 4734 CEFBS_HasVInstructions, // PseudoVLSEG5E64_V_M1_MASK = 4735 CEFBS_HasVInstructions, // PseudoVLSEG5E64_V_M1_TU = 4736 CEFBS_HasVInstructions, // PseudoVLSEG5E8FF_V_M1 = 4737 CEFBS_HasVInstructions, // PseudoVLSEG5E8FF_V_M1_MASK = 4738 CEFBS_HasVInstructions, // PseudoVLSEG5E8FF_V_M1_TU = 4739 CEFBS_HasVInstructions, // PseudoVLSEG5E8FF_V_MF2 = 4740 CEFBS_HasVInstructions, // PseudoVLSEG5E8FF_V_MF2_MASK = 4741 CEFBS_HasVInstructions, // PseudoVLSEG5E8FF_V_MF2_TU = 4742 CEFBS_HasVInstructions, // PseudoVLSEG5E8FF_V_MF4 = 4743 CEFBS_HasVInstructions, // PseudoVLSEG5E8FF_V_MF4_MASK = 4744 CEFBS_HasVInstructions, // PseudoVLSEG5E8FF_V_MF4_TU = 4745 CEFBS_HasVInstructions, // PseudoVLSEG5E8FF_V_MF8 = 4746 CEFBS_HasVInstructions, // PseudoVLSEG5E8FF_V_MF8_MASK = 4747 CEFBS_HasVInstructions, // PseudoVLSEG5E8FF_V_MF8_TU = 4748 CEFBS_HasVInstructions, // PseudoVLSEG5E8_V_M1 = 4749 CEFBS_HasVInstructions, // PseudoVLSEG5E8_V_M1_MASK = 4750 CEFBS_HasVInstructions, // PseudoVLSEG5E8_V_M1_TU = 4751 CEFBS_HasVInstructions, // PseudoVLSEG5E8_V_MF2 = 4752 CEFBS_HasVInstructions, // PseudoVLSEG5E8_V_MF2_MASK = 4753 CEFBS_HasVInstructions, // PseudoVLSEG5E8_V_MF2_TU = 4754 CEFBS_HasVInstructions, // PseudoVLSEG5E8_V_MF4 = 4755 CEFBS_HasVInstructions, // PseudoVLSEG5E8_V_MF4_MASK = 4756 CEFBS_HasVInstructions, // PseudoVLSEG5E8_V_MF4_TU = 4757 CEFBS_HasVInstructions, // PseudoVLSEG5E8_V_MF8 = 4758 CEFBS_HasVInstructions, // PseudoVLSEG5E8_V_MF8_MASK = 4759 CEFBS_HasVInstructions, // PseudoVLSEG5E8_V_MF8_TU = 4760 CEFBS_HasVInstructions, // PseudoVLSEG6E16FF_V_M1 = 4761 CEFBS_HasVInstructions, // PseudoVLSEG6E16FF_V_M1_MASK = 4762 CEFBS_HasVInstructions, // PseudoVLSEG6E16FF_V_M1_TU = 4763 CEFBS_HasVInstructions, // PseudoVLSEG6E16FF_V_MF2 = 4764 CEFBS_HasVInstructions, // PseudoVLSEG6E16FF_V_MF2_MASK = 4765 CEFBS_HasVInstructions, // PseudoVLSEG6E16FF_V_MF2_TU = 4766 CEFBS_HasVInstructions, // PseudoVLSEG6E16FF_V_MF4 = 4767 CEFBS_HasVInstructions, // PseudoVLSEG6E16FF_V_MF4_MASK = 4768 CEFBS_HasVInstructions, // PseudoVLSEG6E16FF_V_MF4_TU = 4769 CEFBS_HasVInstructions, // PseudoVLSEG6E16_V_M1 = 4770 CEFBS_HasVInstructions, // PseudoVLSEG6E16_V_M1_MASK = 4771 CEFBS_HasVInstructions, // PseudoVLSEG6E16_V_M1_TU = 4772 CEFBS_HasVInstructions, // PseudoVLSEG6E16_V_MF2 = 4773 CEFBS_HasVInstructions, // PseudoVLSEG6E16_V_MF2_MASK = 4774 CEFBS_HasVInstructions, // PseudoVLSEG6E16_V_MF2_TU = 4775 CEFBS_HasVInstructions, // PseudoVLSEG6E16_V_MF4 = 4776 CEFBS_HasVInstructions, // PseudoVLSEG6E16_V_MF4_MASK = 4777 CEFBS_HasVInstructions, // PseudoVLSEG6E16_V_MF4_TU = 4778 CEFBS_HasVInstructions, // PseudoVLSEG6E32FF_V_M1 = 4779 CEFBS_HasVInstructions, // PseudoVLSEG6E32FF_V_M1_MASK = 4780 CEFBS_HasVInstructions, // PseudoVLSEG6E32FF_V_M1_TU = 4781 CEFBS_HasVInstructions, // PseudoVLSEG6E32FF_V_MF2 = 4782 CEFBS_HasVInstructions, // PseudoVLSEG6E32FF_V_MF2_MASK = 4783 CEFBS_HasVInstructions, // PseudoVLSEG6E32FF_V_MF2_TU = 4784 CEFBS_HasVInstructions, // PseudoVLSEG6E32_V_M1 = 4785 CEFBS_HasVInstructions, // PseudoVLSEG6E32_V_M1_MASK = 4786 CEFBS_HasVInstructions, // PseudoVLSEG6E32_V_M1_TU = 4787 CEFBS_HasVInstructions, // PseudoVLSEG6E32_V_MF2 = 4788 CEFBS_HasVInstructions, // PseudoVLSEG6E32_V_MF2_MASK = 4789 CEFBS_HasVInstructions, // PseudoVLSEG6E32_V_MF2_TU = 4790 CEFBS_HasVInstructions, // PseudoVLSEG6E64FF_V_M1 = 4791 CEFBS_HasVInstructions, // PseudoVLSEG6E64FF_V_M1_MASK = 4792 CEFBS_HasVInstructions, // PseudoVLSEG6E64FF_V_M1_TU = 4793 CEFBS_HasVInstructions, // PseudoVLSEG6E64_V_M1 = 4794 CEFBS_HasVInstructions, // PseudoVLSEG6E64_V_M1_MASK = 4795 CEFBS_HasVInstructions, // PseudoVLSEG6E64_V_M1_TU = 4796 CEFBS_HasVInstructions, // PseudoVLSEG6E8FF_V_M1 = 4797 CEFBS_HasVInstructions, // PseudoVLSEG6E8FF_V_M1_MASK = 4798 CEFBS_HasVInstructions, // PseudoVLSEG6E8FF_V_M1_TU = 4799 CEFBS_HasVInstructions, // PseudoVLSEG6E8FF_V_MF2 = 4800 CEFBS_HasVInstructions, // PseudoVLSEG6E8FF_V_MF2_MASK = 4801 CEFBS_HasVInstructions, // PseudoVLSEG6E8FF_V_MF2_TU = 4802 CEFBS_HasVInstructions, // PseudoVLSEG6E8FF_V_MF4 = 4803 CEFBS_HasVInstructions, // PseudoVLSEG6E8FF_V_MF4_MASK = 4804 CEFBS_HasVInstructions, // PseudoVLSEG6E8FF_V_MF4_TU = 4805 CEFBS_HasVInstructions, // PseudoVLSEG6E8FF_V_MF8 = 4806 CEFBS_HasVInstructions, // PseudoVLSEG6E8FF_V_MF8_MASK = 4807 CEFBS_HasVInstructions, // PseudoVLSEG6E8FF_V_MF8_TU = 4808 CEFBS_HasVInstructions, // PseudoVLSEG6E8_V_M1 = 4809 CEFBS_HasVInstructions, // PseudoVLSEG6E8_V_M1_MASK = 4810 CEFBS_HasVInstructions, // PseudoVLSEG6E8_V_M1_TU = 4811 CEFBS_HasVInstructions, // PseudoVLSEG6E8_V_MF2 = 4812 CEFBS_HasVInstructions, // PseudoVLSEG6E8_V_MF2_MASK = 4813 CEFBS_HasVInstructions, // PseudoVLSEG6E8_V_MF2_TU = 4814 CEFBS_HasVInstructions, // PseudoVLSEG6E8_V_MF4 = 4815 CEFBS_HasVInstructions, // PseudoVLSEG6E8_V_MF4_MASK = 4816 CEFBS_HasVInstructions, // PseudoVLSEG6E8_V_MF4_TU = 4817 CEFBS_HasVInstructions, // PseudoVLSEG6E8_V_MF8 = 4818 CEFBS_HasVInstructions, // PseudoVLSEG6E8_V_MF8_MASK = 4819 CEFBS_HasVInstructions, // PseudoVLSEG6E8_V_MF8_TU = 4820 CEFBS_HasVInstructions, // PseudoVLSEG7E16FF_V_M1 = 4821 CEFBS_HasVInstructions, // PseudoVLSEG7E16FF_V_M1_MASK = 4822 CEFBS_HasVInstructions, // PseudoVLSEG7E16FF_V_M1_TU = 4823 CEFBS_HasVInstructions, // PseudoVLSEG7E16FF_V_MF2 = 4824 CEFBS_HasVInstructions, // PseudoVLSEG7E16FF_V_MF2_MASK = 4825 CEFBS_HasVInstructions, // PseudoVLSEG7E16FF_V_MF2_TU = 4826 CEFBS_HasVInstructions, // PseudoVLSEG7E16FF_V_MF4 = 4827 CEFBS_HasVInstructions, // PseudoVLSEG7E16FF_V_MF4_MASK = 4828 CEFBS_HasVInstructions, // PseudoVLSEG7E16FF_V_MF4_TU = 4829 CEFBS_HasVInstructions, // PseudoVLSEG7E16_V_M1 = 4830 CEFBS_HasVInstructions, // PseudoVLSEG7E16_V_M1_MASK = 4831 CEFBS_HasVInstructions, // PseudoVLSEG7E16_V_M1_TU = 4832 CEFBS_HasVInstructions, // PseudoVLSEG7E16_V_MF2 = 4833 CEFBS_HasVInstructions, // PseudoVLSEG7E16_V_MF2_MASK = 4834 CEFBS_HasVInstructions, // PseudoVLSEG7E16_V_MF2_TU = 4835 CEFBS_HasVInstructions, // PseudoVLSEG7E16_V_MF4 = 4836 CEFBS_HasVInstructions, // PseudoVLSEG7E16_V_MF4_MASK = 4837 CEFBS_HasVInstructions, // PseudoVLSEG7E16_V_MF4_TU = 4838 CEFBS_HasVInstructions, // PseudoVLSEG7E32FF_V_M1 = 4839 CEFBS_HasVInstructions, // PseudoVLSEG7E32FF_V_M1_MASK = 4840 CEFBS_HasVInstructions, // PseudoVLSEG7E32FF_V_M1_TU = 4841 CEFBS_HasVInstructions, // PseudoVLSEG7E32FF_V_MF2 = 4842 CEFBS_HasVInstructions, // PseudoVLSEG7E32FF_V_MF2_MASK = 4843 CEFBS_HasVInstructions, // PseudoVLSEG7E32FF_V_MF2_TU = 4844 CEFBS_HasVInstructions, // PseudoVLSEG7E32_V_M1 = 4845 CEFBS_HasVInstructions, // PseudoVLSEG7E32_V_M1_MASK = 4846 CEFBS_HasVInstructions, // PseudoVLSEG7E32_V_M1_TU = 4847 CEFBS_HasVInstructions, // PseudoVLSEG7E32_V_MF2 = 4848 CEFBS_HasVInstructions, // PseudoVLSEG7E32_V_MF2_MASK = 4849 CEFBS_HasVInstructions, // PseudoVLSEG7E32_V_MF2_TU = 4850 CEFBS_HasVInstructions, // PseudoVLSEG7E64FF_V_M1 = 4851 CEFBS_HasVInstructions, // PseudoVLSEG7E64FF_V_M1_MASK = 4852 CEFBS_HasVInstructions, // PseudoVLSEG7E64FF_V_M1_TU = 4853 CEFBS_HasVInstructions, // PseudoVLSEG7E64_V_M1 = 4854 CEFBS_HasVInstructions, // PseudoVLSEG7E64_V_M1_MASK = 4855 CEFBS_HasVInstructions, // PseudoVLSEG7E64_V_M1_TU = 4856 CEFBS_HasVInstructions, // PseudoVLSEG7E8FF_V_M1 = 4857 CEFBS_HasVInstructions, // PseudoVLSEG7E8FF_V_M1_MASK = 4858 CEFBS_HasVInstructions, // PseudoVLSEG7E8FF_V_M1_TU = 4859 CEFBS_HasVInstructions, // PseudoVLSEG7E8FF_V_MF2 = 4860 CEFBS_HasVInstructions, // PseudoVLSEG7E8FF_V_MF2_MASK = 4861 CEFBS_HasVInstructions, // PseudoVLSEG7E8FF_V_MF2_TU = 4862 CEFBS_HasVInstructions, // PseudoVLSEG7E8FF_V_MF4 = 4863 CEFBS_HasVInstructions, // PseudoVLSEG7E8FF_V_MF4_MASK = 4864 CEFBS_HasVInstructions, // PseudoVLSEG7E8FF_V_MF4_TU = 4865 CEFBS_HasVInstructions, // PseudoVLSEG7E8FF_V_MF8 = 4866 CEFBS_HasVInstructions, // PseudoVLSEG7E8FF_V_MF8_MASK = 4867 CEFBS_HasVInstructions, // PseudoVLSEG7E8FF_V_MF8_TU = 4868 CEFBS_HasVInstructions, // PseudoVLSEG7E8_V_M1 = 4869 CEFBS_HasVInstructions, // PseudoVLSEG7E8_V_M1_MASK = 4870 CEFBS_HasVInstructions, // PseudoVLSEG7E8_V_M1_TU = 4871 CEFBS_HasVInstructions, // PseudoVLSEG7E8_V_MF2 = 4872 CEFBS_HasVInstructions, // PseudoVLSEG7E8_V_MF2_MASK = 4873 CEFBS_HasVInstructions, // PseudoVLSEG7E8_V_MF2_TU = 4874 CEFBS_HasVInstructions, // PseudoVLSEG7E8_V_MF4 = 4875 CEFBS_HasVInstructions, // PseudoVLSEG7E8_V_MF4_MASK = 4876 CEFBS_HasVInstructions, // PseudoVLSEG7E8_V_MF4_TU = 4877 CEFBS_HasVInstructions, // PseudoVLSEG7E8_V_MF8 = 4878 CEFBS_HasVInstructions, // PseudoVLSEG7E8_V_MF8_MASK = 4879 CEFBS_HasVInstructions, // PseudoVLSEG7E8_V_MF8_TU = 4880 CEFBS_HasVInstructions, // PseudoVLSEG8E16FF_V_M1 = 4881 CEFBS_HasVInstructions, // PseudoVLSEG8E16FF_V_M1_MASK = 4882 CEFBS_HasVInstructions, // PseudoVLSEG8E16FF_V_M1_TU = 4883 CEFBS_HasVInstructions, // PseudoVLSEG8E16FF_V_MF2 = 4884 CEFBS_HasVInstructions, // PseudoVLSEG8E16FF_V_MF2_MASK = 4885 CEFBS_HasVInstructions, // PseudoVLSEG8E16FF_V_MF2_TU = 4886 CEFBS_HasVInstructions, // PseudoVLSEG8E16FF_V_MF4 = 4887 CEFBS_HasVInstructions, // PseudoVLSEG8E16FF_V_MF4_MASK = 4888 CEFBS_HasVInstructions, // PseudoVLSEG8E16FF_V_MF4_TU = 4889 CEFBS_HasVInstructions, // PseudoVLSEG8E16_V_M1 = 4890 CEFBS_HasVInstructions, // PseudoVLSEG8E16_V_M1_MASK = 4891 CEFBS_HasVInstructions, // PseudoVLSEG8E16_V_M1_TU = 4892 CEFBS_HasVInstructions, // PseudoVLSEG8E16_V_MF2 = 4893 CEFBS_HasVInstructions, // PseudoVLSEG8E16_V_MF2_MASK = 4894 CEFBS_HasVInstructions, // PseudoVLSEG8E16_V_MF2_TU = 4895 CEFBS_HasVInstructions, // PseudoVLSEG8E16_V_MF4 = 4896 CEFBS_HasVInstructions, // PseudoVLSEG8E16_V_MF4_MASK = 4897 CEFBS_HasVInstructions, // PseudoVLSEG8E16_V_MF4_TU = 4898 CEFBS_HasVInstructions, // PseudoVLSEG8E32FF_V_M1 = 4899 CEFBS_HasVInstructions, // PseudoVLSEG8E32FF_V_M1_MASK = 4900 CEFBS_HasVInstructions, // PseudoVLSEG8E32FF_V_M1_TU = 4901 CEFBS_HasVInstructions, // PseudoVLSEG8E32FF_V_MF2 = 4902 CEFBS_HasVInstructions, // PseudoVLSEG8E32FF_V_MF2_MASK = 4903 CEFBS_HasVInstructions, // PseudoVLSEG8E32FF_V_MF2_TU = 4904 CEFBS_HasVInstructions, // PseudoVLSEG8E32_V_M1 = 4905 CEFBS_HasVInstructions, // PseudoVLSEG8E32_V_M1_MASK = 4906 CEFBS_HasVInstructions, // PseudoVLSEG8E32_V_M1_TU = 4907 CEFBS_HasVInstructions, // PseudoVLSEG8E32_V_MF2 = 4908 CEFBS_HasVInstructions, // PseudoVLSEG8E32_V_MF2_MASK = 4909 CEFBS_HasVInstructions, // PseudoVLSEG8E32_V_MF2_TU = 4910 CEFBS_HasVInstructions, // PseudoVLSEG8E64FF_V_M1 = 4911 CEFBS_HasVInstructions, // PseudoVLSEG8E64FF_V_M1_MASK = 4912 CEFBS_HasVInstructions, // PseudoVLSEG8E64FF_V_M1_TU = 4913 CEFBS_HasVInstructions, // PseudoVLSEG8E64_V_M1 = 4914 CEFBS_HasVInstructions, // PseudoVLSEG8E64_V_M1_MASK = 4915 CEFBS_HasVInstructions, // PseudoVLSEG8E64_V_M1_TU = 4916 CEFBS_HasVInstructions, // PseudoVLSEG8E8FF_V_M1 = 4917 CEFBS_HasVInstructions, // PseudoVLSEG8E8FF_V_M1_MASK = 4918 CEFBS_HasVInstructions, // PseudoVLSEG8E8FF_V_M1_TU = 4919 CEFBS_HasVInstructions, // PseudoVLSEG8E8FF_V_MF2 = 4920 CEFBS_HasVInstructions, // PseudoVLSEG8E8FF_V_MF2_MASK = 4921 CEFBS_HasVInstructions, // PseudoVLSEG8E8FF_V_MF2_TU = 4922 CEFBS_HasVInstructions, // PseudoVLSEG8E8FF_V_MF4 = 4923 CEFBS_HasVInstructions, // PseudoVLSEG8E8FF_V_MF4_MASK = 4924 CEFBS_HasVInstructions, // PseudoVLSEG8E8FF_V_MF4_TU = 4925 CEFBS_HasVInstructions, // PseudoVLSEG8E8FF_V_MF8 = 4926 CEFBS_HasVInstructions, // PseudoVLSEG8E8FF_V_MF8_MASK = 4927 CEFBS_HasVInstructions, // PseudoVLSEG8E8FF_V_MF8_TU = 4928 CEFBS_HasVInstructions, // PseudoVLSEG8E8_V_M1 = 4929 CEFBS_HasVInstructions, // PseudoVLSEG8E8_V_M1_MASK = 4930 CEFBS_HasVInstructions, // PseudoVLSEG8E8_V_M1_TU = 4931 CEFBS_HasVInstructions, // PseudoVLSEG8E8_V_MF2 = 4932 CEFBS_HasVInstructions, // PseudoVLSEG8E8_V_MF2_MASK = 4933 CEFBS_HasVInstructions, // PseudoVLSEG8E8_V_MF2_TU = 4934 CEFBS_HasVInstructions, // PseudoVLSEG8E8_V_MF4 = 4935 CEFBS_HasVInstructions, // PseudoVLSEG8E8_V_MF4_MASK = 4936 CEFBS_HasVInstructions, // PseudoVLSEG8E8_V_MF4_TU = 4937 CEFBS_HasVInstructions, // PseudoVLSEG8E8_V_MF8 = 4938 CEFBS_HasVInstructions, // PseudoVLSEG8E8_V_MF8_MASK = 4939 CEFBS_HasVInstructions, // PseudoVLSEG8E8_V_MF8_TU = 4940 CEFBS_HasVInstructions, // PseudoVLSSEG2E16_V_M1 = 4941 CEFBS_HasVInstructions, // PseudoVLSSEG2E16_V_M1_MASK = 4942 CEFBS_HasVInstructions, // PseudoVLSSEG2E16_V_M1_TU = 4943 CEFBS_HasVInstructions, // PseudoVLSSEG2E16_V_M2 = 4944 CEFBS_HasVInstructions, // PseudoVLSSEG2E16_V_M2_MASK = 4945 CEFBS_HasVInstructions, // PseudoVLSSEG2E16_V_M2_TU = 4946 CEFBS_HasVInstructions, // PseudoVLSSEG2E16_V_M4 = 4947 CEFBS_HasVInstructions, // PseudoVLSSEG2E16_V_M4_MASK = 4948 CEFBS_HasVInstructions, // PseudoVLSSEG2E16_V_M4_TU = 4949 CEFBS_HasVInstructions, // PseudoVLSSEG2E16_V_MF2 = 4950 CEFBS_HasVInstructions, // PseudoVLSSEG2E16_V_MF2_MASK = 4951 CEFBS_HasVInstructions, // PseudoVLSSEG2E16_V_MF2_TU = 4952 CEFBS_HasVInstructions, // PseudoVLSSEG2E16_V_MF4 = 4953 CEFBS_HasVInstructions, // PseudoVLSSEG2E16_V_MF4_MASK = 4954 CEFBS_HasVInstructions, // PseudoVLSSEG2E16_V_MF4_TU = 4955 CEFBS_HasVInstructions, // PseudoVLSSEG2E32_V_M1 = 4956 CEFBS_HasVInstructions, // PseudoVLSSEG2E32_V_M1_MASK = 4957 CEFBS_HasVInstructions, // PseudoVLSSEG2E32_V_M1_TU = 4958 CEFBS_HasVInstructions, // PseudoVLSSEG2E32_V_M2 = 4959 CEFBS_HasVInstructions, // PseudoVLSSEG2E32_V_M2_MASK = 4960 CEFBS_HasVInstructions, // PseudoVLSSEG2E32_V_M2_TU = 4961 CEFBS_HasVInstructions, // PseudoVLSSEG2E32_V_M4 = 4962 CEFBS_HasVInstructions, // PseudoVLSSEG2E32_V_M4_MASK = 4963 CEFBS_HasVInstructions, // PseudoVLSSEG2E32_V_M4_TU = 4964 CEFBS_HasVInstructions, // PseudoVLSSEG2E32_V_MF2 = 4965 CEFBS_HasVInstructions, // PseudoVLSSEG2E32_V_MF2_MASK = 4966 CEFBS_HasVInstructions, // PseudoVLSSEG2E32_V_MF2_TU = 4967 CEFBS_HasVInstructions, // PseudoVLSSEG2E64_V_M1 = 4968 CEFBS_HasVInstructions, // PseudoVLSSEG2E64_V_M1_MASK = 4969 CEFBS_HasVInstructions, // PseudoVLSSEG2E64_V_M1_TU = 4970 CEFBS_HasVInstructions, // PseudoVLSSEG2E64_V_M2 = 4971 CEFBS_HasVInstructions, // PseudoVLSSEG2E64_V_M2_MASK = 4972 CEFBS_HasVInstructions, // PseudoVLSSEG2E64_V_M2_TU = 4973 CEFBS_HasVInstructions, // PseudoVLSSEG2E64_V_M4 = 4974 CEFBS_HasVInstructions, // PseudoVLSSEG2E64_V_M4_MASK = 4975 CEFBS_HasVInstructions, // PseudoVLSSEG2E64_V_M4_TU = 4976 CEFBS_HasVInstructions, // PseudoVLSSEG2E8_V_M1 = 4977 CEFBS_HasVInstructions, // PseudoVLSSEG2E8_V_M1_MASK = 4978 CEFBS_HasVInstructions, // PseudoVLSSEG2E8_V_M1_TU = 4979 CEFBS_HasVInstructions, // PseudoVLSSEG2E8_V_M2 = 4980 CEFBS_HasVInstructions, // PseudoVLSSEG2E8_V_M2_MASK = 4981 CEFBS_HasVInstructions, // PseudoVLSSEG2E8_V_M2_TU = 4982 CEFBS_HasVInstructions, // PseudoVLSSEG2E8_V_M4 = 4983 CEFBS_HasVInstructions, // PseudoVLSSEG2E8_V_M4_MASK = 4984 CEFBS_HasVInstructions, // PseudoVLSSEG2E8_V_M4_TU = 4985 CEFBS_HasVInstructions, // PseudoVLSSEG2E8_V_MF2 = 4986 CEFBS_HasVInstructions, // PseudoVLSSEG2E8_V_MF2_MASK = 4987 CEFBS_HasVInstructions, // PseudoVLSSEG2E8_V_MF2_TU = 4988 CEFBS_HasVInstructions, // PseudoVLSSEG2E8_V_MF4 = 4989 CEFBS_HasVInstructions, // PseudoVLSSEG2E8_V_MF4_MASK = 4990 CEFBS_HasVInstructions, // PseudoVLSSEG2E8_V_MF4_TU = 4991 CEFBS_HasVInstructions, // PseudoVLSSEG2E8_V_MF8 = 4992 CEFBS_HasVInstructions, // PseudoVLSSEG2E8_V_MF8_MASK = 4993 CEFBS_HasVInstructions, // PseudoVLSSEG2E8_V_MF8_TU = 4994 CEFBS_HasVInstructions, // PseudoVLSSEG3E16_V_M1 = 4995 CEFBS_HasVInstructions, // PseudoVLSSEG3E16_V_M1_MASK = 4996 CEFBS_HasVInstructions, // PseudoVLSSEG3E16_V_M1_TU = 4997 CEFBS_HasVInstructions, // PseudoVLSSEG3E16_V_M2 = 4998 CEFBS_HasVInstructions, // PseudoVLSSEG3E16_V_M2_MASK = 4999 CEFBS_HasVInstructions, // PseudoVLSSEG3E16_V_M2_TU = 5000 CEFBS_HasVInstructions, // PseudoVLSSEG3E16_V_MF2 = 5001 CEFBS_HasVInstructions, // PseudoVLSSEG3E16_V_MF2_MASK = 5002 CEFBS_HasVInstructions, // PseudoVLSSEG3E16_V_MF2_TU = 5003 CEFBS_HasVInstructions, // PseudoVLSSEG3E16_V_MF4 = 5004 CEFBS_HasVInstructions, // PseudoVLSSEG3E16_V_MF4_MASK = 5005 CEFBS_HasVInstructions, // PseudoVLSSEG3E16_V_MF4_TU = 5006 CEFBS_HasVInstructions, // PseudoVLSSEG3E32_V_M1 = 5007 CEFBS_HasVInstructions, // PseudoVLSSEG3E32_V_M1_MASK = 5008 CEFBS_HasVInstructions, // PseudoVLSSEG3E32_V_M1_TU = 5009 CEFBS_HasVInstructions, // PseudoVLSSEG3E32_V_M2 = 5010 CEFBS_HasVInstructions, // PseudoVLSSEG3E32_V_M2_MASK = 5011 CEFBS_HasVInstructions, // PseudoVLSSEG3E32_V_M2_TU = 5012 CEFBS_HasVInstructions, // PseudoVLSSEG3E32_V_MF2 = 5013 CEFBS_HasVInstructions, // PseudoVLSSEG3E32_V_MF2_MASK = 5014 CEFBS_HasVInstructions, // PseudoVLSSEG3E32_V_MF2_TU = 5015 CEFBS_HasVInstructions, // PseudoVLSSEG3E64_V_M1 = 5016 CEFBS_HasVInstructions, // PseudoVLSSEG3E64_V_M1_MASK = 5017 CEFBS_HasVInstructions, // PseudoVLSSEG3E64_V_M1_TU = 5018 CEFBS_HasVInstructions, // PseudoVLSSEG3E64_V_M2 = 5019 CEFBS_HasVInstructions, // PseudoVLSSEG3E64_V_M2_MASK = 5020 CEFBS_HasVInstructions, // PseudoVLSSEG3E64_V_M2_TU = 5021 CEFBS_HasVInstructions, // PseudoVLSSEG3E8_V_M1 = 5022 CEFBS_HasVInstructions, // PseudoVLSSEG3E8_V_M1_MASK = 5023 CEFBS_HasVInstructions, // PseudoVLSSEG3E8_V_M1_TU = 5024 CEFBS_HasVInstructions, // PseudoVLSSEG3E8_V_M2 = 5025 CEFBS_HasVInstructions, // PseudoVLSSEG3E8_V_M2_MASK = 5026 CEFBS_HasVInstructions, // PseudoVLSSEG3E8_V_M2_TU = 5027 CEFBS_HasVInstructions, // PseudoVLSSEG3E8_V_MF2 = 5028 CEFBS_HasVInstructions, // PseudoVLSSEG3E8_V_MF2_MASK = 5029 CEFBS_HasVInstructions, // PseudoVLSSEG3E8_V_MF2_TU = 5030 CEFBS_HasVInstructions, // PseudoVLSSEG3E8_V_MF4 = 5031 CEFBS_HasVInstructions, // PseudoVLSSEG3E8_V_MF4_MASK = 5032 CEFBS_HasVInstructions, // PseudoVLSSEG3E8_V_MF4_TU = 5033 CEFBS_HasVInstructions, // PseudoVLSSEG3E8_V_MF8 = 5034 CEFBS_HasVInstructions, // PseudoVLSSEG3E8_V_MF8_MASK = 5035 CEFBS_HasVInstructions, // PseudoVLSSEG3E8_V_MF8_TU = 5036 CEFBS_HasVInstructions, // PseudoVLSSEG4E16_V_M1 = 5037 CEFBS_HasVInstructions, // PseudoVLSSEG4E16_V_M1_MASK = 5038 CEFBS_HasVInstructions, // PseudoVLSSEG4E16_V_M1_TU = 5039 CEFBS_HasVInstructions, // PseudoVLSSEG4E16_V_M2 = 5040 CEFBS_HasVInstructions, // PseudoVLSSEG4E16_V_M2_MASK = 5041 CEFBS_HasVInstructions, // PseudoVLSSEG4E16_V_M2_TU = 5042 CEFBS_HasVInstructions, // PseudoVLSSEG4E16_V_MF2 = 5043 CEFBS_HasVInstructions, // PseudoVLSSEG4E16_V_MF2_MASK = 5044 CEFBS_HasVInstructions, // PseudoVLSSEG4E16_V_MF2_TU = 5045 CEFBS_HasVInstructions, // PseudoVLSSEG4E16_V_MF4 = 5046 CEFBS_HasVInstructions, // PseudoVLSSEG4E16_V_MF4_MASK = 5047 CEFBS_HasVInstructions, // PseudoVLSSEG4E16_V_MF4_TU = 5048 CEFBS_HasVInstructions, // PseudoVLSSEG4E32_V_M1 = 5049 CEFBS_HasVInstructions, // PseudoVLSSEG4E32_V_M1_MASK = 5050 CEFBS_HasVInstructions, // PseudoVLSSEG4E32_V_M1_TU = 5051 CEFBS_HasVInstructions, // PseudoVLSSEG4E32_V_M2 = 5052 CEFBS_HasVInstructions, // PseudoVLSSEG4E32_V_M2_MASK = 5053 CEFBS_HasVInstructions, // PseudoVLSSEG4E32_V_M2_TU = 5054 CEFBS_HasVInstructions, // PseudoVLSSEG4E32_V_MF2 = 5055 CEFBS_HasVInstructions, // PseudoVLSSEG4E32_V_MF2_MASK = 5056 CEFBS_HasVInstructions, // PseudoVLSSEG4E32_V_MF2_TU = 5057 CEFBS_HasVInstructions, // PseudoVLSSEG4E64_V_M1 = 5058 CEFBS_HasVInstructions, // PseudoVLSSEG4E64_V_M1_MASK = 5059 CEFBS_HasVInstructions, // PseudoVLSSEG4E64_V_M1_TU = 5060 CEFBS_HasVInstructions, // PseudoVLSSEG4E64_V_M2 = 5061 CEFBS_HasVInstructions, // PseudoVLSSEG4E64_V_M2_MASK = 5062 CEFBS_HasVInstructions, // PseudoVLSSEG4E64_V_M2_TU = 5063 CEFBS_HasVInstructions, // PseudoVLSSEG4E8_V_M1 = 5064 CEFBS_HasVInstructions, // PseudoVLSSEG4E8_V_M1_MASK = 5065 CEFBS_HasVInstructions, // PseudoVLSSEG4E8_V_M1_TU = 5066 CEFBS_HasVInstructions, // PseudoVLSSEG4E8_V_M2 = 5067 CEFBS_HasVInstructions, // PseudoVLSSEG4E8_V_M2_MASK = 5068 CEFBS_HasVInstructions, // PseudoVLSSEG4E8_V_M2_TU = 5069 CEFBS_HasVInstructions, // PseudoVLSSEG4E8_V_MF2 = 5070 CEFBS_HasVInstructions, // PseudoVLSSEG4E8_V_MF2_MASK = 5071 CEFBS_HasVInstructions, // PseudoVLSSEG4E8_V_MF2_TU = 5072 CEFBS_HasVInstructions, // PseudoVLSSEG4E8_V_MF4 = 5073 CEFBS_HasVInstructions, // PseudoVLSSEG4E8_V_MF4_MASK = 5074 CEFBS_HasVInstructions, // PseudoVLSSEG4E8_V_MF4_TU = 5075 CEFBS_HasVInstructions, // PseudoVLSSEG4E8_V_MF8 = 5076 CEFBS_HasVInstructions, // PseudoVLSSEG4E8_V_MF8_MASK = 5077 CEFBS_HasVInstructions, // PseudoVLSSEG4E8_V_MF8_TU = 5078 CEFBS_HasVInstructions, // PseudoVLSSEG5E16_V_M1 = 5079 CEFBS_HasVInstructions, // PseudoVLSSEG5E16_V_M1_MASK = 5080 CEFBS_HasVInstructions, // PseudoVLSSEG5E16_V_M1_TU = 5081 CEFBS_HasVInstructions, // PseudoVLSSEG5E16_V_MF2 = 5082 CEFBS_HasVInstructions, // PseudoVLSSEG5E16_V_MF2_MASK = 5083 CEFBS_HasVInstructions, // PseudoVLSSEG5E16_V_MF2_TU = 5084 CEFBS_HasVInstructions, // PseudoVLSSEG5E16_V_MF4 = 5085 CEFBS_HasVInstructions, // PseudoVLSSEG5E16_V_MF4_MASK = 5086 CEFBS_HasVInstructions, // PseudoVLSSEG5E16_V_MF4_TU = 5087 CEFBS_HasVInstructions, // PseudoVLSSEG5E32_V_M1 = 5088 CEFBS_HasVInstructions, // PseudoVLSSEG5E32_V_M1_MASK = 5089 CEFBS_HasVInstructions, // PseudoVLSSEG5E32_V_M1_TU = 5090 CEFBS_HasVInstructions, // PseudoVLSSEG5E32_V_MF2 = 5091 CEFBS_HasVInstructions, // PseudoVLSSEG5E32_V_MF2_MASK = 5092 CEFBS_HasVInstructions, // PseudoVLSSEG5E32_V_MF2_TU = 5093 CEFBS_HasVInstructions, // PseudoVLSSEG5E64_V_M1 = 5094 CEFBS_HasVInstructions, // PseudoVLSSEG5E64_V_M1_MASK = 5095 CEFBS_HasVInstructions, // PseudoVLSSEG5E64_V_M1_TU = 5096 CEFBS_HasVInstructions, // PseudoVLSSEG5E8_V_M1 = 5097 CEFBS_HasVInstructions, // PseudoVLSSEG5E8_V_M1_MASK = 5098 CEFBS_HasVInstructions, // PseudoVLSSEG5E8_V_M1_TU = 5099 CEFBS_HasVInstructions, // PseudoVLSSEG5E8_V_MF2 = 5100 CEFBS_HasVInstructions, // PseudoVLSSEG5E8_V_MF2_MASK = 5101 CEFBS_HasVInstructions, // PseudoVLSSEG5E8_V_MF2_TU = 5102 CEFBS_HasVInstructions, // PseudoVLSSEG5E8_V_MF4 = 5103 CEFBS_HasVInstructions, // PseudoVLSSEG5E8_V_MF4_MASK = 5104 CEFBS_HasVInstructions, // PseudoVLSSEG5E8_V_MF4_TU = 5105 CEFBS_HasVInstructions, // PseudoVLSSEG5E8_V_MF8 = 5106 CEFBS_HasVInstructions, // PseudoVLSSEG5E8_V_MF8_MASK = 5107 CEFBS_HasVInstructions, // PseudoVLSSEG5E8_V_MF8_TU = 5108 CEFBS_HasVInstructions, // PseudoVLSSEG6E16_V_M1 = 5109 CEFBS_HasVInstructions, // PseudoVLSSEG6E16_V_M1_MASK = 5110 CEFBS_HasVInstructions, // PseudoVLSSEG6E16_V_M1_TU = 5111 CEFBS_HasVInstructions, // PseudoVLSSEG6E16_V_MF2 = 5112 CEFBS_HasVInstructions, // PseudoVLSSEG6E16_V_MF2_MASK = 5113 CEFBS_HasVInstructions, // PseudoVLSSEG6E16_V_MF2_TU = 5114 CEFBS_HasVInstructions, // PseudoVLSSEG6E16_V_MF4 = 5115 CEFBS_HasVInstructions, // PseudoVLSSEG6E16_V_MF4_MASK = 5116 CEFBS_HasVInstructions, // PseudoVLSSEG6E16_V_MF4_TU = 5117 CEFBS_HasVInstructions, // PseudoVLSSEG6E32_V_M1 = 5118 CEFBS_HasVInstructions, // PseudoVLSSEG6E32_V_M1_MASK = 5119 CEFBS_HasVInstructions, // PseudoVLSSEG6E32_V_M1_TU = 5120 CEFBS_HasVInstructions, // PseudoVLSSEG6E32_V_MF2 = 5121 CEFBS_HasVInstructions, // PseudoVLSSEG6E32_V_MF2_MASK = 5122 CEFBS_HasVInstructions, // PseudoVLSSEG6E32_V_MF2_TU = 5123 CEFBS_HasVInstructions, // PseudoVLSSEG6E64_V_M1 = 5124 CEFBS_HasVInstructions, // PseudoVLSSEG6E64_V_M1_MASK = 5125 CEFBS_HasVInstructions, // PseudoVLSSEG6E64_V_M1_TU = 5126 CEFBS_HasVInstructions, // PseudoVLSSEG6E8_V_M1 = 5127 CEFBS_HasVInstructions, // PseudoVLSSEG6E8_V_M1_MASK = 5128 CEFBS_HasVInstructions, // PseudoVLSSEG6E8_V_M1_TU = 5129 CEFBS_HasVInstructions, // PseudoVLSSEG6E8_V_MF2 = 5130 CEFBS_HasVInstructions, // PseudoVLSSEG6E8_V_MF2_MASK = 5131 CEFBS_HasVInstructions, // PseudoVLSSEG6E8_V_MF2_TU = 5132 CEFBS_HasVInstructions, // PseudoVLSSEG6E8_V_MF4 = 5133 CEFBS_HasVInstructions, // PseudoVLSSEG6E8_V_MF4_MASK = 5134 CEFBS_HasVInstructions, // PseudoVLSSEG6E8_V_MF4_TU = 5135 CEFBS_HasVInstructions, // PseudoVLSSEG6E8_V_MF8 = 5136 CEFBS_HasVInstructions, // PseudoVLSSEG6E8_V_MF8_MASK = 5137 CEFBS_HasVInstructions, // PseudoVLSSEG6E8_V_MF8_TU = 5138 CEFBS_HasVInstructions, // PseudoVLSSEG7E16_V_M1 = 5139 CEFBS_HasVInstructions, // PseudoVLSSEG7E16_V_M1_MASK = 5140 CEFBS_HasVInstructions, // PseudoVLSSEG7E16_V_M1_TU = 5141 CEFBS_HasVInstructions, // PseudoVLSSEG7E16_V_MF2 = 5142 CEFBS_HasVInstructions, // PseudoVLSSEG7E16_V_MF2_MASK = 5143 CEFBS_HasVInstructions, // PseudoVLSSEG7E16_V_MF2_TU = 5144 CEFBS_HasVInstructions, // PseudoVLSSEG7E16_V_MF4 = 5145 CEFBS_HasVInstructions, // PseudoVLSSEG7E16_V_MF4_MASK = 5146 CEFBS_HasVInstructions, // PseudoVLSSEG7E16_V_MF4_TU = 5147 CEFBS_HasVInstructions, // PseudoVLSSEG7E32_V_M1 = 5148 CEFBS_HasVInstructions, // PseudoVLSSEG7E32_V_M1_MASK = 5149 CEFBS_HasVInstructions, // PseudoVLSSEG7E32_V_M1_TU = 5150 CEFBS_HasVInstructions, // PseudoVLSSEG7E32_V_MF2 = 5151 CEFBS_HasVInstructions, // PseudoVLSSEG7E32_V_MF2_MASK = 5152 CEFBS_HasVInstructions, // PseudoVLSSEG7E32_V_MF2_TU = 5153 CEFBS_HasVInstructions, // PseudoVLSSEG7E64_V_M1 = 5154 CEFBS_HasVInstructions, // PseudoVLSSEG7E64_V_M1_MASK = 5155 CEFBS_HasVInstructions, // PseudoVLSSEG7E64_V_M1_TU = 5156 CEFBS_HasVInstructions, // PseudoVLSSEG7E8_V_M1 = 5157 CEFBS_HasVInstructions, // PseudoVLSSEG7E8_V_M1_MASK = 5158 CEFBS_HasVInstructions, // PseudoVLSSEG7E8_V_M1_TU = 5159 CEFBS_HasVInstructions, // PseudoVLSSEG7E8_V_MF2 = 5160 CEFBS_HasVInstructions, // PseudoVLSSEG7E8_V_MF2_MASK = 5161 CEFBS_HasVInstructions, // PseudoVLSSEG7E8_V_MF2_TU = 5162 CEFBS_HasVInstructions, // PseudoVLSSEG7E8_V_MF4 = 5163 CEFBS_HasVInstructions, // PseudoVLSSEG7E8_V_MF4_MASK = 5164 CEFBS_HasVInstructions, // PseudoVLSSEG7E8_V_MF4_TU = 5165 CEFBS_HasVInstructions, // PseudoVLSSEG7E8_V_MF8 = 5166 CEFBS_HasVInstructions, // PseudoVLSSEG7E8_V_MF8_MASK = 5167 CEFBS_HasVInstructions, // PseudoVLSSEG7E8_V_MF8_TU = 5168 CEFBS_HasVInstructions, // PseudoVLSSEG8E16_V_M1 = 5169 CEFBS_HasVInstructions, // PseudoVLSSEG8E16_V_M1_MASK = 5170 CEFBS_HasVInstructions, // PseudoVLSSEG8E16_V_M1_TU = 5171 CEFBS_HasVInstructions, // PseudoVLSSEG8E16_V_MF2 = 5172 CEFBS_HasVInstructions, // PseudoVLSSEG8E16_V_MF2_MASK = 5173 CEFBS_HasVInstructions, // PseudoVLSSEG8E16_V_MF2_TU = 5174 CEFBS_HasVInstructions, // PseudoVLSSEG8E16_V_MF4 = 5175 CEFBS_HasVInstructions, // PseudoVLSSEG8E16_V_MF4_MASK = 5176 CEFBS_HasVInstructions, // PseudoVLSSEG8E16_V_MF4_TU = 5177 CEFBS_HasVInstructions, // PseudoVLSSEG8E32_V_M1 = 5178 CEFBS_HasVInstructions, // PseudoVLSSEG8E32_V_M1_MASK = 5179 CEFBS_HasVInstructions, // PseudoVLSSEG8E32_V_M1_TU = 5180 CEFBS_HasVInstructions, // PseudoVLSSEG8E32_V_MF2 = 5181 CEFBS_HasVInstructions, // PseudoVLSSEG8E32_V_MF2_MASK = 5182 CEFBS_HasVInstructions, // PseudoVLSSEG8E32_V_MF2_TU = 5183 CEFBS_HasVInstructions, // PseudoVLSSEG8E64_V_M1 = 5184 CEFBS_HasVInstructions, // PseudoVLSSEG8E64_V_M1_MASK = 5185 CEFBS_HasVInstructions, // PseudoVLSSEG8E64_V_M1_TU = 5186 CEFBS_HasVInstructions, // PseudoVLSSEG8E8_V_M1 = 5187 CEFBS_HasVInstructions, // PseudoVLSSEG8E8_V_M1_MASK = 5188 CEFBS_HasVInstructions, // PseudoVLSSEG8E8_V_M1_TU = 5189 CEFBS_HasVInstructions, // PseudoVLSSEG8E8_V_MF2 = 5190 CEFBS_HasVInstructions, // PseudoVLSSEG8E8_V_MF2_MASK = 5191 CEFBS_HasVInstructions, // PseudoVLSSEG8E8_V_MF2_TU = 5192 CEFBS_HasVInstructions, // PseudoVLSSEG8E8_V_MF4 = 5193 CEFBS_HasVInstructions, // PseudoVLSSEG8E8_V_MF4_MASK = 5194 CEFBS_HasVInstructions, // PseudoVLSSEG8E8_V_MF4_TU = 5195 CEFBS_HasVInstructions, // PseudoVLSSEG8E8_V_MF8 = 5196 CEFBS_HasVInstructions, // PseudoVLSSEG8E8_V_MF8_MASK = 5197 CEFBS_HasVInstructions, // PseudoVLSSEG8E8_V_MF8_TU = 5198 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M1_M1 = 5199 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M1_M1_MASK = 5200 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M1_M1_TU = 5201 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M1_M2 = 5202 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M1_M2_MASK = 5203 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M1_M2_TU = 5204 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M1_M4 = 5205 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M1_M4_MASK = 5206 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M1_M4_TU = 5207 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M1_MF2 = 5208 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M1_MF2_MASK = 5209 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M1_MF2_TU = 5210 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M2_M1 = 5211 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M2_M1_MASK = 5212 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M2_M1_TU = 5213 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M2_M2 = 5214 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M2_M2_MASK = 5215 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M2_M2_TU = 5216 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M2_M4 = 5217 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M2_M4_MASK = 5218 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M2_M4_TU = 5219 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M2_M8 = 5220 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M2_M8_MASK = 5221 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M2_M8_TU = 5222 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M4_M2 = 5223 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M4_M2_MASK = 5224 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M4_M2_TU = 5225 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M4_M4 = 5226 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M4_M4_MASK = 5227 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M4_M4_TU = 5228 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M4_M8 = 5229 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M4_M8_MASK = 5230 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M4_M8_TU = 5231 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M8_M4 = 5232 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M8_M4_MASK = 5233 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M8_M4_TU = 5234 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M8_M8 = 5235 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M8_M8_MASK = 5236 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_M8_M8_TU = 5237 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF2_M1 = 5238 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF2_M1_MASK = 5239 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF2_M1_TU = 5240 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF2_M2 = 5241 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF2_M2_MASK = 5242 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF2_M2_TU = 5243 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF2_MF2 = 5244 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF2_MF2_MASK = 5245 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF2_MF2_TU = 5246 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF2_MF4 = 5247 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF2_MF4_MASK = 5248 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF2_MF4_TU = 5249 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF4_M1 = 5250 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF4_M1_MASK = 5251 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF4_M1_TU = 5252 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF4_MF2 = 5253 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF4_MF2_MASK = 5254 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF4_MF2_TU = 5255 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF4_MF4 = 5256 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF4_MF4_MASK = 5257 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF4_MF4_TU = 5258 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF4_MF8 = 5259 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF4_MF8_MASK = 5260 CEFBS_HasVInstructions, // PseudoVLUXEI16_V_MF4_MF8_TU = 5261 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M1_M1 = 5262 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M1_M1_MASK = 5263 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M1_M1_TU = 5264 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M1_M2 = 5265 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M1_M2_MASK = 5266 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M1_M2_TU = 5267 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M1_MF2 = 5268 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M1_MF2_MASK = 5269 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M1_MF2_TU = 5270 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M1_MF4 = 5271 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M1_MF4_MASK = 5272 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M1_MF4_TU = 5273 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M2_M1 = 5274 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M2_M1_MASK = 5275 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M2_M1_TU = 5276 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M2_M2 = 5277 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M2_M2_MASK = 5278 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M2_M2_TU = 5279 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M2_M4 = 5280 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M2_M4_MASK = 5281 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M2_M4_TU = 5282 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M2_MF2 = 5283 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M2_MF2_MASK = 5284 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M2_MF2_TU = 5285 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M4_M1 = 5286 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M4_M1_MASK = 5287 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M4_M1_TU = 5288 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M4_M2 = 5289 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M4_M2_MASK = 5290 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M4_M2_TU = 5291 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M4_M4 = 5292 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M4_M4_MASK = 5293 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M4_M4_TU = 5294 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M4_M8 = 5295 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M4_M8_MASK = 5296 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M4_M8_TU = 5297 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M8_M2 = 5298 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M8_M2_MASK = 5299 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M8_M2_TU = 5300 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M8_M4 = 5301 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M8_M4_MASK = 5302 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M8_M4_TU = 5303 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M8_M8 = 5304 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M8_M8_MASK = 5305 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_M8_M8_TU = 5306 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_MF2_M1 = 5307 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_MF2_M1_MASK = 5308 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_MF2_M1_TU = 5309 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_MF2_MF2 = 5310 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_MF2_MF2_MASK = 5311 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_MF2_MF2_TU = 5312 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_MF2_MF4 = 5313 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_MF2_MF4_MASK = 5314 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_MF2_MF4_TU = 5315 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_MF2_MF8 = 5316 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_MF2_MF8_MASK = 5317 CEFBS_HasVInstructions, // PseudoVLUXEI32_V_MF2_MF8_TU = 5318 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M1_M1 = 5319 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M1_M1_MASK = 5320 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M1_M1_TU = 5321 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M1_MF2 = 5322 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M1_MF2_MASK = 5323 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M1_MF2_TU = 5324 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M1_MF4 = 5325 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M1_MF4_MASK = 5326 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M1_MF4_TU = 5327 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M1_MF8 = 5328 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M1_MF8_MASK = 5329 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M1_MF8_TU = 5330 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M2_M1 = 5331 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M2_M1_MASK = 5332 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M2_M1_TU = 5333 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M2_M2 = 5334 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M2_M2_MASK = 5335 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M2_M2_TU = 5336 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M2_MF2 = 5337 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M2_MF2_MASK = 5338 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M2_MF2_TU = 5339 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M2_MF4 = 5340 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M2_MF4_MASK = 5341 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M2_MF4_TU = 5342 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M4_M1 = 5343 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M4_M1_MASK = 5344 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M4_M1_TU = 5345 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M4_M2 = 5346 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M4_M2_MASK = 5347 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M4_M2_TU = 5348 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M4_M4 = 5349 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M4_M4_MASK = 5350 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M4_M4_TU = 5351 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M4_MF2 = 5352 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M4_MF2_MASK = 5353 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M4_MF2_TU = 5354 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M8_M1 = 5355 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M8_M1_MASK = 5356 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M8_M1_TU = 5357 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M8_M2 = 5358 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M8_M2_MASK = 5359 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M8_M2_TU = 5360 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M8_M4 = 5361 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M8_M4_MASK = 5362 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M8_M4_TU = 5363 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M8_M8 = 5364 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M8_M8_MASK = 5365 CEFBS_HasVInstructions, // PseudoVLUXEI64_V_M8_M8_TU = 5366 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M1_M1 = 5367 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M1_M1_MASK = 5368 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M1_M1_TU = 5369 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M1_M2 = 5370 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M1_M2_MASK = 5371 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M1_M2_TU = 5372 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M1_M4 = 5373 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M1_M4_MASK = 5374 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M1_M4_TU = 5375 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M1_M8 = 5376 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M1_M8_MASK = 5377 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M1_M8_TU = 5378 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M2_M2 = 5379 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M2_M2_MASK = 5380 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M2_M2_TU = 5381 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M2_M4 = 5382 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M2_M4_MASK = 5383 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M2_M4_TU = 5384 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M2_M8 = 5385 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M2_M8_MASK = 5386 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M2_M8_TU = 5387 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M4_M4 = 5388 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M4_M4_MASK = 5389 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M4_M4_TU = 5390 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M4_M8 = 5391 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M4_M8_MASK = 5392 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M4_M8_TU = 5393 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M8_M8 = 5394 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M8_M8_MASK = 5395 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_M8_M8_TU = 5396 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF2_M1 = 5397 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF2_M1_MASK = 5398 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF2_M1_TU = 5399 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF2_M2 = 5400 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF2_M2_MASK = 5401 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF2_M2_TU = 5402 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF2_M4 = 5403 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF2_M4_MASK = 5404 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF2_M4_TU = 5405 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF2_MF2 = 5406 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF2_MF2_MASK = 5407 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF2_MF2_TU = 5408 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF4_M1 = 5409 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF4_M1_MASK = 5410 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF4_M1_TU = 5411 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF4_M2 = 5412 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF4_M2_MASK = 5413 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF4_M2_TU = 5414 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF4_MF2 = 5415 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF4_MF2_MASK = 5416 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF4_MF2_TU = 5417 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF4_MF4 = 5418 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF4_MF4_MASK = 5419 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF4_MF4_TU = 5420 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF8_M1 = 5421 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF8_M1_MASK = 5422 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF8_M1_TU = 5423 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF8_MF2 = 5424 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF8_MF2_MASK = 5425 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF8_MF2_TU = 5426 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF8_MF4 = 5427 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF8_MF4_MASK = 5428 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF8_MF4_TU = 5429 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF8_MF8 = 5430 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF8_MF8_MASK = 5431 CEFBS_HasVInstructions, // PseudoVLUXEI8_V_MF8_MF8_TU = 5432 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M1_M1 = 5433 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M1_M1_MASK = 5434 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M1_M1_TU = 5435 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M1_M2 = 5436 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M1_M2_MASK = 5437 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M1_M2_TU = 5438 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M1_M4 = 5439 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M1_M4_MASK = 5440 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M1_M4_TU = 5441 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M1_MF2 = 5442 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M1_MF2_MASK = 5443 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M1_MF2_TU = 5444 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M2_M1 = 5445 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M2_M1_MASK = 5446 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M2_M1_TU = 5447 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M2_M2 = 5448 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M2_M2_MASK = 5449 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M2_M2_TU = 5450 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M2_M4 = 5451 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M2_M4_MASK = 5452 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M2_M4_TU = 5453 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M4_M2 = 5454 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M4_M2_MASK = 5455 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M4_M2_TU = 5456 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M4_M4 = 5457 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M4_M4_MASK = 5458 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M4_M4_TU = 5459 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M8_M4 = 5460 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M8_M4_MASK = 5461 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_M8_M4_TU = 5462 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF2_M1 = 5463 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF2_M1_MASK = 5464 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF2_M1_TU = 5465 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF2_M2 = 5466 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF2_M2_MASK = 5467 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF2_M2_TU = 5468 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF2_MF2 = 5469 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF2_MF2_MASK = 5470 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF2_MF2_TU = 5471 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF2_MF4 = 5472 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF2_MF4_MASK = 5473 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF2_MF4_TU = 5474 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF4_M1 = 5475 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF4_M1_MASK = 5476 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF4_M1_TU = 5477 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF4_MF2 = 5478 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF4_MF2_MASK = 5479 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF4_MF2_TU = 5480 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF4_MF4 = 5481 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF4_MF4_MASK = 5482 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF4_MF4_TU = 5483 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF4_MF8 = 5484 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF4_MF8_MASK = 5485 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI16_V_MF4_MF8_TU = 5486 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M1_M1 = 5487 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M1_M1_MASK = 5488 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M1_M1_TU = 5489 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M1_M2 = 5490 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M1_M2_MASK = 5491 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M1_M2_TU = 5492 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M1_MF2 = 5493 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M1_MF2_MASK = 5494 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M1_MF2_TU = 5495 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M1_MF4 = 5496 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M1_MF4_MASK = 5497 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M1_MF4_TU = 5498 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M2_M1 = 5499 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M2_M1_MASK = 5500 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M2_M1_TU = 5501 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M2_M2 = 5502 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M2_M2_MASK = 5503 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M2_M2_TU = 5504 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M2_M4 = 5505 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M2_M4_MASK = 5506 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M2_M4_TU = 5507 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M2_MF2 = 5508 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M2_MF2_MASK = 5509 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M2_MF2_TU = 5510 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M4_M1 = 5511 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M4_M1_MASK = 5512 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M4_M1_TU = 5513 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M4_M2 = 5514 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M4_M2_MASK = 5515 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M4_M2_TU = 5516 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M4_M4 = 5517 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M4_M4_MASK = 5518 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M4_M4_TU = 5519 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M8_M2 = 5520 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M8_M2_MASK = 5521 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M8_M2_TU = 5522 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M8_M4 = 5523 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M8_M4_MASK = 5524 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_M8_M4_TU = 5525 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_MF2_M1 = 5526 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_MF2_M1_MASK = 5527 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_MF2_M1_TU = 5528 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_MF2_MF2 = 5529 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_MF2_MF2_MASK = 5530 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_MF2_MF2_TU = 5531 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_MF2_MF4 = 5532 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_MF2_MF4_MASK = 5533 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_MF2_MF4_TU = 5534 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_MF2_MF8 = 5535 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_MF2_MF8_MASK = 5536 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI32_V_MF2_MF8_TU = 5537 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M1_M1 = 5538 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M1_M1_MASK = 5539 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M1_M1_TU = 5540 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M1_MF2 = 5541 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M1_MF2_MASK = 5542 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M1_MF2_TU = 5543 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M1_MF4 = 5544 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M1_MF4_MASK = 5545 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M1_MF4_TU = 5546 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M1_MF8 = 5547 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M1_MF8_MASK = 5548 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M1_MF8_TU = 5549 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M2_M1 = 5550 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M2_M1_MASK = 5551 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M2_M1_TU = 5552 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M2_M2 = 5553 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M2_M2_MASK = 5554 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M2_M2_TU = 5555 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M2_MF2 = 5556 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M2_MF2_MASK = 5557 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M2_MF2_TU = 5558 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M2_MF4 = 5559 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M2_MF4_MASK = 5560 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M2_MF4_TU = 5561 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M4_M1 = 5562 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M4_M1_MASK = 5563 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M4_M1_TU = 5564 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M4_M2 = 5565 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M4_M2_MASK = 5566 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M4_M2_TU = 5567 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M4_M4 = 5568 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M4_M4_MASK = 5569 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M4_M4_TU = 5570 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M4_MF2 = 5571 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M4_MF2_MASK = 5572 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M4_MF2_TU = 5573 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M8_M1 = 5574 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M8_M1_MASK = 5575 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M8_M1_TU = 5576 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M8_M2 = 5577 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M8_M2_MASK = 5578 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M8_M2_TU = 5579 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M8_M4 = 5580 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M8_M4_MASK = 5581 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI64_V_M8_M4_TU = 5582 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_M1_M1 = 5583 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_M1_M1_MASK = 5584 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_M1_M1_TU = 5585 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_M1_M2 = 5586 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_M1_M2_MASK = 5587 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_M1_M2_TU = 5588 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_M1_M4 = 5589 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_M1_M4_MASK = 5590 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_M1_M4_TU = 5591 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_M2_M2 = 5592 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_M2_M2_MASK = 5593 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_M2_M2_TU = 5594 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_M2_M4 = 5595 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_M2_M4_MASK = 5596 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_M2_M4_TU = 5597 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_M4_M4 = 5598 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_M4_M4_MASK = 5599 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_M4_M4_TU = 5600 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF2_M1 = 5601 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF2_M1_MASK = 5602 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF2_M1_TU = 5603 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF2_M2 = 5604 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF2_M2_MASK = 5605 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF2_M2_TU = 5606 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF2_M4 = 5607 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF2_M4_MASK = 5608 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF2_M4_TU = 5609 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF2_MF2 = 5610 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF2_MF2_MASK = 5611 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF2_MF2_TU = 5612 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF4_M1 = 5613 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF4_M1_MASK = 5614 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF4_M1_TU = 5615 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF4_M2 = 5616 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF4_M2_MASK = 5617 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF4_M2_TU = 5618 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF4_MF2 = 5619 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF4_MF2_MASK = 5620 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF4_MF2_TU = 5621 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF4_MF4 = 5622 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF4_MF4_MASK = 5623 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF4_MF4_TU = 5624 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF8_M1 = 5625 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF8_M1_MASK = 5626 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF8_M1_TU = 5627 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF8_MF2 = 5628 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF8_MF2_MASK = 5629 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF8_MF2_TU = 5630 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF8_MF4 = 5631 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF8_MF4_MASK = 5632 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF8_MF4_TU = 5633 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF8_MF8 = 5634 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF8_MF8_MASK = 5635 CEFBS_HasVInstructions, // PseudoVLUXSEG2EI8_V_MF8_MF8_TU = 5636 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_M1_M1 = 5637 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_M1_M1_MASK = 5638 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_M1_M1_TU = 5639 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_M1_M2 = 5640 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_M1_M2_MASK = 5641 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_M1_M2_TU = 5642 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_M1_MF2 = 5643 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_M1_MF2_MASK = 5644 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_M1_MF2_TU = 5645 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_M2_M1 = 5646 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_M2_M1_MASK = 5647 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_M2_M1_TU = 5648 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_M2_M2 = 5649 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_M2_M2_MASK = 5650 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_M2_M2_TU = 5651 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_M4_M2 = 5652 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_M4_M2_MASK = 5653 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_M4_M2_TU = 5654 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF2_M1 = 5655 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF2_M1_MASK = 5656 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF2_M1_TU = 5657 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF2_M2 = 5658 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF2_M2_MASK = 5659 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF2_M2_TU = 5660 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF2_MF2 = 5661 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF2_MF2_MASK = 5662 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF2_MF2_TU = 5663 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF2_MF4 = 5664 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF2_MF4_MASK = 5665 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF2_MF4_TU = 5666 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF4_M1 = 5667 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF4_M1_MASK = 5668 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF4_M1_TU = 5669 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF4_MF2 = 5670 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF4_MF2_MASK = 5671 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF4_MF2_TU = 5672 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF4_MF4 = 5673 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF4_MF4_MASK = 5674 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF4_MF4_TU = 5675 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF4_MF8 = 5676 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF4_MF8_MASK = 5677 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI16_V_MF4_MF8_TU = 5678 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M1_M1 = 5679 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M1_M1_MASK = 5680 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M1_M1_TU = 5681 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M1_M2 = 5682 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M1_M2_MASK = 5683 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M1_M2_TU = 5684 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M1_MF2 = 5685 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M1_MF2_MASK = 5686 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M1_MF2_TU = 5687 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M1_MF4 = 5688 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M1_MF4_MASK = 5689 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M1_MF4_TU = 5690 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M2_M1 = 5691 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M2_M1_MASK = 5692 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M2_M1_TU = 5693 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M2_M2 = 5694 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M2_M2_MASK = 5695 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M2_M2_TU = 5696 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M2_MF2 = 5697 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M2_MF2_MASK = 5698 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M2_MF2_TU = 5699 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M4_M1 = 5700 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M4_M1_MASK = 5701 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M4_M1_TU = 5702 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M4_M2 = 5703 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M4_M2_MASK = 5704 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M4_M2_TU = 5705 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M8_M2 = 5706 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M8_M2_MASK = 5707 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_M8_M2_TU = 5708 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_MF2_M1 = 5709 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_MF2_M1_MASK = 5710 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_MF2_M1_TU = 5711 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_MF2_MF2 = 5712 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_MF2_MF2_MASK = 5713 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_MF2_MF2_TU = 5714 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_MF2_MF4 = 5715 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_MF2_MF4_MASK = 5716 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_MF2_MF4_TU = 5717 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_MF2_MF8 = 5718 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_MF2_MF8_MASK = 5719 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI32_V_MF2_MF8_TU = 5720 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M1_M1 = 5721 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M1_M1_MASK = 5722 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M1_M1_TU = 5723 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M1_MF2 = 5724 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M1_MF2_MASK = 5725 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M1_MF2_TU = 5726 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M1_MF4 = 5727 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M1_MF4_MASK = 5728 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M1_MF4_TU = 5729 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M1_MF8 = 5730 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M1_MF8_MASK = 5731 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M1_MF8_TU = 5732 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M2_M1 = 5733 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M2_M1_MASK = 5734 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M2_M1_TU = 5735 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M2_M2 = 5736 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M2_M2_MASK = 5737 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M2_M2_TU = 5738 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M2_MF2 = 5739 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M2_MF2_MASK = 5740 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M2_MF2_TU = 5741 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M2_MF4 = 5742 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M2_MF4_MASK = 5743 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M2_MF4_TU = 5744 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M4_M1 = 5745 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M4_M1_MASK = 5746 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M4_M1_TU = 5747 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M4_M2 = 5748 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M4_M2_MASK = 5749 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M4_M2_TU = 5750 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M4_MF2 = 5751 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M4_MF2_MASK = 5752 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M4_MF2_TU = 5753 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M8_M1 = 5754 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M8_M1_MASK = 5755 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M8_M1_TU = 5756 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M8_M2 = 5757 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M8_M2_MASK = 5758 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI64_V_M8_M2_TU = 5759 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_M1_M1 = 5760 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_M1_M1_MASK = 5761 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_M1_M1_TU = 5762 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_M1_M2 = 5763 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_M1_M2_MASK = 5764 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_M1_M2_TU = 5765 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_M2_M2 = 5766 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_M2_M2_MASK = 5767 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_M2_M2_TU = 5768 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF2_M1 = 5769 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF2_M1_MASK = 5770 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF2_M1_TU = 5771 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF2_M2 = 5772 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF2_M2_MASK = 5773 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF2_M2_TU = 5774 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF2_MF2 = 5775 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF2_MF2_MASK = 5776 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF2_MF2_TU = 5777 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF4_M1 = 5778 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF4_M1_MASK = 5779 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF4_M1_TU = 5780 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF4_M2 = 5781 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF4_M2_MASK = 5782 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF4_M2_TU = 5783 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF4_MF2 = 5784 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF4_MF2_MASK = 5785 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF4_MF2_TU = 5786 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF4_MF4 = 5787 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF4_MF4_MASK = 5788 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF4_MF4_TU = 5789 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF8_M1 = 5790 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF8_M1_MASK = 5791 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF8_M1_TU = 5792 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF8_MF2 = 5793 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF8_MF2_MASK = 5794 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF8_MF2_TU = 5795 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF8_MF4 = 5796 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF8_MF4_MASK = 5797 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF8_MF4_TU = 5798 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF8_MF8 = 5799 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF8_MF8_MASK = 5800 CEFBS_HasVInstructions, // PseudoVLUXSEG3EI8_V_MF8_MF8_TU = 5801 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_M1_M1 = 5802 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_M1_M1_MASK = 5803 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_M1_M1_TU = 5804 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_M1_M2 = 5805 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_M1_M2_MASK = 5806 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_M1_M2_TU = 5807 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_M1_MF2 = 5808 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_M1_MF2_MASK = 5809 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_M1_MF2_TU = 5810 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_M2_M1 = 5811 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_M2_M1_MASK = 5812 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_M2_M1_TU = 5813 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_M2_M2 = 5814 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_M2_M2_MASK = 5815 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_M2_M2_TU = 5816 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_M4_M2 = 5817 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_M4_M2_MASK = 5818 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_M4_M2_TU = 5819 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF2_M1 = 5820 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF2_M1_MASK = 5821 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF2_M1_TU = 5822 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF2_M2 = 5823 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF2_M2_MASK = 5824 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF2_M2_TU = 5825 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF2_MF2 = 5826 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF2_MF2_MASK = 5827 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF2_MF2_TU = 5828 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF2_MF4 = 5829 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF2_MF4_MASK = 5830 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF2_MF4_TU = 5831 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF4_M1 = 5832 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF4_M1_MASK = 5833 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF4_M1_TU = 5834 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF4_MF2 = 5835 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF4_MF2_MASK = 5836 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF4_MF2_TU = 5837 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF4_MF4 = 5838 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF4_MF4_MASK = 5839 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF4_MF4_TU = 5840 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF4_MF8 = 5841 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF4_MF8_MASK = 5842 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI16_V_MF4_MF8_TU = 5843 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M1_M1 = 5844 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M1_M1_MASK = 5845 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M1_M1_TU = 5846 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M1_M2 = 5847 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M1_M2_MASK = 5848 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M1_M2_TU = 5849 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M1_MF2 = 5850 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M1_MF2_MASK = 5851 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M1_MF2_TU = 5852 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M1_MF4 = 5853 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M1_MF4_MASK = 5854 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M1_MF4_TU = 5855 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M2_M1 = 5856 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M2_M1_MASK = 5857 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M2_M1_TU = 5858 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M2_M2 = 5859 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M2_M2_MASK = 5860 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M2_M2_TU = 5861 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M2_MF2 = 5862 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M2_MF2_MASK = 5863 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M2_MF2_TU = 5864 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M4_M1 = 5865 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M4_M1_MASK = 5866 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M4_M1_TU = 5867 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M4_M2 = 5868 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M4_M2_MASK = 5869 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M4_M2_TU = 5870 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M8_M2 = 5871 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M8_M2_MASK = 5872 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_M8_M2_TU = 5873 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_MF2_M1 = 5874 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_MF2_M1_MASK = 5875 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_MF2_M1_TU = 5876 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_MF2_MF2 = 5877 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_MF2_MF2_MASK = 5878 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_MF2_MF2_TU = 5879 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_MF2_MF4 = 5880 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_MF2_MF4_MASK = 5881 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_MF2_MF4_TU = 5882 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_MF2_MF8 = 5883 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_MF2_MF8_MASK = 5884 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI32_V_MF2_MF8_TU = 5885 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M1_M1 = 5886 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M1_M1_MASK = 5887 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M1_M1_TU = 5888 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M1_MF2 = 5889 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M1_MF2_MASK = 5890 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M1_MF2_TU = 5891 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M1_MF4 = 5892 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M1_MF4_MASK = 5893 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M1_MF4_TU = 5894 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M1_MF8 = 5895 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M1_MF8_MASK = 5896 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M1_MF8_TU = 5897 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M2_M1 = 5898 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M2_M1_MASK = 5899 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M2_M1_TU = 5900 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M2_M2 = 5901 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M2_M2_MASK = 5902 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M2_M2_TU = 5903 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M2_MF2 = 5904 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M2_MF2_MASK = 5905 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M2_MF2_TU = 5906 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M2_MF4 = 5907 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M2_MF4_MASK = 5908 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M2_MF4_TU = 5909 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M4_M1 = 5910 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M4_M1_MASK = 5911 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M4_M1_TU = 5912 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M4_M2 = 5913 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M4_M2_MASK = 5914 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M4_M2_TU = 5915 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M4_MF2 = 5916 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M4_MF2_MASK = 5917 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M4_MF2_TU = 5918 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M8_M1 = 5919 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M8_M1_MASK = 5920 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M8_M1_TU = 5921 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M8_M2 = 5922 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M8_M2_MASK = 5923 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI64_V_M8_M2_TU = 5924 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_M1_M1 = 5925 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_M1_M1_MASK = 5926 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_M1_M1_TU = 5927 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_M1_M2 = 5928 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_M1_M2_MASK = 5929 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_M1_M2_TU = 5930 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_M2_M2 = 5931 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_M2_M2_MASK = 5932 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_M2_M2_TU = 5933 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF2_M1 = 5934 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF2_M1_MASK = 5935 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF2_M1_TU = 5936 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF2_M2 = 5937 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF2_M2_MASK = 5938 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF2_M2_TU = 5939 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF2_MF2 = 5940 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF2_MF2_MASK = 5941 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF2_MF2_TU = 5942 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF4_M1 = 5943 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF4_M1_MASK = 5944 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF4_M1_TU = 5945 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF4_M2 = 5946 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF4_M2_MASK = 5947 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF4_M2_TU = 5948 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF4_MF2 = 5949 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF4_MF2_MASK = 5950 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF4_MF2_TU = 5951 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF4_MF4 = 5952 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF4_MF4_MASK = 5953 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF4_MF4_TU = 5954 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF8_M1 = 5955 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF8_M1_MASK = 5956 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF8_M1_TU = 5957 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF8_MF2 = 5958 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF8_MF2_MASK = 5959 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF8_MF2_TU = 5960 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF8_MF4 = 5961 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF8_MF4_MASK = 5962 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF8_MF4_TU = 5963 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF8_MF8 = 5964 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF8_MF8_MASK = 5965 CEFBS_HasVInstructions, // PseudoVLUXSEG4EI8_V_MF8_MF8_TU = 5966 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_M1_M1 = 5967 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_M1_M1_MASK = 5968 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_M1_M1_TU = 5969 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_M1_MF2 = 5970 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_M1_MF2_MASK = 5971 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_M1_MF2_TU = 5972 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_M2_M1 = 5973 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_M2_M1_MASK = 5974 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_M2_M1_TU = 5975 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF2_M1 = 5976 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF2_M1_MASK = 5977 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF2_M1_TU = 5978 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF2_MF2 = 5979 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF2_MF2_MASK = 5980 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF2_MF2_TU = 5981 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF2_MF4 = 5982 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF2_MF4_MASK = 5983 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF2_MF4_TU = 5984 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF4_M1 = 5985 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF4_M1_MASK = 5986 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF4_M1_TU = 5987 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF4_MF2 = 5988 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF4_MF2_MASK = 5989 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF4_MF2_TU = 5990 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF4_MF4 = 5991 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF4_MF4_MASK = 5992 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF4_MF4_TU = 5993 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF4_MF8 = 5994 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF4_MF8_MASK = 5995 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI16_V_MF4_MF8_TU = 5996 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_M1_M1 = 5997 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_M1_M1_MASK = 5998 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_M1_M1_TU = 5999 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_M1_MF2 = 6000 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_M1_MF2_MASK = 6001 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_M1_MF2_TU = 6002 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_M1_MF4 = 6003 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_M1_MF4_MASK = 6004 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_M1_MF4_TU = 6005 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_M2_M1 = 6006 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_M2_M1_MASK = 6007 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_M2_M1_TU = 6008 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_M2_MF2 = 6009 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_M2_MF2_MASK = 6010 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_M2_MF2_TU = 6011 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_M4_M1 = 6012 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_M4_M1_MASK = 6013 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_M4_M1_TU = 6014 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_MF2_M1 = 6015 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_MF2_M1_MASK = 6016 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_MF2_M1_TU = 6017 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_MF2_MF2 = 6018 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_MF2_MF2_MASK = 6019 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_MF2_MF2_TU = 6020 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_MF2_MF4 = 6021 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_MF2_MF4_MASK = 6022 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_MF2_MF4_TU = 6023 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_MF2_MF8 = 6024 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_MF2_MF8_MASK = 6025 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI32_V_MF2_MF8_TU = 6026 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M1_M1 = 6027 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M1_M1_MASK = 6028 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M1_M1_TU = 6029 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M1_MF2 = 6030 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M1_MF2_MASK = 6031 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M1_MF2_TU = 6032 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M1_MF4 = 6033 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M1_MF4_MASK = 6034 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M1_MF4_TU = 6035 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M1_MF8 = 6036 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M1_MF8_MASK = 6037 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M1_MF8_TU = 6038 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M2_M1 = 6039 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M2_M1_MASK = 6040 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M2_M1_TU = 6041 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M2_MF2 = 6042 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M2_MF2_MASK = 6043 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M2_MF2_TU = 6044 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M2_MF4 = 6045 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M2_MF4_MASK = 6046 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M2_MF4_TU = 6047 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M4_M1 = 6048 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M4_M1_MASK = 6049 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M4_M1_TU = 6050 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M4_MF2 = 6051 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M4_MF2_MASK = 6052 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M4_MF2_TU = 6053 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M8_M1 = 6054 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M8_M1_MASK = 6055 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI64_V_M8_M1_TU = 6056 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_M1_M1 = 6057 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_M1_M1_MASK = 6058 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_M1_M1_TU = 6059 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF2_M1 = 6060 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF2_M1_MASK = 6061 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF2_M1_TU = 6062 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF2_MF2 = 6063 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF2_MF2_MASK = 6064 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF2_MF2_TU = 6065 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF4_M1 = 6066 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF4_M1_MASK = 6067 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF4_M1_TU = 6068 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF4_MF2 = 6069 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF4_MF2_MASK = 6070 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF4_MF2_TU = 6071 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF4_MF4 = 6072 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF4_MF4_MASK = 6073 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF4_MF4_TU = 6074 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF8_M1 = 6075 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF8_M1_MASK = 6076 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF8_M1_TU = 6077 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF8_MF2 = 6078 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF8_MF2_MASK = 6079 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF8_MF2_TU = 6080 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF8_MF4 = 6081 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF8_MF4_MASK = 6082 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF8_MF4_TU = 6083 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF8_MF8 = 6084 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF8_MF8_MASK = 6085 CEFBS_HasVInstructions, // PseudoVLUXSEG5EI8_V_MF8_MF8_TU = 6086 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_M1_M1 = 6087 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_M1_M1_MASK = 6088 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_M1_M1_TU = 6089 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_M1_MF2 = 6090 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_M1_MF2_MASK = 6091 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_M1_MF2_TU = 6092 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_M2_M1 = 6093 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_M2_M1_MASK = 6094 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_M2_M1_TU = 6095 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF2_M1 = 6096 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF2_M1_MASK = 6097 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF2_M1_TU = 6098 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF2_MF2 = 6099 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF2_MF2_MASK = 6100 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF2_MF2_TU = 6101 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF2_MF4 = 6102 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF2_MF4_MASK = 6103 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF2_MF4_TU = 6104 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF4_M1 = 6105 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF4_M1_MASK = 6106 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF4_M1_TU = 6107 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF4_MF2 = 6108 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF4_MF2_MASK = 6109 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF4_MF2_TU = 6110 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF4_MF4 = 6111 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF4_MF4_MASK = 6112 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF4_MF4_TU = 6113 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF4_MF8 = 6114 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF4_MF8_MASK = 6115 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI16_V_MF4_MF8_TU = 6116 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_M1_M1 = 6117 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_M1_M1_MASK = 6118 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_M1_M1_TU = 6119 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_M1_MF2 = 6120 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_M1_MF2_MASK = 6121 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_M1_MF2_TU = 6122 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_M1_MF4 = 6123 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_M1_MF4_MASK = 6124 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_M1_MF4_TU = 6125 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_M2_M1 = 6126 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_M2_M1_MASK = 6127 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_M2_M1_TU = 6128 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_M2_MF2 = 6129 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_M2_MF2_MASK = 6130 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_M2_MF2_TU = 6131 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_M4_M1 = 6132 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_M4_M1_MASK = 6133 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_M4_M1_TU = 6134 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_MF2_M1 = 6135 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_MF2_M1_MASK = 6136 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_MF2_M1_TU = 6137 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_MF2_MF2 = 6138 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_MF2_MF2_MASK = 6139 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_MF2_MF2_TU = 6140 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_MF2_MF4 = 6141 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_MF2_MF4_MASK = 6142 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_MF2_MF4_TU = 6143 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_MF2_MF8 = 6144 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_MF2_MF8_MASK = 6145 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI32_V_MF2_MF8_TU = 6146 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M1_M1 = 6147 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M1_M1_MASK = 6148 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M1_M1_TU = 6149 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M1_MF2 = 6150 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M1_MF2_MASK = 6151 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M1_MF2_TU = 6152 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M1_MF4 = 6153 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M1_MF4_MASK = 6154 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M1_MF4_TU = 6155 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M1_MF8 = 6156 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M1_MF8_MASK = 6157 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M1_MF8_TU = 6158 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M2_M1 = 6159 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M2_M1_MASK = 6160 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M2_M1_TU = 6161 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M2_MF2 = 6162 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M2_MF2_MASK = 6163 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M2_MF2_TU = 6164 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M2_MF4 = 6165 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M2_MF4_MASK = 6166 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M2_MF4_TU = 6167 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M4_M1 = 6168 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M4_M1_MASK = 6169 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M4_M1_TU = 6170 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M4_MF2 = 6171 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M4_MF2_MASK = 6172 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M4_MF2_TU = 6173 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M8_M1 = 6174 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M8_M1_MASK = 6175 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI64_V_M8_M1_TU = 6176 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_M1_M1 = 6177 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_M1_M1_MASK = 6178 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_M1_M1_TU = 6179 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF2_M1 = 6180 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF2_M1_MASK = 6181 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF2_M1_TU = 6182 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF2_MF2 = 6183 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF2_MF2_MASK = 6184 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF2_MF2_TU = 6185 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF4_M1 = 6186 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF4_M1_MASK = 6187 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF4_M1_TU = 6188 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF4_MF2 = 6189 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF4_MF2_MASK = 6190 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF4_MF2_TU = 6191 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF4_MF4 = 6192 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF4_MF4_MASK = 6193 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF4_MF4_TU = 6194 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF8_M1 = 6195 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF8_M1_MASK = 6196 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF8_M1_TU = 6197 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF8_MF2 = 6198 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF8_MF2_MASK = 6199 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF8_MF2_TU = 6200 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF8_MF4 = 6201 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF8_MF4_MASK = 6202 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF8_MF4_TU = 6203 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF8_MF8 = 6204 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF8_MF8_MASK = 6205 CEFBS_HasVInstructions, // PseudoVLUXSEG6EI8_V_MF8_MF8_TU = 6206 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_M1_M1 = 6207 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_M1_M1_MASK = 6208 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_M1_M1_TU = 6209 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_M1_MF2 = 6210 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_M1_MF2_MASK = 6211 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_M1_MF2_TU = 6212 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_M2_M1 = 6213 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_M2_M1_MASK = 6214 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_M2_M1_TU = 6215 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF2_M1 = 6216 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF2_M1_MASK = 6217 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF2_M1_TU = 6218 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF2_MF2 = 6219 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF2_MF2_MASK = 6220 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF2_MF2_TU = 6221 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF2_MF4 = 6222 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF2_MF4_MASK = 6223 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF2_MF4_TU = 6224 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF4_M1 = 6225 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF4_M1_MASK = 6226 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF4_M1_TU = 6227 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF4_MF2 = 6228 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF4_MF2_MASK = 6229 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF4_MF2_TU = 6230 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF4_MF4 = 6231 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF4_MF4_MASK = 6232 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF4_MF4_TU = 6233 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF4_MF8 = 6234 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF4_MF8_MASK = 6235 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI16_V_MF4_MF8_TU = 6236 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_M1_M1 = 6237 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_M1_M1_MASK = 6238 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_M1_M1_TU = 6239 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_M1_MF2 = 6240 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_M1_MF2_MASK = 6241 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_M1_MF2_TU = 6242 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_M1_MF4 = 6243 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_M1_MF4_MASK = 6244 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_M1_MF4_TU = 6245 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_M2_M1 = 6246 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_M2_M1_MASK = 6247 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_M2_M1_TU = 6248 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_M2_MF2 = 6249 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_M2_MF2_MASK = 6250 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_M2_MF2_TU = 6251 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_M4_M1 = 6252 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_M4_M1_MASK = 6253 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_M4_M1_TU = 6254 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_MF2_M1 = 6255 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_MF2_M1_MASK = 6256 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_MF2_M1_TU = 6257 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_MF2_MF2 = 6258 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_MF2_MF2_MASK = 6259 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_MF2_MF2_TU = 6260 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_MF2_MF4 = 6261 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_MF2_MF4_MASK = 6262 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_MF2_MF4_TU = 6263 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_MF2_MF8 = 6264 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_MF2_MF8_MASK = 6265 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI32_V_MF2_MF8_TU = 6266 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M1_M1 = 6267 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M1_M1_MASK = 6268 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M1_M1_TU = 6269 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M1_MF2 = 6270 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M1_MF2_MASK = 6271 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M1_MF2_TU = 6272 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M1_MF4 = 6273 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M1_MF4_MASK = 6274 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M1_MF4_TU = 6275 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M1_MF8 = 6276 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M1_MF8_MASK = 6277 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M1_MF8_TU = 6278 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M2_M1 = 6279 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M2_M1_MASK = 6280 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M2_M1_TU = 6281 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M2_MF2 = 6282 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M2_MF2_MASK = 6283 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M2_MF2_TU = 6284 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M2_MF4 = 6285 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M2_MF4_MASK = 6286 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M2_MF4_TU = 6287 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M4_M1 = 6288 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M4_M1_MASK = 6289 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M4_M1_TU = 6290 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M4_MF2 = 6291 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M4_MF2_MASK = 6292 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M4_MF2_TU = 6293 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M8_M1 = 6294 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M8_M1_MASK = 6295 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI64_V_M8_M1_TU = 6296 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_M1_M1 = 6297 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_M1_M1_MASK = 6298 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_M1_M1_TU = 6299 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF2_M1 = 6300 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF2_M1_MASK = 6301 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF2_M1_TU = 6302 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF2_MF2 = 6303 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF2_MF2_MASK = 6304 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF2_MF2_TU = 6305 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF4_M1 = 6306 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF4_M1_MASK = 6307 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF4_M1_TU = 6308 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF4_MF2 = 6309 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF4_MF2_MASK = 6310 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF4_MF2_TU = 6311 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF4_MF4 = 6312 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF4_MF4_MASK = 6313 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF4_MF4_TU = 6314 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF8_M1 = 6315 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF8_M1_MASK = 6316 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF8_M1_TU = 6317 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF8_MF2 = 6318 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF8_MF2_MASK = 6319 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF8_MF2_TU = 6320 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF8_MF4 = 6321 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF8_MF4_MASK = 6322 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF8_MF4_TU = 6323 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF8_MF8 = 6324 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF8_MF8_MASK = 6325 CEFBS_HasVInstructions, // PseudoVLUXSEG7EI8_V_MF8_MF8_TU = 6326 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_M1_M1 = 6327 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_M1_M1_MASK = 6328 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_M1_M1_TU = 6329 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_M1_MF2 = 6330 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_M1_MF2_MASK = 6331 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_M1_MF2_TU = 6332 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_M2_M1 = 6333 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_M2_M1_MASK = 6334 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_M2_M1_TU = 6335 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF2_M1 = 6336 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF2_M1_MASK = 6337 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF2_M1_TU = 6338 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF2_MF2 = 6339 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF2_MF2_MASK = 6340 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF2_MF2_TU = 6341 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF2_MF4 = 6342 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF2_MF4_MASK = 6343 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF2_MF4_TU = 6344 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF4_M1 = 6345 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF4_M1_MASK = 6346 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF4_M1_TU = 6347 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF4_MF2 = 6348 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF4_MF2_MASK = 6349 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF4_MF2_TU = 6350 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF4_MF4 = 6351 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF4_MF4_MASK = 6352 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF4_MF4_TU = 6353 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF4_MF8 = 6354 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF4_MF8_MASK = 6355 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI16_V_MF4_MF8_TU = 6356 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_M1_M1 = 6357 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_M1_M1_MASK = 6358 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_M1_M1_TU = 6359 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_M1_MF2 = 6360 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_M1_MF2_MASK = 6361 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_M1_MF2_TU = 6362 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_M1_MF4 = 6363 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_M1_MF4_MASK = 6364 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_M1_MF4_TU = 6365 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_M2_M1 = 6366 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_M2_M1_MASK = 6367 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_M2_M1_TU = 6368 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_M2_MF2 = 6369 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_M2_MF2_MASK = 6370 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_M2_MF2_TU = 6371 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_M4_M1 = 6372 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_M4_M1_MASK = 6373 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_M4_M1_TU = 6374 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_MF2_M1 = 6375 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_MF2_M1_MASK = 6376 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_MF2_M1_TU = 6377 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_MF2_MF2 = 6378 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_MF2_MF2_MASK = 6379 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_MF2_MF2_TU = 6380 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_MF2_MF4 = 6381 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_MF2_MF4_MASK = 6382 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_MF2_MF4_TU = 6383 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_MF2_MF8 = 6384 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_MF2_MF8_MASK = 6385 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI32_V_MF2_MF8_TU = 6386 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M1_M1 = 6387 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M1_M1_MASK = 6388 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M1_M1_TU = 6389 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M1_MF2 = 6390 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M1_MF2_MASK = 6391 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M1_MF2_TU = 6392 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M1_MF4 = 6393 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M1_MF4_MASK = 6394 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M1_MF4_TU = 6395 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M1_MF8 = 6396 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M1_MF8_MASK = 6397 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M1_MF8_TU = 6398 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M2_M1 = 6399 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M2_M1_MASK = 6400 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M2_M1_TU = 6401 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M2_MF2 = 6402 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M2_MF2_MASK = 6403 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M2_MF2_TU = 6404 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M2_MF4 = 6405 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M2_MF4_MASK = 6406 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M2_MF4_TU = 6407 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M4_M1 = 6408 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M4_M1_MASK = 6409 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M4_M1_TU = 6410 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M4_MF2 = 6411 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M4_MF2_MASK = 6412 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M4_MF2_TU = 6413 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M8_M1 = 6414 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M8_M1_MASK = 6415 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI64_V_M8_M1_TU = 6416 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_M1_M1 = 6417 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_M1_M1_MASK = 6418 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_M1_M1_TU = 6419 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF2_M1 = 6420 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF2_M1_MASK = 6421 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF2_M1_TU = 6422 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF2_MF2 = 6423 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF2_MF2_MASK = 6424 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF2_MF2_TU = 6425 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF4_M1 = 6426 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF4_M1_MASK = 6427 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF4_M1_TU = 6428 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF4_MF2 = 6429 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF4_MF2_MASK = 6430 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF4_MF2_TU = 6431 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF4_MF4 = 6432 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF4_MF4_MASK = 6433 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF4_MF4_TU = 6434 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF8_M1 = 6435 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF8_M1_MASK = 6436 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF8_M1_TU = 6437 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF8_MF2 = 6438 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF8_MF2_MASK = 6439 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF8_MF2_TU = 6440 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF8_MF4 = 6441 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF8_MF4_MASK = 6442 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF8_MF4_TU = 6443 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF8_MF8 = 6444 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF8_MF8_MASK = 6445 CEFBS_HasVInstructions, // PseudoVLUXSEG8EI8_V_MF8_MF8_TU = 6446 CEFBS_HasVInstructions, // PseudoVMACC_VV_M1 = 6447 CEFBS_HasVInstructions, // PseudoVMACC_VV_M1_MASK = 6448 CEFBS_HasVInstructions, // PseudoVMACC_VV_M2 = 6449 CEFBS_HasVInstructions, // PseudoVMACC_VV_M2_MASK = 6450 CEFBS_HasVInstructions, // PseudoVMACC_VV_M4 = 6451 CEFBS_HasVInstructions, // PseudoVMACC_VV_M4_MASK = 6452 CEFBS_HasVInstructions, // PseudoVMACC_VV_M8 = 6453 CEFBS_HasVInstructions, // PseudoVMACC_VV_M8_MASK = 6454 CEFBS_HasVInstructions, // PseudoVMACC_VV_MF2 = 6455 CEFBS_HasVInstructions, // PseudoVMACC_VV_MF2_MASK = 6456 CEFBS_HasVInstructions, // PseudoVMACC_VV_MF4 = 6457 CEFBS_HasVInstructions, // PseudoVMACC_VV_MF4_MASK = 6458 CEFBS_HasVInstructions, // PseudoVMACC_VV_MF8 = 6459 CEFBS_HasVInstructions, // PseudoVMACC_VV_MF8_MASK = 6460 CEFBS_HasVInstructions, // PseudoVMACC_VX_M1 = 6461 CEFBS_HasVInstructions, // PseudoVMACC_VX_M1_MASK = 6462 CEFBS_HasVInstructions, // PseudoVMACC_VX_M2 = 6463 CEFBS_HasVInstructions, // PseudoVMACC_VX_M2_MASK = 6464 CEFBS_HasVInstructions, // PseudoVMACC_VX_M4 = 6465 CEFBS_HasVInstructions, // PseudoVMACC_VX_M4_MASK = 6466 CEFBS_HasVInstructions, // PseudoVMACC_VX_M8 = 6467 CEFBS_HasVInstructions, // PseudoVMACC_VX_M8_MASK = 6468 CEFBS_HasVInstructions, // PseudoVMACC_VX_MF2 = 6469 CEFBS_HasVInstructions, // PseudoVMACC_VX_MF2_MASK = 6470 CEFBS_HasVInstructions, // PseudoVMACC_VX_MF4 = 6471 CEFBS_HasVInstructions, // PseudoVMACC_VX_MF4_MASK = 6472 CEFBS_HasVInstructions, // PseudoVMACC_VX_MF8 = 6473 CEFBS_HasVInstructions, // PseudoVMACC_VX_MF8_MASK = 6474 CEFBS_HasVInstructions, // PseudoVMADC_VIM_M1 = 6475 CEFBS_HasVInstructions, // PseudoVMADC_VIM_M2 = 6476 CEFBS_HasVInstructions, // PseudoVMADC_VIM_M4 = 6477 CEFBS_HasVInstructions, // PseudoVMADC_VIM_M8 = 6478 CEFBS_HasVInstructions, // PseudoVMADC_VIM_MF2 = 6479 CEFBS_HasVInstructions, // PseudoVMADC_VIM_MF4 = 6480 CEFBS_HasVInstructions, // PseudoVMADC_VIM_MF8 = 6481 CEFBS_HasVInstructions, // PseudoVMADC_VI_M1 = 6482 CEFBS_HasVInstructions, // PseudoVMADC_VI_M2 = 6483 CEFBS_HasVInstructions, // PseudoVMADC_VI_M4 = 6484 CEFBS_HasVInstructions, // PseudoVMADC_VI_M8 = 6485 CEFBS_HasVInstructions, // PseudoVMADC_VI_MF2 = 6486 CEFBS_HasVInstructions, // PseudoVMADC_VI_MF4 = 6487 CEFBS_HasVInstructions, // PseudoVMADC_VI_MF8 = 6488 CEFBS_HasVInstructions, // PseudoVMADC_VVM_M1 = 6489 CEFBS_HasVInstructions, // PseudoVMADC_VVM_M2 = 6490 CEFBS_HasVInstructions, // PseudoVMADC_VVM_M4 = 6491 CEFBS_HasVInstructions, // PseudoVMADC_VVM_M8 = 6492 CEFBS_HasVInstructions, // PseudoVMADC_VVM_MF2 = 6493 CEFBS_HasVInstructions, // PseudoVMADC_VVM_MF4 = 6494 CEFBS_HasVInstructions, // PseudoVMADC_VVM_MF8 = 6495 CEFBS_HasVInstructions, // PseudoVMADC_VV_M1 = 6496 CEFBS_HasVInstructions, // PseudoVMADC_VV_M2 = 6497 CEFBS_HasVInstructions, // PseudoVMADC_VV_M4 = 6498 CEFBS_HasVInstructions, // PseudoVMADC_VV_M8 = 6499 CEFBS_HasVInstructions, // PseudoVMADC_VV_MF2 = 6500 CEFBS_HasVInstructions, // PseudoVMADC_VV_MF4 = 6501 CEFBS_HasVInstructions, // PseudoVMADC_VV_MF8 = 6502 CEFBS_HasVInstructions, // PseudoVMADC_VXM_M1 = 6503 CEFBS_HasVInstructions, // PseudoVMADC_VXM_M2 = 6504 CEFBS_HasVInstructions, // PseudoVMADC_VXM_M4 = 6505 CEFBS_HasVInstructions, // PseudoVMADC_VXM_M8 = 6506 CEFBS_HasVInstructions, // PseudoVMADC_VXM_MF2 = 6507 CEFBS_HasVInstructions, // PseudoVMADC_VXM_MF4 = 6508 CEFBS_HasVInstructions, // PseudoVMADC_VXM_MF8 = 6509 CEFBS_HasVInstructions, // PseudoVMADC_VX_M1 = 6510 CEFBS_HasVInstructions, // PseudoVMADC_VX_M2 = 6511 CEFBS_HasVInstructions, // PseudoVMADC_VX_M4 = 6512 CEFBS_HasVInstructions, // PseudoVMADC_VX_M8 = 6513 CEFBS_HasVInstructions, // PseudoVMADC_VX_MF2 = 6514 CEFBS_HasVInstructions, // PseudoVMADC_VX_MF4 = 6515 CEFBS_HasVInstructions, // PseudoVMADC_VX_MF8 = 6516 CEFBS_HasVInstructions, // PseudoVMADD_VV_M1 = 6517 CEFBS_HasVInstructions, // PseudoVMADD_VV_M1_MASK = 6518 CEFBS_HasVInstructions, // PseudoVMADD_VV_M2 = 6519 CEFBS_HasVInstructions, // PseudoVMADD_VV_M2_MASK = 6520 CEFBS_HasVInstructions, // PseudoVMADD_VV_M4 = 6521 CEFBS_HasVInstructions, // PseudoVMADD_VV_M4_MASK = 6522 CEFBS_HasVInstructions, // PseudoVMADD_VV_M8 = 6523 CEFBS_HasVInstructions, // PseudoVMADD_VV_M8_MASK = 6524 CEFBS_HasVInstructions, // PseudoVMADD_VV_MF2 = 6525 CEFBS_HasVInstructions, // PseudoVMADD_VV_MF2_MASK = 6526 CEFBS_HasVInstructions, // PseudoVMADD_VV_MF4 = 6527 CEFBS_HasVInstructions, // PseudoVMADD_VV_MF4_MASK = 6528 CEFBS_HasVInstructions, // PseudoVMADD_VV_MF8 = 6529 CEFBS_HasVInstructions, // PseudoVMADD_VV_MF8_MASK = 6530 CEFBS_HasVInstructions, // PseudoVMADD_VX_M1 = 6531 CEFBS_HasVInstructions, // PseudoVMADD_VX_M1_MASK = 6532 CEFBS_HasVInstructions, // PseudoVMADD_VX_M2 = 6533 CEFBS_HasVInstructions, // PseudoVMADD_VX_M2_MASK = 6534 CEFBS_HasVInstructions, // PseudoVMADD_VX_M4 = 6535 CEFBS_HasVInstructions, // PseudoVMADD_VX_M4_MASK = 6536 CEFBS_HasVInstructions, // PseudoVMADD_VX_M8 = 6537 CEFBS_HasVInstructions, // PseudoVMADD_VX_M8_MASK = 6538 CEFBS_HasVInstructions, // PseudoVMADD_VX_MF2 = 6539 CEFBS_HasVInstructions, // PseudoVMADD_VX_MF2_MASK = 6540 CEFBS_HasVInstructions, // PseudoVMADD_VX_MF4 = 6541 CEFBS_HasVInstructions, // PseudoVMADD_VX_MF4_MASK = 6542 CEFBS_HasVInstructions, // PseudoVMADD_VX_MF8 = 6543 CEFBS_HasVInstructions, // PseudoVMADD_VX_MF8_MASK = 6544 CEFBS_None, // PseudoVMANDN_MM_M1 = 6545 CEFBS_None, // PseudoVMANDN_MM_M2 = 6546 CEFBS_None, // PseudoVMANDN_MM_M4 = 6547 CEFBS_None, // PseudoVMANDN_MM_M8 = 6548 CEFBS_None, // PseudoVMANDN_MM_MF2 = 6549 CEFBS_None, // PseudoVMANDN_MM_MF4 = 6550 CEFBS_None, // PseudoVMANDN_MM_MF8 = 6551 CEFBS_None, // PseudoVMAND_MM_M1 = 6552 CEFBS_None, // PseudoVMAND_MM_M2 = 6553 CEFBS_None, // PseudoVMAND_MM_M4 = 6554 CEFBS_None, // PseudoVMAND_MM_M8 = 6555 CEFBS_None, // PseudoVMAND_MM_MF2 = 6556 CEFBS_None, // PseudoVMAND_MM_MF4 = 6557 CEFBS_None, // PseudoVMAND_MM_MF8 = 6558 CEFBS_HasVInstructions, // PseudoVMAXU_VV_M1 = 6559 CEFBS_HasVInstructions, // PseudoVMAXU_VV_M1_MASK = 6560 CEFBS_HasVInstructions, // PseudoVMAXU_VV_M1_TU = 6561 CEFBS_HasVInstructions, // PseudoVMAXU_VV_M2 = 6562 CEFBS_HasVInstructions, // PseudoVMAXU_VV_M2_MASK = 6563 CEFBS_HasVInstructions, // PseudoVMAXU_VV_M2_TU = 6564 CEFBS_HasVInstructions, // PseudoVMAXU_VV_M4 = 6565 CEFBS_HasVInstructions, // PseudoVMAXU_VV_M4_MASK = 6566 CEFBS_HasVInstructions, // PseudoVMAXU_VV_M4_TU = 6567 CEFBS_HasVInstructions, // PseudoVMAXU_VV_M8 = 6568 CEFBS_HasVInstructions, // PseudoVMAXU_VV_M8_MASK = 6569 CEFBS_HasVInstructions, // PseudoVMAXU_VV_M8_TU = 6570 CEFBS_HasVInstructions, // PseudoVMAXU_VV_MF2 = 6571 CEFBS_HasVInstructions, // PseudoVMAXU_VV_MF2_MASK = 6572 CEFBS_HasVInstructions, // PseudoVMAXU_VV_MF2_TU = 6573 CEFBS_HasVInstructions, // PseudoVMAXU_VV_MF4 = 6574 CEFBS_HasVInstructions, // PseudoVMAXU_VV_MF4_MASK = 6575 CEFBS_HasVInstructions, // PseudoVMAXU_VV_MF4_TU = 6576 CEFBS_HasVInstructions, // PseudoVMAXU_VV_MF8 = 6577 CEFBS_HasVInstructions, // PseudoVMAXU_VV_MF8_MASK = 6578 CEFBS_HasVInstructions, // PseudoVMAXU_VV_MF8_TU = 6579 CEFBS_HasVInstructions, // PseudoVMAXU_VX_M1 = 6580 CEFBS_HasVInstructions, // PseudoVMAXU_VX_M1_MASK = 6581 CEFBS_HasVInstructions, // PseudoVMAXU_VX_M1_TU = 6582 CEFBS_HasVInstructions, // PseudoVMAXU_VX_M2 = 6583 CEFBS_HasVInstructions, // PseudoVMAXU_VX_M2_MASK = 6584 CEFBS_HasVInstructions, // PseudoVMAXU_VX_M2_TU = 6585 CEFBS_HasVInstructions, // PseudoVMAXU_VX_M4 = 6586 CEFBS_HasVInstructions, // PseudoVMAXU_VX_M4_MASK = 6587 CEFBS_HasVInstructions, // PseudoVMAXU_VX_M4_TU = 6588 CEFBS_HasVInstructions, // PseudoVMAXU_VX_M8 = 6589 CEFBS_HasVInstructions, // PseudoVMAXU_VX_M8_MASK = 6590 CEFBS_HasVInstructions, // PseudoVMAXU_VX_M8_TU = 6591 CEFBS_HasVInstructions, // PseudoVMAXU_VX_MF2 = 6592 CEFBS_HasVInstructions, // PseudoVMAXU_VX_MF2_MASK = 6593 CEFBS_HasVInstructions, // PseudoVMAXU_VX_MF2_TU = 6594 CEFBS_HasVInstructions, // PseudoVMAXU_VX_MF4 = 6595 CEFBS_HasVInstructions, // PseudoVMAXU_VX_MF4_MASK = 6596 CEFBS_HasVInstructions, // PseudoVMAXU_VX_MF4_TU = 6597 CEFBS_HasVInstructions, // PseudoVMAXU_VX_MF8 = 6598 CEFBS_HasVInstructions, // PseudoVMAXU_VX_MF8_MASK = 6599 CEFBS_HasVInstructions, // PseudoVMAXU_VX_MF8_TU = 6600 CEFBS_HasVInstructions, // PseudoVMAX_VV_M1 = 6601 CEFBS_HasVInstructions, // PseudoVMAX_VV_M1_MASK = 6602 CEFBS_HasVInstructions, // PseudoVMAX_VV_M1_TU = 6603 CEFBS_HasVInstructions, // PseudoVMAX_VV_M2 = 6604 CEFBS_HasVInstructions, // PseudoVMAX_VV_M2_MASK = 6605 CEFBS_HasVInstructions, // PseudoVMAX_VV_M2_TU = 6606 CEFBS_HasVInstructions, // PseudoVMAX_VV_M4 = 6607 CEFBS_HasVInstructions, // PseudoVMAX_VV_M4_MASK = 6608 CEFBS_HasVInstructions, // PseudoVMAX_VV_M4_TU = 6609 CEFBS_HasVInstructions, // PseudoVMAX_VV_M8 = 6610 CEFBS_HasVInstructions, // PseudoVMAX_VV_M8_MASK = 6611 CEFBS_HasVInstructions, // PseudoVMAX_VV_M8_TU = 6612 CEFBS_HasVInstructions, // PseudoVMAX_VV_MF2 = 6613 CEFBS_HasVInstructions, // PseudoVMAX_VV_MF2_MASK = 6614 CEFBS_HasVInstructions, // PseudoVMAX_VV_MF2_TU = 6615 CEFBS_HasVInstructions, // PseudoVMAX_VV_MF4 = 6616 CEFBS_HasVInstructions, // PseudoVMAX_VV_MF4_MASK = 6617 CEFBS_HasVInstructions, // PseudoVMAX_VV_MF4_TU = 6618 CEFBS_HasVInstructions, // PseudoVMAX_VV_MF8 = 6619 CEFBS_HasVInstructions, // PseudoVMAX_VV_MF8_MASK = 6620 CEFBS_HasVInstructions, // PseudoVMAX_VV_MF8_TU = 6621 CEFBS_HasVInstructions, // PseudoVMAX_VX_M1 = 6622 CEFBS_HasVInstructions, // PseudoVMAX_VX_M1_MASK = 6623 CEFBS_HasVInstructions, // PseudoVMAX_VX_M1_TU = 6624 CEFBS_HasVInstructions, // PseudoVMAX_VX_M2 = 6625 CEFBS_HasVInstructions, // PseudoVMAX_VX_M2_MASK = 6626 CEFBS_HasVInstructions, // PseudoVMAX_VX_M2_TU = 6627 CEFBS_HasVInstructions, // PseudoVMAX_VX_M4 = 6628 CEFBS_HasVInstructions, // PseudoVMAX_VX_M4_MASK = 6629 CEFBS_HasVInstructions, // PseudoVMAX_VX_M4_TU = 6630 CEFBS_HasVInstructions, // PseudoVMAX_VX_M8 = 6631 CEFBS_HasVInstructions, // PseudoVMAX_VX_M8_MASK = 6632 CEFBS_HasVInstructions, // PseudoVMAX_VX_M8_TU = 6633 CEFBS_HasVInstructions, // PseudoVMAX_VX_MF2 = 6634 CEFBS_HasVInstructions, // PseudoVMAX_VX_MF2_MASK = 6635 CEFBS_HasVInstructions, // PseudoVMAX_VX_MF2_TU = 6636 CEFBS_HasVInstructions, // PseudoVMAX_VX_MF4 = 6637 CEFBS_HasVInstructions, // PseudoVMAX_VX_MF4_MASK = 6638 CEFBS_HasVInstructions, // PseudoVMAX_VX_MF4_TU = 6639 CEFBS_HasVInstructions, // PseudoVMAX_VX_MF8 = 6640 CEFBS_HasVInstructions, // PseudoVMAX_VX_MF8_MASK = 6641 CEFBS_HasVInstructions, // PseudoVMAX_VX_MF8_TU = 6642 CEFBS_None, // PseudoVMCLR_M_B1 = 6643 CEFBS_None, // PseudoVMCLR_M_B16 = 6644 CEFBS_None, // PseudoVMCLR_M_B2 = 6645 CEFBS_None, // PseudoVMCLR_M_B32 = 6646 CEFBS_None, // PseudoVMCLR_M_B4 = 6647 CEFBS_None, // PseudoVMCLR_M_B64 = 6648 CEFBS_None, // PseudoVMCLR_M_B8 = 6649 CEFBS_HasVInstructions, // PseudoVMERGE_VIM_M1 = 6650 CEFBS_HasVInstructions, // PseudoVMERGE_VIM_M1_TU = 6651 CEFBS_HasVInstructions, // PseudoVMERGE_VIM_M2 = 6652 CEFBS_HasVInstructions, // PseudoVMERGE_VIM_M2_TU = 6653 CEFBS_HasVInstructions, // PseudoVMERGE_VIM_M4 = 6654 CEFBS_HasVInstructions, // PseudoVMERGE_VIM_M4_TU = 6655 CEFBS_HasVInstructions, // PseudoVMERGE_VIM_M8 = 6656 CEFBS_HasVInstructions, // PseudoVMERGE_VIM_M8_TU = 6657 CEFBS_HasVInstructions, // PseudoVMERGE_VIM_MF2 = 6658 CEFBS_HasVInstructions, // PseudoVMERGE_VIM_MF2_TU = 6659 CEFBS_HasVInstructions, // PseudoVMERGE_VIM_MF4 = 6660 CEFBS_HasVInstructions, // PseudoVMERGE_VIM_MF4_TU = 6661 CEFBS_HasVInstructions, // PseudoVMERGE_VIM_MF8 = 6662 CEFBS_HasVInstructions, // PseudoVMERGE_VIM_MF8_TU = 6663 CEFBS_HasVInstructions, // PseudoVMERGE_VVM_M1 = 6664 CEFBS_HasVInstructions, // PseudoVMERGE_VVM_M1_TU = 6665 CEFBS_HasVInstructions, // PseudoVMERGE_VVM_M2 = 6666 CEFBS_HasVInstructions, // PseudoVMERGE_VVM_M2_TU = 6667 CEFBS_HasVInstructions, // PseudoVMERGE_VVM_M4 = 6668 CEFBS_HasVInstructions, // PseudoVMERGE_VVM_M4_TU = 6669 CEFBS_HasVInstructions, // PseudoVMERGE_VVM_M8 = 6670 CEFBS_HasVInstructions, // PseudoVMERGE_VVM_M8_TU = 6671 CEFBS_HasVInstructions, // PseudoVMERGE_VVM_MF2 = 6672 CEFBS_HasVInstructions, // PseudoVMERGE_VVM_MF2_TU = 6673 CEFBS_HasVInstructions, // PseudoVMERGE_VVM_MF4 = 6674 CEFBS_HasVInstructions, // PseudoVMERGE_VVM_MF4_TU = 6675 CEFBS_HasVInstructions, // PseudoVMERGE_VVM_MF8 = 6676 CEFBS_HasVInstructions, // PseudoVMERGE_VVM_MF8_TU = 6677 CEFBS_HasVInstructions, // PseudoVMERGE_VXM_M1 = 6678 CEFBS_HasVInstructions, // PseudoVMERGE_VXM_M1_TU = 6679 CEFBS_HasVInstructions, // PseudoVMERGE_VXM_M2 = 6680 CEFBS_HasVInstructions, // PseudoVMERGE_VXM_M2_TU = 6681 CEFBS_HasVInstructions, // PseudoVMERGE_VXM_M4 = 6682 CEFBS_HasVInstructions, // PseudoVMERGE_VXM_M4_TU = 6683 CEFBS_HasVInstructions, // PseudoVMERGE_VXM_M8 = 6684 CEFBS_HasVInstructions, // PseudoVMERGE_VXM_M8_TU = 6685 CEFBS_HasVInstructions, // PseudoVMERGE_VXM_MF2 = 6686 CEFBS_HasVInstructions, // PseudoVMERGE_VXM_MF2_TU = 6687 CEFBS_HasVInstructions, // PseudoVMERGE_VXM_MF4 = 6688 CEFBS_HasVInstructions, // PseudoVMERGE_VXM_MF4_TU = 6689 CEFBS_HasVInstructions, // PseudoVMERGE_VXM_MF8 = 6690 CEFBS_HasVInstructions, // PseudoVMERGE_VXM_MF8_TU = 6691 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF16_M1 = 6692 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF16_M1_MASK = 6693 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF16_M2 = 6694 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF16_M2_MASK = 6695 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF16_M4 = 6696 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF16_M4_MASK = 6697 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF16_M8 = 6698 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF16_M8_MASK = 6699 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF16_MF2 = 6700 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF16_MF2_MASK = 6701 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF16_MF4 = 6702 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF16_MF4_MASK = 6703 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF32_M1 = 6704 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF32_M1_MASK = 6705 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF32_M2 = 6706 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF32_M2_MASK = 6707 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF32_M4 = 6708 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF32_M4_MASK = 6709 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF32_M8 = 6710 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF32_M8_MASK = 6711 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF32_MF2 = 6712 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF32_MF2_MASK = 6713 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF64_M1 = 6714 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF64_M1_MASK = 6715 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF64_M2 = 6716 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF64_M2_MASK = 6717 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF64_M4 = 6718 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF64_M4_MASK = 6719 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF64_M8 = 6720 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VF64_M8_MASK = 6721 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VV_M1 = 6722 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VV_M1_MASK = 6723 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VV_M2 = 6724 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VV_M2_MASK = 6725 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VV_M4 = 6726 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VV_M4_MASK = 6727 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VV_M8 = 6728 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VV_M8_MASK = 6729 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VV_MF2 = 6730 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VV_MF2_MASK = 6731 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VV_MF4 = 6732 CEFBS_HasVInstructionsAnyF, // PseudoVMFEQ_VV_MF4_MASK = 6733 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF16_M1 = 6734 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF16_M1_MASK = 6735 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF16_M2 = 6736 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF16_M2_MASK = 6737 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF16_M4 = 6738 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF16_M4_MASK = 6739 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF16_M8 = 6740 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF16_M8_MASK = 6741 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF16_MF2 = 6742 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF16_MF2_MASK = 6743 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF16_MF4 = 6744 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF16_MF4_MASK = 6745 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF32_M1 = 6746 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF32_M1_MASK = 6747 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF32_M2 = 6748 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF32_M2_MASK = 6749 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF32_M4 = 6750 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF32_M4_MASK = 6751 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF32_M8 = 6752 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF32_M8_MASK = 6753 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF32_MF2 = 6754 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF32_MF2_MASK = 6755 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF64_M1 = 6756 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF64_M1_MASK = 6757 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF64_M2 = 6758 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF64_M2_MASK = 6759 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF64_M4 = 6760 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF64_M4_MASK = 6761 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF64_M8 = 6762 CEFBS_HasVInstructionsAnyF, // PseudoVMFGE_VF64_M8_MASK = 6763 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF16_M1 = 6764 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF16_M1_MASK = 6765 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF16_M2 = 6766 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF16_M2_MASK = 6767 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF16_M4 = 6768 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF16_M4_MASK = 6769 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF16_M8 = 6770 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF16_M8_MASK = 6771 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF16_MF2 = 6772 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF16_MF2_MASK = 6773 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF16_MF4 = 6774 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF16_MF4_MASK = 6775 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF32_M1 = 6776 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF32_M1_MASK = 6777 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF32_M2 = 6778 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF32_M2_MASK = 6779 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF32_M4 = 6780 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF32_M4_MASK = 6781 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF32_M8 = 6782 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF32_M8_MASK = 6783 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF32_MF2 = 6784 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF32_MF2_MASK = 6785 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF64_M1 = 6786 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF64_M1_MASK = 6787 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF64_M2 = 6788 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF64_M2_MASK = 6789 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF64_M4 = 6790 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF64_M4_MASK = 6791 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF64_M8 = 6792 CEFBS_HasVInstructionsAnyF, // PseudoVMFGT_VF64_M8_MASK = 6793 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF16_M1 = 6794 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF16_M1_MASK = 6795 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF16_M2 = 6796 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF16_M2_MASK = 6797 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF16_M4 = 6798 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF16_M4_MASK = 6799 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF16_M8 = 6800 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF16_M8_MASK = 6801 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF16_MF2 = 6802 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF16_MF2_MASK = 6803 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF16_MF4 = 6804 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF16_MF4_MASK = 6805 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF32_M1 = 6806 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF32_M1_MASK = 6807 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF32_M2 = 6808 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF32_M2_MASK = 6809 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF32_M4 = 6810 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF32_M4_MASK = 6811 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF32_M8 = 6812 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF32_M8_MASK = 6813 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF32_MF2 = 6814 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF32_MF2_MASK = 6815 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF64_M1 = 6816 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF64_M1_MASK = 6817 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF64_M2 = 6818 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF64_M2_MASK = 6819 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF64_M4 = 6820 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF64_M4_MASK = 6821 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF64_M8 = 6822 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VF64_M8_MASK = 6823 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VV_M1 = 6824 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VV_M1_MASK = 6825 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VV_M2 = 6826 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VV_M2_MASK = 6827 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VV_M4 = 6828 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VV_M4_MASK = 6829 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VV_M8 = 6830 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VV_M8_MASK = 6831 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VV_MF2 = 6832 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VV_MF2_MASK = 6833 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VV_MF4 = 6834 CEFBS_HasVInstructionsAnyF, // PseudoVMFLE_VV_MF4_MASK = 6835 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF16_M1 = 6836 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF16_M1_MASK = 6837 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF16_M2 = 6838 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF16_M2_MASK = 6839 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF16_M4 = 6840 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF16_M4_MASK = 6841 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF16_M8 = 6842 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF16_M8_MASK = 6843 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF16_MF2 = 6844 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF16_MF2_MASK = 6845 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF16_MF4 = 6846 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF16_MF4_MASK = 6847 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF32_M1 = 6848 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF32_M1_MASK = 6849 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF32_M2 = 6850 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF32_M2_MASK = 6851 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF32_M4 = 6852 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF32_M4_MASK = 6853 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF32_M8 = 6854 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF32_M8_MASK = 6855 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF32_MF2 = 6856 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF32_MF2_MASK = 6857 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF64_M1 = 6858 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF64_M1_MASK = 6859 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF64_M2 = 6860 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF64_M2_MASK = 6861 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF64_M4 = 6862 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF64_M4_MASK = 6863 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF64_M8 = 6864 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VF64_M8_MASK = 6865 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VV_M1 = 6866 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VV_M1_MASK = 6867 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VV_M2 = 6868 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VV_M2_MASK = 6869 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VV_M4 = 6870 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VV_M4_MASK = 6871 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VV_M8 = 6872 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VV_M8_MASK = 6873 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VV_MF2 = 6874 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VV_MF2_MASK = 6875 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VV_MF4 = 6876 CEFBS_HasVInstructionsAnyF, // PseudoVMFLT_VV_MF4_MASK = 6877 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF16_M1 = 6878 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF16_M1_MASK = 6879 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF16_M2 = 6880 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF16_M2_MASK = 6881 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF16_M4 = 6882 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF16_M4_MASK = 6883 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF16_M8 = 6884 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF16_M8_MASK = 6885 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF16_MF2 = 6886 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF16_MF2_MASK = 6887 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF16_MF4 = 6888 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF16_MF4_MASK = 6889 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF32_M1 = 6890 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF32_M1_MASK = 6891 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF32_M2 = 6892 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF32_M2_MASK = 6893 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF32_M4 = 6894 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF32_M4_MASK = 6895 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF32_M8 = 6896 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF32_M8_MASK = 6897 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF32_MF2 = 6898 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF32_MF2_MASK = 6899 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF64_M1 = 6900 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF64_M1_MASK = 6901 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF64_M2 = 6902 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF64_M2_MASK = 6903 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF64_M4 = 6904 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF64_M4_MASK = 6905 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF64_M8 = 6906 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VF64_M8_MASK = 6907 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VV_M1 = 6908 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VV_M1_MASK = 6909 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VV_M2 = 6910 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VV_M2_MASK = 6911 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VV_M4 = 6912 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VV_M4_MASK = 6913 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VV_M8 = 6914 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VV_M8_MASK = 6915 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VV_MF2 = 6916 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VV_MF2_MASK = 6917 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VV_MF4 = 6918 CEFBS_HasVInstructionsAnyF, // PseudoVMFNE_VV_MF4_MASK = 6919 CEFBS_HasVInstructions, // PseudoVMINU_VV_M1 = 6920 CEFBS_HasVInstructions, // PseudoVMINU_VV_M1_MASK = 6921 CEFBS_HasVInstructions, // PseudoVMINU_VV_M1_TU = 6922 CEFBS_HasVInstructions, // PseudoVMINU_VV_M2 = 6923 CEFBS_HasVInstructions, // PseudoVMINU_VV_M2_MASK = 6924 CEFBS_HasVInstructions, // PseudoVMINU_VV_M2_TU = 6925 CEFBS_HasVInstructions, // PseudoVMINU_VV_M4 = 6926 CEFBS_HasVInstructions, // PseudoVMINU_VV_M4_MASK = 6927 CEFBS_HasVInstructions, // PseudoVMINU_VV_M4_TU = 6928 CEFBS_HasVInstructions, // PseudoVMINU_VV_M8 = 6929 CEFBS_HasVInstructions, // PseudoVMINU_VV_M8_MASK = 6930 CEFBS_HasVInstructions, // PseudoVMINU_VV_M8_TU = 6931 CEFBS_HasVInstructions, // PseudoVMINU_VV_MF2 = 6932 CEFBS_HasVInstructions, // PseudoVMINU_VV_MF2_MASK = 6933 CEFBS_HasVInstructions, // PseudoVMINU_VV_MF2_TU = 6934 CEFBS_HasVInstructions, // PseudoVMINU_VV_MF4 = 6935 CEFBS_HasVInstructions, // PseudoVMINU_VV_MF4_MASK = 6936 CEFBS_HasVInstructions, // PseudoVMINU_VV_MF4_TU = 6937 CEFBS_HasVInstructions, // PseudoVMINU_VV_MF8 = 6938 CEFBS_HasVInstructions, // PseudoVMINU_VV_MF8_MASK = 6939 CEFBS_HasVInstructions, // PseudoVMINU_VV_MF8_TU = 6940 CEFBS_HasVInstructions, // PseudoVMINU_VX_M1 = 6941 CEFBS_HasVInstructions, // PseudoVMINU_VX_M1_MASK = 6942 CEFBS_HasVInstructions, // PseudoVMINU_VX_M1_TU = 6943 CEFBS_HasVInstructions, // PseudoVMINU_VX_M2 = 6944 CEFBS_HasVInstructions, // PseudoVMINU_VX_M2_MASK = 6945 CEFBS_HasVInstructions, // PseudoVMINU_VX_M2_TU = 6946 CEFBS_HasVInstructions, // PseudoVMINU_VX_M4 = 6947 CEFBS_HasVInstructions, // PseudoVMINU_VX_M4_MASK = 6948 CEFBS_HasVInstructions, // PseudoVMINU_VX_M4_TU = 6949 CEFBS_HasVInstructions, // PseudoVMINU_VX_M8 = 6950 CEFBS_HasVInstructions, // PseudoVMINU_VX_M8_MASK = 6951 CEFBS_HasVInstructions, // PseudoVMINU_VX_M8_TU = 6952 CEFBS_HasVInstructions, // PseudoVMINU_VX_MF2 = 6953 CEFBS_HasVInstructions, // PseudoVMINU_VX_MF2_MASK = 6954 CEFBS_HasVInstructions, // PseudoVMINU_VX_MF2_TU = 6955 CEFBS_HasVInstructions, // PseudoVMINU_VX_MF4 = 6956 CEFBS_HasVInstructions, // PseudoVMINU_VX_MF4_MASK = 6957 CEFBS_HasVInstructions, // PseudoVMINU_VX_MF4_TU = 6958 CEFBS_HasVInstructions, // PseudoVMINU_VX_MF8 = 6959 CEFBS_HasVInstructions, // PseudoVMINU_VX_MF8_MASK = 6960 CEFBS_HasVInstructions, // PseudoVMINU_VX_MF8_TU = 6961 CEFBS_HasVInstructions, // PseudoVMIN_VV_M1 = 6962 CEFBS_HasVInstructions, // PseudoVMIN_VV_M1_MASK = 6963 CEFBS_HasVInstructions, // PseudoVMIN_VV_M1_TU = 6964 CEFBS_HasVInstructions, // PseudoVMIN_VV_M2 = 6965 CEFBS_HasVInstructions, // PseudoVMIN_VV_M2_MASK = 6966 CEFBS_HasVInstructions, // PseudoVMIN_VV_M2_TU = 6967 CEFBS_HasVInstructions, // PseudoVMIN_VV_M4 = 6968 CEFBS_HasVInstructions, // PseudoVMIN_VV_M4_MASK = 6969 CEFBS_HasVInstructions, // PseudoVMIN_VV_M4_TU = 6970 CEFBS_HasVInstructions, // PseudoVMIN_VV_M8 = 6971 CEFBS_HasVInstructions, // PseudoVMIN_VV_M8_MASK = 6972 CEFBS_HasVInstructions, // PseudoVMIN_VV_M8_TU = 6973 CEFBS_HasVInstructions, // PseudoVMIN_VV_MF2 = 6974 CEFBS_HasVInstructions, // PseudoVMIN_VV_MF2_MASK = 6975 CEFBS_HasVInstructions, // PseudoVMIN_VV_MF2_TU = 6976 CEFBS_HasVInstructions, // PseudoVMIN_VV_MF4 = 6977 CEFBS_HasVInstructions, // PseudoVMIN_VV_MF4_MASK = 6978 CEFBS_HasVInstructions, // PseudoVMIN_VV_MF4_TU = 6979 CEFBS_HasVInstructions, // PseudoVMIN_VV_MF8 = 6980 CEFBS_HasVInstructions, // PseudoVMIN_VV_MF8_MASK = 6981 CEFBS_HasVInstructions, // PseudoVMIN_VV_MF8_TU = 6982 CEFBS_HasVInstructions, // PseudoVMIN_VX_M1 = 6983 CEFBS_HasVInstructions, // PseudoVMIN_VX_M1_MASK = 6984 CEFBS_HasVInstructions, // PseudoVMIN_VX_M1_TU = 6985 CEFBS_HasVInstructions, // PseudoVMIN_VX_M2 = 6986 CEFBS_HasVInstructions, // PseudoVMIN_VX_M2_MASK = 6987 CEFBS_HasVInstructions, // PseudoVMIN_VX_M2_TU = 6988 CEFBS_HasVInstructions, // PseudoVMIN_VX_M4 = 6989 CEFBS_HasVInstructions, // PseudoVMIN_VX_M4_MASK = 6990 CEFBS_HasVInstructions, // PseudoVMIN_VX_M4_TU = 6991 CEFBS_HasVInstructions, // PseudoVMIN_VX_M8 = 6992 CEFBS_HasVInstructions, // PseudoVMIN_VX_M8_MASK = 6993 CEFBS_HasVInstructions, // PseudoVMIN_VX_M8_TU = 6994 CEFBS_HasVInstructions, // PseudoVMIN_VX_MF2 = 6995 CEFBS_HasVInstructions, // PseudoVMIN_VX_MF2_MASK = 6996 CEFBS_HasVInstructions, // PseudoVMIN_VX_MF2_TU = 6997 CEFBS_HasVInstructions, // PseudoVMIN_VX_MF4 = 6998 CEFBS_HasVInstructions, // PseudoVMIN_VX_MF4_MASK = 6999 CEFBS_HasVInstructions, // PseudoVMIN_VX_MF4_TU = 7000 CEFBS_HasVInstructions, // PseudoVMIN_VX_MF8 = 7001 CEFBS_HasVInstructions, // PseudoVMIN_VX_MF8_MASK = 7002 CEFBS_HasVInstructions, // PseudoVMIN_VX_MF8_TU = 7003 CEFBS_None, // PseudoVMNAND_MM_M1 = 7004 CEFBS_None, // PseudoVMNAND_MM_M2 = 7005 CEFBS_None, // PseudoVMNAND_MM_M4 = 7006 CEFBS_None, // PseudoVMNAND_MM_M8 = 7007 CEFBS_None, // PseudoVMNAND_MM_MF2 = 7008 CEFBS_None, // PseudoVMNAND_MM_MF4 = 7009 CEFBS_None, // PseudoVMNAND_MM_MF8 = 7010 CEFBS_None, // PseudoVMNOR_MM_M1 = 7011 CEFBS_None, // PseudoVMNOR_MM_M2 = 7012 CEFBS_None, // PseudoVMNOR_MM_M4 = 7013 CEFBS_None, // PseudoVMNOR_MM_M8 = 7014 CEFBS_None, // PseudoVMNOR_MM_MF2 = 7015 CEFBS_None, // PseudoVMNOR_MM_MF4 = 7016 CEFBS_None, // PseudoVMNOR_MM_MF8 = 7017 CEFBS_None, // PseudoVMORN_MM_M1 = 7018 CEFBS_None, // PseudoVMORN_MM_M2 = 7019 CEFBS_None, // PseudoVMORN_MM_M4 = 7020 CEFBS_None, // PseudoVMORN_MM_M8 = 7021 CEFBS_None, // PseudoVMORN_MM_MF2 = 7022 CEFBS_None, // PseudoVMORN_MM_MF4 = 7023 CEFBS_None, // PseudoVMORN_MM_MF8 = 7024 CEFBS_None, // PseudoVMOR_MM_M1 = 7025 CEFBS_None, // PseudoVMOR_MM_M2 = 7026 CEFBS_None, // PseudoVMOR_MM_M4 = 7027 CEFBS_None, // PseudoVMOR_MM_M8 = 7028 CEFBS_None, // PseudoVMOR_MM_MF2 = 7029 CEFBS_None, // PseudoVMOR_MM_MF4 = 7030 CEFBS_None, // PseudoVMOR_MM_MF8 = 7031 CEFBS_HasVInstructions, // PseudoVMSBC_VVM_M1 = 7032 CEFBS_HasVInstructions, // PseudoVMSBC_VVM_M2 = 7033 CEFBS_HasVInstructions, // PseudoVMSBC_VVM_M4 = 7034 CEFBS_HasVInstructions, // PseudoVMSBC_VVM_M8 = 7035 CEFBS_HasVInstructions, // PseudoVMSBC_VVM_MF2 = 7036 CEFBS_HasVInstructions, // PseudoVMSBC_VVM_MF4 = 7037 CEFBS_HasVInstructions, // PseudoVMSBC_VVM_MF8 = 7038 CEFBS_HasVInstructions, // PseudoVMSBC_VV_M1 = 7039 CEFBS_HasVInstructions, // PseudoVMSBC_VV_M2 = 7040 CEFBS_HasVInstructions, // PseudoVMSBC_VV_M4 = 7041 CEFBS_HasVInstructions, // PseudoVMSBC_VV_M8 = 7042 CEFBS_HasVInstructions, // PseudoVMSBC_VV_MF2 = 7043 CEFBS_HasVInstructions, // PseudoVMSBC_VV_MF4 = 7044 CEFBS_HasVInstructions, // PseudoVMSBC_VV_MF8 = 7045 CEFBS_HasVInstructions, // PseudoVMSBC_VXM_M1 = 7046 CEFBS_HasVInstructions, // PseudoVMSBC_VXM_M2 = 7047 CEFBS_HasVInstructions, // PseudoVMSBC_VXM_M4 = 7048 CEFBS_HasVInstructions, // PseudoVMSBC_VXM_M8 = 7049 CEFBS_HasVInstructions, // PseudoVMSBC_VXM_MF2 = 7050 CEFBS_HasVInstructions, // PseudoVMSBC_VXM_MF4 = 7051 CEFBS_HasVInstructions, // PseudoVMSBC_VXM_MF8 = 7052 CEFBS_HasVInstructions, // PseudoVMSBC_VX_M1 = 7053 CEFBS_HasVInstructions, // PseudoVMSBC_VX_M2 = 7054 CEFBS_HasVInstructions, // PseudoVMSBC_VX_M4 = 7055 CEFBS_HasVInstructions, // PseudoVMSBC_VX_M8 = 7056 CEFBS_HasVInstructions, // PseudoVMSBC_VX_MF2 = 7057 CEFBS_HasVInstructions, // PseudoVMSBC_VX_MF4 = 7058 CEFBS_HasVInstructions, // PseudoVMSBC_VX_MF8 = 7059 CEFBS_None, // PseudoVMSBF_M_B1 = 7060 CEFBS_None, // PseudoVMSBF_M_B16 = 7061 CEFBS_None, // PseudoVMSBF_M_B16_MASK = 7062 CEFBS_None, // PseudoVMSBF_M_B1_MASK = 7063 CEFBS_None, // PseudoVMSBF_M_B2 = 7064 CEFBS_None, // PseudoVMSBF_M_B2_MASK = 7065 CEFBS_None, // PseudoVMSBF_M_B32 = 7066 CEFBS_None, // PseudoVMSBF_M_B32_MASK = 7067 CEFBS_None, // PseudoVMSBF_M_B4 = 7068 CEFBS_None, // PseudoVMSBF_M_B4_MASK = 7069 CEFBS_None, // PseudoVMSBF_M_B64 = 7070 CEFBS_None, // PseudoVMSBF_M_B64_MASK = 7071 CEFBS_None, // PseudoVMSBF_M_B8 = 7072 CEFBS_None, // PseudoVMSBF_M_B8_MASK = 7073 CEFBS_HasVInstructions, // PseudoVMSEQ_VI_M1 = 7074 CEFBS_HasVInstructions, // PseudoVMSEQ_VI_M1_MASK = 7075 CEFBS_HasVInstructions, // PseudoVMSEQ_VI_M2 = 7076 CEFBS_HasVInstructions, // PseudoVMSEQ_VI_M2_MASK = 7077 CEFBS_HasVInstructions, // PseudoVMSEQ_VI_M4 = 7078 CEFBS_HasVInstructions, // PseudoVMSEQ_VI_M4_MASK = 7079 CEFBS_HasVInstructions, // PseudoVMSEQ_VI_M8 = 7080 CEFBS_HasVInstructions, // PseudoVMSEQ_VI_M8_MASK = 7081 CEFBS_HasVInstructions, // PseudoVMSEQ_VI_MF2 = 7082 CEFBS_HasVInstructions, // PseudoVMSEQ_VI_MF2_MASK = 7083 CEFBS_HasVInstructions, // PseudoVMSEQ_VI_MF4 = 7084 CEFBS_HasVInstructions, // PseudoVMSEQ_VI_MF4_MASK = 7085 CEFBS_HasVInstructions, // PseudoVMSEQ_VI_MF8 = 7086 CEFBS_HasVInstructions, // PseudoVMSEQ_VI_MF8_MASK = 7087 CEFBS_HasVInstructions, // PseudoVMSEQ_VV_M1 = 7088 CEFBS_HasVInstructions, // PseudoVMSEQ_VV_M1_MASK = 7089 CEFBS_HasVInstructions, // PseudoVMSEQ_VV_M2 = 7090 CEFBS_HasVInstructions, // PseudoVMSEQ_VV_M2_MASK = 7091 CEFBS_HasVInstructions, // PseudoVMSEQ_VV_M4 = 7092 CEFBS_HasVInstructions, // PseudoVMSEQ_VV_M4_MASK = 7093 CEFBS_HasVInstructions, // PseudoVMSEQ_VV_M8 = 7094 CEFBS_HasVInstructions, // PseudoVMSEQ_VV_M8_MASK = 7095 CEFBS_HasVInstructions, // PseudoVMSEQ_VV_MF2 = 7096 CEFBS_HasVInstructions, // PseudoVMSEQ_VV_MF2_MASK = 7097 CEFBS_HasVInstructions, // PseudoVMSEQ_VV_MF4 = 7098 CEFBS_HasVInstructions, // PseudoVMSEQ_VV_MF4_MASK = 7099 CEFBS_HasVInstructions, // PseudoVMSEQ_VV_MF8 = 7100 CEFBS_HasVInstructions, // PseudoVMSEQ_VV_MF8_MASK = 7101 CEFBS_HasVInstructions, // PseudoVMSEQ_VX_M1 = 7102 CEFBS_HasVInstructions, // PseudoVMSEQ_VX_M1_MASK = 7103 CEFBS_HasVInstructions, // PseudoVMSEQ_VX_M2 = 7104 CEFBS_HasVInstructions, // PseudoVMSEQ_VX_M2_MASK = 7105 CEFBS_HasVInstructions, // PseudoVMSEQ_VX_M4 = 7106 CEFBS_HasVInstructions, // PseudoVMSEQ_VX_M4_MASK = 7107 CEFBS_HasVInstructions, // PseudoVMSEQ_VX_M8 = 7108 CEFBS_HasVInstructions, // PseudoVMSEQ_VX_M8_MASK = 7109 CEFBS_HasVInstructions, // PseudoVMSEQ_VX_MF2 = 7110 CEFBS_HasVInstructions, // PseudoVMSEQ_VX_MF2_MASK = 7111 CEFBS_HasVInstructions, // PseudoVMSEQ_VX_MF4 = 7112 CEFBS_HasVInstructions, // PseudoVMSEQ_VX_MF4_MASK = 7113 CEFBS_HasVInstructions, // PseudoVMSEQ_VX_MF8 = 7114 CEFBS_HasVInstructions, // PseudoVMSEQ_VX_MF8_MASK = 7115 CEFBS_None, // PseudoVMSET_M_B1 = 7116 CEFBS_None, // PseudoVMSET_M_B16 = 7117 CEFBS_None, // PseudoVMSET_M_B2 = 7118 CEFBS_None, // PseudoVMSET_M_B32 = 7119 CEFBS_None, // PseudoVMSET_M_B4 = 7120 CEFBS_None, // PseudoVMSET_M_B64 = 7121 CEFBS_None, // PseudoVMSET_M_B8 = 7122 CEFBS_HasVInstructions, // PseudoVMSGEU_VI = 7123 CEFBS_HasVInstructions, // PseudoVMSGEU_VX = 7124 CEFBS_HasVInstructions, // PseudoVMSGEU_VX_M = 7125 CEFBS_HasVInstructions, // PseudoVMSGEU_VX_M_T = 7126 CEFBS_HasVInstructions, // PseudoVMSGE_VI = 7127 CEFBS_HasVInstructions, // PseudoVMSGE_VX = 7128 CEFBS_HasVInstructions, // PseudoVMSGE_VX_M = 7129 CEFBS_HasVInstructions, // PseudoVMSGE_VX_M_T = 7130 CEFBS_HasVInstructions, // PseudoVMSGTU_VI_M1 = 7131 CEFBS_HasVInstructions, // PseudoVMSGTU_VI_M1_MASK = 7132 CEFBS_HasVInstructions, // PseudoVMSGTU_VI_M2 = 7133 CEFBS_HasVInstructions, // PseudoVMSGTU_VI_M2_MASK = 7134 CEFBS_HasVInstructions, // PseudoVMSGTU_VI_M4 = 7135 CEFBS_HasVInstructions, // PseudoVMSGTU_VI_M4_MASK = 7136 CEFBS_HasVInstructions, // PseudoVMSGTU_VI_M8 = 7137 CEFBS_HasVInstructions, // PseudoVMSGTU_VI_M8_MASK = 7138 CEFBS_HasVInstructions, // PseudoVMSGTU_VI_MF2 = 7139 CEFBS_HasVInstructions, // PseudoVMSGTU_VI_MF2_MASK = 7140 CEFBS_HasVInstructions, // PseudoVMSGTU_VI_MF4 = 7141 CEFBS_HasVInstructions, // PseudoVMSGTU_VI_MF4_MASK = 7142 CEFBS_HasVInstructions, // PseudoVMSGTU_VI_MF8 = 7143 CEFBS_HasVInstructions, // PseudoVMSGTU_VI_MF8_MASK = 7144 CEFBS_HasVInstructions, // PseudoVMSGTU_VX_M1 = 7145 CEFBS_HasVInstructions, // PseudoVMSGTU_VX_M1_MASK = 7146 CEFBS_HasVInstructions, // PseudoVMSGTU_VX_M2 = 7147 CEFBS_HasVInstructions, // PseudoVMSGTU_VX_M2_MASK = 7148 CEFBS_HasVInstructions, // PseudoVMSGTU_VX_M4 = 7149 CEFBS_HasVInstructions, // PseudoVMSGTU_VX_M4_MASK = 7150 CEFBS_HasVInstructions, // PseudoVMSGTU_VX_M8 = 7151 CEFBS_HasVInstructions, // PseudoVMSGTU_VX_M8_MASK = 7152 CEFBS_HasVInstructions, // PseudoVMSGTU_VX_MF2 = 7153 CEFBS_HasVInstructions, // PseudoVMSGTU_VX_MF2_MASK = 7154 CEFBS_HasVInstructions, // PseudoVMSGTU_VX_MF4 = 7155 CEFBS_HasVInstructions, // PseudoVMSGTU_VX_MF4_MASK = 7156 CEFBS_HasVInstructions, // PseudoVMSGTU_VX_MF8 = 7157 CEFBS_HasVInstructions, // PseudoVMSGTU_VX_MF8_MASK = 7158 CEFBS_HasVInstructions, // PseudoVMSGT_VI_M1 = 7159 CEFBS_HasVInstructions, // PseudoVMSGT_VI_M1_MASK = 7160 CEFBS_HasVInstructions, // PseudoVMSGT_VI_M2 = 7161 CEFBS_HasVInstructions, // PseudoVMSGT_VI_M2_MASK = 7162 CEFBS_HasVInstructions, // PseudoVMSGT_VI_M4 = 7163 CEFBS_HasVInstructions, // PseudoVMSGT_VI_M4_MASK = 7164 CEFBS_HasVInstructions, // PseudoVMSGT_VI_M8 = 7165 CEFBS_HasVInstructions, // PseudoVMSGT_VI_M8_MASK = 7166 CEFBS_HasVInstructions, // PseudoVMSGT_VI_MF2 = 7167 CEFBS_HasVInstructions, // PseudoVMSGT_VI_MF2_MASK = 7168 CEFBS_HasVInstructions, // PseudoVMSGT_VI_MF4 = 7169 CEFBS_HasVInstructions, // PseudoVMSGT_VI_MF4_MASK = 7170 CEFBS_HasVInstructions, // PseudoVMSGT_VI_MF8 = 7171 CEFBS_HasVInstructions, // PseudoVMSGT_VI_MF8_MASK = 7172 CEFBS_HasVInstructions, // PseudoVMSGT_VX_M1 = 7173 CEFBS_HasVInstructions, // PseudoVMSGT_VX_M1_MASK = 7174 CEFBS_HasVInstructions, // PseudoVMSGT_VX_M2 = 7175 CEFBS_HasVInstructions, // PseudoVMSGT_VX_M2_MASK = 7176 CEFBS_HasVInstructions, // PseudoVMSGT_VX_M4 = 7177 CEFBS_HasVInstructions, // PseudoVMSGT_VX_M4_MASK = 7178 CEFBS_HasVInstructions, // PseudoVMSGT_VX_M8 = 7179 CEFBS_HasVInstructions, // PseudoVMSGT_VX_M8_MASK = 7180 CEFBS_HasVInstructions, // PseudoVMSGT_VX_MF2 = 7181 CEFBS_HasVInstructions, // PseudoVMSGT_VX_MF2_MASK = 7182 CEFBS_HasVInstructions, // PseudoVMSGT_VX_MF4 = 7183 CEFBS_HasVInstructions, // PseudoVMSGT_VX_MF4_MASK = 7184 CEFBS_HasVInstructions, // PseudoVMSGT_VX_MF8 = 7185 CEFBS_HasVInstructions, // PseudoVMSGT_VX_MF8_MASK = 7186 CEFBS_None, // PseudoVMSIF_M_B1 = 7187 CEFBS_None, // PseudoVMSIF_M_B16 = 7188 CEFBS_None, // PseudoVMSIF_M_B16_MASK = 7189 CEFBS_None, // PseudoVMSIF_M_B1_MASK = 7190 CEFBS_None, // PseudoVMSIF_M_B2 = 7191 CEFBS_None, // PseudoVMSIF_M_B2_MASK = 7192 CEFBS_None, // PseudoVMSIF_M_B32 = 7193 CEFBS_None, // PseudoVMSIF_M_B32_MASK = 7194 CEFBS_None, // PseudoVMSIF_M_B4 = 7195 CEFBS_None, // PseudoVMSIF_M_B4_MASK = 7196 CEFBS_None, // PseudoVMSIF_M_B64 = 7197 CEFBS_None, // PseudoVMSIF_M_B64_MASK = 7198 CEFBS_None, // PseudoVMSIF_M_B8 = 7199 CEFBS_None, // PseudoVMSIF_M_B8_MASK = 7200 CEFBS_HasVInstructions, // PseudoVMSLEU_VI_M1 = 7201 CEFBS_HasVInstructions, // PseudoVMSLEU_VI_M1_MASK = 7202 CEFBS_HasVInstructions, // PseudoVMSLEU_VI_M2 = 7203 CEFBS_HasVInstructions, // PseudoVMSLEU_VI_M2_MASK = 7204 CEFBS_HasVInstructions, // PseudoVMSLEU_VI_M4 = 7205 CEFBS_HasVInstructions, // PseudoVMSLEU_VI_M4_MASK = 7206 CEFBS_HasVInstructions, // PseudoVMSLEU_VI_M8 = 7207 CEFBS_HasVInstructions, // PseudoVMSLEU_VI_M8_MASK = 7208 CEFBS_HasVInstructions, // PseudoVMSLEU_VI_MF2 = 7209 CEFBS_HasVInstructions, // PseudoVMSLEU_VI_MF2_MASK = 7210 CEFBS_HasVInstructions, // PseudoVMSLEU_VI_MF4 = 7211 CEFBS_HasVInstructions, // PseudoVMSLEU_VI_MF4_MASK = 7212 CEFBS_HasVInstructions, // PseudoVMSLEU_VI_MF8 = 7213 CEFBS_HasVInstructions, // PseudoVMSLEU_VI_MF8_MASK = 7214 CEFBS_HasVInstructions, // PseudoVMSLEU_VV_M1 = 7215 CEFBS_HasVInstructions, // PseudoVMSLEU_VV_M1_MASK = 7216 CEFBS_HasVInstructions, // PseudoVMSLEU_VV_M2 = 7217 CEFBS_HasVInstructions, // PseudoVMSLEU_VV_M2_MASK = 7218 CEFBS_HasVInstructions, // PseudoVMSLEU_VV_M4 = 7219 CEFBS_HasVInstructions, // PseudoVMSLEU_VV_M4_MASK = 7220 CEFBS_HasVInstructions, // PseudoVMSLEU_VV_M8 = 7221 CEFBS_HasVInstructions, // PseudoVMSLEU_VV_M8_MASK = 7222 CEFBS_HasVInstructions, // PseudoVMSLEU_VV_MF2 = 7223 CEFBS_HasVInstructions, // PseudoVMSLEU_VV_MF2_MASK = 7224 CEFBS_HasVInstructions, // PseudoVMSLEU_VV_MF4 = 7225 CEFBS_HasVInstructions, // PseudoVMSLEU_VV_MF4_MASK = 7226 CEFBS_HasVInstructions, // PseudoVMSLEU_VV_MF8 = 7227 CEFBS_HasVInstructions, // PseudoVMSLEU_VV_MF8_MASK = 7228 CEFBS_HasVInstructions, // PseudoVMSLEU_VX_M1 = 7229 CEFBS_HasVInstructions, // PseudoVMSLEU_VX_M1_MASK = 7230 CEFBS_HasVInstructions, // PseudoVMSLEU_VX_M2 = 7231 CEFBS_HasVInstructions, // PseudoVMSLEU_VX_M2_MASK = 7232 CEFBS_HasVInstructions, // PseudoVMSLEU_VX_M4 = 7233 CEFBS_HasVInstructions, // PseudoVMSLEU_VX_M4_MASK = 7234 CEFBS_HasVInstructions, // PseudoVMSLEU_VX_M8 = 7235 CEFBS_HasVInstructions, // PseudoVMSLEU_VX_M8_MASK = 7236 CEFBS_HasVInstructions, // PseudoVMSLEU_VX_MF2 = 7237 CEFBS_HasVInstructions, // PseudoVMSLEU_VX_MF2_MASK = 7238 CEFBS_HasVInstructions, // PseudoVMSLEU_VX_MF4 = 7239 CEFBS_HasVInstructions, // PseudoVMSLEU_VX_MF4_MASK = 7240 CEFBS_HasVInstructions, // PseudoVMSLEU_VX_MF8 = 7241 CEFBS_HasVInstructions, // PseudoVMSLEU_VX_MF8_MASK = 7242 CEFBS_HasVInstructions, // PseudoVMSLE_VI_M1 = 7243 CEFBS_HasVInstructions, // PseudoVMSLE_VI_M1_MASK = 7244 CEFBS_HasVInstructions, // PseudoVMSLE_VI_M2 = 7245 CEFBS_HasVInstructions, // PseudoVMSLE_VI_M2_MASK = 7246 CEFBS_HasVInstructions, // PseudoVMSLE_VI_M4 = 7247 CEFBS_HasVInstructions, // PseudoVMSLE_VI_M4_MASK = 7248 CEFBS_HasVInstructions, // PseudoVMSLE_VI_M8 = 7249 CEFBS_HasVInstructions, // PseudoVMSLE_VI_M8_MASK = 7250 CEFBS_HasVInstructions, // PseudoVMSLE_VI_MF2 = 7251 CEFBS_HasVInstructions, // PseudoVMSLE_VI_MF2_MASK = 7252 CEFBS_HasVInstructions, // PseudoVMSLE_VI_MF4 = 7253 CEFBS_HasVInstructions, // PseudoVMSLE_VI_MF4_MASK = 7254 CEFBS_HasVInstructions, // PseudoVMSLE_VI_MF8 = 7255 CEFBS_HasVInstructions, // PseudoVMSLE_VI_MF8_MASK = 7256 CEFBS_HasVInstructions, // PseudoVMSLE_VV_M1 = 7257 CEFBS_HasVInstructions, // PseudoVMSLE_VV_M1_MASK = 7258 CEFBS_HasVInstructions, // PseudoVMSLE_VV_M2 = 7259 CEFBS_HasVInstructions, // PseudoVMSLE_VV_M2_MASK = 7260 CEFBS_HasVInstructions, // PseudoVMSLE_VV_M4 = 7261 CEFBS_HasVInstructions, // PseudoVMSLE_VV_M4_MASK = 7262 CEFBS_HasVInstructions, // PseudoVMSLE_VV_M8 = 7263 CEFBS_HasVInstructions, // PseudoVMSLE_VV_M8_MASK = 7264 CEFBS_HasVInstructions, // PseudoVMSLE_VV_MF2 = 7265 CEFBS_HasVInstructions, // PseudoVMSLE_VV_MF2_MASK = 7266 CEFBS_HasVInstructions, // PseudoVMSLE_VV_MF4 = 7267 CEFBS_HasVInstructions, // PseudoVMSLE_VV_MF4_MASK = 7268 CEFBS_HasVInstructions, // PseudoVMSLE_VV_MF8 = 7269 CEFBS_HasVInstructions, // PseudoVMSLE_VV_MF8_MASK = 7270 CEFBS_HasVInstructions, // PseudoVMSLE_VX_M1 = 7271 CEFBS_HasVInstructions, // PseudoVMSLE_VX_M1_MASK = 7272 CEFBS_HasVInstructions, // PseudoVMSLE_VX_M2 = 7273 CEFBS_HasVInstructions, // PseudoVMSLE_VX_M2_MASK = 7274 CEFBS_HasVInstructions, // PseudoVMSLE_VX_M4 = 7275 CEFBS_HasVInstructions, // PseudoVMSLE_VX_M4_MASK = 7276 CEFBS_HasVInstructions, // PseudoVMSLE_VX_M8 = 7277 CEFBS_HasVInstructions, // PseudoVMSLE_VX_M8_MASK = 7278 CEFBS_HasVInstructions, // PseudoVMSLE_VX_MF2 = 7279 CEFBS_HasVInstructions, // PseudoVMSLE_VX_MF2_MASK = 7280 CEFBS_HasVInstructions, // PseudoVMSLE_VX_MF4 = 7281 CEFBS_HasVInstructions, // PseudoVMSLE_VX_MF4_MASK = 7282 CEFBS_HasVInstructions, // PseudoVMSLE_VX_MF8 = 7283 CEFBS_HasVInstructions, // PseudoVMSLE_VX_MF8_MASK = 7284 CEFBS_HasVInstructions, // PseudoVMSLTU_VI = 7285 CEFBS_HasVInstructions, // PseudoVMSLTU_VV_M1 = 7286 CEFBS_HasVInstructions, // PseudoVMSLTU_VV_M1_MASK = 7287 CEFBS_HasVInstructions, // PseudoVMSLTU_VV_M2 = 7288 CEFBS_HasVInstructions, // PseudoVMSLTU_VV_M2_MASK = 7289 CEFBS_HasVInstructions, // PseudoVMSLTU_VV_M4 = 7290 CEFBS_HasVInstructions, // PseudoVMSLTU_VV_M4_MASK = 7291 CEFBS_HasVInstructions, // PseudoVMSLTU_VV_M8 = 7292 CEFBS_HasVInstructions, // PseudoVMSLTU_VV_M8_MASK = 7293 CEFBS_HasVInstructions, // PseudoVMSLTU_VV_MF2 = 7294 CEFBS_HasVInstructions, // PseudoVMSLTU_VV_MF2_MASK = 7295 CEFBS_HasVInstructions, // PseudoVMSLTU_VV_MF4 = 7296 CEFBS_HasVInstructions, // PseudoVMSLTU_VV_MF4_MASK = 7297 CEFBS_HasVInstructions, // PseudoVMSLTU_VV_MF8 = 7298 CEFBS_HasVInstructions, // PseudoVMSLTU_VV_MF8_MASK = 7299 CEFBS_HasVInstructions, // PseudoVMSLTU_VX_M1 = 7300 CEFBS_HasVInstructions, // PseudoVMSLTU_VX_M1_MASK = 7301 CEFBS_HasVInstructions, // PseudoVMSLTU_VX_M2 = 7302 CEFBS_HasVInstructions, // PseudoVMSLTU_VX_M2_MASK = 7303 CEFBS_HasVInstructions, // PseudoVMSLTU_VX_M4 = 7304 CEFBS_HasVInstructions, // PseudoVMSLTU_VX_M4_MASK = 7305 CEFBS_HasVInstructions, // PseudoVMSLTU_VX_M8 = 7306 CEFBS_HasVInstructions, // PseudoVMSLTU_VX_M8_MASK = 7307 CEFBS_HasVInstructions, // PseudoVMSLTU_VX_MF2 = 7308 CEFBS_HasVInstructions, // PseudoVMSLTU_VX_MF2_MASK = 7309 CEFBS_HasVInstructions, // PseudoVMSLTU_VX_MF4 = 7310 CEFBS_HasVInstructions, // PseudoVMSLTU_VX_MF4_MASK = 7311 CEFBS_HasVInstructions, // PseudoVMSLTU_VX_MF8 = 7312 CEFBS_HasVInstructions, // PseudoVMSLTU_VX_MF8_MASK = 7313 CEFBS_HasVInstructions, // PseudoVMSLT_VI = 7314 CEFBS_HasVInstructions, // PseudoVMSLT_VV_M1 = 7315 CEFBS_HasVInstructions, // PseudoVMSLT_VV_M1_MASK = 7316 CEFBS_HasVInstructions, // PseudoVMSLT_VV_M2 = 7317 CEFBS_HasVInstructions, // PseudoVMSLT_VV_M2_MASK = 7318 CEFBS_HasVInstructions, // PseudoVMSLT_VV_M4 = 7319 CEFBS_HasVInstructions, // PseudoVMSLT_VV_M4_MASK = 7320 CEFBS_HasVInstructions, // PseudoVMSLT_VV_M8 = 7321 CEFBS_HasVInstructions, // PseudoVMSLT_VV_M8_MASK = 7322 CEFBS_HasVInstructions, // PseudoVMSLT_VV_MF2 = 7323 CEFBS_HasVInstructions, // PseudoVMSLT_VV_MF2_MASK = 7324 CEFBS_HasVInstructions, // PseudoVMSLT_VV_MF4 = 7325 CEFBS_HasVInstructions, // PseudoVMSLT_VV_MF4_MASK = 7326 CEFBS_HasVInstructions, // PseudoVMSLT_VV_MF8 = 7327 CEFBS_HasVInstructions, // PseudoVMSLT_VV_MF8_MASK = 7328 CEFBS_HasVInstructions, // PseudoVMSLT_VX_M1 = 7329 CEFBS_HasVInstructions, // PseudoVMSLT_VX_M1_MASK = 7330 CEFBS_HasVInstructions, // PseudoVMSLT_VX_M2 = 7331 CEFBS_HasVInstructions, // PseudoVMSLT_VX_M2_MASK = 7332 CEFBS_HasVInstructions, // PseudoVMSLT_VX_M4 = 7333 CEFBS_HasVInstructions, // PseudoVMSLT_VX_M4_MASK = 7334 CEFBS_HasVInstructions, // PseudoVMSLT_VX_M8 = 7335 CEFBS_HasVInstructions, // PseudoVMSLT_VX_M8_MASK = 7336 CEFBS_HasVInstructions, // PseudoVMSLT_VX_MF2 = 7337 CEFBS_HasVInstructions, // PseudoVMSLT_VX_MF2_MASK = 7338 CEFBS_HasVInstructions, // PseudoVMSLT_VX_MF4 = 7339 CEFBS_HasVInstructions, // PseudoVMSLT_VX_MF4_MASK = 7340 CEFBS_HasVInstructions, // PseudoVMSLT_VX_MF8 = 7341 CEFBS_HasVInstructions, // PseudoVMSLT_VX_MF8_MASK = 7342 CEFBS_HasVInstructions, // PseudoVMSNE_VI_M1 = 7343 CEFBS_HasVInstructions, // PseudoVMSNE_VI_M1_MASK = 7344 CEFBS_HasVInstructions, // PseudoVMSNE_VI_M2 = 7345 CEFBS_HasVInstructions, // PseudoVMSNE_VI_M2_MASK = 7346 CEFBS_HasVInstructions, // PseudoVMSNE_VI_M4 = 7347 CEFBS_HasVInstructions, // PseudoVMSNE_VI_M4_MASK = 7348 CEFBS_HasVInstructions, // PseudoVMSNE_VI_M8 = 7349 CEFBS_HasVInstructions, // PseudoVMSNE_VI_M8_MASK = 7350 CEFBS_HasVInstructions, // PseudoVMSNE_VI_MF2 = 7351 CEFBS_HasVInstructions, // PseudoVMSNE_VI_MF2_MASK = 7352 CEFBS_HasVInstructions, // PseudoVMSNE_VI_MF4 = 7353 CEFBS_HasVInstructions, // PseudoVMSNE_VI_MF4_MASK = 7354 CEFBS_HasVInstructions, // PseudoVMSNE_VI_MF8 = 7355 CEFBS_HasVInstructions, // PseudoVMSNE_VI_MF8_MASK = 7356 CEFBS_HasVInstructions, // PseudoVMSNE_VV_M1 = 7357 CEFBS_HasVInstructions, // PseudoVMSNE_VV_M1_MASK = 7358 CEFBS_HasVInstructions, // PseudoVMSNE_VV_M2 = 7359 CEFBS_HasVInstructions, // PseudoVMSNE_VV_M2_MASK = 7360 CEFBS_HasVInstructions, // PseudoVMSNE_VV_M4 = 7361 CEFBS_HasVInstructions, // PseudoVMSNE_VV_M4_MASK = 7362 CEFBS_HasVInstructions, // PseudoVMSNE_VV_M8 = 7363 CEFBS_HasVInstructions, // PseudoVMSNE_VV_M8_MASK = 7364 CEFBS_HasVInstructions, // PseudoVMSNE_VV_MF2 = 7365 CEFBS_HasVInstructions, // PseudoVMSNE_VV_MF2_MASK = 7366 CEFBS_HasVInstructions, // PseudoVMSNE_VV_MF4 = 7367 CEFBS_HasVInstructions, // PseudoVMSNE_VV_MF4_MASK = 7368 CEFBS_HasVInstructions, // PseudoVMSNE_VV_MF8 = 7369 CEFBS_HasVInstructions, // PseudoVMSNE_VV_MF8_MASK = 7370 CEFBS_HasVInstructions, // PseudoVMSNE_VX_M1 = 7371 CEFBS_HasVInstructions, // PseudoVMSNE_VX_M1_MASK = 7372 CEFBS_HasVInstructions, // PseudoVMSNE_VX_M2 = 7373 CEFBS_HasVInstructions, // PseudoVMSNE_VX_M2_MASK = 7374 CEFBS_HasVInstructions, // PseudoVMSNE_VX_M4 = 7375 CEFBS_HasVInstructions, // PseudoVMSNE_VX_M4_MASK = 7376 CEFBS_HasVInstructions, // PseudoVMSNE_VX_M8 = 7377 CEFBS_HasVInstructions, // PseudoVMSNE_VX_M8_MASK = 7378 CEFBS_HasVInstructions, // PseudoVMSNE_VX_MF2 = 7379 CEFBS_HasVInstructions, // PseudoVMSNE_VX_MF2_MASK = 7380 CEFBS_HasVInstructions, // PseudoVMSNE_VX_MF4 = 7381 CEFBS_HasVInstructions, // PseudoVMSNE_VX_MF4_MASK = 7382 CEFBS_HasVInstructions, // PseudoVMSNE_VX_MF8 = 7383 CEFBS_HasVInstructions, // PseudoVMSNE_VX_MF8_MASK = 7384 CEFBS_None, // PseudoVMSOF_M_B1 = 7385 CEFBS_None, // PseudoVMSOF_M_B16 = 7386 CEFBS_None, // PseudoVMSOF_M_B16_MASK = 7387 CEFBS_None, // PseudoVMSOF_M_B1_MASK = 7388 CEFBS_None, // PseudoVMSOF_M_B2 = 7389 CEFBS_None, // PseudoVMSOF_M_B2_MASK = 7390 CEFBS_None, // PseudoVMSOF_M_B32 = 7391 CEFBS_None, // PseudoVMSOF_M_B32_MASK = 7392 CEFBS_None, // PseudoVMSOF_M_B4 = 7393 CEFBS_None, // PseudoVMSOF_M_B4_MASK = 7394 CEFBS_None, // PseudoVMSOF_M_B64 = 7395 CEFBS_None, // PseudoVMSOF_M_B64_MASK = 7396 CEFBS_None, // PseudoVMSOF_M_B8 = 7397 CEFBS_None, // PseudoVMSOF_M_B8_MASK = 7398 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_M1 = 7399 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_M1_MASK = 7400 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_M1_TU = 7401 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_M2 = 7402 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_M2_MASK = 7403 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_M2_TU = 7404 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_M4 = 7405 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_M4_MASK = 7406 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_M4_TU = 7407 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_M8 = 7408 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_M8_MASK = 7409 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_M8_TU = 7410 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_MF2 = 7411 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_MF2_MASK = 7412 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_MF2_TU = 7413 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_MF4 = 7414 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_MF4_MASK = 7415 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_MF4_TU = 7416 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_MF8 = 7417 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_MF8_MASK = 7418 CEFBS_HasVInstructions, // PseudoVMULHSU_VV_MF8_TU = 7419 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_M1 = 7420 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_M1_MASK = 7421 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_M1_TU = 7422 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_M2 = 7423 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_M2_MASK = 7424 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_M2_TU = 7425 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_M4 = 7426 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_M4_MASK = 7427 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_M4_TU = 7428 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_M8 = 7429 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_M8_MASK = 7430 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_M8_TU = 7431 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_MF2 = 7432 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_MF2_MASK = 7433 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_MF2_TU = 7434 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_MF4 = 7435 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_MF4_MASK = 7436 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_MF4_TU = 7437 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_MF8 = 7438 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_MF8_MASK = 7439 CEFBS_HasVInstructions, // PseudoVMULHSU_VX_MF8_TU = 7440 CEFBS_HasVInstructions, // PseudoVMULHU_VV_M1 = 7441 CEFBS_HasVInstructions, // PseudoVMULHU_VV_M1_MASK = 7442 CEFBS_HasVInstructions, // PseudoVMULHU_VV_M1_TU = 7443 CEFBS_HasVInstructions, // PseudoVMULHU_VV_M2 = 7444 CEFBS_HasVInstructions, // PseudoVMULHU_VV_M2_MASK = 7445 CEFBS_HasVInstructions, // PseudoVMULHU_VV_M2_TU = 7446 CEFBS_HasVInstructions, // PseudoVMULHU_VV_M4 = 7447 CEFBS_HasVInstructions, // PseudoVMULHU_VV_M4_MASK = 7448 CEFBS_HasVInstructions, // PseudoVMULHU_VV_M4_TU = 7449 CEFBS_HasVInstructions, // PseudoVMULHU_VV_M8 = 7450 CEFBS_HasVInstructions, // PseudoVMULHU_VV_M8_MASK = 7451 CEFBS_HasVInstructions, // PseudoVMULHU_VV_M8_TU = 7452 CEFBS_HasVInstructions, // PseudoVMULHU_VV_MF2 = 7453 CEFBS_HasVInstructions, // PseudoVMULHU_VV_MF2_MASK = 7454 CEFBS_HasVInstructions, // PseudoVMULHU_VV_MF2_TU = 7455 CEFBS_HasVInstructions, // PseudoVMULHU_VV_MF4 = 7456 CEFBS_HasVInstructions, // PseudoVMULHU_VV_MF4_MASK = 7457 CEFBS_HasVInstructions, // PseudoVMULHU_VV_MF4_TU = 7458 CEFBS_HasVInstructions, // PseudoVMULHU_VV_MF8 = 7459 CEFBS_HasVInstructions, // PseudoVMULHU_VV_MF8_MASK = 7460 CEFBS_HasVInstructions, // PseudoVMULHU_VV_MF8_TU = 7461 CEFBS_HasVInstructions, // PseudoVMULHU_VX_M1 = 7462 CEFBS_HasVInstructions, // PseudoVMULHU_VX_M1_MASK = 7463 CEFBS_HasVInstructions, // PseudoVMULHU_VX_M1_TU = 7464 CEFBS_HasVInstructions, // PseudoVMULHU_VX_M2 = 7465 CEFBS_HasVInstructions, // PseudoVMULHU_VX_M2_MASK = 7466 CEFBS_HasVInstructions, // PseudoVMULHU_VX_M2_TU = 7467 CEFBS_HasVInstructions, // PseudoVMULHU_VX_M4 = 7468 CEFBS_HasVInstructions, // PseudoVMULHU_VX_M4_MASK = 7469 CEFBS_HasVInstructions, // PseudoVMULHU_VX_M4_TU = 7470 CEFBS_HasVInstructions, // PseudoVMULHU_VX_M8 = 7471 CEFBS_HasVInstructions, // PseudoVMULHU_VX_M8_MASK = 7472 CEFBS_HasVInstructions, // PseudoVMULHU_VX_M8_TU = 7473 CEFBS_HasVInstructions, // PseudoVMULHU_VX_MF2 = 7474 CEFBS_HasVInstructions, // PseudoVMULHU_VX_MF2_MASK = 7475 CEFBS_HasVInstructions, // PseudoVMULHU_VX_MF2_TU = 7476 CEFBS_HasVInstructions, // PseudoVMULHU_VX_MF4 = 7477 CEFBS_HasVInstructions, // PseudoVMULHU_VX_MF4_MASK = 7478 CEFBS_HasVInstructions, // PseudoVMULHU_VX_MF4_TU = 7479 CEFBS_HasVInstructions, // PseudoVMULHU_VX_MF8 = 7480 CEFBS_HasVInstructions, // PseudoVMULHU_VX_MF8_MASK = 7481 CEFBS_HasVInstructions, // PseudoVMULHU_VX_MF8_TU = 7482 CEFBS_HasVInstructions, // PseudoVMULH_VV_M1 = 7483 CEFBS_HasVInstructions, // PseudoVMULH_VV_M1_MASK = 7484 CEFBS_HasVInstructions, // PseudoVMULH_VV_M1_TU = 7485 CEFBS_HasVInstructions, // PseudoVMULH_VV_M2 = 7486 CEFBS_HasVInstructions, // PseudoVMULH_VV_M2_MASK = 7487 CEFBS_HasVInstructions, // PseudoVMULH_VV_M2_TU = 7488 CEFBS_HasVInstructions, // PseudoVMULH_VV_M4 = 7489 CEFBS_HasVInstructions, // PseudoVMULH_VV_M4_MASK = 7490 CEFBS_HasVInstructions, // PseudoVMULH_VV_M4_TU = 7491 CEFBS_HasVInstructions, // PseudoVMULH_VV_M8 = 7492 CEFBS_HasVInstructions, // PseudoVMULH_VV_M8_MASK = 7493 CEFBS_HasVInstructions, // PseudoVMULH_VV_M8_TU = 7494 CEFBS_HasVInstructions, // PseudoVMULH_VV_MF2 = 7495 CEFBS_HasVInstructions, // PseudoVMULH_VV_MF2_MASK = 7496 CEFBS_HasVInstructions, // PseudoVMULH_VV_MF2_TU = 7497 CEFBS_HasVInstructions, // PseudoVMULH_VV_MF4 = 7498 CEFBS_HasVInstructions, // PseudoVMULH_VV_MF4_MASK = 7499 CEFBS_HasVInstructions, // PseudoVMULH_VV_MF4_TU = 7500 CEFBS_HasVInstructions, // PseudoVMULH_VV_MF8 = 7501 CEFBS_HasVInstructions, // PseudoVMULH_VV_MF8_MASK = 7502 CEFBS_HasVInstructions, // PseudoVMULH_VV_MF8_TU = 7503 CEFBS_HasVInstructions, // PseudoVMULH_VX_M1 = 7504 CEFBS_HasVInstructions, // PseudoVMULH_VX_M1_MASK = 7505 CEFBS_HasVInstructions, // PseudoVMULH_VX_M1_TU = 7506 CEFBS_HasVInstructions, // PseudoVMULH_VX_M2 = 7507 CEFBS_HasVInstructions, // PseudoVMULH_VX_M2_MASK = 7508 CEFBS_HasVInstructions, // PseudoVMULH_VX_M2_TU = 7509 CEFBS_HasVInstructions, // PseudoVMULH_VX_M4 = 7510 CEFBS_HasVInstructions, // PseudoVMULH_VX_M4_MASK = 7511 CEFBS_HasVInstructions, // PseudoVMULH_VX_M4_TU = 7512 CEFBS_HasVInstructions, // PseudoVMULH_VX_M8 = 7513 CEFBS_HasVInstructions, // PseudoVMULH_VX_M8_MASK = 7514 CEFBS_HasVInstructions, // PseudoVMULH_VX_M8_TU = 7515 CEFBS_HasVInstructions, // PseudoVMULH_VX_MF2 = 7516 CEFBS_HasVInstructions, // PseudoVMULH_VX_MF2_MASK = 7517 CEFBS_HasVInstructions, // PseudoVMULH_VX_MF2_TU = 7518 CEFBS_HasVInstructions, // PseudoVMULH_VX_MF4 = 7519 CEFBS_HasVInstructions, // PseudoVMULH_VX_MF4_MASK = 7520 CEFBS_HasVInstructions, // PseudoVMULH_VX_MF4_TU = 7521 CEFBS_HasVInstructions, // PseudoVMULH_VX_MF8 = 7522 CEFBS_HasVInstructions, // PseudoVMULH_VX_MF8_MASK = 7523 CEFBS_HasVInstructions, // PseudoVMULH_VX_MF8_TU = 7524 CEFBS_HasVInstructions, // PseudoVMUL_VV_M1 = 7525 CEFBS_HasVInstructions, // PseudoVMUL_VV_M1_MASK = 7526 CEFBS_HasVInstructions, // PseudoVMUL_VV_M1_TU = 7527 CEFBS_HasVInstructions, // PseudoVMUL_VV_M2 = 7528 CEFBS_HasVInstructions, // PseudoVMUL_VV_M2_MASK = 7529 CEFBS_HasVInstructions, // PseudoVMUL_VV_M2_TU = 7530 CEFBS_HasVInstructions, // PseudoVMUL_VV_M4 = 7531 CEFBS_HasVInstructions, // PseudoVMUL_VV_M4_MASK = 7532 CEFBS_HasVInstructions, // PseudoVMUL_VV_M4_TU = 7533 CEFBS_HasVInstructions, // PseudoVMUL_VV_M8 = 7534 CEFBS_HasVInstructions, // PseudoVMUL_VV_M8_MASK = 7535 CEFBS_HasVInstructions, // PseudoVMUL_VV_M8_TU = 7536 CEFBS_HasVInstructions, // PseudoVMUL_VV_MF2 = 7537 CEFBS_HasVInstructions, // PseudoVMUL_VV_MF2_MASK = 7538 CEFBS_HasVInstructions, // PseudoVMUL_VV_MF2_TU = 7539 CEFBS_HasVInstructions, // PseudoVMUL_VV_MF4 = 7540 CEFBS_HasVInstructions, // PseudoVMUL_VV_MF4_MASK = 7541 CEFBS_HasVInstructions, // PseudoVMUL_VV_MF4_TU = 7542 CEFBS_HasVInstructions, // PseudoVMUL_VV_MF8 = 7543 CEFBS_HasVInstructions, // PseudoVMUL_VV_MF8_MASK = 7544 CEFBS_HasVInstructions, // PseudoVMUL_VV_MF8_TU = 7545 CEFBS_HasVInstructions, // PseudoVMUL_VX_M1 = 7546 CEFBS_HasVInstructions, // PseudoVMUL_VX_M1_MASK = 7547 CEFBS_HasVInstructions, // PseudoVMUL_VX_M1_TU = 7548 CEFBS_HasVInstructions, // PseudoVMUL_VX_M2 = 7549 CEFBS_HasVInstructions, // PseudoVMUL_VX_M2_MASK = 7550 CEFBS_HasVInstructions, // PseudoVMUL_VX_M2_TU = 7551 CEFBS_HasVInstructions, // PseudoVMUL_VX_M4 = 7552 CEFBS_HasVInstructions, // PseudoVMUL_VX_M4_MASK = 7553 CEFBS_HasVInstructions, // PseudoVMUL_VX_M4_TU = 7554 CEFBS_HasVInstructions, // PseudoVMUL_VX_M8 = 7555 CEFBS_HasVInstructions, // PseudoVMUL_VX_M8_MASK = 7556 CEFBS_HasVInstructions, // PseudoVMUL_VX_M8_TU = 7557 CEFBS_HasVInstructions, // PseudoVMUL_VX_MF2 = 7558 CEFBS_HasVInstructions, // PseudoVMUL_VX_MF2_MASK = 7559 CEFBS_HasVInstructions, // PseudoVMUL_VX_MF2_TU = 7560 CEFBS_HasVInstructions, // PseudoVMUL_VX_MF4 = 7561 CEFBS_HasVInstructions, // PseudoVMUL_VX_MF4_MASK = 7562 CEFBS_HasVInstructions, // PseudoVMUL_VX_MF4_TU = 7563 CEFBS_HasVInstructions, // PseudoVMUL_VX_MF8 = 7564 CEFBS_HasVInstructions, // PseudoVMUL_VX_MF8_MASK = 7565 CEFBS_HasVInstructions, // PseudoVMUL_VX_MF8_TU = 7566 CEFBS_HasVInstructions, // PseudoVMV_S_X_M1 = 7567 CEFBS_HasVInstructions, // PseudoVMV_S_X_M2 = 7568 CEFBS_HasVInstructions, // PseudoVMV_S_X_M4 = 7569 CEFBS_HasVInstructions, // PseudoVMV_S_X_M8 = 7570 CEFBS_HasVInstructions, // PseudoVMV_S_X_MF2 = 7571 CEFBS_HasVInstructions, // PseudoVMV_S_X_MF4 = 7572 CEFBS_HasVInstructions, // PseudoVMV_S_X_MF8 = 7573 CEFBS_HasVInstructions, // PseudoVMV_V_I_M1 = 7574 CEFBS_HasVInstructions, // PseudoVMV_V_I_M1_TU = 7575 CEFBS_HasVInstructions, // PseudoVMV_V_I_M2 = 7576 CEFBS_HasVInstructions, // PseudoVMV_V_I_M2_TU = 7577 CEFBS_HasVInstructions, // PseudoVMV_V_I_M4 = 7578 CEFBS_HasVInstructions, // PseudoVMV_V_I_M4_TU = 7579 CEFBS_HasVInstructions, // PseudoVMV_V_I_M8 = 7580 CEFBS_HasVInstructions, // PseudoVMV_V_I_M8_TU = 7581 CEFBS_HasVInstructions, // PseudoVMV_V_I_MF2 = 7582 CEFBS_HasVInstructions, // PseudoVMV_V_I_MF2_TU = 7583 CEFBS_HasVInstructions, // PseudoVMV_V_I_MF4 = 7584 CEFBS_HasVInstructions, // PseudoVMV_V_I_MF4_TU = 7585 CEFBS_HasVInstructions, // PseudoVMV_V_I_MF8 = 7586 CEFBS_HasVInstructions, // PseudoVMV_V_I_MF8_TU = 7587 CEFBS_HasVInstructions, // PseudoVMV_V_V_M1 = 7588 CEFBS_HasVInstructions, // PseudoVMV_V_V_M1_TU = 7589 CEFBS_HasVInstructions, // PseudoVMV_V_V_M2 = 7590 CEFBS_HasVInstructions, // PseudoVMV_V_V_M2_TU = 7591 CEFBS_HasVInstructions, // PseudoVMV_V_V_M4 = 7592 CEFBS_HasVInstructions, // PseudoVMV_V_V_M4_TU = 7593 CEFBS_HasVInstructions, // PseudoVMV_V_V_M8 = 7594 CEFBS_HasVInstructions, // PseudoVMV_V_V_M8_TU = 7595 CEFBS_HasVInstructions, // PseudoVMV_V_V_MF2 = 7596 CEFBS_HasVInstructions, // PseudoVMV_V_V_MF2_TU = 7597 CEFBS_HasVInstructions, // PseudoVMV_V_V_MF4 = 7598 CEFBS_HasVInstructions, // PseudoVMV_V_V_MF4_TU = 7599 CEFBS_HasVInstructions, // PseudoVMV_V_V_MF8 = 7600 CEFBS_HasVInstructions, // PseudoVMV_V_V_MF8_TU = 7601 CEFBS_HasVInstructions, // PseudoVMV_V_X_M1 = 7602 CEFBS_HasVInstructions, // PseudoVMV_V_X_M1_TU = 7603 CEFBS_HasVInstructions, // PseudoVMV_V_X_M2 = 7604 CEFBS_HasVInstructions, // PseudoVMV_V_X_M2_TU = 7605 CEFBS_HasVInstructions, // PseudoVMV_V_X_M4 = 7606 CEFBS_HasVInstructions, // PseudoVMV_V_X_M4_TU = 7607 CEFBS_HasVInstructions, // PseudoVMV_V_X_M8 = 7608 CEFBS_HasVInstructions, // PseudoVMV_V_X_M8_TU = 7609 CEFBS_HasVInstructions, // PseudoVMV_V_X_MF2 = 7610 CEFBS_HasVInstructions, // PseudoVMV_V_X_MF2_TU = 7611 CEFBS_HasVInstructions, // PseudoVMV_V_X_MF4 = 7612 CEFBS_HasVInstructions, // PseudoVMV_V_X_MF4_TU = 7613 CEFBS_HasVInstructions, // PseudoVMV_V_X_MF8 = 7614 CEFBS_HasVInstructions, // PseudoVMV_V_X_MF8_TU = 7615 CEFBS_HasVInstructions, // PseudoVMV_X_S_M1 = 7616 CEFBS_HasVInstructions, // PseudoVMV_X_S_M2 = 7617 CEFBS_HasVInstructions, // PseudoVMV_X_S_M4 = 7618 CEFBS_HasVInstructions, // PseudoVMV_X_S_M8 = 7619 CEFBS_HasVInstructions, // PseudoVMV_X_S_MF2 = 7620 CEFBS_HasVInstructions, // PseudoVMV_X_S_MF4 = 7621 CEFBS_HasVInstructions, // PseudoVMV_X_S_MF8 = 7622 CEFBS_None, // PseudoVMXNOR_MM_M1 = 7623 CEFBS_None, // PseudoVMXNOR_MM_M2 = 7624 CEFBS_None, // PseudoVMXNOR_MM_M4 = 7625 CEFBS_None, // PseudoVMXNOR_MM_M8 = 7626 CEFBS_None, // PseudoVMXNOR_MM_MF2 = 7627 CEFBS_None, // PseudoVMXNOR_MM_MF4 = 7628 CEFBS_None, // PseudoVMXNOR_MM_MF8 = 7629 CEFBS_None, // PseudoVMXOR_MM_M1 = 7630 CEFBS_None, // PseudoVMXOR_MM_M2 = 7631 CEFBS_None, // PseudoVMXOR_MM_M4 = 7632 CEFBS_None, // PseudoVMXOR_MM_M8 = 7633 CEFBS_None, // PseudoVMXOR_MM_MF2 = 7634 CEFBS_None, // PseudoVMXOR_MM_MF4 = 7635 CEFBS_None, // PseudoVMXOR_MM_MF8 = 7636 CEFBS_HasVInstructions, // PseudoVNCLIPU_WI_M1 = 7637 CEFBS_HasVInstructions, // PseudoVNCLIPU_WI_M1_MASK = 7638 CEFBS_HasVInstructions, // PseudoVNCLIPU_WI_M1_TU = 7639 CEFBS_HasVInstructions, // PseudoVNCLIPU_WI_M2 = 7640 CEFBS_HasVInstructions, // PseudoVNCLIPU_WI_M2_MASK = 7641 CEFBS_HasVInstructions, // PseudoVNCLIPU_WI_M2_TU = 7642 CEFBS_HasVInstructions, // PseudoVNCLIPU_WI_M4 = 7643 CEFBS_HasVInstructions, // PseudoVNCLIPU_WI_M4_MASK = 7644 CEFBS_HasVInstructions, // PseudoVNCLIPU_WI_M4_TU = 7645 CEFBS_HasVInstructions, // PseudoVNCLIPU_WI_MF2 = 7646 CEFBS_HasVInstructions, // PseudoVNCLIPU_WI_MF2_MASK = 7647 CEFBS_HasVInstructions, // PseudoVNCLIPU_WI_MF2_TU = 7648 CEFBS_HasVInstructions, // PseudoVNCLIPU_WI_MF4 = 7649 CEFBS_HasVInstructions, // PseudoVNCLIPU_WI_MF4_MASK = 7650 CEFBS_HasVInstructions, // PseudoVNCLIPU_WI_MF4_TU = 7651 CEFBS_HasVInstructions, // PseudoVNCLIPU_WI_MF8 = 7652 CEFBS_HasVInstructions, // PseudoVNCLIPU_WI_MF8_MASK = 7653 CEFBS_HasVInstructions, // PseudoVNCLIPU_WI_MF8_TU = 7654 CEFBS_HasVInstructions, // PseudoVNCLIPU_WV_M1 = 7655 CEFBS_HasVInstructions, // PseudoVNCLIPU_WV_M1_MASK = 7656 CEFBS_HasVInstructions, // PseudoVNCLIPU_WV_M1_TU = 7657 CEFBS_HasVInstructions, // PseudoVNCLIPU_WV_M2 = 7658 CEFBS_HasVInstructions, // PseudoVNCLIPU_WV_M2_MASK = 7659 CEFBS_HasVInstructions, // PseudoVNCLIPU_WV_M2_TU = 7660 CEFBS_HasVInstructions, // PseudoVNCLIPU_WV_M4 = 7661 CEFBS_HasVInstructions, // PseudoVNCLIPU_WV_M4_MASK = 7662 CEFBS_HasVInstructions, // PseudoVNCLIPU_WV_M4_TU = 7663 CEFBS_HasVInstructions, // PseudoVNCLIPU_WV_MF2 = 7664 CEFBS_HasVInstructions, // PseudoVNCLIPU_WV_MF2_MASK = 7665 CEFBS_HasVInstructions, // PseudoVNCLIPU_WV_MF2_TU = 7666 CEFBS_HasVInstructions, // PseudoVNCLIPU_WV_MF4 = 7667 CEFBS_HasVInstructions, // PseudoVNCLIPU_WV_MF4_MASK = 7668 CEFBS_HasVInstructions, // PseudoVNCLIPU_WV_MF4_TU = 7669 CEFBS_HasVInstructions, // PseudoVNCLIPU_WV_MF8 = 7670 CEFBS_HasVInstructions, // PseudoVNCLIPU_WV_MF8_MASK = 7671 CEFBS_HasVInstructions, // PseudoVNCLIPU_WV_MF8_TU = 7672 CEFBS_HasVInstructions, // PseudoVNCLIPU_WX_M1 = 7673 CEFBS_HasVInstructions, // PseudoVNCLIPU_WX_M1_MASK = 7674 CEFBS_HasVInstructions, // PseudoVNCLIPU_WX_M1_TU = 7675 CEFBS_HasVInstructions, // PseudoVNCLIPU_WX_M2 = 7676 CEFBS_HasVInstructions, // PseudoVNCLIPU_WX_M2_MASK = 7677 CEFBS_HasVInstructions, // PseudoVNCLIPU_WX_M2_TU = 7678 CEFBS_HasVInstructions, // PseudoVNCLIPU_WX_M4 = 7679 CEFBS_HasVInstructions, // PseudoVNCLIPU_WX_M4_MASK = 7680 CEFBS_HasVInstructions, // PseudoVNCLIPU_WX_M4_TU = 7681 CEFBS_HasVInstructions, // PseudoVNCLIPU_WX_MF2 = 7682 CEFBS_HasVInstructions, // PseudoVNCLIPU_WX_MF2_MASK = 7683 CEFBS_HasVInstructions, // PseudoVNCLIPU_WX_MF2_TU = 7684 CEFBS_HasVInstructions, // PseudoVNCLIPU_WX_MF4 = 7685 CEFBS_HasVInstructions, // PseudoVNCLIPU_WX_MF4_MASK = 7686 CEFBS_HasVInstructions, // PseudoVNCLIPU_WX_MF4_TU = 7687 CEFBS_HasVInstructions, // PseudoVNCLIPU_WX_MF8 = 7688 CEFBS_HasVInstructions, // PseudoVNCLIPU_WX_MF8_MASK = 7689 CEFBS_HasVInstructions, // PseudoVNCLIPU_WX_MF8_TU = 7690 CEFBS_HasVInstructions, // PseudoVNCLIP_WI_M1 = 7691 CEFBS_HasVInstructions, // PseudoVNCLIP_WI_M1_MASK = 7692 CEFBS_HasVInstructions, // PseudoVNCLIP_WI_M1_TU = 7693 CEFBS_HasVInstructions, // PseudoVNCLIP_WI_M2 = 7694 CEFBS_HasVInstructions, // PseudoVNCLIP_WI_M2_MASK = 7695 CEFBS_HasVInstructions, // PseudoVNCLIP_WI_M2_TU = 7696 CEFBS_HasVInstructions, // PseudoVNCLIP_WI_M4 = 7697 CEFBS_HasVInstructions, // PseudoVNCLIP_WI_M4_MASK = 7698 CEFBS_HasVInstructions, // PseudoVNCLIP_WI_M4_TU = 7699 CEFBS_HasVInstructions, // PseudoVNCLIP_WI_MF2 = 7700 CEFBS_HasVInstructions, // PseudoVNCLIP_WI_MF2_MASK = 7701 CEFBS_HasVInstructions, // PseudoVNCLIP_WI_MF2_TU = 7702 CEFBS_HasVInstructions, // PseudoVNCLIP_WI_MF4 = 7703 CEFBS_HasVInstructions, // PseudoVNCLIP_WI_MF4_MASK = 7704 CEFBS_HasVInstructions, // PseudoVNCLIP_WI_MF4_TU = 7705 CEFBS_HasVInstructions, // PseudoVNCLIP_WI_MF8 = 7706 CEFBS_HasVInstructions, // PseudoVNCLIP_WI_MF8_MASK = 7707 CEFBS_HasVInstructions, // PseudoVNCLIP_WI_MF8_TU = 7708 CEFBS_HasVInstructions, // PseudoVNCLIP_WV_M1 = 7709 CEFBS_HasVInstructions, // PseudoVNCLIP_WV_M1_MASK = 7710 CEFBS_HasVInstructions, // PseudoVNCLIP_WV_M1_TU = 7711 CEFBS_HasVInstructions, // PseudoVNCLIP_WV_M2 = 7712 CEFBS_HasVInstructions, // PseudoVNCLIP_WV_M2_MASK = 7713 CEFBS_HasVInstructions, // PseudoVNCLIP_WV_M2_TU = 7714 CEFBS_HasVInstructions, // PseudoVNCLIP_WV_M4 = 7715 CEFBS_HasVInstructions, // PseudoVNCLIP_WV_M4_MASK = 7716 CEFBS_HasVInstructions, // PseudoVNCLIP_WV_M4_TU = 7717 CEFBS_HasVInstructions, // PseudoVNCLIP_WV_MF2 = 7718 CEFBS_HasVInstructions, // PseudoVNCLIP_WV_MF2_MASK = 7719 CEFBS_HasVInstructions, // PseudoVNCLIP_WV_MF2_TU = 7720 CEFBS_HasVInstructions, // PseudoVNCLIP_WV_MF4 = 7721 CEFBS_HasVInstructions, // PseudoVNCLIP_WV_MF4_MASK = 7722 CEFBS_HasVInstructions, // PseudoVNCLIP_WV_MF4_TU = 7723 CEFBS_HasVInstructions, // PseudoVNCLIP_WV_MF8 = 7724 CEFBS_HasVInstructions, // PseudoVNCLIP_WV_MF8_MASK = 7725 CEFBS_HasVInstructions, // PseudoVNCLIP_WV_MF8_TU = 7726 CEFBS_HasVInstructions, // PseudoVNCLIP_WX_M1 = 7727 CEFBS_HasVInstructions, // PseudoVNCLIP_WX_M1_MASK = 7728 CEFBS_HasVInstructions, // PseudoVNCLIP_WX_M1_TU = 7729 CEFBS_HasVInstructions, // PseudoVNCLIP_WX_M2 = 7730 CEFBS_HasVInstructions, // PseudoVNCLIP_WX_M2_MASK = 7731 CEFBS_HasVInstructions, // PseudoVNCLIP_WX_M2_TU = 7732 CEFBS_HasVInstructions, // PseudoVNCLIP_WX_M4 = 7733 CEFBS_HasVInstructions, // PseudoVNCLIP_WX_M4_MASK = 7734 CEFBS_HasVInstructions, // PseudoVNCLIP_WX_M4_TU = 7735 CEFBS_HasVInstructions, // PseudoVNCLIP_WX_MF2 = 7736 CEFBS_HasVInstructions, // PseudoVNCLIP_WX_MF2_MASK = 7737 CEFBS_HasVInstructions, // PseudoVNCLIP_WX_MF2_TU = 7738 CEFBS_HasVInstructions, // PseudoVNCLIP_WX_MF4 = 7739 CEFBS_HasVInstructions, // PseudoVNCLIP_WX_MF4_MASK = 7740 CEFBS_HasVInstructions, // PseudoVNCLIP_WX_MF4_TU = 7741 CEFBS_HasVInstructions, // PseudoVNCLIP_WX_MF8 = 7742 CEFBS_HasVInstructions, // PseudoVNCLIP_WX_MF8_MASK = 7743 CEFBS_HasVInstructions, // PseudoVNCLIP_WX_MF8_TU = 7744 CEFBS_HasVInstructions, // PseudoVNMSAC_VV_M1 = 7745 CEFBS_HasVInstructions, // PseudoVNMSAC_VV_M1_MASK = 7746 CEFBS_HasVInstructions, // PseudoVNMSAC_VV_M2 = 7747 CEFBS_HasVInstructions, // PseudoVNMSAC_VV_M2_MASK = 7748 CEFBS_HasVInstructions, // PseudoVNMSAC_VV_M4 = 7749 CEFBS_HasVInstructions, // PseudoVNMSAC_VV_M4_MASK = 7750 CEFBS_HasVInstructions, // PseudoVNMSAC_VV_M8 = 7751 CEFBS_HasVInstructions, // PseudoVNMSAC_VV_M8_MASK = 7752 CEFBS_HasVInstructions, // PseudoVNMSAC_VV_MF2 = 7753 CEFBS_HasVInstructions, // PseudoVNMSAC_VV_MF2_MASK = 7754 CEFBS_HasVInstructions, // PseudoVNMSAC_VV_MF4 = 7755 CEFBS_HasVInstructions, // PseudoVNMSAC_VV_MF4_MASK = 7756 CEFBS_HasVInstructions, // PseudoVNMSAC_VV_MF8 = 7757 CEFBS_HasVInstructions, // PseudoVNMSAC_VV_MF8_MASK = 7758 CEFBS_HasVInstructions, // PseudoVNMSAC_VX_M1 = 7759 CEFBS_HasVInstructions, // PseudoVNMSAC_VX_M1_MASK = 7760 CEFBS_HasVInstructions, // PseudoVNMSAC_VX_M2 = 7761 CEFBS_HasVInstructions, // PseudoVNMSAC_VX_M2_MASK = 7762 CEFBS_HasVInstructions, // PseudoVNMSAC_VX_M4 = 7763 CEFBS_HasVInstructions, // PseudoVNMSAC_VX_M4_MASK = 7764 CEFBS_HasVInstructions, // PseudoVNMSAC_VX_M8 = 7765 CEFBS_HasVInstructions, // PseudoVNMSAC_VX_M8_MASK = 7766 CEFBS_HasVInstructions, // PseudoVNMSAC_VX_MF2 = 7767 CEFBS_HasVInstructions, // PseudoVNMSAC_VX_MF2_MASK = 7768 CEFBS_HasVInstructions, // PseudoVNMSAC_VX_MF4 = 7769 CEFBS_HasVInstructions, // PseudoVNMSAC_VX_MF4_MASK = 7770 CEFBS_HasVInstructions, // PseudoVNMSAC_VX_MF8 = 7771 CEFBS_HasVInstructions, // PseudoVNMSAC_VX_MF8_MASK = 7772 CEFBS_HasVInstructions, // PseudoVNMSUB_VV_M1 = 7773 CEFBS_HasVInstructions, // PseudoVNMSUB_VV_M1_MASK = 7774 CEFBS_HasVInstructions, // PseudoVNMSUB_VV_M2 = 7775 CEFBS_HasVInstructions, // PseudoVNMSUB_VV_M2_MASK = 7776 CEFBS_HasVInstructions, // PseudoVNMSUB_VV_M4 = 7777 CEFBS_HasVInstructions, // PseudoVNMSUB_VV_M4_MASK = 7778 CEFBS_HasVInstructions, // PseudoVNMSUB_VV_M8 = 7779 CEFBS_HasVInstructions, // PseudoVNMSUB_VV_M8_MASK = 7780 CEFBS_HasVInstructions, // PseudoVNMSUB_VV_MF2 = 7781 CEFBS_HasVInstructions, // PseudoVNMSUB_VV_MF2_MASK = 7782 CEFBS_HasVInstructions, // PseudoVNMSUB_VV_MF4 = 7783 CEFBS_HasVInstructions, // PseudoVNMSUB_VV_MF4_MASK = 7784 CEFBS_HasVInstructions, // PseudoVNMSUB_VV_MF8 = 7785 CEFBS_HasVInstructions, // PseudoVNMSUB_VV_MF8_MASK = 7786 CEFBS_HasVInstructions, // PseudoVNMSUB_VX_M1 = 7787 CEFBS_HasVInstructions, // PseudoVNMSUB_VX_M1_MASK = 7788 CEFBS_HasVInstructions, // PseudoVNMSUB_VX_M2 = 7789 CEFBS_HasVInstructions, // PseudoVNMSUB_VX_M2_MASK = 7790 CEFBS_HasVInstructions, // PseudoVNMSUB_VX_M4 = 7791 CEFBS_HasVInstructions, // PseudoVNMSUB_VX_M4_MASK = 7792 CEFBS_HasVInstructions, // PseudoVNMSUB_VX_M8 = 7793 CEFBS_HasVInstructions, // PseudoVNMSUB_VX_M8_MASK = 7794 CEFBS_HasVInstructions, // PseudoVNMSUB_VX_MF2 = 7795 CEFBS_HasVInstructions, // PseudoVNMSUB_VX_MF2_MASK = 7796 CEFBS_HasVInstructions, // PseudoVNMSUB_VX_MF4 = 7797 CEFBS_HasVInstructions, // PseudoVNMSUB_VX_MF4_MASK = 7798 CEFBS_HasVInstructions, // PseudoVNMSUB_VX_MF8 = 7799 CEFBS_HasVInstructions, // PseudoVNMSUB_VX_MF8_MASK = 7800 CEFBS_HasVInstructions, // PseudoVNSRA_WI_M1 = 7801 CEFBS_HasVInstructions, // PseudoVNSRA_WI_M1_MASK = 7802 CEFBS_HasVInstructions, // PseudoVNSRA_WI_M1_TU = 7803 CEFBS_HasVInstructions, // PseudoVNSRA_WI_M2 = 7804 CEFBS_HasVInstructions, // PseudoVNSRA_WI_M2_MASK = 7805 CEFBS_HasVInstructions, // PseudoVNSRA_WI_M2_TU = 7806 CEFBS_HasVInstructions, // PseudoVNSRA_WI_M4 = 7807 CEFBS_HasVInstructions, // PseudoVNSRA_WI_M4_MASK = 7808 CEFBS_HasVInstructions, // PseudoVNSRA_WI_M4_TU = 7809 CEFBS_HasVInstructions, // PseudoVNSRA_WI_MF2 = 7810 CEFBS_HasVInstructions, // PseudoVNSRA_WI_MF2_MASK = 7811 CEFBS_HasVInstructions, // PseudoVNSRA_WI_MF2_TU = 7812 CEFBS_HasVInstructions, // PseudoVNSRA_WI_MF4 = 7813 CEFBS_HasVInstructions, // PseudoVNSRA_WI_MF4_MASK = 7814 CEFBS_HasVInstructions, // PseudoVNSRA_WI_MF4_TU = 7815 CEFBS_HasVInstructions, // PseudoVNSRA_WI_MF8 = 7816 CEFBS_HasVInstructions, // PseudoVNSRA_WI_MF8_MASK = 7817 CEFBS_HasVInstructions, // PseudoVNSRA_WI_MF8_TU = 7818 CEFBS_HasVInstructions, // PseudoVNSRA_WV_M1 = 7819 CEFBS_HasVInstructions, // PseudoVNSRA_WV_M1_MASK = 7820 CEFBS_HasVInstructions, // PseudoVNSRA_WV_M1_TU = 7821 CEFBS_HasVInstructions, // PseudoVNSRA_WV_M2 = 7822 CEFBS_HasVInstructions, // PseudoVNSRA_WV_M2_MASK = 7823 CEFBS_HasVInstructions, // PseudoVNSRA_WV_M2_TU = 7824 CEFBS_HasVInstructions, // PseudoVNSRA_WV_M4 = 7825 CEFBS_HasVInstructions, // PseudoVNSRA_WV_M4_MASK = 7826 CEFBS_HasVInstructions, // PseudoVNSRA_WV_M4_TU = 7827 CEFBS_HasVInstructions, // PseudoVNSRA_WV_MF2 = 7828 CEFBS_HasVInstructions, // PseudoVNSRA_WV_MF2_MASK = 7829 CEFBS_HasVInstructions, // PseudoVNSRA_WV_MF2_TU = 7830 CEFBS_HasVInstructions, // PseudoVNSRA_WV_MF4 = 7831 CEFBS_HasVInstructions, // PseudoVNSRA_WV_MF4_MASK = 7832 CEFBS_HasVInstructions, // PseudoVNSRA_WV_MF4_TU = 7833 CEFBS_HasVInstructions, // PseudoVNSRA_WV_MF8 = 7834 CEFBS_HasVInstructions, // PseudoVNSRA_WV_MF8_MASK = 7835 CEFBS_HasVInstructions, // PseudoVNSRA_WV_MF8_TU = 7836 CEFBS_HasVInstructions, // PseudoVNSRA_WX_M1 = 7837 CEFBS_HasVInstructions, // PseudoVNSRA_WX_M1_MASK = 7838 CEFBS_HasVInstructions, // PseudoVNSRA_WX_M1_TU = 7839 CEFBS_HasVInstructions, // PseudoVNSRA_WX_M2 = 7840 CEFBS_HasVInstructions, // PseudoVNSRA_WX_M2_MASK = 7841 CEFBS_HasVInstructions, // PseudoVNSRA_WX_M2_TU = 7842 CEFBS_HasVInstructions, // PseudoVNSRA_WX_M4 = 7843 CEFBS_HasVInstructions, // PseudoVNSRA_WX_M4_MASK = 7844 CEFBS_HasVInstructions, // PseudoVNSRA_WX_M4_TU = 7845 CEFBS_HasVInstructions, // PseudoVNSRA_WX_MF2 = 7846 CEFBS_HasVInstructions, // PseudoVNSRA_WX_MF2_MASK = 7847 CEFBS_HasVInstructions, // PseudoVNSRA_WX_MF2_TU = 7848 CEFBS_HasVInstructions, // PseudoVNSRA_WX_MF4 = 7849 CEFBS_HasVInstructions, // PseudoVNSRA_WX_MF4_MASK = 7850 CEFBS_HasVInstructions, // PseudoVNSRA_WX_MF4_TU = 7851 CEFBS_HasVInstructions, // PseudoVNSRA_WX_MF8 = 7852 CEFBS_HasVInstructions, // PseudoVNSRA_WX_MF8_MASK = 7853 CEFBS_HasVInstructions, // PseudoVNSRA_WX_MF8_TU = 7854 CEFBS_HasVInstructions, // PseudoVNSRL_WI_M1 = 7855 CEFBS_HasVInstructions, // PseudoVNSRL_WI_M1_MASK = 7856 CEFBS_HasVInstructions, // PseudoVNSRL_WI_M1_TU = 7857 CEFBS_HasVInstructions, // PseudoVNSRL_WI_M2 = 7858 CEFBS_HasVInstructions, // PseudoVNSRL_WI_M2_MASK = 7859 CEFBS_HasVInstructions, // PseudoVNSRL_WI_M2_TU = 7860 CEFBS_HasVInstructions, // PseudoVNSRL_WI_M4 = 7861 CEFBS_HasVInstructions, // PseudoVNSRL_WI_M4_MASK = 7862 CEFBS_HasVInstructions, // PseudoVNSRL_WI_M4_TU = 7863 CEFBS_HasVInstructions, // PseudoVNSRL_WI_MF2 = 7864 CEFBS_HasVInstructions, // PseudoVNSRL_WI_MF2_MASK = 7865 CEFBS_HasVInstructions, // PseudoVNSRL_WI_MF2_TU = 7866 CEFBS_HasVInstructions, // PseudoVNSRL_WI_MF4 = 7867 CEFBS_HasVInstructions, // PseudoVNSRL_WI_MF4_MASK = 7868 CEFBS_HasVInstructions, // PseudoVNSRL_WI_MF4_TU = 7869 CEFBS_HasVInstructions, // PseudoVNSRL_WI_MF8 = 7870 CEFBS_HasVInstructions, // PseudoVNSRL_WI_MF8_MASK = 7871 CEFBS_HasVInstructions, // PseudoVNSRL_WI_MF8_TU = 7872 CEFBS_HasVInstructions, // PseudoVNSRL_WV_M1 = 7873 CEFBS_HasVInstructions, // PseudoVNSRL_WV_M1_MASK = 7874 CEFBS_HasVInstructions, // PseudoVNSRL_WV_M1_TU = 7875 CEFBS_HasVInstructions, // PseudoVNSRL_WV_M2 = 7876 CEFBS_HasVInstructions, // PseudoVNSRL_WV_M2_MASK = 7877 CEFBS_HasVInstructions, // PseudoVNSRL_WV_M2_TU = 7878 CEFBS_HasVInstructions, // PseudoVNSRL_WV_M4 = 7879 CEFBS_HasVInstructions, // PseudoVNSRL_WV_M4_MASK = 7880 CEFBS_HasVInstructions, // PseudoVNSRL_WV_M4_TU = 7881 CEFBS_HasVInstructions, // PseudoVNSRL_WV_MF2 = 7882 CEFBS_HasVInstructions, // PseudoVNSRL_WV_MF2_MASK = 7883 CEFBS_HasVInstructions, // PseudoVNSRL_WV_MF2_TU = 7884 CEFBS_HasVInstructions, // PseudoVNSRL_WV_MF4 = 7885 CEFBS_HasVInstructions, // PseudoVNSRL_WV_MF4_MASK = 7886 CEFBS_HasVInstructions, // PseudoVNSRL_WV_MF4_TU = 7887 CEFBS_HasVInstructions, // PseudoVNSRL_WV_MF8 = 7888 CEFBS_HasVInstructions, // PseudoVNSRL_WV_MF8_MASK = 7889 CEFBS_HasVInstructions, // PseudoVNSRL_WV_MF8_TU = 7890 CEFBS_HasVInstructions, // PseudoVNSRL_WX_M1 = 7891 CEFBS_HasVInstructions, // PseudoVNSRL_WX_M1_MASK = 7892 CEFBS_HasVInstructions, // PseudoVNSRL_WX_M1_TU = 7893 CEFBS_HasVInstructions, // PseudoVNSRL_WX_M2 = 7894 CEFBS_HasVInstructions, // PseudoVNSRL_WX_M2_MASK = 7895 CEFBS_HasVInstructions, // PseudoVNSRL_WX_M2_TU = 7896 CEFBS_HasVInstructions, // PseudoVNSRL_WX_M4 = 7897 CEFBS_HasVInstructions, // PseudoVNSRL_WX_M4_MASK = 7898 CEFBS_HasVInstructions, // PseudoVNSRL_WX_M4_TU = 7899 CEFBS_HasVInstructions, // PseudoVNSRL_WX_MF2 = 7900 CEFBS_HasVInstructions, // PseudoVNSRL_WX_MF2_MASK = 7901 CEFBS_HasVInstructions, // PseudoVNSRL_WX_MF2_TU = 7902 CEFBS_HasVInstructions, // PseudoVNSRL_WX_MF4 = 7903 CEFBS_HasVInstructions, // PseudoVNSRL_WX_MF4_MASK = 7904 CEFBS_HasVInstructions, // PseudoVNSRL_WX_MF4_TU = 7905 CEFBS_HasVInstructions, // PseudoVNSRL_WX_MF8 = 7906 CEFBS_HasVInstructions, // PseudoVNSRL_WX_MF8_MASK = 7907 CEFBS_HasVInstructions, // PseudoVNSRL_WX_MF8_TU = 7908 CEFBS_HasVInstructions, // PseudoVOR_VI_M1 = 7909 CEFBS_HasVInstructions, // PseudoVOR_VI_M1_MASK = 7910 CEFBS_HasVInstructions, // PseudoVOR_VI_M1_TU = 7911 CEFBS_HasVInstructions, // PseudoVOR_VI_M2 = 7912 CEFBS_HasVInstructions, // PseudoVOR_VI_M2_MASK = 7913 CEFBS_HasVInstructions, // PseudoVOR_VI_M2_TU = 7914 CEFBS_HasVInstructions, // PseudoVOR_VI_M4 = 7915 CEFBS_HasVInstructions, // PseudoVOR_VI_M4_MASK = 7916 CEFBS_HasVInstructions, // PseudoVOR_VI_M4_TU = 7917 CEFBS_HasVInstructions, // PseudoVOR_VI_M8 = 7918 CEFBS_HasVInstructions, // PseudoVOR_VI_M8_MASK = 7919 CEFBS_HasVInstructions, // PseudoVOR_VI_M8_TU = 7920 CEFBS_HasVInstructions, // PseudoVOR_VI_MF2 = 7921 CEFBS_HasVInstructions, // PseudoVOR_VI_MF2_MASK = 7922 CEFBS_HasVInstructions, // PseudoVOR_VI_MF2_TU = 7923 CEFBS_HasVInstructions, // PseudoVOR_VI_MF4 = 7924 CEFBS_HasVInstructions, // PseudoVOR_VI_MF4_MASK = 7925 CEFBS_HasVInstructions, // PseudoVOR_VI_MF4_TU = 7926 CEFBS_HasVInstructions, // PseudoVOR_VI_MF8 = 7927 CEFBS_HasVInstructions, // PseudoVOR_VI_MF8_MASK = 7928 CEFBS_HasVInstructions, // PseudoVOR_VI_MF8_TU = 7929 CEFBS_HasVInstructions, // PseudoVOR_VV_M1 = 7930 CEFBS_HasVInstructions, // PseudoVOR_VV_M1_MASK = 7931 CEFBS_HasVInstructions, // PseudoVOR_VV_M1_TU = 7932 CEFBS_HasVInstructions, // PseudoVOR_VV_M2 = 7933 CEFBS_HasVInstructions, // PseudoVOR_VV_M2_MASK = 7934 CEFBS_HasVInstructions, // PseudoVOR_VV_M2_TU = 7935 CEFBS_HasVInstructions, // PseudoVOR_VV_M4 = 7936 CEFBS_HasVInstructions, // PseudoVOR_VV_M4_MASK = 7937 CEFBS_HasVInstructions, // PseudoVOR_VV_M4_TU = 7938 CEFBS_HasVInstructions, // PseudoVOR_VV_M8 = 7939 CEFBS_HasVInstructions, // PseudoVOR_VV_M8_MASK = 7940 CEFBS_HasVInstructions, // PseudoVOR_VV_M8_TU = 7941 CEFBS_HasVInstructions, // PseudoVOR_VV_MF2 = 7942 CEFBS_HasVInstructions, // PseudoVOR_VV_MF2_MASK = 7943 CEFBS_HasVInstructions, // PseudoVOR_VV_MF2_TU = 7944 CEFBS_HasVInstructions, // PseudoVOR_VV_MF4 = 7945 CEFBS_HasVInstructions, // PseudoVOR_VV_MF4_MASK = 7946 CEFBS_HasVInstructions, // PseudoVOR_VV_MF4_TU = 7947 CEFBS_HasVInstructions, // PseudoVOR_VV_MF8 = 7948 CEFBS_HasVInstructions, // PseudoVOR_VV_MF8_MASK = 7949 CEFBS_HasVInstructions, // PseudoVOR_VV_MF8_TU = 7950 CEFBS_HasVInstructions, // PseudoVOR_VX_M1 = 7951 CEFBS_HasVInstructions, // PseudoVOR_VX_M1_MASK = 7952 CEFBS_HasVInstructions, // PseudoVOR_VX_M1_TU = 7953 CEFBS_HasVInstructions, // PseudoVOR_VX_M2 = 7954 CEFBS_HasVInstructions, // PseudoVOR_VX_M2_MASK = 7955 CEFBS_HasVInstructions, // PseudoVOR_VX_M2_TU = 7956 CEFBS_HasVInstructions, // PseudoVOR_VX_M4 = 7957 CEFBS_HasVInstructions, // PseudoVOR_VX_M4_MASK = 7958 CEFBS_HasVInstructions, // PseudoVOR_VX_M4_TU = 7959 CEFBS_HasVInstructions, // PseudoVOR_VX_M8 = 7960 CEFBS_HasVInstructions, // PseudoVOR_VX_M8_MASK = 7961 CEFBS_HasVInstructions, // PseudoVOR_VX_M8_TU = 7962 CEFBS_HasVInstructions, // PseudoVOR_VX_MF2 = 7963 CEFBS_HasVInstructions, // PseudoVOR_VX_MF2_MASK = 7964 CEFBS_HasVInstructions, // PseudoVOR_VX_MF2_TU = 7965 CEFBS_HasVInstructions, // PseudoVOR_VX_MF4 = 7966 CEFBS_HasVInstructions, // PseudoVOR_VX_MF4_MASK = 7967 CEFBS_HasVInstructions, // PseudoVOR_VX_MF4_TU = 7968 CEFBS_HasVInstructions, // PseudoVOR_VX_MF8 = 7969 CEFBS_HasVInstructions, // PseudoVOR_VX_MF8_MASK = 7970 CEFBS_HasVInstructions, // PseudoVOR_VX_MF8_TU = 7971 CEFBS_HasVInstructions, // PseudoVREDAND_VS_M1 = 7972 CEFBS_HasVInstructions, // PseudoVREDAND_VS_M1_MASK = 7973 CEFBS_HasVInstructions, // PseudoVREDAND_VS_M2 = 7974 CEFBS_HasVInstructions, // PseudoVREDAND_VS_M2_MASK = 7975 CEFBS_HasVInstructions, // PseudoVREDAND_VS_M4 = 7976 CEFBS_HasVInstructions, // PseudoVREDAND_VS_M4_MASK = 7977 CEFBS_HasVInstructions, // PseudoVREDAND_VS_M8 = 7978 CEFBS_HasVInstructions, // PseudoVREDAND_VS_M8_MASK = 7979 CEFBS_HasVInstructions, // PseudoVREDAND_VS_MF2 = 7980 CEFBS_HasVInstructions, // PseudoVREDAND_VS_MF2_MASK = 7981 CEFBS_HasVInstructions, // PseudoVREDAND_VS_MF4 = 7982 CEFBS_HasVInstructions, // PseudoVREDAND_VS_MF4_MASK = 7983 CEFBS_HasVInstructions, // PseudoVREDAND_VS_MF8 = 7984 CEFBS_HasVInstructions, // PseudoVREDAND_VS_MF8_MASK = 7985 CEFBS_HasVInstructions, // PseudoVREDMAXU_VS_M1 = 7986 CEFBS_HasVInstructions, // PseudoVREDMAXU_VS_M1_MASK = 7987 CEFBS_HasVInstructions, // PseudoVREDMAXU_VS_M2 = 7988 CEFBS_HasVInstructions, // PseudoVREDMAXU_VS_M2_MASK = 7989 CEFBS_HasVInstructions, // PseudoVREDMAXU_VS_M4 = 7990 CEFBS_HasVInstructions, // PseudoVREDMAXU_VS_M4_MASK = 7991 CEFBS_HasVInstructions, // PseudoVREDMAXU_VS_M8 = 7992 CEFBS_HasVInstructions, // PseudoVREDMAXU_VS_M8_MASK = 7993 CEFBS_HasVInstructions, // PseudoVREDMAXU_VS_MF2 = 7994 CEFBS_HasVInstructions, // PseudoVREDMAXU_VS_MF2_MASK = 7995 CEFBS_HasVInstructions, // PseudoVREDMAXU_VS_MF4 = 7996 CEFBS_HasVInstructions, // PseudoVREDMAXU_VS_MF4_MASK = 7997 CEFBS_HasVInstructions, // PseudoVREDMAXU_VS_MF8 = 7998 CEFBS_HasVInstructions, // PseudoVREDMAXU_VS_MF8_MASK = 7999 CEFBS_HasVInstructions, // PseudoVREDMAX_VS_M1 = 8000 CEFBS_HasVInstructions, // PseudoVREDMAX_VS_M1_MASK = 8001 CEFBS_HasVInstructions, // PseudoVREDMAX_VS_M2 = 8002 CEFBS_HasVInstructions, // PseudoVREDMAX_VS_M2_MASK = 8003 CEFBS_HasVInstructions, // PseudoVREDMAX_VS_M4 = 8004 CEFBS_HasVInstructions, // PseudoVREDMAX_VS_M4_MASK = 8005 CEFBS_HasVInstructions, // PseudoVREDMAX_VS_M8 = 8006 CEFBS_HasVInstructions, // PseudoVREDMAX_VS_M8_MASK = 8007 CEFBS_HasVInstructions, // PseudoVREDMAX_VS_MF2 = 8008 CEFBS_HasVInstructions, // PseudoVREDMAX_VS_MF2_MASK = 8009 CEFBS_HasVInstructions, // PseudoVREDMAX_VS_MF4 = 8010 CEFBS_HasVInstructions, // PseudoVREDMAX_VS_MF4_MASK = 8011 CEFBS_HasVInstructions, // PseudoVREDMAX_VS_MF8 = 8012 CEFBS_HasVInstructions, // PseudoVREDMAX_VS_MF8_MASK = 8013 CEFBS_HasVInstructions, // PseudoVREDMINU_VS_M1 = 8014 CEFBS_HasVInstructions, // PseudoVREDMINU_VS_M1_MASK = 8015 CEFBS_HasVInstructions, // PseudoVREDMINU_VS_M2 = 8016 CEFBS_HasVInstructions, // PseudoVREDMINU_VS_M2_MASK = 8017 CEFBS_HasVInstructions, // PseudoVREDMINU_VS_M4 = 8018 CEFBS_HasVInstructions, // PseudoVREDMINU_VS_M4_MASK = 8019 CEFBS_HasVInstructions, // PseudoVREDMINU_VS_M8 = 8020 CEFBS_HasVInstructions, // PseudoVREDMINU_VS_M8_MASK = 8021 CEFBS_HasVInstructions, // PseudoVREDMINU_VS_MF2 = 8022 CEFBS_HasVInstructions, // PseudoVREDMINU_VS_MF2_MASK = 8023 CEFBS_HasVInstructions, // PseudoVREDMINU_VS_MF4 = 8024 CEFBS_HasVInstructions, // PseudoVREDMINU_VS_MF4_MASK = 8025 CEFBS_HasVInstructions, // PseudoVREDMINU_VS_MF8 = 8026 CEFBS_HasVInstructions, // PseudoVREDMINU_VS_MF8_MASK = 8027 CEFBS_HasVInstructions, // PseudoVREDMIN_VS_M1 = 8028 CEFBS_HasVInstructions, // PseudoVREDMIN_VS_M1_MASK = 8029 CEFBS_HasVInstructions, // PseudoVREDMIN_VS_M2 = 8030 CEFBS_HasVInstructions, // PseudoVREDMIN_VS_M2_MASK = 8031 CEFBS_HasVInstructions, // PseudoVREDMIN_VS_M4 = 8032 CEFBS_HasVInstructions, // PseudoVREDMIN_VS_M4_MASK = 8033 CEFBS_HasVInstructions, // PseudoVREDMIN_VS_M8 = 8034 CEFBS_HasVInstructions, // PseudoVREDMIN_VS_M8_MASK = 8035 CEFBS_HasVInstructions, // PseudoVREDMIN_VS_MF2 = 8036 CEFBS_HasVInstructions, // PseudoVREDMIN_VS_MF2_MASK = 8037 CEFBS_HasVInstructions, // PseudoVREDMIN_VS_MF4 = 8038 CEFBS_HasVInstructions, // PseudoVREDMIN_VS_MF4_MASK = 8039 CEFBS_HasVInstructions, // PseudoVREDMIN_VS_MF8 = 8040 CEFBS_HasVInstructions, // PseudoVREDMIN_VS_MF8_MASK = 8041 CEFBS_HasVInstructions, // PseudoVREDOR_VS_M1 = 8042 CEFBS_HasVInstructions, // PseudoVREDOR_VS_M1_MASK = 8043 CEFBS_HasVInstructions, // PseudoVREDOR_VS_M2 = 8044 CEFBS_HasVInstructions, // PseudoVREDOR_VS_M2_MASK = 8045 CEFBS_HasVInstructions, // PseudoVREDOR_VS_M4 = 8046 CEFBS_HasVInstructions, // PseudoVREDOR_VS_M4_MASK = 8047 CEFBS_HasVInstructions, // PseudoVREDOR_VS_M8 = 8048 CEFBS_HasVInstructions, // PseudoVREDOR_VS_M8_MASK = 8049 CEFBS_HasVInstructions, // PseudoVREDOR_VS_MF2 = 8050 CEFBS_HasVInstructions, // PseudoVREDOR_VS_MF2_MASK = 8051 CEFBS_HasVInstructions, // PseudoVREDOR_VS_MF4 = 8052 CEFBS_HasVInstructions, // PseudoVREDOR_VS_MF4_MASK = 8053 CEFBS_HasVInstructions, // PseudoVREDOR_VS_MF8 = 8054 CEFBS_HasVInstructions, // PseudoVREDOR_VS_MF8_MASK = 8055 CEFBS_HasVInstructions, // PseudoVREDSUM_VS_M1 = 8056 CEFBS_HasVInstructions, // PseudoVREDSUM_VS_M1_MASK = 8057 CEFBS_HasVInstructions, // PseudoVREDSUM_VS_M2 = 8058 CEFBS_HasVInstructions, // PseudoVREDSUM_VS_M2_MASK = 8059 CEFBS_HasVInstructions, // PseudoVREDSUM_VS_M4 = 8060 CEFBS_HasVInstructions, // PseudoVREDSUM_VS_M4_MASK = 8061 CEFBS_HasVInstructions, // PseudoVREDSUM_VS_M8 = 8062 CEFBS_HasVInstructions, // PseudoVREDSUM_VS_M8_MASK = 8063 CEFBS_HasVInstructions, // PseudoVREDSUM_VS_MF2 = 8064 CEFBS_HasVInstructions, // PseudoVREDSUM_VS_MF2_MASK = 8065 CEFBS_HasVInstructions, // PseudoVREDSUM_VS_MF4 = 8066 CEFBS_HasVInstructions, // PseudoVREDSUM_VS_MF4_MASK = 8067 CEFBS_HasVInstructions, // PseudoVREDSUM_VS_MF8 = 8068 CEFBS_HasVInstructions, // PseudoVREDSUM_VS_MF8_MASK = 8069 CEFBS_HasVInstructions, // PseudoVREDXOR_VS_M1 = 8070 CEFBS_HasVInstructions, // PseudoVREDXOR_VS_M1_MASK = 8071 CEFBS_HasVInstructions, // PseudoVREDXOR_VS_M2 = 8072 CEFBS_HasVInstructions, // PseudoVREDXOR_VS_M2_MASK = 8073 CEFBS_HasVInstructions, // PseudoVREDXOR_VS_M4 = 8074 CEFBS_HasVInstructions, // PseudoVREDXOR_VS_M4_MASK = 8075 CEFBS_HasVInstructions, // PseudoVREDXOR_VS_M8 = 8076 CEFBS_HasVInstructions, // PseudoVREDXOR_VS_M8_MASK = 8077 CEFBS_HasVInstructions, // PseudoVREDXOR_VS_MF2 = 8078 CEFBS_HasVInstructions, // PseudoVREDXOR_VS_MF2_MASK = 8079 CEFBS_HasVInstructions, // PseudoVREDXOR_VS_MF4 = 8080 CEFBS_HasVInstructions, // PseudoVREDXOR_VS_MF4_MASK = 8081 CEFBS_HasVInstructions, // PseudoVREDXOR_VS_MF8 = 8082 CEFBS_HasVInstructions, // PseudoVREDXOR_VS_MF8_MASK = 8083 CEFBS_HasVInstructions, // PseudoVRELOAD2_M1 = 8084 CEFBS_HasVInstructions, // PseudoVRELOAD2_M2 = 8085 CEFBS_HasVInstructions, // PseudoVRELOAD2_M4 = 8086 CEFBS_HasVInstructions, // PseudoVRELOAD2_MF2 = 8087 CEFBS_HasVInstructions, // PseudoVRELOAD2_MF4 = 8088 CEFBS_HasVInstructions, // PseudoVRELOAD2_MF8 = 8089 CEFBS_HasVInstructions, // PseudoVRELOAD3_M1 = 8090 CEFBS_HasVInstructions, // PseudoVRELOAD3_M2 = 8091 CEFBS_HasVInstructions, // PseudoVRELOAD3_MF2 = 8092 CEFBS_HasVInstructions, // PseudoVRELOAD3_MF4 = 8093 CEFBS_HasVInstructions, // PseudoVRELOAD3_MF8 = 8094 CEFBS_HasVInstructions, // PseudoVRELOAD4_M1 = 8095 CEFBS_HasVInstructions, // PseudoVRELOAD4_M2 = 8096 CEFBS_HasVInstructions, // PseudoVRELOAD4_MF2 = 8097 CEFBS_HasVInstructions, // PseudoVRELOAD4_MF4 = 8098 CEFBS_HasVInstructions, // PseudoVRELOAD4_MF8 = 8099 CEFBS_HasVInstructions, // PseudoVRELOAD5_M1 = 8100 CEFBS_HasVInstructions, // PseudoVRELOAD5_MF2 = 8101 CEFBS_HasVInstructions, // PseudoVRELOAD5_MF4 = 8102 CEFBS_HasVInstructions, // PseudoVRELOAD5_MF8 = 8103 CEFBS_HasVInstructions, // PseudoVRELOAD6_M1 = 8104 CEFBS_HasVInstructions, // PseudoVRELOAD6_MF2 = 8105 CEFBS_HasVInstructions, // PseudoVRELOAD6_MF4 = 8106 CEFBS_HasVInstructions, // PseudoVRELOAD6_MF8 = 8107 CEFBS_HasVInstructions, // PseudoVRELOAD7_M1 = 8108 CEFBS_HasVInstructions, // PseudoVRELOAD7_MF2 = 8109 CEFBS_HasVInstructions, // PseudoVRELOAD7_MF4 = 8110 CEFBS_HasVInstructions, // PseudoVRELOAD7_MF8 = 8111 CEFBS_HasVInstructions, // PseudoVRELOAD8_M1 = 8112 CEFBS_HasVInstructions, // PseudoVRELOAD8_MF2 = 8113 CEFBS_HasVInstructions, // PseudoVRELOAD8_MF4 = 8114 CEFBS_HasVInstructions, // PseudoVRELOAD8_MF8 = 8115 CEFBS_HasVInstructions, // PseudoVREMU_VV_M1 = 8116 CEFBS_HasVInstructions, // PseudoVREMU_VV_M1_MASK = 8117 CEFBS_HasVInstructions, // PseudoVREMU_VV_M1_TU = 8118 CEFBS_HasVInstructions, // PseudoVREMU_VV_M2 = 8119 CEFBS_HasVInstructions, // PseudoVREMU_VV_M2_MASK = 8120 CEFBS_HasVInstructions, // PseudoVREMU_VV_M2_TU = 8121 CEFBS_HasVInstructions, // PseudoVREMU_VV_M4 = 8122 CEFBS_HasVInstructions, // PseudoVREMU_VV_M4_MASK = 8123 CEFBS_HasVInstructions, // PseudoVREMU_VV_M4_TU = 8124 CEFBS_HasVInstructions, // PseudoVREMU_VV_M8 = 8125 CEFBS_HasVInstructions, // PseudoVREMU_VV_M8_MASK = 8126 CEFBS_HasVInstructions, // PseudoVREMU_VV_M8_TU = 8127 CEFBS_HasVInstructions, // PseudoVREMU_VV_MF2 = 8128 CEFBS_HasVInstructions, // PseudoVREMU_VV_MF2_MASK = 8129 CEFBS_HasVInstructions, // PseudoVREMU_VV_MF2_TU = 8130 CEFBS_HasVInstructions, // PseudoVREMU_VV_MF4 = 8131 CEFBS_HasVInstructions, // PseudoVREMU_VV_MF4_MASK = 8132 CEFBS_HasVInstructions, // PseudoVREMU_VV_MF4_TU = 8133 CEFBS_HasVInstructions, // PseudoVREMU_VV_MF8 = 8134 CEFBS_HasVInstructions, // PseudoVREMU_VV_MF8_MASK = 8135 CEFBS_HasVInstructions, // PseudoVREMU_VV_MF8_TU = 8136 CEFBS_HasVInstructions, // PseudoVREMU_VX_M1 = 8137 CEFBS_HasVInstructions, // PseudoVREMU_VX_M1_MASK = 8138 CEFBS_HasVInstructions, // PseudoVREMU_VX_M1_TU = 8139 CEFBS_HasVInstructions, // PseudoVREMU_VX_M2 = 8140 CEFBS_HasVInstructions, // PseudoVREMU_VX_M2_MASK = 8141 CEFBS_HasVInstructions, // PseudoVREMU_VX_M2_TU = 8142 CEFBS_HasVInstructions, // PseudoVREMU_VX_M4 = 8143 CEFBS_HasVInstructions, // PseudoVREMU_VX_M4_MASK = 8144 CEFBS_HasVInstructions, // PseudoVREMU_VX_M4_TU = 8145 CEFBS_HasVInstructions, // PseudoVREMU_VX_M8 = 8146 CEFBS_HasVInstructions, // PseudoVREMU_VX_M8_MASK = 8147 CEFBS_HasVInstructions, // PseudoVREMU_VX_M8_TU = 8148 CEFBS_HasVInstructions, // PseudoVREMU_VX_MF2 = 8149 CEFBS_HasVInstructions, // PseudoVREMU_VX_MF2_MASK = 8150 CEFBS_HasVInstructions, // PseudoVREMU_VX_MF2_TU = 8151 CEFBS_HasVInstructions, // PseudoVREMU_VX_MF4 = 8152 CEFBS_HasVInstructions, // PseudoVREMU_VX_MF4_MASK = 8153 CEFBS_HasVInstructions, // PseudoVREMU_VX_MF4_TU = 8154 CEFBS_HasVInstructions, // PseudoVREMU_VX_MF8 = 8155 CEFBS_HasVInstructions, // PseudoVREMU_VX_MF8_MASK = 8156 CEFBS_HasVInstructions, // PseudoVREMU_VX_MF8_TU = 8157 CEFBS_HasVInstructions, // PseudoVREM_VV_M1 = 8158 CEFBS_HasVInstructions, // PseudoVREM_VV_M1_MASK = 8159 CEFBS_HasVInstructions, // PseudoVREM_VV_M1_TU = 8160 CEFBS_HasVInstructions, // PseudoVREM_VV_M2 = 8161 CEFBS_HasVInstructions, // PseudoVREM_VV_M2_MASK = 8162 CEFBS_HasVInstructions, // PseudoVREM_VV_M2_TU = 8163 CEFBS_HasVInstructions, // PseudoVREM_VV_M4 = 8164 CEFBS_HasVInstructions, // PseudoVREM_VV_M4_MASK = 8165 CEFBS_HasVInstructions, // PseudoVREM_VV_M4_TU = 8166 CEFBS_HasVInstructions, // PseudoVREM_VV_M8 = 8167 CEFBS_HasVInstructions, // PseudoVREM_VV_M8_MASK = 8168 CEFBS_HasVInstructions, // PseudoVREM_VV_M8_TU = 8169 CEFBS_HasVInstructions, // PseudoVREM_VV_MF2 = 8170 CEFBS_HasVInstructions, // PseudoVREM_VV_MF2_MASK = 8171 CEFBS_HasVInstructions, // PseudoVREM_VV_MF2_TU = 8172 CEFBS_HasVInstructions, // PseudoVREM_VV_MF4 = 8173 CEFBS_HasVInstructions, // PseudoVREM_VV_MF4_MASK = 8174 CEFBS_HasVInstructions, // PseudoVREM_VV_MF4_TU = 8175 CEFBS_HasVInstructions, // PseudoVREM_VV_MF8 = 8176 CEFBS_HasVInstructions, // PseudoVREM_VV_MF8_MASK = 8177 CEFBS_HasVInstructions, // PseudoVREM_VV_MF8_TU = 8178 CEFBS_HasVInstructions, // PseudoVREM_VX_M1 = 8179 CEFBS_HasVInstructions, // PseudoVREM_VX_M1_MASK = 8180 CEFBS_HasVInstructions, // PseudoVREM_VX_M1_TU = 8181 CEFBS_HasVInstructions, // PseudoVREM_VX_M2 = 8182 CEFBS_HasVInstructions, // PseudoVREM_VX_M2_MASK = 8183 CEFBS_HasVInstructions, // PseudoVREM_VX_M2_TU = 8184 CEFBS_HasVInstructions, // PseudoVREM_VX_M4 = 8185 CEFBS_HasVInstructions, // PseudoVREM_VX_M4_MASK = 8186 CEFBS_HasVInstructions, // PseudoVREM_VX_M4_TU = 8187 CEFBS_HasVInstructions, // PseudoVREM_VX_M8 = 8188 CEFBS_HasVInstructions, // PseudoVREM_VX_M8_MASK = 8189 CEFBS_HasVInstructions, // PseudoVREM_VX_M8_TU = 8190 CEFBS_HasVInstructions, // PseudoVREM_VX_MF2 = 8191 CEFBS_HasVInstructions, // PseudoVREM_VX_MF2_MASK = 8192 CEFBS_HasVInstructions, // PseudoVREM_VX_MF2_TU = 8193 CEFBS_HasVInstructions, // PseudoVREM_VX_MF4 = 8194 CEFBS_HasVInstructions, // PseudoVREM_VX_MF4_MASK = 8195 CEFBS_HasVInstructions, // PseudoVREM_VX_MF4_TU = 8196 CEFBS_HasVInstructions, // PseudoVREM_VX_MF8 = 8197 CEFBS_HasVInstructions, // PseudoVREM_VX_MF8_MASK = 8198 CEFBS_HasVInstructions, // PseudoVREM_VX_MF8_TU = 8199 CEFBS_None, // PseudoVRGATHEREI16_VV_M1_M1 = 8200 CEFBS_None, // PseudoVRGATHEREI16_VV_M1_M1_MASK = 8201 CEFBS_None, // PseudoVRGATHEREI16_VV_M1_M1_TU = 8202 CEFBS_None, // PseudoVRGATHEREI16_VV_M1_M2 = 8203 CEFBS_None, // PseudoVRGATHEREI16_VV_M1_M2_MASK = 8204 CEFBS_None, // PseudoVRGATHEREI16_VV_M1_M2_TU = 8205 CEFBS_None, // PseudoVRGATHEREI16_VV_M1_MF2 = 8206 CEFBS_None, // PseudoVRGATHEREI16_VV_M1_MF2_MASK = 8207 CEFBS_None, // PseudoVRGATHEREI16_VV_M1_MF2_TU = 8208 CEFBS_None, // PseudoVRGATHEREI16_VV_M1_MF4 = 8209 CEFBS_None, // PseudoVRGATHEREI16_VV_M1_MF4_MASK = 8210 CEFBS_None, // PseudoVRGATHEREI16_VV_M1_MF4_TU = 8211 CEFBS_None, // PseudoVRGATHEREI16_VV_M2_M1 = 8212 CEFBS_None, // PseudoVRGATHEREI16_VV_M2_M1_MASK = 8213 CEFBS_None, // PseudoVRGATHEREI16_VV_M2_M1_TU = 8214 CEFBS_None, // PseudoVRGATHEREI16_VV_M2_M2 = 8215 CEFBS_None, // PseudoVRGATHEREI16_VV_M2_M2_MASK = 8216 CEFBS_None, // PseudoVRGATHEREI16_VV_M2_M2_TU = 8217 CEFBS_None, // PseudoVRGATHEREI16_VV_M2_M4 = 8218 CEFBS_None, // PseudoVRGATHEREI16_VV_M2_M4_MASK = 8219 CEFBS_None, // PseudoVRGATHEREI16_VV_M2_M4_TU = 8220 CEFBS_None, // PseudoVRGATHEREI16_VV_M2_MF2 = 8221 CEFBS_None, // PseudoVRGATHEREI16_VV_M2_MF2_MASK = 8222 CEFBS_None, // PseudoVRGATHEREI16_VV_M2_MF2_TU = 8223 CEFBS_None, // PseudoVRGATHEREI16_VV_M4_M1 = 8224 CEFBS_None, // PseudoVRGATHEREI16_VV_M4_M1_MASK = 8225 CEFBS_None, // PseudoVRGATHEREI16_VV_M4_M1_TU = 8226 CEFBS_None, // PseudoVRGATHEREI16_VV_M4_M2 = 8227 CEFBS_None, // PseudoVRGATHEREI16_VV_M4_M2_MASK = 8228 CEFBS_None, // PseudoVRGATHEREI16_VV_M4_M2_TU = 8229 CEFBS_None, // PseudoVRGATHEREI16_VV_M4_M4 = 8230 CEFBS_None, // PseudoVRGATHEREI16_VV_M4_M4_MASK = 8231 CEFBS_None, // PseudoVRGATHEREI16_VV_M4_M4_TU = 8232 CEFBS_None, // PseudoVRGATHEREI16_VV_M4_M8 = 8233 CEFBS_None, // PseudoVRGATHEREI16_VV_M4_M8_MASK = 8234 CEFBS_None, // PseudoVRGATHEREI16_VV_M4_M8_TU = 8235 CEFBS_None, // PseudoVRGATHEREI16_VV_M8_M2 = 8236 CEFBS_None, // PseudoVRGATHEREI16_VV_M8_M2_MASK = 8237 CEFBS_None, // PseudoVRGATHEREI16_VV_M8_M2_TU = 8238 CEFBS_None, // PseudoVRGATHEREI16_VV_M8_M4 = 8239 CEFBS_None, // PseudoVRGATHEREI16_VV_M8_M4_MASK = 8240 CEFBS_None, // PseudoVRGATHEREI16_VV_M8_M4_TU = 8241 CEFBS_None, // PseudoVRGATHEREI16_VV_M8_M8 = 8242 CEFBS_None, // PseudoVRGATHEREI16_VV_M8_M8_MASK = 8243 CEFBS_None, // PseudoVRGATHEREI16_VV_M8_M8_TU = 8244 CEFBS_None, // PseudoVRGATHEREI16_VV_MF2_M1 = 8245 CEFBS_None, // PseudoVRGATHEREI16_VV_MF2_M1_MASK = 8246 CEFBS_None, // PseudoVRGATHEREI16_VV_MF2_M1_TU = 8247 CEFBS_None, // PseudoVRGATHEREI16_VV_MF2_MF2 = 8248 CEFBS_None, // PseudoVRGATHEREI16_VV_MF2_MF2_MASK = 8249 CEFBS_None, // PseudoVRGATHEREI16_VV_MF2_MF2_TU = 8250 CEFBS_None, // PseudoVRGATHEREI16_VV_MF2_MF4 = 8251 CEFBS_None, // PseudoVRGATHEREI16_VV_MF2_MF4_MASK = 8252 CEFBS_None, // PseudoVRGATHEREI16_VV_MF2_MF4_TU = 8253 CEFBS_None, // PseudoVRGATHEREI16_VV_MF2_MF8 = 8254 CEFBS_None, // PseudoVRGATHEREI16_VV_MF2_MF8_MASK = 8255 CEFBS_None, // PseudoVRGATHEREI16_VV_MF2_MF8_TU = 8256 CEFBS_None, // PseudoVRGATHEREI16_VV_MF4_MF2 = 8257 CEFBS_None, // PseudoVRGATHEREI16_VV_MF4_MF2_MASK = 8258 CEFBS_None, // PseudoVRGATHEREI16_VV_MF4_MF2_TU = 8259 CEFBS_None, // PseudoVRGATHEREI16_VV_MF4_MF4 = 8260 CEFBS_None, // PseudoVRGATHEREI16_VV_MF4_MF4_MASK = 8261 CEFBS_None, // PseudoVRGATHEREI16_VV_MF4_MF4_TU = 8262 CEFBS_None, // PseudoVRGATHEREI16_VV_MF4_MF8 = 8263 CEFBS_None, // PseudoVRGATHEREI16_VV_MF4_MF8_MASK = 8264 CEFBS_None, // PseudoVRGATHEREI16_VV_MF4_MF8_TU = 8265 CEFBS_None, // PseudoVRGATHEREI16_VV_MF8_MF4 = 8266 CEFBS_None, // PseudoVRGATHEREI16_VV_MF8_MF4_MASK = 8267 CEFBS_None, // PseudoVRGATHEREI16_VV_MF8_MF4_TU = 8268 CEFBS_None, // PseudoVRGATHEREI16_VV_MF8_MF8 = 8269 CEFBS_None, // PseudoVRGATHEREI16_VV_MF8_MF8_MASK = 8270 CEFBS_None, // PseudoVRGATHEREI16_VV_MF8_MF8_TU = 8271 CEFBS_None, // PseudoVRGATHER_VI_M1 = 8272 CEFBS_None, // PseudoVRGATHER_VI_M1_MASK = 8273 CEFBS_None, // PseudoVRGATHER_VI_M1_TU = 8274 CEFBS_None, // PseudoVRGATHER_VI_M2 = 8275 CEFBS_None, // PseudoVRGATHER_VI_M2_MASK = 8276 CEFBS_None, // PseudoVRGATHER_VI_M2_TU = 8277 CEFBS_None, // PseudoVRGATHER_VI_M4 = 8278 CEFBS_None, // PseudoVRGATHER_VI_M4_MASK = 8279 CEFBS_None, // PseudoVRGATHER_VI_M4_TU = 8280 CEFBS_None, // PseudoVRGATHER_VI_M8 = 8281 CEFBS_None, // PseudoVRGATHER_VI_M8_MASK = 8282 CEFBS_None, // PseudoVRGATHER_VI_M8_TU = 8283 CEFBS_None, // PseudoVRGATHER_VI_MF2 = 8284 CEFBS_None, // PseudoVRGATHER_VI_MF2_MASK = 8285 CEFBS_None, // PseudoVRGATHER_VI_MF2_TU = 8286 CEFBS_None, // PseudoVRGATHER_VI_MF4 = 8287 CEFBS_None, // PseudoVRGATHER_VI_MF4_MASK = 8288 CEFBS_None, // PseudoVRGATHER_VI_MF4_TU = 8289 CEFBS_None, // PseudoVRGATHER_VI_MF8 = 8290 CEFBS_None, // PseudoVRGATHER_VI_MF8_MASK = 8291 CEFBS_None, // PseudoVRGATHER_VI_MF8_TU = 8292 CEFBS_None, // PseudoVRGATHER_VV_M1 = 8293 CEFBS_None, // PseudoVRGATHER_VV_M1_MASK = 8294 CEFBS_None, // PseudoVRGATHER_VV_M1_TU = 8295 CEFBS_None, // PseudoVRGATHER_VV_M2 = 8296 CEFBS_None, // PseudoVRGATHER_VV_M2_MASK = 8297 CEFBS_None, // PseudoVRGATHER_VV_M2_TU = 8298 CEFBS_None, // PseudoVRGATHER_VV_M4 = 8299 CEFBS_None, // PseudoVRGATHER_VV_M4_MASK = 8300 CEFBS_None, // PseudoVRGATHER_VV_M4_TU = 8301 CEFBS_None, // PseudoVRGATHER_VV_M8 = 8302 CEFBS_None, // PseudoVRGATHER_VV_M8_MASK = 8303 CEFBS_None, // PseudoVRGATHER_VV_M8_TU = 8304 CEFBS_None, // PseudoVRGATHER_VV_MF2 = 8305 CEFBS_None, // PseudoVRGATHER_VV_MF2_MASK = 8306 CEFBS_None, // PseudoVRGATHER_VV_MF2_TU = 8307 CEFBS_None, // PseudoVRGATHER_VV_MF4 = 8308 CEFBS_None, // PseudoVRGATHER_VV_MF4_MASK = 8309 CEFBS_None, // PseudoVRGATHER_VV_MF4_TU = 8310 CEFBS_None, // PseudoVRGATHER_VV_MF8 = 8311 CEFBS_None, // PseudoVRGATHER_VV_MF8_MASK = 8312 CEFBS_None, // PseudoVRGATHER_VV_MF8_TU = 8313 CEFBS_None, // PseudoVRGATHER_VX_M1 = 8314 CEFBS_None, // PseudoVRGATHER_VX_M1_MASK = 8315 CEFBS_None, // PseudoVRGATHER_VX_M1_TU = 8316 CEFBS_None, // PseudoVRGATHER_VX_M2 = 8317 CEFBS_None, // PseudoVRGATHER_VX_M2_MASK = 8318 CEFBS_None, // PseudoVRGATHER_VX_M2_TU = 8319 CEFBS_None, // PseudoVRGATHER_VX_M4 = 8320 CEFBS_None, // PseudoVRGATHER_VX_M4_MASK = 8321 CEFBS_None, // PseudoVRGATHER_VX_M4_TU = 8322 CEFBS_None, // PseudoVRGATHER_VX_M8 = 8323 CEFBS_None, // PseudoVRGATHER_VX_M8_MASK = 8324 CEFBS_None, // PseudoVRGATHER_VX_M8_TU = 8325 CEFBS_None, // PseudoVRGATHER_VX_MF2 = 8326 CEFBS_None, // PseudoVRGATHER_VX_MF2_MASK = 8327 CEFBS_None, // PseudoVRGATHER_VX_MF2_TU = 8328 CEFBS_None, // PseudoVRGATHER_VX_MF4 = 8329 CEFBS_None, // PseudoVRGATHER_VX_MF4_MASK = 8330 CEFBS_None, // PseudoVRGATHER_VX_MF4_TU = 8331 CEFBS_None, // PseudoVRGATHER_VX_MF8 = 8332 CEFBS_None, // PseudoVRGATHER_VX_MF8_MASK = 8333 CEFBS_None, // PseudoVRGATHER_VX_MF8_TU = 8334 CEFBS_HasVInstructions, // PseudoVRSUB_VI_M1 = 8335 CEFBS_HasVInstructions, // PseudoVRSUB_VI_M1_MASK = 8336 CEFBS_HasVInstructions, // PseudoVRSUB_VI_M1_TU = 8337 CEFBS_HasVInstructions, // PseudoVRSUB_VI_M2 = 8338 CEFBS_HasVInstructions, // PseudoVRSUB_VI_M2_MASK = 8339 CEFBS_HasVInstructions, // PseudoVRSUB_VI_M2_TU = 8340 CEFBS_HasVInstructions, // PseudoVRSUB_VI_M4 = 8341 CEFBS_HasVInstructions, // PseudoVRSUB_VI_M4_MASK = 8342 CEFBS_HasVInstructions, // PseudoVRSUB_VI_M4_TU = 8343 CEFBS_HasVInstructions, // PseudoVRSUB_VI_M8 = 8344 CEFBS_HasVInstructions, // PseudoVRSUB_VI_M8_MASK = 8345 CEFBS_HasVInstructions, // PseudoVRSUB_VI_M8_TU = 8346 CEFBS_HasVInstructions, // PseudoVRSUB_VI_MF2 = 8347 CEFBS_HasVInstructions, // PseudoVRSUB_VI_MF2_MASK = 8348 CEFBS_HasVInstructions, // PseudoVRSUB_VI_MF2_TU = 8349 CEFBS_HasVInstructions, // PseudoVRSUB_VI_MF4 = 8350 CEFBS_HasVInstructions, // PseudoVRSUB_VI_MF4_MASK = 8351 CEFBS_HasVInstructions, // PseudoVRSUB_VI_MF4_TU = 8352 CEFBS_HasVInstructions, // PseudoVRSUB_VI_MF8 = 8353 CEFBS_HasVInstructions, // PseudoVRSUB_VI_MF8_MASK = 8354 CEFBS_HasVInstructions, // PseudoVRSUB_VI_MF8_TU = 8355 CEFBS_HasVInstructions, // PseudoVRSUB_VX_M1 = 8356 CEFBS_HasVInstructions, // PseudoVRSUB_VX_M1_MASK = 8357 CEFBS_HasVInstructions, // PseudoVRSUB_VX_M1_TU = 8358 CEFBS_HasVInstructions, // PseudoVRSUB_VX_M2 = 8359 CEFBS_HasVInstructions, // PseudoVRSUB_VX_M2_MASK = 8360 CEFBS_HasVInstructions, // PseudoVRSUB_VX_M2_TU = 8361 CEFBS_HasVInstructions, // PseudoVRSUB_VX_M4 = 8362 CEFBS_HasVInstructions, // PseudoVRSUB_VX_M4_MASK = 8363 CEFBS_HasVInstructions, // PseudoVRSUB_VX_M4_TU = 8364 CEFBS_HasVInstructions, // PseudoVRSUB_VX_M8 = 8365 CEFBS_HasVInstructions, // PseudoVRSUB_VX_M8_MASK = 8366 CEFBS_HasVInstructions, // PseudoVRSUB_VX_M8_TU = 8367 CEFBS_HasVInstructions, // PseudoVRSUB_VX_MF2 = 8368 CEFBS_HasVInstructions, // PseudoVRSUB_VX_MF2_MASK = 8369 CEFBS_HasVInstructions, // PseudoVRSUB_VX_MF2_TU = 8370 CEFBS_HasVInstructions, // PseudoVRSUB_VX_MF4 = 8371 CEFBS_HasVInstructions, // PseudoVRSUB_VX_MF4_MASK = 8372 CEFBS_HasVInstructions, // PseudoVRSUB_VX_MF4_TU = 8373 CEFBS_HasVInstructions, // PseudoVRSUB_VX_MF8 = 8374 CEFBS_HasVInstructions, // PseudoVRSUB_VX_MF8_MASK = 8375 CEFBS_HasVInstructions, // PseudoVRSUB_VX_MF8_TU = 8376 CEFBS_HasVInstructions, // PseudoVSADDU_VI_M1 = 8377 CEFBS_HasVInstructions, // PseudoVSADDU_VI_M1_MASK = 8378 CEFBS_HasVInstructions, // PseudoVSADDU_VI_M1_TU = 8379 CEFBS_HasVInstructions, // PseudoVSADDU_VI_M2 = 8380 CEFBS_HasVInstructions, // PseudoVSADDU_VI_M2_MASK = 8381 CEFBS_HasVInstructions, // PseudoVSADDU_VI_M2_TU = 8382 CEFBS_HasVInstructions, // PseudoVSADDU_VI_M4 = 8383 CEFBS_HasVInstructions, // PseudoVSADDU_VI_M4_MASK = 8384 CEFBS_HasVInstructions, // PseudoVSADDU_VI_M4_TU = 8385 CEFBS_HasVInstructions, // PseudoVSADDU_VI_M8 = 8386 CEFBS_HasVInstructions, // PseudoVSADDU_VI_M8_MASK = 8387 CEFBS_HasVInstructions, // PseudoVSADDU_VI_M8_TU = 8388 CEFBS_HasVInstructions, // PseudoVSADDU_VI_MF2 = 8389 CEFBS_HasVInstructions, // PseudoVSADDU_VI_MF2_MASK = 8390 CEFBS_HasVInstructions, // PseudoVSADDU_VI_MF2_TU = 8391 CEFBS_HasVInstructions, // PseudoVSADDU_VI_MF4 = 8392 CEFBS_HasVInstructions, // PseudoVSADDU_VI_MF4_MASK = 8393 CEFBS_HasVInstructions, // PseudoVSADDU_VI_MF4_TU = 8394 CEFBS_HasVInstructions, // PseudoVSADDU_VI_MF8 = 8395 CEFBS_HasVInstructions, // PseudoVSADDU_VI_MF8_MASK = 8396 CEFBS_HasVInstructions, // PseudoVSADDU_VI_MF8_TU = 8397 CEFBS_HasVInstructions, // PseudoVSADDU_VV_M1 = 8398 CEFBS_HasVInstructions, // PseudoVSADDU_VV_M1_MASK = 8399 CEFBS_HasVInstructions, // PseudoVSADDU_VV_M1_TU = 8400 CEFBS_HasVInstructions, // PseudoVSADDU_VV_M2 = 8401 CEFBS_HasVInstructions, // PseudoVSADDU_VV_M2_MASK = 8402 CEFBS_HasVInstructions, // PseudoVSADDU_VV_M2_TU = 8403 CEFBS_HasVInstructions, // PseudoVSADDU_VV_M4 = 8404 CEFBS_HasVInstructions, // PseudoVSADDU_VV_M4_MASK = 8405 CEFBS_HasVInstructions, // PseudoVSADDU_VV_M4_TU = 8406 CEFBS_HasVInstructions, // PseudoVSADDU_VV_M8 = 8407 CEFBS_HasVInstructions, // PseudoVSADDU_VV_M8_MASK = 8408 CEFBS_HasVInstructions, // PseudoVSADDU_VV_M8_TU = 8409 CEFBS_HasVInstructions, // PseudoVSADDU_VV_MF2 = 8410 CEFBS_HasVInstructions, // PseudoVSADDU_VV_MF2_MASK = 8411 CEFBS_HasVInstructions, // PseudoVSADDU_VV_MF2_TU = 8412 CEFBS_HasVInstructions, // PseudoVSADDU_VV_MF4 = 8413 CEFBS_HasVInstructions, // PseudoVSADDU_VV_MF4_MASK = 8414 CEFBS_HasVInstructions, // PseudoVSADDU_VV_MF4_TU = 8415 CEFBS_HasVInstructions, // PseudoVSADDU_VV_MF8 = 8416 CEFBS_HasVInstructions, // PseudoVSADDU_VV_MF8_MASK = 8417 CEFBS_HasVInstructions, // PseudoVSADDU_VV_MF8_TU = 8418 CEFBS_HasVInstructions, // PseudoVSADDU_VX_M1 = 8419 CEFBS_HasVInstructions, // PseudoVSADDU_VX_M1_MASK = 8420 CEFBS_HasVInstructions, // PseudoVSADDU_VX_M1_TU = 8421 CEFBS_HasVInstructions, // PseudoVSADDU_VX_M2 = 8422 CEFBS_HasVInstructions, // PseudoVSADDU_VX_M2_MASK = 8423 CEFBS_HasVInstructions, // PseudoVSADDU_VX_M2_TU = 8424 CEFBS_HasVInstructions, // PseudoVSADDU_VX_M4 = 8425 CEFBS_HasVInstructions, // PseudoVSADDU_VX_M4_MASK = 8426 CEFBS_HasVInstructions, // PseudoVSADDU_VX_M4_TU = 8427 CEFBS_HasVInstructions, // PseudoVSADDU_VX_M8 = 8428 CEFBS_HasVInstructions, // PseudoVSADDU_VX_M8_MASK = 8429 CEFBS_HasVInstructions, // PseudoVSADDU_VX_M8_TU = 8430 CEFBS_HasVInstructions, // PseudoVSADDU_VX_MF2 = 8431 CEFBS_HasVInstructions, // PseudoVSADDU_VX_MF2_MASK = 8432 CEFBS_HasVInstructions, // PseudoVSADDU_VX_MF2_TU = 8433 CEFBS_HasVInstructions, // PseudoVSADDU_VX_MF4 = 8434 CEFBS_HasVInstructions, // PseudoVSADDU_VX_MF4_MASK = 8435 CEFBS_HasVInstructions, // PseudoVSADDU_VX_MF4_TU = 8436 CEFBS_HasVInstructions, // PseudoVSADDU_VX_MF8 = 8437 CEFBS_HasVInstructions, // PseudoVSADDU_VX_MF8_MASK = 8438 CEFBS_HasVInstructions, // PseudoVSADDU_VX_MF8_TU = 8439 CEFBS_HasVInstructions, // PseudoVSADD_VI_M1 = 8440 CEFBS_HasVInstructions, // PseudoVSADD_VI_M1_MASK = 8441 CEFBS_HasVInstructions, // PseudoVSADD_VI_M1_TU = 8442 CEFBS_HasVInstructions, // PseudoVSADD_VI_M2 = 8443 CEFBS_HasVInstructions, // PseudoVSADD_VI_M2_MASK = 8444 CEFBS_HasVInstructions, // PseudoVSADD_VI_M2_TU = 8445 CEFBS_HasVInstructions, // PseudoVSADD_VI_M4 = 8446 CEFBS_HasVInstructions, // PseudoVSADD_VI_M4_MASK = 8447 CEFBS_HasVInstructions, // PseudoVSADD_VI_M4_TU = 8448 CEFBS_HasVInstructions, // PseudoVSADD_VI_M8 = 8449 CEFBS_HasVInstructions, // PseudoVSADD_VI_M8_MASK = 8450 CEFBS_HasVInstructions, // PseudoVSADD_VI_M8_TU = 8451 CEFBS_HasVInstructions, // PseudoVSADD_VI_MF2 = 8452 CEFBS_HasVInstructions, // PseudoVSADD_VI_MF2_MASK = 8453 CEFBS_HasVInstructions, // PseudoVSADD_VI_MF2_TU = 8454 CEFBS_HasVInstructions, // PseudoVSADD_VI_MF4 = 8455 CEFBS_HasVInstructions, // PseudoVSADD_VI_MF4_MASK = 8456 CEFBS_HasVInstructions, // PseudoVSADD_VI_MF4_TU = 8457 CEFBS_HasVInstructions, // PseudoVSADD_VI_MF8 = 8458 CEFBS_HasVInstructions, // PseudoVSADD_VI_MF8_MASK = 8459 CEFBS_HasVInstructions, // PseudoVSADD_VI_MF8_TU = 8460 CEFBS_HasVInstructions, // PseudoVSADD_VV_M1 = 8461 CEFBS_HasVInstructions, // PseudoVSADD_VV_M1_MASK = 8462 CEFBS_HasVInstructions, // PseudoVSADD_VV_M1_TU = 8463 CEFBS_HasVInstructions, // PseudoVSADD_VV_M2 = 8464 CEFBS_HasVInstructions, // PseudoVSADD_VV_M2_MASK = 8465 CEFBS_HasVInstructions, // PseudoVSADD_VV_M2_TU = 8466 CEFBS_HasVInstructions, // PseudoVSADD_VV_M4 = 8467 CEFBS_HasVInstructions, // PseudoVSADD_VV_M4_MASK = 8468 CEFBS_HasVInstructions, // PseudoVSADD_VV_M4_TU = 8469 CEFBS_HasVInstructions, // PseudoVSADD_VV_M8 = 8470 CEFBS_HasVInstructions, // PseudoVSADD_VV_M8_MASK = 8471 CEFBS_HasVInstructions, // PseudoVSADD_VV_M8_TU = 8472 CEFBS_HasVInstructions, // PseudoVSADD_VV_MF2 = 8473 CEFBS_HasVInstructions, // PseudoVSADD_VV_MF2_MASK = 8474 CEFBS_HasVInstructions, // PseudoVSADD_VV_MF2_TU = 8475 CEFBS_HasVInstructions, // PseudoVSADD_VV_MF4 = 8476 CEFBS_HasVInstructions, // PseudoVSADD_VV_MF4_MASK = 8477 CEFBS_HasVInstructions, // PseudoVSADD_VV_MF4_TU = 8478 CEFBS_HasVInstructions, // PseudoVSADD_VV_MF8 = 8479 CEFBS_HasVInstructions, // PseudoVSADD_VV_MF8_MASK = 8480 CEFBS_HasVInstructions, // PseudoVSADD_VV_MF8_TU = 8481 CEFBS_HasVInstructions, // PseudoVSADD_VX_M1 = 8482 CEFBS_HasVInstructions, // PseudoVSADD_VX_M1_MASK = 8483 CEFBS_HasVInstructions, // PseudoVSADD_VX_M1_TU = 8484 CEFBS_HasVInstructions, // PseudoVSADD_VX_M2 = 8485 CEFBS_HasVInstructions, // PseudoVSADD_VX_M2_MASK = 8486 CEFBS_HasVInstructions, // PseudoVSADD_VX_M2_TU = 8487 CEFBS_HasVInstructions, // PseudoVSADD_VX_M4 = 8488 CEFBS_HasVInstructions, // PseudoVSADD_VX_M4_MASK = 8489 CEFBS_HasVInstructions, // PseudoVSADD_VX_M4_TU = 8490 CEFBS_HasVInstructions, // PseudoVSADD_VX_M8 = 8491 CEFBS_HasVInstructions, // PseudoVSADD_VX_M8_MASK = 8492 CEFBS_HasVInstructions, // PseudoVSADD_VX_M8_TU = 8493 CEFBS_HasVInstructions, // PseudoVSADD_VX_MF2 = 8494 CEFBS_HasVInstructions, // PseudoVSADD_VX_MF2_MASK = 8495 CEFBS_HasVInstructions, // PseudoVSADD_VX_MF2_TU = 8496 CEFBS_HasVInstructions, // PseudoVSADD_VX_MF4 = 8497 CEFBS_HasVInstructions, // PseudoVSADD_VX_MF4_MASK = 8498 CEFBS_HasVInstructions, // PseudoVSADD_VX_MF4_TU = 8499 CEFBS_HasVInstructions, // PseudoVSADD_VX_MF8 = 8500 CEFBS_HasVInstructions, // PseudoVSADD_VX_MF8_MASK = 8501 CEFBS_HasVInstructions, // PseudoVSADD_VX_MF8_TU = 8502 CEFBS_HasVInstructions, // PseudoVSBC_VVM_M1 = 8503 CEFBS_HasVInstructions, // PseudoVSBC_VVM_M1_TU = 8504 CEFBS_HasVInstructions, // PseudoVSBC_VVM_M2 = 8505 CEFBS_HasVInstructions, // PseudoVSBC_VVM_M2_TU = 8506 CEFBS_HasVInstructions, // PseudoVSBC_VVM_M4 = 8507 CEFBS_HasVInstructions, // PseudoVSBC_VVM_M4_TU = 8508 CEFBS_HasVInstructions, // PseudoVSBC_VVM_M8 = 8509 CEFBS_HasVInstructions, // PseudoVSBC_VVM_M8_TU = 8510 CEFBS_HasVInstructions, // PseudoVSBC_VVM_MF2 = 8511 CEFBS_HasVInstructions, // PseudoVSBC_VVM_MF2_TU = 8512 CEFBS_HasVInstructions, // PseudoVSBC_VVM_MF4 = 8513 CEFBS_HasVInstructions, // PseudoVSBC_VVM_MF4_TU = 8514 CEFBS_HasVInstructions, // PseudoVSBC_VVM_MF8 = 8515 CEFBS_HasVInstructions, // PseudoVSBC_VVM_MF8_TU = 8516 CEFBS_HasVInstructions, // PseudoVSBC_VXM_M1 = 8517 CEFBS_HasVInstructions, // PseudoVSBC_VXM_M1_TU = 8518 CEFBS_HasVInstructions, // PseudoVSBC_VXM_M2 = 8519 CEFBS_HasVInstructions, // PseudoVSBC_VXM_M2_TU = 8520 CEFBS_HasVInstructions, // PseudoVSBC_VXM_M4 = 8521 CEFBS_HasVInstructions, // PseudoVSBC_VXM_M4_TU = 8522 CEFBS_HasVInstructions, // PseudoVSBC_VXM_M8 = 8523 CEFBS_HasVInstructions, // PseudoVSBC_VXM_M8_TU = 8524 CEFBS_HasVInstructions, // PseudoVSBC_VXM_MF2 = 8525 CEFBS_HasVInstructions, // PseudoVSBC_VXM_MF2_TU = 8526 CEFBS_HasVInstructions, // PseudoVSBC_VXM_MF4 = 8527 CEFBS_HasVInstructions, // PseudoVSBC_VXM_MF4_TU = 8528 CEFBS_HasVInstructions, // PseudoVSBC_VXM_MF8 = 8529 CEFBS_HasVInstructions, // PseudoVSBC_VXM_MF8_TU = 8530 CEFBS_HasVInstructions, // PseudoVSE16_V_M1 = 8531 CEFBS_HasVInstructions, // PseudoVSE16_V_M1_MASK = 8532 CEFBS_HasVInstructions, // PseudoVSE16_V_M2 = 8533 CEFBS_HasVInstructions, // PseudoVSE16_V_M2_MASK = 8534 CEFBS_HasVInstructions, // PseudoVSE16_V_M4 = 8535 CEFBS_HasVInstructions, // PseudoVSE16_V_M4_MASK = 8536 CEFBS_HasVInstructions, // PseudoVSE16_V_M8 = 8537 CEFBS_HasVInstructions, // PseudoVSE16_V_M8_MASK = 8538 CEFBS_HasVInstructions, // PseudoVSE16_V_MF2 = 8539 CEFBS_HasVInstructions, // PseudoVSE16_V_MF2_MASK = 8540 CEFBS_HasVInstructions, // PseudoVSE16_V_MF4 = 8541 CEFBS_HasVInstructions, // PseudoVSE16_V_MF4_MASK = 8542 CEFBS_HasVInstructions, // PseudoVSE32_V_M1 = 8543 CEFBS_HasVInstructions, // PseudoVSE32_V_M1_MASK = 8544 CEFBS_HasVInstructions, // PseudoVSE32_V_M2 = 8545 CEFBS_HasVInstructions, // PseudoVSE32_V_M2_MASK = 8546 CEFBS_HasVInstructions, // PseudoVSE32_V_M4 = 8547 CEFBS_HasVInstructions, // PseudoVSE32_V_M4_MASK = 8548 CEFBS_HasVInstructions, // PseudoVSE32_V_M8 = 8549 CEFBS_HasVInstructions, // PseudoVSE32_V_M8_MASK = 8550 CEFBS_HasVInstructions, // PseudoVSE32_V_MF2 = 8551 CEFBS_HasVInstructions, // PseudoVSE32_V_MF2_MASK = 8552 CEFBS_HasVInstructions, // PseudoVSE64_V_M1 = 8553 CEFBS_HasVInstructions, // PseudoVSE64_V_M1_MASK = 8554 CEFBS_HasVInstructions, // PseudoVSE64_V_M2 = 8555 CEFBS_HasVInstructions, // PseudoVSE64_V_M2_MASK = 8556 CEFBS_HasVInstructions, // PseudoVSE64_V_M4 = 8557 CEFBS_HasVInstructions, // PseudoVSE64_V_M4_MASK = 8558 CEFBS_HasVInstructions, // PseudoVSE64_V_M8 = 8559 CEFBS_HasVInstructions, // PseudoVSE64_V_M8_MASK = 8560 CEFBS_HasVInstructions, // PseudoVSE8_V_M1 = 8561 CEFBS_HasVInstructions, // PseudoVSE8_V_M1_MASK = 8562 CEFBS_HasVInstructions, // PseudoVSE8_V_M2 = 8563 CEFBS_HasVInstructions, // PseudoVSE8_V_M2_MASK = 8564 CEFBS_HasVInstructions, // PseudoVSE8_V_M4 = 8565 CEFBS_HasVInstructions, // PseudoVSE8_V_M4_MASK = 8566 CEFBS_HasVInstructions, // PseudoVSE8_V_M8 = 8567 CEFBS_HasVInstructions, // PseudoVSE8_V_M8_MASK = 8568 CEFBS_HasVInstructions, // PseudoVSE8_V_MF2 = 8569 CEFBS_HasVInstructions, // PseudoVSE8_V_MF2_MASK = 8570 CEFBS_HasVInstructions, // PseudoVSE8_V_MF4 = 8571 CEFBS_HasVInstructions, // PseudoVSE8_V_MF4_MASK = 8572 CEFBS_HasVInstructions, // PseudoVSE8_V_MF8 = 8573 CEFBS_HasVInstructions, // PseudoVSE8_V_MF8_MASK = 8574 CEFBS_HasVInstructions, // PseudoVSETIVLI = 8575 CEFBS_HasVInstructions, // PseudoVSETVLI = 8576 CEFBS_HasVInstructions, // PseudoVSETVLIX0 = 8577 CEFBS_HasVInstructions, // PseudoVSEXT_VF2_M1 = 8578 CEFBS_HasVInstructions, // PseudoVSEXT_VF2_M1_MASK = 8579 CEFBS_HasVInstructions, // PseudoVSEXT_VF2_M1_TU = 8580 CEFBS_HasVInstructions, // PseudoVSEXT_VF2_M2 = 8581 CEFBS_HasVInstructions, // PseudoVSEXT_VF2_M2_MASK = 8582 CEFBS_HasVInstructions, // PseudoVSEXT_VF2_M2_TU = 8583 CEFBS_HasVInstructions, // PseudoVSEXT_VF2_M4 = 8584 CEFBS_HasVInstructions, // PseudoVSEXT_VF2_M4_MASK = 8585 CEFBS_HasVInstructions, // PseudoVSEXT_VF2_M4_TU = 8586 CEFBS_HasVInstructions, // PseudoVSEXT_VF2_M8 = 8587 CEFBS_HasVInstructions, // PseudoVSEXT_VF2_M8_MASK = 8588 CEFBS_HasVInstructions, // PseudoVSEXT_VF2_M8_TU = 8589 CEFBS_HasVInstructions, // PseudoVSEXT_VF2_MF2 = 8590 CEFBS_HasVInstructions, // PseudoVSEXT_VF2_MF2_MASK = 8591 CEFBS_HasVInstructions, // PseudoVSEXT_VF2_MF2_TU = 8592 CEFBS_HasVInstructions, // PseudoVSEXT_VF2_MF4 = 8593 CEFBS_HasVInstructions, // PseudoVSEXT_VF2_MF4_MASK = 8594 CEFBS_HasVInstructions, // PseudoVSEXT_VF2_MF4_TU = 8595 CEFBS_HasVInstructions, // PseudoVSEXT_VF4_M1 = 8596 CEFBS_HasVInstructions, // PseudoVSEXT_VF4_M1_MASK = 8597 CEFBS_HasVInstructions, // PseudoVSEXT_VF4_M1_TU = 8598 CEFBS_HasVInstructions, // PseudoVSEXT_VF4_M2 = 8599 CEFBS_HasVInstructions, // PseudoVSEXT_VF4_M2_MASK = 8600 CEFBS_HasVInstructions, // PseudoVSEXT_VF4_M2_TU = 8601 CEFBS_HasVInstructions, // PseudoVSEXT_VF4_M4 = 8602 CEFBS_HasVInstructions, // PseudoVSEXT_VF4_M4_MASK = 8603 CEFBS_HasVInstructions, // PseudoVSEXT_VF4_M4_TU = 8604 CEFBS_HasVInstructions, // PseudoVSEXT_VF4_M8 = 8605 CEFBS_HasVInstructions, // PseudoVSEXT_VF4_M8_MASK = 8606 CEFBS_HasVInstructions, // PseudoVSEXT_VF4_M8_TU = 8607 CEFBS_HasVInstructions, // PseudoVSEXT_VF4_MF2 = 8608 CEFBS_HasVInstructions, // PseudoVSEXT_VF4_MF2_MASK = 8609 CEFBS_HasVInstructions, // PseudoVSEXT_VF4_MF2_TU = 8610 CEFBS_HasVInstructions, // PseudoVSEXT_VF8_M1 = 8611 CEFBS_HasVInstructions, // PseudoVSEXT_VF8_M1_MASK = 8612 CEFBS_HasVInstructions, // PseudoVSEXT_VF8_M1_TU = 8613 CEFBS_HasVInstructions, // PseudoVSEXT_VF8_M2 = 8614 CEFBS_HasVInstructions, // PseudoVSEXT_VF8_M2_MASK = 8615 CEFBS_HasVInstructions, // PseudoVSEXT_VF8_M2_TU = 8616 CEFBS_HasVInstructions, // PseudoVSEXT_VF8_M4 = 8617 CEFBS_HasVInstructions, // PseudoVSEXT_VF8_M4_MASK = 8618 CEFBS_HasVInstructions, // PseudoVSEXT_VF8_M4_TU = 8619 CEFBS_HasVInstructions, // PseudoVSEXT_VF8_M8 = 8620 CEFBS_HasVInstructions, // PseudoVSEXT_VF8_M8_MASK = 8621 CEFBS_HasVInstructions, // PseudoVSEXT_VF8_M8_TU = 8622 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_M1 = 8623 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_M1_MASK = 8624 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_M1_TU = 8625 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_M2 = 8626 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_M2_MASK = 8627 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_M2_TU = 8628 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_M4 = 8629 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_M4_MASK = 8630 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_M4_TU = 8631 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_M8 = 8632 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_M8_MASK = 8633 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_M8_TU = 8634 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_MF2 = 8635 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_MF2_MASK = 8636 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_MF2_TU = 8637 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_MF4 = 8638 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_MF4_MASK = 8639 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_MF4_TU = 8640 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_MF8 = 8641 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_MF8_MASK = 8642 CEFBS_HasVInstructions, // PseudoVSLIDE1DOWN_VX_MF8_TU = 8643 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_M1 = 8644 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_M1_MASK = 8645 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_M1_TU = 8646 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_M2 = 8647 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_M2_MASK = 8648 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_M2_TU = 8649 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_M4 = 8650 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_M4_MASK = 8651 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_M4_TU = 8652 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_M8 = 8653 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_M8_MASK = 8654 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_M8_TU = 8655 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_MF2 = 8656 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_MF2_MASK = 8657 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_MF2_TU = 8658 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_MF4 = 8659 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_MF4_MASK = 8660 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_MF4_TU = 8661 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_MF8 = 8662 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_MF8_MASK = 8663 CEFBS_HasVInstructions, // PseudoVSLIDE1UP_VX_MF8_TU = 8664 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VI_M1 = 8665 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VI_M1_MASK = 8666 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VI_M2 = 8667 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VI_M2_MASK = 8668 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VI_M4 = 8669 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VI_M4_MASK = 8670 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VI_M8 = 8671 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VI_M8_MASK = 8672 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VI_MF2 = 8673 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VI_MF2_MASK = 8674 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VI_MF4 = 8675 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VI_MF4_MASK = 8676 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VI_MF8 = 8677 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VI_MF8_MASK = 8678 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VX_M1 = 8679 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VX_M1_MASK = 8680 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VX_M2 = 8681 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VX_M2_MASK = 8682 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VX_M4 = 8683 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VX_M4_MASK = 8684 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VX_M8 = 8685 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VX_M8_MASK = 8686 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VX_MF2 = 8687 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VX_MF2_MASK = 8688 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VX_MF4 = 8689 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VX_MF4_MASK = 8690 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VX_MF8 = 8691 CEFBS_HasVInstructions, // PseudoVSLIDEDOWN_VX_MF8_MASK = 8692 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VI_M1 = 8693 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VI_M1_MASK = 8694 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VI_M2 = 8695 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VI_M2_MASK = 8696 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VI_M4 = 8697 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VI_M4_MASK = 8698 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VI_M8 = 8699 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VI_M8_MASK = 8700 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VI_MF2 = 8701 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VI_MF2_MASK = 8702 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VI_MF4 = 8703 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VI_MF4_MASK = 8704 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VI_MF8 = 8705 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VI_MF8_MASK = 8706 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VX_M1 = 8707 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VX_M1_MASK = 8708 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VX_M2 = 8709 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VX_M2_MASK = 8710 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VX_M4 = 8711 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VX_M4_MASK = 8712 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VX_M8 = 8713 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VX_M8_MASK = 8714 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VX_MF2 = 8715 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VX_MF2_MASK = 8716 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VX_MF4 = 8717 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VX_MF4_MASK = 8718 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VX_MF8 = 8719 CEFBS_HasVInstructions, // PseudoVSLIDEUP_VX_MF8_MASK = 8720 CEFBS_HasVInstructions, // PseudoVSLL_VI_M1 = 8721 CEFBS_HasVInstructions, // PseudoVSLL_VI_M1_MASK = 8722 CEFBS_HasVInstructions, // PseudoVSLL_VI_M1_TU = 8723 CEFBS_HasVInstructions, // PseudoVSLL_VI_M2 = 8724 CEFBS_HasVInstructions, // PseudoVSLL_VI_M2_MASK = 8725 CEFBS_HasVInstructions, // PseudoVSLL_VI_M2_TU = 8726 CEFBS_HasVInstructions, // PseudoVSLL_VI_M4 = 8727 CEFBS_HasVInstructions, // PseudoVSLL_VI_M4_MASK = 8728 CEFBS_HasVInstructions, // PseudoVSLL_VI_M4_TU = 8729 CEFBS_HasVInstructions, // PseudoVSLL_VI_M8 = 8730 CEFBS_HasVInstructions, // PseudoVSLL_VI_M8_MASK = 8731 CEFBS_HasVInstructions, // PseudoVSLL_VI_M8_TU = 8732 CEFBS_HasVInstructions, // PseudoVSLL_VI_MF2 = 8733 CEFBS_HasVInstructions, // PseudoVSLL_VI_MF2_MASK = 8734 CEFBS_HasVInstructions, // PseudoVSLL_VI_MF2_TU = 8735 CEFBS_HasVInstructions, // PseudoVSLL_VI_MF4 = 8736 CEFBS_HasVInstructions, // PseudoVSLL_VI_MF4_MASK = 8737 CEFBS_HasVInstructions, // PseudoVSLL_VI_MF4_TU = 8738 CEFBS_HasVInstructions, // PseudoVSLL_VI_MF8 = 8739 CEFBS_HasVInstructions, // PseudoVSLL_VI_MF8_MASK = 8740 CEFBS_HasVInstructions, // PseudoVSLL_VI_MF8_TU = 8741 CEFBS_HasVInstructions, // PseudoVSLL_VV_M1 = 8742 CEFBS_HasVInstructions, // PseudoVSLL_VV_M1_MASK = 8743 CEFBS_HasVInstructions, // PseudoVSLL_VV_M1_TU = 8744 CEFBS_HasVInstructions, // PseudoVSLL_VV_M2 = 8745 CEFBS_HasVInstructions, // PseudoVSLL_VV_M2_MASK = 8746 CEFBS_HasVInstructions, // PseudoVSLL_VV_M2_TU = 8747 CEFBS_HasVInstructions, // PseudoVSLL_VV_M4 = 8748 CEFBS_HasVInstructions, // PseudoVSLL_VV_M4_MASK = 8749 CEFBS_HasVInstructions, // PseudoVSLL_VV_M4_TU = 8750 CEFBS_HasVInstructions, // PseudoVSLL_VV_M8 = 8751 CEFBS_HasVInstructions, // PseudoVSLL_VV_M8_MASK = 8752 CEFBS_HasVInstructions, // PseudoVSLL_VV_M8_TU = 8753 CEFBS_HasVInstructions, // PseudoVSLL_VV_MF2 = 8754 CEFBS_HasVInstructions, // PseudoVSLL_VV_MF2_MASK = 8755 CEFBS_HasVInstructions, // PseudoVSLL_VV_MF2_TU = 8756 CEFBS_HasVInstructions, // PseudoVSLL_VV_MF4 = 8757 CEFBS_HasVInstructions, // PseudoVSLL_VV_MF4_MASK = 8758 CEFBS_HasVInstructions, // PseudoVSLL_VV_MF4_TU = 8759 CEFBS_HasVInstructions, // PseudoVSLL_VV_MF8 = 8760 CEFBS_HasVInstructions, // PseudoVSLL_VV_MF8_MASK = 8761 CEFBS_HasVInstructions, // PseudoVSLL_VV_MF8_TU = 8762 CEFBS_HasVInstructions, // PseudoVSLL_VX_M1 = 8763 CEFBS_HasVInstructions, // PseudoVSLL_VX_M1_MASK = 8764 CEFBS_HasVInstructions, // PseudoVSLL_VX_M1_TU = 8765 CEFBS_HasVInstructions, // PseudoVSLL_VX_M2 = 8766 CEFBS_HasVInstructions, // PseudoVSLL_VX_M2_MASK = 8767 CEFBS_HasVInstructions, // PseudoVSLL_VX_M2_TU = 8768 CEFBS_HasVInstructions, // PseudoVSLL_VX_M4 = 8769 CEFBS_HasVInstructions, // PseudoVSLL_VX_M4_MASK = 8770 CEFBS_HasVInstructions, // PseudoVSLL_VX_M4_TU = 8771 CEFBS_HasVInstructions, // PseudoVSLL_VX_M8 = 8772 CEFBS_HasVInstructions, // PseudoVSLL_VX_M8_MASK = 8773 CEFBS_HasVInstructions, // PseudoVSLL_VX_M8_TU = 8774 CEFBS_HasVInstructions, // PseudoVSLL_VX_MF2 = 8775 CEFBS_HasVInstructions, // PseudoVSLL_VX_MF2_MASK = 8776 CEFBS_HasVInstructions, // PseudoVSLL_VX_MF2_TU = 8777 CEFBS_HasVInstructions, // PseudoVSLL_VX_MF4 = 8778 CEFBS_HasVInstructions, // PseudoVSLL_VX_MF4_MASK = 8779 CEFBS_HasVInstructions, // PseudoVSLL_VX_MF4_TU = 8780 CEFBS_HasVInstructions, // PseudoVSLL_VX_MF8 = 8781 CEFBS_HasVInstructions, // PseudoVSLL_VX_MF8_MASK = 8782 CEFBS_HasVInstructions, // PseudoVSLL_VX_MF8_TU = 8783 CEFBS_HasVInstructions, // PseudoVSMUL_VV_M1 = 8784 CEFBS_HasVInstructions, // PseudoVSMUL_VV_M1_MASK = 8785 CEFBS_HasVInstructions, // PseudoVSMUL_VV_M1_TU = 8786 CEFBS_HasVInstructions, // PseudoVSMUL_VV_M2 = 8787 CEFBS_HasVInstructions, // PseudoVSMUL_VV_M2_MASK = 8788 CEFBS_HasVInstructions, // PseudoVSMUL_VV_M2_TU = 8789 CEFBS_HasVInstructions, // PseudoVSMUL_VV_M4 = 8790 CEFBS_HasVInstructions, // PseudoVSMUL_VV_M4_MASK = 8791 CEFBS_HasVInstructions, // PseudoVSMUL_VV_M4_TU = 8792 CEFBS_HasVInstructions, // PseudoVSMUL_VV_M8 = 8793 CEFBS_HasVInstructions, // PseudoVSMUL_VV_M8_MASK = 8794 CEFBS_HasVInstructions, // PseudoVSMUL_VV_M8_TU = 8795 CEFBS_HasVInstructions, // PseudoVSMUL_VV_MF2 = 8796 CEFBS_HasVInstructions, // PseudoVSMUL_VV_MF2_MASK = 8797 CEFBS_HasVInstructions, // PseudoVSMUL_VV_MF2_TU = 8798 CEFBS_HasVInstructions, // PseudoVSMUL_VV_MF4 = 8799 CEFBS_HasVInstructions, // PseudoVSMUL_VV_MF4_MASK = 8800 CEFBS_HasVInstructions, // PseudoVSMUL_VV_MF4_TU = 8801 CEFBS_HasVInstructions, // PseudoVSMUL_VV_MF8 = 8802 CEFBS_HasVInstructions, // PseudoVSMUL_VV_MF8_MASK = 8803 CEFBS_HasVInstructions, // PseudoVSMUL_VV_MF8_TU = 8804 CEFBS_HasVInstructions, // PseudoVSMUL_VX_M1 = 8805 CEFBS_HasVInstructions, // PseudoVSMUL_VX_M1_MASK = 8806 CEFBS_HasVInstructions, // PseudoVSMUL_VX_M1_TU = 8807 CEFBS_HasVInstructions, // PseudoVSMUL_VX_M2 = 8808 CEFBS_HasVInstructions, // PseudoVSMUL_VX_M2_MASK = 8809 CEFBS_HasVInstructions, // PseudoVSMUL_VX_M2_TU = 8810 CEFBS_HasVInstructions, // PseudoVSMUL_VX_M4 = 8811 CEFBS_HasVInstructions, // PseudoVSMUL_VX_M4_MASK = 8812 CEFBS_HasVInstructions, // PseudoVSMUL_VX_M4_TU = 8813 CEFBS_HasVInstructions, // PseudoVSMUL_VX_M8 = 8814 CEFBS_HasVInstructions, // PseudoVSMUL_VX_M8_MASK = 8815 CEFBS_HasVInstructions, // PseudoVSMUL_VX_M8_TU = 8816 CEFBS_HasVInstructions, // PseudoVSMUL_VX_MF2 = 8817 CEFBS_HasVInstructions, // PseudoVSMUL_VX_MF2_MASK = 8818 CEFBS_HasVInstructions, // PseudoVSMUL_VX_MF2_TU = 8819 CEFBS_HasVInstructions, // PseudoVSMUL_VX_MF4 = 8820 CEFBS_HasVInstructions, // PseudoVSMUL_VX_MF4_MASK = 8821 CEFBS_HasVInstructions, // PseudoVSMUL_VX_MF4_TU = 8822 CEFBS_HasVInstructions, // PseudoVSMUL_VX_MF8 = 8823 CEFBS_HasVInstructions, // PseudoVSMUL_VX_MF8_MASK = 8824 CEFBS_HasVInstructions, // PseudoVSMUL_VX_MF8_TU = 8825 CEFBS_HasVInstructions, // PseudoVSM_V_B1 = 8826 CEFBS_HasVInstructions, // PseudoVSM_V_B16 = 8827 CEFBS_HasVInstructions, // PseudoVSM_V_B2 = 8828 CEFBS_HasVInstructions, // PseudoVSM_V_B32 = 8829 CEFBS_HasVInstructions, // PseudoVSM_V_B4 = 8830 CEFBS_HasVInstructions, // PseudoVSM_V_B64 = 8831 CEFBS_HasVInstructions, // PseudoVSM_V_B8 = 8832 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M1_M1 = 8833 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M1_M1_MASK = 8834 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M1_M2 = 8835 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M1_M2_MASK = 8836 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M1_M4 = 8837 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M1_M4_MASK = 8838 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M1_MF2 = 8839 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M1_MF2_MASK = 8840 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M2_M1 = 8841 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M2_M1_MASK = 8842 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M2_M2 = 8843 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M2_M2_MASK = 8844 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M2_M4 = 8845 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M2_M4_MASK = 8846 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M2_M8 = 8847 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M2_M8_MASK = 8848 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M4_M2 = 8849 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M4_M2_MASK = 8850 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M4_M4 = 8851 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M4_M4_MASK = 8852 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M4_M8 = 8853 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M4_M8_MASK = 8854 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M8_M4 = 8855 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M8_M4_MASK = 8856 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M8_M8 = 8857 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_M8_M8_MASK = 8858 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_MF2_M1 = 8859 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_MF2_M1_MASK = 8860 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_MF2_M2 = 8861 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_MF2_M2_MASK = 8862 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_MF2_MF2 = 8863 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_MF2_MF2_MASK = 8864 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_MF2_MF4 = 8865 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_MF2_MF4_MASK = 8866 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_MF4_M1 = 8867 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_MF4_M1_MASK = 8868 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_MF4_MF2 = 8869 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_MF4_MF2_MASK = 8870 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_MF4_MF4 = 8871 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_MF4_MF4_MASK = 8872 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_MF4_MF8 = 8873 CEFBS_HasVInstructions, // PseudoVSOXEI16_V_MF4_MF8_MASK = 8874 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M1_M1 = 8875 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M1_M1_MASK = 8876 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M1_M2 = 8877 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M1_M2_MASK = 8878 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M1_MF2 = 8879 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M1_MF2_MASK = 8880 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M1_MF4 = 8881 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M1_MF4_MASK = 8882 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M2_M1 = 8883 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M2_M1_MASK = 8884 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M2_M2 = 8885 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M2_M2_MASK = 8886 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M2_M4 = 8887 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M2_M4_MASK = 8888 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M2_MF2 = 8889 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M2_MF2_MASK = 8890 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M4_M1 = 8891 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M4_M1_MASK = 8892 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M4_M2 = 8893 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M4_M2_MASK = 8894 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M4_M4 = 8895 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M4_M4_MASK = 8896 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M4_M8 = 8897 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M4_M8_MASK = 8898 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M8_M2 = 8899 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M8_M2_MASK = 8900 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M8_M4 = 8901 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M8_M4_MASK = 8902 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M8_M8 = 8903 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_M8_M8_MASK = 8904 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_MF2_M1 = 8905 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_MF2_M1_MASK = 8906 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_MF2_MF2 = 8907 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_MF2_MF2_MASK = 8908 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_MF2_MF4 = 8909 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_MF2_MF4_MASK = 8910 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_MF2_MF8 = 8911 CEFBS_HasVInstructions, // PseudoVSOXEI32_V_MF2_MF8_MASK = 8912 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M1_M1 = 8913 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M1_M1_MASK = 8914 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M1_MF2 = 8915 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M1_MF2_MASK = 8916 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M1_MF4 = 8917 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M1_MF4_MASK = 8918 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M1_MF8 = 8919 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M1_MF8_MASK = 8920 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M2_M1 = 8921 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M2_M1_MASK = 8922 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M2_M2 = 8923 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M2_M2_MASK = 8924 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M2_MF2 = 8925 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M2_MF2_MASK = 8926 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M2_MF4 = 8927 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M2_MF4_MASK = 8928 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M4_M1 = 8929 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M4_M1_MASK = 8930 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M4_M2 = 8931 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M4_M2_MASK = 8932 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M4_M4 = 8933 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M4_M4_MASK = 8934 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M4_MF2 = 8935 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M4_MF2_MASK = 8936 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M8_M1 = 8937 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M8_M1_MASK = 8938 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M8_M2 = 8939 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M8_M2_MASK = 8940 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M8_M4 = 8941 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M8_M4_MASK = 8942 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M8_M8 = 8943 CEFBS_HasVInstructions, // PseudoVSOXEI64_V_M8_M8_MASK = 8944 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M1_M1 = 8945 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M1_M1_MASK = 8946 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M1_M2 = 8947 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M1_M2_MASK = 8948 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M1_M4 = 8949 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M1_M4_MASK = 8950 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M1_M8 = 8951 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M1_M8_MASK = 8952 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M2_M2 = 8953 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M2_M2_MASK = 8954 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M2_M4 = 8955 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M2_M4_MASK = 8956 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M2_M8 = 8957 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M2_M8_MASK = 8958 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M4_M4 = 8959 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M4_M4_MASK = 8960 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M4_M8 = 8961 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M4_M8_MASK = 8962 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M8_M8 = 8963 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_M8_M8_MASK = 8964 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF2_M1 = 8965 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF2_M1_MASK = 8966 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF2_M2 = 8967 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF2_M2_MASK = 8968 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF2_M4 = 8969 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF2_M4_MASK = 8970 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF2_MF2 = 8971 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF2_MF2_MASK = 8972 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF4_M1 = 8973 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF4_M1_MASK = 8974 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF4_M2 = 8975 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF4_M2_MASK = 8976 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF4_MF2 = 8977 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF4_MF2_MASK = 8978 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF4_MF4 = 8979 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF4_MF4_MASK = 8980 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF8_M1 = 8981 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF8_M1_MASK = 8982 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF8_MF2 = 8983 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF8_MF2_MASK = 8984 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF8_MF4 = 8985 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF8_MF4_MASK = 8986 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF8_MF8 = 8987 CEFBS_HasVInstructions, // PseudoVSOXEI8_V_MF8_MF8_MASK = 8988 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M1_M1 = 8989 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M1_M1_MASK = 8990 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M1_M2 = 8991 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M1_M2_MASK = 8992 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M1_M4 = 8993 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M1_M4_MASK = 8994 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M1_MF2 = 8995 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M1_MF2_MASK = 8996 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M2_M1 = 8997 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M2_M1_MASK = 8998 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M2_M2 = 8999 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M2_M2_MASK = 9000 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M2_M4 = 9001 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M2_M4_MASK = 9002 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M4_M2 = 9003 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M4_M2_MASK = 9004 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M4_M4 = 9005 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M4_M4_MASK = 9006 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M8_M4 = 9007 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_M8_M4_MASK = 9008 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_MF2_M1 = 9009 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_MF2_M1_MASK = 9010 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_MF2_M2 = 9011 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_MF2_M2_MASK = 9012 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_MF2_MF2 = 9013 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_MF2_MF2_MASK = 9014 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_MF2_MF4 = 9015 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_MF2_MF4_MASK = 9016 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_MF4_M1 = 9017 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_MF4_M1_MASK = 9018 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_MF4_MF2 = 9019 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_MF4_MF2_MASK = 9020 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_MF4_MF4 = 9021 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_MF4_MF4_MASK = 9022 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_MF4_MF8 = 9023 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI16_V_MF4_MF8_MASK = 9024 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M1_M1 = 9025 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M1_M1_MASK = 9026 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M1_M2 = 9027 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M1_M2_MASK = 9028 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M1_MF2 = 9029 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M1_MF2_MASK = 9030 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M1_MF4 = 9031 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M1_MF4_MASK = 9032 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M2_M1 = 9033 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M2_M1_MASK = 9034 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M2_M2 = 9035 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M2_M2_MASK = 9036 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M2_M4 = 9037 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M2_M4_MASK = 9038 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M2_MF2 = 9039 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M2_MF2_MASK = 9040 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M4_M1 = 9041 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M4_M1_MASK = 9042 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M4_M2 = 9043 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M4_M2_MASK = 9044 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M4_M4 = 9045 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M4_M4_MASK = 9046 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M8_M2 = 9047 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M8_M2_MASK = 9048 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M8_M4 = 9049 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_M8_M4_MASK = 9050 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_MF2_M1 = 9051 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_MF2_M1_MASK = 9052 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_MF2_MF2 = 9053 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_MF2_MF2_MASK = 9054 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_MF2_MF4 = 9055 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_MF2_MF4_MASK = 9056 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_MF2_MF8 = 9057 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI32_V_MF2_MF8_MASK = 9058 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M1_M1 = 9059 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M1_M1_MASK = 9060 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M1_MF2 = 9061 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M1_MF2_MASK = 9062 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M1_MF4 = 9063 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M1_MF4_MASK = 9064 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M1_MF8 = 9065 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M1_MF8_MASK = 9066 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M2_M1 = 9067 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M2_M1_MASK = 9068 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M2_M2 = 9069 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M2_M2_MASK = 9070 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M2_MF2 = 9071 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M2_MF2_MASK = 9072 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M2_MF4 = 9073 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M2_MF4_MASK = 9074 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M4_M1 = 9075 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M4_M1_MASK = 9076 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M4_M2 = 9077 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M4_M2_MASK = 9078 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M4_M4 = 9079 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M4_M4_MASK = 9080 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M4_MF2 = 9081 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M4_MF2_MASK = 9082 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M8_M1 = 9083 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M8_M1_MASK = 9084 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M8_M2 = 9085 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M8_M2_MASK = 9086 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M8_M4 = 9087 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI64_V_M8_M4_MASK = 9088 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_M1_M1 = 9089 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_M1_M1_MASK = 9090 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_M1_M2 = 9091 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_M1_M2_MASK = 9092 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_M1_M4 = 9093 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_M1_M4_MASK = 9094 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_M2_M2 = 9095 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_M2_M2_MASK = 9096 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_M2_M4 = 9097 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_M2_M4_MASK = 9098 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_M4_M4 = 9099 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_M4_M4_MASK = 9100 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF2_M1 = 9101 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF2_M1_MASK = 9102 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF2_M2 = 9103 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF2_M2_MASK = 9104 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF2_M4 = 9105 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF2_M4_MASK = 9106 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF2_MF2 = 9107 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF2_MF2_MASK = 9108 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF4_M1 = 9109 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF4_M1_MASK = 9110 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF4_M2 = 9111 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF4_M2_MASK = 9112 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF4_MF2 = 9113 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF4_MF2_MASK = 9114 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF4_MF4 = 9115 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF4_MF4_MASK = 9116 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF8_M1 = 9117 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF8_M1_MASK = 9118 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF8_MF2 = 9119 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF8_MF2_MASK = 9120 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF8_MF4 = 9121 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF8_MF4_MASK = 9122 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF8_MF8 = 9123 CEFBS_HasVInstructions, // PseudoVSOXSEG2EI8_V_MF8_MF8_MASK = 9124 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_M1_M1 = 9125 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_M1_M1_MASK = 9126 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_M1_M2 = 9127 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_M1_M2_MASK = 9128 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_M1_MF2 = 9129 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_M1_MF2_MASK = 9130 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_M2_M1 = 9131 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_M2_M1_MASK = 9132 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_M2_M2 = 9133 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_M2_M2_MASK = 9134 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_M4_M2 = 9135 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_M4_M2_MASK = 9136 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_MF2_M1 = 9137 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_MF2_M1_MASK = 9138 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_MF2_M2 = 9139 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_MF2_M2_MASK = 9140 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_MF2_MF2 = 9141 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_MF2_MF2_MASK = 9142 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_MF2_MF4 = 9143 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_MF2_MF4_MASK = 9144 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_MF4_M1 = 9145 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_MF4_M1_MASK = 9146 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_MF4_MF2 = 9147 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_MF4_MF2_MASK = 9148 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_MF4_MF4 = 9149 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_MF4_MF4_MASK = 9150 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_MF4_MF8 = 9151 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI16_V_MF4_MF8_MASK = 9152 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M1_M1 = 9153 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M1_M1_MASK = 9154 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M1_M2 = 9155 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M1_M2_MASK = 9156 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M1_MF2 = 9157 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M1_MF2_MASK = 9158 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M1_MF4 = 9159 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M1_MF4_MASK = 9160 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M2_M1 = 9161 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M2_M1_MASK = 9162 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M2_M2 = 9163 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M2_M2_MASK = 9164 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M2_MF2 = 9165 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M2_MF2_MASK = 9166 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M4_M1 = 9167 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M4_M1_MASK = 9168 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M4_M2 = 9169 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M4_M2_MASK = 9170 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M8_M2 = 9171 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_M8_M2_MASK = 9172 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_MF2_M1 = 9173 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_MF2_M1_MASK = 9174 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_MF2_MF2 = 9175 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_MF2_MF2_MASK = 9176 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_MF2_MF4 = 9177 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_MF2_MF4_MASK = 9178 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_MF2_MF8 = 9179 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI32_V_MF2_MF8_MASK = 9180 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M1_M1 = 9181 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M1_M1_MASK = 9182 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M1_MF2 = 9183 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M1_MF2_MASK = 9184 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M1_MF4 = 9185 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M1_MF4_MASK = 9186 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M1_MF8 = 9187 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M1_MF8_MASK = 9188 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M2_M1 = 9189 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M2_M1_MASK = 9190 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M2_M2 = 9191 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M2_M2_MASK = 9192 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M2_MF2 = 9193 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M2_MF2_MASK = 9194 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M2_MF4 = 9195 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M2_MF4_MASK = 9196 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M4_M1 = 9197 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M4_M1_MASK = 9198 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M4_M2 = 9199 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M4_M2_MASK = 9200 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M4_MF2 = 9201 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M4_MF2_MASK = 9202 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M8_M1 = 9203 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M8_M1_MASK = 9204 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M8_M2 = 9205 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI64_V_M8_M2_MASK = 9206 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_M1_M1 = 9207 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_M1_M1_MASK = 9208 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_M1_M2 = 9209 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_M1_M2_MASK = 9210 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_M2_M2 = 9211 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_M2_M2_MASK = 9212 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF2_M1 = 9213 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF2_M1_MASK = 9214 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF2_M2 = 9215 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF2_M2_MASK = 9216 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF2_MF2 = 9217 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF2_MF2_MASK = 9218 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF4_M1 = 9219 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF4_M1_MASK = 9220 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF4_M2 = 9221 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF4_M2_MASK = 9222 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF4_MF2 = 9223 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF4_MF2_MASK = 9224 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF4_MF4 = 9225 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF4_MF4_MASK = 9226 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF8_M1 = 9227 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF8_M1_MASK = 9228 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF8_MF2 = 9229 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF8_MF2_MASK = 9230 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF8_MF4 = 9231 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF8_MF4_MASK = 9232 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF8_MF8 = 9233 CEFBS_HasVInstructions, // PseudoVSOXSEG3EI8_V_MF8_MF8_MASK = 9234 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_M1_M1 = 9235 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_M1_M1_MASK = 9236 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_M1_M2 = 9237 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_M1_M2_MASK = 9238 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_M1_MF2 = 9239 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_M1_MF2_MASK = 9240 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_M2_M1 = 9241 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_M2_M1_MASK = 9242 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_M2_M2 = 9243 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_M2_M2_MASK = 9244 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_M4_M2 = 9245 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_M4_M2_MASK = 9246 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_MF2_M1 = 9247 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_MF2_M1_MASK = 9248 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_MF2_M2 = 9249 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_MF2_M2_MASK = 9250 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_MF2_MF2 = 9251 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_MF2_MF2_MASK = 9252 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_MF2_MF4 = 9253 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_MF2_MF4_MASK = 9254 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_MF4_M1 = 9255 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_MF4_M1_MASK = 9256 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_MF4_MF2 = 9257 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_MF4_MF2_MASK = 9258 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_MF4_MF4 = 9259 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_MF4_MF4_MASK = 9260 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_MF4_MF8 = 9261 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI16_V_MF4_MF8_MASK = 9262 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M1_M1 = 9263 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M1_M1_MASK = 9264 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M1_M2 = 9265 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M1_M2_MASK = 9266 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M1_MF2 = 9267 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M1_MF2_MASK = 9268 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M1_MF4 = 9269 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M1_MF4_MASK = 9270 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M2_M1 = 9271 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M2_M1_MASK = 9272 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M2_M2 = 9273 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M2_M2_MASK = 9274 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M2_MF2 = 9275 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M2_MF2_MASK = 9276 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M4_M1 = 9277 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M4_M1_MASK = 9278 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M4_M2 = 9279 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M4_M2_MASK = 9280 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M8_M2 = 9281 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_M8_M2_MASK = 9282 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_MF2_M1 = 9283 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_MF2_M1_MASK = 9284 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_MF2_MF2 = 9285 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_MF2_MF2_MASK = 9286 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_MF2_MF4 = 9287 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_MF2_MF4_MASK = 9288 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_MF2_MF8 = 9289 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI32_V_MF2_MF8_MASK = 9290 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M1_M1 = 9291 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M1_M1_MASK = 9292 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M1_MF2 = 9293 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M1_MF2_MASK = 9294 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M1_MF4 = 9295 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M1_MF4_MASK = 9296 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M1_MF8 = 9297 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M1_MF8_MASK = 9298 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M2_M1 = 9299 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M2_M1_MASK = 9300 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M2_M2 = 9301 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M2_M2_MASK = 9302 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M2_MF2 = 9303 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M2_MF2_MASK = 9304 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M2_MF4 = 9305 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M2_MF4_MASK = 9306 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M4_M1 = 9307 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M4_M1_MASK = 9308 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M4_M2 = 9309 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M4_M2_MASK = 9310 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M4_MF2 = 9311 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M4_MF2_MASK = 9312 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M8_M1 = 9313 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M8_M1_MASK = 9314 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M8_M2 = 9315 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI64_V_M8_M2_MASK = 9316 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_M1_M1 = 9317 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_M1_M1_MASK = 9318 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_M1_M2 = 9319 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_M1_M2_MASK = 9320 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_M2_M2 = 9321 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_M2_M2_MASK = 9322 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF2_M1 = 9323 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF2_M1_MASK = 9324 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF2_M2 = 9325 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF2_M2_MASK = 9326 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF2_MF2 = 9327 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF2_MF2_MASK = 9328 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF4_M1 = 9329 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF4_M1_MASK = 9330 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF4_M2 = 9331 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF4_M2_MASK = 9332 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF4_MF2 = 9333 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF4_MF2_MASK = 9334 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF4_MF4 = 9335 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF4_MF4_MASK = 9336 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF8_M1 = 9337 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF8_M1_MASK = 9338 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF8_MF2 = 9339 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF8_MF2_MASK = 9340 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF8_MF4 = 9341 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF8_MF4_MASK = 9342 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF8_MF8 = 9343 CEFBS_HasVInstructions, // PseudoVSOXSEG4EI8_V_MF8_MF8_MASK = 9344 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_M1_M1 = 9345 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_M1_M1_MASK = 9346 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_M1_MF2 = 9347 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_M1_MF2_MASK = 9348 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_M2_M1 = 9349 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_M2_M1_MASK = 9350 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_MF2_M1 = 9351 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_MF2_M1_MASK = 9352 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_MF2_MF2 = 9353 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_MF2_MF2_MASK = 9354 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_MF2_MF4 = 9355 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_MF2_MF4_MASK = 9356 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_MF4_M1 = 9357 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_MF4_M1_MASK = 9358 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_MF4_MF2 = 9359 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_MF4_MF2_MASK = 9360 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_MF4_MF4 = 9361 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_MF4_MF4_MASK = 9362 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_MF4_MF8 = 9363 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI16_V_MF4_MF8_MASK = 9364 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_M1_M1 = 9365 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_M1_M1_MASK = 9366 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_M1_MF2 = 9367 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_M1_MF2_MASK = 9368 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_M1_MF4 = 9369 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_M1_MF4_MASK = 9370 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_M2_M1 = 9371 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_M2_M1_MASK = 9372 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_M2_MF2 = 9373 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_M2_MF2_MASK = 9374 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_M4_M1 = 9375 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_M4_M1_MASK = 9376 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_MF2_M1 = 9377 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_MF2_M1_MASK = 9378 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_MF2_MF2 = 9379 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_MF2_MF2_MASK = 9380 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_MF2_MF4 = 9381 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_MF2_MF4_MASK = 9382 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_MF2_MF8 = 9383 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI32_V_MF2_MF8_MASK = 9384 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M1_M1 = 9385 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M1_M1_MASK = 9386 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M1_MF2 = 9387 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M1_MF2_MASK = 9388 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M1_MF4 = 9389 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M1_MF4_MASK = 9390 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M1_MF8 = 9391 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M1_MF8_MASK = 9392 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M2_M1 = 9393 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M2_M1_MASK = 9394 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M2_MF2 = 9395 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M2_MF2_MASK = 9396 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M2_MF4 = 9397 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M2_MF4_MASK = 9398 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M4_M1 = 9399 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M4_M1_MASK = 9400 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M4_MF2 = 9401 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M4_MF2_MASK = 9402 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M8_M1 = 9403 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI64_V_M8_M1_MASK = 9404 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_M1_M1 = 9405 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_M1_M1_MASK = 9406 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_MF2_M1 = 9407 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_MF2_M1_MASK = 9408 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_MF2_MF2 = 9409 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_MF2_MF2_MASK = 9410 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_MF4_M1 = 9411 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_MF4_M1_MASK = 9412 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_MF4_MF2 = 9413 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_MF4_MF2_MASK = 9414 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_MF4_MF4 = 9415 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_MF4_MF4_MASK = 9416 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_MF8_M1 = 9417 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_MF8_M1_MASK = 9418 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_MF8_MF2 = 9419 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_MF8_MF2_MASK = 9420 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_MF8_MF4 = 9421 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_MF8_MF4_MASK = 9422 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_MF8_MF8 = 9423 CEFBS_HasVInstructions, // PseudoVSOXSEG5EI8_V_MF8_MF8_MASK = 9424 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_M1_M1 = 9425 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_M1_M1_MASK = 9426 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_M1_MF2 = 9427 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_M1_MF2_MASK = 9428 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_M2_M1 = 9429 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_M2_M1_MASK = 9430 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_MF2_M1 = 9431 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_MF2_M1_MASK = 9432 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_MF2_MF2 = 9433 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_MF2_MF2_MASK = 9434 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_MF2_MF4 = 9435 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_MF2_MF4_MASK = 9436 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_MF4_M1 = 9437 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_MF4_M1_MASK = 9438 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_MF4_MF2 = 9439 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_MF4_MF2_MASK = 9440 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_MF4_MF4 = 9441 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_MF4_MF4_MASK = 9442 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_MF4_MF8 = 9443 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI16_V_MF4_MF8_MASK = 9444 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_M1_M1 = 9445 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_M1_M1_MASK = 9446 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_M1_MF2 = 9447 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_M1_MF2_MASK = 9448 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_M1_MF4 = 9449 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_M1_MF4_MASK = 9450 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_M2_M1 = 9451 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_M2_M1_MASK = 9452 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_M2_MF2 = 9453 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_M2_MF2_MASK = 9454 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_M4_M1 = 9455 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_M4_M1_MASK = 9456 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_MF2_M1 = 9457 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_MF2_M1_MASK = 9458 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_MF2_MF2 = 9459 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_MF2_MF2_MASK = 9460 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_MF2_MF4 = 9461 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_MF2_MF4_MASK = 9462 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_MF2_MF8 = 9463 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI32_V_MF2_MF8_MASK = 9464 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M1_M1 = 9465 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M1_M1_MASK = 9466 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M1_MF2 = 9467 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M1_MF2_MASK = 9468 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M1_MF4 = 9469 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M1_MF4_MASK = 9470 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M1_MF8 = 9471 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M1_MF8_MASK = 9472 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M2_M1 = 9473 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M2_M1_MASK = 9474 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M2_MF2 = 9475 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M2_MF2_MASK = 9476 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M2_MF4 = 9477 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M2_MF4_MASK = 9478 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M4_M1 = 9479 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M4_M1_MASK = 9480 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M4_MF2 = 9481 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M4_MF2_MASK = 9482 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M8_M1 = 9483 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI64_V_M8_M1_MASK = 9484 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_M1_M1 = 9485 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_M1_M1_MASK = 9486 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_MF2_M1 = 9487 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_MF2_M1_MASK = 9488 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_MF2_MF2 = 9489 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_MF2_MF2_MASK = 9490 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_MF4_M1 = 9491 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_MF4_M1_MASK = 9492 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_MF4_MF2 = 9493 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_MF4_MF2_MASK = 9494 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_MF4_MF4 = 9495 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_MF4_MF4_MASK = 9496 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_MF8_M1 = 9497 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_MF8_M1_MASK = 9498 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_MF8_MF2 = 9499 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_MF8_MF2_MASK = 9500 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_MF8_MF4 = 9501 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_MF8_MF4_MASK = 9502 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_MF8_MF8 = 9503 CEFBS_HasVInstructions, // PseudoVSOXSEG6EI8_V_MF8_MF8_MASK = 9504 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_M1_M1 = 9505 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_M1_M1_MASK = 9506 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_M1_MF2 = 9507 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_M1_MF2_MASK = 9508 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_M2_M1 = 9509 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_M2_M1_MASK = 9510 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_MF2_M1 = 9511 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_MF2_M1_MASK = 9512 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_MF2_MF2 = 9513 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_MF2_MF2_MASK = 9514 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_MF2_MF4 = 9515 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_MF2_MF4_MASK = 9516 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_MF4_M1 = 9517 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_MF4_M1_MASK = 9518 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_MF4_MF2 = 9519 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_MF4_MF2_MASK = 9520 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_MF4_MF4 = 9521 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_MF4_MF4_MASK = 9522 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_MF4_MF8 = 9523 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI16_V_MF4_MF8_MASK = 9524 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_M1_M1 = 9525 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_M1_M1_MASK = 9526 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_M1_MF2 = 9527 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_M1_MF2_MASK = 9528 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_M1_MF4 = 9529 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_M1_MF4_MASK = 9530 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_M2_M1 = 9531 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_M2_M1_MASK = 9532 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_M2_MF2 = 9533 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_M2_MF2_MASK = 9534 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_M4_M1 = 9535 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_M4_M1_MASK = 9536 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_MF2_M1 = 9537 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_MF2_M1_MASK = 9538 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_MF2_MF2 = 9539 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_MF2_MF2_MASK = 9540 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_MF2_MF4 = 9541 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_MF2_MF4_MASK = 9542 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_MF2_MF8 = 9543 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI32_V_MF2_MF8_MASK = 9544 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M1_M1 = 9545 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M1_M1_MASK = 9546 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M1_MF2 = 9547 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M1_MF2_MASK = 9548 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M1_MF4 = 9549 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M1_MF4_MASK = 9550 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M1_MF8 = 9551 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M1_MF8_MASK = 9552 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M2_M1 = 9553 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M2_M1_MASK = 9554 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M2_MF2 = 9555 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M2_MF2_MASK = 9556 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M2_MF4 = 9557 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M2_MF4_MASK = 9558 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M4_M1 = 9559 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M4_M1_MASK = 9560 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M4_MF2 = 9561 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M4_MF2_MASK = 9562 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M8_M1 = 9563 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI64_V_M8_M1_MASK = 9564 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_M1_M1 = 9565 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_M1_M1_MASK = 9566 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_MF2_M1 = 9567 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_MF2_M1_MASK = 9568 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_MF2_MF2 = 9569 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_MF2_MF2_MASK = 9570 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_MF4_M1 = 9571 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_MF4_M1_MASK = 9572 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_MF4_MF2 = 9573 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_MF4_MF2_MASK = 9574 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_MF4_MF4 = 9575 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_MF4_MF4_MASK = 9576 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_MF8_M1 = 9577 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_MF8_M1_MASK = 9578 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_MF8_MF2 = 9579 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_MF8_MF2_MASK = 9580 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_MF8_MF4 = 9581 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_MF8_MF4_MASK = 9582 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_MF8_MF8 = 9583 CEFBS_HasVInstructions, // PseudoVSOXSEG7EI8_V_MF8_MF8_MASK = 9584 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_M1_M1 = 9585 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_M1_M1_MASK = 9586 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_M1_MF2 = 9587 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_M1_MF2_MASK = 9588 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_M2_M1 = 9589 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_M2_M1_MASK = 9590 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_MF2_M1 = 9591 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_MF2_M1_MASK = 9592 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_MF2_MF2 = 9593 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_MF2_MF2_MASK = 9594 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_MF2_MF4 = 9595 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_MF2_MF4_MASK = 9596 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_MF4_M1 = 9597 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_MF4_M1_MASK = 9598 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_MF4_MF2 = 9599 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_MF4_MF2_MASK = 9600 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_MF4_MF4 = 9601 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_MF4_MF4_MASK = 9602 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_MF4_MF8 = 9603 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI16_V_MF4_MF8_MASK = 9604 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_M1_M1 = 9605 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_M1_M1_MASK = 9606 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_M1_MF2 = 9607 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_M1_MF2_MASK = 9608 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_M1_MF4 = 9609 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_M1_MF4_MASK = 9610 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_M2_M1 = 9611 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_M2_M1_MASK = 9612 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_M2_MF2 = 9613 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_M2_MF2_MASK = 9614 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_M4_M1 = 9615 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_M4_M1_MASK = 9616 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_MF2_M1 = 9617 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_MF2_M1_MASK = 9618 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_MF2_MF2 = 9619 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_MF2_MF2_MASK = 9620 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_MF2_MF4 = 9621 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_MF2_MF4_MASK = 9622 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_MF2_MF8 = 9623 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI32_V_MF2_MF8_MASK = 9624 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M1_M1 = 9625 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M1_M1_MASK = 9626 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M1_MF2 = 9627 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M1_MF2_MASK = 9628 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M1_MF4 = 9629 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M1_MF4_MASK = 9630 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M1_MF8 = 9631 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M1_MF8_MASK = 9632 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M2_M1 = 9633 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M2_M1_MASK = 9634 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M2_MF2 = 9635 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M2_MF2_MASK = 9636 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M2_MF4 = 9637 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M2_MF4_MASK = 9638 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M4_M1 = 9639 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M4_M1_MASK = 9640 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M4_MF2 = 9641 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M4_MF2_MASK = 9642 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M8_M1 = 9643 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI64_V_M8_M1_MASK = 9644 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_M1_M1 = 9645 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_M1_M1_MASK = 9646 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_MF2_M1 = 9647 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_MF2_M1_MASK = 9648 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_MF2_MF2 = 9649 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_MF2_MF2_MASK = 9650 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_MF4_M1 = 9651 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_MF4_M1_MASK = 9652 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_MF4_MF2 = 9653 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_MF4_MF2_MASK = 9654 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_MF4_MF4 = 9655 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_MF4_MF4_MASK = 9656 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_MF8_M1 = 9657 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_MF8_M1_MASK = 9658 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_MF8_MF2 = 9659 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_MF8_MF2_MASK = 9660 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_MF8_MF4 = 9661 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_MF8_MF4_MASK = 9662 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_MF8_MF8 = 9663 CEFBS_HasVInstructions, // PseudoVSOXSEG8EI8_V_MF8_MF8_MASK = 9664 CEFBS_HasVInstructions, // PseudoVSPILL2_M1 = 9665 CEFBS_HasVInstructions, // PseudoVSPILL2_M2 = 9666 CEFBS_HasVInstructions, // PseudoVSPILL2_M4 = 9667 CEFBS_HasVInstructions, // PseudoVSPILL2_MF2 = 9668 CEFBS_HasVInstructions, // PseudoVSPILL2_MF4 = 9669 CEFBS_HasVInstructions, // PseudoVSPILL2_MF8 = 9670 CEFBS_HasVInstructions, // PseudoVSPILL3_M1 = 9671 CEFBS_HasVInstructions, // PseudoVSPILL3_M2 = 9672 CEFBS_HasVInstructions, // PseudoVSPILL3_MF2 = 9673 CEFBS_HasVInstructions, // PseudoVSPILL3_MF4 = 9674 CEFBS_HasVInstructions, // PseudoVSPILL3_MF8 = 9675 CEFBS_HasVInstructions, // PseudoVSPILL4_M1 = 9676 CEFBS_HasVInstructions, // PseudoVSPILL4_M2 = 9677 CEFBS_HasVInstructions, // PseudoVSPILL4_MF2 = 9678 CEFBS_HasVInstructions, // PseudoVSPILL4_MF4 = 9679 CEFBS_HasVInstructions, // PseudoVSPILL4_MF8 = 9680 CEFBS_HasVInstructions, // PseudoVSPILL5_M1 = 9681 CEFBS_HasVInstructions, // PseudoVSPILL5_MF2 = 9682 CEFBS_HasVInstructions, // PseudoVSPILL5_MF4 = 9683 CEFBS_HasVInstructions, // PseudoVSPILL5_MF8 = 9684 CEFBS_HasVInstructions, // PseudoVSPILL6_M1 = 9685 CEFBS_HasVInstructions, // PseudoVSPILL6_MF2 = 9686 CEFBS_HasVInstructions, // PseudoVSPILL6_MF4 = 9687 CEFBS_HasVInstructions, // PseudoVSPILL6_MF8 = 9688 CEFBS_HasVInstructions, // PseudoVSPILL7_M1 = 9689 CEFBS_HasVInstructions, // PseudoVSPILL7_MF2 = 9690 CEFBS_HasVInstructions, // PseudoVSPILL7_MF4 = 9691 CEFBS_HasVInstructions, // PseudoVSPILL7_MF8 = 9692 CEFBS_HasVInstructions, // PseudoVSPILL8_M1 = 9693 CEFBS_HasVInstructions, // PseudoVSPILL8_MF2 = 9694 CEFBS_HasVInstructions, // PseudoVSPILL8_MF4 = 9695 CEFBS_HasVInstructions, // PseudoVSPILL8_MF8 = 9696 CEFBS_HasVInstructions, // PseudoVSRA_VI_M1 = 9697 CEFBS_HasVInstructions, // PseudoVSRA_VI_M1_MASK = 9698 CEFBS_HasVInstructions, // PseudoVSRA_VI_M1_TU = 9699 CEFBS_HasVInstructions, // PseudoVSRA_VI_M2 = 9700 CEFBS_HasVInstructions, // PseudoVSRA_VI_M2_MASK = 9701 CEFBS_HasVInstructions, // PseudoVSRA_VI_M2_TU = 9702 CEFBS_HasVInstructions, // PseudoVSRA_VI_M4 = 9703 CEFBS_HasVInstructions, // PseudoVSRA_VI_M4_MASK = 9704 CEFBS_HasVInstructions, // PseudoVSRA_VI_M4_TU = 9705 CEFBS_HasVInstructions, // PseudoVSRA_VI_M8 = 9706 CEFBS_HasVInstructions, // PseudoVSRA_VI_M8_MASK = 9707 CEFBS_HasVInstructions, // PseudoVSRA_VI_M8_TU = 9708 CEFBS_HasVInstructions, // PseudoVSRA_VI_MF2 = 9709 CEFBS_HasVInstructions, // PseudoVSRA_VI_MF2_MASK = 9710 CEFBS_HasVInstructions, // PseudoVSRA_VI_MF2_TU = 9711 CEFBS_HasVInstructions, // PseudoVSRA_VI_MF4 = 9712 CEFBS_HasVInstructions, // PseudoVSRA_VI_MF4_MASK = 9713 CEFBS_HasVInstructions, // PseudoVSRA_VI_MF4_TU = 9714 CEFBS_HasVInstructions, // PseudoVSRA_VI_MF8 = 9715 CEFBS_HasVInstructions, // PseudoVSRA_VI_MF8_MASK = 9716 CEFBS_HasVInstructions, // PseudoVSRA_VI_MF8_TU = 9717 CEFBS_HasVInstructions, // PseudoVSRA_VV_M1 = 9718 CEFBS_HasVInstructions, // PseudoVSRA_VV_M1_MASK = 9719 CEFBS_HasVInstructions, // PseudoVSRA_VV_M1_TU = 9720 CEFBS_HasVInstructions, // PseudoVSRA_VV_M2 = 9721 CEFBS_HasVInstructions, // PseudoVSRA_VV_M2_MASK = 9722 CEFBS_HasVInstructions, // PseudoVSRA_VV_M2_TU = 9723 CEFBS_HasVInstructions, // PseudoVSRA_VV_M4 = 9724 CEFBS_HasVInstructions, // PseudoVSRA_VV_M4_MASK = 9725 CEFBS_HasVInstructions, // PseudoVSRA_VV_M4_TU = 9726 CEFBS_HasVInstructions, // PseudoVSRA_VV_M8 = 9727 CEFBS_HasVInstructions, // PseudoVSRA_VV_M8_MASK = 9728 CEFBS_HasVInstructions, // PseudoVSRA_VV_M8_TU = 9729 CEFBS_HasVInstructions, // PseudoVSRA_VV_MF2 = 9730 CEFBS_HasVInstructions, // PseudoVSRA_VV_MF2_MASK = 9731 CEFBS_HasVInstructions, // PseudoVSRA_VV_MF2_TU = 9732 CEFBS_HasVInstructions, // PseudoVSRA_VV_MF4 = 9733 CEFBS_HasVInstructions, // PseudoVSRA_VV_MF4_MASK = 9734 CEFBS_HasVInstructions, // PseudoVSRA_VV_MF4_TU = 9735 CEFBS_HasVInstructions, // PseudoVSRA_VV_MF8 = 9736 CEFBS_HasVInstructions, // PseudoVSRA_VV_MF8_MASK = 9737 CEFBS_HasVInstructions, // PseudoVSRA_VV_MF8_TU = 9738 CEFBS_HasVInstructions, // PseudoVSRA_VX_M1 = 9739 CEFBS_HasVInstructions, // PseudoVSRA_VX_M1_MASK = 9740 CEFBS_HasVInstructions, // PseudoVSRA_VX_M1_TU = 9741 CEFBS_HasVInstructions, // PseudoVSRA_VX_M2 = 9742 CEFBS_HasVInstructions, // PseudoVSRA_VX_M2_MASK = 9743 CEFBS_HasVInstructions, // PseudoVSRA_VX_M2_TU = 9744 CEFBS_HasVInstructions, // PseudoVSRA_VX_M4 = 9745 CEFBS_HasVInstructions, // PseudoVSRA_VX_M4_MASK = 9746 CEFBS_HasVInstructions, // PseudoVSRA_VX_M4_TU = 9747 CEFBS_HasVInstructions, // PseudoVSRA_VX_M8 = 9748 CEFBS_HasVInstructions, // PseudoVSRA_VX_M8_MASK = 9749 CEFBS_HasVInstructions, // PseudoVSRA_VX_M8_TU = 9750 CEFBS_HasVInstructions, // PseudoVSRA_VX_MF2 = 9751 CEFBS_HasVInstructions, // PseudoVSRA_VX_MF2_MASK = 9752 CEFBS_HasVInstructions, // PseudoVSRA_VX_MF2_TU = 9753 CEFBS_HasVInstructions, // PseudoVSRA_VX_MF4 = 9754 CEFBS_HasVInstructions, // PseudoVSRA_VX_MF4_MASK = 9755 CEFBS_HasVInstructions, // PseudoVSRA_VX_MF4_TU = 9756 CEFBS_HasVInstructions, // PseudoVSRA_VX_MF8 = 9757 CEFBS_HasVInstructions, // PseudoVSRA_VX_MF8_MASK = 9758 CEFBS_HasVInstructions, // PseudoVSRA_VX_MF8_TU = 9759 CEFBS_HasVInstructions, // PseudoVSRL_VI_M1 = 9760 CEFBS_HasVInstructions, // PseudoVSRL_VI_M1_MASK = 9761 CEFBS_HasVInstructions, // PseudoVSRL_VI_M1_TU = 9762 CEFBS_HasVInstructions, // PseudoVSRL_VI_M2 = 9763 CEFBS_HasVInstructions, // PseudoVSRL_VI_M2_MASK = 9764 CEFBS_HasVInstructions, // PseudoVSRL_VI_M2_TU = 9765 CEFBS_HasVInstructions, // PseudoVSRL_VI_M4 = 9766 CEFBS_HasVInstructions, // PseudoVSRL_VI_M4_MASK = 9767 CEFBS_HasVInstructions, // PseudoVSRL_VI_M4_TU = 9768 CEFBS_HasVInstructions, // PseudoVSRL_VI_M8 = 9769 CEFBS_HasVInstructions, // PseudoVSRL_VI_M8_MASK = 9770 CEFBS_HasVInstructions, // PseudoVSRL_VI_M8_TU = 9771 CEFBS_HasVInstructions, // PseudoVSRL_VI_MF2 = 9772 CEFBS_HasVInstructions, // PseudoVSRL_VI_MF2_MASK = 9773 CEFBS_HasVInstructions, // PseudoVSRL_VI_MF2_TU = 9774 CEFBS_HasVInstructions, // PseudoVSRL_VI_MF4 = 9775 CEFBS_HasVInstructions, // PseudoVSRL_VI_MF4_MASK = 9776 CEFBS_HasVInstructions, // PseudoVSRL_VI_MF4_TU = 9777 CEFBS_HasVInstructions, // PseudoVSRL_VI_MF8 = 9778 CEFBS_HasVInstructions, // PseudoVSRL_VI_MF8_MASK = 9779 CEFBS_HasVInstructions, // PseudoVSRL_VI_MF8_TU = 9780 CEFBS_HasVInstructions, // PseudoVSRL_VV_M1 = 9781 CEFBS_HasVInstructions, // PseudoVSRL_VV_M1_MASK = 9782 CEFBS_HasVInstructions, // PseudoVSRL_VV_M1_TU = 9783 CEFBS_HasVInstructions, // PseudoVSRL_VV_M2 = 9784 CEFBS_HasVInstructions, // PseudoVSRL_VV_M2_MASK = 9785 CEFBS_HasVInstructions, // PseudoVSRL_VV_M2_TU = 9786 CEFBS_HasVInstructions, // PseudoVSRL_VV_M4 = 9787 CEFBS_HasVInstructions, // PseudoVSRL_VV_M4_MASK = 9788 CEFBS_HasVInstructions, // PseudoVSRL_VV_M4_TU = 9789 CEFBS_HasVInstructions, // PseudoVSRL_VV_M8 = 9790 CEFBS_HasVInstructions, // PseudoVSRL_VV_M8_MASK = 9791 CEFBS_HasVInstructions, // PseudoVSRL_VV_M8_TU = 9792 CEFBS_HasVInstructions, // PseudoVSRL_VV_MF2 = 9793 CEFBS_HasVInstructions, // PseudoVSRL_VV_MF2_MASK = 9794 CEFBS_HasVInstructions, // PseudoVSRL_VV_MF2_TU = 9795 CEFBS_HasVInstructions, // PseudoVSRL_VV_MF4 = 9796 CEFBS_HasVInstructions, // PseudoVSRL_VV_MF4_MASK = 9797 CEFBS_HasVInstructions, // PseudoVSRL_VV_MF4_TU = 9798 CEFBS_HasVInstructions, // PseudoVSRL_VV_MF8 = 9799 CEFBS_HasVInstructions, // PseudoVSRL_VV_MF8_MASK = 9800 CEFBS_HasVInstructions, // PseudoVSRL_VV_MF8_TU = 9801 CEFBS_HasVInstructions, // PseudoVSRL_VX_M1 = 9802 CEFBS_HasVInstructions, // PseudoVSRL_VX_M1_MASK = 9803 CEFBS_HasVInstructions, // PseudoVSRL_VX_M1_TU = 9804 CEFBS_HasVInstructions, // PseudoVSRL_VX_M2 = 9805 CEFBS_HasVInstructions, // PseudoVSRL_VX_M2_MASK = 9806 CEFBS_HasVInstructions, // PseudoVSRL_VX_M2_TU = 9807 CEFBS_HasVInstructions, // PseudoVSRL_VX_M4 = 9808 CEFBS_HasVInstructions, // PseudoVSRL_VX_M4_MASK = 9809 CEFBS_HasVInstructions, // PseudoVSRL_VX_M4_TU = 9810 CEFBS_HasVInstructions, // PseudoVSRL_VX_M8 = 9811 CEFBS_HasVInstructions, // PseudoVSRL_VX_M8_MASK = 9812 CEFBS_HasVInstructions, // PseudoVSRL_VX_M8_TU = 9813 CEFBS_HasVInstructions, // PseudoVSRL_VX_MF2 = 9814 CEFBS_HasVInstructions, // PseudoVSRL_VX_MF2_MASK = 9815 CEFBS_HasVInstructions, // PseudoVSRL_VX_MF2_TU = 9816 CEFBS_HasVInstructions, // PseudoVSRL_VX_MF4 = 9817 CEFBS_HasVInstructions, // PseudoVSRL_VX_MF4_MASK = 9818 CEFBS_HasVInstructions, // PseudoVSRL_VX_MF4_TU = 9819 CEFBS_HasVInstructions, // PseudoVSRL_VX_MF8 = 9820 CEFBS_HasVInstructions, // PseudoVSRL_VX_MF8_MASK = 9821 CEFBS_HasVInstructions, // PseudoVSRL_VX_MF8_TU = 9822 CEFBS_HasVInstructions, // PseudoVSSE16_V_M1 = 9823 CEFBS_HasVInstructions, // PseudoVSSE16_V_M1_MASK = 9824 CEFBS_HasVInstructions, // PseudoVSSE16_V_M2 = 9825 CEFBS_HasVInstructions, // PseudoVSSE16_V_M2_MASK = 9826 CEFBS_HasVInstructions, // PseudoVSSE16_V_M4 = 9827 CEFBS_HasVInstructions, // PseudoVSSE16_V_M4_MASK = 9828 CEFBS_HasVInstructions, // PseudoVSSE16_V_M8 = 9829 CEFBS_HasVInstructions, // PseudoVSSE16_V_M8_MASK = 9830 CEFBS_HasVInstructions, // PseudoVSSE16_V_MF2 = 9831 CEFBS_HasVInstructions, // PseudoVSSE16_V_MF2_MASK = 9832 CEFBS_HasVInstructions, // PseudoVSSE16_V_MF4 = 9833 CEFBS_HasVInstructions, // PseudoVSSE16_V_MF4_MASK = 9834 CEFBS_HasVInstructions, // PseudoVSSE32_V_M1 = 9835 CEFBS_HasVInstructions, // PseudoVSSE32_V_M1_MASK = 9836 CEFBS_HasVInstructions, // PseudoVSSE32_V_M2 = 9837 CEFBS_HasVInstructions, // PseudoVSSE32_V_M2_MASK = 9838 CEFBS_HasVInstructions, // PseudoVSSE32_V_M4 = 9839 CEFBS_HasVInstructions, // PseudoVSSE32_V_M4_MASK = 9840 CEFBS_HasVInstructions, // PseudoVSSE32_V_M8 = 9841 CEFBS_HasVInstructions, // PseudoVSSE32_V_M8_MASK = 9842 CEFBS_HasVInstructions, // PseudoVSSE32_V_MF2 = 9843 CEFBS_HasVInstructions, // PseudoVSSE32_V_MF2_MASK = 9844 CEFBS_HasVInstructions, // PseudoVSSE64_V_M1 = 9845 CEFBS_HasVInstructions, // PseudoVSSE64_V_M1_MASK = 9846 CEFBS_HasVInstructions, // PseudoVSSE64_V_M2 = 9847 CEFBS_HasVInstructions, // PseudoVSSE64_V_M2_MASK = 9848 CEFBS_HasVInstructions, // PseudoVSSE64_V_M4 = 9849 CEFBS_HasVInstructions, // PseudoVSSE64_V_M4_MASK = 9850 CEFBS_HasVInstructions, // PseudoVSSE64_V_M8 = 9851 CEFBS_HasVInstructions, // PseudoVSSE64_V_M8_MASK = 9852 CEFBS_HasVInstructions, // PseudoVSSE8_V_M1 = 9853 CEFBS_HasVInstructions, // PseudoVSSE8_V_M1_MASK = 9854 CEFBS_HasVInstructions, // PseudoVSSE8_V_M2 = 9855 CEFBS_HasVInstructions, // PseudoVSSE8_V_M2_MASK = 9856 CEFBS_HasVInstructions, // PseudoVSSE8_V_M4 = 9857 CEFBS_HasVInstructions, // PseudoVSSE8_V_M4_MASK = 9858 CEFBS_HasVInstructions, // PseudoVSSE8_V_M8 = 9859 CEFBS_HasVInstructions, // PseudoVSSE8_V_M8_MASK = 9860 CEFBS_HasVInstructions, // PseudoVSSE8_V_MF2 = 9861 CEFBS_HasVInstructions, // PseudoVSSE8_V_MF2_MASK = 9862 CEFBS_HasVInstructions, // PseudoVSSE8_V_MF4 = 9863 CEFBS_HasVInstructions, // PseudoVSSE8_V_MF4_MASK = 9864 CEFBS_HasVInstructions, // PseudoVSSE8_V_MF8 = 9865 CEFBS_HasVInstructions, // PseudoVSSE8_V_MF8_MASK = 9866 CEFBS_HasVInstructions, // PseudoVSSEG2E16_V_M1 = 9867 CEFBS_HasVInstructions, // PseudoVSSEG2E16_V_M1_MASK = 9868 CEFBS_HasVInstructions, // PseudoVSSEG2E16_V_M2 = 9869 CEFBS_HasVInstructions, // PseudoVSSEG2E16_V_M2_MASK = 9870 CEFBS_HasVInstructions, // PseudoVSSEG2E16_V_M4 = 9871 CEFBS_HasVInstructions, // PseudoVSSEG2E16_V_M4_MASK = 9872 CEFBS_HasVInstructions, // PseudoVSSEG2E16_V_MF2 = 9873 CEFBS_HasVInstructions, // PseudoVSSEG2E16_V_MF2_MASK = 9874 CEFBS_HasVInstructions, // PseudoVSSEG2E16_V_MF4 = 9875 CEFBS_HasVInstructions, // PseudoVSSEG2E16_V_MF4_MASK = 9876 CEFBS_HasVInstructions, // PseudoVSSEG2E32_V_M1 = 9877 CEFBS_HasVInstructions, // PseudoVSSEG2E32_V_M1_MASK = 9878 CEFBS_HasVInstructions, // PseudoVSSEG2E32_V_M2 = 9879 CEFBS_HasVInstructions, // PseudoVSSEG2E32_V_M2_MASK = 9880 CEFBS_HasVInstructions, // PseudoVSSEG2E32_V_M4 = 9881 CEFBS_HasVInstructions, // PseudoVSSEG2E32_V_M4_MASK = 9882 CEFBS_HasVInstructions, // PseudoVSSEG2E32_V_MF2 = 9883 CEFBS_HasVInstructions, // PseudoVSSEG2E32_V_MF2_MASK = 9884 CEFBS_HasVInstructions, // PseudoVSSEG2E64_V_M1 = 9885 CEFBS_HasVInstructions, // PseudoVSSEG2E64_V_M1_MASK = 9886 CEFBS_HasVInstructions, // PseudoVSSEG2E64_V_M2 = 9887 CEFBS_HasVInstructions, // PseudoVSSEG2E64_V_M2_MASK = 9888 CEFBS_HasVInstructions, // PseudoVSSEG2E64_V_M4 = 9889 CEFBS_HasVInstructions, // PseudoVSSEG2E64_V_M4_MASK = 9890 CEFBS_HasVInstructions, // PseudoVSSEG2E8_V_M1 = 9891 CEFBS_HasVInstructions, // PseudoVSSEG2E8_V_M1_MASK = 9892 CEFBS_HasVInstructions, // PseudoVSSEG2E8_V_M2 = 9893 CEFBS_HasVInstructions, // PseudoVSSEG2E8_V_M2_MASK = 9894 CEFBS_HasVInstructions, // PseudoVSSEG2E8_V_M4 = 9895 CEFBS_HasVInstructions, // PseudoVSSEG2E8_V_M4_MASK = 9896 CEFBS_HasVInstructions, // PseudoVSSEG2E8_V_MF2 = 9897 CEFBS_HasVInstructions, // PseudoVSSEG2E8_V_MF2_MASK = 9898 CEFBS_HasVInstructions, // PseudoVSSEG2E8_V_MF4 = 9899 CEFBS_HasVInstructions, // PseudoVSSEG2E8_V_MF4_MASK = 9900 CEFBS_HasVInstructions, // PseudoVSSEG2E8_V_MF8 = 9901 CEFBS_HasVInstructions, // PseudoVSSEG2E8_V_MF8_MASK = 9902 CEFBS_HasVInstructions, // PseudoVSSEG3E16_V_M1 = 9903 CEFBS_HasVInstructions, // PseudoVSSEG3E16_V_M1_MASK = 9904 CEFBS_HasVInstructions, // PseudoVSSEG3E16_V_M2 = 9905 CEFBS_HasVInstructions, // PseudoVSSEG3E16_V_M2_MASK = 9906 CEFBS_HasVInstructions, // PseudoVSSEG3E16_V_MF2 = 9907 CEFBS_HasVInstructions, // PseudoVSSEG3E16_V_MF2_MASK = 9908 CEFBS_HasVInstructions, // PseudoVSSEG3E16_V_MF4 = 9909 CEFBS_HasVInstructions, // PseudoVSSEG3E16_V_MF4_MASK = 9910 CEFBS_HasVInstructions, // PseudoVSSEG3E32_V_M1 = 9911 CEFBS_HasVInstructions, // PseudoVSSEG3E32_V_M1_MASK = 9912 CEFBS_HasVInstructions, // PseudoVSSEG3E32_V_M2 = 9913 CEFBS_HasVInstructions, // PseudoVSSEG3E32_V_M2_MASK = 9914 CEFBS_HasVInstructions, // PseudoVSSEG3E32_V_MF2 = 9915 CEFBS_HasVInstructions, // PseudoVSSEG3E32_V_MF2_MASK = 9916 CEFBS_HasVInstructions, // PseudoVSSEG3E64_V_M1 = 9917 CEFBS_HasVInstructions, // PseudoVSSEG3E64_V_M1_MASK = 9918 CEFBS_HasVInstructions, // PseudoVSSEG3E64_V_M2 = 9919 CEFBS_HasVInstructions, // PseudoVSSEG3E64_V_M2_MASK = 9920 CEFBS_HasVInstructions, // PseudoVSSEG3E8_V_M1 = 9921 CEFBS_HasVInstructions, // PseudoVSSEG3E8_V_M1_MASK = 9922 CEFBS_HasVInstructions, // PseudoVSSEG3E8_V_M2 = 9923 CEFBS_HasVInstructions, // PseudoVSSEG3E8_V_M2_MASK = 9924 CEFBS_HasVInstructions, // PseudoVSSEG3E8_V_MF2 = 9925 CEFBS_HasVInstructions, // PseudoVSSEG3E8_V_MF2_MASK = 9926 CEFBS_HasVInstructions, // PseudoVSSEG3E8_V_MF4 = 9927 CEFBS_HasVInstructions, // PseudoVSSEG3E8_V_MF4_MASK = 9928 CEFBS_HasVInstructions, // PseudoVSSEG3E8_V_MF8 = 9929 CEFBS_HasVInstructions, // PseudoVSSEG3E8_V_MF8_MASK = 9930 CEFBS_HasVInstructions, // PseudoVSSEG4E16_V_M1 = 9931 CEFBS_HasVInstructions, // PseudoVSSEG4E16_V_M1_MASK = 9932 CEFBS_HasVInstructions, // PseudoVSSEG4E16_V_M2 = 9933 CEFBS_HasVInstructions, // PseudoVSSEG4E16_V_M2_MASK = 9934 CEFBS_HasVInstructions, // PseudoVSSEG4E16_V_MF2 = 9935 CEFBS_HasVInstructions, // PseudoVSSEG4E16_V_MF2_MASK = 9936 CEFBS_HasVInstructions, // PseudoVSSEG4E16_V_MF4 = 9937 CEFBS_HasVInstructions, // PseudoVSSEG4E16_V_MF4_MASK = 9938 CEFBS_HasVInstructions, // PseudoVSSEG4E32_V_M1 = 9939 CEFBS_HasVInstructions, // PseudoVSSEG4E32_V_M1_MASK = 9940 CEFBS_HasVInstructions, // PseudoVSSEG4E32_V_M2 = 9941 CEFBS_HasVInstructions, // PseudoVSSEG4E32_V_M2_MASK = 9942 CEFBS_HasVInstructions, // PseudoVSSEG4E32_V_MF2 = 9943 CEFBS_HasVInstructions, // PseudoVSSEG4E32_V_MF2_MASK = 9944 CEFBS_HasVInstructions, // PseudoVSSEG4E64_V_M1 = 9945 CEFBS_HasVInstructions, // PseudoVSSEG4E64_V_M1_MASK = 9946 CEFBS_HasVInstructions, // PseudoVSSEG4E64_V_M2 = 9947 CEFBS_HasVInstructions, // PseudoVSSEG4E64_V_M2_MASK = 9948 CEFBS_HasVInstructions, // PseudoVSSEG4E8_V_M1 = 9949 CEFBS_HasVInstructions, // PseudoVSSEG4E8_V_M1_MASK = 9950 CEFBS_HasVInstructions, // PseudoVSSEG4E8_V_M2 = 9951 CEFBS_HasVInstructions, // PseudoVSSEG4E8_V_M2_MASK = 9952 CEFBS_HasVInstructions, // PseudoVSSEG4E8_V_MF2 = 9953 CEFBS_HasVInstructions, // PseudoVSSEG4E8_V_MF2_MASK = 9954 CEFBS_HasVInstructions, // PseudoVSSEG4E8_V_MF4 = 9955 CEFBS_HasVInstructions, // PseudoVSSEG4E8_V_MF4_MASK = 9956 CEFBS_HasVInstructions, // PseudoVSSEG4E8_V_MF8 = 9957 CEFBS_HasVInstructions, // PseudoVSSEG4E8_V_MF8_MASK = 9958 CEFBS_HasVInstructions, // PseudoVSSEG5E16_V_M1 = 9959 CEFBS_HasVInstructions, // PseudoVSSEG5E16_V_M1_MASK = 9960 CEFBS_HasVInstructions, // PseudoVSSEG5E16_V_MF2 = 9961 CEFBS_HasVInstructions, // PseudoVSSEG5E16_V_MF2_MASK = 9962 CEFBS_HasVInstructions, // PseudoVSSEG5E16_V_MF4 = 9963 CEFBS_HasVInstructions, // PseudoVSSEG5E16_V_MF4_MASK = 9964 CEFBS_HasVInstructions, // PseudoVSSEG5E32_V_M1 = 9965 CEFBS_HasVInstructions, // PseudoVSSEG5E32_V_M1_MASK = 9966 CEFBS_HasVInstructions, // PseudoVSSEG5E32_V_MF2 = 9967 CEFBS_HasVInstructions, // PseudoVSSEG5E32_V_MF2_MASK = 9968 CEFBS_HasVInstructions, // PseudoVSSEG5E64_V_M1 = 9969 CEFBS_HasVInstructions, // PseudoVSSEG5E64_V_M1_MASK = 9970 CEFBS_HasVInstructions, // PseudoVSSEG5E8_V_M1 = 9971 CEFBS_HasVInstructions, // PseudoVSSEG5E8_V_M1_MASK = 9972 CEFBS_HasVInstructions, // PseudoVSSEG5E8_V_MF2 = 9973 CEFBS_HasVInstructions, // PseudoVSSEG5E8_V_MF2_MASK = 9974 CEFBS_HasVInstructions, // PseudoVSSEG5E8_V_MF4 = 9975 CEFBS_HasVInstructions, // PseudoVSSEG5E8_V_MF4_MASK = 9976 CEFBS_HasVInstructions, // PseudoVSSEG5E8_V_MF8 = 9977 CEFBS_HasVInstructions, // PseudoVSSEG5E8_V_MF8_MASK = 9978 CEFBS_HasVInstructions, // PseudoVSSEG6E16_V_M1 = 9979 CEFBS_HasVInstructions, // PseudoVSSEG6E16_V_M1_MASK = 9980 CEFBS_HasVInstructions, // PseudoVSSEG6E16_V_MF2 = 9981 CEFBS_HasVInstructions, // PseudoVSSEG6E16_V_MF2_MASK = 9982 CEFBS_HasVInstructions, // PseudoVSSEG6E16_V_MF4 = 9983 CEFBS_HasVInstructions, // PseudoVSSEG6E16_V_MF4_MASK = 9984 CEFBS_HasVInstructions, // PseudoVSSEG6E32_V_M1 = 9985 CEFBS_HasVInstructions, // PseudoVSSEG6E32_V_M1_MASK = 9986 CEFBS_HasVInstructions, // PseudoVSSEG6E32_V_MF2 = 9987 CEFBS_HasVInstructions, // PseudoVSSEG6E32_V_MF2_MASK = 9988 CEFBS_HasVInstructions, // PseudoVSSEG6E64_V_M1 = 9989 CEFBS_HasVInstructions, // PseudoVSSEG6E64_V_M1_MASK = 9990 CEFBS_HasVInstructions, // PseudoVSSEG6E8_V_M1 = 9991 CEFBS_HasVInstructions, // PseudoVSSEG6E8_V_M1_MASK = 9992 CEFBS_HasVInstructions, // PseudoVSSEG6E8_V_MF2 = 9993 CEFBS_HasVInstructions, // PseudoVSSEG6E8_V_MF2_MASK = 9994 CEFBS_HasVInstructions, // PseudoVSSEG6E8_V_MF4 = 9995 CEFBS_HasVInstructions, // PseudoVSSEG6E8_V_MF4_MASK = 9996 CEFBS_HasVInstructions, // PseudoVSSEG6E8_V_MF8 = 9997 CEFBS_HasVInstructions, // PseudoVSSEG6E8_V_MF8_MASK = 9998 CEFBS_HasVInstructions, // PseudoVSSEG7E16_V_M1 = 9999 CEFBS_HasVInstructions, // PseudoVSSEG7E16_V_M1_MASK = 10000 CEFBS_HasVInstructions, // PseudoVSSEG7E16_V_MF2 = 10001 CEFBS_HasVInstructions, // PseudoVSSEG7E16_V_MF2_MASK = 10002 CEFBS_HasVInstructions, // PseudoVSSEG7E16_V_MF4 = 10003 CEFBS_HasVInstructions, // PseudoVSSEG7E16_V_MF4_MASK = 10004 CEFBS_HasVInstructions, // PseudoVSSEG7E32_V_M1 = 10005 CEFBS_HasVInstructions, // PseudoVSSEG7E32_V_M1_MASK = 10006 CEFBS_HasVInstructions, // PseudoVSSEG7E32_V_MF2 = 10007 CEFBS_HasVInstructions, // PseudoVSSEG7E32_V_MF2_MASK = 10008 CEFBS_HasVInstructions, // PseudoVSSEG7E64_V_M1 = 10009 CEFBS_HasVInstructions, // PseudoVSSEG7E64_V_M1_MASK = 10010 CEFBS_HasVInstructions, // PseudoVSSEG7E8_V_M1 = 10011 CEFBS_HasVInstructions, // PseudoVSSEG7E8_V_M1_MASK = 10012 CEFBS_HasVInstructions, // PseudoVSSEG7E8_V_MF2 = 10013 CEFBS_HasVInstructions, // PseudoVSSEG7E8_V_MF2_MASK = 10014 CEFBS_HasVInstructions, // PseudoVSSEG7E8_V_MF4 = 10015 CEFBS_HasVInstructions, // PseudoVSSEG7E8_V_MF4_MASK = 10016 CEFBS_HasVInstructions, // PseudoVSSEG7E8_V_MF8 = 10017 CEFBS_HasVInstructions, // PseudoVSSEG7E8_V_MF8_MASK = 10018 CEFBS_HasVInstructions, // PseudoVSSEG8E16_V_M1 = 10019 CEFBS_HasVInstructions, // PseudoVSSEG8E16_V_M1_MASK = 10020 CEFBS_HasVInstructions, // PseudoVSSEG8E16_V_MF2 = 10021 CEFBS_HasVInstructions, // PseudoVSSEG8E16_V_MF2_MASK = 10022 CEFBS_HasVInstructions, // PseudoVSSEG8E16_V_MF4 = 10023 CEFBS_HasVInstructions, // PseudoVSSEG8E16_V_MF4_MASK = 10024 CEFBS_HasVInstructions, // PseudoVSSEG8E32_V_M1 = 10025 CEFBS_HasVInstructions, // PseudoVSSEG8E32_V_M1_MASK = 10026 CEFBS_HasVInstructions, // PseudoVSSEG8E32_V_MF2 = 10027 CEFBS_HasVInstructions, // PseudoVSSEG8E32_V_MF2_MASK = 10028 CEFBS_HasVInstructions, // PseudoVSSEG8E64_V_M1 = 10029 CEFBS_HasVInstructions, // PseudoVSSEG8E64_V_M1_MASK = 10030 CEFBS_HasVInstructions, // PseudoVSSEG8E8_V_M1 = 10031 CEFBS_HasVInstructions, // PseudoVSSEG8E8_V_M1_MASK = 10032 CEFBS_HasVInstructions, // PseudoVSSEG8E8_V_MF2 = 10033 CEFBS_HasVInstructions, // PseudoVSSEG8E8_V_MF2_MASK = 10034 CEFBS_HasVInstructions, // PseudoVSSEG8E8_V_MF4 = 10035 CEFBS_HasVInstructions, // PseudoVSSEG8E8_V_MF4_MASK = 10036 CEFBS_HasVInstructions, // PseudoVSSEG8E8_V_MF8 = 10037 CEFBS_HasVInstructions, // PseudoVSSEG8E8_V_MF8_MASK = 10038 CEFBS_HasVInstructions, // PseudoVSSRA_VI_M1 = 10039 CEFBS_HasVInstructions, // PseudoVSSRA_VI_M1_MASK = 10040 CEFBS_HasVInstructions, // PseudoVSSRA_VI_M1_TU = 10041 CEFBS_HasVInstructions, // PseudoVSSRA_VI_M2 = 10042 CEFBS_HasVInstructions, // PseudoVSSRA_VI_M2_MASK = 10043 CEFBS_HasVInstructions, // PseudoVSSRA_VI_M2_TU = 10044 CEFBS_HasVInstructions, // PseudoVSSRA_VI_M4 = 10045 CEFBS_HasVInstructions, // PseudoVSSRA_VI_M4_MASK = 10046 CEFBS_HasVInstructions, // PseudoVSSRA_VI_M4_TU = 10047 CEFBS_HasVInstructions, // PseudoVSSRA_VI_M8 = 10048 CEFBS_HasVInstructions, // PseudoVSSRA_VI_M8_MASK = 10049 CEFBS_HasVInstructions, // PseudoVSSRA_VI_M8_TU = 10050 CEFBS_HasVInstructions, // PseudoVSSRA_VI_MF2 = 10051 CEFBS_HasVInstructions, // PseudoVSSRA_VI_MF2_MASK = 10052 CEFBS_HasVInstructions, // PseudoVSSRA_VI_MF2_TU = 10053 CEFBS_HasVInstructions, // PseudoVSSRA_VI_MF4 = 10054 CEFBS_HasVInstructions, // PseudoVSSRA_VI_MF4_MASK = 10055 CEFBS_HasVInstructions, // PseudoVSSRA_VI_MF4_TU = 10056 CEFBS_HasVInstructions, // PseudoVSSRA_VI_MF8 = 10057 CEFBS_HasVInstructions, // PseudoVSSRA_VI_MF8_MASK = 10058 CEFBS_HasVInstructions, // PseudoVSSRA_VI_MF8_TU = 10059 CEFBS_HasVInstructions, // PseudoVSSRA_VV_M1 = 10060 CEFBS_HasVInstructions, // PseudoVSSRA_VV_M1_MASK = 10061 CEFBS_HasVInstructions, // PseudoVSSRA_VV_M1_TU = 10062 CEFBS_HasVInstructions, // PseudoVSSRA_VV_M2 = 10063 CEFBS_HasVInstructions, // PseudoVSSRA_VV_M2_MASK = 10064 CEFBS_HasVInstructions, // PseudoVSSRA_VV_M2_TU = 10065 CEFBS_HasVInstructions, // PseudoVSSRA_VV_M4 = 10066 CEFBS_HasVInstructions, // PseudoVSSRA_VV_M4_MASK = 10067 CEFBS_HasVInstructions, // PseudoVSSRA_VV_M4_TU = 10068 CEFBS_HasVInstructions, // PseudoVSSRA_VV_M8 = 10069 CEFBS_HasVInstructions, // PseudoVSSRA_VV_M8_MASK = 10070 CEFBS_HasVInstructions, // PseudoVSSRA_VV_M8_TU = 10071 CEFBS_HasVInstructions, // PseudoVSSRA_VV_MF2 = 10072 CEFBS_HasVInstructions, // PseudoVSSRA_VV_MF2_MASK = 10073 CEFBS_HasVInstructions, // PseudoVSSRA_VV_MF2_TU = 10074 CEFBS_HasVInstructions, // PseudoVSSRA_VV_MF4 = 10075 CEFBS_HasVInstructions, // PseudoVSSRA_VV_MF4_MASK = 10076 CEFBS_HasVInstructions, // PseudoVSSRA_VV_MF4_TU = 10077 CEFBS_HasVInstructions, // PseudoVSSRA_VV_MF8 = 10078 CEFBS_HasVInstructions, // PseudoVSSRA_VV_MF8_MASK = 10079 CEFBS_HasVInstructions, // PseudoVSSRA_VV_MF8_TU = 10080 CEFBS_HasVInstructions, // PseudoVSSRA_VX_M1 = 10081 CEFBS_HasVInstructions, // PseudoVSSRA_VX_M1_MASK = 10082 CEFBS_HasVInstructions, // PseudoVSSRA_VX_M1_TU = 10083 CEFBS_HasVInstructions, // PseudoVSSRA_VX_M2 = 10084 CEFBS_HasVInstructions, // PseudoVSSRA_VX_M2_MASK = 10085 CEFBS_HasVInstructions, // PseudoVSSRA_VX_M2_TU = 10086 CEFBS_HasVInstructions, // PseudoVSSRA_VX_M4 = 10087 CEFBS_HasVInstructions, // PseudoVSSRA_VX_M4_MASK = 10088 CEFBS_HasVInstructions, // PseudoVSSRA_VX_M4_TU = 10089 CEFBS_HasVInstructions, // PseudoVSSRA_VX_M8 = 10090 CEFBS_HasVInstructions, // PseudoVSSRA_VX_M8_MASK = 10091 CEFBS_HasVInstructions, // PseudoVSSRA_VX_M8_TU = 10092 CEFBS_HasVInstructions, // PseudoVSSRA_VX_MF2 = 10093 CEFBS_HasVInstructions, // PseudoVSSRA_VX_MF2_MASK = 10094 CEFBS_HasVInstructions, // PseudoVSSRA_VX_MF2_TU = 10095 CEFBS_HasVInstructions, // PseudoVSSRA_VX_MF4 = 10096 CEFBS_HasVInstructions, // PseudoVSSRA_VX_MF4_MASK = 10097 CEFBS_HasVInstructions, // PseudoVSSRA_VX_MF4_TU = 10098 CEFBS_HasVInstructions, // PseudoVSSRA_VX_MF8 = 10099 CEFBS_HasVInstructions, // PseudoVSSRA_VX_MF8_MASK = 10100 CEFBS_HasVInstructions, // PseudoVSSRA_VX_MF8_TU = 10101 CEFBS_HasVInstructions, // PseudoVSSRL_VI_M1 = 10102 CEFBS_HasVInstructions, // PseudoVSSRL_VI_M1_MASK = 10103 CEFBS_HasVInstructions, // PseudoVSSRL_VI_M1_TU = 10104 CEFBS_HasVInstructions, // PseudoVSSRL_VI_M2 = 10105 CEFBS_HasVInstructions, // PseudoVSSRL_VI_M2_MASK = 10106 CEFBS_HasVInstructions, // PseudoVSSRL_VI_M2_TU = 10107 CEFBS_HasVInstructions, // PseudoVSSRL_VI_M4 = 10108 CEFBS_HasVInstructions, // PseudoVSSRL_VI_M4_MASK = 10109 CEFBS_HasVInstructions, // PseudoVSSRL_VI_M4_TU = 10110 CEFBS_HasVInstructions, // PseudoVSSRL_VI_M8 = 10111 CEFBS_HasVInstructions, // PseudoVSSRL_VI_M8_MASK = 10112 CEFBS_HasVInstructions, // PseudoVSSRL_VI_M8_TU = 10113 CEFBS_HasVInstructions, // PseudoVSSRL_VI_MF2 = 10114 CEFBS_HasVInstructions, // PseudoVSSRL_VI_MF2_MASK = 10115 CEFBS_HasVInstructions, // PseudoVSSRL_VI_MF2_TU = 10116 CEFBS_HasVInstructions, // PseudoVSSRL_VI_MF4 = 10117 CEFBS_HasVInstructions, // PseudoVSSRL_VI_MF4_MASK = 10118 CEFBS_HasVInstructions, // PseudoVSSRL_VI_MF4_TU = 10119 CEFBS_HasVInstructions, // PseudoVSSRL_VI_MF8 = 10120 CEFBS_HasVInstructions, // PseudoVSSRL_VI_MF8_MASK = 10121 CEFBS_HasVInstructions, // PseudoVSSRL_VI_MF8_TU = 10122 CEFBS_HasVInstructions, // PseudoVSSRL_VV_M1 = 10123 CEFBS_HasVInstructions, // PseudoVSSRL_VV_M1_MASK = 10124 CEFBS_HasVInstructions, // PseudoVSSRL_VV_M1_TU = 10125 CEFBS_HasVInstructions, // PseudoVSSRL_VV_M2 = 10126 CEFBS_HasVInstructions, // PseudoVSSRL_VV_M2_MASK = 10127 CEFBS_HasVInstructions, // PseudoVSSRL_VV_M2_TU = 10128 CEFBS_HasVInstructions, // PseudoVSSRL_VV_M4 = 10129 CEFBS_HasVInstructions, // PseudoVSSRL_VV_M4_MASK = 10130 CEFBS_HasVInstructions, // PseudoVSSRL_VV_M4_TU = 10131 CEFBS_HasVInstructions, // PseudoVSSRL_VV_M8 = 10132 CEFBS_HasVInstructions, // PseudoVSSRL_VV_M8_MASK = 10133 CEFBS_HasVInstructions, // PseudoVSSRL_VV_M8_TU = 10134 CEFBS_HasVInstructions, // PseudoVSSRL_VV_MF2 = 10135 CEFBS_HasVInstructions, // PseudoVSSRL_VV_MF2_MASK = 10136 CEFBS_HasVInstructions, // PseudoVSSRL_VV_MF2_TU = 10137 CEFBS_HasVInstructions, // PseudoVSSRL_VV_MF4 = 10138 CEFBS_HasVInstructions, // PseudoVSSRL_VV_MF4_MASK = 10139 CEFBS_HasVInstructions, // PseudoVSSRL_VV_MF4_TU = 10140 CEFBS_HasVInstructions, // PseudoVSSRL_VV_MF8 = 10141 CEFBS_HasVInstructions, // PseudoVSSRL_VV_MF8_MASK = 10142 CEFBS_HasVInstructions, // PseudoVSSRL_VV_MF8_TU = 10143 CEFBS_HasVInstructions, // PseudoVSSRL_VX_M1 = 10144 CEFBS_HasVInstructions, // PseudoVSSRL_VX_M1_MASK = 10145 CEFBS_HasVInstructions, // PseudoVSSRL_VX_M1_TU = 10146 CEFBS_HasVInstructions, // PseudoVSSRL_VX_M2 = 10147 CEFBS_HasVInstructions, // PseudoVSSRL_VX_M2_MASK = 10148 CEFBS_HasVInstructions, // PseudoVSSRL_VX_M2_TU = 10149 CEFBS_HasVInstructions, // PseudoVSSRL_VX_M4 = 10150 CEFBS_HasVInstructions, // PseudoVSSRL_VX_M4_MASK = 10151 CEFBS_HasVInstructions, // PseudoVSSRL_VX_M4_TU = 10152 CEFBS_HasVInstructions, // PseudoVSSRL_VX_M8 = 10153 CEFBS_HasVInstructions, // PseudoVSSRL_VX_M8_MASK = 10154 CEFBS_HasVInstructions, // PseudoVSSRL_VX_M8_TU = 10155 CEFBS_HasVInstructions, // PseudoVSSRL_VX_MF2 = 10156 CEFBS_HasVInstructions, // PseudoVSSRL_VX_MF2_MASK = 10157 CEFBS_HasVInstructions, // PseudoVSSRL_VX_MF2_TU = 10158 CEFBS_HasVInstructions, // PseudoVSSRL_VX_MF4 = 10159 CEFBS_HasVInstructions, // PseudoVSSRL_VX_MF4_MASK = 10160 CEFBS_HasVInstructions, // PseudoVSSRL_VX_MF4_TU = 10161 CEFBS_HasVInstructions, // PseudoVSSRL_VX_MF8 = 10162 CEFBS_HasVInstructions, // PseudoVSSRL_VX_MF8_MASK = 10163 CEFBS_HasVInstructions, // PseudoVSSRL_VX_MF8_TU = 10164 CEFBS_HasVInstructions, // PseudoVSSSEG2E16_V_M1 = 10165 CEFBS_HasVInstructions, // PseudoVSSSEG2E16_V_M1_MASK = 10166 CEFBS_HasVInstructions, // PseudoVSSSEG2E16_V_M2 = 10167 CEFBS_HasVInstructions, // PseudoVSSSEG2E16_V_M2_MASK = 10168 CEFBS_HasVInstructions, // PseudoVSSSEG2E16_V_M4 = 10169 CEFBS_HasVInstructions, // PseudoVSSSEG2E16_V_M4_MASK = 10170 CEFBS_HasVInstructions, // PseudoVSSSEG2E16_V_MF2 = 10171 CEFBS_HasVInstructions, // PseudoVSSSEG2E16_V_MF2_MASK = 10172 CEFBS_HasVInstructions, // PseudoVSSSEG2E16_V_MF4 = 10173 CEFBS_HasVInstructions, // PseudoVSSSEG2E16_V_MF4_MASK = 10174 CEFBS_HasVInstructions, // PseudoVSSSEG2E32_V_M1 = 10175 CEFBS_HasVInstructions, // PseudoVSSSEG2E32_V_M1_MASK = 10176 CEFBS_HasVInstructions, // PseudoVSSSEG2E32_V_M2 = 10177 CEFBS_HasVInstructions, // PseudoVSSSEG2E32_V_M2_MASK = 10178 CEFBS_HasVInstructions, // PseudoVSSSEG2E32_V_M4 = 10179 CEFBS_HasVInstructions, // PseudoVSSSEG2E32_V_M4_MASK = 10180 CEFBS_HasVInstructions, // PseudoVSSSEG2E32_V_MF2 = 10181 CEFBS_HasVInstructions, // PseudoVSSSEG2E32_V_MF2_MASK = 10182 CEFBS_HasVInstructions, // PseudoVSSSEG2E64_V_M1 = 10183 CEFBS_HasVInstructions, // PseudoVSSSEG2E64_V_M1_MASK = 10184 CEFBS_HasVInstructions, // PseudoVSSSEG2E64_V_M2 = 10185 CEFBS_HasVInstructions, // PseudoVSSSEG2E64_V_M2_MASK = 10186 CEFBS_HasVInstructions, // PseudoVSSSEG2E64_V_M4 = 10187 CEFBS_HasVInstructions, // PseudoVSSSEG2E64_V_M4_MASK = 10188 CEFBS_HasVInstructions, // PseudoVSSSEG2E8_V_M1 = 10189 CEFBS_HasVInstructions, // PseudoVSSSEG2E8_V_M1_MASK = 10190 CEFBS_HasVInstructions, // PseudoVSSSEG2E8_V_M2 = 10191 CEFBS_HasVInstructions, // PseudoVSSSEG2E8_V_M2_MASK = 10192 CEFBS_HasVInstructions, // PseudoVSSSEG2E8_V_M4 = 10193 CEFBS_HasVInstructions, // PseudoVSSSEG2E8_V_M4_MASK = 10194 CEFBS_HasVInstructions, // PseudoVSSSEG2E8_V_MF2 = 10195 CEFBS_HasVInstructions, // PseudoVSSSEG2E8_V_MF2_MASK = 10196 CEFBS_HasVInstructions, // PseudoVSSSEG2E8_V_MF4 = 10197 CEFBS_HasVInstructions, // PseudoVSSSEG2E8_V_MF4_MASK = 10198 CEFBS_HasVInstructions, // PseudoVSSSEG2E8_V_MF8 = 10199 CEFBS_HasVInstructions, // PseudoVSSSEG2E8_V_MF8_MASK = 10200 CEFBS_HasVInstructions, // PseudoVSSSEG3E16_V_M1 = 10201 CEFBS_HasVInstructions, // PseudoVSSSEG3E16_V_M1_MASK = 10202 CEFBS_HasVInstructions, // PseudoVSSSEG3E16_V_M2 = 10203 CEFBS_HasVInstructions, // PseudoVSSSEG3E16_V_M2_MASK = 10204 CEFBS_HasVInstructions, // PseudoVSSSEG3E16_V_MF2 = 10205 CEFBS_HasVInstructions, // PseudoVSSSEG3E16_V_MF2_MASK = 10206 CEFBS_HasVInstructions, // PseudoVSSSEG3E16_V_MF4 = 10207 CEFBS_HasVInstructions, // PseudoVSSSEG3E16_V_MF4_MASK = 10208 CEFBS_HasVInstructions, // PseudoVSSSEG3E32_V_M1 = 10209 CEFBS_HasVInstructions, // PseudoVSSSEG3E32_V_M1_MASK = 10210 CEFBS_HasVInstructions, // PseudoVSSSEG3E32_V_M2 = 10211 CEFBS_HasVInstructions, // PseudoVSSSEG3E32_V_M2_MASK = 10212 CEFBS_HasVInstructions, // PseudoVSSSEG3E32_V_MF2 = 10213 CEFBS_HasVInstructions, // PseudoVSSSEG3E32_V_MF2_MASK = 10214 CEFBS_HasVInstructions, // PseudoVSSSEG3E64_V_M1 = 10215 CEFBS_HasVInstructions, // PseudoVSSSEG3E64_V_M1_MASK = 10216 CEFBS_HasVInstructions, // PseudoVSSSEG3E64_V_M2 = 10217 CEFBS_HasVInstructions, // PseudoVSSSEG3E64_V_M2_MASK = 10218 CEFBS_HasVInstructions, // PseudoVSSSEG3E8_V_M1 = 10219 CEFBS_HasVInstructions, // PseudoVSSSEG3E8_V_M1_MASK = 10220 CEFBS_HasVInstructions, // PseudoVSSSEG3E8_V_M2 = 10221 CEFBS_HasVInstructions, // PseudoVSSSEG3E8_V_M2_MASK = 10222 CEFBS_HasVInstructions, // PseudoVSSSEG3E8_V_MF2 = 10223 CEFBS_HasVInstructions, // PseudoVSSSEG3E8_V_MF2_MASK = 10224 CEFBS_HasVInstructions, // PseudoVSSSEG3E8_V_MF4 = 10225 CEFBS_HasVInstructions, // PseudoVSSSEG3E8_V_MF4_MASK = 10226 CEFBS_HasVInstructions, // PseudoVSSSEG3E8_V_MF8 = 10227 CEFBS_HasVInstructions, // PseudoVSSSEG3E8_V_MF8_MASK = 10228 CEFBS_HasVInstructions, // PseudoVSSSEG4E16_V_M1 = 10229 CEFBS_HasVInstructions, // PseudoVSSSEG4E16_V_M1_MASK = 10230 CEFBS_HasVInstructions, // PseudoVSSSEG4E16_V_M2 = 10231 CEFBS_HasVInstructions, // PseudoVSSSEG4E16_V_M2_MASK = 10232 CEFBS_HasVInstructions, // PseudoVSSSEG4E16_V_MF2 = 10233 CEFBS_HasVInstructions, // PseudoVSSSEG4E16_V_MF2_MASK = 10234 CEFBS_HasVInstructions, // PseudoVSSSEG4E16_V_MF4 = 10235 CEFBS_HasVInstructions, // PseudoVSSSEG4E16_V_MF4_MASK = 10236 CEFBS_HasVInstructions, // PseudoVSSSEG4E32_V_M1 = 10237 CEFBS_HasVInstructions, // PseudoVSSSEG4E32_V_M1_MASK = 10238 CEFBS_HasVInstructions, // PseudoVSSSEG4E32_V_M2 = 10239 CEFBS_HasVInstructions, // PseudoVSSSEG4E32_V_M2_MASK = 10240 CEFBS_HasVInstructions, // PseudoVSSSEG4E32_V_MF2 = 10241 CEFBS_HasVInstructions, // PseudoVSSSEG4E32_V_MF2_MASK = 10242 CEFBS_HasVInstructions, // PseudoVSSSEG4E64_V_M1 = 10243 CEFBS_HasVInstructions, // PseudoVSSSEG4E64_V_M1_MASK = 10244 CEFBS_HasVInstructions, // PseudoVSSSEG4E64_V_M2 = 10245 CEFBS_HasVInstructions, // PseudoVSSSEG4E64_V_M2_MASK = 10246 CEFBS_HasVInstructions, // PseudoVSSSEG4E8_V_M1 = 10247 CEFBS_HasVInstructions, // PseudoVSSSEG4E8_V_M1_MASK = 10248 CEFBS_HasVInstructions, // PseudoVSSSEG4E8_V_M2 = 10249 CEFBS_HasVInstructions, // PseudoVSSSEG4E8_V_M2_MASK = 10250 CEFBS_HasVInstructions, // PseudoVSSSEG4E8_V_MF2 = 10251 CEFBS_HasVInstructions, // PseudoVSSSEG4E8_V_MF2_MASK = 10252 CEFBS_HasVInstructions, // PseudoVSSSEG4E8_V_MF4 = 10253 CEFBS_HasVInstructions, // PseudoVSSSEG4E8_V_MF4_MASK = 10254 CEFBS_HasVInstructions, // PseudoVSSSEG4E8_V_MF8 = 10255 CEFBS_HasVInstructions, // PseudoVSSSEG4E8_V_MF8_MASK = 10256 CEFBS_HasVInstructions, // PseudoVSSSEG5E16_V_M1 = 10257 CEFBS_HasVInstructions, // PseudoVSSSEG5E16_V_M1_MASK = 10258 CEFBS_HasVInstructions, // PseudoVSSSEG5E16_V_MF2 = 10259 CEFBS_HasVInstructions, // PseudoVSSSEG5E16_V_MF2_MASK = 10260 CEFBS_HasVInstructions, // PseudoVSSSEG5E16_V_MF4 = 10261 CEFBS_HasVInstructions, // PseudoVSSSEG5E16_V_MF4_MASK = 10262 CEFBS_HasVInstructions, // PseudoVSSSEG5E32_V_M1 = 10263 CEFBS_HasVInstructions, // PseudoVSSSEG5E32_V_M1_MASK = 10264 CEFBS_HasVInstructions, // PseudoVSSSEG5E32_V_MF2 = 10265 CEFBS_HasVInstructions, // PseudoVSSSEG5E32_V_MF2_MASK = 10266 CEFBS_HasVInstructions, // PseudoVSSSEG5E64_V_M1 = 10267 CEFBS_HasVInstructions, // PseudoVSSSEG5E64_V_M1_MASK = 10268 CEFBS_HasVInstructions, // PseudoVSSSEG5E8_V_M1 = 10269 CEFBS_HasVInstructions, // PseudoVSSSEG5E8_V_M1_MASK = 10270 CEFBS_HasVInstructions, // PseudoVSSSEG5E8_V_MF2 = 10271 CEFBS_HasVInstructions, // PseudoVSSSEG5E8_V_MF2_MASK = 10272 CEFBS_HasVInstructions, // PseudoVSSSEG5E8_V_MF4 = 10273 CEFBS_HasVInstructions, // PseudoVSSSEG5E8_V_MF4_MASK = 10274 CEFBS_HasVInstructions, // PseudoVSSSEG5E8_V_MF8 = 10275 CEFBS_HasVInstructions, // PseudoVSSSEG5E8_V_MF8_MASK = 10276 CEFBS_HasVInstructions, // PseudoVSSSEG6E16_V_M1 = 10277 CEFBS_HasVInstructions, // PseudoVSSSEG6E16_V_M1_MASK = 10278 CEFBS_HasVInstructions, // PseudoVSSSEG6E16_V_MF2 = 10279 CEFBS_HasVInstructions, // PseudoVSSSEG6E16_V_MF2_MASK = 10280 CEFBS_HasVInstructions, // PseudoVSSSEG6E16_V_MF4 = 10281 CEFBS_HasVInstructions, // PseudoVSSSEG6E16_V_MF4_MASK = 10282 CEFBS_HasVInstructions, // PseudoVSSSEG6E32_V_M1 = 10283 CEFBS_HasVInstructions, // PseudoVSSSEG6E32_V_M1_MASK = 10284 CEFBS_HasVInstructions, // PseudoVSSSEG6E32_V_MF2 = 10285 CEFBS_HasVInstructions, // PseudoVSSSEG6E32_V_MF2_MASK = 10286 CEFBS_HasVInstructions, // PseudoVSSSEG6E64_V_M1 = 10287 CEFBS_HasVInstructions, // PseudoVSSSEG6E64_V_M1_MASK = 10288 CEFBS_HasVInstructions, // PseudoVSSSEG6E8_V_M1 = 10289 CEFBS_HasVInstructions, // PseudoVSSSEG6E8_V_M1_MASK = 10290 CEFBS_HasVInstructions, // PseudoVSSSEG6E8_V_MF2 = 10291 CEFBS_HasVInstructions, // PseudoVSSSEG6E8_V_MF2_MASK = 10292 CEFBS_HasVInstructions, // PseudoVSSSEG6E8_V_MF4 = 10293 CEFBS_HasVInstructions, // PseudoVSSSEG6E8_V_MF4_MASK = 10294 CEFBS_HasVInstructions, // PseudoVSSSEG6E8_V_MF8 = 10295 CEFBS_HasVInstructions, // PseudoVSSSEG6E8_V_MF8_MASK = 10296 CEFBS_HasVInstructions, // PseudoVSSSEG7E16_V_M1 = 10297 CEFBS_HasVInstructions, // PseudoVSSSEG7E16_V_M1_MASK = 10298 CEFBS_HasVInstructions, // PseudoVSSSEG7E16_V_MF2 = 10299 CEFBS_HasVInstructions, // PseudoVSSSEG7E16_V_MF2_MASK = 10300 CEFBS_HasVInstructions, // PseudoVSSSEG7E16_V_MF4 = 10301 CEFBS_HasVInstructions, // PseudoVSSSEG7E16_V_MF4_MASK = 10302 CEFBS_HasVInstructions, // PseudoVSSSEG7E32_V_M1 = 10303 CEFBS_HasVInstructions, // PseudoVSSSEG7E32_V_M1_MASK = 10304 CEFBS_HasVInstructions, // PseudoVSSSEG7E32_V_MF2 = 10305 CEFBS_HasVInstructions, // PseudoVSSSEG7E32_V_MF2_MASK = 10306 CEFBS_HasVInstructions, // PseudoVSSSEG7E64_V_M1 = 10307 CEFBS_HasVInstructions, // PseudoVSSSEG7E64_V_M1_MASK = 10308 CEFBS_HasVInstructions, // PseudoVSSSEG7E8_V_M1 = 10309 CEFBS_HasVInstructions, // PseudoVSSSEG7E8_V_M1_MASK = 10310 CEFBS_HasVInstructions, // PseudoVSSSEG7E8_V_MF2 = 10311 CEFBS_HasVInstructions, // PseudoVSSSEG7E8_V_MF2_MASK = 10312 CEFBS_HasVInstructions, // PseudoVSSSEG7E8_V_MF4 = 10313 CEFBS_HasVInstructions, // PseudoVSSSEG7E8_V_MF4_MASK = 10314 CEFBS_HasVInstructions, // PseudoVSSSEG7E8_V_MF8 = 10315 CEFBS_HasVInstructions, // PseudoVSSSEG7E8_V_MF8_MASK = 10316 CEFBS_HasVInstructions, // PseudoVSSSEG8E16_V_M1 = 10317 CEFBS_HasVInstructions, // PseudoVSSSEG8E16_V_M1_MASK = 10318 CEFBS_HasVInstructions, // PseudoVSSSEG8E16_V_MF2 = 10319 CEFBS_HasVInstructions, // PseudoVSSSEG8E16_V_MF2_MASK = 10320 CEFBS_HasVInstructions, // PseudoVSSSEG8E16_V_MF4 = 10321 CEFBS_HasVInstructions, // PseudoVSSSEG8E16_V_MF4_MASK = 10322 CEFBS_HasVInstructions, // PseudoVSSSEG8E32_V_M1 = 10323 CEFBS_HasVInstructions, // PseudoVSSSEG8E32_V_M1_MASK = 10324 CEFBS_HasVInstructions, // PseudoVSSSEG8E32_V_MF2 = 10325 CEFBS_HasVInstructions, // PseudoVSSSEG8E32_V_MF2_MASK = 10326 CEFBS_HasVInstructions, // PseudoVSSSEG8E64_V_M1 = 10327 CEFBS_HasVInstructions, // PseudoVSSSEG8E64_V_M1_MASK = 10328 CEFBS_HasVInstructions, // PseudoVSSSEG8E8_V_M1 = 10329 CEFBS_HasVInstructions, // PseudoVSSSEG8E8_V_M1_MASK = 10330 CEFBS_HasVInstructions, // PseudoVSSSEG8E8_V_MF2 = 10331 CEFBS_HasVInstructions, // PseudoVSSSEG8E8_V_MF2_MASK = 10332 CEFBS_HasVInstructions, // PseudoVSSSEG8E8_V_MF4 = 10333 CEFBS_HasVInstructions, // PseudoVSSSEG8E8_V_MF4_MASK = 10334 CEFBS_HasVInstructions, // PseudoVSSSEG8E8_V_MF8 = 10335 CEFBS_HasVInstructions, // PseudoVSSSEG8E8_V_MF8_MASK = 10336 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_M1 = 10337 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_M1_MASK = 10338 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_M1_TU = 10339 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_M2 = 10340 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_M2_MASK = 10341 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_M2_TU = 10342 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_M4 = 10343 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_M4_MASK = 10344 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_M4_TU = 10345 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_M8 = 10346 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_M8_MASK = 10347 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_M8_TU = 10348 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_MF2 = 10349 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_MF2_MASK = 10350 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_MF2_TU = 10351 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_MF4 = 10352 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_MF4_MASK = 10353 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_MF4_TU = 10354 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_MF8 = 10355 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_MF8_MASK = 10356 CEFBS_HasVInstructions, // PseudoVSSUBU_VV_MF8_TU = 10357 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_M1 = 10358 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_M1_MASK = 10359 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_M1_TU = 10360 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_M2 = 10361 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_M2_MASK = 10362 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_M2_TU = 10363 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_M4 = 10364 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_M4_MASK = 10365 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_M4_TU = 10366 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_M8 = 10367 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_M8_MASK = 10368 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_M8_TU = 10369 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_MF2 = 10370 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_MF2_MASK = 10371 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_MF2_TU = 10372 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_MF4 = 10373 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_MF4_MASK = 10374 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_MF4_TU = 10375 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_MF8 = 10376 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_MF8_MASK = 10377 CEFBS_HasVInstructions, // PseudoVSSUBU_VX_MF8_TU = 10378 CEFBS_HasVInstructions, // PseudoVSSUB_VV_M1 = 10379 CEFBS_HasVInstructions, // PseudoVSSUB_VV_M1_MASK = 10380 CEFBS_HasVInstructions, // PseudoVSSUB_VV_M1_TU = 10381 CEFBS_HasVInstructions, // PseudoVSSUB_VV_M2 = 10382 CEFBS_HasVInstructions, // PseudoVSSUB_VV_M2_MASK = 10383 CEFBS_HasVInstructions, // PseudoVSSUB_VV_M2_TU = 10384 CEFBS_HasVInstructions, // PseudoVSSUB_VV_M4 = 10385 CEFBS_HasVInstructions, // PseudoVSSUB_VV_M4_MASK = 10386 CEFBS_HasVInstructions, // PseudoVSSUB_VV_M4_TU = 10387 CEFBS_HasVInstructions, // PseudoVSSUB_VV_M8 = 10388 CEFBS_HasVInstructions, // PseudoVSSUB_VV_M8_MASK = 10389 CEFBS_HasVInstructions, // PseudoVSSUB_VV_M8_TU = 10390 CEFBS_HasVInstructions, // PseudoVSSUB_VV_MF2 = 10391 CEFBS_HasVInstructions, // PseudoVSSUB_VV_MF2_MASK = 10392 CEFBS_HasVInstructions, // PseudoVSSUB_VV_MF2_TU = 10393 CEFBS_HasVInstructions, // PseudoVSSUB_VV_MF4 = 10394 CEFBS_HasVInstructions, // PseudoVSSUB_VV_MF4_MASK = 10395 CEFBS_HasVInstructions, // PseudoVSSUB_VV_MF4_TU = 10396 CEFBS_HasVInstructions, // PseudoVSSUB_VV_MF8 = 10397 CEFBS_HasVInstructions, // PseudoVSSUB_VV_MF8_MASK = 10398 CEFBS_HasVInstructions, // PseudoVSSUB_VV_MF8_TU = 10399 CEFBS_HasVInstructions, // PseudoVSSUB_VX_M1 = 10400 CEFBS_HasVInstructions, // PseudoVSSUB_VX_M1_MASK = 10401 CEFBS_HasVInstructions, // PseudoVSSUB_VX_M1_TU = 10402 CEFBS_HasVInstructions, // PseudoVSSUB_VX_M2 = 10403 CEFBS_HasVInstructions, // PseudoVSSUB_VX_M2_MASK = 10404 CEFBS_HasVInstructions, // PseudoVSSUB_VX_M2_TU = 10405 CEFBS_HasVInstructions, // PseudoVSSUB_VX_M4 = 10406 CEFBS_HasVInstructions, // PseudoVSSUB_VX_M4_MASK = 10407 CEFBS_HasVInstructions, // PseudoVSSUB_VX_M4_TU = 10408 CEFBS_HasVInstructions, // PseudoVSSUB_VX_M8 = 10409 CEFBS_HasVInstructions, // PseudoVSSUB_VX_M8_MASK = 10410 CEFBS_HasVInstructions, // PseudoVSSUB_VX_M8_TU = 10411 CEFBS_HasVInstructions, // PseudoVSSUB_VX_MF2 = 10412 CEFBS_HasVInstructions, // PseudoVSSUB_VX_MF2_MASK = 10413 CEFBS_HasVInstructions, // PseudoVSSUB_VX_MF2_TU = 10414 CEFBS_HasVInstructions, // PseudoVSSUB_VX_MF4 = 10415 CEFBS_HasVInstructions, // PseudoVSSUB_VX_MF4_MASK = 10416 CEFBS_HasVInstructions, // PseudoVSSUB_VX_MF4_TU = 10417 CEFBS_HasVInstructions, // PseudoVSSUB_VX_MF8 = 10418 CEFBS_HasVInstructions, // PseudoVSSUB_VX_MF8_MASK = 10419 CEFBS_HasVInstructions, // PseudoVSSUB_VX_MF8_TU = 10420 CEFBS_HasVInstructions, // PseudoVSUB_VV_M1 = 10421 CEFBS_HasVInstructions, // PseudoVSUB_VV_M1_MASK = 10422 CEFBS_HasVInstructions, // PseudoVSUB_VV_M1_TU = 10423 CEFBS_HasVInstructions, // PseudoVSUB_VV_M2 = 10424 CEFBS_HasVInstructions, // PseudoVSUB_VV_M2_MASK = 10425 CEFBS_HasVInstructions, // PseudoVSUB_VV_M2_TU = 10426 CEFBS_HasVInstructions, // PseudoVSUB_VV_M4 = 10427 CEFBS_HasVInstructions, // PseudoVSUB_VV_M4_MASK = 10428 CEFBS_HasVInstructions, // PseudoVSUB_VV_M4_TU = 10429 CEFBS_HasVInstructions, // PseudoVSUB_VV_M8 = 10430 CEFBS_HasVInstructions, // PseudoVSUB_VV_M8_MASK = 10431 CEFBS_HasVInstructions, // PseudoVSUB_VV_M8_TU = 10432 CEFBS_HasVInstructions, // PseudoVSUB_VV_MF2 = 10433 CEFBS_HasVInstructions, // PseudoVSUB_VV_MF2_MASK = 10434 CEFBS_HasVInstructions, // PseudoVSUB_VV_MF2_TU = 10435 CEFBS_HasVInstructions, // PseudoVSUB_VV_MF4 = 10436 CEFBS_HasVInstructions, // PseudoVSUB_VV_MF4_MASK = 10437 CEFBS_HasVInstructions, // PseudoVSUB_VV_MF4_TU = 10438 CEFBS_HasVInstructions, // PseudoVSUB_VV_MF8 = 10439 CEFBS_HasVInstructions, // PseudoVSUB_VV_MF8_MASK = 10440 CEFBS_HasVInstructions, // PseudoVSUB_VV_MF8_TU = 10441 CEFBS_HasVInstructions, // PseudoVSUB_VX_M1 = 10442 CEFBS_HasVInstructions, // PseudoVSUB_VX_M1_MASK = 10443 CEFBS_HasVInstructions, // PseudoVSUB_VX_M1_TU = 10444 CEFBS_HasVInstructions, // PseudoVSUB_VX_M2 = 10445 CEFBS_HasVInstructions, // PseudoVSUB_VX_M2_MASK = 10446 CEFBS_HasVInstructions, // PseudoVSUB_VX_M2_TU = 10447 CEFBS_HasVInstructions, // PseudoVSUB_VX_M4 = 10448 CEFBS_HasVInstructions, // PseudoVSUB_VX_M4_MASK = 10449 CEFBS_HasVInstructions, // PseudoVSUB_VX_M4_TU = 10450 CEFBS_HasVInstructions, // PseudoVSUB_VX_M8 = 10451 CEFBS_HasVInstructions, // PseudoVSUB_VX_M8_MASK = 10452 CEFBS_HasVInstructions, // PseudoVSUB_VX_M8_TU = 10453 CEFBS_HasVInstructions, // PseudoVSUB_VX_MF2 = 10454 CEFBS_HasVInstructions, // PseudoVSUB_VX_MF2_MASK = 10455 CEFBS_HasVInstructions, // PseudoVSUB_VX_MF2_TU = 10456 CEFBS_HasVInstructions, // PseudoVSUB_VX_MF4 = 10457 CEFBS_HasVInstructions, // PseudoVSUB_VX_MF4_MASK = 10458 CEFBS_HasVInstructions, // PseudoVSUB_VX_MF4_TU = 10459 CEFBS_HasVInstructions, // PseudoVSUB_VX_MF8 = 10460 CEFBS_HasVInstructions, // PseudoVSUB_VX_MF8_MASK = 10461 CEFBS_HasVInstructions, // PseudoVSUB_VX_MF8_TU = 10462 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M1_M1 = 10463 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M1_M1_MASK = 10464 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M1_M2 = 10465 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M1_M2_MASK = 10466 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M1_M4 = 10467 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M1_M4_MASK = 10468 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M1_MF2 = 10469 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M1_MF2_MASK = 10470 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M2_M1 = 10471 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M2_M1_MASK = 10472 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M2_M2 = 10473 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M2_M2_MASK = 10474 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M2_M4 = 10475 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M2_M4_MASK = 10476 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M2_M8 = 10477 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M2_M8_MASK = 10478 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M4_M2 = 10479 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M4_M2_MASK = 10480 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M4_M4 = 10481 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M4_M4_MASK = 10482 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M4_M8 = 10483 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M4_M8_MASK = 10484 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M8_M4 = 10485 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M8_M4_MASK = 10486 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M8_M8 = 10487 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_M8_M8_MASK = 10488 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_MF2_M1 = 10489 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_MF2_M1_MASK = 10490 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_MF2_M2 = 10491 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_MF2_M2_MASK = 10492 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_MF2_MF2 = 10493 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_MF2_MF2_MASK = 10494 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_MF2_MF4 = 10495 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_MF2_MF4_MASK = 10496 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_MF4_M1 = 10497 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_MF4_M1_MASK = 10498 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_MF4_MF2 = 10499 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_MF4_MF2_MASK = 10500 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_MF4_MF4 = 10501 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_MF4_MF4_MASK = 10502 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_MF4_MF8 = 10503 CEFBS_HasVInstructions, // PseudoVSUXEI16_V_MF4_MF8_MASK = 10504 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M1_M1 = 10505 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M1_M1_MASK = 10506 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M1_M2 = 10507 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M1_M2_MASK = 10508 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M1_MF2 = 10509 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M1_MF2_MASK = 10510 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M1_MF4 = 10511 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M1_MF4_MASK = 10512 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M2_M1 = 10513 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M2_M1_MASK = 10514 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M2_M2 = 10515 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M2_M2_MASK = 10516 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M2_M4 = 10517 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M2_M4_MASK = 10518 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M2_MF2 = 10519 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M2_MF2_MASK = 10520 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M4_M1 = 10521 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M4_M1_MASK = 10522 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M4_M2 = 10523 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M4_M2_MASK = 10524 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M4_M4 = 10525 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M4_M4_MASK = 10526 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M4_M8 = 10527 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M4_M8_MASK = 10528 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M8_M2 = 10529 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M8_M2_MASK = 10530 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M8_M4 = 10531 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M8_M4_MASK = 10532 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M8_M8 = 10533 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_M8_M8_MASK = 10534 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_MF2_M1 = 10535 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_MF2_M1_MASK = 10536 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_MF2_MF2 = 10537 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_MF2_MF2_MASK = 10538 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_MF2_MF4 = 10539 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_MF2_MF4_MASK = 10540 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_MF2_MF8 = 10541 CEFBS_HasVInstructions, // PseudoVSUXEI32_V_MF2_MF8_MASK = 10542 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M1_M1 = 10543 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M1_M1_MASK = 10544 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M1_MF2 = 10545 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M1_MF2_MASK = 10546 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M1_MF4 = 10547 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M1_MF4_MASK = 10548 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M1_MF8 = 10549 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M1_MF8_MASK = 10550 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M2_M1 = 10551 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M2_M1_MASK = 10552 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M2_M2 = 10553 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M2_M2_MASK = 10554 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M2_MF2 = 10555 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M2_MF2_MASK = 10556 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M2_MF4 = 10557 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M2_MF4_MASK = 10558 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M4_M1 = 10559 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M4_M1_MASK = 10560 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M4_M2 = 10561 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M4_M2_MASK = 10562 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M4_M4 = 10563 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M4_M4_MASK = 10564 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M4_MF2 = 10565 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M4_MF2_MASK = 10566 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M8_M1 = 10567 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M8_M1_MASK = 10568 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M8_M2 = 10569 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M8_M2_MASK = 10570 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M8_M4 = 10571 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M8_M4_MASK = 10572 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M8_M8 = 10573 CEFBS_HasVInstructions, // PseudoVSUXEI64_V_M8_M8_MASK = 10574 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M1_M1 = 10575 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M1_M1_MASK = 10576 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M1_M2 = 10577 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M1_M2_MASK = 10578 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M1_M4 = 10579 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M1_M4_MASK = 10580 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M1_M8 = 10581 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M1_M8_MASK = 10582 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M2_M2 = 10583 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M2_M2_MASK = 10584 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M2_M4 = 10585 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M2_M4_MASK = 10586 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M2_M8 = 10587 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M2_M8_MASK = 10588 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M4_M4 = 10589 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M4_M4_MASK = 10590 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M4_M8 = 10591 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M4_M8_MASK = 10592 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M8_M8 = 10593 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_M8_M8_MASK = 10594 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF2_M1 = 10595 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF2_M1_MASK = 10596 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF2_M2 = 10597 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF2_M2_MASK = 10598 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF2_M4 = 10599 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF2_M4_MASK = 10600 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF2_MF2 = 10601 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF2_MF2_MASK = 10602 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF4_M1 = 10603 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF4_M1_MASK = 10604 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF4_M2 = 10605 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF4_M2_MASK = 10606 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF4_MF2 = 10607 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF4_MF2_MASK = 10608 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF4_MF4 = 10609 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF4_MF4_MASK = 10610 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF8_M1 = 10611 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF8_M1_MASK = 10612 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF8_MF2 = 10613 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF8_MF2_MASK = 10614 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF8_MF4 = 10615 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF8_MF4_MASK = 10616 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF8_MF8 = 10617 CEFBS_HasVInstructions, // PseudoVSUXEI8_V_MF8_MF8_MASK = 10618 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M1_M1 = 10619 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M1_M1_MASK = 10620 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M1_M2 = 10621 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M1_M2_MASK = 10622 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M1_M4 = 10623 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M1_M4_MASK = 10624 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M1_MF2 = 10625 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M1_MF2_MASK = 10626 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M2_M1 = 10627 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M2_M1_MASK = 10628 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M2_M2 = 10629 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M2_M2_MASK = 10630 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M2_M4 = 10631 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M2_M4_MASK = 10632 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M4_M2 = 10633 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M4_M2_MASK = 10634 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M4_M4 = 10635 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M4_M4_MASK = 10636 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M8_M4 = 10637 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_M8_M4_MASK = 10638 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_MF2_M1 = 10639 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_MF2_M1_MASK = 10640 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_MF2_M2 = 10641 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_MF2_M2_MASK = 10642 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_MF2_MF2 = 10643 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_MF2_MF2_MASK = 10644 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_MF2_MF4 = 10645 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_MF2_MF4_MASK = 10646 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_MF4_M1 = 10647 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_MF4_M1_MASK = 10648 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_MF4_MF2 = 10649 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_MF4_MF2_MASK = 10650 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_MF4_MF4 = 10651 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_MF4_MF4_MASK = 10652 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_MF4_MF8 = 10653 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI16_V_MF4_MF8_MASK = 10654 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M1_M1 = 10655 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M1_M1_MASK = 10656 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M1_M2 = 10657 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M1_M2_MASK = 10658 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M1_MF2 = 10659 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M1_MF2_MASK = 10660 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M1_MF4 = 10661 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M1_MF4_MASK = 10662 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M2_M1 = 10663 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M2_M1_MASK = 10664 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M2_M2 = 10665 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M2_M2_MASK = 10666 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M2_M4 = 10667 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M2_M4_MASK = 10668 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M2_MF2 = 10669 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M2_MF2_MASK = 10670 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M4_M1 = 10671 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M4_M1_MASK = 10672 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M4_M2 = 10673 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M4_M2_MASK = 10674 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M4_M4 = 10675 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M4_M4_MASK = 10676 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M8_M2 = 10677 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M8_M2_MASK = 10678 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M8_M4 = 10679 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_M8_M4_MASK = 10680 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_MF2_M1 = 10681 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_MF2_M1_MASK = 10682 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_MF2_MF2 = 10683 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_MF2_MF2_MASK = 10684 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_MF2_MF4 = 10685 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_MF2_MF4_MASK = 10686 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_MF2_MF8 = 10687 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI32_V_MF2_MF8_MASK = 10688 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M1_M1 = 10689 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M1_M1_MASK = 10690 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M1_MF2 = 10691 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M1_MF2_MASK = 10692 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M1_MF4 = 10693 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M1_MF4_MASK = 10694 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M1_MF8 = 10695 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M1_MF8_MASK = 10696 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M2_M1 = 10697 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M2_M1_MASK = 10698 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M2_M2 = 10699 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M2_M2_MASK = 10700 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M2_MF2 = 10701 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M2_MF2_MASK = 10702 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M2_MF4 = 10703 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M2_MF4_MASK = 10704 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M4_M1 = 10705 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M4_M1_MASK = 10706 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M4_M2 = 10707 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M4_M2_MASK = 10708 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M4_M4 = 10709 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M4_M4_MASK = 10710 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M4_MF2 = 10711 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M4_MF2_MASK = 10712 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M8_M1 = 10713 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M8_M1_MASK = 10714 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M8_M2 = 10715 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M8_M2_MASK = 10716 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M8_M4 = 10717 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI64_V_M8_M4_MASK = 10718 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_M1_M1 = 10719 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_M1_M1_MASK = 10720 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_M1_M2 = 10721 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_M1_M2_MASK = 10722 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_M1_M4 = 10723 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_M1_M4_MASK = 10724 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_M2_M2 = 10725 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_M2_M2_MASK = 10726 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_M2_M4 = 10727 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_M2_M4_MASK = 10728 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_M4_M4 = 10729 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_M4_M4_MASK = 10730 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF2_M1 = 10731 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF2_M1_MASK = 10732 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF2_M2 = 10733 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF2_M2_MASK = 10734 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF2_M4 = 10735 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF2_M4_MASK = 10736 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF2_MF2 = 10737 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF2_MF2_MASK = 10738 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF4_M1 = 10739 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF4_M1_MASK = 10740 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF4_M2 = 10741 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF4_M2_MASK = 10742 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF4_MF2 = 10743 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF4_MF2_MASK = 10744 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF4_MF4 = 10745 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF4_MF4_MASK = 10746 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF8_M1 = 10747 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF8_M1_MASK = 10748 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF8_MF2 = 10749 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF8_MF2_MASK = 10750 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF8_MF4 = 10751 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF8_MF4_MASK = 10752 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF8_MF8 = 10753 CEFBS_HasVInstructions, // PseudoVSUXSEG2EI8_V_MF8_MF8_MASK = 10754 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_M1_M1 = 10755 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_M1_M1_MASK = 10756 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_M1_M2 = 10757 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_M1_M2_MASK = 10758 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_M1_MF2 = 10759 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_M1_MF2_MASK = 10760 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_M2_M1 = 10761 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_M2_M1_MASK = 10762 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_M2_M2 = 10763 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_M2_M2_MASK = 10764 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_M4_M2 = 10765 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_M4_M2_MASK = 10766 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_MF2_M1 = 10767 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_MF2_M1_MASK = 10768 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_MF2_M2 = 10769 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_MF2_M2_MASK = 10770 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_MF2_MF2 = 10771 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_MF2_MF2_MASK = 10772 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_MF2_MF4 = 10773 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_MF2_MF4_MASK = 10774 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_MF4_M1 = 10775 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_MF4_M1_MASK = 10776 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_MF4_MF2 = 10777 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_MF4_MF2_MASK = 10778 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_MF4_MF4 = 10779 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_MF4_MF4_MASK = 10780 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_MF4_MF8 = 10781 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI16_V_MF4_MF8_MASK = 10782 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M1_M1 = 10783 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M1_M1_MASK = 10784 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M1_M2 = 10785 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M1_M2_MASK = 10786 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M1_MF2 = 10787 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M1_MF2_MASK = 10788 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M1_MF4 = 10789 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M1_MF4_MASK = 10790 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M2_M1 = 10791 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M2_M1_MASK = 10792 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M2_M2 = 10793 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M2_M2_MASK = 10794 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M2_MF2 = 10795 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M2_MF2_MASK = 10796 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M4_M1 = 10797 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M4_M1_MASK = 10798 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M4_M2 = 10799 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M4_M2_MASK = 10800 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M8_M2 = 10801 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_M8_M2_MASK = 10802 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_MF2_M1 = 10803 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_MF2_M1_MASK = 10804 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_MF2_MF2 = 10805 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_MF2_MF2_MASK = 10806 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_MF2_MF4 = 10807 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_MF2_MF4_MASK = 10808 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_MF2_MF8 = 10809 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI32_V_MF2_MF8_MASK = 10810 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M1_M1 = 10811 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M1_M1_MASK = 10812 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M1_MF2 = 10813 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M1_MF2_MASK = 10814 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M1_MF4 = 10815 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M1_MF4_MASK = 10816 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M1_MF8 = 10817 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M1_MF8_MASK = 10818 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M2_M1 = 10819 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M2_M1_MASK = 10820 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M2_M2 = 10821 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M2_M2_MASK = 10822 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M2_MF2 = 10823 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M2_MF2_MASK = 10824 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M2_MF4 = 10825 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M2_MF4_MASK = 10826 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M4_M1 = 10827 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M4_M1_MASK = 10828 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M4_M2 = 10829 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M4_M2_MASK = 10830 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M4_MF2 = 10831 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M4_MF2_MASK = 10832 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M8_M1 = 10833 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M8_M1_MASK = 10834 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M8_M2 = 10835 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI64_V_M8_M2_MASK = 10836 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_M1_M1 = 10837 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_M1_M1_MASK = 10838 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_M1_M2 = 10839 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_M1_M2_MASK = 10840 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_M2_M2 = 10841 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_M2_M2_MASK = 10842 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF2_M1 = 10843 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF2_M1_MASK = 10844 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF2_M2 = 10845 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF2_M2_MASK = 10846 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF2_MF2 = 10847 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF2_MF2_MASK = 10848 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF4_M1 = 10849 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF4_M1_MASK = 10850 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF4_M2 = 10851 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF4_M2_MASK = 10852 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF4_MF2 = 10853 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF4_MF2_MASK = 10854 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF4_MF4 = 10855 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF4_MF4_MASK = 10856 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF8_M1 = 10857 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF8_M1_MASK = 10858 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF8_MF2 = 10859 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF8_MF2_MASK = 10860 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF8_MF4 = 10861 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF8_MF4_MASK = 10862 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF8_MF8 = 10863 CEFBS_HasVInstructions, // PseudoVSUXSEG3EI8_V_MF8_MF8_MASK = 10864 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_M1_M1 = 10865 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_M1_M1_MASK = 10866 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_M1_M2 = 10867 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_M1_M2_MASK = 10868 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_M1_MF2 = 10869 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_M1_MF2_MASK = 10870 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_M2_M1 = 10871 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_M2_M1_MASK = 10872 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_M2_M2 = 10873 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_M2_M2_MASK = 10874 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_M4_M2 = 10875 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_M4_M2_MASK = 10876 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_MF2_M1 = 10877 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_MF2_M1_MASK = 10878 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_MF2_M2 = 10879 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_MF2_M2_MASK = 10880 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_MF2_MF2 = 10881 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_MF2_MF2_MASK = 10882 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_MF2_MF4 = 10883 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_MF2_MF4_MASK = 10884 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_MF4_M1 = 10885 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_MF4_M1_MASK = 10886 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_MF4_MF2 = 10887 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_MF4_MF2_MASK = 10888 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_MF4_MF4 = 10889 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_MF4_MF4_MASK = 10890 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_MF4_MF8 = 10891 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI16_V_MF4_MF8_MASK = 10892 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M1_M1 = 10893 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M1_M1_MASK = 10894 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M1_M2 = 10895 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M1_M2_MASK = 10896 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M1_MF2 = 10897 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M1_MF2_MASK = 10898 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M1_MF4 = 10899 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M1_MF4_MASK = 10900 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M2_M1 = 10901 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M2_M1_MASK = 10902 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M2_M2 = 10903 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M2_M2_MASK = 10904 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M2_MF2 = 10905 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M2_MF2_MASK = 10906 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M4_M1 = 10907 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M4_M1_MASK = 10908 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M4_M2 = 10909 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M4_M2_MASK = 10910 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M8_M2 = 10911 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_M8_M2_MASK = 10912 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_MF2_M1 = 10913 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_MF2_M1_MASK = 10914 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_MF2_MF2 = 10915 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_MF2_MF2_MASK = 10916 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_MF2_MF4 = 10917 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_MF2_MF4_MASK = 10918 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_MF2_MF8 = 10919 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI32_V_MF2_MF8_MASK = 10920 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M1_M1 = 10921 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M1_M1_MASK = 10922 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M1_MF2 = 10923 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M1_MF2_MASK = 10924 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M1_MF4 = 10925 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M1_MF4_MASK = 10926 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M1_MF8 = 10927 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M1_MF8_MASK = 10928 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M2_M1 = 10929 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M2_M1_MASK = 10930 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M2_M2 = 10931 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M2_M2_MASK = 10932 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M2_MF2 = 10933 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M2_MF2_MASK = 10934 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M2_MF4 = 10935 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M2_MF4_MASK = 10936 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M4_M1 = 10937 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M4_M1_MASK = 10938 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M4_M2 = 10939 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M4_M2_MASK = 10940 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M4_MF2 = 10941 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M4_MF2_MASK = 10942 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M8_M1 = 10943 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M8_M1_MASK = 10944 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M8_M2 = 10945 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI64_V_M8_M2_MASK = 10946 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_M1_M1 = 10947 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_M1_M1_MASK = 10948 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_M1_M2 = 10949 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_M1_M2_MASK = 10950 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_M2_M2 = 10951 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_M2_M2_MASK = 10952 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF2_M1 = 10953 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF2_M1_MASK = 10954 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF2_M2 = 10955 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF2_M2_MASK = 10956 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF2_MF2 = 10957 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF2_MF2_MASK = 10958 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF4_M1 = 10959 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF4_M1_MASK = 10960 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF4_M2 = 10961 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF4_M2_MASK = 10962 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF4_MF2 = 10963 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF4_MF2_MASK = 10964 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF4_MF4 = 10965 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF4_MF4_MASK = 10966 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF8_M1 = 10967 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF8_M1_MASK = 10968 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF8_MF2 = 10969 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF8_MF2_MASK = 10970 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF8_MF4 = 10971 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF8_MF4_MASK = 10972 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF8_MF8 = 10973 CEFBS_HasVInstructions, // PseudoVSUXSEG4EI8_V_MF8_MF8_MASK = 10974 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_M1_M1 = 10975 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_M1_M1_MASK = 10976 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_M1_MF2 = 10977 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_M1_MF2_MASK = 10978 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_M2_M1 = 10979 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_M2_M1_MASK = 10980 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_MF2_M1 = 10981 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_MF2_M1_MASK = 10982 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_MF2_MF2 = 10983 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_MF2_MF2_MASK = 10984 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_MF2_MF4 = 10985 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_MF2_MF4_MASK = 10986 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_MF4_M1 = 10987 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_MF4_M1_MASK = 10988 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_MF4_MF2 = 10989 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_MF4_MF2_MASK = 10990 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_MF4_MF4 = 10991 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_MF4_MF4_MASK = 10992 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_MF4_MF8 = 10993 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI16_V_MF4_MF8_MASK = 10994 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_M1_M1 = 10995 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_M1_M1_MASK = 10996 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_M1_MF2 = 10997 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_M1_MF2_MASK = 10998 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_M1_MF4 = 10999 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_M1_MF4_MASK = 11000 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_M2_M1 = 11001 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_M2_M1_MASK = 11002 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_M2_MF2 = 11003 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_M2_MF2_MASK = 11004 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_M4_M1 = 11005 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_M4_M1_MASK = 11006 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_MF2_M1 = 11007 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_MF2_M1_MASK = 11008 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_MF2_MF2 = 11009 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_MF2_MF2_MASK = 11010 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_MF2_MF4 = 11011 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_MF2_MF4_MASK = 11012 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_MF2_MF8 = 11013 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI32_V_MF2_MF8_MASK = 11014 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M1_M1 = 11015 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M1_M1_MASK = 11016 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M1_MF2 = 11017 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M1_MF2_MASK = 11018 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M1_MF4 = 11019 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M1_MF4_MASK = 11020 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M1_MF8 = 11021 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M1_MF8_MASK = 11022 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M2_M1 = 11023 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M2_M1_MASK = 11024 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M2_MF2 = 11025 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M2_MF2_MASK = 11026 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M2_MF4 = 11027 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M2_MF4_MASK = 11028 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M4_M1 = 11029 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M4_M1_MASK = 11030 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M4_MF2 = 11031 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M4_MF2_MASK = 11032 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M8_M1 = 11033 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI64_V_M8_M1_MASK = 11034 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_M1_M1 = 11035 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_M1_M1_MASK = 11036 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_MF2_M1 = 11037 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_MF2_M1_MASK = 11038 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_MF2_MF2 = 11039 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_MF2_MF2_MASK = 11040 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_MF4_M1 = 11041 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_MF4_M1_MASK = 11042 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_MF4_MF2 = 11043 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_MF4_MF2_MASK = 11044 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_MF4_MF4 = 11045 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_MF4_MF4_MASK = 11046 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_MF8_M1 = 11047 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_MF8_M1_MASK = 11048 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_MF8_MF2 = 11049 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_MF8_MF2_MASK = 11050 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_MF8_MF4 = 11051 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_MF8_MF4_MASK = 11052 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_MF8_MF8 = 11053 CEFBS_HasVInstructions, // PseudoVSUXSEG5EI8_V_MF8_MF8_MASK = 11054 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_M1_M1 = 11055 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_M1_M1_MASK = 11056 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_M1_MF2 = 11057 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_M1_MF2_MASK = 11058 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_M2_M1 = 11059 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_M2_M1_MASK = 11060 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_MF2_M1 = 11061 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_MF2_M1_MASK = 11062 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_MF2_MF2 = 11063 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_MF2_MF2_MASK = 11064 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_MF2_MF4 = 11065 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_MF2_MF4_MASK = 11066 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_MF4_M1 = 11067 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_MF4_M1_MASK = 11068 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_MF4_MF2 = 11069 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_MF4_MF2_MASK = 11070 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_MF4_MF4 = 11071 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_MF4_MF4_MASK = 11072 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_MF4_MF8 = 11073 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI16_V_MF4_MF8_MASK = 11074 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_M1_M1 = 11075 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_M1_M1_MASK = 11076 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_M1_MF2 = 11077 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_M1_MF2_MASK = 11078 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_M1_MF4 = 11079 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_M1_MF4_MASK = 11080 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_M2_M1 = 11081 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_M2_M1_MASK = 11082 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_M2_MF2 = 11083 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_M2_MF2_MASK = 11084 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_M4_M1 = 11085 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_M4_M1_MASK = 11086 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_MF2_M1 = 11087 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_MF2_M1_MASK = 11088 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_MF2_MF2 = 11089 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_MF2_MF2_MASK = 11090 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_MF2_MF4 = 11091 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_MF2_MF4_MASK = 11092 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_MF2_MF8 = 11093 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI32_V_MF2_MF8_MASK = 11094 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M1_M1 = 11095 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M1_M1_MASK = 11096 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M1_MF2 = 11097 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M1_MF2_MASK = 11098 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M1_MF4 = 11099 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M1_MF4_MASK = 11100 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M1_MF8 = 11101 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M1_MF8_MASK = 11102 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M2_M1 = 11103 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M2_M1_MASK = 11104 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M2_MF2 = 11105 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M2_MF2_MASK = 11106 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M2_MF4 = 11107 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M2_MF4_MASK = 11108 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M4_M1 = 11109 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M4_M1_MASK = 11110 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M4_MF2 = 11111 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M4_MF2_MASK = 11112 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M8_M1 = 11113 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI64_V_M8_M1_MASK = 11114 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_M1_M1 = 11115 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_M1_M1_MASK = 11116 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_MF2_M1 = 11117 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_MF2_M1_MASK = 11118 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_MF2_MF2 = 11119 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_MF2_MF2_MASK = 11120 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_MF4_M1 = 11121 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_MF4_M1_MASK = 11122 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_MF4_MF2 = 11123 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_MF4_MF2_MASK = 11124 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_MF4_MF4 = 11125 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_MF4_MF4_MASK = 11126 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_MF8_M1 = 11127 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_MF8_M1_MASK = 11128 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_MF8_MF2 = 11129 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_MF8_MF2_MASK = 11130 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_MF8_MF4 = 11131 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_MF8_MF4_MASK = 11132 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_MF8_MF8 = 11133 CEFBS_HasVInstructions, // PseudoVSUXSEG6EI8_V_MF8_MF8_MASK = 11134 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_M1_M1 = 11135 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_M1_M1_MASK = 11136 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_M1_MF2 = 11137 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_M1_MF2_MASK = 11138 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_M2_M1 = 11139 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_M2_M1_MASK = 11140 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_MF2_M1 = 11141 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_MF2_M1_MASK = 11142 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_MF2_MF2 = 11143 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_MF2_MF2_MASK = 11144 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_MF2_MF4 = 11145 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_MF2_MF4_MASK = 11146 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_MF4_M1 = 11147 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_MF4_M1_MASK = 11148 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_MF4_MF2 = 11149 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_MF4_MF2_MASK = 11150 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_MF4_MF4 = 11151 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_MF4_MF4_MASK = 11152 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_MF4_MF8 = 11153 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI16_V_MF4_MF8_MASK = 11154 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_M1_M1 = 11155 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_M1_M1_MASK = 11156 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_M1_MF2 = 11157 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_M1_MF2_MASK = 11158 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_M1_MF4 = 11159 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_M1_MF4_MASK = 11160 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_M2_M1 = 11161 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_M2_M1_MASK = 11162 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_M2_MF2 = 11163 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_M2_MF2_MASK = 11164 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_M4_M1 = 11165 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_M4_M1_MASK = 11166 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_MF2_M1 = 11167 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_MF2_M1_MASK = 11168 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_MF2_MF2 = 11169 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_MF2_MF2_MASK = 11170 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_MF2_MF4 = 11171 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_MF2_MF4_MASK = 11172 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_MF2_MF8 = 11173 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI32_V_MF2_MF8_MASK = 11174 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M1_M1 = 11175 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M1_M1_MASK = 11176 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M1_MF2 = 11177 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M1_MF2_MASK = 11178 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M1_MF4 = 11179 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M1_MF4_MASK = 11180 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M1_MF8 = 11181 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M1_MF8_MASK = 11182 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M2_M1 = 11183 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M2_M1_MASK = 11184 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M2_MF2 = 11185 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M2_MF2_MASK = 11186 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M2_MF4 = 11187 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M2_MF4_MASK = 11188 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M4_M1 = 11189 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M4_M1_MASK = 11190 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M4_MF2 = 11191 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M4_MF2_MASK = 11192 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M8_M1 = 11193 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI64_V_M8_M1_MASK = 11194 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_M1_M1 = 11195 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_M1_M1_MASK = 11196 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_MF2_M1 = 11197 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_MF2_M1_MASK = 11198 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_MF2_MF2 = 11199 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_MF2_MF2_MASK = 11200 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_MF4_M1 = 11201 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_MF4_M1_MASK = 11202 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_MF4_MF2 = 11203 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_MF4_MF2_MASK = 11204 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_MF4_MF4 = 11205 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_MF4_MF4_MASK = 11206 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_MF8_M1 = 11207 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_MF8_M1_MASK = 11208 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_MF8_MF2 = 11209 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_MF8_MF2_MASK = 11210 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_MF8_MF4 = 11211 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_MF8_MF4_MASK = 11212 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_MF8_MF8 = 11213 CEFBS_HasVInstructions, // PseudoVSUXSEG7EI8_V_MF8_MF8_MASK = 11214 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_M1_M1 = 11215 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_M1_M1_MASK = 11216 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_M1_MF2 = 11217 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_M1_MF2_MASK = 11218 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_M2_M1 = 11219 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_M2_M1_MASK = 11220 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_MF2_M1 = 11221 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_MF2_M1_MASK = 11222 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_MF2_MF2 = 11223 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_MF2_MF2_MASK = 11224 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_MF2_MF4 = 11225 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_MF2_MF4_MASK = 11226 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_MF4_M1 = 11227 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_MF4_M1_MASK = 11228 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_MF4_MF2 = 11229 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_MF4_MF2_MASK = 11230 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_MF4_MF4 = 11231 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_MF4_MF4_MASK = 11232 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_MF4_MF8 = 11233 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI16_V_MF4_MF8_MASK = 11234 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_M1_M1 = 11235 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_M1_M1_MASK = 11236 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_M1_MF2 = 11237 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_M1_MF2_MASK = 11238 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_M1_MF4 = 11239 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_M1_MF4_MASK = 11240 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_M2_M1 = 11241 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_M2_M1_MASK = 11242 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_M2_MF2 = 11243 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_M2_MF2_MASK = 11244 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_M4_M1 = 11245 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_M4_M1_MASK = 11246 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_MF2_M1 = 11247 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_MF2_M1_MASK = 11248 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_MF2_MF2 = 11249 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_MF2_MF2_MASK = 11250 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_MF2_MF4 = 11251 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_MF2_MF4_MASK = 11252 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_MF2_MF8 = 11253 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI32_V_MF2_MF8_MASK = 11254 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M1_M1 = 11255 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M1_M1_MASK = 11256 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M1_MF2 = 11257 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M1_MF2_MASK = 11258 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M1_MF4 = 11259 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M1_MF4_MASK = 11260 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M1_MF8 = 11261 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M1_MF8_MASK = 11262 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M2_M1 = 11263 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M2_M1_MASK = 11264 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M2_MF2 = 11265 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M2_MF2_MASK = 11266 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M2_MF4 = 11267 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M2_MF4_MASK = 11268 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M4_M1 = 11269 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M4_M1_MASK = 11270 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M4_MF2 = 11271 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M4_MF2_MASK = 11272 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M8_M1 = 11273 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI64_V_M8_M1_MASK = 11274 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_M1_M1 = 11275 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_M1_M1_MASK = 11276 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_MF2_M1 = 11277 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_MF2_M1_MASK = 11278 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_MF2_MF2 = 11279 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_MF2_MF2_MASK = 11280 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_MF4_M1 = 11281 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_MF4_M1_MASK = 11282 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_MF4_MF2 = 11283 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_MF4_MF2_MASK = 11284 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_MF4_MF4 = 11285 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_MF4_MF4_MASK = 11286 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_MF8_M1 = 11287 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_MF8_M1_MASK = 11288 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_MF8_MF2 = 11289 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_MF8_MF2_MASK = 11290 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_MF8_MF4 = 11291 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_MF8_MF4_MASK = 11292 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_MF8_MF8 = 11293 CEFBS_HasVInstructions, // PseudoVSUXSEG8EI8_V_MF8_MF8_MASK = 11294 CEFBS_HasVInstructions, // PseudoVWADDU_VV_M1 = 11295 CEFBS_HasVInstructions, // PseudoVWADDU_VV_M1_MASK = 11296 CEFBS_HasVInstructions, // PseudoVWADDU_VV_M1_TU = 11297 CEFBS_HasVInstructions, // PseudoVWADDU_VV_M2 = 11298 CEFBS_HasVInstructions, // PseudoVWADDU_VV_M2_MASK = 11299 CEFBS_HasVInstructions, // PseudoVWADDU_VV_M2_TU = 11300 CEFBS_HasVInstructions, // PseudoVWADDU_VV_M4 = 11301 CEFBS_HasVInstructions, // PseudoVWADDU_VV_M4_MASK = 11302 CEFBS_HasVInstructions, // PseudoVWADDU_VV_M4_TU = 11303 CEFBS_HasVInstructions, // PseudoVWADDU_VV_MF2 = 11304 CEFBS_HasVInstructions, // PseudoVWADDU_VV_MF2_MASK = 11305 CEFBS_HasVInstructions, // PseudoVWADDU_VV_MF2_TU = 11306 CEFBS_HasVInstructions, // PseudoVWADDU_VV_MF4 = 11307 CEFBS_HasVInstructions, // PseudoVWADDU_VV_MF4_MASK = 11308 CEFBS_HasVInstructions, // PseudoVWADDU_VV_MF4_TU = 11309 CEFBS_HasVInstructions, // PseudoVWADDU_VV_MF8 = 11310 CEFBS_HasVInstructions, // PseudoVWADDU_VV_MF8_MASK = 11311 CEFBS_HasVInstructions, // PseudoVWADDU_VV_MF8_TU = 11312 CEFBS_HasVInstructions, // PseudoVWADDU_VX_M1 = 11313 CEFBS_HasVInstructions, // PseudoVWADDU_VX_M1_MASK = 11314 CEFBS_HasVInstructions, // PseudoVWADDU_VX_M1_TU = 11315 CEFBS_HasVInstructions, // PseudoVWADDU_VX_M2 = 11316 CEFBS_HasVInstructions, // PseudoVWADDU_VX_M2_MASK = 11317 CEFBS_HasVInstructions, // PseudoVWADDU_VX_M2_TU = 11318 CEFBS_HasVInstructions, // PseudoVWADDU_VX_M4 = 11319 CEFBS_HasVInstructions, // PseudoVWADDU_VX_M4_MASK = 11320 CEFBS_HasVInstructions, // PseudoVWADDU_VX_M4_TU = 11321 CEFBS_HasVInstructions, // PseudoVWADDU_VX_MF2 = 11322 CEFBS_HasVInstructions, // PseudoVWADDU_VX_MF2_MASK = 11323 CEFBS_HasVInstructions, // PseudoVWADDU_VX_MF2_TU = 11324 CEFBS_HasVInstructions, // PseudoVWADDU_VX_MF4 = 11325 CEFBS_HasVInstructions, // PseudoVWADDU_VX_MF4_MASK = 11326 CEFBS_HasVInstructions, // PseudoVWADDU_VX_MF4_TU = 11327 CEFBS_HasVInstructions, // PseudoVWADDU_VX_MF8 = 11328 CEFBS_HasVInstructions, // PseudoVWADDU_VX_MF8_MASK = 11329 CEFBS_HasVInstructions, // PseudoVWADDU_VX_MF8_TU = 11330 CEFBS_HasVInstructions, // PseudoVWADDU_WV_M1 = 11331 CEFBS_HasVInstructions, // PseudoVWADDU_WV_M1_MASK = 11332 CEFBS_HasVInstructions, // PseudoVWADDU_WV_M1_MASK_TIED = 11333 CEFBS_HasVInstructions, // PseudoVWADDU_WV_M1_TIED = 11334 CEFBS_HasVInstructions, // PseudoVWADDU_WV_M1_TU = 11335 CEFBS_HasVInstructions, // PseudoVWADDU_WV_M2 = 11336 CEFBS_HasVInstructions, // PseudoVWADDU_WV_M2_MASK = 11337 CEFBS_HasVInstructions, // PseudoVWADDU_WV_M2_MASK_TIED = 11338 CEFBS_HasVInstructions, // PseudoVWADDU_WV_M2_TIED = 11339 CEFBS_HasVInstructions, // PseudoVWADDU_WV_M2_TU = 11340 CEFBS_HasVInstructions, // PseudoVWADDU_WV_M4 = 11341 CEFBS_HasVInstructions, // PseudoVWADDU_WV_M4_MASK = 11342 CEFBS_HasVInstructions, // PseudoVWADDU_WV_M4_MASK_TIED = 11343 CEFBS_HasVInstructions, // PseudoVWADDU_WV_M4_TIED = 11344 CEFBS_HasVInstructions, // PseudoVWADDU_WV_M4_TU = 11345 CEFBS_HasVInstructions, // PseudoVWADDU_WV_MF2 = 11346 CEFBS_HasVInstructions, // PseudoVWADDU_WV_MF2_MASK = 11347 CEFBS_HasVInstructions, // PseudoVWADDU_WV_MF2_MASK_TIED = 11348 CEFBS_HasVInstructions, // PseudoVWADDU_WV_MF2_TIED = 11349 CEFBS_HasVInstructions, // PseudoVWADDU_WV_MF2_TU = 11350 CEFBS_HasVInstructions, // PseudoVWADDU_WV_MF4 = 11351 CEFBS_HasVInstructions, // PseudoVWADDU_WV_MF4_MASK = 11352 CEFBS_HasVInstructions, // PseudoVWADDU_WV_MF4_MASK_TIED = 11353 CEFBS_HasVInstructions, // PseudoVWADDU_WV_MF4_TIED = 11354 CEFBS_HasVInstructions, // PseudoVWADDU_WV_MF4_TU = 11355 CEFBS_HasVInstructions, // PseudoVWADDU_WV_MF8 = 11356 CEFBS_HasVInstructions, // PseudoVWADDU_WV_MF8_MASK = 11357 CEFBS_HasVInstructions, // PseudoVWADDU_WV_MF8_MASK_TIED = 11358 CEFBS_HasVInstructions, // PseudoVWADDU_WV_MF8_TIED = 11359 CEFBS_HasVInstructions, // PseudoVWADDU_WV_MF8_TU = 11360 CEFBS_HasVInstructions, // PseudoVWADDU_WX_M1 = 11361 CEFBS_HasVInstructions, // PseudoVWADDU_WX_M1_MASK = 11362 CEFBS_HasVInstructions, // PseudoVWADDU_WX_M1_TU = 11363 CEFBS_HasVInstructions, // PseudoVWADDU_WX_M2 = 11364 CEFBS_HasVInstructions, // PseudoVWADDU_WX_M2_MASK = 11365 CEFBS_HasVInstructions, // PseudoVWADDU_WX_M2_TU = 11366 CEFBS_HasVInstructions, // PseudoVWADDU_WX_M4 = 11367 CEFBS_HasVInstructions, // PseudoVWADDU_WX_M4_MASK = 11368 CEFBS_HasVInstructions, // PseudoVWADDU_WX_M4_TU = 11369 CEFBS_HasVInstructions, // PseudoVWADDU_WX_MF2 = 11370 CEFBS_HasVInstructions, // PseudoVWADDU_WX_MF2_MASK = 11371 CEFBS_HasVInstructions, // PseudoVWADDU_WX_MF2_TU = 11372 CEFBS_HasVInstructions, // PseudoVWADDU_WX_MF4 = 11373 CEFBS_HasVInstructions, // PseudoVWADDU_WX_MF4_MASK = 11374 CEFBS_HasVInstructions, // PseudoVWADDU_WX_MF4_TU = 11375 CEFBS_HasVInstructions, // PseudoVWADDU_WX_MF8 = 11376 CEFBS_HasVInstructions, // PseudoVWADDU_WX_MF8_MASK = 11377 CEFBS_HasVInstructions, // PseudoVWADDU_WX_MF8_TU = 11378 CEFBS_HasVInstructions, // PseudoVWADD_VV_M1 = 11379 CEFBS_HasVInstructions, // PseudoVWADD_VV_M1_MASK = 11380 CEFBS_HasVInstructions, // PseudoVWADD_VV_M1_TU = 11381 CEFBS_HasVInstructions, // PseudoVWADD_VV_M2 = 11382 CEFBS_HasVInstructions, // PseudoVWADD_VV_M2_MASK = 11383 CEFBS_HasVInstructions, // PseudoVWADD_VV_M2_TU = 11384 CEFBS_HasVInstructions, // PseudoVWADD_VV_M4 = 11385 CEFBS_HasVInstructions, // PseudoVWADD_VV_M4_MASK = 11386 CEFBS_HasVInstructions, // PseudoVWADD_VV_M4_TU = 11387 CEFBS_HasVInstructions, // PseudoVWADD_VV_MF2 = 11388 CEFBS_HasVInstructions, // PseudoVWADD_VV_MF2_MASK = 11389 CEFBS_HasVInstructions, // PseudoVWADD_VV_MF2_TU = 11390 CEFBS_HasVInstructions, // PseudoVWADD_VV_MF4 = 11391 CEFBS_HasVInstructions, // PseudoVWADD_VV_MF4_MASK = 11392 CEFBS_HasVInstructions, // PseudoVWADD_VV_MF4_TU = 11393 CEFBS_HasVInstructions, // PseudoVWADD_VV_MF8 = 11394 CEFBS_HasVInstructions, // PseudoVWADD_VV_MF8_MASK = 11395 CEFBS_HasVInstructions, // PseudoVWADD_VV_MF8_TU = 11396 CEFBS_HasVInstructions, // PseudoVWADD_VX_M1 = 11397 CEFBS_HasVInstructions, // PseudoVWADD_VX_M1_MASK = 11398 CEFBS_HasVInstructions, // PseudoVWADD_VX_M1_TU = 11399 CEFBS_HasVInstructions, // PseudoVWADD_VX_M2 = 11400 CEFBS_HasVInstructions, // PseudoVWADD_VX_M2_MASK = 11401 CEFBS_HasVInstructions, // PseudoVWADD_VX_M2_TU = 11402 CEFBS_HasVInstructions, // PseudoVWADD_VX_M4 = 11403 CEFBS_HasVInstructions, // PseudoVWADD_VX_M4_MASK = 11404 CEFBS_HasVInstructions, // PseudoVWADD_VX_M4_TU = 11405 CEFBS_HasVInstructions, // PseudoVWADD_VX_MF2 = 11406 CEFBS_HasVInstructions, // PseudoVWADD_VX_MF2_MASK = 11407 CEFBS_HasVInstructions, // PseudoVWADD_VX_MF2_TU = 11408 CEFBS_HasVInstructions, // PseudoVWADD_VX_MF4 = 11409 CEFBS_HasVInstructions, // PseudoVWADD_VX_MF4_MASK = 11410 CEFBS_HasVInstructions, // PseudoVWADD_VX_MF4_TU = 11411 CEFBS_HasVInstructions, // PseudoVWADD_VX_MF8 = 11412 CEFBS_HasVInstructions, // PseudoVWADD_VX_MF8_MASK = 11413 CEFBS_HasVInstructions, // PseudoVWADD_VX_MF8_TU = 11414 CEFBS_HasVInstructions, // PseudoVWADD_WV_M1 = 11415 CEFBS_HasVInstructions, // PseudoVWADD_WV_M1_MASK = 11416 CEFBS_HasVInstructions, // PseudoVWADD_WV_M1_MASK_TIED = 11417 CEFBS_HasVInstructions, // PseudoVWADD_WV_M1_TIED = 11418 CEFBS_HasVInstructions, // PseudoVWADD_WV_M1_TU = 11419 CEFBS_HasVInstructions, // PseudoVWADD_WV_M2 = 11420 CEFBS_HasVInstructions, // PseudoVWADD_WV_M2_MASK = 11421 CEFBS_HasVInstructions, // PseudoVWADD_WV_M2_MASK_TIED = 11422 CEFBS_HasVInstructions, // PseudoVWADD_WV_M2_TIED = 11423 CEFBS_HasVInstructions, // PseudoVWADD_WV_M2_TU = 11424 CEFBS_HasVInstructions, // PseudoVWADD_WV_M4 = 11425 CEFBS_HasVInstructions, // PseudoVWADD_WV_M4_MASK = 11426 CEFBS_HasVInstructions, // PseudoVWADD_WV_M4_MASK_TIED = 11427 CEFBS_HasVInstructions, // PseudoVWADD_WV_M4_TIED = 11428 CEFBS_HasVInstructions, // PseudoVWADD_WV_M4_TU = 11429 CEFBS_HasVInstructions, // PseudoVWADD_WV_MF2 = 11430 CEFBS_HasVInstructions, // PseudoVWADD_WV_MF2_MASK = 11431 CEFBS_HasVInstructions, // PseudoVWADD_WV_MF2_MASK_TIED = 11432 CEFBS_HasVInstructions, // PseudoVWADD_WV_MF2_TIED = 11433 CEFBS_HasVInstructions, // PseudoVWADD_WV_MF2_TU = 11434 CEFBS_HasVInstructions, // PseudoVWADD_WV_MF4 = 11435 CEFBS_HasVInstructions, // PseudoVWADD_WV_MF4_MASK = 11436 CEFBS_HasVInstructions, // PseudoVWADD_WV_MF4_MASK_TIED = 11437 CEFBS_HasVInstructions, // PseudoVWADD_WV_MF4_TIED = 11438 CEFBS_HasVInstructions, // PseudoVWADD_WV_MF4_TU = 11439 CEFBS_HasVInstructions, // PseudoVWADD_WV_MF8 = 11440 CEFBS_HasVInstructions, // PseudoVWADD_WV_MF8_MASK = 11441 CEFBS_HasVInstructions, // PseudoVWADD_WV_MF8_MASK_TIED = 11442 CEFBS_HasVInstructions, // PseudoVWADD_WV_MF8_TIED = 11443 CEFBS_HasVInstructions, // PseudoVWADD_WV_MF8_TU = 11444 CEFBS_HasVInstructions, // PseudoVWADD_WX_M1 = 11445 CEFBS_HasVInstructions, // PseudoVWADD_WX_M1_MASK = 11446 CEFBS_HasVInstructions, // PseudoVWADD_WX_M1_TU = 11447 CEFBS_HasVInstructions, // PseudoVWADD_WX_M2 = 11448 CEFBS_HasVInstructions, // PseudoVWADD_WX_M2_MASK = 11449 CEFBS_HasVInstructions, // PseudoVWADD_WX_M2_TU = 11450 CEFBS_HasVInstructions, // PseudoVWADD_WX_M4 = 11451 CEFBS_HasVInstructions, // PseudoVWADD_WX_M4_MASK = 11452 CEFBS_HasVInstructions, // PseudoVWADD_WX_M4_TU = 11453 CEFBS_HasVInstructions, // PseudoVWADD_WX_MF2 = 11454 CEFBS_HasVInstructions, // PseudoVWADD_WX_MF2_MASK = 11455 CEFBS_HasVInstructions, // PseudoVWADD_WX_MF2_TU = 11456 CEFBS_HasVInstructions, // PseudoVWADD_WX_MF4 = 11457 CEFBS_HasVInstructions, // PseudoVWADD_WX_MF4_MASK = 11458 CEFBS_HasVInstructions, // PseudoVWADD_WX_MF4_TU = 11459 CEFBS_HasVInstructions, // PseudoVWADD_WX_MF8 = 11460 CEFBS_HasVInstructions, // PseudoVWADD_WX_MF8_MASK = 11461 CEFBS_HasVInstructions, // PseudoVWADD_WX_MF8_TU = 11462 CEFBS_HasVInstructions, // PseudoVWMACCSU_VV_M1 = 11463 CEFBS_HasVInstructions, // PseudoVWMACCSU_VV_M1_MASK = 11464 CEFBS_HasVInstructions, // PseudoVWMACCSU_VV_M2 = 11465 CEFBS_HasVInstructions, // PseudoVWMACCSU_VV_M2_MASK = 11466 CEFBS_HasVInstructions, // PseudoVWMACCSU_VV_M4 = 11467 CEFBS_HasVInstructions, // PseudoVWMACCSU_VV_M4_MASK = 11468 CEFBS_HasVInstructions, // PseudoVWMACCSU_VV_MF2 = 11469 CEFBS_HasVInstructions, // PseudoVWMACCSU_VV_MF2_MASK = 11470 CEFBS_HasVInstructions, // PseudoVWMACCSU_VV_MF4 = 11471 CEFBS_HasVInstructions, // PseudoVWMACCSU_VV_MF4_MASK = 11472 CEFBS_HasVInstructions, // PseudoVWMACCSU_VV_MF8 = 11473 CEFBS_HasVInstructions, // PseudoVWMACCSU_VV_MF8_MASK = 11474 CEFBS_HasVInstructions, // PseudoVWMACCSU_VX_M1 = 11475 CEFBS_HasVInstructions, // PseudoVWMACCSU_VX_M1_MASK = 11476 CEFBS_HasVInstructions, // PseudoVWMACCSU_VX_M2 = 11477 CEFBS_HasVInstructions, // PseudoVWMACCSU_VX_M2_MASK = 11478 CEFBS_HasVInstructions, // PseudoVWMACCSU_VX_M4 = 11479 CEFBS_HasVInstructions, // PseudoVWMACCSU_VX_M4_MASK = 11480 CEFBS_HasVInstructions, // PseudoVWMACCSU_VX_MF2 = 11481 CEFBS_HasVInstructions, // PseudoVWMACCSU_VX_MF2_MASK = 11482 CEFBS_HasVInstructions, // PseudoVWMACCSU_VX_MF4 = 11483 CEFBS_HasVInstructions, // PseudoVWMACCSU_VX_MF4_MASK = 11484 CEFBS_HasVInstructions, // PseudoVWMACCSU_VX_MF8 = 11485 CEFBS_HasVInstructions, // PseudoVWMACCSU_VX_MF8_MASK = 11486 CEFBS_HasVInstructions, // PseudoVWMACCUS_VX_M1 = 11487 CEFBS_HasVInstructions, // PseudoVWMACCUS_VX_M1_MASK = 11488 CEFBS_HasVInstructions, // PseudoVWMACCUS_VX_M2 = 11489 CEFBS_HasVInstructions, // PseudoVWMACCUS_VX_M2_MASK = 11490 CEFBS_HasVInstructions, // PseudoVWMACCUS_VX_M4 = 11491 CEFBS_HasVInstructions, // PseudoVWMACCUS_VX_M4_MASK = 11492 CEFBS_HasVInstructions, // PseudoVWMACCUS_VX_MF2 = 11493 CEFBS_HasVInstructions, // PseudoVWMACCUS_VX_MF2_MASK = 11494 CEFBS_HasVInstructions, // PseudoVWMACCUS_VX_MF4 = 11495 CEFBS_HasVInstructions, // PseudoVWMACCUS_VX_MF4_MASK = 11496 CEFBS_HasVInstructions, // PseudoVWMACCUS_VX_MF8 = 11497 CEFBS_HasVInstructions, // PseudoVWMACCUS_VX_MF8_MASK = 11498 CEFBS_HasVInstructions, // PseudoVWMACCU_VV_M1 = 11499 CEFBS_HasVInstructions, // PseudoVWMACCU_VV_M1_MASK = 11500 CEFBS_HasVInstructions, // PseudoVWMACCU_VV_M2 = 11501 CEFBS_HasVInstructions, // PseudoVWMACCU_VV_M2_MASK = 11502 CEFBS_HasVInstructions, // PseudoVWMACCU_VV_M4 = 11503 CEFBS_HasVInstructions, // PseudoVWMACCU_VV_M4_MASK = 11504 CEFBS_HasVInstructions, // PseudoVWMACCU_VV_MF2 = 11505 CEFBS_HasVInstructions, // PseudoVWMACCU_VV_MF2_MASK = 11506 CEFBS_HasVInstructions, // PseudoVWMACCU_VV_MF4 = 11507 CEFBS_HasVInstructions, // PseudoVWMACCU_VV_MF4_MASK = 11508 CEFBS_HasVInstructions, // PseudoVWMACCU_VV_MF8 = 11509 CEFBS_HasVInstructions, // PseudoVWMACCU_VV_MF8_MASK = 11510 CEFBS_HasVInstructions, // PseudoVWMACCU_VX_M1 = 11511 CEFBS_HasVInstructions, // PseudoVWMACCU_VX_M1_MASK = 11512 CEFBS_HasVInstructions, // PseudoVWMACCU_VX_M2 = 11513 CEFBS_HasVInstructions, // PseudoVWMACCU_VX_M2_MASK = 11514 CEFBS_HasVInstructions, // PseudoVWMACCU_VX_M4 = 11515 CEFBS_HasVInstructions, // PseudoVWMACCU_VX_M4_MASK = 11516 CEFBS_HasVInstructions, // PseudoVWMACCU_VX_MF2 = 11517 CEFBS_HasVInstructions, // PseudoVWMACCU_VX_MF2_MASK = 11518 CEFBS_HasVInstructions, // PseudoVWMACCU_VX_MF4 = 11519 CEFBS_HasVInstructions, // PseudoVWMACCU_VX_MF4_MASK = 11520 CEFBS_HasVInstructions, // PseudoVWMACCU_VX_MF8 = 11521 CEFBS_HasVInstructions, // PseudoVWMACCU_VX_MF8_MASK = 11522 CEFBS_HasVInstructions, // PseudoVWMACC_VV_M1 = 11523 CEFBS_HasVInstructions, // PseudoVWMACC_VV_M1_MASK = 11524 CEFBS_HasVInstructions, // PseudoVWMACC_VV_M2 = 11525 CEFBS_HasVInstructions, // PseudoVWMACC_VV_M2_MASK = 11526 CEFBS_HasVInstructions, // PseudoVWMACC_VV_M4 = 11527 CEFBS_HasVInstructions, // PseudoVWMACC_VV_M4_MASK = 11528 CEFBS_HasVInstructions, // PseudoVWMACC_VV_MF2 = 11529 CEFBS_HasVInstructions, // PseudoVWMACC_VV_MF2_MASK = 11530 CEFBS_HasVInstructions, // PseudoVWMACC_VV_MF4 = 11531 CEFBS_HasVInstructions, // PseudoVWMACC_VV_MF4_MASK = 11532 CEFBS_HasVInstructions, // PseudoVWMACC_VV_MF8 = 11533 CEFBS_HasVInstructions, // PseudoVWMACC_VV_MF8_MASK = 11534 CEFBS_HasVInstructions, // PseudoVWMACC_VX_M1 = 11535 CEFBS_HasVInstructions, // PseudoVWMACC_VX_M1_MASK = 11536 CEFBS_HasVInstructions, // PseudoVWMACC_VX_M2 = 11537 CEFBS_HasVInstructions, // PseudoVWMACC_VX_M2_MASK = 11538 CEFBS_HasVInstructions, // PseudoVWMACC_VX_M4 = 11539 CEFBS_HasVInstructions, // PseudoVWMACC_VX_M4_MASK = 11540 CEFBS_HasVInstructions, // PseudoVWMACC_VX_MF2 = 11541 CEFBS_HasVInstructions, // PseudoVWMACC_VX_MF2_MASK = 11542 CEFBS_HasVInstructions, // PseudoVWMACC_VX_MF4 = 11543 CEFBS_HasVInstructions, // PseudoVWMACC_VX_MF4_MASK = 11544 CEFBS_HasVInstructions, // PseudoVWMACC_VX_MF8 = 11545 CEFBS_HasVInstructions, // PseudoVWMACC_VX_MF8_MASK = 11546 CEFBS_HasVInstructions, // PseudoVWMULSU_VV_M1 = 11547 CEFBS_HasVInstructions, // PseudoVWMULSU_VV_M1_MASK = 11548 CEFBS_HasVInstructions, // PseudoVWMULSU_VV_M1_TU = 11549 CEFBS_HasVInstructions, // PseudoVWMULSU_VV_M2 = 11550 CEFBS_HasVInstructions, // PseudoVWMULSU_VV_M2_MASK = 11551 CEFBS_HasVInstructions, // PseudoVWMULSU_VV_M2_TU = 11552 CEFBS_HasVInstructions, // PseudoVWMULSU_VV_M4 = 11553 CEFBS_HasVInstructions, // PseudoVWMULSU_VV_M4_MASK = 11554 CEFBS_HasVInstructions, // PseudoVWMULSU_VV_M4_TU = 11555 CEFBS_HasVInstructions, // PseudoVWMULSU_VV_MF2 = 11556 CEFBS_HasVInstructions, // PseudoVWMULSU_VV_MF2_MASK = 11557 CEFBS_HasVInstructions, // PseudoVWMULSU_VV_MF2_TU = 11558 CEFBS_HasVInstructions, // PseudoVWMULSU_VV_MF4 = 11559 CEFBS_HasVInstructions, // PseudoVWMULSU_VV_MF4_MASK = 11560 CEFBS_HasVInstructions, // PseudoVWMULSU_VV_MF4_TU = 11561 CEFBS_HasVInstructions, // PseudoVWMULSU_VV_MF8 = 11562 CEFBS_HasVInstructions, // PseudoVWMULSU_VV_MF8_MASK = 11563 CEFBS_HasVInstructions, // PseudoVWMULSU_VV_MF8_TU = 11564 CEFBS_HasVInstructions, // PseudoVWMULSU_VX_M1 = 11565 CEFBS_HasVInstructions, // PseudoVWMULSU_VX_M1_MASK = 11566 CEFBS_HasVInstructions, // PseudoVWMULSU_VX_M1_TU = 11567 CEFBS_HasVInstructions, // PseudoVWMULSU_VX_M2 = 11568 CEFBS_HasVInstructions, // PseudoVWMULSU_VX_M2_MASK = 11569 CEFBS_HasVInstructions, // PseudoVWMULSU_VX_M2_TU = 11570 CEFBS_HasVInstructions, // PseudoVWMULSU_VX_M4 = 11571 CEFBS_HasVInstructions, // PseudoVWMULSU_VX_M4_MASK = 11572 CEFBS_HasVInstructions, // PseudoVWMULSU_VX_M4_TU = 11573 CEFBS_HasVInstructions, // PseudoVWMULSU_VX_MF2 = 11574 CEFBS_HasVInstructions, // PseudoVWMULSU_VX_MF2_MASK = 11575 CEFBS_HasVInstructions, // PseudoVWMULSU_VX_MF2_TU = 11576 CEFBS_HasVInstructions, // PseudoVWMULSU_VX_MF4 = 11577 CEFBS_HasVInstructions, // PseudoVWMULSU_VX_MF4_MASK = 11578 CEFBS_HasVInstructions, // PseudoVWMULSU_VX_MF4_TU = 11579 CEFBS_HasVInstructions, // PseudoVWMULSU_VX_MF8 = 11580 CEFBS_HasVInstructions, // PseudoVWMULSU_VX_MF8_MASK = 11581 CEFBS_HasVInstructions, // PseudoVWMULSU_VX_MF8_TU = 11582 CEFBS_HasVInstructions, // PseudoVWMULU_VV_M1 = 11583 CEFBS_HasVInstructions, // PseudoVWMULU_VV_M1_MASK = 11584 CEFBS_HasVInstructions, // PseudoVWMULU_VV_M1_TU = 11585 CEFBS_HasVInstructions, // PseudoVWMULU_VV_M2 = 11586 CEFBS_HasVInstructions, // PseudoVWMULU_VV_M2_MASK = 11587 CEFBS_HasVInstructions, // PseudoVWMULU_VV_M2_TU = 11588 CEFBS_HasVInstructions, // PseudoVWMULU_VV_M4 = 11589 CEFBS_HasVInstructions, // PseudoVWMULU_VV_M4_MASK = 11590 CEFBS_HasVInstructions, // PseudoVWMULU_VV_M4_TU = 11591 CEFBS_HasVInstructions, // PseudoVWMULU_VV_MF2 = 11592 CEFBS_HasVInstructions, // PseudoVWMULU_VV_MF2_MASK = 11593 CEFBS_HasVInstructions, // PseudoVWMULU_VV_MF2_TU = 11594 CEFBS_HasVInstructions, // PseudoVWMULU_VV_MF4 = 11595 CEFBS_HasVInstructions, // PseudoVWMULU_VV_MF4_MASK = 11596 CEFBS_HasVInstructions, // PseudoVWMULU_VV_MF4_TU = 11597 CEFBS_HasVInstructions, // PseudoVWMULU_VV_MF8 = 11598 CEFBS_HasVInstructions, // PseudoVWMULU_VV_MF8_MASK = 11599 CEFBS_HasVInstructions, // PseudoVWMULU_VV_MF8_TU = 11600 CEFBS_HasVInstructions, // PseudoVWMULU_VX_M1 = 11601 CEFBS_HasVInstructions, // PseudoVWMULU_VX_M1_MASK = 11602 CEFBS_HasVInstructions, // PseudoVWMULU_VX_M1_TU = 11603 CEFBS_HasVInstructions, // PseudoVWMULU_VX_M2 = 11604 CEFBS_HasVInstructions, // PseudoVWMULU_VX_M2_MASK = 11605 CEFBS_HasVInstructions, // PseudoVWMULU_VX_M2_TU = 11606 CEFBS_HasVInstructions, // PseudoVWMULU_VX_M4 = 11607 CEFBS_HasVInstructions, // PseudoVWMULU_VX_M4_MASK = 11608 CEFBS_HasVInstructions, // PseudoVWMULU_VX_M4_TU = 11609 CEFBS_HasVInstructions, // PseudoVWMULU_VX_MF2 = 11610 CEFBS_HasVInstructions, // PseudoVWMULU_VX_MF2_MASK = 11611 CEFBS_HasVInstructions, // PseudoVWMULU_VX_MF2_TU = 11612 CEFBS_HasVInstructions, // PseudoVWMULU_VX_MF4 = 11613 CEFBS_HasVInstructions, // PseudoVWMULU_VX_MF4_MASK = 11614 CEFBS_HasVInstructions, // PseudoVWMULU_VX_MF4_TU = 11615 CEFBS_HasVInstructions, // PseudoVWMULU_VX_MF8 = 11616 CEFBS_HasVInstructions, // PseudoVWMULU_VX_MF8_MASK = 11617 CEFBS_HasVInstructions, // PseudoVWMULU_VX_MF8_TU = 11618 CEFBS_HasVInstructions, // PseudoVWMUL_VV_M1 = 11619 CEFBS_HasVInstructions, // PseudoVWMUL_VV_M1_MASK = 11620 CEFBS_HasVInstructions, // PseudoVWMUL_VV_M1_TU = 11621 CEFBS_HasVInstructions, // PseudoVWMUL_VV_M2 = 11622 CEFBS_HasVInstructions, // PseudoVWMUL_VV_M2_MASK = 11623 CEFBS_HasVInstructions, // PseudoVWMUL_VV_M2_TU = 11624 CEFBS_HasVInstructions, // PseudoVWMUL_VV_M4 = 11625 CEFBS_HasVInstructions, // PseudoVWMUL_VV_M4_MASK = 11626 CEFBS_HasVInstructions, // PseudoVWMUL_VV_M4_TU = 11627 CEFBS_HasVInstructions, // PseudoVWMUL_VV_MF2 = 11628 CEFBS_HasVInstructions, // PseudoVWMUL_VV_MF2_MASK = 11629 CEFBS_HasVInstructions, // PseudoVWMUL_VV_MF2_TU = 11630 CEFBS_HasVInstructions, // PseudoVWMUL_VV_MF4 = 11631 CEFBS_HasVInstructions, // PseudoVWMUL_VV_MF4_MASK = 11632 CEFBS_HasVInstructions, // PseudoVWMUL_VV_MF4_TU = 11633 CEFBS_HasVInstructions, // PseudoVWMUL_VV_MF8 = 11634 CEFBS_HasVInstructions, // PseudoVWMUL_VV_MF8_MASK = 11635 CEFBS_HasVInstructions, // PseudoVWMUL_VV_MF8_TU = 11636 CEFBS_HasVInstructions, // PseudoVWMUL_VX_M1 = 11637 CEFBS_HasVInstructions, // PseudoVWMUL_VX_M1_MASK = 11638 CEFBS_HasVInstructions, // PseudoVWMUL_VX_M1_TU = 11639 CEFBS_HasVInstructions, // PseudoVWMUL_VX_M2 = 11640 CEFBS_HasVInstructions, // PseudoVWMUL_VX_M2_MASK = 11641 CEFBS_HasVInstructions, // PseudoVWMUL_VX_M2_TU = 11642 CEFBS_HasVInstructions, // PseudoVWMUL_VX_M4 = 11643 CEFBS_HasVInstructions, // PseudoVWMUL_VX_M4_MASK = 11644 CEFBS_HasVInstructions, // PseudoVWMUL_VX_M4_TU = 11645 CEFBS_HasVInstructions, // PseudoVWMUL_VX_MF2 = 11646 CEFBS_HasVInstructions, // PseudoVWMUL_VX_MF2_MASK = 11647 CEFBS_HasVInstructions, // PseudoVWMUL_VX_MF2_TU = 11648 CEFBS_HasVInstructions, // PseudoVWMUL_VX_MF4 = 11649 CEFBS_HasVInstructions, // PseudoVWMUL_VX_MF4_MASK = 11650 CEFBS_HasVInstructions, // PseudoVWMUL_VX_MF4_TU = 11651 CEFBS_HasVInstructions, // PseudoVWMUL_VX_MF8 = 11652 CEFBS_HasVInstructions, // PseudoVWMUL_VX_MF8_MASK = 11653 CEFBS_HasVInstructions, // PseudoVWMUL_VX_MF8_TU = 11654 CEFBS_HasVInstructions, // PseudoVWREDSUMU_VS_M1 = 11655 CEFBS_HasVInstructions, // PseudoVWREDSUMU_VS_M1_MASK = 11656 CEFBS_HasVInstructions, // PseudoVWREDSUMU_VS_M2 = 11657 CEFBS_HasVInstructions, // PseudoVWREDSUMU_VS_M2_MASK = 11658 CEFBS_HasVInstructions, // PseudoVWREDSUMU_VS_M4 = 11659 CEFBS_HasVInstructions, // PseudoVWREDSUMU_VS_M4_MASK = 11660 CEFBS_HasVInstructions, // PseudoVWREDSUMU_VS_M8 = 11661 CEFBS_HasVInstructions, // PseudoVWREDSUMU_VS_M8_MASK = 11662 CEFBS_HasVInstructions, // PseudoVWREDSUMU_VS_MF2 = 11663 CEFBS_HasVInstructions, // PseudoVWREDSUMU_VS_MF2_MASK = 11664 CEFBS_HasVInstructions, // PseudoVWREDSUMU_VS_MF4 = 11665 CEFBS_HasVInstructions, // PseudoVWREDSUMU_VS_MF4_MASK = 11666 CEFBS_HasVInstructions, // PseudoVWREDSUMU_VS_MF8 = 11667 CEFBS_HasVInstructions, // PseudoVWREDSUMU_VS_MF8_MASK = 11668 CEFBS_HasVInstructions, // PseudoVWREDSUM_VS_M1 = 11669 CEFBS_HasVInstructions, // PseudoVWREDSUM_VS_M1_MASK = 11670 CEFBS_HasVInstructions, // PseudoVWREDSUM_VS_M2 = 11671 CEFBS_HasVInstructions, // PseudoVWREDSUM_VS_M2_MASK = 11672 CEFBS_HasVInstructions, // PseudoVWREDSUM_VS_M4 = 11673 CEFBS_HasVInstructions, // PseudoVWREDSUM_VS_M4_MASK = 11674 CEFBS_HasVInstructions, // PseudoVWREDSUM_VS_M8 = 11675 CEFBS_HasVInstructions, // PseudoVWREDSUM_VS_M8_MASK = 11676 CEFBS_HasVInstructions, // PseudoVWREDSUM_VS_MF2 = 11677 CEFBS_HasVInstructions, // PseudoVWREDSUM_VS_MF2_MASK = 11678 CEFBS_HasVInstructions, // PseudoVWREDSUM_VS_MF4 = 11679 CEFBS_HasVInstructions, // PseudoVWREDSUM_VS_MF4_MASK = 11680 CEFBS_HasVInstructions, // PseudoVWREDSUM_VS_MF8 = 11681 CEFBS_HasVInstructions, // PseudoVWREDSUM_VS_MF8_MASK = 11682 CEFBS_HasVInstructions, // PseudoVWSUBU_VV_M1 = 11683 CEFBS_HasVInstructions, // PseudoVWSUBU_VV_M1_MASK = 11684 CEFBS_HasVInstructions, // PseudoVWSUBU_VV_M1_TU = 11685 CEFBS_HasVInstructions, // PseudoVWSUBU_VV_M2 = 11686 CEFBS_HasVInstructions, // PseudoVWSUBU_VV_M2_MASK = 11687 CEFBS_HasVInstructions, // PseudoVWSUBU_VV_M2_TU = 11688 CEFBS_HasVInstructions, // PseudoVWSUBU_VV_M4 = 11689 CEFBS_HasVInstructions, // PseudoVWSUBU_VV_M4_MASK = 11690 CEFBS_HasVInstructions, // PseudoVWSUBU_VV_M4_TU = 11691 CEFBS_HasVInstructions, // PseudoVWSUBU_VV_MF2 = 11692 CEFBS_HasVInstructions, // PseudoVWSUBU_VV_MF2_MASK = 11693 CEFBS_HasVInstructions, // PseudoVWSUBU_VV_MF2_TU = 11694 CEFBS_HasVInstructions, // PseudoVWSUBU_VV_MF4 = 11695 CEFBS_HasVInstructions, // PseudoVWSUBU_VV_MF4_MASK = 11696 CEFBS_HasVInstructions, // PseudoVWSUBU_VV_MF4_TU = 11697 CEFBS_HasVInstructions, // PseudoVWSUBU_VV_MF8 = 11698 CEFBS_HasVInstructions, // PseudoVWSUBU_VV_MF8_MASK = 11699 CEFBS_HasVInstructions, // PseudoVWSUBU_VV_MF8_TU = 11700 CEFBS_HasVInstructions, // PseudoVWSUBU_VX_M1 = 11701 CEFBS_HasVInstructions, // PseudoVWSUBU_VX_M1_MASK = 11702 CEFBS_HasVInstructions, // PseudoVWSUBU_VX_M1_TU = 11703 CEFBS_HasVInstructions, // PseudoVWSUBU_VX_M2 = 11704 CEFBS_HasVInstructions, // PseudoVWSUBU_VX_M2_MASK = 11705 CEFBS_HasVInstructions, // PseudoVWSUBU_VX_M2_TU = 11706 CEFBS_HasVInstructions, // PseudoVWSUBU_VX_M4 = 11707 CEFBS_HasVInstructions, // PseudoVWSUBU_VX_M4_MASK = 11708 CEFBS_HasVInstructions, // PseudoVWSUBU_VX_M4_TU = 11709 CEFBS_HasVInstructions, // PseudoVWSUBU_VX_MF2 = 11710 CEFBS_HasVInstructions, // PseudoVWSUBU_VX_MF2_MASK = 11711 CEFBS_HasVInstructions, // PseudoVWSUBU_VX_MF2_TU = 11712 CEFBS_HasVInstructions, // PseudoVWSUBU_VX_MF4 = 11713 CEFBS_HasVInstructions, // PseudoVWSUBU_VX_MF4_MASK = 11714 CEFBS_HasVInstructions, // PseudoVWSUBU_VX_MF4_TU = 11715 CEFBS_HasVInstructions, // PseudoVWSUBU_VX_MF8 = 11716 CEFBS_HasVInstructions, // PseudoVWSUBU_VX_MF8_MASK = 11717 CEFBS_HasVInstructions, // PseudoVWSUBU_VX_MF8_TU = 11718 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_M1 = 11719 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_M1_MASK = 11720 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_M1_MASK_TIED = 11721 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_M1_TIED = 11722 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_M1_TU = 11723 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_M2 = 11724 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_M2_MASK = 11725 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_M2_MASK_TIED = 11726 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_M2_TIED = 11727 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_M2_TU = 11728 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_M4 = 11729 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_M4_MASK = 11730 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_M4_MASK_TIED = 11731 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_M4_TIED = 11732 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_M4_TU = 11733 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_MF2 = 11734 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_MF2_MASK = 11735 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_MF2_MASK_TIED = 11736 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_MF2_TIED = 11737 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_MF2_TU = 11738 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_MF4 = 11739 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_MF4_MASK = 11740 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_MF4_MASK_TIED = 11741 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_MF4_TIED = 11742 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_MF4_TU = 11743 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_MF8 = 11744 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_MF8_MASK = 11745 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_MF8_MASK_TIED = 11746 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_MF8_TIED = 11747 CEFBS_HasVInstructions, // PseudoVWSUBU_WV_MF8_TU = 11748 CEFBS_HasVInstructions, // PseudoVWSUBU_WX_M1 = 11749 CEFBS_HasVInstructions, // PseudoVWSUBU_WX_M1_MASK = 11750 CEFBS_HasVInstructions, // PseudoVWSUBU_WX_M1_TU = 11751 CEFBS_HasVInstructions, // PseudoVWSUBU_WX_M2 = 11752 CEFBS_HasVInstructions, // PseudoVWSUBU_WX_M2_MASK = 11753 CEFBS_HasVInstructions, // PseudoVWSUBU_WX_M2_TU = 11754 CEFBS_HasVInstructions, // PseudoVWSUBU_WX_M4 = 11755 CEFBS_HasVInstructions, // PseudoVWSUBU_WX_M4_MASK = 11756 CEFBS_HasVInstructions, // PseudoVWSUBU_WX_M4_TU = 11757 CEFBS_HasVInstructions, // PseudoVWSUBU_WX_MF2 = 11758 CEFBS_HasVInstructions, // PseudoVWSUBU_WX_MF2_MASK = 11759 CEFBS_HasVInstructions, // PseudoVWSUBU_WX_MF2_TU = 11760 CEFBS_HasVInstructions, // PseudoVWSUBU_WX_MF4 = 11761 CEFBS_HasVInstructions, // PseudoVWSUBU_WX_MF4_MASK = 11762 CEFBS_HasVInstructions, // PseudoVWSUBU_WX_MF4_TU = 11763 CEFBS_HasVInstructions, // PseudoVWSUBU_WX_MF8 = 11764 CEFBS_HasVInstructions, // PseudoVWSUBU_WX_MF8_MASK = 11765 CEFBS_HasVInstructions, // PseudoVWSUBU_WX_MF8_TU = 11766 CEFBS_HasVInstructions, // PseudoVWSUB_VV_M1 = 11767 CEFBS_HasVInstructions, // PseudoVWSUB_VV_M1_MASK = 11768 CEFBS_HasVInstructions, // PseudoVWSUB_VV_M1_TU = 11769 CEFBS_HasVInstructions, // PseudoVWSUB_VV_M2 = 11770 CEFBS_HasVInstructions, // PseudoVWSUB_VV_M2_MASK = 11771 CEFBS_HasVInstructions, // PseudoVWSUB_VV_M2_TU = 11772 CEFBS_HasVInstructions, // PseudoVWSUB_VV_M4 = 11773 CEFBS_HasVInstructions, // PseudoVWSUB_VV_M4_MASK = 11774 CEFBS_HasVInstructions, // PseudoVWSUB_VV_M4_TU = 11775 CEFBS_HasVInstructions, // PseudoVWSUB_VV_MF2 = 11776 CEFBS_HasVInstructions, // PseudoVWSUB_VV_MF2_MASK = 11777 CEFBS_HasVInstructions, // PseudoVWSUB_VV_MF2_TU = 11778 CEFBS_HasVInstructions, // PseudoVWSUB_VV_MF4 = 11779 CEFBS_HasVInstructions, // PseudoVWSUB_VV_MF4_MASK = 11780 CEFBS_HasVInstructions, // PseudoVWSUB_VV_MF4_TU = 11781 CEFBS_HasVInstructions, // PseudoVWSUB_VV_MF8 = 11782 CEFBS_HasVInstructions, // PseudoVWSUB_VV_MF8_MASK = 11783 CEFBS_HasVInstructions, // PseudoVWSUB_VV_MF8_TU = 11784 CEFBS_HasVInstructions, // PseudoVWSUB_VX_M1 = 11785 CEFBS_HasVInstructions, // PseudoVWSUB_VX_M1_MASK = 11786 CEFBS_HasVInstructions, // PseudoVWSUB_VX_M1_TU = 11787 CEFBS_HasVInstructions, // PseudoVWSUB_VX_M2 = 11788 CEFBS_HasVInstructions, // PseudoVWSUB_VX_M2_MASK = 11789 CEFBS_HasVInstructions, // PseudoVWSUB_VX_M2_TU = 11790 CEFBS_HasVInstructions, // PseudoVWSUB_VX_M4 = 11791 CEFBS_HasVInstructions, // PseudoVWSUB_VX_M4_MASK = 11792 CEFBS_HasVInstructions, // PseudoVWSUB_VX_M4_TU = 11793 CEFBS_HasVInstructions, // PseudoVWSUB_VX_MF2 = 11794 CEFBS_HasVInstructions, // PseudoVWSUB_VX_MF2_MASK = 11795 CEFBS_HasVInstructions, // PseudoVWSUB_VX_MF2_TU = 11796 CEFBS_HasVInstructions, // PseudoVWSUB_VX_MF4 = 11797 CEFBS_HasVInstructions, // PseudoVWSUB_VX_MF4_MASK = 11798 CEFBS_HasVInstructions, // PseudoVWSUB_VX_MF4_TU = 11799 CEFBS_HasVInstructions, // PseudoVWSUB_VX_MF8 = 11800 CEFBS_HasVInstructions, // PseudoVWSUB_VX_MF8_MASK = 11801 CEFBS_HasVInstructions, // PseudoVWSUB_VX_MF8_TU = 11802 CEFBS_HasVInstructions, // PseudoVWSUB_WV_M1 = 11803 CEFBS_HasVInstructions, // PseudoVWSUB_WV_M1_MASK = 11804 CEFBS_HasVInstructions, // PseudoVWSUB_WV_M1_MASK_TIED = 11805 CEFBS_HasVInstructions, // PseudoVWSUB_WV_M1_TIED = 11806 CEFBS_HasVInstructions, // PseudoVWSUB_WV_M1_TU = 11807 CEFBS_HasVInstructions, // PseudoVWSUB_WV_M2 = 11808 CEFBS_HasVInstructions, // PseudoVWSUB_WV_M2_MASK = 11809 CEFBS_HasVInstructions, // PseudoVWSUB_WV_M2_MASK_TIED = 11810 CEFBS_HasVInstructions, // PseudoVWSUB_WV_M2_TIED = 11811 CEFBS_HasVInstructions, // PseudoVWSUB_WV_M2_TU = 11812 CEFBS_HasVInstructions, // PseudoVWSUB_WV_M4 = 11813 CEFBS_HasVInstructions, // PseudoVWSUB_WV_M4_MASK = 11814 CEFBS_HasVInstructions, // PseudoVWSUB_WV_M4_MASK_TIED = 11815 CEFBS_HasVInstructions, // PseudoVWSUB_WV_M4_TIED = 11816 CEFBS_HasVInstructions, // PseudoVWSUB_WV_M4_TU = 11817 CEFBS_HasVInstructions, // PseudoVWSUB_WV_MF2 = 11818 CEFBS_HasVInstructions, // PseudoVWSUB_WV_MF2_MASK = 11819 CEFBS_HasVInstructions, // PseudoVWSUB_WV_MF2_MASK_TIED = 11820 CEFBS_HasVInstructions, // PseudoVWSUB_WV_MF2_TIED = 11821 CEFBS_HasVInstructions, // PseudoVWSUB_WV_MF2_TU = 11822 CEFBS_HasVInstructions, // PseudoVWSUB_WV_MF4 = 11823 CEFBS_HasVInstructions, // PseudoVWSUB_WV_MF4_MASK = 11824 CEFBS_HasVInstructions, // PseudoVWSUB_WV_MF4_MASK_TIED = 11825 CEFBS_HasVInstructions, // PseudoVWSUB_WV_MF4_TIED = 11826 CEFBS_HasVInstructions, // PseudoVWSUB_WV_MF4_TU = 11827 CEFBS_HasVInstructions, // PseudoVWSUB_WV_MF8 = 11828 CEFBS_HasVInstructions, // PseudoVWSUB_WV_MF8_MASK = 11829 CEFBS_HasVInstructions, // PseudoVWSUB_WV_MF8_MASK_TIED = 11830 CEFBS_HasVInstructions, // PseudoVWSUB_WV_MF8_TIED = 11831 CEFBS_HasVInstructions, // PseudoVWSUB_WV_MF8_TU = 11832 CEFBS_HasVInstructions, // PseudoVWSUB_WX_M1 = 11833 CEFBS_HasVInstructions, // PseudoVWSUB_WX_M1_MASK = 11834 CEFBS_HasVInstructions, // PseudoVWSUB_WX_M1_TU = 11835 CEFBS_HasVInstructions, // PseudoVWSUB_WX_M2 = 11836 CEFBS_HasVInstructions, // PseudoVWSUB_WX_M2_MASK = 11837 CEFBS_HasVInstructions, // PseudoVWSUB_WX_M2_TU = 11838 CEFBS_HasVInstructions, // PseudoVWSUB_WX_M4 = 11839 CEFBS_HasVInstructions, // PseudoVWSUB_WX_M4_MASK = 11840 CEFBS_HasVInstructions, // PseudoVWSUB_WX_M4_TU = 11841 CEFBS_HasVInstructions, // PseudoVWSUB_WX_MF2 = 11842 CEFBS_HasVInstructions, // PseudoVWSUB_WX_MF2_MASK = 11843 CEFBS_HasVInstructions, // PseudoVWSUB_WX_MF2_TU = 11844 CEFBS_HasVInstructions, // PseudoVWSUB_WX_MF4 = 11845 CEFBS_HasVInstructions, // PseudoVWSUB_WX_MF4_MASK = 11846 CEFBS_HasVInstructions, // PseudoVWSUB_WX_MF4_TU = 11847 CEFBS_HasVInstructions, // PseudoVWSUB_WX_MF8 = 11848 CEFBS_HasVInstructions, // PseudoVWSUB_WX_MF8_MASK = 11849 CEFBS_HasVInstructions, // PseudoVWSUB_WX_MF8_TU = 11850 CEFBS_HasVInstructions, // PseudoVXOR_VI_M1 = 11851 CEFBS_HasVInstructions, // PseudoVXOR_VI_M1_MASK = 11852 CEFBS_HasVInstructions, // PseudoVXOR_VI_M1_TU = 11853 CEFBS_HasVInstructions, // PseudoVXOR_VI_M2 = 11854 CEFBS_HasVInstructions, // PseudoVXOR_VI_M2_MASK = 11855 CEFBS_HasVInstructions, // PseudoVXOR_VI_M2_TU = 11856 CEFBS_HasVInstructions, // PseudoVXOR_VI_M4 = 11857 CEFBS_HasVInstructions, // PseudoVXOR_VI_M4_MASK = 11858 CEFBS_HasVInstructions, // PseudoVXOR_VI_M4_TU = 11859 CEFBS_HasVInstructions, // PseudoVXOR_VI_M8 = 11860 CEFBS_HasVInstructions, // PseudoVXOR_VI_M8_MASK = 11861 CEFBS_HasVInstructions, // PseudoVXOR_VI_M8_TU = 11862 CEFBS_HasVInstructions, // PseudoVXOR_VI_MF2 = 11863 CEFBS_HasVInstructions, // PseudoVXOR_VI_MF2_MASK = 11864 CEFBS_HasVInstructions, // PseudoVXOR_VI_MF2_TU = 11865 CEFBS_HasVInstructions, // PseudoVXOR_VI_MF4 = 11866 CEFBS_HasVInstructions, // PseudoVXOR_VI_MF4_MASK = 11867 CEFBS_HasVInstructions, // PseudoVXOR_VI_MF4_TU = 11868 CEFBS_HasVInstructions, // PseudoVXOR_VI_MF8 = 11869 CEFBS_HasVInstructions, // PseudoVXOR_VI_MF8_MASK = 11870 CEFBS_HasVInstructions, // PseudoVXOR_VI_MF8_TU = 11871 CEFBS_HasVInstructions, // PseudoVXOR_VV_M1 = 11872 CEFBS_HasVInstructions, // PseudoVXOR_VV_M1_MASK = 11873 CEFBS_HasVInstructions, // PseudoVXOR_VV_M1_TU = 11874 CEFBS_HasVInstructions, // PseudoVXOR_VV_M2 = 11875 CEFBS_HasVInstructions, // PseudoVXOR_VV_M2_MASK = 11876 CEFBS_HasVInstructions, // PseudoVXOR_VV_M2_TU = 11877 CEFBS_HasVInstructions, // PseudoVXOR_VV_M4 = 11878 CEFBS_HasVInstructions, // PseudoVXOR_VV_M4_MASK = 11879 CEFBS_HasVInstructions, // PseudoVXOR_VV_M4_TU = 11880 CEFBS_HasVInstructions, // PseudoVXOR_VV_M8 = 11881 CEFBS_HasVInstructions, // PseudoVXOR_VV_M8_MASK = 11882 CEFBS_HasVInstructions, // PseudoVXOR_VV_M8_TU = 11883 CEFBS_HasVInstructions, // PseudoVXOR_VV_MF2 = 11884 CEFBS_HasVInstructions, // PseudoVXOR_VV_MF2_MASK = 11885 CEFBS_HasVInstructions, // PseudoVXOR_VV_MF2_TU = 11886 CEFBS_HasVInstructions, // PseudoVXOR_VV_MF4 = 11887 CEFBS_HasVInstructions, // PseudoVXOR_VV_MF4_MASK = 11888 CEFBS_HasVInstructions, // PseudoVXOR_VV_MF4_TU = 11889 CEFBS_HasVInstructions, // PseudoVXOR_VV_MF8 = 11890 CEFBS_HasVInstructions, // PseudoVXOR_VV_MF8_MASK = 11891 CEFBS_HasVInstructions, // PseudoVXOR_VV_MF8_TU = 11892 CEFBS_HasVInstructions, // PseudoVXOR_VX_M1 = 11893 CEFBS_HasVInstructions, // PseudoVXOR_VX_M1_MASK = 11894 CEFBS_HasVInstructions, // PseudoVXOR_VX_M1_TU = 11895 CEFBS_HasVInstructions, // PseudoVXOR_VX_M2 = 11896 CEFBS_HasVInstructions, // PseudoVXOR_VX_M2_MASK = 11897 CEFBS_HasVInstructions, // PseudoVXOR_VX_M2_TU = 11898 CEFBS_HasVInstructions, // PseudoVXOR_VX_M4 = 11899 CEFBS_HasVInstructions, // PseudoVXOR_VX_M4_MASK = 11900 CEFBS_HasVInstructions, // PseudoVXOR_VX_M4_TU = 11901 CEFBS_HasVInstructions, // PseudoVXOR_VX_M8 = 11902 CEFBS_HasVInstructions, // PseudoVXOR_VX_M8_MASK = 11903 CEFBS_HasVInstructions, // PseudoVXOR_VX_M8_TU = 11904 CEFBS_HasVInstructions, // PseudoVXOR_VX_MF2 = 11905 CEFBS_HasVInstructions, // PseudoVXOR_VX_MF2_MASK = 11906 CEFBS_HasVInstructions, // PseudoVXOR_VX_MF2_TU = 11907 CEFBS_HasVInstructions, // PseudoVXOR_VX_MF4 = 11908 CEFBS_HasVInstructions, // PseudoVXOR_VX_MF4_MASK = 11909 CEFBS_HasVInstructions, // PseudoVXOR_VX_MF4_TU = 11910 CEFBS_HasVInstructions, // PseudoVXOR_VX_MF8 = 11911 CEFBS_HasVInstructions, // PseudoVXOR_VX_MF8_MASK = 11912 CEFBS_HasVInstructions, // PseudoVXOR_VX_MF8_TU = 11913 CEFBS_HasVInstructions, // PseudoVZEXT_VF2_M1 = 11914 CEFBS_HasVInstructions, // PseudoVZEXT_VF2_M1_MASK = 11915 CEFBS_HasVInstructions, // PseudoVZEXT_VF2_M1_TU = 11916 CEFBS_HasVInstructions, // PseudoVZEXT_VF2_M2 = 11917 CEFBS_HasVInstructions, // PseudoVZEXT_VF2_M2_MASK = 11918 CEFBS_HasVInstructions, // PseudoVZEXT_VF2_M2_TU = 11919 CEFBS_HasVInstructions, // PseudoVZEXT_VF2_M4 = 11920 CEFBS_HasVInstructions, // PseudoVZEXT_VF2_M4_MASK = 11921 CEFBS_HasVInstructions, // PseudoVZEXT_VF2_M4_TU = 11922 CEFBS_HasVInstructions, // PseudoVZEXT_VF2_M8 = 11923 CEFBS_HasVInstructions, // PseudoVZEXT_VF2_M8_MASK = 11924 CEFBS_HasVInstructions, // PseudoVZEXT_VF2_M8_TU = 11925 CEFBS_HasVInstructions, // PseudoVZEXT_VF2_MF2 = 11926 CEFBS_HasVInstructions, // PseudoVZEXT_VF2_MF2_MASK = 11927 CEFBS_HasVInstructions, // PseudoVZEXT_VF2_MF2_TU = 11928 CEFBS_HasVInstructions, // PseudoVZEXT_VF2_MF4 = 11929 CEFBS_HasVInstructions, // PseudoVZEXT_VF2_MF4_MASK = 11930 CEFBS_HasVInstructions, // PseudoVZEXT_VF2_MF4_TU = 11931 CEFBS_HasVInstructions, // PseudoVZEXT_VF4_M1 = 11932 CEFBS_HasVInstructions, // PseudoVZEXT_VF4_M1_MASK = 11933 CEFBS_HasVInstructions, // PseudoVZEXT_VF4_M1_TU = 11934 CEFBS_HasVInstructions, // PseudoVZEXT_VF4_M2 = 11935 CEFBS_HasVInstructions, // PseudoVZEXT_VF4_M2_MASK = 11936 CEFBS_HasVInstructions, // PseudoVZEXT_VF4_M2_TU = 11937 CEFBS_HasVInstructions, // PseudoVZEXT_VF4_M4 = 11938 CEFBS_HasVInstructions, // PseudoVZEXT_VF4_M4_MASK = 11939 CEFBS_HasVInstructions, // PseudoVZEXT_VF4_M4_TU = 11940 CEFBS_HasVInstructions, // PseudoVZEXT_VF4_M8 = 11941 CEFBS_HasVInstructions, // PseudoVZEXT_VF4_M8_MASK = 11942 CEFBS_HasVInstructions, // PseudoVZEXT_VF4_M8_TU = 11943 CEFBS_HasVInstructions, // PseudoVZEXT_VF4_MF2 = 11944 CEFBS_HasVInstructions, // PseudoVZEXT_VF4_MF2_MASK = 11945 CEFBS_HasVInstructions, // PseudoVZEXT_VF4_MF2_TU = 11946 CEFBS_HasVInstructions, // PseudoVZEXT_VF8_M1 = 11947 CEFBS_HasVInstructions, // PseudoVZEXT_VF8_M1_MASK = 11948 CEFBS_HasVInstructions, // PseudoVZEXT_VF8_M1_TU = 11949 CEFBS_HasVInstructions, // PseudoVZEXT_VF8_M2 = 11950 CEFBS_HasVInstructions, // PseudoVZEXT_VF8_M2_MASK = 11951 CEFBS_HasVInstructions, // PseudoVZEXT_VF8_M2_TU = 11952 CEFBS_HasVInstructions, // PseudoVZEXT_VF8_M4 = 11953 CEFBS_HasVInstructions, // PseudoVZEXT_VF8_M4_MASK = 11954 CEFBS_HasVInstructions, // PseudoVZEXT_VF8_M4_TU = 11955 CEFBS_HasVInstructions, // PseudoVZEXT_VF8_M8 = 11956 CEFBS_HasVInstructions, // PseudoVZEXT_VF8_M8_MASK = 11957 CEFBS_HasVInstructions, // PseudoVZEXT_VF8_M8_TU = 11958 CEFBS_None, // PseudoZEXT_H = 11959 CEFBS_IsRV64, // PseudoZEXT_W = 11960 CEFBS_IsRV32, // ReadCycleWide = 11961 CEFBS_None, // ReadFFLAGS = 11962 CEFBS_None, // ReadFRM = 11963 CEFBS_HasStdExtZfh, // Select_FPR16_Using_CC_GPR = 11964 CEFBS_HasStdExtF, // Select_FPR32_Using_CC_GPR = 11965 CEFBS_HasStdExtD, // Select_FPR64_Using_CC_GPR = 11966 CEFBS_None, // Select_GPR_Using_CC_GPR = 11967 CEFBS_HasStdExtD, // SplitF64Pseudo = 11968 CEFBS_None, // SwapFRMImm = 11969 CEFBS_None, // WriteFFLAGS = 11970 CEFBS_None, // WriteFRM = 11971 CEFBS_None, // WriteFRMImm = 11972 CEFBS_None, // ADD = 11973 CEFBS_None, // ADDI = 11974 CEFBS_IsRV64, // ADDIW = 11975 CEFBS_IsRV64, // ADDW = 11976 CEFBS_HasStdExtZba_IsRV64, // ADD_UW = 11977 CEFBS_HasStdExtZknd_IsRV32, // AES32DSI = 11978 CEFBS_HasStdExtZknd_IsRV32, // AES32DSMI = 11979 CEFBS_HasStdExtZkne_IsRV32, // AES32ESI = 11980 CEFBS_HasStdExtZkne_IsRV32, // AES32ESMI = 11981 CEFBS_HasStdExtZknd_IsRV64, // AES64DS = 11982 CEFBS_HasStdExtZknd_IsRV64, // AES64DSM = 11983 CEFBS_HasStdExtZkne_IsRV64, // AES64ES = 11984 CEFBS_HasStdExtZkne_IsRV64, // AES64ESM = 11985 CEFBS_HasStdExtZknd_IsRV64, // AES64IM = 11986 CEFBS_HasStdExtZkndOrZkne_IsRV64, // AES64KS1I = 11987 CEFBS_HasStdExtZkndOrZkne_IsRV64, // AES64KS2 = 11988 CEFBS_HasStdExtA_IsRV64, // AMOADD_D = 11989 CEFBS_HasStdExtA_IsRV64, // AMOADD_D_AQ = 11990 CEFBS_HasStdExtA_IsRV64, // AMOADD_D_AQ_RL = 11991 CEFBS_HasStdExtA_IsRV64, // AMOADD_D_RL = 11992 CEFBS_HasStdExtA, // AMOADD_W = 11993 CEFBS_HasStdExtA, // AMOADD_W_AQ = 11994 CEFBS_HasStdExtA, // AMOADD_W_AQ_RL = 11995 CEFBS_HasStdExtA, // AMOADD_W_RL = 11996 CEFBS_HasStdExtA_IsRV64, // AMOAND_D = 11997 CEFBS_HasStdExtA_IsRV64, // AMOAND_D_AQ = 11998 CEFBS_HasStdExtA_IsRV64, // AMOAND_D_AQ_RL = 11999 CEFBS_HasStdExtA_IsRV64, // AMOAND_D_RL = 12000 CEFBS_HasStdExtA, // AMOAND_W = 12001 CEFBS_HasStdExtA, // AMOAND_W_AQ = 12002 CEFBS_HasStdExtA, // AMOAND_W_AQ_RL = 12003 CEFBS_HasStdExtA, // AMOAND_W_RL = 12004 CEFBS_HasStdExtA_IsRV64, // AMOMAXU_D = 12005 CEFBS_HasStdExtA_IsRV64, // AMOMAXU_D_AQ = 12006 CEFBS_HasStdExtA_IsRV64, // AMOMAXU_D_AQ_RL = 12007 CEFBS_HasStdExtA_IsRV64, // AMOMAXU_D_RL = 12008 CEFBS_HasStdExtA, // AMOMAXU_W = 12009 CEFBS_HasStdExtA, // AMOMAXU_W_AQ = 12010 CEFBS_HasStdExtA, // AMOMAXU_W_AQ_RL = 12011 CEFBS_HasStdExtA, // AMOMAXU_W_RL = 12012 CEFBS_HasStdExtA_IsRV64, // AMOMAX_D = 12013 CEFBS_HasStdExtA_IsRV64, // AMOMAX_D_AQ = 12014 CEFBS_HasStdExtA_IsRV64, // AMOMAX_D_AQ_RL = 12015 CEFBS_HasStdExtA_IsRV64, // AMOMAX_D_RL = 12016 CEFBS_HasStdExtA, // AMOMAX_W = 12017 CEFBS_HasStdExtA, // AMOMAX_W_AQ = 12018 CEFBS_HasStdExtA, // AMOMAX_W_AQ_RL = 12019 CEFBS_HasStdExtA, // AMOMAX_W_RL = 12020 CEFBS_HasStdExtA_IsRV64, // AMOMINU_D = 12021 CEFBS_HasStdExtA_IsRV64, // AMOMINU_D_AQ = 12022 CEFBS_HasStdExtA_IsRV64, // AMOMINU_D_AQ_RL = 12023 CEFBS_HasStdExtA_IsRV64, // AMOMINU_D_RL = 12024 CEFBS_HasStdExtA, // AMOMINU_W = 12025 CEFBS_HasStdExtA, // AMOMINU_W_AQ = 12026 CEFBS_HasStdExtA, // AMOMINU_W_AQ_RL = 12027 CEFBS_HasStdExtA, // AMOMINU_W_RL = 12028 CEFBS_HasStdExtA_IsRV64, // AMOMIN_D = 12029 CEFBS_HasStdExtA_IsRV64, // AMOMIN_D_AQ = 12030 CEFBS_HasStdExtA_IsRV64, // AMOMIN_D_AQ_RL = 12031 CEFBS_HasStdExtA_IsRV64, // AMOMIN_D_RL = 12032 CEFBS_HasStdExtA, // AMOMIN_W = 12033 CEFBS_HasStdExtA, // AMOMIN_W_AQ = 12034 CEFBS_HasStdExtA, // AMOMIN_W_AQ_RL = 12035 CEFBS_HasStdExtA, // AMOMIN_W_RL = 12036 CEFBS_HasStdExtA_IsRV64, // AMOOR_D = 12037 CEFBS_HasStdExtA_IsRV64, // AMOOR_D_AQ = 12038 CEFBS_HasStdExtA_IsRV64, // AMOOR_D_AQ_RL = 12039 CEFBS_HasStdExtA_IsRV64, // AMOOR_D_RL = 12040 CEFBS_HasStdExtA, // AMOOR_W = 12041 CEFBS_HasStdExtA, // AMOOR_W_AQ = 12042 CEFBS_HasStdExtA, // AMOOR_W_AQ_RL = 12043 CEFBS_HasStdExtA, // AMOOR_W_RL = 12044 CEFBS_HasStdExtA_IsRV64, // AMOSWAP_D = 12045 CEFBS_HasStdExtA_IsRV64, // AMOSWAP_D_AQ = 12046 CEFBS_HasStdExtA_IsRV64, // AMOSWAP_D_AQ_RL = 12047 CEFBS_HasStdExtA_IsRV64, // AMOSWAP_D_RL = 12048 CEFBS_HasStdExtA, // AMOSWAP_W = 12049 CEFBS_HasStdExtA, // AMOSWAP_W_AQ = 12050 CEFBS_HasStdExtA, // AMOSWAP_W_AQ_RL = 12051 CEFBS_HasStdExtA, // AMOSWAP_W_RL = 12052 CEFBS_HasStdExtA_IsRV64, // AMOXOR_D = 12053 CEFBS_HasStdExtA_IsRV64, // AMOXOR_D_AQ = 12054 CEFBS_HasStdExtA_IsRV64, // AMOXOR_D_AQ_RL = 12055 CEFBS_HasStdExtA_IsRV64, // AMOXOR_D_RL = 12056 CEFBS_HasStdExtA, // AMOXOR_W = 12057 CEFBS_HasStdExtA, // AMOXOR_W_AQ = 12058 CEFBS_HasStdExtA, // AMOXOR_W_AQ_RL = 12059 CEFBS_HasStdExtA, // AMOXOR_W_RL = 12060 CEFBS_None, // AND = 12061 CEFBS_None, // ANDI = 12062 CEFBS_HasStdExtZbbOrZbkb, // ANDN = 12063 CEFBS_None, // AUIPC = 12064 CEFBS_HasStdExtZbs, // BCLR = 12065 CEFBS_HasStdExtZbs, // BCLRI = 12066 CEFBS_None, // BEQ = 12067 CEFBS_HasStdExtZbs, // BEXT = 12068 CEFBS_HasStdExtZbs, // BEXTI = 12069 CEFBS_None, // BGE = 12070 CEFBS_None, // BGEU = 12071 CEFBS_HasStdExtZbs, // BINV = 12072 CEFBS_HasStdExtZbs, // BINVI = 12073 CEFBS_None, // BLT = 12074 CEFBS_None, // BLTU = 12075 CEFBS_None, // BNE = 12076 CEFBS_HasStdExtZbkb, // BREV8 = 12077 CEFBS_HasStdExtZbs, // BSET = 12078 CEFBS_HasStdExtZbs, // BSETI = 12079 CEFBS_HasStdExtZicbom, // CBO_CLEAN = 12080 CEFBS_HasStdExtZicbom, // CBO_FLUSH = 12081 CEFBS_HasStdExtZicbom, // CBO_INVAL = 12082 CEFBS_HasStdExtZicboz, // CBO_ZERO = 12083 CEFBS_HasStdExtZbcOrZbkc, // CLMUL = 12084 CEFBS_HasStdExtZbcOrZbkc, // CLMULH = 12085 CEFBS_HasStdExtZbc, // CLMULR = 12086 CEFBS_HasStdExtZbb, // CLZ = 12087 CEFBS_HasStdExtZbb_IsRV64, // CLZW = 12088 CEFBS_HasStdExtZbb, // CPOP = 12089 CEFBS_HasStdExtZbb_IsRV64, // CPOPW = 12090 CEFBS_None, // CSRRC = 12091 CEFBS_None, // CSRRCI = 12092 CEFBS_None, // CSRRS = 12093 CEFBS_None, // CSRRSI = 12094 CEFBS_None, // CSRRW = 12095 CEFBS_None, // CSRRWI = 12096 CEFBS_HasStdExtZbb, // CTZ = 12097 CEFBS_HasStdExtZbb_IsRV64, // CTZW = 12098 CEFBS_HasStdExtCOrZca, // C_ADD = 12099 CEFBS_HasStdExtCOrZca, // C_ADDI = 12100 CEFBS_HasStdExtCOrZca, // C_ADDI16SP = 12101 CEFBS_HasStdExtCOrZca, // C_ADDI4SPN = 12102 CEFBS_HasStdExtCOrZca_IsRV64, // C_ADDIW = 12103 CEFBS_HasStdExtCOrZca_HasRVCHints, // C_ADDI_HINT_IMM_ZERO = 12104 CEFBS_HasStdExtCOrZca_HasRVCHints, // C_ADDI_HINT_X0 = 12105 CEFBS_HasStdExtCOrZca, // C_ADDI_NOP = 12106 CEFBS_HasStdExtCOrZca_IsRV64, // C_ADDW = 12107 CEFBS_HasStdExtCOrZca_HasRVCHints, // C_ADD_HINT = 12108 CEFBS_HasStdExtCOrZca, // C_AND = 12109 CEFBS_HasStdExtCOrZca, // C_ANDI = 12110 CEFBS_HasStdExtCOrZca, // C_BEQZ = 12111 CEFBS_HasStdExtCOrZca, // C_BNEZ = 12112 CEFBS_HasStdExtCOrZca, // C_EBREAK = 12113 CEFBS_HasStdExtCOrZcd_HasStdExtD, // C_FLD = 12114 CEFBS_HasStdExtCOrZcd_HasStdExtD, // C_FLDSP = 12115 CEFBS_HasStdExtCOrZcf_HasStdExtF_IsRV32, // C_FLW = 12116 CEFBS_HasStdExtCOrZcf_HasStdExtF_IsRV32, // C_FLWSP = 12117 CEFBS_HasStdExtCOrZcd_HasStdExtD, // C_FSD = 12118 CEFBS_HasStdExtCOrZcd_HasStdExtD, // C_FSDSP = 12119 CEFBS_HasStdExtCOrZcf_HasStdExtF_IsRV32, // C_FSW = 12120 CEFBS_HasStdExtCOrZcf_HasStdExtF_IsRV32, // C_FSWSP = 12121 CEFBS_HasStdExtCOrZca, // C_J = 12122 CEFBS_HasStdExtCOrZca_IsRV32, // C_JAL = 12123 CEFBS_HasStdExtCOrZca, // C_JALR = 12124 CEFBS_HasStdExtCOrZca, // C_JR = 12125 CEFBS_HasStdExtCOrZca_IsRV64, // C_LD = 12126 CEFBS_HasStdExtCOrZca_IsRV64, // C_LDSP = 12127 CEFBS_HasStdExtCOrZca, // C_LI = 12128 CEFBS_HasStdExtCOrZca_HasRVCHints, // C_LI_HINT = 12129 CEFBS_HasStdExtCOrZca, // C_LUI = 12130 CEFBS_HasStdExtCOrZca_HasRVCHints, // C_LUI_HINT = 12131 CEFBS_HasStdExtCOrZca, // C_LW = 12132 CEFBS_HasStdExtCOrZca, // C_LWSP = 12133 CEFBS_HasStdExtCOrZca, // C_MV = 12134 CEFBS_HasStdExtCOrZca_HasRVCHints, // C_MV_HINT = 12135 CEFBS_HasStdExtCOrZca, // C_NOP = 12136 CEFBS_HasStdExtCOrZca_HasRVCHints, // C_NOP_HINT = 12137 CEFBS_HasStdExtCOrZca, // C_OR = 12138 CEFBS_HasStdExtCOrZca_IsRV64, // C_SD = 12139 CEFBS_HasStdExtCOrZca_IsRV64, // C_SDSP = 12140 CEFBS_HasStdExtCOrZca, // C_SLLI = 12141 CEFBS_HasStdExtCOrZca_HasRVCHints, // C_SLLI64_HINT = 12142 CEFBS_HasStdExtCOrZca_HasRVCHints, // C_SLLI_HINT = 12143 CEFBS_HasStdExtCOrZca, // C_SRAI = 12144 CEFBS_HasStdExtCOrZca_HasRVCHints, // C_SRAI64_HINT = 12145 CEFBS_HasStdExtCOrZca, // C_SRLI = 12146 CEFBS_HasStdExtCOrZca_HasRVCHints, // C_SRLI64_HINT = 12147 CEFBS_HasStdExtCOrZca, // C_SUB = 12148 CEFBS_HasStdExtCOrZca_IsRV64, // C_SUBW = 12149 CEFBS_HasStdExtCOrZca, // C_SW = 12150 CEFBS_HasStdExtCOrZca, // C_SWSP = 12151 CEFBS_HasStdExtCOrZca, // C_UNIMP = 12152 CEFBS_HasStdExtCOrZca, // C_XOR = 12153 CEFBS_HasStdExtM, // DIV = 12154 CEFBS_HasStdExtM, // DIVU = 12155 CEFBS_HasStdExtM_IsRV64, // DIVUW = 12156 CEFBS_HasStdExtM_IsRV64, // DIVW = 12157 CEFBS_None, // DRET = 12158 CEFBS_None, // EBREAK = 12159 CEFBS_None, // ECALL = 12160 CEFBS_HasStdExtD, // FADD_D = 12161 CEFBS_HasStdExtZdinx_IsRV32, // FADD_D_IN32X = 12162 CEFBS_HasStdExtZdinx_IsRV64, // FADD_D_INX = 12163 CEFBS_HasStdExtZfh, // FADD_H = 12164 CEFBS_HasStdExtZhinx, // FADD_H_INX = 12165 CEFBS_HasStdExtF, // FADD_S = 12166 CEFBS_HasStdExtZfinx, // FADD_S_INX = 12167 CEFBS_HasStdExtD, // FCLASS_D = 12168 CEFBS_HasStdExtZdinx_IsRV32, // FCLASS_D_IN32X = 12169 CEFBS_HasStdExtZdinx_IsRV64, // FCLASS_D_INX = 12170 CEFBS_HasStdExtZfh, // FCLASS_H = 12171 CEFBS_HasStdExtZhinx, // FCLASS_H_INX = 12172 CEFBS_HasStdExtF, // FCLASS_S = 12173 CEFBS_HasStdExtZfinx, // FCLASS_S_INX = 12174 CEFBS_HasStdExtZfhOrZfhmin_HasStdExtD, // FCVT_D_H = 12175 CEFBS_HasStdExtZhinxOrZhinxmin_HasStdExtZdinx, // FCVT_D_H_INX = 12176 CEFBS_HasStdExtD_IsRV64, // FCVT_D_L = 12177 CEFBS_HasStdExtD_IsRV64, // FCVT_D_LU = 12178 CEFBS_HasStdExtZdinx_IsRV64, // FCVT_D_LU_INX = 12179 CEFBS_HasStdExtZdinx_IsRV64, // FCVT_D_L_INX = 12180 CEFBS_HasStdExtD, // FCVT_D_S = 12181 CEFBS_HasStdExtZdinx_IsRV32, // FCVT_D_S_IN32X = 12182 CEFBS_HasStdExtZdinx_IsRV64, // FCVT_D_S_INX = 12183 CEFBS_HasStdExtD, // FCVT_D_W = 12184 CEFBS_HasStdExtD, // FCVT_D_WU = 12185 CEFBS_HasStdExtZdinx_IsRV32, // FCVT_D_WU_IN32X = 12186 CEFBS_HasStdExtZdinx_IsRV64, // FCVT_D_WU_INX = 12187 CEFBS_HasStdExtZdinx_IsRV32, // FCVT_D_W_IN32X = 12188 CEFBS_HasStdExtZdinx_IsRV64, // FCVT_D_W_INX = 12189 CEFBS_HasStdExtZfhOrZfhmin_HasStdExtD, // FCVT_H_D = 12190 CEFBS_HasStdExtZhinxOrZhinxmin_HasStdExtZdinx, // FCVT_H_D_INX = 12191 CEFBS_HasStdExtZfh_IsRV64, // FCVT_H_L = 12192 CEFBS_HasStdExtZfh_IsRV64, // FCVT_H_LU = 12193 CEFBS_HasStdExtZhinx_IsRV64, // FCVT_H_LU_INX = 12194 CEFBS_HasStdExtZhinx_IsRV64, // FCVT_H_L_INX = 12195 CEFBS_HasStdExtZfhOrZfhmin, // FCVT_H_S = 12196 CEFBS_HasStdExtZhinxOrZhinxmin, // FCVT_H_S_INX = 12197 CEFBS_HasStdExtZfh, // FCVT_H_W = 12198 CEFBS_HasStdExtZfh, // FCVT_H_WU = 12199 CEFBS_HasStdExtZhinx, // FCVT_H_WU_INX = 12200 CEFBS_HasStdExtZhinx, // FCVT_H_W_INX = 12201 CEFBS_HasStdExtD_IsRV64, // FCVT_LU_D = 12202 CEFBS_HasStdExtZdinx_IsRV64, // FCVT_LU_D_INX = 12203 CEFBS_HasStdExtZfh_IsRV64, // FCVT_LU_H = 12204 CEFBS_HasStdExtZhinx_IsRV64, // FCVT_LU_H_INX = 12205 CEFBS_HasStdExtF_IsRV64, // FCVT_LU_S = 12206 CEFBS_HasStdExtZfinx_IsRV64, // FCVT_LU_S_INX = 12207 CEFBS_HasStdExtD_IsRV64, // FCVT_L_D = 12208 CEFBS_HasStdExtZdinx_IsRV64, // FCVT_L_D_INX = 12209 CEFBS_HasStdExtZfh_IsRV64, // FCVT_L_H = 12210 CEFBS_HasStdExtZhinx_IsRV64, // FCVT_L_H_INX = 12211 CEFBS_HasStdExtF_IsRV64, // FCVT_L_S = 12212 CEFBS_HasStdExtZfinx_IsRV64, // FCVT_L_S_INX = 12213 CEFBS_HasStdExtD, // FCVT_S_D = 12214 CEFBS_HasStdExtZdinx_IsRV32, // FCVT_S_D_IN32X = 12215 CEFBS_HasStdExtZdinx_IsRV64, // FCVT_S_D_INX = 12216 CEFBS_HasStdExtZfhOrZfhmin, // FCVT_S_H = 12217 CEFBS_HasStdExtZhinxOrZhinxmin, // FCVT_S_H_INX = 12218 CEFBS_HasStdExtF_IsRV64, // FCVT_S_L = 12219 CEFBS_HasStdExtF_IsRV64, // FCVT_S_LU = 12220 CEFBS_HasStdExtZfinx_IsRV64, // FCVT_S_LU_INX = 12221 CEFBS_HasStdExtZfinx_IsRV64, // FCVT_S_L_INX = 12222 CEFBS_HasStdExtF, // FCVT_S_W = 12223 CEFBS_HasStdExtF, // FCVT_S_WU = 12224 CEFBS_HasStdExtZfinx, // FCVT_S_WU_INX = 12225 CEFBS_HasStdExtZfinx, // FCVT_S_W_INX = 12226 CEFBS_HasStdExtD, // FCVT_WU_D = 12227 CEFBS_HasStdExtZdinx_IsRV32, // FCVT_WU_D_IN32X = 12228 CEFBS_HasStdExtZdinx_IsRV64, // FCVT_WU_D_INX = 12229 CEFBS_HasStdExtZfh, // FCVT_WU_H = 12230 CEFBS_HasStdExtZhinx, // FCVT_WU_H_INX = 12231 CEFBS_HasStdExtF, // FCVT_WU_S = 12232 CEFBS_HasStdExtZfinx, // FCVT_WU_S_INX = 12233 CEFBS_HasStdExtD, // FCVT_W_D = 12234 CEFBS_HasStdExtZdinx_IsRV32, // FCVT_W_D_IN32X = 12235 CEFBS_HasStdExtZdinx_IsRV64, // FCVT_W_D_INX = 12236 CEFBS_HasStdExtZfh, // FCVT_W_H = 12237 CEFBS_HasStdExtZhinx, // FCVT_W_H_INX = 12238 CEFBS_HasStdExtF, // FCVT_W_S = 12239 CEFBS_HasStdExtZfinx, // FCVT_W_S_INX = 12240 CEFBS_HasStdExtD, // FDIV_D = 12241 CEFBS_HasStdExtZdinx_IsRV32, // FDIV_D_IN32X = 12242 CEFBS_HasStdExtZdinx_IsRV64, // FDIV_D_INX = 12243 CEFBS_HasStdExtZfh, // FDIV_H = 12244 CEFBS_HasStdExtZhinx, // FDIV_H_INX = 12245 CEFBS_HasStdExtF, // FDIV_S = 12246 CEFBS_HasStdExtZfinx, // FDIV_S_INX = 12247 CEFBS_None, // FENCE = 12248 CEFBS_None, // FENCE_I = 12249 CEFBS_None, // FENCE_TSO = 12250 CEFBS_HasStdExtD, // FEQ_D = 12251 CEFBS_HasStdExtZdinx_IsRV32, // FEQ_D_IN32X = 12252 CEFBS_HasStdExtZdinx_IsRV64, // FEQ_D_INX = 12253 CEFBS_HasStdExtZfh, // FEQ_H = 12254 CEFBS_HasStdExtZhinx, // FEQ_H_INX = 12255 CEFBS_HasStdExtF, // FEQ_S = 12256 CEFBS_HasStdExtZfinx, // FEQ_S_INX = 12257 CEFBS_HasStdExtD, // FLD = 12258 CEFBS_HasStdExtD, // FLE_D = 12259 CEFBS_HasStdExtZdinx_IsRV32, // FLE_D_IN32X = 12260 CEFBS_HasStdExtZdinx_IsRV64, // FLE_D_INX = 12261 CEFBS_HasStdExtZfh, // FLE_H = 12262 CEFBS_HasStdExtZhinx, // FLE_H_INX = 12263 CEFBS_HasStdExtF, // FLE_S = 12264 CEFBS_HasStdExtZfinx, // FLE_S_INX = 12265 CEFBS_HasStdExtZfhOrZfhmin, // FLH = 12266 CEFBS_HasStdExtD, // FLT_D = 12267 CEFBS_HasStdExtZdinx_IsRV32, // FLT_D_IN32X = 12268 CEFBS_HasStdExtZdinx_IsRV64, // FLT_D_INX = 12269 CEFBS_HasStdExtZfh, // FLT_H = 12270 CEFBS_HasStdExtZhinx, // FLT_H_INX = 12271 CEFBS_HasStdExtF, // FLT_S = 12272 CEFBS_HasStdExtZfinx, // FLT_S_INX = 12273 CEFBS_HasStdExtF, // FLW = 12274 CEFBS_HasStdExtD, // FMADD_D = 12275 CEFBS_HasStdExtZdinx_IsRV32, // FMADD_D_IN32X = 12276 CEFBS_HasStdExtZdinx_IsRV64, // FMADD_D_INX = 12277 CEFBS_HasStdExtZfh, // FMADD_H = 12278 CEFBS_HasStdExtZhinx, // FMADD_H_INX = 12279 CEFBS_HasStdExtF, // FMADD_S = 12280 CEFBS_HasStdExtZfinx, // FMADD_S_INX = 12281 CEFBS_HasStdExtD, // FMAX_D = 12282 CEFBS_HasStdExtZdinx_IsRV32, // FMAX_D_IN32X = 12283 CEFBS_HasStdExtZdinx_IsRV64, // FMAX_D_INX = 12284 CEFBS_HasStdExtZfh, // FMAX_H = 12285 CEFBS_HasStdExtZhinx, // FMAX_H_INX = 12286 CEFBS_HasStdExtF, // FMAX_S = 12287 CEFBS_HasStdExtZfinx, // FMAX_S_INX = 12288 CEFBS_HasStdExtD, // FMIN_D = 12289 CEFBS_HasStdExtZdinx_IsRV32, // FMIN_D_IN32X = 12290 CEFBS_HasStdExtZdinx_IsRV64, // FMIN_D_INX = 12291 CEFBS_HasStdExtZfh, // FMIN_H = 12292 CEFBS_HasStdExtZhinx, // FMIN_H_INX = 12293 CEFBS_HasStdExtF, // FMIN_S = 12294 CEFBS_HasStdExtZfinx, // FMIN_S_INX = 12295 CEFBS_HasStdExtD, // FMSUB_D = 12296 CEFBS_HasStdExtZdinx_IsRV32, // FMSUB_D_IN32X = 12297 CEFBS_HasStdExtZdinx_IsRV64, // FMSUB_D_INX = 12298 CEFBS_HasStdExtZfh, // FMSUB_H = 12299 CEFBS_HasStdExtZhinx, // FMSUB_H_INX = 12300 CEFBS_HasStdExtF, // FMSUB_S = 12301 CEFBS_HasStdExtZfinx, // FMSUB_S_INX = 12302 CEFBS_HasStdExtD, // FMUL_D = 12303 CEFBS_HasStdExtZdinx_IsRV32, // FMUL_D_IN32X = 12304 CEFBS_HasStdExtZdinx_IsRV64, // FMUL_D_INX = 12305 CEFBS_HasStdExtZfh, // FMUL_H = 12306 CEFBS_HasStdExtZhinx, // FMUL_H_INX = 12307 CEFBS_HasStdExtF, // FMUL_S = 12308 CEFBS_HasStdExtZfinx, // FMUL_S_INX = 12309 CEFBS_HasStdExtD_IsRV64, // FMV_D_X = 12310 CEFBS_HasStdExtZfhOrZfhmin, // FMV_H_X = 12311 CEFBS_HasStdExtF, // FMV_W_X = 12312 CEFBS_HasStdExtD_IsRV64, // FMV_X_D = 12313 CEFBS_HasStdExtZfhOrZfhmin, // FMV_X_H = 12314 CEFBS_HasStdExtF, // FMV_X_W = 12315 CEFBS_HasStdExtD, // FNMADD_D = 12316 CEFBS_HasStdExtZdinx_IsRV32, // FNMADD_D_IN32X = 12317 CEFBS_HasStdExtZdinx_IsRV64, // FNMADD_D_INX = 12318 CEFBS_HasStdExtZfh, // FNMADD_H = 12319 CEFBS_HasStdExtZhinx, // FNMADD_H_INX = 12320 CEFBS_HasStdExtF, // FNMADD_S = 12321 CEFBS_HasStdExtZfinx, // FNMADD_S_INX = 12322 CEFBS_HasStdExtD, // FNMSUB_D = 12323 CEFBS_HasStdExtZdinx_IsRV32, // FNMSUB_D_IN32X = 12324 CEFBS_HasStdExtZdinx_IsRV64, // FNMSUB_D_INX = 12325 CEFBS_HasStdExtZfh, // FNMSUB_H = 12326 CEFBS_HasStdExtZhinx, // FNMSUB_H_INX = 12327 CEFBS_HasStdExtF, // FNMSUB_S = 12328 CEFBS_HasStdExtZfinx, // FNMSUB_S_INX = 12329 CEFBS_HasStdExtD, // FSD = 12330 CEFBS_HasStdExtD, // FSGNJN_D = 12331 CEFBS_HasStdExtZdinx_IsRV32, // FSGNJN_D_IN32X = 12332 CEFBS_HasStdExtZdinx_IsRV64, // FSGNJN_D_INX = 12333 CEFBS_HasStdExtZfh, // FSGNJN_H = 12334 CEFBS_HasStdExtZhinx, // FSGNJN_H_INX = 12335 CEFBS_HasStdExtF, // FSGNJN_S = 12336 CEFBS_HasStdExtZfinx, // FSGNJN_S_INX = 12337 CEFBS_HasStdExtD, // FSGNJX_D = 12338 CEFBS_HasStdExtZdinx_IsRV32, // FSGNJX_D_IN32X = 12339 CEFBS_HasStdExtZdinx_IsRV64, // FSGNJX_D_INX = 12340 CEFBS_HasStdExtZfh, // FSGNJX_H = 12341 CEFBS_HasStdExtZhinx, // FSGNJX_H_INX = 12342 CEFBS_HasStdExtF, // FSGNJX_S = 12343 CEFBS_HasStdExtZfinx, // FSGNJX_S_INX = 12344 CEFBS_HasStdExtD, // FSGNJ_D = 12345 CEFBS_HasStdExtZdinx_IsRV32, // FSGNJ_D_IN32X = 12346 CEFBS_HasStdExtZdinx_IsRV64, // FSGNJ_D_INX = 12347 CEFBS_HasStdExtZfh, // FSGNJ_H = 12348 CEFBS_HasStdExtZhinx, // FSGNJ_H_INX = 12349 CEFBS_HasStdExtF, // FSGNJ_S = 12350 CEFBS_HasStdExtZfinx, // FSGNJ_S_INX = 12351 CEFBS_HasStdExtZfhOrZfhmin, // FSH = 12352 CEFBS_HasStdExtD, // FSQRT_D = 12353 CEFBS_HasStdExtZdinx_IsRV32, // FSQRT_D_IN32X = 12354 CEFBS_HasStdExtZdinx_IsRV64, // FSQRT_D_INX = 12355 CEFBS_HasStdExtZfh, // FSQRT_H = 12356 CEFBS_HasStdExtZhinx, // FSQRT_H_INX = 12357 CEFBS_HasStdExtF, // FSQRT_S = 12358 CEFBS_HasStdExtZfinx, // FSQRT_S_INX = 12359 CEFBS_HasStdExtD, // FSUB_D = 12360 CEFBS_HasStdExtZdinx_IsRV32, // FSUB_D_IN32X = 12361 CEFBS_HasStdExtZdinx_IsRV64, // FSUB_D_INX = 12362 CEFBS_HasStdExtZfh, // FSUB_H = 12363 CEFBS_HasStdExtZhinx, // FSUB_H_INX = 12364 CEFBS_HasStdExtF, // FSUB_S = 12365 CEFBS_HasStdExtZfinx, // FSUB_S_INX = 12366 CEFBS_HasStdExtF, // FSW = 12367 CEFBS_HasStdExtH, // HFENCE_GVMA = 12368 CEFBS_HasStdExtH, // HFENCE_VVMA = 12369 CEFBS_HasStdExtSvinval, // HINVAL_GVMA = 12370 CEFBS_HasStdExtSvinval, // HINVAL_VVMA = 12371 CEFBS_HasStdExtH, // HLVX_HU = 12372 CEFBS_HasStdExtH, // HLVX_WU = 12373 CEFBS_HasStdExtH, // HLV_B = 12374 CEFBS_HasStdExtH, // HLV_BU = 12375 CEFBS_IsRV64_HasStdExtH, // HLV_D = 12376 CEFBS_HasStdExtH, // HLV_H = 12377 CEFBS_HasStdExtH, // HLV_HU = 12378 CEFBS_HasStdExtH, // HLV_W = 12379 CEFBS_IsRV64_HasStdExtH, // HLV_WU = 12380 CEFBS_HasStdExtH, // HSV_B = 12381 CEFBS_IsRV64_HasStdExtH, // HSV_D = 12382 CEFBS_HasStdExtH, // HSV_H = 12383 CEFBS_HasStdExtH, // HSV_W = 12384 CEFBS_None, // InsnB = 12385 CEFBS_None, // InsnI = 12386 CEFBS_None, // InsnI_Mem = 12387 CEFBS_None, // InsnJ = 12388 CEFBS_None, // InsnR = 12389 CEFBS_None, // InsnR4 = 12390 CEFBS_None, // InsnS = 12391 CEFBS_None, // InsnU = 12392 CEFBS_None, // JAL = 12393 CEFBS_None, // JALR = 12394 CEFBS_None, // LB = 12395 CEFBS_None, // LBU = 12396 CEFBS_IsRV64, // LD = 12397 CEFBS_None, // LH = 12398 CEFBS_None, // LHU = 12399 CEFBS_HasStdExtA_IsRV64, // LR_D = 12400 CEFBS_HasStdExtA_IsRV64, // LR_D_AQ = 12401 CEFBS_HasStdExtA_IsRV64, // LR_D_AQ_RL = 12402 CEFBS_HasStdExtA_IsRV64, // LR_D_RL = 12403 CEFBS_HasStdExtA, // LR_W = 12404 CEFBS_HasStdExtA, // LR_W_AQ = 12405 CEFBS_HasStdExtA, // LR_W_AQ_RL = 12406 CEFBS_HasStdExtA, // LR_W_RL = 12407 CEFBS_None, // LUI = 12408 CEFBS_None, // LW = 12409 CEFBS_IsRV64, // LWU = 12410 CEFBS_HasStdExtZbb, // MAX = 12411 CEFBS_HasStdExtZbb, // MAXU = 12412 CEFBS_HasStdExtZbb, // MIN = 12413 CEFBS_HasStdExtZbb, // MINU = 12414 CEFBS_None, // MRET = 12415 CEFBS_HasStdExtMOrZmmul, // MUL = 12416 CEFBS_HasStdExtMOrZmmul, // MULH = 12417 CEFBS_HasStdExtMOrZmmul, // MULHSU = 12418 CEFBS_HasStdExtMOrZmmul, // MULHU = 12419 CEFBS_HasStdExtMOrZmmul_IsRV64, // MULW = 12420 CEFBS_None, // OR = 12421 CEFBS_HasStdExtZbb, // ORC_B = 12422 CEFBS_None, // ORI = 12423 CEFBS_HasStdExtZbbOrZbkb, // ORN = 12424 CEFBS_HasStdExtZbkb, // PACK = 12425 CEFBS_HasStdExtZbkb, // PACKH = 12426 CEFBS_HasStdExtZbkb_IsRV64, // PACKW = 12427 CEFBS_HasStdExtZicbop, // PREFETCH_I = 12428 CEFBS_HasStdExtZicbop, // PREFETCH_R = 12429 CEFBS_HasStdExtZicbop, // PREFETCH_W = 12430 CEFBS_HasStdExtM, // REM = 12431 CEFBS_HasStdExtM, // REMU = 12432 CEFBS_HasStdExtM_IsRV64, // REMUW = 12433 CEFBS_HasStdExtM_IsRV64, // REMW = 12434 CEFBS_HasStdExtZbbOrZbkb_IsRV32, // REV8_RV32 = 12435 CEFBS_HasStdExtZbbOrZbkb_IsRV64, // REV8_RV64 = 12436 CEFBS_HasStdExtZbbOrZbkb, // ROL = 12437 CEFBS_HasStdExtZbbOrZbkb_IsRV64, // ROLW = 12438 CEFBS_HasStdExtZbbOrZbkb, // ROR = 12439 CEFBS_HasStdExtZbbOrZbkb, // RORI = 12440 CEFBS_HasStdExtZbbOrZbkb_IsRV64, // RORIW = 12441 CEFBS_HasStdExtZbbOrZbkb_IsRV64, // RORW = 12442 CEFBS_None, // SB = 12443 CEFBS_HasStdExtA_IsRV64, // SC_D = 12444 CEFBS_HasStdExtA_IsRV64, // SC_D_AQ = 12445 CEFBS_HasStdExtA_IsRV64, // SC_D_AQ_RL = 12446 CEFBS_HasStdExtA_IsRV64, // SC_D_RL = 12447 CEFBS_HasStdExtA, // SC_W = 12448 CEFBS_HasStdExtA, // SC_W_AQ = 12449 CEFBS_HasStdExtA, // SC_W_AQ_RL = 12450 CEFBS_HasStdExtA, // SC_W_RL = 12451 CEFBS_IsRV64, // SD = 12452 CEFBS_HasStdExtZbb, // SEXT_B = 12453 CEFBS_HasStdExtZbb, // SEXT_H = 12454 CEFBS_HasStdExtSvinval, // SFENCE_INVAL_IR = 12455 CEFBS_None, // SFENCE_VMA = 12456 CEFBS_HasStdExtSvinval, // SFENCE_W_INVAL = 12457 CEFBS_None, // SH = 12458 CEFBS_HasStdExtZba, // SH1ADD = 12459 CEFBS_HasStdExtZba_IsRV64, // SH1ADD_UW = 12460 CEFBS_HasStdExtZba, // SH2ADD = 12461 CEFBS_HasStdExtZba_IsRV64, // SH2ADD_UW = 12462 CEFBS_HasStdExtZba, // SH3ADD = 12463 CEFBS_HasStdExtZba_IsRV64, // SH3ADD_UW = 12464 CEFBS_HasStdExtZknh, // SHA256SIG0 = 12465 CEFBS_HasStdExtZknh, // SHA256SIG1 = 12466 CEFBS_HasStdExtZknh, // SHA256SUM0 = 12467 CEFBS_HasStdExtZknh, // SHA256SUM1 = 12468 CEFBS_HasStdExtZknh_IsRV64, // SHA512SIG0 = 12469 CEFBS_HasStdExtZknh_IsRV32, // SHA512SIG0H = 12470 CEFBS_HasStdExtZknh_IsRV32, // SHA512SIG0L = 12471 CEFBS_HasStdExtZknh_IsRV64, // SHA512SIG1 = 12472 CEFBS_HasStdExtZknh_IsRV32, // SHA512SIG1H = 12473 CEFBS_HasStdExtZknh_IsRV32, // SHA512SIG1L = 12474 CEFBS_HasStdExtZknh_IsRV64, // SHA512SUM0 = 12475 CEFBS_HasStdExtZknh_IsRV32, // SHA512SUM0R = 12476 CEFBS_HasStdExtZknh_IsRV64, // SHA512SUM1 = 12477 CEFBS_HasStdExtZknh_IsRV32, // SHA512SUM1R = 12478 CEFBS_HasStdExtSvinval, // SINVAL_VMA = 12479 CEFBS_None, // SLL = 12480 CEFBS_None, // SLLI = 12481 CEFBS_IsRV64, // SLLIW = 12482 CEFBS_HasStdExtZba_IsRV64, // SLLI_UW = 12483 CEFBS_IsRV64, // SLLW = 12484 CEFBS_None, // SLT = 12485 CEFBS_None, // SLTI = 12486 CEFBS_None, // SLTIU = 12487 CEFBS_None, // SLTU = 12488 CEFBS_HasStdExtZksh, // SM3P0 = 12489 CEFBS_HasStdExtZksh, // SM3P1 = 12490 CEFBS_HasStdExtZksed, // SM4ED = 12491 CEFBS_HasStdExtZksed, // SM4KS = 12492 CEFBS_None, // SRA = 12493 CEFBS_None, // SRAI = 12494 CEFBS_IsRV64, // SRAIW = 12495 CEFBS_IsRV64, // SRAW = 12496 CEFBS_None, // SRET = 12497 CEFBS_None, // SRL = 12498 CEFBS_None, // SRLI = 12499 CEFBS_IsRV64, // SRLIW = 12500 CEFBS_IsRV64, // SRLW = 12501 CEFBS_None, // SUB = 12502 CEFBS_IsRV64, // SUBW = 12503 CEFBS_None, // SW = 12504 CEFBS_HasVendorXTHeadVdot, // THVdotVMAQASU_VV = 12505 CEFBS_HasVendorXTHeadVdot, // THVdotVMAQASU_VX = 12506 CEFBS_HasVendorXTHeadVdot, // THVdotVMAQAUS_VX = 12507 CEFBS_HasVendorXTHeadVdot, // THVdotVMAQAU_VV = 12508 CEFBS_HasVendorXTHeadVdot, // THVdotVMAQAU_VX = 12509 CEFBS_HasVendorXTHeadVdot, // THVdotVMAQA_VV = 12510 CEFBS_HasVendorXTHeadVdot, // THVdotVMAQA_VX = 12511 CEFBS_None, // UNIMP = 12512 CEFBS_HasStdExtZbkb_IsRV32, // UNZIP_RV32 = 12513 CEFBS_None, // URET = 12514 CEFBS_HasVInstructions, // VAADDU_VV = 12515 CEFBS_HasVInstructions, // VAADDU_VX = 12516 CEFBS_HasVInstructions, // VAADD_VV = 12517 CEFBS_HasVInstructions, // VAADD_VX = 12518 CEFBS_HasVInstructions, // VADC_VIM = 12519 CEFBS_HasVInstructions, // VADC_VVM = 12520 CEFBS_HasVInstructions, // VADC_VXM = 12521 CEFBS_HasVInstructions, // VADD_VI = 12522 CEFBS_HasVInstructions, // VADD_VV = 12523 CEFBS_HasVInstructions, // VADD_VX = 12524 CEFBS_HasVInstructions, // VAND_VI = 12525 CEFBS_HasVInstructions, // VAND_VV = 12526 CEFBS_HasVInstructions, // VAND_VX = 12527 CEFBS_HasVInstructions, // VASUBU_VV = 12528 CEFBS_HasVInstructions, // VASUBU_VX = 12529 CEFBS_HasVInstructions, // VASUB_VV = 12530 CEFBS_HasVInstructions, // VASUB_VX = 12531 CEFBS_HasVInstructions, // VCOMPRESS_VM = 12532 CEFBS_HasVInstructions, // VCPOP_M = 12533 CEFBS_HasVInstructions, // VDIVU_VV = 12534 CEFBS_HasVInstructions, // VDIVU_VX = 12535 CEFBS_HasVInstructions, // VDIV_VV = 12536 CEFBS_HasVInstructions, // VDIV_VX = 12537 CEFBS_HasVInstructionsAnyF, // VFADD_VF = 12538 CEFBS_HasVInstructionsAnyF, // VFADD_VV = 12539 CEFBS_HasVInstructionsAnyF, // VFCLASS_V = 12540 CEFBS_HasVInstructionsAnyF, // VFCVT_F_XU_V = 12541 CEFBS_HasVInstructionsAnyF, // VFCVT_F_X_V = 12542 CEFBS_HasVInstructionsAnyF, // VFCVT_RTZ_XU_F_V = 12543 CEFBS_HasVInstructionsAnyF, // VFCVT_RTZ_X_F_V = 12544 CEFBS_HasVInstructionsAnyF, // VFCVT_XU_F_V = 12545 CEFBS_HasVInstructionsAnyF, // VFCVT_X_F_V = 12546 CEFBS_HasVInstructionsAnyF, // VFDIV_VF = 12547 CEFBS_HasVInstructionsAnyF, // VFDIV_VV = 12548 CEFBS_HasVInstructions, // VFIRST_M = 12549 CEFBS_HasVInstructionsAnyF, // VFMACC_VF = 12550 CEFBS_HasVInstructionsAnyF, // VFMACC_VV = 12551 CEFBS_HasVInstructionsAnyF, // VFMADD_VF = 12552 CEFBS_HasVInstructionsAnyF, // VFMADD_VV = 12553 CEFBS_HasVInstructionsAnyF, // VFMAX_VF = 12554 CEFBS_HasVInstructionsAnyF, // VFMAX_VV = 12555 CEFBS_HasVInstructionsAnyF, // VFMERGE_VFM = 12556 CEFBS_HasVInstructionsAnyF, // VFMIN_VF = 12557 CEFBS_HasVInstructionsAnyF, // VFMIN_VV = 12558 CEFBS_HasVInstructionsAnyF, // VFMSAC_VF = 12559 CEFBS_HasVInstructionsAnyF, // VFMSAC_VV = 12560 CEFBS_HasVInstructionsAnyF, // VFMSUB_VF = 12561 CEFBS_HasVInstructionsAnyF, // VFMSUB_VV = 12562 CEFBS_HasVInstructionsAnyF, // VFMUL_VF = 12563 CEFBS_HasVInstructionsAnyF, // VFMUL_VV = 12564 CEFBS_HasVInstructionsAnyF, // VFMV_F_S = 12565 CEFBS_HasVInstructionsAnyF, // VFMV_S_F = 12566 CEFBS_HasVInstructionsAnyF, // VFMV_V_F = 12567 CEFBS_HasVInstructionsAnyF, // VFNCVT_F_F_W = 12568 CEFBS_HasVInstructionsAnyF, // VFNCVT_F_XU_W = 12569 CEFBS_HasVInstructionsAnyF, // VFNCVT_F_X_W = 12570 CEFBS_HasVInstructionsAnyF, // VFNCVT_ROD_F_F_W = 12571 CEFBS_HasVInstructionsAnyF, // VFNCVT_RTZ_XU_F_W = 12572 CEFBS_HasVInstructionsAnyF, // VFNCVT_RTZ_X_F_W = 12573 CEFBS_HasVInstructionsAnyF, // VFNCVT_XU_F_W = 12574 CEFBS_HasVInstructionsAnyF, // VFNCVT_X_F_W = 12575 CEFBS_HasVInstructionsAnyF, // VFNMACC_VF = 12576 CEFBS_HasVInstructionsAnyF, // VFNMACC_VV = 12577 CEFBS_HasVInstructionsAnyF, // VFNMADD_VF = 12578 CEFBS_HasVInstructionsAnyF, // VFNMADD_VV = 12579 CEFBS_HasVInstructionsAnyF, // VFNMSAC_VF = 12580 CEFBS_HasVInstructionsAnyF, // VFNMSAC_VV = 12581 CEFBS_HasVInstructionsAnyF, // VFNMSUB_VF = 12582 CEFBS_HasVInstructionsAnyF, // VFNMSUB_VV = 12583 CEFBS_HasVInstructionsAnyF, // VFRDIV_VF = 12584 CEFBS_HasVInstructionsAnyF, // VFREC7_V = 12585 CEFBS_HasVInstructionsAnyF, // VFREDMAX_VS = 12586 CEFBS_HasVInstructionsAnyF, // VFREDMIN_VS = 12587 CEFBS_HasVInstructionsAnyF, // VFREDOSUM_VS = 12588 CEFBS_HasVInstructionsAnyF, // VFREDUSUM_VS = 12589 CEFBS_HasVInstructionsAnyF, // VFRSQRT7_V = 12590 CEFBS_HasVInstructionsAnyF, // VFRSUB_VF = 12591 CEFBS_HasVInstructionsAnyF, // VFSGNJN_VF = 12592 CEFBS_HasVInstructionsAnyF, // VFSGNJN_VV = 12593 CEFBS_HasVInstructionsAnyF, // VFSGNJX_VF = 12594 CEFBS_HasVInstructionsAnyF, // VFSGNJX_VV = 12595 CEFBS_HasVInstructionsAnyF, // VFSGNJ_VF = 12596 CEFBS_HasVInstructionsAnyF, // VFSGNJ_VV = 12597 CEFBS_HasVInstructionsAnyF, // VFSLIDE1DOWN_VF = 12598 CEFBS_HasVInstructionsAnyF, // VFSLIDE1UP_VF = 12599 CEFBS_HasVInstructionsAnyF, // VFSQRT_V = 12600 CEFBS_HasVInstructionsAnyF, // VFSUB_VF = 12601 CEFBS_HasVInstructionsAnyF, // VFSUB_VV = 12602 CEFBS_HasVInstructionsAnyF, // VFWADD_VF = 12603 CEFBS_HasVInstructionsAnyF, // VFWADD_VV = 12604 CEFBS_HasVInstructionsAnyF, // VFWADD_WF = 12605 CEFBS_HasVInstructionsAnyF, // VFWADD_WV = 12606 CEFBS_HasVInstructionsAnyF, // VFWCVT_F_F_V = 12607 CEFBS_HasVInstructionsAnyF, // VFWCVT_F_XU_V = 12608 CEFBS_HasVInstructionsAnyF, // VFWCVT_F_X_V = 12609 CEFBS_HasVInstructionsAnyF, // VFWCVT_RTZ_XU_F_V = 12610 CEFBS_HasVInstructionsAnyF, // VFWCVT_RTZ_X_F_V = 12611 CEFBS_HasVInstructionsAnyF, // VFWCVT_XU_F_V = 12612 CEFBS_HasVInstructionsAnyF, // VFWCVT_X_F_V = 12613 CEFBS_HasVInstructionsAnyF, // VFWMACC_VF = 12614 CEFBS_HasVInstructionsAnyF, // VFWMACC_VV = 12615 CEFBS_HasVInstructionsAnyF, // VFWMSAC_VF = 12616 CEFBS_HasVInstructionsAnyF, // VFWMSAC_VV = 12617 CEFBS_HasVInstructionsAnyF, // VFWMUL_VF = 12618 CEFBS_HasVInstructionsAnyF, // VFWMUL_VV = 12619 CEFBS_HasVInstructionsAnyF, // VFWNMACC_VF = 12620 CEFBS_HasVInstructionsAnyF, // VFWNMACC_VV = 12621 CEFBS_HasVInstructionsAnyF, // VFWNMSAC_VF = 12622 CEFBS_HasVInstructionsAnyF, // VFWNMSAC_VV = 12623 CEFBS_HasVInstructionsAnyF, // VFWREDOSUM_VS = 12624 CEFBS_HasVInstructionsAnyF, // VFWREDUSUM_VS = 12625 CEFBS_HasVInstructionsAnyF, // VFWSUB_VF = 12626 CEFBS_HasVInstructionsAnyF, // VFWSUB_VV = 12627 CEFBS_HasVInstructionsAnyF, // VFWSUB_WF = 12628 CEFBS_HasVInstructionsAnyF, // VFWSUB_WV = 12629 CEFBS_HasVInstructions, // VID_V = 12630 CEFBS_HasVInstructions, // VIOTA_M = 12631 CEFBS_HasVInstructions, // VL1RE16_V = 12632 CEFBS_HasVInstructions, // VL1RE32_V = 12633 CEFBS_HasVInstructionsI64, // VL1RE64_V = 12634 CEFBS_HasVInstructions, // VL1RE8_V = 12635 CEFBS_HasVInstructions, // VL2RE16_V = 12636 CEFBS_HasVInstructions, // VL2RE32_V = 12637 CEFBS_HasVInstructionsI64, // VL2RE64_V = 12638 CEFBS_HasVInstructions, // VL2RE8_V = 12639 CEFBS_HasVInstructions, // VL4RE16_V = 12640 CEFBS_HasVInstructions, // VL4RE32_V = 12641 CEFBS_HasVInstructionsI64, // VL4RE64_V = 12642 CEFBS_HasVInstructions, // VL4RE8_V = 12643 CEFBS_HasVInstructions, // VL8RE16_V = 12644 CEFBS_HasVInstructions, // VL8RE32_V = 12645 CEFBS_HasVInstructionsI64, // VL8RE64_V = 12646 CEFBS_HasVInstructions, // VL8RE8_V = 12647 CEFBS_HasVInstructions, // VLE16FF_V = 12648 CEFBS_HasVInstructions, // VLE16_V = 12649 CEFBS_HasVInstructions, // VLE32FF_V = 12650 CEFBS_HasVInstructions, // VLE32_V = 12651 CEFBS_HasVInstructionsI64, // VLE64FF_V = 12652 CEFBS_HasVInstructionsI64, // VLE64_V = 12653 CEFBS_HasVInstructions, // VLE8FF_V = 12654 CEFBS_HasVInstructions, // VLE8_V = 12655 CEFBS_HasVInstructions, // VLM_V = 12656 CEFBS_HasVInstructions, // VLOXEI16_V = 12657 CEFBS_HasVInstructions, // VLOXEI32_V = 12658 CEFBS_IsRV64_HasVInstructionsI64, // VLOXEI64_V = 12659 CEFBS_HasVInstructions, // VLOXEI8_V = 12660 CEFBS_HasVInstructions, // VLOXSEG2EI16_V = 12661 CEFBS_HasVInstructions, // VLOXSEG2EI32_V = 12662 CEFBS_HasVInstructionsI64_IsRV64, // VLOXSEG2EI64_V = 12663 CEFBS_HasVInstructions, // VLOXSEG2EI8_V = 12664 CEFBS_HasVInstructions, // VLOXSEG3EI16_V = 12665 CEFBS_HasVInstructions, // VLOXSEG3EI32_V = 12666 CEFBS_HasVInstructionsI64_IsRV64, // VLOXSEG3EI64_V = 12667 CEFBS_HasVInstructions, // VLOXSEG3EI8_V = 12668 CEFBS_HasVInstructions, // VLOXSEG4EI16_V = 12669 CEFBS_HasVInstructions, // VLOXSEG4EI32_V = 12670 CEFBS_HasVInstructionsI64_IsRV64, // VLOXSEG4EI64_V = 12671 CEFBS_HasVInstructions, // VLOXSEG4EI8_V = 12672 CEFBS_HasVInstructions, // VLOXSEG5EI16_V = 12673 CEFBS_HasVInstructions, // VLOXSEG5EI32_V = 12674 CEFBS_HasVInstructionsI64_IsRV64, // VLOXSEG5EI64_V = 12675 CEFBS_HasVInstructions, // VLOXSEG5EI8_V = 12676 CEFBS_HasVInstructions, // VLOXSEG6EI16_V = 12677 CEFBS_HasVInstructions, // VLOXSEG6EI32_V = 12678 CEFBS_HasVInstructionsI64_IsRV64, // VLOXSEG6EI64_V = 12679 CEFBS_HasVInstructions, // VLOXSEG6EI8_V = 12680 CEFBS_HasVInstructions, // VLOXSEG7EI16_V = 12681 CEFBS_HasVInstructions, // VLOXSEG7EI32_V = 12682 CEFBS_HasVInstructionsI64_IsRV64, // VLOXSEG7EI64_V = 12683 CEFBS_HasVInstructions, // VLOXSEG7EI8_V = 12684 CEFBS_HasVInstructions, // VLOXSEG8EI16_V = 12685 CEFBS_HasVInstructions, // VLOXSEG8EI32_V = 12686 CEFBS_HasVInstructionsI64_IsRV64, // VLOXSEG8EI64_V = 12687 CEFBS_HasVInstructions, // VLOXSEG8EI8_V = 12688 CEFBS_HasVInstructions, // VLSE16_V = 12689 CEFBS_HasVInstructions, // VLSE32_V = 12690 CEFBS_HasVInstructionsI64, // VLSE64_V = 12691 CEFBS_HasVInstructions, // VLSE8_V = 12692 CEFBS_HasVInstructions, // VLSEG2E16FF_V = 12693 CEFBS_HasVInstructions, // VLSEG2E16_V = 12694 CEFBS_HasVInstructions, // VLSEG2E32FF_V = 12695 CEFBS_HasVInstructions, // VLSEG2E32_V = 12696 CEFBS_HasVInstructionsI64, // VLSEG2E64FF_V = 12697 CEFBS_HasVInstructionsI64, // VLSEG2E64_V = 12698 CEFBS_HasVInstructions, // VLSEG2E8FF_V = 12699 CEFBS_HasVInstructions, // VLSEG2E8_V = 12700 CEFBS_HasVInstructions, // VLSEG3E16FF_V = 12701 CEFBS_HasVInstructions, // VLSEG3E16_V = 12702 CEFBS_HasVInstructions, // VLSEG3E32FF_V = 12703 CEFBS_HasVInstructions, // VLSEG3E32_V = 12704 CEFBS_HasVInstructionsI64, // VLSEG3E64FF_V = 12705 CEFBS_HasVInstructionsI64, // VLSEG3E64_V = 12706 CEFBS_HasVInstructions, // VLSEG3E8FF_V = 12707 CEFBS_HasVInstructions, // VLSEG3E8_V = 12708 CEFBS_HasVInstructions, // VLSEG4E16FF_V = 12709 CEFBS_HasVInstructions, // VLSEG4E16_V = 12710 CEFBS_HasVInstructions, // VLSEG4E32FF_V = 12711 CEFBS_HasVInstructions, // VLSEG4E32_V = 12712 CEFBS_HasVInstructionsI64, // VLSEG4E64FF_V = 12713 CEFBS_HasVInstructionsI64, // VLSEG4E64_V = 12714 CEFBS_HasVInstructions, // VLSEG4E8FF_V = 12715 CEFBS_HasVInstructions, // VLSEG4E8_V = 12716 CEFBS_HasVInstructions, // VLSEG5E16FF_V = 12717 CEFBS_HasVInstructions, // VLSEG5E16_V = 12718 CEFBS_HasVInstructions, // VLSEG5E32FF_V = 12719 CEFBS_HasVInstructions, // VLSEG5E32_V = 12720 CEFBS_HasVInstructionsI64, // VLSEG5E64FF_V = 12721 CEFBS_HasVInstructionsI64, // VLSEG5E64_V = 12722 CEFBS_HasVInstructions, // VLSEG5E8FF_V = 12723 CEFBS_HasVInstructions, // VLSEG5E8_V = 12724 CEFBS_HasVInstructions, // VLSEG6E16FF_V = 12725 CEFBS_HasVInstructions, // VLSEG6E16_V = 12726 CEFBS_HasVInstructions, // VLSEG6E32FF_V = 12727 CEFBS_HasVInstructions, // VLSEG6E32_V = 12728 CEFBS_HasVInstructionsI64, // VLSEG6E64FF_V = 12729 CEFBS_HasVInstructionsI64, // VLSEG6E64_V = 12730 CEFBS_HasVInstructions, // VLSEG6E8FF_V = 12731 CEFBS_HasVInstructions, // VLSEG6E8_V = 12732 CEFBS_HasVInstructions, // VLSEG7E16FF_V = 12733 CEFBS_HasVInstructions, // VLSEG7E16_V = 12734 CEFBS_HasVInstructions, // VLSEG7E32FF_V = 12735 CEFBS_HasVInstructions, // VLSEG7E32_V = 12736 CEFBS_HasVInstructionsI64, // VLSEG7E64FF_V = 12737 CEFBS_HasVInstructionsI64, // VLSEG7E64_V = 12738 CEFBS_HasVInstructions, // VLSEG7E8FF_V = 12739 CEFBS_HasVInstructions, // VLSEG7E8_V = 12740 CEFBS_HasVInstructions, // VLSEG8E16FF_V = 12741 CEFBS_HasVInstructions, // VLSEG8E16_V = 12742 CEFBS_HasVInstructions, // VLSEG8E32FF_V = 12743 CEFBS_HasVInstructions, // VLSEG8E32_V = 12744 CEFBS_HasVInstructionsI64, // VLSEG8E64FF_V = 12745 CEFBS_HasVInstructionsI64, // VLSEG8E64_V = 12746 CEFBS_HasVInstructions, // VLSEG8E8FF_V = 12747 CEFBS_HasVInstructions, // VLSEG8E8_V = 12748 CEFBS_HasVInstructions, // VLSSEG2E16_V = 12749 CEFBS_HasVInstructions, // VLSSEG2E32_V = 12750 CEFBS_HasVInstructionsI64, // VLSSEG2E64_V = 12751 CEFBS_HasVInstructions, // VLSSEG2E8_V = 12752 CEFBS_HasVInstructions, // VLSSEG3E16_V = 12753 CEFBS_HasVInstructions, // VLSSEG3E32_V = 12754 CEFBS_HasVInstructionsI64, // VLSSEG3E64_V = 12755 CEFBS_HasVInstructions, // VLSSEG3E8_V = 12756 CEFBS_HasVInstructions, // VLSSEG4E16_V = 12757 CEFBS_HasVInstructions, // VLSSEG4E32_V = 12758 CEFBS_HasVInstructionsI64, // VLSSEG4E64_V = 12759 CEFBS_HasVInstructions, // VLSSEG4E8_V = 12760 CEFBS_HasVInstructions, // VLSSEG5E16_V = 12761 CEFBS_HasVInstructions, // VLSSEG5E32_V = 12762 CEFBS_HasVInstructionsI64, // VLSSEG5E64_V = 12763 CEFBS_HasVInstructions, // VLSSEG5E8_V = 12764 CEFBS_HasVInstructions, // VLSSEG6E16_V = 12765 CEFBS_HasVInstructions, // VLSSEG6E32_V = 12766 CEFBS_HasVInstructionsI64, // VLSSEG6E64_V = 12767 CEFBS_HasVInstructions, // VLSSEG6E8_V = 12768 CEFBS_HasVInstructions, // VLSSEG7E16_V = 12769 CEFBS_HasVInstructions, // VLSSEG7E32_V = 12770 CEFBS_HasVInstructionsI64, // VLSSEG7E64_V = 12771 CEFBS_HasVInstructions, // VLSSEG7E8_V = 12772 CEFBS_HasVInstructions, // VLSSEG8E16_V = 12773 CEFBS_HasVInstructions, // VLSSEG8E32_V = 12774 CEFBS_HasVInstructionsI64, // VLSSEG8E64_V = 12775 CEFBS_HasVInstructions, // VLSSEG8E8_V = 12776 CEFBS_HasVInstructions, // VLUXEI16_V = 12777 CEFBS_HasVInstructions, // VLUXEI32_V = 12778 CEFBS_IsRV64_HasVInstructionsI64, // VLUXEI64_V = 12779 CEFBS_HasVInstructions, // VLUXEI8_V = 12780 CEFBS_HasVInstructions, // VLUXSEG2EI16_V = 12781 CEFBS_HasVInstructions, // VLUXSEG2EI32_V = 12782 CEFBS_HasVInstructionsI64_IsRV64, // VLUXSEG2EI64_V = 12783 CEFBS_HasVInstructions, // VLUXSEG2EI8_V = 12784 CEFBS_HasVInstructions, // VLUXSEG3EI16_V = 12785 CEFBS_HasVInstructions, // VLUXSEG3EI32_V = 12786 CEFBS_HasVInstructionsI64_IsRV64, // VLUXSEG3EI64_V = 12787 CEFBS_HasVInstructions, // VLUXSEG3EI8_V = 12788 CEFBS_HasVInstructions, // VLUXSEG4EI16_V = 12789 CEFBS_HasVInstructions, // VLUXSEG4EI32_V = 12790 CEFBS_HasVInstructionsI64_IsRV64, // VLUXSEG4EI64_V = 12791 CEFBS_HasVInstructions, // VLUXSEG4EI8_V = 12792 CEFBS_HasVInstructions, // VLUXSEG5EI16_V = 12793 CEFBS_HasVInstructions, // VLUXSEG5EI32_V = 12794 CEFBS_HasVInstructionsI64_IsRV64, // VLUXSEG5EI64_V = 12795 CEFBS_HasVInstructions, // VLUXSEG5EI8_V = 12796 CEFBS_HasVInstructions, // VLUXSEG6EI16_V = 12797 CEFBS_HasVInstructions, // VLUXSEG6EI32_V = 12798 CEFBS_HasVInstructionsI64_IsRV64, // VLUXSEG6EI64_V = 12799 CEFBS_HasVInstructions, // VLUXSEG6EI8_V = 12800 CEFBS_HasVInstructions, // VLUXSEG7EI16_V = 12801 CEFBS_HasVInstructions, // VLUXSEG7EI32_V = 12802 CEFBS_HasVInstructionsI64_IsRV64, // VLUXSEG7EI64_V = 12803 CEFBS_HasVInstructions, // VLUXSEG7EI8_V = 12804 CEFBS_HasVInstructions, // VLUXSEG8EI16_V = 12805 CEFBS_HasVInstructions, // VLUXSEG8EI32_V = 12806 CEFBS_HasVInstructionsI64_IsRV64, // VLUXSEG8EI64_V = 12807 CEFBS_HasVInstructions, // VLUXSEG8EI8_V = 12808 CEFBS_HasVInstructions, // VMACC_VV = 12809 CEFBS_HasVInstructions, // VMACC_VX = 12810 CEFBS_HasVInstructions, // VMADC_VI = 12811 CEFBS_HasVInstructions, // VMADC_VIM = 12812 CEFBS_HasVInstructions, // VMADC_VV = 12813 CEFBS_HasVInstructions, // VMADC_VVM = 12814 CEFBS_HasVInstructions, // VMADC_VX = 12815 CEFBS_HasVInstructions, // VMADC_VXM = 12816 CEFBS_HasVInstructions, // VMADD_VV = 12817 CEFBS_HasVInstructions, // VMADD_VX = 12818 CEFBS_HasVInstructions, // VMANDN_MM = 12819 CEFBS_HasVInstructions, // VMAND_MM = 12820 CEFBS_HasVInstructions, // VMAXU_VV = 12821 CEFBS_HasVInstructions, // VMAXU_VX = 12822 CEFBS_HasVInstructions, // VMAX_VV = 12823 CEFBS_HasVInstructions, // VMAX_VX = 12824 CEFBS_HasVInstructions, // VMERGE_VIM = 12825 CEFBS_HasVInstructions, // VMERGE_VVM = 12826 CEFBS_HasVInstructions, // VMERGE_VXM = 12827 CEFBS_HasVInstructionsAnyF, // VMFEQ_VF = 12828 CEFBS_HasVInstructionsAnyF, // VMFEQ_VV = 12829 CEFBS_HasVInstructionsAnyF, // VMFGE_VF = 12830 CEFBS_HasVInstructionsAnyF, // VMFGT_VF = 12831 CEFBS_HasVInstructionsAnyF, // VMFLE_VF = 12832 CEFBS_HasVInstructionsAnyF, // VMFLE_VV = 12833 CEFBS_HasVInstructionsAnyF, // VMFLT_VF = 12834 CEFBS_HasVInstructionsAnyF, // VMFLT_VV = 12835 CEFBS_HasVInstructionsAnyF, // VMFNE_VF = 12836 CEFBS_HasVInstructionsAnyF, // VMFNE_VV = 12837 CEFBS_HasVInstructions, // VMINU_VV = 12838 CEFBS_HasVInstructions, // VMINU_VX = 12839 CEFBS_HasVInstructions, // VMIN_VV = 12840 CEFBS_HasVInstructions, // VMIN_VX = 12841 CEFBS_HasVInstructions, // VMNAND_MM = 12842 CEFBS_HasVInstructions, // VMNOR_MM = 12843 CEFBS_HasVInstructions, // VMORN_MM = 12844 CEFBS_HasVInstructions, // VMOR_MM = 12845 CEFBS_HasVInstructions, // VMSBC_VV = 12846 CEFBS_HasVInstructions, // VMSBC_VVM = 12847 CEFBS_HasVInstructions, // VMSBC_VX = 12848 CEFBS_HasVInstructions, // VMSBC_VXM = 12849 CEFBS_HasVInstructions, // VMSBF_M = 12850 CEFBS_HasVInstructions, // VMSEQ_VI = 12851 CEFBS_HasVInstructions, // VMSEQ_VV = 12852 CEFBS_HasVInstructions, // VMSEQ_VX = 12853 CEFBS_HasVInstructions, // VMSGTU_VI = 12854 CEFBS_HasVInstructions, // VMSGTU_VX = 12855 CEFBS_HasVInstructions, // VMSGT_VI = 12856 CEFBS_HasVInstructions, // VMSGT_VX = 12857 CEFBS_HasVInstructions, // VMSIF_M = 12858 CEFBS_HasVInstructions, // VMSLEU_VI = 12859 CEFBS_HasVInstructions, // VMSLEU_VV = 12860 CEFBS_HasVInstructions, // VMSLEU_VX = 12861 CEFBS_HasVInstructions, // VMSLE_VI = 12862 CEFBS_HasVInstructions, // VMSLE_VV = 12863 CEFBS_HasVInstructions, // VMSLE_VX = 12864 CEFBS_HasVInstructions, // VMSLTU_VV = 12865 CEFBS_HasVInstructions, // VMSLTU_VX = 12866 CEFBS_HasVInstructions, // VMSLT_VV = 12867 CEFBS_HasVInstructions, // VMSLT_VX = 12868 CEFBS_HasVInstructions, // VMSNE_VI = 12869 CEFBS_HasVInstructions, // VMSNE_VV = 12870 CEFBS_HasVInstructions, // VMSNE_VX = 12871 CEFBS_HasVInstructions, // VMSOF_M = 12872 CEFBS_HasVInstructions, // VMULHSU_VV = 12873 CEFBS_HasVInstructions, // VMULHSU_VX = 12874 CEFBS_HasVInstructions, // VMULHU_VV = 12875 CEFBS_HasVInstructions, // VMULHU_VX = 12876 CEFBS_HasVInstructions, // VMULH_VV = 12877 CEFBS_HasVInstructions, // VMULH_VX = 12878 CEFBS_HasVInstructions, // VMUL_VV = 12879 CEFBS_HasVInstructions, // VMUL_VX = 12880 CEFBS_HasVInstructions, // VMV1R_V = 12881 CEFBS_HasVInstructions, // VMV2R_V = 12882 CEFBS_HasVInstructions, // VMV4R_V = 12883 CEFBS_HasVInstructions, // VMV8R_V = 12884 CEFBS_HasVInstructions, // VMV_S_X = 12885 CEFBS_HasVInstructions, // VMV_V_I = 12886 CEFBS_HasVInstructions, // VMV_V_V = 12887 CEFBS_HasVInstructions, // VMV_V_X = 12888 CEFBS_HasVInstructions, // VMV_X_S = 12889 CEFBS_HasVInstructions, // VMXNOR_MM = 12890 CEFBS_HasVInstructions, // VMXOR_MM = 12891 CEFBS_HasVInstructions, // VNCLIPU_WI = 12892 CEFBS_HasVInstructions, // VNCLIPU_WV = 12893 CEFBS_HasVInstructions, // VNCLIPU_WX = 12894 CEFBS_HasVInstructions, // VNCLIP_WI = 12895 CEFBS_HasVInstructions, // VNCLIP_WV = 12896 CEFBS_HasVInstructions, // VNCLIP_WX = 12897 CEFBS_HasVInstructions, // VNMSAC_VV = 12898 CEFBS_HasVInstructions, // VNMSAC_VX = 12899 CEFBS_HasVInstructions, // VNMSUB_VV = 12900 CEFBS_HasVInstructions, // VNMSUB_VX = 12901 CEFBS_HasVInstructions, // VNSRA_WI = 12902 CEFBS_HasVInstructions, // VNSRA_WV = 12903 CEFBS_HasVInstructions, // VNSRA_WX = 12904 CEFBS_HasVInstructions, // VNSRL_WI = 12905 CEFBS_HasVInstructions, // VNSRL_WV = 12906 CEFBS_HasVInstructions, // VNSRL_WX = 12907 CEFBS_HasVInstructions, // VOR_VI = 12908 CEFBS_HasVInstructions, // VOR_VV = 12909 CEFBS_HasVInstructions, // VOR_VX = 12910 CEFBS_HasVInstructions, // VREDAND_VS = 12911 CEFBS_HasVInstructions, // VREDMAXU_VS = 12912 CEFBS_HasVInstructions, // VREDMAX_VS = 12913 CEFBS_HasVInstructions, // VREDMINU_VS = 12914 CEFBS_HasVInstructions, // VREDMIN_VS = 12915 CEFBS_HasVInstructions, // VREDOR_VS = 12916 CEFBS_HasVInstructions, // VREDSUM_VS = 12917 CEFBS_HasVInstructions, // VREDXOR_VS = 12918 CEFBS_HasVInstructions, // VREMU_VV = 12919 CEFBS_HasVInstructions, // VREMU_VX = 12920 CEFBS_HasVInstructions, // VREM_VV = 12921 CEFBS_HasVInstructions, // VREM_VX = 12922 CEFBS_HasVInstructions, // VRGATHEREI16_VV = 12923 CEFBS_HasVInstructions, // VRGATHER_VI = 12924 CEFBS_HasVInstructions, // VRGATHER_VV = 12925 CEFBS_HasVInstructions, // VRGATHER_VX = 12926 CEFBS_HasVInstructions, // VRSUB_VI = 12927 CEFBS_HasVInstructions, // VRSUB_VX = 12928 CEFBS_HasVInstructions, // VS1R_V = 12929 CEFBS_HasVInstructions, // VS2R_V = 12930 CEFBS_HasVInstructions, // VS4R_V = 12931 CEFBS_HasVInstructions, // VS8R_V = 12932 CEFBS_HasVInstructions, // VSADDU_VI = 12933 CEFBS_HasVInstructions, // VSADDU_VV = 12934 CEFBS_HasVInstructions, // VSADDU_VX = 12935 CEFBS_HasVInstructions, // VSADD_VI = 12936 CEFBS_HasVInstructions, // VSADD_VV = 12937 CEFBS_HasVInstructions, // VSADD_VX = 12938 CEFBS_HasVInstructions, // VSBC_VVM = 12939 CEFBS_HasVInstructions, // VSBC_VXM = 12940 CEFBS_HasVInstructions, // VSE16_V = 12941 CEFBS_HasVInstructions, // VSE32_V = 12942 CEFBS_HasVInstructionsI64, // VSE64_V = 12943 CEFBS_HasVInstructions, // VSE8_V = 12944 CEFBS_HasVInstructions, // VSETIVLI = 12945 CEFBS_HasVInstructions, // VSETVL = 12946 CEFBS_HasVInstructions, // VSETVLI = 12947 CEFBS_HasVInstructions, // VSEXT_VF2 = 12948 CEFBS_HasVInstructions, // VSEXT_VF4 = 12949 CEFBS_HasVInstructions, // VSEXT_VF8 = 12950 CEFBS_HasVInstructions, // VSLIDE1DOWN_VX = 12951 CEFBS_HasVInstructions, // VSLIDE1UP_VX = 12952 CEFBS_HasVInstructions, // VSLIDEDOWN_VI = 12953 CEFBS_HasVInstructions, // VSLIDEDOWN_VX = 12954 CEFBS_HasVInstructions, // VSLIDEUP_VI = 12955 CEFBS_HasVInstructions, // VSLIDEUP_VX = 12956 CEFBS_HasVInstructions, // VSLL_VI = 12957 CEFBS_HasVInstructions, // VSLL_VV = 12958 CEFBS_HasVInstructions, // VSLL_VX = 12959 CEFBS_HasVInstructions, // VSMUL_VV = 12960 CEFBS_HasVInstructions, // VSMUL_VX = 12961 CEFBS_HasVInstructions, // VSM_V = 12962 CEFBS_HasVInstructions, // VSOXEI16_V = 12963 CEFBS_HasVInstructions, // VSOXEI32_V = 12964 CEFBS_IsRV64_HasVInstructionsI64, // VSOXEI64_V = 12965 CEFBS_HasVInstructions, // VSOXEI8_V = 12966 CEFBS_HasVInstructions, // VSOXSEG2EI16_V = 12967 CEFBS_HasVInstructions, // VSOXSEG2EI32_V = 12968 CEFBS_HasVInstructionsI64_IsRV64, // VSOXSEG2EI64_V = 12969 CEFBS_HasVInstructions, // VSOXSEG2EI8_V = 12970 CEFBS_HasVInstructions, // VSOXSEG3EI16_V = 12971 CEFBS_HasVInstructions, // VSOXSEG3EI32_V = 12972 CEFBS_HasVInstructionsI64_IsRV64, // VSOXSEG3EI64_V = 12973 CEFBS_HasVInstructions, // VSOXSEG3EI8_V = 12974 CEFBS_HasVInstructions, // VSOXSEG4EI16_V = 12975 CEFBS_HasVInstructions, // VSOXSEG4EI32_V = 12976 CEFBS_HasVInstructionsI64_IsRV64, // VSOXSEG4EI64_V = 12977 CEFBS_HasVInstructions, // VSOXSEG4EI8_V = 12978 CEFBS_HasVInstructions, // VSOXSEG5EI16_V = 12979 CEFBS_HasVInstructions, // VSOXSEG5EI32_V = 12980 CEFBS_HasVInstructionsI64_IsRV64, // VSOXSEG5EI64_V = 12981 CEFBS_HasVInstructions, // VSOXSEG5EI8_V = 12982 CEFBS_HasVInstructions, // VSOXSEG6EI16_V = 12983 CEFBS_HasVInstructions, // VSOXSEG6EI32_V = 12984 CEFBS_HasVInstructionsI64_IsRV64, // VSOXSEG6EI64_V = 12985 CEFBS_HasVInstructions, // VSOXSEG6EI8_V = 12986 CEFBS_HasVInstructions, // VSOXSEG7EI16_V = 12987 CEFBS_HasVInstructions, // VSOXSEG7EI32_V = 12988 CEFBS_HasVInstructionsI64_IsRV64, // VSOXSEG7EI64_V = 12989 CEFBS_HasVInstructions, // VSOXSEG7EI8_V = 12990 CEFBS_HasVInstructions, // VSOXSEG8EI16_V = 12991 CEFBS_HasVInstructions, // VSOXSEG8EI32_V = 12992 CEFBS_HasVInstructionsI64_IsRV64, // VSOXSEG8EI64_V = 12993 CEFBS_HasVInstructions, // VSOXSEG8EI8_V = 12994 CEFBS_HasVInstructions, // VSRA_VI = 12995 CEFBS_HasVInstructions, // VSRA_VV = 12996 CEFBS_HasVInstructions, // VSRA_VX = 12997 CEFBS_HasVInstructions, // VSRL_VI = 12998 CEFBS_HasVInstructions, // VSRL_VV = 12999 CEFBS_HasVInstructions, // VSRL_VX = 13000 CEFBS_HasVInstructions, // VSSE16_V = 13001 CEFBS_HasVInstructions, // VSSE32_V = 13002 CEFBS_HasVInstructionsI64, // VSSE64_V = 13003 CEFBS_HasVInstructions, // VSSE8_V = 13004 CEFBS_HasVInstructions, // VSSEG2E16_V = 13005 CEFBS_HasVInstructions, // VSSEG2E32_V = 13006 CEFBS_HasVInstructionsI64, // VSSEG2E64_V = 13007 CEFBS_HasVInstructions, // VSSEG2E8_V = 13008 CEFBS_HasVInstructions, // VSSEG3E16_V = 13009 CEFBS_HasVInstructions, // VSSEG3E32_V = 13010 CEFBS_HasVInstructionsI64, // VSSEG3E64_V = 13011 CEFBS_HasVInstructions, // VSSEG3E8_V = 13012 CEFBS_HasVInstructions, // VSSEG4E16_V = 13013 CEFBS_HasVInstructions, // VSSEG4E32_V = 13014 CEFBS_HasVInstructionsI64, // VSSEG4E64_V = 13015 CEFBS_HasVInstructions, // VSSEG4E8_V = 13016 CEFBS_HasVInstructions, // VSSEG5E16_V = 13017 CEFBS_HasVInstructions, // VSSEG5E32_V = 13018 CEFBS_HasVInstructionsI64, // VSSEG5E64_V = 13019 CEFBS_HasVInstructions, // VSSEG5E8_V = 13020 CEFBS_HasVInstructions, // VSSEG6E16_V = 13021 CEFBS_HasVInstructions, // VSSEG6E32_V = 13022 CEFBS_HasVInstructionsI64, // VSSEG6E64_V = 13023 CEFBS_HasVInstructions, // VSSEG6E8_V = 13024 CEFBS_HasVInstructions, // VSSEG7E16_V = 13025 CEFBS_HasVInstructions, // VSSEG7E32_V = 13026 CEFBS_HasVInstructionsI64, // VSSEG7E64_V = 13027 CEFBS_HasVInstructions, // VSSEG7E8_V = 13028 CEFBS_HasVInstructions, // VSSEG8E16_V = 13029 CEFBS_HasVInstructions, // VSSEG8E32_V = 13030 CEFBS_HasVInstructionsI64, // VSSEG8E64_V = 13031 CEFBS_HasVInstructions, // VSSEG8E8_V = 13032 CEFBS_HasVInstructions, // VSSRA_VI = 13033 CEFBS_HasVInstructions, // VSSRA_VV = 13034 CEFBS_HasVInstructions, // VSSRA_VX = 13035 CEFBS_HasVInstructions, // VSSRL_VI = 13036 CEFBS_HasVInstructions, // VSSRL_VV = 13037 CEFBS_HasVInstructions, // VSSRL_VX = 13038 CEFBS_HasVInstructions, // VSSSEG2E16_V = 13039 CEFBS_HasVInstructions, // VSSSEG2E32_V = 13040 CEFBS_HasVInstructionsI64, // VSSSEG2E64_V = 13041 CEFBS_HasVInstructions, // VSSSEG2E8_V = 13042 CEFBS_HasVInstructions, // VSSSEG3E16_V = 13043 CEFBS_HasVInstructions, // VSSSEG3E32_V = 13044 CEFBS_HasVInstructionsI64, // VSSSEG3E64_V = 13045 CEFBS_HasVInstructions, // VSSSEG3E8_V = 13046 CEFBS_HasVInstructions, // VSSSEG4E16_V = 13047 CEFBS_HasVInstructions, // VSSSEG4E32_V = 13048 CEFBS_HasVInstructionsI64, // VSSSEG4E64_V = 13049 CEFBS_HasVInstructions, // VSSSEG4E8_V = 13050 CEFBS_HasVInstructions, // VSSSEG5E16_V = 13051 CEFBS_HasVInstructions, // VSSSEG5E32_V = 13052 CEFBS_HasVInstructionsI64, // VSSSEG5E64_V = 13053 CEFBS_HasVInstructions, // VSSSEG5E8_V = 13054 CEFBS_HasVInstructions, // VSSSEG6E16_V = 13055 CEFBS_HasVInstructions, // VSSSEG6E32_V = 13056 CEFBS_HasVInstructionsI64, // VSSSEG6E64_V = 13057 CEFBS_HasVInstructions, // VSSSEG6E8_V = 13058 CEFBS_HasVInstructions, // VSSSEG7E16_V = 13059 CEFBS_HasVInstructions, // VSSSEG7E32_V = 13060 CEFBS_HasVInstructionsI64, // VSSSEG7E64_V = 13061 CEFBS_HasVInstructions, // VSSSEG7E8_V = 13062 CEFBS_HasVInstructions, // VSSSEG8E16_V = 13063 CEFBS_HasVInstructions, // VSSSEG8E32_V = 13064 CEFBS_HasVInstructionsI64, // VSSSEG8E64_V = 13065 CEFBS_HasVInstructions, // VSSSEG8E8_V = 13066 CEFBS_HasVInstructions, // VSSUBU_VV = 13067 CEFBS_HasVInstructions, // VSSUBU_VX = 13068 CEFBS_HasVInstructions, // VSSUB_VV = 13069 CEFBS_HasVInstructions, // VSSUB_VX = 13070 CEFBS_HasVInstructions, // VSUB_VV = 13071 CEFBS_HasVInstructions, // VSUB_VX = 13072 CEFBS_HasVInstructions, // VSUXEI16_V = 13073 CEFBS_HasVInstructions, // VSUXEI32_V = 13074 CEFBS_IsRV64_HasVInstructionsI64, // VSUXEI64_V = 13075 CEFBS_HasVInstructions, // VSUXEI8_V = 13076 CEFBS_HasVInstructions, // VSUXSEG2EI16_V = 13077 CEFBS_HasVInstructions, // VSUXSEG2EI32_V = 13078 CEFBS_HasVInstructionsI64_IsRV64, // VSUXSEG2EI64_V = 13079 CEFBS_HasVInstructions, // VSUXSEG2EI8_V = 13080 CEFBS_HasVInstructions, // VSUXSEG3EI16_V = 13081 CEFBS_HasVInstructions, // VSUXSEG3EI32_V = 13082 CEFBS_HasVInstructionsI64_IsRV64, // VSUXSEG3EI64_V = 13083 CEFBS_HasVInstructions, // VSUXSEG3EI8_V = 13084 CEFBS_HasVInstructions, // VSUXSEG4EI16_V = 13085 CEFBS_HasVInstructions, // VSUXSEG4EI32_V = 13086 CEFBS_HasVInstructionsI64_IsRV64, // VSUXSEG4EI64_V = 13087 CEFBS_HasVInstructions, // VSUXSEG4EI8_V = 13088 CEFBS_HasVInstructions, // VSUXSEG5EI16_V = 13089 CEFBS_HasVInstructions, // VSUXSEG5EI32_V = 13090 CEFBS_HasVInstructionsI64_IsRV64, // VSUXSEG5EI64_V = 13091 CEFBS_HasVInstructions, // VSUXSEG5EI8_V = 13092 CEFBS_HasVInstructions, // VSUXSEG6EI16_V = 13093 CEFBS_HasVInstructions, // VSUXSEG6EI32_V = 13094 CEFBS_HasVInstructionsI64_IsRV64, // VSUXSEG6EI64_V = 13095 CEFBS_HasVInstructions, // VSUXSEG6EI8_V = 13096 CEFBS_HasVInstructions, // VSUXSEG7EI16_V = 13097 CEFBS_HasVInstructions, // VSUXSEG7EI32_V = 13098 CEFBS_HasVInstructionsI64_IsRV64, // VSUXSEG7EI64_V = 13099 CEFBS_HasVInstructions, // VSUXSEG7EI8_V = 13100 CEFBS_HasVInstructions, // VSUXSEG8EI16_V = 13101 CEFBS_HasVInstructions, // VSUXSEG8EI32_V = 13102 CEFBS_HasVInstructionsI64_IsRV64, // VSUXSEG8EI64_V = 13103 CEFBS_HasVInstructions, // VSUXSEG8EI8_V = 13104 CEFBS_IsRV64_HasVendorXVentanaCondOps, // VT_MASKC = 13105 CEFBS_IsRV64_HasVendorXVentanaCondOps, // VT_MASKCN = 13106 CEFBS_HasVInstructions, // VWADDU_VV = 13107 CEFBS_HasVInstructions, // VWADDU_VX = 13108 CEFBS_HasVInstructions, // VWADDU_WV = 13109 CEFBS_HasVInstructions, // VWADDU_WX = 13110 CEFBS_HasVInstructions, // VWADD_VV = 13111 CEFBS_HasVInstructions, // VWADD_VX = 13112 CEFBS_HasVInstructions, // VWADD_WV = 13113 CEFBS_HasVInstructions, // VWADD_WX = 13114 CEFBS_HasVInstructions, // VWMACCSU_VV = 13115 CEFBS_HasVInstructions, // VWMACCSU_VX = 13116 CEFBS_HasVInstructions, // VWMACCUS_VX = 13117 CEFBS_HasVInstructions, // VWMACCU_VV = 13118 CEFBS_HasVInstructions, // VWMACCU_VX = 13119 CEFBS_HasVInstructions, // VWMACC_VV = 13120 CEFBS_HasVInstructions, // VWMACC_VX = 13121 CEFBS_HasVInstructions, // VWMULSU_VV = 13122 CEFBS_HasVInstructions, // VWMULSU_VX = 13123 CEFBS_HasVInstructions, // VWMULU_VV = 13124 CEFBS_HasVInstructions, // VWMULU_VX = 13125 CEFBS_HasVInstructions, // VWMUL_VV = 13126 CEFBS_HasVInstructions, // VWMUL_VX = 13127 CEFBS_HasVInstructions, // VWREDSUMU_VS = 13128 CEFBS_HasVInstructions, // VWREDSUM_VS = 13129 CEFBS_HasVInstructions, // VWSUBU_VV = 13130 CEFBS_HasVInstructions, // VWSUBU_VX = 13131 CEFBS_HasVInstructions, // VWSUBU_WV = 13132 CEFBS_HasVInstructions, // VWSUBU_WX = 13133 CEFBS_HasVInstructions, // VWSUB_VV = 13134 CEFBS_HasVInstructions, // VWSUB_VX = 13135 CEFBS_HasVInstructions, // VWSUB_WV = 13136 CEFBS_HasVInstructions, // VWSUB_WX = 13137 CEFBS_HasVInstructions, // VXOR_VI = 13138 CEFBS_HasVInstructions, // VXOR_VV = 13139 CEFBS_HasVInstructions, // VXOR_VX = 13140 CEFBS_HasVInstructions, // VZEXT_VF2 = 13141 CEFBS_HasVInstructions, // VZEXT_VF4 = 13142 CEFBS_HasVInstructions, // VZEXT_VF8 = 13143 CEFBS_None, // WFI = 13144 CEFBS_HasStdExtZawrs, // WRS_NTO = 13145 CEFBS_HasStdExtZawrs, // WRS_STO = 13146 CEFBS_HasStdExtZbbOrZbkb, // XNOR = 13147 CEFBS_None, // XOR = 13148 CEFBS_None, // XORI = 13149 CEFBS_HasStdExtZbkx, // XPERM4 = 13150 CEFBS_HasStdExtZbkx, // XPERM8 = 13151 CEFBS_HasStdExtZbb_IsRV32, // ZEXT_H_RV32 = 13152 CEFBS_HasStdExtZbb_IsRV64, // ZEXT_H_RV64 = 13153 CEFBS_HasStdExtZbkb_IsRV32, // ZIP_RV32 = 13154 }; assert(Opcode < 13155); FeatureBitset AvailableFeatures = computeAvailableFeatures(Features); const FeatureBitset &RequiredFeatures = FeatureBitsets[RequiredFeaturesRefs[Opcode]]; FeatureBitset MissingFeatures = (AvailableFeatures & RequiredFeatures) ^ RequiredFeatures; if (MissingFeatures.any()) { std::ostringstream Msg; Msg << "Attempting to emit " << &RISCVInstrNameData[RISCVInstrNameIndices[Opcode]] << " instruction but the "; for (unsigned i = 0, e = MissingFeatures.size(); i != e; ++i) if (MissingFeatures.test(i)) Msg << SubtargetFeatureNames[i] << " "; Msg << "predicate(s) are not met"; report_fatal_error(Msg.str().c_str()); } #endif // NDEBUG } } // end namespace RISCV_MC } // end namespace llvm #endif // ENABLE_INSTR_PREDICATE_VERIFIER