{
  "License": [
    "Copyright (C) 2023 The Android Open Source Project",
    "",
    "Licensed under the Apache License, Version 2.0 (the “License”);",
    "you may not use this file except in compliance with the License.",
    "You may obtain a copy of the License at",
    "",
    "     http://www.apache.org/licenses/LICENSE-2.0",
    "",
    "Unless required by applicable law or agreed to in writing, software",
    "distributed under the License is distributed on an “AS IS” BASIS,",
    "WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.",
    "See the License for the specific language governing permissions and",
    "limitations under the License."
  ],
  "insns": [
    {
      "name": "Adduw",
      "args": [
        { "class": "GeneralReg64", "usage": "use_def" },
        { "class": "GeneralReg64", "usage": "use" }
      ],
      "asm": "Adduw",
      "mnemo": "ADDUW"
    },
    {
      "name": "Bext",
      "args": [
        { "class": "GeneralReg64", "usage": "def" },
        { "class": "GeneralReg64", "usage": "use" },
        { "class": "GeneralReg64", "usage": "use" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "Bext",
      "mnemo": "BEXT"
    },
    {
      "name": "CanonicalizeNanFloat32",
      "args": [
        { "class": "FpReg32", "usage": "def" },
        { "class": "FpReg32", "usage": "use_def" }
      ],
      "asm": "CanonicalizeNan<Float32>",
      "mnemo": "CANONICALIZE_F32"
    },
    {
      "name": "CanonicalizeNanFloat32AVX",
      "args": [
        { "class": "FpReg32", "usage": "def" },
        { "class": "FpReg32", "usage": "use_def" }
      ],
      "asm": "CanonicalizeNanAVX<Float32>",
      "mnemo": "CANONICALIZE_F32"
    },
    {
      "name": "CanonicalizeNanFloat64",
      "args": [
        { "class": "FpReg64", "usage": "def" },
        { "class": "FpReg64", "usage": "use_def" }
      ],
      "asm": "CanonicalizeNan<Float64>",
      "mnemo": "CANONICALIZE_F64"
    },
    {
      "name": "CanonicalizeNanFloat64AVX",
      "args": [
        { "class": "FpReg64", "usage": "def" },
        { "class": "FpReg64", "usage": "use_def" }
      ],
      "asm": "CanonicalizeNanAVX<Float64>",
      "mnemo": "CANONICALIZE_F64"
    },
    {
      "name": "ClzInt32",
      "args": [
        { "class": "GeneralReg32", "usage": "def" },
        { "class": "GeneralReg32", "usage": "use" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "Clz<int32_t>",
      "mnemo": "CLZ_I32"
    },
    {
      "name": "ClzInt64",
      "args": [
        { "class": "GeneralReg64", "usage": "def" },
        { "class": "GeneralReg64", "usage": "use" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "Clz<int64_t>",
      "mnemo": "CLZ_I64"
    },
    {
      "name": "CtzInt32",
      "args": [
        { "class": "GeneralReg32", "usage": "def" },
        { "class": "GeneralReg32", "usage": "use" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "Ctz<int32_t>",
      "mnemo": "CTZ_I32"
    },
    {
      "name": "CtzInt64",
      "args": [
        { "class": "GeneralReg64", "usage": "def" },
        { "class": "GeneralReg64", "usage": "use" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "Ctz<int64_t>",
      "mnemo": "CTZ_I64"
    },
    {
      "name": "DivI8RiscV",
      "args": [
        { "class": "GeneralReg8", "usage": "use" },
        { "class": "AX", "usage": "use_def" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "DivRiscV<int8_t>",
      "mnemo": "DIV_I8_RISCV"
    },
    {
      "name": "DivI16RiscV",
      "args": [
        { "class": "GeneralReg16", "usage": "use" },
        { "class": "AX", "usage": "use_def" },
        { "class": "DX", "usage": "def_early_clobber" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "DivRiscV<int16_t>",
      "mnemo": "DIV_I16_RISCV"
    },
    {
      "name": "DivI32RiscV",
      "args": [
        { "class": "GeneralReg32", "usage": "use" },
        { "class": "EAX", "usage": "use_def" },
        { "class": "EDX", "usage": "def_early_clobber" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "DivRiscV<int32_t>",
      "mnemo": "DIV_I32_RISCV"
    },
    {
      "name": "DivI64RiscV",
      "args": [
        { "class": "GeneralReg64", "usage": "use" },
        { "class": "RAX", "usage": "use_def" },
        { "class": "RDX", "usage": "def_early_clobber" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "DivRiscV<int64_t>",
      "mnemo": "DIV_I64_RISCV"
    },
    {
      "name": "DivU8RiscV",
      "args": [
        { "class": "GeneralReg8", "usage": "use" },
        { "class": "AX", "usage": "use_def" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "DivRiscV<uint8_t>",
      "mnemo": "DIV_U8_RISCV"
    },
    {
      "name": "DivU16RiscV",
      "args": [
        { "class": "GeneralReg16", "usage": "use" },
        { "class": "AX", "usage": "use_def" },
        { "class": "DX", "usage": "def_early_clobber" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "DivRiscV<uint16_t>",
      "mnemo": "DIV_U16_RISCV"
    },
    {
      "name": "DivU32RiscV",
      "args": [
        { "class": "GeneralReg32", "usage": "use" },
        { "class": "EAX", "usage": "use_def" },
        { "class": "EDX", "usage": "def_early_clobber" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "DivRiscV<uint32_t>",
      "mnemo": "DIV_U32_RISCV"
    },
    {
      "name": "DivU64RiscV",
      "args": [
        { "class": "GeneralReg64", "usage": "use" },
        { "class": "RAX", "usage": "use_def" },
        { "class": "RDX", "usage": "def_early_clobber" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "DivRiscV<uint64_t>",
      "mnemo": "DIV_U64_RISCV"
    },
    {
      "name": "FCvtFloat32ToInt32",
      "args": [
        { "class": "GeneralReg64", "usage": "def" },
        { "class": "FpReg64", "usage": "use_def" }
      ],
      "asm": "FCvtFloatToInteger<int32_t, Float32>",
      "mnemo": "FCvtFloatToInteger"
    },
    {
      "name": "FCvtFloat32ToInt64",
      "args": [
        { "class": "GeneralReg64", "usage": "def" },
        { "class": "FpReg64", "usage": "use_def" }
      ],
      "asm": "FCvtFloatToInteger<int64_t, Float32>",
      "mnemo": "FCvtFloatToInteger"
    },
    {
      "name": "FCvtFloat64ToInt32",
      "args": [
        { "class": "GeneralReg64", "usage": "def" },
        { "class": "FpReg64", "usage": "use_def" }
      ],
      "asm": "FCvtFloatToInteger<int32_t, Float64>",
      "mnemo": "FCvtFloatToInteger"
    },
    {
      "name": "FCvtFloat64ToInt64",
      "args": [
        { "class": "GeneralReg64", "usage": "def" },
        { "class": "FpReg64", "usage": "use_def" }
      ],
      "asm": "FCvtFloatToInteger<int64_t, Float64>",
      "mnemo": "FCvtFloatToInteger"
    },
    {
      "name": "FeGetExceptionsTranslate",
      "args": [
        { "class": "Mem32", "usage": "def_early_clobber" },
        { "class": "RAX", "usage": "def" }
      ],
      "asm": "FeGetExceptionsTranslate",
      "mnemo": "FE_GET_EXCEPTIONS"
    },
    {
      "name": "FeSetExceptionsAndRoundImmTranslate",
      "args": [
        { "class": "MemX87", "usage": "def_early_clobber" },
        { "class": "Imm8" }
      ],
      "asm": "FeSetExceptionsAndRoundImmTranslate",
      "mnemo": "FE_SET_EXCEPTIONS_AND_ROUND"
    },
    {
      "name": "FeSetExceptionsAndRoundTranslate",
      "args": [
        { "class": "GeneralReg64", "usage": "use" },
        { "class": "MemX87", "usage": "def_early_clobber" },
        { "class": "GeneralReg8", "usage": "def" },
        { "class": "CL", "usage": "use" }
      ],
      "asm": "FeSetExceptionsAndRoundTranslate",
      "mnemo": "FE_SET_EXCEPTIONS_AND_ROUND"
    },
    {
      "name": "FeSetExceptionsImmTranslate",
      "args": [
        { "class": "MemX87", "usage": "def_early_clobber" },
        { "class": "Imm8" }
      ],
      "asm": "FeSetExceptionsImmTranslate",
      "mnemo": "FE_SET_EXCEPTIONS"
    },
    {
      "name": "FeSetExceptionsTranslate",
      "args": [
        { "class": "GeneralReg64", "usage": "use" },
        { "class": "MemX87", "usage": "def_early_clobber" },
        { "class": "GeneralReg8", "usage": "def" }
      ],
      "asm": "FeSetExceptionsTranslate",
      "mnemo": "FE_SET_EXCEPTIONS"
    },
    {
      "name": "FeSetRound",
      "args": [
        { "class": "GeneralReg64", "usage": "def_early_clobber" },
        { "class": "Mem16", "usage": "def_early_clobber" },
        { "class": "Mem32", "usage": "def_early_clobber" },
        { "class": "CL", "usage": "use" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "FeSetRound",
      "mnemo": "FE_SET_ROUND"
    },
    {
      "name": "FeSetRoundImmTranslate",
      "args": [
        { "class": "Mem16", "usage": "def_early_clobber" },
        { "class": "Mem32", "usage": "def_early_clobber" },
        { "class": "Imm8" }
      ],
      "asm": "FeSetRoundImmTranslate",
      "mnemo": "FE_SET_ROUND"
    },
    {
      "name": "FeqFloat32",
      "args": [
        { "class": "GeneralReg64", "usage": "def" },
        { "class": "FpReg32", "usage": "use_def" },
        { "class": "FpReg32", "usage": "use" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "Feq<Float32>",
      "mnemo": "FEQ_F32"
    },
    {
      "name": "FeqFloat32AVX",
      "args": [
        { "class": "GeneralReg64", "usage": "def" },
        { "class": "FpReg32", "usage": "use" },
        { "class": "FpReg32", "usage": "use" },
        { "class": "FpReg32", "usage": "def" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "FeqAVX<Float32>",
      "mnemo": "FEQ_F32"
    },
    {
      "name": "FeqFloat64",
      "args": [
        { "class": "GeneralReg64", "usage": "def" },
        { "class": "FpReg64", "usage": "use_def" },
        { "class": "FpReg64", "usage": "use" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "Feq<Float64>",
      "mnemo": "FEQ_F64"
    },
    {
      "name": "FeqFloat64AVX",
      "args": [
        { "class": "GeneralReg64", "usage": "def" },
        { "class": "FpReg64", "usage": "use" },
        { "class": "FpReg64", "usage": "use" },
        { "class": "FpReg64", "usage": "def" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "FeqAVX<Float64>",
      "mnemo": "FEQ_F64"
    },
    {
      "name": "FleFloat32",
      "args": [
        { "class": "GeneralReg64", "usage": "def" },
        { "class": "FpReg32", "usage": "use_def" },
        { "class": "FpReg32", "usage": "use" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "Fle<Float32>",
      "mnemo": "FLE_F32"
    },
    {
      "name": "FleFloat32AVX",
      "args": [
        { "class": "GeneralReg64", "usage": "def" },
        { "class": "FpReg32", "usage": "use" },
        { "class": "FpReg32", "usage": "use" },
        { "class": "FpReg32", "usage": "def" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "FleAVX<Float32>",
      "mnemo": "FLE_F32"
    },
    {
      "name": "FleFloat64",
      "args": [
        { "class": "GeneralReg64", "usage": "def" },
        { "class": "FpReg64", "usage": "use_def" },
        { "class": "FpReg64", "usage": "use" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "Fle<Float64>",
      "mnemo": "FLE_F64"
    },
    {
      "name": "FleFloat64AVX",
      "args": [
        { "class": "GeneralReg64", "usage": "def" },
        { "class": "FpReg64", "usage": "use" },
        { "class": "FpReg64", "usage": "use" },
        { "class": "FpReg64", "usage": "def" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "FleAVX<Float64>",
      "mnemo": "FLE_F64"
    },
    {
      "name": "FltFloat32",
      "args": [
        { "class": "GeneralReg64", "usage": "def" },
        { "class": "FpReg32", "usage": "use_def" },
        { "class": "FpReg32", "usage": "use" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "Flt<Float32>",
      "mnemo": "FLT_F32"
    },
    {
      "name": "FltFloat32AVX",
      "args": [
        { "class": "GeneralReg64", "usage": "def" },
        { "class": "FpReg32", "usage": "use" },
        { "class": "FpReg32", "usage": "use" },
        { "class": "FpReg32", "usage": "def" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "FltAVX<Float32>",
      "mnemo": "FLT_F32"
    },
    {
      "name": "FltFloat64",
      "args": [
        { "class": "GeneralReg64", "usage": "def" },
        { "class": "FpReg64", "usage": "use_def" },
        { "class": "FpReg64", "usage": "use" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "Flt<Float64>",
      "mnemo": "FLT_F64"
    },
    {
      "name": "FltFloat64AVX",
      "args": [
        { "class": "GeneralReg64", "usage": "def" },
        { "class": "FpReg64", "usage": "use" },
        { "class": "FpReg64", "usage": "use" },
        { "class": "FpReg64", "usage": "def" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "FltAVX<Float64>",
      "mnemo": "FLT_F64"
    },
    {
      "name": "MaxInt64",
      "args": [
        { "class": "GeneralReg64", "usage": "def_early_clobber" },
        { "class": "GeneralReg64", "usage": "use" },
        { "class": "GeneralReg64", "usage": "use" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "Max<int64_t>",
      "mnemo": "MAX_I64"
    },
    {
      "name": "MaxUInt64",
      "args": [
        { "class": "GeneralReg64", "usage": "def_early_clobber" },
        { "class": "GeneralReg64", "usage": "use" },
        { "class": "GeneralReg64", "usage": "use" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "Max<uint64_t>",
      "mnemo": "MAX_U64"
    },
    {
      "name": "MinInt64",
      "args": [
        { "class": "GeneralReg64", "usage": "def_early_clobber" },
        { "class": "GeneralReg64", "usage": "use" },
        { "class": "GeneralReg64", "usage": "use" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "Min<int64_t>",
      "mnemo": "MIN_I64"
    },
    {
      "name": "MinUInt64",
      "args": [
        { "class": "GeneralReg64", "usage": "def_early_clobber" },
        { "class": "GeneralReg64", "usage": "use" },
        { "class": "GeneralReg64", "usage": "use" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "Min<uint64_t>",
      "mnemo": "MIN_U64"
    },
    {
      "name": "NanBoxFloat32",
      "args": [
        { "class": "FpReg64", "usage": "use_def" }
      ],
      "asm": "NanBox<Float32>",
      "mnemo": "BOX_F32"
    },
    {
      "name": "NanBoxFloat32AVX",
      "args": [
        { "class": "FpReg64", "usage": "def" },
        { "class": "FpReg32", "usage": "use" }
      ],
      "asm": "NanBoxAVX<Float32>",
      "mnemo": "BOX_F32"
    },
    {
      "name": "Orcb",
      "args": [
        { "class": "FpReg64", "usage": "use_def" }
      ],
      "asm": "Orcb",
      "mnemo": "ORCB"
    },
    {
      "name": "OrcbAVX",
      "args": [
        { "class": "FpReg64", "usage": "def" },
        { "class": "FpReg64", "usage": "use" }
      ],
      "asm": "OrcbAVX",
      "mnemo": "ORCB"
    },
    {
      "name": "RemI8RiscV",
      "args": [
        { "class": "GeneralReg8", "usage": "use" },
        { "class": "AX", "usage": "use_def" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "RemRiscV<int8_t>",
      "mnemo": "REM_I8_RISCV"
    },
    {
      "name": "RemI16RiscV",
      "args": [
        { "class": "GeneralReg16", "usage": "use" },
        { "class": "AX", "usage": "use_def" },
        { "class": "DX", "usage": "def_early_clobber" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "RemRiscV<int16_t>",
      "mnemo": "REM_I16_RISCV"
    },
    {
      "name": "RemI32RiscV",
      "args": [
        { "class": "GeneralReg32", "usage": "use" },
        { "class": "EAX", "usage": "use_def" },
        { "class": "EDX", "usage": "def_early_clobber" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "RemRiscV<int32_t>",
      "mnemo": "REM_I32_RISCV"
    },
    {
      "name": "RemI64RiscV",
      "args": [
        { "class": "GeneralReg64", "usage": "use" },
        { "class": "RAX", "usage": "use_def" },
        { "class": "RDX", "usage": "def_early_clobber" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "RemRiscV<int64_t>",
      "mnemo": "REM_I64_RISCV"
    },
    {
      "name": "RemU8RiscV",
      "args": [
        { "class": "GeneralReg8", "usage": "use" },
        { "class": "AX", "usage": "use_def" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "RemRiscV<uint8_t>",
      "mnemo": "REM_U8_RISCV"
    },
    {
      "name": "RemU16RiscV",
      "args": [
        { "class": "GeneralReg16", "usage": "use" },
        { "class": "AX", "usage": "use_def" },
        { "class": "DX", "usage": "def_early_clobber" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "RemRiscV<uint16_t>",
      "mnemo": "REM_U16_RISCV"
    },
    {
      "name": "RemU32RiscV",
      "args": [
        { "class": "GeneralReg32", "usage": "use" },
        { "class": "EAX", "usage": "use_def" },
        { "class": "EDX", "usage": "def_early_clobber" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "RemRiscV<uint32_t>",
      "mnemo": "REM_U32_RISCV"
    },
    {
      "name": "RemU64RiscV",
      "args": [
        { "class": "GeneralReg64", "usage": "use" },
        { "class": "RAX", "usage": "use_def" },
        { "class": "RDX", "usage": "def_early_clobber" },
        { "class": "FLAGS", "usage": "def" }
      ],
      "asm": "RemRiscV<uint64_t>",
      "mnemo": "REM_U64_RISCV"
    },
    {
      "name": "Sh1add",
      "args": [
        { "class": "GeneralReg64", "usage": "use_def" },
        { "class": "GeneralReg64", "usage": "use" }
      ],
      "asm": "Sh1add",
      "mnemo": "SH1ADD"
    },
    {
      "name": "Sh1adduw",
      "args": [
        { "class": "GeneralReg64", "usage": "use_def" },
        { "class": "GeneralReg64", "usage": "use" }
      ],
      "asm": "Sh1adduw",
      "mnemo": "SH1ADDUW"
    },
    {
      "name": "Sh2add",
      "args": [
        { "class": "GeneralReg64", "usage": "use_def" },
        { "class": "GeneralReg64", "usage": "use" }
      ],
      "asm": "Sh2add",
      "mnemo": "SH2ADD"
    },
    {
      "name": "Sh2adduw",
      "args": [
        { "class": "GeneralReg64", "usage": "use_def" },
        { "class": "GeneralReg64", "usage": "use" }
      ],
      "asm": "Sh2adduw",
      "mnemo": "SH2ADDUW"
    },
    {
      "name": "Sh3add",
      "args": [
        { "class": "GeneralReg64", "usage": "use_def" },
        { "class": "GeneralReg64", "usage": "use" }
      ],
      "asm": "Sh3add",
      "mnemo": "SH3ADD"
    },
    {
      "name": "Sh3adduw",
      "args": [
        { "class": "GeneralReg64", "usage": "use_def" },
        { "class": "GeneralReg64", "usage": "use" }
      ],
      "asm": "Sh3adduw",
      "mnemo": "SH3ADDUW"
    },
    {
      "name": "UnboxNanFloat32",
      "args": [
        { "class": "FpReg32", "usage": "def" },
        { "class": "FpReg64", "usage": "use_def" }
      ],
      "asm": "UnboxNan<Float32>",
      "mnemo": "UNBOX_F32"
    },
    {
      "name": "UnboxNanFloat32AVX",
      "args": [
        { "class": "FpReg32", "usage": "def" },
        { "class": "FpReg64", "usage": "use_def" }
      ],
      "asm": "UnboxNanAVX<Float32>",
      "mnemo": "UNBOX_F32"
    }
  ]
}