# nvram for bcm94390f10rfem board.
# nvram copied and edited from bcm94390f10ref.txt
# SSID generated using Alberto's boardssid.py script:
#********************SUMMARY********************
#Board Name: bcm94390f10rfem 10x10 P101 ref board
#SSID: 0x0ac0
#macmid: 0x0555
#Successfully made SSID entry in sromdefs.tcl.
#Successfully made macmid entry in sromdefs.tcl.
#Successfully made SSID entry in tblssid.py.
#*************************************************
# $ Copyright Broadcom $
#
#
# <<Broadcom-WL-IPTag/Proprietary:>>
#
#
#
NVRAMRev=$Rev: 947350 $
#
# All svn keyword entries must come before this comment. Any change within four
# lines of an svn keyword line will cause patching errors in precommit.
#
sromrev=11
boardrev=0x1101
boardtype=0x0ac0
boardflags=0x10401001
boardflags2=0x00800000
boardflags3=0x40002100
boardflags4=0x200000
#boardnum=57410
macaddr=00:90:4c:12:d0:01
jtag_irw=38

#Regulatory specific
ccode=0
regrev=0

# Board specific
vendid=0x14e4
devid=0x4438
manfid=0x2d0
antswitch=0
pdgain5g=0
pdgain2g=0
aa2g=3
aa5g=3
agbg0=0
agbg1=0
aga0=0
aga1=0
ag6ga0=0
ag6ga1=0
extpagain5g=0
slice/1/extpagain2g=0
rxgains2gelnagaina0=17
rxgains2gtrisoa0=19
rxgains2gtrelnabypa0=1
rxgains5gelnagaina0=16
rxgains5gtrisoa0=19
rxgains5gtrelnabypa0=1
rxgains5gmelnagaina0=16
rxgains5gmtrisoa0=19
rxgains5gmtrelnabypa0=1
rxgains5ghelnagaina0=16
rxgains5ghtrisoa0=19
rxgains5ghtrelnabypa0=1
rxgains2gelnagaina1=17
rxgains2gtrisoa1=19
rxgains2gtrelnabypa1=1
rxgains5gelnagaina1=16
rxgains5gtrisoa1=19
rxgains5gtrelnabypa1=1
rxgains5gmelnagaina1=16
rxgains5gmtrisoa1=19
rxgains5gmtrelnabypa1=1
rxgains5ghelnagaina1=16
rxgains5ghtrisoa1=19
rxgains5ghtrelnabypa1=1

rxgains2gfelossa0=1
rxgains2gfelossa1=1
rxgains5gfelossa0=0
rxgains5gfelossa1=0
rxgains5gmfelossa0=0
rxgains5gmfelossa1=0
rxgains5ghfelossa0=0
rxgains5ghfelossa1=0

rxgains6gelnagaina0=16
rxgains6gtrisoa0=19
rxgains6gtrelnabypa0=1
rxgains6gmelnagaina0=16
rxgains6gmtrisoa0=19
rxgains6gmtrelnabypa0=1
rxgains6ghelnagaina0=16
rxgains6ghtrisoa0=19
rxgains6ghtrelnabypa0=1
rxgains6gfelossa0=2
#rxgains6gbkoffa0=16

rxgains6gelnagaina1=16
rxgains6gtrisoa1=19
rxgains6gtrelnabypa1=1
rxgains6gmelnagaina1=16
rxgains6gmtrisoa1=19
rxgains6gmtrelnabypa1=1
rxgains6ghelnagaina1=16
rxgains6ghtrisoa1=19
rxgains6ghtrelnabypa1=1
rxgains6gfelossa1=2
#rxgains6gbkoffa1=16

#RSSI related
rssi_cal_freq_grp_2g=0x08,0x01,0x91,0x2a,0x23,0xb3,0xc4
rssi_cal_rev=1
rxgaincal_rssical=1
rssi_delta_2gb0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
rssi_delta_2gb1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
rssi_delta_2gb2=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
rssi_delta_2gb3=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
rssi_delta_2gb4=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
rssi_delta_5gl=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
rssi_delta_5gml=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
rssi_delta_5gmu=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
rssi_delta_5gh=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
rssi_delta_6gb0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
rssi_delta_6gb1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
rssi_delta_6gb2=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
rssi_delta_6gb3=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
rssi_delta_6gb4=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
rssi_delta_6gb5=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
#RSSI compensation parameters for 2G FBC and 5G/6G scan core in qdBm
rssi_delta_2gb0_fbc=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
rssi_delta_2gb1_fbc=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
rssi_delta_2gb2_fbc=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
rssi_delta_2gb3_fbc=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
rssi_delta_2gb4_fbc=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/2/rssicorrnorm5g_c0=0,0,0,0,0,0,0,0,0,0,0,0
slice/2/rssicorrnorm6g_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
gain_cal_temp=36
slice/1/rxgain_tempcoeff2g_sub=0,0,0,0,0,0,0,0,0,0
rxgain_tempcoeff5gl=0,0
rxgain_tempcoeff5gml=0,0
rxgain_tempcoeff5gmu=0,0
rxgain_tempcoeff5gh=0,0
slice/1/rxgain_tempcoeff2g_sub_elnaoff=0,0,0,0,0,0,0,0,0,0
rxgain_tempcoeff5gl_elnaoff=0,0
rxgain_tempcoeff5gml_elnaoff=0,0
rxgain_tempcoeff5gmu_elnaoff=0,0
rxgain_tempcoeff5gh_elnaoff=0,0
#TSSI Related
low_adc_rate_en=0
slice/1/low_adc_rate_en=0

nocrc=1
otpimagesize=502

xtalfreq=76800

txchain=3
rxchain=3

## --- 11b ANT selection Diversity ---
#cck_onecore_tx=1

cckdigfilttype=4

bandcap=6
slice/1/bandcap=1
slice/3/bandcap=1


#FDSS Related
fdss_level_5g=0,0
fdss_level_6g=0,0
slice/1/fdss_level_2g=0,0
slice/1/fdss_bandedge_2g_en=1
slice/1/fdss_profile_2g=7,0,0,16,20,28,36,44,48,169,-500,-590,70,0,-70,590,500,128
slice/1/fdss_profile_11ax_2g=7,0,0,28,56,120,136,200,228,128,-64,-64,-32,0,20,40,40,164,165
slice/1/fdss_profile_2g_ch1=7,0,0,16,20,28,36,44,48,165,-470,-200,80,135,-130,620,320,128
slice/1/fdss_profile_11ax_2g_ch1=7,0,0,28,56,120,136,200,228,128,-64,-64,-32,0,20,40,40,164,165
slice/1/fdss_profile_2g_ch11=7,0,0,16,20,28,36,44,48,184,-470,-150,100,-100,-50,300,500,128
slice/1/fdss_profile_11ax_2g_ch11=7,0,0,28,56,120,136,200,228,128,-64,-64,-32,0,20,40,40,164,165
slice/1/fdss_profile_2g_ch13=7,0,0,16,21,28,36,43,48,169,-450,170,500,-616,-70,460,250,128

paprdis=1
slice/1/paprdis=1

slice/1/txshaper_en=1
slice/1/txshaper_en_mfg=1
slice/1/txs_rate_chan_profile=1
slice/1/txshaper_en_11ax=1

#Tempsense Related
tempthresh=255
tempoffset=32
rawtempsense=0x1ff
phycal_tempdelta=15
temps_period=15
temps_hysteresis=0xf

#olpc
olpc_idx_in_use=1
disable_olpc=0
olpc_thresh5g=40
olpc_anchor5g=40
olpc_anchor6g=40
olpc_thresh6g=40
slice/1/olpc_idx_in_use=1
slice/1/disable_olpc=0
slice/1/olpc_thresh2g=28
slice/1/olpc_anchor2g=28
slice/1/olpc_thresh2g_hi=0x7f7f

# Disable Idle TSSI for both Aux and Main slice
idletssi_disable=1
disable_tpc=0

### To delay TSSI sampling, in nvram:
tssisampledelayen=1

tssipos2g=1
tssipos5g=0

etssi_inv_gain=474,474,400,400
AvVmid_c0=0,179,0,179,0,176,0,193,0,193
AvVmid_c1=0,165,0,165,0,166,0,180,0,180
AvVmid_6g_c0=0,188,0,188,0,190,0,192,0,194,0,195
AvVmid_6g_c1=0,180,0,181,0,181,0,184,0,185,0,190
slice/1/AvVmid_c0=0,154
slice/1/AvVmid_c1=0,146

pacalver_nvram=0x3
slice/1/pa2ga0=-16,6713,-1020
slice/1/pa2ga1=53,6952,-1040
pa5ga0=48,8231,-1211,49,8223,-1214,49,8339,-1203,19,7888,-1169
pa5ga1=22,7770,-1181,44,8032,-1200,50,8010,-1182,28,7726,-1165
pa6ga0=16,7545,-1162,26,7495,-1155,35,7569,-1157,54,7792,-1174,48,7667,-1178,59,7745,-1187
pa6ga1=49,7737,-1180,59,7767,-1177,63,7717,-1174,59,7765,-1169,99,7916,-1198,57,7677,-1184

# Max power and offsets
slice/1/powoffs2gtna0=-2,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/1/powoffs2gtna1=-2,0,0,0,0,0,0,0,0,0,0,0,0,0
#slice/1/pdoffsetcckma0=1
#slice/1/pdoffsetcckma1=1

maxp2ga0=74
maxp2ga1=74
maxp5ga0=76,76,76,76
maxp5ga1=76,76,76,76
maxp6ga0=76,76,76,76,76,76
maxp6ga1=76,76,76,76,76,76
subband5gver=0x4
subband6gver=0x3
paparambwver=3

slice/1/cckpwroffset0=0x6
slice/1/cckpwroffset1=0x6
pdoffset40ma0=0x5555
pdoffset40ma1=0x5555
pdoffset80ma0=0x5555
pdoffset80ma1=0x5555
pdoffset160ma0=0x7777
pdoffset160ma1=0x7777
pdoffset6g40ma0=0x555555
pdoffset6g40ma1=0x555555
pdoffset6g80ma0=0x555555
pdoffset6g80ma1=0x555555
pdoffset6g160ma0=0x777777
pdoffset6g160ma1=0x777777

slice/1/pdoffset20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/1/pdoffset20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset40mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset40mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset80mRUset1_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset80mRUset2_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset80mRUset1_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset80mRUset2_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset6g20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset6g20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset6g40mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset6g40mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset6g80mRUset1_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset6g80mRUset2_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset6g80mRUset1_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset6g80mRUset2_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0

#2G/5G related PPR params
cckbw202gpo=0
mcsbw202gpo=0x97432100
dot11agofdmhrbw202gpo=0x21200
ofdmlrbw202gpo=0x0000
mcsbw205glpo=0x98531000
mcsbw405glpo=0xa8642111
mcsbw805glpo=0xa8753222
mcsbw1605glpo=0xa8753222
mcsbw205gmpo=0x98531000
mcsbw405gmpo=0xa8642111
mcsbw805gmpo=0xa8753222
mcsbw1605gmpo=0xa8753222
mcsbw205ghpo=0x98531000
mcsbw405ghpo=0xa8642111
mcsbw805ghpo=0xa8753222
mcsbw1605ghpo=0xa8753222
mcs1024qam5glpo=0xEEEECCCC
mcs1024qam5gmpo=0xEEEECCCC
mcs1024qam5ghpo=0xEEEECCCC
mcs8poexp=0
mcs9poexp=0
mcs10poexp=0
mcs11poexp=0

# 5G power offset per channel for band edge channel
powoffs5g20mtna0=0,0,0,0,0,0,0
powoffs5g20mtna1=0,0,0,0,0,0,0
powoffs5g40mtna0=0,0,0,0,0
powoffs5g40mtna1=0,0,0,0,0
powoffs5g80mtna0=0,0,0,0,0
powoffs5g80mtna1=0,0,0,0,0

## 6G related PPR params
mcsbw206gb1po=0x98531000
mcsbw406gb1po=0xa8642111
mcsbw806gb1po=0xa8753222
mcsbw1606gb1po=0xa8753222
mcsbw206gb2po=0x98531000
mcsbw406gb2po=0xa8642111
mcsbw806gb2po=0xa8753222
mcsbw1606gb2po=0xa8753222
mcsbw206gb3po=0x98531000
mcsbw406gb3po=0xa8642111
mcsbw806gb3po=0xa8753222
mcsbw1606gb3po=0xa8753222
mcsbw206gb4po=0x98531000
mcsbw406gb4po=0xa8642111
mcsbw806gb4po=0xa8753222
mcsbw1606gb4po=0xa8753222
mcsbw206gb5po=0x98531000
mcsbw406gb5po=0xa8642111
mcsbw806gb5po=0xa8753222
mcsbw1606gb5po=0xa8753222
mcsbw206gb6po=0x98531000
mcsbw406gb6po=0xa8642111
mcsbw806gb6po=0xa8753222
mcsbw1606gb6po=0xa8753222
mcs1024qam6gb1po=0xEEEECCCC
mcs1024qam6gb2po=0xEEEECCCC
mcs1024qam6gb3po=0xEEEECCCC
mcs1024qam6gb4po=0xEEEECCCC
mcs1024qam6gb5po=0xEEEECCCC
mcs1024qam6gb6po=0xEEEECCCC

## ULOFDMA Board limit PPRs for 6G20 ##
ruppr6g20bpska0=0x83FE
ruppr6g20bpska1=0x83FE
ruppr6g20qpska0=0x18820
ruppr6g20qpska1=0x18820
ruppr6g20qam16a0=0x29062
ruppr6g20qam16a1=0x29062
ruppr6g20qam64a0=0x398A4
ruppr6g20qam64a1=0x398A4
ruppr6g20qam256a0=0x6B16A
ruppr6g20qam256a1=0x6B16A
ruppr6g20qam1024a0=0x7B9AC
ruppr6g20qam1024a1=0x7B9AC
## ULOFDMA Board limit PPRs for 6G40 ##
ruppr6g40bpska0=0x2083FE
ruppr6g40bpska1=0x2083FE
ruppr6g40qpska0=0x418820
ruppr6g40qpska1=0x418820
ruppr6g40qam16a0=0x629062
ruppr6g40qam16a1=0x629062
ruppr6g40qam64a0=0x8398A4
ruppr6g40qam64a1=0x8398A4
ruppr6g40qam256a0=0xE6B16A
ruppr6g40qam256a1=0xE6B16A
ruppr6g40qam1024a0=0x107B9AC
ruppr6g40qam1024a1=0x107B9AC
## ULOFDMA Board limit PPRs for 6G80 ##
ruppr6g80bpska0=0x102083FE
ruppr6g80bpska1=0x102083FE
ruppr6g80qpska0=0x18418820
ruppr6g80qpska1=0x18418820
ruppr6g80qam16a0=0x20629062
ruppr6g80qam16a1=0x20629062
ruppr6g80qam64a0=0x288398A4
ruppr6g80qam64a1=0x288398A4
ruppr6g80qam256a0=0x40E6B16A
ruppr6g80qam256a1=0x40E6B16A
ruppr6g80qam1024a0=0x4907B9AC
ruppr6g80qam1024a1=0x4907B9AC
## ULOFDMA Board limit PPRs for 6G160 ##
ruppr6g160bpska0=0x102083FE
ruppr6g160bpska1=0x102083FE
ruppr6g160qpska0=0x18418820
ruppr6g160qpska1=0x18418820
ruppr6g160qam16a0=0x20629062
ruppr6g160qam16a1=0x20629062
ruppr6g160qam64a0=0x288398A4
ruppr6g160qam64a1=0x288398A4
ruppr6g160qam256a0=0x40E6B16A
ruppr6g160qam256a1=0x40E6B16A
ruppr6g160qam1024a0=0x4907B9AC
ruppr6g160qam1024a1=0x4907B9AC

#OOB params
#device_wake_opt=1
host_wake_opt=0
# temporarily disable deepsleep health check
ds_hc_enable=0

#OOB params
#device_wake_opt=1
host_wake_opt=0
# temporarily disable deepsleep health check
ds_hc_enable=0

# SWCTRL Format - TXHEc1TXHEc0(16+16 bits), TXHLc1TXHLc0(16+16 bits),
#        RXHGc1RXHGc0(16+16 bits), RXBYPc1RXBYPc0(16+16 bits), Mask(16 bits)
# SWCTRL Ext Format - TXHEc1TXHEc0(4+4 bits), TXHLc1TXHLc0(4+4 bits), RXHGc1RXHGc0(4+4 bits),
#        RXBYPc1RXBYPc0(4+4 bits), Mask(4 bits)

# 5G Main SWCTRL
swctrlmap_5g=0x00000020,0x00000020,0x00000020,0x00040024,0xFFFF
swctrlmapext_5g=0x11,0x11,0x11,0x00,0xF

# 6G Main SWCTRL
swctrlmap_6g=0x00000020,0x00000020,0x00000020,0x00040024,0xFFFF
swctrlmapext_6g=0x11,0x11,0x11,0x00,0xF

# 2G Aux SWCTRL
slice/1/swctrlmap_2g=0x80008000,0x80008000,0x80008000,0x00010001,0xFFFF
slice/1/swctrlmapext_2g=0x0,0x0,0x0,0x00,0xF

# 5G WL Scan SWCTRL
slice/2/swctrlmap_5g=0x00000000,0x00000000,0x00000020,0x00040024,0xFFFF
slice/2/swctrlmapext_5g=0x11,0x11,0x11,0x00,0xF

# 6G WL Scan SWCTRL
slice/2/swctrlmap_6g=0x00000000,0x00000000,0x00000020,0x00040024,0xFFFF
slice/2/swctrlmapext_6g=0x11,0x11,0x11,0x00,0xF

# 2G WL Scan SWCTRL
slice/2/swctrlmap_2g=0x00000000,0x00000000,0x80008000,0x00010001,0xFFFF
slice/2/swctrlmapext_2g=0x0,0x0,0x0,0x00,0xF

# Init (default) values for FEM Control LUT Entries - 2G, 5G, 6G
fem_table_init_val=0x00010001,0x00040024,0x00040024
fem_table_init_val_ext=0x00,0x00,0x00

# Slice0=WLMain, Slice1=Aux, Slice2=WLScan
clb5gslice0core0=0x10024
clb5gslice0core1=0x10024
clb5gslice2core0=0x10024
clb5gslice2core1=0x10024

clb2gslice1core0=0x08001
clb2gslice1core1=0x08001
clb2gslice2core0=0x08001
clb2gslice2core1=0x08001

# rfem CMAPT
rFEM_hw_mppc_en_5g=1
rFEM_cmapt_swpt_pwr_thresh_qdBm_5g=-128,-12
mppc_gaindelta_pa1=0,46,45,45,45,46,45,47,46,48,45

# Gen9 5G/6G rFEM States:
# OFFc1_OFFc0_TX1c1_TX1c0, TX2c1_TX2c0_TX4c1_TX4c0, TX5c1_TX5c0_TX10c1_TX10c0,
# RX1c1_RX1c0_RX2Bc1_RX2Bc0, RX2c1_RX2c0_TX3c1_TX3c0, TX7c1_TX7c0_TX8c1_TX8c0,
# IDLEc1_IDLEc0_TEMPc1_TEMPc0, SISOc1_SISOc0_BTNc1_BTNc0, TX6c1_TX6c0_TX9c1_TX9c0
# BRCM rFEM EMLSR - Link0 uses TX1,TX4,TX7 config, Link1 uses TX2,TX5,TX8 config
remoteFEMlut_5g=0x80808181, 0xA0A08484, 0xA1A18A8A, 0x8B8B8D8D, 0x8C8C8383, 0x8484A1A1, 0x8E8E8F8F, 0x90909191, 0x86868989

# Gen9 2G rFEM States:
# OFFc1_OFFc0_TX1c1_TX1c0, 00_00_TX2c1_TX2c0, 00_00_BTTX1c1_BTTX1c0, RXHGc1_RXHGc0_RXHGSCANc1_RXHGSCANc0,
# 00_00_00_00, TX3c1_TX3c0_00_00, 00_00_TEMPc1_TEMPc0, 00_00_BTNc1_BTNc0, 00_00_00_00
remoteFEMlut_2g=0x80808181, 0x00008282, 0x00008787, 0x85858686, 0x00000000, 0x83830000, 0x00008484, 0x00008A8A, 0x00000000

# rFEM Type: 1 = BRCM rFEMs, 2 = BRCM Gen9 rFEMs, 3 = Gen8 Murata/Skyworks rFEMs, 4 = Gen9 Murata/Skyworks rFEMs
rFEM_2G_type=2
rFEM_5G_type=2

# RFFE VIO SWCTRL Number: 5GC1,5GC0,2GC1,2GC0
# 23 is actual line but GCI needs 23+4
# 22 is actual line but GCI needs 22+4
rFEM_VIO_swctrl=27,10,26,9

# Drives strength of core 0,1 rffe pads at attach
rffe_drive_strength_init=0x2

muxenab=1

# [31:24] - rts; [23:16] - cts; [15:8] - Tx; [7:0] - Rx;
fuart_sig2pin_map=0x0b0a0908

###Comment out BT section for initial bringup
#BT Coex
btc_mode=0x1
#btc_params82=0x1a0
# BT shared ant configuration
btc_prisel_ant_mask=0x0
btc_prisel_mask=0x1
clb_swctrl_smask_ant0=0x18025
clb_swctrl_smask_ant1=0x18025

# energy detect threshold
ed_thresh2g=-63
ed_thresh5g=-63
ed_thresh6g=-72,-72
ed_thresh_sec5g=-72
ed_thresh_sec6g=-72,-72
# energy detect threshold for EU
eu_edthresh2g=-63
eu_edthresh5g=-72
eu_edthresh6g=-72,-72
eu_edthresh_sec5g=-72
eu_edthresh_sec6g=-72,-72

#Feature flags
femctrl=17

# FE Loss comp parameters
slice/1/felossTx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/1/felossTx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/1/felossRx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/1/felossRx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
felossTx5ga0=0,0,0,0
felossTx5ga1=0,0,0,0
felossRx5ga0=0,0,0,0
felossRx5ga1=0,0,0,0
felossTx6ga0=0,0,0,0,0,0
felossTx6ga1=0,0,0,0,0,0
felossRx6ga0=0,0,0,0,0,0
felossRx6ga1=0,0,0,0,0,0
slice/2/felossRx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/2/felossRx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/2/felossRx5ga0=0,0,0,0
slice/2/felossRx5ga1=0,0,0,0
slice/2/felossRx6ga0=0,0,0,0,0,0
slice/2/felossRx6ga1=0,0,0,0,0,0

## ULOFDMA Board limit PPRs for 2G20 ##
ruppr2g20bpska0=0x83FE
ruppr2g20bpska1=0x83FE
ruppr2g20qpska0=0x18820
ruppr2g20qpska1=0x18820
ruppr2g20qam16a0=0x29062
ruppr2g20qam16a1=0x29062
ruppr2g20qam64a0=0x398A4
ruppr2g20qam64a1=0x398A4
ruppr2g20qam256a0=0x7B9AC
ruppr2g20qam256a1=0x7B9AC
ruppr2g20qam1024a0=0x83DCD
ruppr2g20qam1024a1=0x83DCD
## ULOFDMA Board limit PPRs for 5G20 ##
ruppr5g20bpska0=0x83FE
ruppr5g20bpska1=0x83FE
ruppr5g20qpska0=0x18820
ruppr5g20qpska1=0x18820
ruppr5g20qam16a0=0x29062
ruppr5g20qam16a1=0x29062
ruppr5g20qam64a0=0x398A4
ruppr5g20qam64a1=0x398A4
ruppr5g20qam256a0=0x6B16A
ruppr5g20qam256a1=0x6B16A
ruppr5g20qam1024a0=0x7B9AC
ruppr5g20qam1024a1=0x7B9AC
## ULOFDMA Board limit PPRs for 5G40 ##
ruppr5g40bpska0=0x2083FE
ruppr5g40bpska1=0x2083FE
ruppr5g40qpska0=0x418820
ruppr5g40qpska1=0x418820
ruppr5g40qam16a0=0x629062
ruppr5g40qam16a1=0x629062
ruppr5g40qam64a0=0x8398A4
ruppr5g40qam64a1=0x8398A4
ruppr5g40qam256a0=0xE6B16A
ruppr5g40qam256a1=0xE6B16A
ruppr5g40qam1024a0=0x107B9AC
ruppr5g40qam1024a1=0x107B9AC
## ULOFDMA Board limit PPRs for 5G80 ##
ruppr5g80bpska0=0x102083FE
ruppr5g80bpska1=0x102083FE
ruppr5g80qpska0=0x18418820
ruppr5g80qpska1=0x18418820
ruppr5g80qam16a0=0x20629062
ruppr5g80qam16a1=0x20629062
ruppr5g80qam64a0=0x288398A4
ruppr5g80qam64a1=0x288398A4
ruppr5g80qam256a0=0x40E6B16A
ruppr5g80qam256a1=0x40E6B16A
ruppr5g80qam1024a0=0x4907B9AC
ruppr5g80qam1024a1=0x4907B9AC
## ULOFDMA Board limit PPRs for 5G160 ##
ruppr5g160bpska0=0x102083FE
ruppr5g160bpska1=0x102083FE
ruppr5g160qpska0=0x18418820
ruppr5g160qpska1=0x18418820
ruppr5g160qam16a0=0x20629062
ruppr5g160qam16a1=0x20629062
ruppr5g160qam64a0=0x288398A4
ruppr5g160qam64a1=0x288398A4
ruppr5g160qam256a0=0x40E6B16A
ruppr5g160qam256a1=0x40E6B16A
ruppr5g160qam1024a0=0x4907B9AC
ruppr5g160qam1024a1=0x4907B9AC

# Spur canceller DTX spurs for some channels in Main slice
txspurcan_en=1
slice/1/txspurcan_en=0

# PAPDcal params
papd_multi_lut_en=0
epacal5g=1

# ABUCK Votage mapping check (BCM4397_switcher_tbls in pmu.tcl)
# 0 --> 0.87V, 1--> 0.88V, 2-->0.89V,..,5-->0.92V.,.., 15 --> 1.02V
# -1 --> 0.86V, -2 --> 0.85V, -3 --> 0.67V, -4 --> 0.66V,.. -16 --> 0.54
abuck_volt=5
slice/1/abuck_volt=5
slice/2/abuck_volt=5
# CBUCK Votage mapping check (BCM4397_switcher_tbls in pmu.tcl)
# 0 --> 0.60V, 1--> 0.61V, 2-->0.62V,...., 15 --> 0.75V, 16 --> 0.76V
# 31 --> 0.59V, 30 --> 0.58V, 29 --> 0.57V, 28 --> 0.56V,.. 22 --> 0.50V
# 21 --> 0.83V, 20 --> 0.81V, 19 --> 0.79V, 18 --> 0.78V, 17 --> 0.77V
#cbuck_volt=21

#LESI desense
lesi_desoffset=49,48,48
lesi_desoffset_20MHzextra=1,1,1

#tvpm params
tvpm=1
slice/1/tvpm=1
tvpm_dc_cltm=100,100,90,90,80,80,70,70,60,60,50,50,40,40,30,30,20,20,1,1

## List of duty cycle temperature thresholds in descending order (num = 3)
tvpm_dc_temp_threshold=110,105,100
slice/1/tvpm_dc_temp_threshold=110,105,100