# nvram for bcm94398fcref7x7 board.
# nvram copied and edited from bcm94397B0fcpage.txt
# SSID generated using Alberto's boardssid.py script:
#********************SUMMARY********************
#Board Name: bcm94398fcref7x7
#SSID: 0x0a32
#macmid: 0x04bb
#Successfully made SSID entry in sromdefs.tcl.
#Successfully made macmid entry in sromdefs.tcl.
#Successfully made SSID entry in tblssid.py.
#*************************************************
# $ Copyright Broadcom $
#
#
# <<Broadcom-WL-IPTag/Proprietary:>>
#
#
#
NVRAMRev=$Rev: 917705 $
#
# All svn keyword entries must come before this comment. Any change within four
# lines of an svn keyword line will cause patching errors in precommit.
#
sromrev=11
boardrev=0x1402
boardtype=0x0a62
boardflags=0x10401001
boardflags2=0x00800000
boardflags3=0x40002100
#boardnum=57410
macaddr=00:90:4c:12:d0:01
jtag_irw=38

#Regulatory specific
ccode=0
regrev=0

# Board specific
vendid=0x14e4
devid=0x4444
manfid=0x2d0
antswitch=0
pdgain5g=0
pdgain2g=0
aa2g=3
aa5g=3
agbg0=0
agbg1=0
aga0=0
aga1=0
ag6ga0=0
ag6ga1=0
extpagain5g=0
slice/1/extpagain2g=0
rxgains2gelnagaina0=10
rxgains2gtrisoa0=15
rxgains2gtrelnabypa0=1
rxgains5gelnagaina0=11
rxgains5gtrisoa0=24
rxgains5gtrelnabypa0=1
rxgains5gmelnagaina0=11
rxgains5gmtrisoa0=24
rxgains5gmtrelnabypa0=1
rxgains5ghelnagaina0=12
rxgains5ghtrisoa0=24
rxgains5ghtrelnabypa0=1
rxgains2gelnagaina1=10
rxgains2gtrisoa1=15
rxgains2gtrelnabypa1=1
rxgains5gelnagaina1=12
rxgains5gtrisoa1=24
rxgains5gtrelnabypa1=1
rxgains5gmelnagaina1=11
rxgains5gmtrisoa1=24
rxgains5gmtrelnabypa1=1
rxgains5ghelnagaina1=12
rxgains5ghtrisoa1=24
rxgains5ghtrelnabypa1=1

rxgains2gfelossa0=0
rxgains2gfelossa1=0
rxgains5gfelossa0=1
rxgains5gfelossa1=1
rxgains5gmfelossa0=1
rxgains5gmfelossa1=1
rxgains5ghfelossa0=1
rxgains5ghfelossa1=1

rxgains6gelnagaina0=10
rxgains6gtrisoa0=22
rxgains6gtrelnabypa0=1
rxgains6gmelnagaina0=11
rxgains6gmtrisoa0=22
rxgains6gmtrelnabypa0=1
rxgains6ghelnagaina0=10
rxgains6ghtrisoa0=22
rxgains6ghtrelnabypa0=1
rxgains6gfelossa0=0
#rxgains6gbkoffa0=16

rxgains6gelnagaina1=10
rxgains6gtrisoa1=22
rxgains6gtrelnabypa1=1
rxgains6gmelnagaina1=11
rxgains6gmtrisoa1=22
rxgains6gmtrelnabypa1=1
rxgains6ghelnagaina1=10
rxgains6ghtrisoa1=22
rxgains6ghtrelnabypa1=1
rxgains6gfelossa1=0
#rxgains6gbkoffa1=16

#RSSI related
rssi_cal_freq_grp_2g= 0x08,0x01,0x91,0x2a,0x23,0xb3,0xc4
rssi_delta_5gl=-8,-10,-13,-9,-8,-10,-13,-9,-8,-10,-13,-9,-8,-10,-13,-9,-5,-11,-15,-10,-5,-11,-15,-10,-5,-11,-15,-10,-5,-11,-15,-10
rssi_delta_5gml=-6,-12,-16,-12,-6,-12,-16,-12,-6,-12,-16,-12,-6,-12,-16,-12,-4,-11,-14,-10,-4,-11,-14,-10,-4,-11,-14,-10,-4,-11,-14,-10
rssi_delta_5gmu=-5,-12,-15,-11,-5,-12,-15,-11,-5,-12,-15,-11,-5,-12,-15,-11,-5,-9,-13,-9,-5,-9,-13,-9,-5,-9,-13,-9,-5,-9,-13,-9
rssi_delta_5gh=-3,-10,-14,-9,-3,-10,-14,-9,-3,-10,-14,-9,-3,-10,-14,-9,-6,-9,-12,-8,-6,-9,-12,-8,-6,-9,-12,-8,-6,-9,-12,-8
slice/2/rssi_delta_5gl=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/2/rssi_delta_5gml=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/2/rssi_delta_5gmu=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/2/rssi_delta_5gh=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
rssi_cal_rev=1
rxgaincal_rssical=1
rssi_delta_2gb0=-2,-1,0,2,-2,-1,0,2,-1,-1,0,2,-1,-1,0,2
rssi_delta_2gb1=-1,3,2,5,-1,3,2,5,-1,3,3,5,-1,3,3,5
rssi_delta_2gb2=0,2,1,4,0,2,1,4,-1,2,2,4,-1,2,2,4
rssi_delta_2gb3=1,2,2,5,1,2,2,5,0,2,2,4,0,2,2,4
rssi_delta_2gb4=2,5,4,7,2,5,4,7,2,5,4,7,2,5,4,7
slice/2/rssi_delta_2gb0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/2/rssi_delta_2gb1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/2/rssi_delta_2gb2=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/2/rssi_delta_2gb3=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/2/rssi_delta_2gb4=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
gain_cal_temp=36

slice/1/rxgain_tempcoeff2g_sub=0,0,0,0,0,0,0,0,0,0
rxgain_tempcoeff5gl=0,0
rxgain_tempcoeff5gml=0,0
rxgain_tempcoeff5gmu=0,0
rxgain_tempcoeff5gh=0,0
slice/1/rxgain_tempcoeff2g_sub_elnaoff=0,0,0,0,0,0,0,0,0,0
rxgain_tempcoeff5gl_elnaoff=0,0
rxgain_tempcoeff5gml_elnaoff=0,0
rxgain_tempcoeff5gmu_elnaoff=0,0
rxgain_tempcoeff5gh_elnaoff=0,0
#Need update in code, below values in qdb
slice/2/rssicorrnorm_c0=8,8
slice/2/rssicorrnorm_c1=8,8
slice/2/rssicorrnorm5g_c0=-16,-16,-16,-16,-16,-16,-16,-16,-16,-16,-16,-16,-16,-16,-16,-16
slice/2/rssicorrnorm5g_c1=-16,-16,-16,-16,-16,-16,-16,-16,-16,-16,-16,-16,-16,-16,-16,-16
slice/2/rssicorrnorm6g_c0=-24,-24,-24,-24,-24,-24,-24,-24,-24,-24,-24,-24,-20,-20,-20,-20,-12,-12,-12,-12,-6,-6,-6,-6
slice/2/rssicorrnorm6g_c1=-24,-24,-24,-24,-24,-24,-24,-24,-24,-24,-24,-24,-20,-20,-20,-20,-12,-12,-12,-12,-6,-6,-6,-6

rssi_delta_6gb0=-5,-3,-7,-3,-5,-3,-7,-3,-5,-3,-7,-3,-5,-3,-7,-3,-5,-3,-7,-3,-10,-5,-9,-3,-10,-5,-9,-3,-10,-5,-9,-3,-10,-5,-9,-3,-10,-5,-9,-3
rssi_delta_6gb1=-5,0,-4,1,-5,0,-4,1,-5,0,-4,1,-5,0,-4,1,-5,0,-4,1,-7,-2,-6,-1,-7,-2,-6,-1,-7,-2,-6,-1,-7,-2,-6,-1,-7,-2,-6,-1
rssi_delta_6gb2=-4,2,0,3,-4,2,0,3,-4,2,0,3,-4,2,0,3,-4,2,0,3,-2,2,0,3,-2,2,0,3,-2,2,0,3,-2,2,0,3,-2,2,0,3
rssi_delta_6gb3=-5,3,0,4,-5,3,0,4,-5,3,0,4,-5,3,0,4,-5,3,0,4,-2,4,1,5,-2,4,1,5,-2,4,1,5,-2,4,1,5,-2,4,1,5
rssi_delta_6gb4=-2,5,2,6,-2,5,2,6,-2,5,2,6,-2,5,2,6,-2,5,2,6,3,8,6,10,3,8,6,10,3,8,6,10,3,8,6,10,3,8,6,10
rssi_delta_6gb5=4,7,4,8,4,7,4,8,4,7,4,8,4,7,4,8,4,7,4,8,8,13,11,15,8,13,11,15,8,13,11,15,8,13,11,15,8,13,11,15

slice/2/rssi_delta_6gb0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/2/rssi_delta_6gb1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/2/rssi_delta_6gb2=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/2/rssi_delta_6gb3=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/2/rssi_delta_6gb4=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/2/rssi_delta_6gb5=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0

#TSSI Related
low_adc_rate_en=1
slice/1/low_adc_rate_en=0

nocrc=1
otpimagesize=502

xtalfreq=79960

txchain=3
rxchain=3

## --- 11b ANT selection Diversity ---
cck_onecore_tx=1

cckdigfilttype=4

bandcap=6
slice/1/bandcap=1


#FDSS Related
fdss_level_2g=-1,-1
fdss_level_5g=-1,-1
slice/1/fdss_level_2g=-1,-1
slice/1/fdss_level_5g=-1,-1

paprdis=1
slice/1/paprdis=1

#Tx shaper
slice/1/txshaper_en=1
slice/1/txshaper_en_11ax=1
slice/1/txs_rate_chan_profile=1

#Tempsense Related
tempthresh=255
tempoffset=32
rawtempsense=0x1ff
phycal_tempdelta=15
temps_period=15
temps_hysteresis=0xf

#olpc
olpc_idx_in_use=1
disable_olpc=0
olpc_thresh5g=20
olpc_anchor5g=20
olpc_thresh6g=20
olpc_anchor6g=20
slice/1/olpc_idx_in_use=1
slice/1/disable_olpc=0
slice/1/olpc_thresh2g=20
slice/1/olpc_anchor2g=20
slice/1/olpc_thresh2g_hi=0x7f7f
# disabling olpc idx bias for now
# hwolpc_offset_c0=2
# hwolpc_offset_c1=2

# disable baseidx cal for time being
baseidxcal_en=1
slice/1/baseidxcal_en=1

# Disable Idle TSSI for both Aux and Main slice
idletssi_disable=0
slice/1/idletssi_disable=1

### To delay TSSI sampling, in nvram:
tssisampledelayen=1
slice/1/tssisleep_en=0x1
tssipos2g=1
tssipos5g=1

AvVmid_c0=3,84,3,81,3,79,3,80,3,80
AvVmid_c1=3,92,3,90,3,91,3,89,3,89
AvVmid_6g_c0=3,83,3,84,3,86,3,85,3,86,2,101
AvVmid_6g_c1=3,89,3,92,3,85,3,93,3,96,2,108
slice/1/AvVmid_c0=7,22
slice/1/AvVmid_c1=7,22

# please increment pacalver wheneven there is update to paparams (or AvVmid and hence paParams)
pacalver_nvram=0x1

slice/1/pa2ga0=-191,5876,-911
slice/1/pa2ga1=-196,5909,-908

pa5ga0=-47,7487,-1104,-17,7859,-1134,-23,7858,-1155,-18,7954,-1173
pa5ga1=-16,6891,-1081,-41,6719,-1062,-25,7026,-1104,-26,7054,-1112
pa6ga0=-3,8006,-1181,10,8159,-1201,-8,7793,-1185,-5,7793,-1187,-14,7784,-1189,-22,8883,-1359
pa6ga1=-36,6872,-1102,-8,7074,-1140,-28,6841,-1102,-12,6967,-1142,7,7076,-1170,14,8660,-1387

# Max power and offsets
slice/1/powoffs2gtna0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/1/powoffs2gtna1=0,0,0,0,0,0,0,0,0,0,0,0,0,0

maxp2ga0=74
maxp2ga1=74
maxp5ga0=76,76,76,76
maxp5ga1=76,76,76,76
maxp6ga0=76,76,76,76,76,76
maxp6ga1=76,76,76,76,76,76
subband5gver=0x4
paparambwver=3

slice/1/cckpwroffset0=0x4
slice/1/cckpwroffset1=0x4
pdoffset40ma0=0x1211
pdoffset40ma1=0x1121
pdoffset80ma0=0x0000
pdoffset80ma1=0x0101
pdoffset160ma0=0xDD11
pdoffset160ma1=0xDD11
pdoffset6g40ma0=0x211021
pdoffset6g40ma1=0x212211
pdoffset6g80ma0=0x212010
pdoffset6g80ma1=0x001200
pdoffset6g160ma0=0x111F10
pdoffset6g160ma1=0x0F2F10
pdoffset6g320ma0=0x00CDCCDC
pdoffset6g320ma1=0x00CDCCDC

slice/1/pdoffset20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/1/pdoffset20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset40mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset40mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset80mRUset1_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset80mRUset2_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset80mRUset1_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset80mRUset2_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset6g20mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset6g20mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset6g40mRU_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset6g40mRU_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset6g80mRUset1_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset6g80mRUset2_c0=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset6g80mRUset1_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0
pdoffset6g80mRUset2_c1=0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0

#2G/5G related PPR params
cckbw202gpo=0x0
ofdmlrbw202gpo=0x0
mcsbw202gpo=0x63000000
mcs1024qam2gpo=0xEE
mcsbw205glpo=0x76542100
mcsbw405glpo=0x76442000
mcsbw805glpo=0x76432000
mcsbw1605glpo=0x76542000
mcsbw205gmpo=0x65432000
mcsbw405gmpo=0x76432000
mcsbw805gmpo=0x76431000
mcsbw1605gmpo=0x76542000
mcsbw205ghpo=0x65431000
mcsbw405ghpo=0x65321000
mcsbw805ghpo=0x65321000
mcsbw1605ghpo=0x65431000
mcs1024qam5glpo=0xFF999999
mcs1024qam5gmpo=0xFF998888
mcs1024qam5ghpo=0x99887777
mcs4096qam5glpo=0x44AAAA99
mcs4096qam5gmpo=0x44AA9999
mcs4096qam5ghpo=0xFF998888
mcs12poexp=0x24000000
mcs13poexp=0x24000000

# 6G SU PPR set
mcsbw206gb1po=0x65431000
mcsbw406gb1po=0x76432000
mcsbw806gb1po=0x65321000
mcsbw1606gb1po=0x76432000
mcsbw3206gb1po=0x97542000
mcsbw206gb2po=0x55321000
mcsbw406gb2po=0x65431000
mcsbw806gb2po=0x54320000
mcsbw1606gb2po=0x65321000
mcsbw3206gb2po=0x97542000
mcsbw206gb3po=0x65431000
mcsbw406gb3po=0x65431000
mcsbw806gb3po=0x65431000
mcsbw1606gb3po=0x76432000
mcsbw3206gb3po=0xA8542000
mcsbw206gb4po=0x65431000
mcsbw406gb4po=0x76432100
mcsbw806gb4po=0x65431000
mcsbw1606gb4po=0x76431000
mcsbw3206gb4po=0xA8541000
mcsbw206gb5po=0x65432100
mcsbw406gb5po=0x65432000
mcsbw806gb5po=0x65431000
mcsbw1606gb5po=0x65431000
mcsbw3206gb5po=0xB8430000
mcsbw206gb6po=0x76542100
mcsbw406gb6po=0x76542000
mcsbw806gb6po=0x76531000
mcsbw1606gb6po=0x87542000
mcsbw3206gb6po=0xB8430000
mcs1024qam6gb1po=0x99778888
mcs1024qam6gb2po=0x88778877
mcs1024qam6gb3po=0x99888888
mcs1024qam6gb4po=0x99888888
mcs1024qam6gb5po=0x99887788
mcs1024qam6gb6po=0xCCAA9999
mcs1024qam6gb1poext=0x55
mcs1024qam6gb2poext=0xFF
mcs1024qam6gb3poext=0xFF
mcs1024qam6gb4poext=0x44
mcs1024qam6gb5poext=0x66
mcs1024qam6gb6poext=0x66
mcs4096qam6gb1po=0xAA889988
mcs4096qam6gb2po=0x99888888
mcs4096qam6gb3po=0x00999999
mcs4096qam6gb4po=0xBB999988
mcs4096qam6gb5po=0xAA998888
mcs4096qam6gb6po=0x55BBAAAA
mcs4096qam6gb1poext=0xCA
mcs4096qam6gb2poext=0xCA
mcs4096qam6gb3poext=0xCA
mcs4096qam6gb4poext=0xCA
mcs4096qam6gb5poext=0xCA
mcs4096qam6gb6poext=0xCA
mcs10poexp320=0x39
mcs11poexp320=0x39
mcs12poexp320=0x3F
mcs13poexp320=0x3F

# 5G power offset per channel for band edge channel
powoffs5g20mtna0=0,0,0,0,0,0,0
powoffs5g20mtna1=0,0,0,0,0,0,0
powoffs5g40mtna0=0,0,0,0,0
powoffs5g40mtna1=0,0,0,0,0
powoffs5g80mtna0=0,0,0,0,0
powoffs5g80mtna1=0,0,0,0,0

## ULOFDMA Board limit PPRs for 2g20 ##
ruppr2g20bpsk=0x00000000,0x00F7C000
ruppr2g20qpsk=0x00000000,0x00F7C000
ruppr2g20qam16=0x00000000,0x007DF000
ruppr2g20qam64=0x00020021,0x007DF000
ruppr2g20qam256=0x00060C63,0x007DF000
ruppr2g20qam1024=0x000798A5,0x007DF000
## ULOFDMA Board limit PPRs for 5g20 ##
ruppr5g20bpsk=0x000087BD,0x00041000
ruppr5g20qpsk=0x000087BD,0x00041000
ruppr5g20qam16=0x00008421,0x00041000
ruppr5g20qam64=0x000294C5,0x00146000
ruppr5g20qam256=0x00042108,0x00208000
ruppr5g20qam1024=0x000739EE,0x0030B000
ruppr5g20qam4096=0x0007BDEF,0x007D3000
## ULOFDMA Board limit PPRs for 5g40 ##
ruppr5g40bpsk=0x001EF45D,0x00082000
ruppr5g40qpsk=0x001EF45D,0x00082000
ruppr5g40qam16=0x00110441,0x00082000
ruppr5g40qam64=0x005314A5,0x00145000
ruppr5g40qam256=0x00A42128,0x00208000
ruppr5g40qam1024=0x0117B9AE,0x0028B000
ruppr5g40qam4096=0x0147BDCF,0x003CC000
## ULOFDMA Board limit PPRs for 5g80 ##
ruppr5g80bpsk=0x07DEF45D,0x01082000
ruppr5g80qpsk=0x07DEF45D,0x01082000
ruppr5g80qam16=0x04108441,0x01082000
ruppr5g80qam64=0x145298A5,0x06186000
ruppr5g80qam256=0x2C842109,0x09249000
ruppr5g80qam1024=0x44E739CF,0x1F2CB000
ruppr5g80qam4096=0x4CF7BDEF,0x1F30C000
## ULOFDMA Board limit PPRs for 5g160 ##
ruppr5g160bpsk=0x07C17442,0x00000002,0x00000000
ruppr5g160qpsk=0x07C17442,0x00000002,0x00000000
ruppr5g160qam16=0x04110042,0x00000003,0x00000000
ruppr5g160qam64=0x145318A5,0x00000007,0x00000000
ruppr5g160qam256=0x2885B1A9,0x0000000F,0x00000000
ruppr5g160qam1024=0x40F7BDEF,0x00000015,0x00000000
ruppr5g160qam4096=0x6517BDEF,0x0000001F,0x00000000
## ULOFDMA Board limit PPRs for 6g20 ##
ruppr6g20bpsk=0x00021084,0x000C2000
ruppr6g20qpsk=0x00021084,0x000C2000
ruppr6g20qam16=0x00021084,0x000C2000
ruppr6g20qam64=0x00031CE7,0x00185000
ruppr6g20qam256=0x0004A949,0x00248000
ruppr6g20qam1024=0x000731AC,0x0030B000
ruppr6g20qam4096=0x0007B5CD,0x00591000
## ULOFDMA Board limit PPRs for 6g40 ##
ruppr6g40bpsk=0x00321084,0x000C3000
ruppr6g40qpsk=0x00321084,0x000C3000
ruppr6g40qam16=0x00321084,0x000C3000
ruppr6g40qam64=0x00639CE6,0x00185000
ruppr6g40qam256=0x00A52949,0x00208000
ruppr6g40qam1024=0x00E6318B,0x0028B000
ruppr6g40qam4096=0x012735AC,0x00351000
## ULOFDMA Board limit PPRs for 6g80 ##
ruppr6g80bpsk=0x0C321084,0x020C2000
ruppr6g80qpsk=0x0C321084,0x020C2000
ruppr6g80qam16=0x0C321084,0x030C2000
ruppr6g80qam64=0x1C73A107,0x06186000
ruppr6g80qam256=0x28A52D6A,0x09249000
ruppr6g80qam1024=0x38C6B5AC,0x1F2CA000
ruppr6g80qam4096=0x50D7B9CE,0x1F3D1000
## ULOFDMA Board limit PPRs for 6g160 ##
ruppr6g160bpsk=0x0C111084,0x03103003,0x00000003
ruppr6g160qpsk=0x0C111084,0x03103003,0x00000003
ruppr6g160qam16=0x0C211084,0x03103003,0x00000003
ruppr6g160qam64=0x185318C6,0x03104008,0x00000005
ruppr6g160qam256=0x2494A549,0x0618600C,0x00000009
ruppr6g160qam1024=0x30C6B1AC,0x0D208015,0x00000011
ruppr6g160qam4096=0x38D7B5CD,0x1224901F,0x00000014
## ULOFDMA Board limit PPRs for 6g320 ##
ruppr6g320bpsk=0x5557BDEF,0x15555555,0x15555015
ruppr6g320qpsk=0x5557BDEF,0x15555555,0x15555015
ruppr6g320qam16=0x5557BDEF,0x15555555,0x15555015
ruppr6g320qam64=0x5557BDEF,0x15555555,0x15555015
ruppr6g320qam256=0x5557BDEF,0x15555555,0x15555015
ruppr6g320qam1024=0x5557BDEF,0x15555555,0x15555015
ruppr6g320qam4096=0x5557BDEF,0x15555555,0x15555015

subband6gver=0x1

#OOB params
#device_wake_opt=1
host_wake_opt=0
# temporarily disable deepsleep health check
ds_hc_enable=0

# 5G Main SWCTRL
swctrlmap_5g=0x00380070,0x00380070,0x00480018,0x00580038,0xFFFF
swctrlmapext_5g=0x88,0x88,0x88,0x00,0xF
# 6G Main SWCTRL
swctrlmap_6g=0x00280050,0x00280050,0x00480018,0x00580038,0xFFFF
swctrlmapext_6g=0x88,0x88,0x88,0x00,0xF
# 2G Aux SWCTRL
slice/1/swctrlmap_2g=0x00020002,0x00020002,0x00010001,0x00000000,0xFFFF
slice/1/swctrlmapext_2g=0x44,0x44,0x44,0x00,0xF
# 5G WL Scan SWCTRL
slice/2/swctrlmap_5g=0x00000000,0x00000000,0x00480018,0x00580038,0xFFFF
slice/2/swctrlmapext_5g=0x88,0x88,0x88,0x00,0xF
# 6G WL Scan SWCTRL
slice/2/swctrlmap_6g=0x00000000,0x00000000,0x00480018,0x00580038,0xFFFF
slice/2/swctrlmapext_6g=0x88,0x88,0x88,0x00,0xF
# 2G WL Scan SWCTRL
slice/2/swctrlmap_2g=0x00000000,0x00000000,0x00010001,0x00000000,0xFFFF
slice/2/swctrlmapext_2g=0x44,0x44,0x44,0x00,0xF

# Bit<19:18> Meant for the eLNA control to scan
#slice0=Main, slice1=Aux
clb5gslice0core0=0x80078
clb5gslice0core1=0x80078
clb5gslice2core0=0x80078
clb5gslice2core1=0x80078
clb2gslice1core0=0x40007
clb2gslice1core1=0x40007
clb2gslice2core0=0x40007
clb2gslice2core1=0x40007

fem_able_init_val=0x00000000,0x00580038,0x00580038
fem_table_init_val_ext=0x00,0x00,0x00

slice/1/fem_table_init_val=0x19190000,0x00000000,0x00000000
slice/1/fem_table_init_val_ext=0x00000000,0x00000000,0x00000000

muxenab=1


# [31:24] - rts; [23:16] - cts; [15:8] - Tx; [7:0] - Rx;
fuart_sig2pin_map=0x0b0a0908

###Comment out BT section for initial bringup
#BT Coex
btc_mode=1
#btc_params82=0x1a0
# BT shared ant configuration
btc_prisel_ant_mask=0x0
btc_prisel_mask=0x1
# Bit<19:18> Meant for the eLNA control to scan
clb_swctrl_smask_ant0=0xc007f
clb_swctrl_smask_ant1=0xc007f

# UWB Coex
uwbcx_en=1
uwbcx_gpio_input=0x4
uwbcx_coex_bitmap_5g=0x03ff,0x07ff,0x7f
uwbcx_coex_bitmap_6g=0xffff,0xffff,0xffff,0x07ff

# elna bypass in scan
slice/2/scan_ebyp_ncc=1
# energy detect threshold
ed_thresh2g=-63
ed_thresh5g=-63
# energy detect threshold for EU
eu_edthresh2g=-63
eu_edthresh5g=-63

## List of duty cycle temperature thresholds in descending order (num = 3)
tvpm_dc_temp_threshold=110,105,100
slice/1/tvpm_dc_temp_threshold=110,105,100

#Feature flags
femctrl=17

# FE Loss comp parameters
slice/1/felossTx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/1/felossTx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/1/felossRx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/1/felossRx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
felossTx5ga0=0,0,0,0
felossTx5ga1=0,0,0,0
felossRx5ga0=0,0,0,0
felossRx5ga1=0,0,0,0
felossTx6ga0=0,0,0,0,0,0
felossTx6ga1=0,0,0,0,0,0
felossRx6ga0=0,0,0,0,0,0
felossRx6ga1=0,0,0,0,0,0
slice/2/felossRx2ga0=0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/2/felossRx2ga1=0,0,0,0,0,0,0,0,0,0,0,0,0,0
slice/2/felossRx5ga0=0,0,0,0
slice/2/felossRx5ga1=0,0,0,0
slice/2/felossRx6ga0=0,0,0,0,0,0
slice/2/felossRx6ga1=0,0,0,0,0,0

# ABUCK Votage mapping check (BCM4397_switcher_tbls in pmu.tcl)
# 0 --> 0.87V, 1--> 0.88V, 2-->0.89V,..,5-->0.92V.,.., 15 --> 1.02V
# -1 --> 0.86V, -2 --> 0.85V, -3 --> 0.67V, -4 --> 0.66V,.. -16 --> 0.54
abuck_volt=2
slice/1/abuck_volt=2
slice/2/abuck_volt=2

# CBUCK Votage mapping check (BCM4397_switcher_tbls in pmu.tcl)
# 0 --> 0.60V, 1--> 0.61V, 2-->0.62V,...., 15 --> 0.75V, 16 --> 0.76V
# 31 --> 0.59V, 30 --> 0.58V, 29 --> 0.57V, 28 --> 0.56V,.. 22 --> 0.50V
# 21 --> 0.83V, 20 --> 0.81V, 19 --> 0.79V, 18 --> 0.78V, 17 --> 0.77V
#cbuck_volt=21

# WAR for Fc/16 spur for some channels in Main slice (Disabled by default)
#txfcby16spur_war=1
#slice/1/txfcby16spur_war=0

# Spur canceller WAR for Fc/16 spur for some channels in Main slice
txspurcan_en=1
slice/1/txspurcan_en=0

# ocl
ocl=1
slice/1/ocl=1
ocl_cm=1
slice/1/ocl_cm=2

#tvpm
tvpm=1
slice/1/tvpm=1

# Disable bphy predetect
slice/1/bphy_pre_det_en=0

##Dynamic SAR related Params
dynsar_fcc_rev=2